JPH0136307B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiving device for pay television such as CATV, and its purpose is to ensure that subscribers can receive pay TV broadcasts that have been scrambled to prevent broadcast programs from being received by unauthorized means. An object of the present invention is to provide a data processing circuit of a descramble circuit which can reproduce data in a single manner.

Paid television broadcasting is operated using subscription fees from subscribers, and there is a risk that it will no longer be able to operate if it is viewed through illegal means. Therefore, in order to be able to receive only the subscribed reception channels, a device to prevent eavesdropping was added to the receiver's channel selection device to enable selective reception of the subscribed channels, but this was modified to prevent eavesdropping. There were quite a few cases where this occurred. Therefore, in recent years, a scrambled system has been used in pay TV broadcasting. In other words, this is a method in which a video signal is made into a special format, and a special code signal is added to the signal for transmission, and the receiving side can restore the normal video signal only when the code signal can be restored and deciphered.

A video signal for general television broadcasting has a waveform as shown in FIG. 2a, and a video signal for pay television broadcasting has a waveform as shown in FIG. 2b. In other words, in pay TV broadcasting, by increasing the level of the video signal period other than the blanking period by approximately 6 dB in the composite video signal, the level of the synchronization signal included in the blanking period is relatively suppressed by approximately 6 dB. ing. In this state, it is not possible to separate the amplitude of the synchronization signal from the received signal, so synchronization cannot be achieved and an image cannot be constructed. In addition, the high-frequency audio signal is FM-modulated with the audio signal and then AM-modulated with a composite data pulse consisting of a horizontal synchronization trigger pulse e and a code trigger pulse f as shown in Figure 2c. Then, by performing AM detection on this, a composite data pulse can be obtained. The horizontal synchronization trigger pulse e exists in synchronization with the horizontal synchronization signal of the video signal,
The code trigger pulse f is inserted one pulse at a time between several horizontal synchronization trigger pulse trains e...e from the beginning after the end of the vertical blanking period d.

The present invention realizes a data processing circuit for restoring and decoding the above code signal.

FIG. 1 is a block diagram of a receiving apparatus equipped with a data processing circuit. In FIG. 1, a television broadcast signal is input to an input terminal 7. In FIG. 1 is a channel selection device that converts a desired television broadcast signal into an intermediate frequency signal (hereinafter referred to as an IF signal) and outputs the same. IF
The signal is distributed by a distributor 2 to a data receiver 3 and a switching attenuator 6. The data receiver 3 demodulates the audio IF signal and extracts composite data pulses. This composite data pulse is input to the data processing circuit 4, where it is separated into a horizontal synchronizing pulse and a code pulse and extracted. The code pulse is detected as a digital code with a predetermined number of bits, and is compared with the subscriber code held in the ROM section 5 to determine whether or not it is a subscribed pay television channel.

The data processing circuit 4 also generates a horizontal synchronizing pulse and a vertical blanking period pulse.
And as a result of decoding based on the digital code,
When it is determined that the pay TV broadcast is under contract, a horizontal synchronization pulse and a vertical blanking period pulse are output to the switching attenuator 6, and in the case of pay TV broadcast without a contract, these pulses are replaced. A continuous high level signal is output.

The switching attenuator 6 is the data processing circuit 4
When a high level signal is supplied from the divider 2, the IF signal from the distributor 2 is passed through without loss and outputted to the output terminal 8, and when a low level signal is supplied, the IF signal is attenuated by about 6 dB and output.

Therefore, when a horizontal synchronizing pulse and a vertical blanking period pulse are inputted to the switching attenuator 6 from the data processing circuit 4, the IF signal does not attenuate during these pulse periods, and is approximately attenuated during periods other than the pulses.
Since the attenuation is 6dB, the output of switching attenuator 6 is a normal video IF with restored synchronization signal.
It is reproduced (descrambled) as a signal.
Note that 8 is an output terminal to the television receiver circuit.

On the other hand, if it is determined that the pay TV broadcast is not under contract, the output of the data processing circuit 4 is a continuous high level signal, and the switching attenuator 6
Since the IF signal is not attenuated over the entire period, no descrambling is performed, and the IF signal is supplied to the television in a scrambled state, resulting in synchronization and no image formation. In addition, in the case of general television broadcasting, the high frequency audio signal does not contain composite data pulses and cannot be decoded by the code in the ROM section 5, so the output of the data processing circuit 4 is a continuous high level signal. The switching attenuator 6 is a pass-through type that does not attenuate the IF signal and has no effect on the IF signal.

Next, the data processing circuit 4 of the present invention will be described in detail with reference to FIG. 3, which is a block diagram thereof, and FIG. 4, which shows signal waveforms at various parts of the block.

In Figure 4, IV indicates one field period,
The horizontal synchronization trigger pulse e is for one horizontal scanning period.
It exists at intervals of 63.5 μsec and does not exist during the vertical blanking period d. In addition, the code trigger pulse f is delayed by 20 μsec from the horizontal synchronization trigger pulse e, and the normal number of pulses is 1 pulse at a time between the preset horizontal synchronization trigger pulse e...e from the beginning after the end of the vertical blanking period d. Bits are inserted.

In FIG. 3, 10 is a monostable multivibrator, to which the composite data pulse g (FIG. 4 g) taken out by the data receiver 3 is inputted from the terminal 9, and the composite data Operates at the rising edge of pulse g to generate composite data signal h with the pulse width required for the horizontal synchronization signal.
(Fig. 4h) is generated. The composite data signal h is then input to the second monostable multivibrator 11, the horizontal synchronization extraction circuit 12, and the data extraction circuit 13.

The monostable multivibrator 11 operates at the falling edge of the composite data signal h, and its pulse width is set to three times the pulse width of the composite data signal h. That is, the monostable multivibrator 11 receives the horizontal synchronizing pulse immediately after the vertical blanking period d, starts generating pulses at the falling edge of the horizontal synchronizing pulse, and therefore does not operate depending on the code pulse, but only the signal i (the fourth Figure i) is generated.

The signal i is input to the horizontal synchronization extraction circuit 12 and the data extraction circuit 13 together with the composite data signal h. The horizontal synchronization extraction circuit 12 consists of a gate circuit that does not pass the composite data signal h when the signal i is at a high level, but allows it to pass when it is at a low level, and extracts the horizontal synchronization pulse k from which the code pulse has been removed (k in Figure 4).
Output. Further, the data extraction circuit 13 passes the composite data signal h when the signal i is at a high level,
Consists of a gate circuit that does not allow it to pass when it is low level, removes the horizontal synchronizing pulse k and converts the code pulse j
(Fig. 4 j) is output.

The horizontal synchronization pulse k output from the horizontal synchronization extraction circuit 12 is input to the additional circuit 14. The additional circuit 14 consists of a pulse generator circuit, a synthesizer, etc., and when the horizontal synchronizing pulse k is input, the vertical blanking period d
generates a pulse signal n (n in FIG. 4), outputs the pulse signal n to the data comparison circuit 15, and
A synchronizing signal l (FIG. 4 l), which is a combination of the pulse signal n and the horizontal synchronizing pulse k, is output to the gate 16.

The code pulse j extracted from the data extraction circuit 13 and the subscriber code from the ROM section 5 are both input to the data comparison circuit 15, which determines whether or not the selected pay TV broadcast is subscribed to, and determines whether the selected pay TV broadcast is subscribed to. It outputs a high level signal if it is a contract, and a low level signal if it is not a contract.
It is reset for each field by the signal n.

The gate 16 consists of an inverter and a NAND gate, and the synchronizing signal l enters the NAND gate after being inverted by the inverter. The NAND gate is controlled by the signal n from the comparison circuit 15, and when the signal n is at a high level, the gate is opened and the signal l passes through, and when the signal n is at a low level, the gate is closed and a high level signal is output.

The data processing circuit 4 is configured as described above and operates to output the synchronizing signal 1 or a high level signal to control the switching attenuator 6 so that the descramble circuit operates.

Note that in the data processing circuit 4, a time lag may occur between the regular horizontal synchronization signal and the horizontal synchronization pulse, but this is due to the time delay in the rise of the monostable multivibrator 10 and the prolonged fall time. Yes, if the fall time is prolonged, it will affect the video signal part. However, the pulse width of the monostable multivibrator 10 is made variable so that it does not adversely affect the portion of the video signal to be adjusted, and no problem occurs during image reception.

As described above, by using the data processing circuit 4 according to the present invention, a horizontal synchronizing pulse and a code pulse can be easily separated, a good descrambling circuit can be realized, and eavesdropping on pay television broadcasting can be prevented.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a pay television broadcast receiving apparatus, FIG. 2 is a time chart showing waveforms of each part of the block shown in FIG. 1, and FIG. 3 is a block diagram showing an embodiment of a data processing circuit according to the present invention. FIG. 4 is a time chart showing the waveforms of various parts of the block shown in FIG. 10, 11... Monostable multivibrator, 1
2...Horizontal synchronization extraction circuit, 13...Data extraction circuit, 14...Additional circuit, 15...Comparison circuit, 16
……Gate.

Claims (1)

[Claims] 1. A high-frequency video signal from which the horizontal synchronization signal has been removed,
A high-frequency audio signal on which a composite data pulse consisting of a horizontal synchronization trigger pulse and a code trigger pulse is superimposed is received, and pay TV broadcasting can be received by comparing the code trigger pulse with a code given to the receiver in advance. When it is determined that the horizontal synchronization signal is restored based on the horizontal synchronization trigger pulse, a receiving device that receives scrambled pay TV broadcasting operates at the rising edge of the composite data pulse to generate a predetermined pulse width. a first pulse generation circuit that outputs a horizontal synchronization pulse and a code pulse, and a second pulse generation circuit that outputs a signal that rises at the fall of the horizontal synchronization pulse and falls after the fall of the code pulse; a horizontal synchronization extraction circuit that inputs the output signals of the first and second pulse generation circuits and outputs the horizontal synchronization pulse; and a horizontal synchronization extraction circuit that inputs the output signals of the first and second pulse generation circuits and outputs the horizontal synchronization pulse; A data processing circuit for pay television broadcasting, comprising: a data extraction circuit that outputs; and a data processing circuit for pay television broadcasting.