JPH0136120B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to Parcoll (PARCOR: Partial
This invention relates to a Percoll analysis data interpolation inhibiting circuit in a speech analysis/synthesis system using the partial autocorrelation (Autocorrelation) method.

In a Percoll-based speech analysis/synthesis system, an original audio signal as shown in Figure 1a is analyzed in units of frames of a certain period of time (for example, 20 ms), and amplitude data, fundamental frequency data, and a large number of K parameters (Parcoll) are analyzed. (coefficient) data is generated and sent out, and a speech synthesizer restores the original speech signal based on the input analysis data. In this case, the analysis data is generated for each frame, and in order to smooth the changes in the analysis data, an interpolation section is provided in the synthesizer to perform restoration (synthesis) that accompanies information compression using the Percoll method. This is to compensate for the deterioration in sound quality. Specifically, interpolation is performed by inserting interpolated values a predetermined number of times for each frame. Figure 1b
11 shows a typical interpolation state for one parameter data of the analysis data, where the ◎ mark is the analysis data and the ○ mark is the interpolated value.

By the way, the quality of voice is classified into three states: silent, unvoiced, and voiced, and the switching points between voices of different quality correspond to silence ← → voiced, silence ← → unvoiced, and voiced ← → unvoiced. Interpolating between two pieces of analysis data is essentially meaningless and will impair the synthesized sound quality at the transition point.

The present invention was made in view of the above circumstances, and
The sound quality of the synthesized sound can be improved by inhibiting the interpolation of analysis data using a switching signal generated at the time of switching between voices of different quality in the synthesizer, and by prohibiting this interpolation at the interpolation circuit input section. In addition, the present invention provides a Percoll analysis data interpolation inhibiting circuit that can be realized with a simple and small-scale configuration.

An embodiment of the present invention will be described in detail below with reference to the drawings.

Figure 2 shows any one of the Percoll analysis data.
The analysis data interpolation circuit ₁₀ interpolates two input data of systems A and B. For example, the analysis data interpolation circuit 10 interpolates two input data of systems A and B. a subtracting circuit 11 for calculating , a dividing circuit 12 for dividing the subtracted output of this subtracting circuit 11 by a constant k, and an adding circuit 1 whose output from this dividing circuit 12 serves as one addition input.
3, and a switching circuit 14 which selects and selects the input of the system B or the output of the adding circuit 13 at a predetermined timing as the other addition input of the adding circuit 13. As input to the above-mentioned system A, the analysis data of a new frame (more precisely, one piece of data) among the analysis data sequentially obtained for each frame by the Percoll analysis is derived. Further, as the input to the system B, the analysis data of the old frame one frame before the new frame or the analysis data of the new frame are selected and guided by the input switching selection circuit 15. This selection circuit 15 selects a switching signal (third
(see figure), and usually the analysis data of the old frame (to be exact, one of the data)
is selected, and when a switching signal occurs, the analysis data of the new frame (more precisely, one of the data)
This is to select.

In the Parcall analysis data interpolation inhibiting circuit configured as described above, the analysis data of the new frame and the analysis data of the old frame are normally led to the interpolation circuit 10, where an interpolation operation is performed, for example, the first
The output shown in Figure b is obtained. On the other hand, when a switching signal is generated, the inputs of systems A and B of the interpolation circuit 10 are both new frame analysis data and are the same, so the output of the subtraction circuit 11 and the output of the division circuit 12 are both zero, Equivalently, interpolation is prohibited.

As described above, according to the interpolation prohibition circuit of the present invention, interpolation can be prohibited at the transition point between voices of different quality, and deterioration of the synthesized sound quality at the transition point can be prevented. Moreover, the interpolation inhibition is controlled by switching and selecting the input switching selection circuit 15 provided on the input side of the interpolation circuit using the switching signal generated corresponding to the switching point. Compared to the case where a large number of control lines are provided to stop the operation of each part of the synthesizer, the structure of the synthesizer is simpler and can be realized on a small scale.

Note that when the circuit of the above embodiment is realized by an insulated gate field effect transistor (MOS-FET), the input switching selection circuit 15 can have a simple configuration as shown in FIG. 4, for example. That is, 41 is an inverter made of complementary transistors, and 42 and 43 are gates each made of P channel enhancement type transistors. When the switching signal is at a high level, the gate 42 is on and the gate 43 is off, and when the switching signal is at a low level. Sometimes gate 42 is off,
Gate 43 is turned on.

As described above, the present invention can provide a Percoll analysis data interpolation inhibiting circuit that can improve the sound quality of synthesized sound at the transition between voices of different quality and can be realized with a simple and small-scale configuration.

[Brief explanation of drawings]

Figure 1 is shown to explain the general operation of the Percall speech analysis/synthesis system.
FIG. 2A is a waveform diagram of the original audio signal, FIG. 3B is a timing diagram of analysis data and interpolated values, FIG. 2 is a waveform diagram showing the switching signal of FIG. 2, and FIG. 4 is a circuit diagram showing a specific example of the input switching selection circuit of FIG. 2. 10... Analysis data interpolation circuit, 15... Input switching selection circuit, 42, 43... MOS-FET gate.

Claims (1)

[Scope of Claims] 1. An analysis data interpolation circuit which receives analysis data of a new frame as an input from among the analysis data sequentially obtained for each frame by Percoll analysis and performs interpolation between the analysis data and the other input; Provided on the input side of the analysis data interpolation circuit,
Input data switching selection control is performed by a switching signal generated at the time of switching between voices of different quality due to Percoll analysis. Normally, the analysis data input of the old frame one frame before the new frame is selected and switched. An input switching selection circuit that selects the analysis data input of the new frame and leads it as the other input of the interpolation circuit when a change signal is generated. 2. The input switching selection circuit switches two gates made of insulated gate field effect transistors and controls on/off depending on the signal level to select the analysis data of the old frame or the new frame. A circuit for inhibiting interpolation of Percoll analysis data according to claim 1.