JPH01321790A - Dynamic level deciding circuit - Google Patents

Abstract

PURPOSE:To accurately decide a dynamic level even when a noise, etc., mix in a picture signal by obtaining the difference in the picture signal with a frame memory and a subtracter, converting the absolute value of the difference into the gradation of a numeric level, and making the output into a movement deciding signal. CONSTITUTION:The picture signal inputted to an input terminal 1 is delayed for one frame by a frame memory 2, and the difference between the signal at a current point and the signal delayed for one frame is obtained by a subtracter 3. While the difference becomes zero when a picture is under a static state, the difference becomes an existing value when the picture is under a dynamic state. Further, the dynamic quantity of the picture is determined by obtaining the absolute value of difference amplitude by an absolute value circuit 4. A maximum circuit 7 makes the maximum level of each input signal into the dynamic quantity of a signal d0 at the current point and makes the dynamic quantity into a dynamic level signal from an output terminal 9. Consequently, the influence of the noise can be reduced by outputting the maximum level of each level of a near picture element even when a spike-shaped noise mixes in the picture signal.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a motion level determination circuit for detecting the amount of motion used in a motion detection circuit for one image or the like.

(Prior Art) In recent years, as television receivers have become larger, many techniques for improving image quality have been introduced. The scan conversion circuit converts the interlaced incoming frame into a non-interlaced signal to improve the image quality, but the interpolation signal for converting to the non-interlaced signal is generated by motion adaptive processing that accompanies the movement of the image signal. . This motion adaptive processing suppresses double image interference caused by non-interlaced conversion and achieves high image quality.

However, if a malfunction occurs in the motion amount level signal that controls motion adaptive processing, that is, if a still image is determined to be a moving image and a moving image is determined to be a still image, the desired image quality improvement cannot be obtained.

FIG. 4 shows two embodiments of the configuration of a conventional motion level determination circuit. In FIG. 4, 1 is an input terminal for inputting an image signal, 2 is a frame memory, 3 is a subtracter, 4 is an absolute value circuit, 8 is a level conversion circuit, and 9 is an output terminal for outputting a motion level signal.

Next, the operation of the above conventional example will be described. In FIG. 4(a), the image signal input to the input terminal 1 is delayed by one frame by the frame memory 2, and the difference between the current signal and the signal delayed by one frame is calculated by the subtracter 3. If the six images are stationary, this difference is zero, and if the images are moving, the difference has a value. Further, the absolute value of the differential amplitude is determined by the absolute value circuit 4 to obtain the amount of image movement, and a motion level signal is obtained from the output terminal 9.

In the case of FIG. 4(b), the absolute value circuit 4 calculates the absolute value of the differential amplitude is the same as the case of FIG. 8 and converts the output level of the absolute value circuit 4 into several gradation levels. In other words, the level conversion circuit 8 operates to convert a moving image and a still image in the case of two-level conversion, and a moving image, a still image, and an intermediate level between the moving image and still image in the case of three-level conversion, and outputs the motion level from the output terminal 9. I'm getting a signal.

(Problems to be Solved by the Invention) However, in the configuration of the conventional motion level determination circuit described above, the configuration shown in FIG. ), if the input image signal contains spike-like noise components, the desired characteristics cannot be obtained because the image is determined to be a moving image due to the noise components even though it is a still image.

The present invention solves these conventional problems,
It is an object of the present invention to provide a motion level determination circuit that determines a motion level without malfunction even when an input signal contains noise, spike noise components, etc.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides a frame memory that inputs an image signal, delays the image signal by one frame, and calculates the difference between the output of the image signal and the frame memory. A subtracter that outputs, an absolute value circuit that outputs the absolute value of the output of the subtracter, and the output of the absolute value circuit is input directly or through a core circuit that removes low-level signals and converted to several levels of gradation. A device comprising a level conversion circuit, a delay memory group that delays the output of the level conversion circuit, and a maximum number circuit that inputs the outputs of each delay memory forming the delay memory group and outputs the maximum number of input levels. It is.

(Function) With the above configuration, the present invention calculates a difference between image signals using a frame memory and a subtracter.

The absolute value is level-converted directly, or the low-level signal is removed and then converted to several levels of gradation, and the output is converted to a maximum number of levels of the amount of image movement at the center pixel and in the vicinity of the center pixel using a delay memory group. Since the motion determination signal is used as a motion determination signal, the motion level can be determined correctly even when noise, spike-like noise, etc. are mixed into the image signal.

(Embodiment) FIG. 1(a) shows the configuration of a motion level determination circuit in a first embodiment of the present invention. In FIG. 1(a), 1 is an input terminal for an image signal, 2 is a frame memory, 3 is a subtracter, 4 is an absolute value circuit, 5 is a core circuit for removing low level components, 6 is a level conversion circuit, 7 81.82 is a delay memory that delays one pixel period, 83.84 is a delay memory that delays one horizontal period, and 9 is an output terminal. FIG. 2 shows the positional relationship of pixels on the screen that are input to the maximum number circuit 7, and FIG. 3 shows an example of the input/output characteristics of the core circuit 5.

Next, regarding the operation of the first embodiment, FIG. 1(a),
The operation will be explained with reference to FIGS. 2 and 3. Figure 1 (
In a), the image signal input to the input terminal 1 is delayed by one frame by the frame memory 2, and the subtracter 3 calculates the difference between the current signal and the signal delayed by one frame. If the image is stationary, this difference will be zero, and if the image is moving, the difference will have a value. Further, the absolute value of the differential amplitude is taken by the absolute value circuit 4 to obtain the amount of image movement. The output of the absolute value circuit 4 is input to the core circuit 5. The core circuit 5 has the input/output characteristics shown in FIG. 3, for example, and removes low level components of the input to produce an output signal. That is, the core circuit 5 removes minute noise components included in the absolute value circuit 4. The output level of the core circuit 5 is converted by a level conversion circuit 6 into several gradation levels. The output of the level conversion circuit 6 is the delay memory 83, 81, 82, 8 of the delay memory group.
4, and the outputs of each delay memory 81 to 84 are input to the maximum number circuit 7. The positional relationship of the pixels of the maximum number circuit 7 is as shown in FIG.
-H, the signal d from one pixel period before, and the signal d-1 after one pixel period are input to the maximum number circuit 7. Maximum number of circuits 7
are respectively the maximum majority level of the input signal and the current signal d
A motion level signal is obtained from the output terminal 9 as a motion amount of 0.

For example, assume that the level conversion circuit 6 has two conversion levels: a moving image and a still image, and the respective motion levels in FIG. 2 are as follows.

In the case of d, = moving image, d1 = moving image, d-1 = moving image, d) I = still image, d-11 = still image, the maximum number circuit 7 is 3 for moving image vs. still image; Since the number is large, it is determined that it is a moving image, and a motion level signal corresponding to a moving image is output.

In general, when focusing on one pixel of an image, image signals have a strong correlation with neighboring pixels.1 For example, even when spike-like noise is mixed, by outputting the maximum level of each level of neighboring pixels, The influence of noise can be reduced.

Further, in the above embodiment, the characteristics of the core circuit 5 are shown in FIG. 3, but this is just an example to make the explanation easier to understand, and any characteristics that remove low-level components of the signal may be used. Furthermore, the pixel range for determining the maximum number of pixels is set to 5 pixels as shown in Figure 2, but this is just one example; various patterns are possible depending on the configuration of the delay memory group, and any number of pixels can be used as long as the pixels are nearby. You can also use it as

FIG. 1(b) shows the configuration of a motion level determination circuit in a second embodiment of the present invention. In FIG. 1(b), 1 to 4 and 7 and 9 correspond to the same numbers in FIG. 1(a), respectively. Reference numerals 51 and 52 are delay memories that delay by one pixel period, and 61 and 62 are delay memories that delay by one horizontal period.The delay memories 51, 52, and 61,62 constitute a delay memory group. 8 is a level conversion circuit.

Next, the operation of the second embodiment will be described with reference to FIG. 1(b) and FIG. 2. In FIG. 1(b), the process up to the point where the absolute value of the differential amplitude of the input image signal is determined by the absolute value circuit 4 is the same as in the first embodiment.

The output of the absolute value circuit 4 is converted into several gradation levels by the level conversion circuit 8, and the output of the level conversion circuit 8 is output to delay memories 61, 51, 52, 62, and the output of each delay memory is converted to the maximum number of circuits. 7. That is, the current signal d as shown in FIG. The signal di from one horizontal period before (and the signal d-H after one horizontal period), the signal d1 from one pixel period before, and the signal d-1 after one pixel period are input to the circuit 7 in the largest number. The maximum number circuit 7 outputs the maximum number level of each input signal as the amount of movement of the current signal d0 from the output terminal 9.For example, if the conversion level of the level conversion circuit 8 is two levels, a moving image and a still image, The respective motion levels in Fig. 2 are: d, = video, d1 = (video), d-1 = video, dll =
In the case of a still image, d-H=still image, the maximum number circuit 7 determines that the image is a moving image and outputs a motion level signal corresponding to a moving image since the number of levels of the moving image is greater than the ratio of moving image to still image of 3:2.

This makes it possible to reduce the influence of noise as in the first embodiment.

In the case of the second embodiment, the pixel range for determining the maximum number of pixels is 5 pixels, but as in the case of the first embodiment, various patterns are possible depending on the configuration of the delay memory group. Any number of pixels may be used as long as the number of pixels is .

(Effects of the Invention) As is clear from the above embodiments, the present invention uses the delay memory group to use the maximum level of the amount of motion of the center pixel and pixels in the vicinity of the center pixel as a motion level determination signal. Even when the motion level is mixed into the signal, it has the excellent effect of being able to accurately determine the motion level.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a motion level determination circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing the positional relationship of pixels in an embodiment of the present invention, and FIG. 3 is a core circuit of an embodiment of the present invention. FIG. 4 is a block diagram of a conventional motion level determination circuit. 1...Input terminal, 2...Frame memory,
3...Subtractor, 4...Absolute value circuit, 5...
・Core circuit, 6, 8 ... Level conversion circuit, 7
...Maximum number of circuits, 9 ...Output terminal, 51.52
．． 81.82...Delay memory (1 pixel period), 6
1.62.83.84...Delay memory (1 horizontal period)
. Patent applicant: Matsushita Electric Industrial Co., Ltd.

Claims (1)

[Claims] a frame memory that inputs an image signal and delays the image signal by one frame; a subtracter that outputs the difference between the output of the image signal and the frame memory; and an absolute value that outputs the absolute value of the output of the subtracter. a level conversion circuit that inputs the output of the absolute value circuit directly or through a core circuit that removes a low level signal and converts it into several levels of gradation, and a delay memory group that delays the output of the level conversion circuit; 1. A motion level determination circuit comprising: a maximum number circuit that inputs the output of each delay memory constituting a delay memory group and outputs the maximum number of input levels.