JPH01318416A - Semiconductor amplifying circuit - Google Patents

Abstract

PURPOSE:To reduce the fluctuation of the input/output impedance of an amplifier having the multi-stage connection between the semiconductor amplifying circuits by securing such a circuit constitution where the bias current of the semiconductor element of the amplifying circuit of at least some of those stages is individually controlled. CONSTITUTION:The controllers of the current switching transistors TR9 and TR12 are joined to the emitters of a 1st-stage TR17 and a next-stage TR18 respectively. Then the variable DC voltage sources 10 and 13 are connected to the bases of both TR9 and TR12 via the earth. The electromotive force of both sources 10 and 13 are set at zero when no transmission is performed and then increased when the transmission is carried out. Thus the TR9 and the TR12 are turned on and the bias currents of both TR17 and TR18 are increased. As a result, the overall input/output impedance of an amplifier can be set at a level close to the value obtained before the increase of the bias current as long as the increased rates of both TR17 and TR18 are previously controlled.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor amplifier circuit, particularly a high frequency multi-stage amplifier for a radio device that performs simultaneous transmission and reception, and is a semiconductor amplifier circuit suitable for reducing power consumption of a radio device. Regarding.

[Conventional technology]

In conventional portable mobile telephones and the like, according to instructions from the base station, the transmission power of the terminal is decreased when the (mobile telephone wireless terminal) is close to the base station, and increased when it is far away. Furthermore, when not talking, the transmission power was set to zero. The purpose of doing the above is to reduce the power consumption of the terminal, but when a large transmission power is output from the terminal, the problem arises that the amplifier in the receiving section is distorted due to the transmitted waves going around the receiving section. . To solve this problem, a conventional circuit system has been adopted in which the bias voltage of the amplifier is increased in synchronization with the transmission output to improve the distortion characteristics of the amplifier.

In addition, in high frequency circuits such as wireless terminals,
2. Description of the Related Art Circuits are generally used that increase the gain of an amplifier as necessary when necessary, and reduce the gain of the amplifier when unnecessary, that is, perform gain control to reduce power consumption of the amplifier.

[Problem to be solved by the invention]

However, in amplifier circuits using semiconductors, the output impedance changes significantly depending on the increase or decrease in current consumption, that is, bias current. Little consideration has been given to input/output impedance mismatch caused by input/output impedance changes.

An object of the present invention is to provide a gain control amplifier circuit used in a semiconductor amplifier circuit that increases bias current during transmission of a radio device or a high frequency circuit such as a radio device. The purpose is to minimize changes in input and output impedance of the circuit.

[Means to solve the problem]

The above object is achieved by providing an amplifier circuit in which semiconductor amplifier circuits are connected in multiple stages, with a circuit configuration in which bias currents of semiconductor elements of at least some stages of the amplifier circuits are individually controlled.

[Effect]

In a multi-stage amplifier, when the bias current of the transistor in each stage of the amplifier is increased, the distortion characteristics of the transistor in each stage of the amplifier are improved and the input/output impedance changes. In a multistage amplifier, the output impedance of one stage becomes the input impedance of the next stage, and the impedance of the previous stage becomes the signal line impedance of the next stage. - Generally, the input impedance of an amplifier changes depending on the impedance of the load connected to the output terminal.

Further, the output impedance is changed depending on the impedance of the signal source connected to the input terminal. Therefore, in a multi-stage amplifier, the input/output impedance of the entire multi-stage amplifier can be controlled by changing the increase ratio of the bias current of the transistor in each stage of the amplifier. For this reason, the increase in the bias current of the transistors in the amplifiers in each stage is done so that the input/output impedance when the bias current of the transistors in the amplifiers in each stage increases becomes close to the input/output impedance when the above current is not increased. By determining the ratio in advance, variations in the input and output impedance of the amplifier can be made extremely small.

〔Example〕

Before explaining this embodiment of the present invention, FIG. 3 shows the configuration of a mobile radio terminal that uses an amplifier circuit according to the present invention and performs simultaneous transmission and reception. In a wireless terminal that transmits and receives calls at the same time, a portion of the transmitting power goes around to the receiving system, which may cause deterioration in the performance of the receiving system. The main cause is that a part of the high transmission power goes around to the receiving low-noise amplifier, suppressing the gain of that amplifier and lowering the noise figure. Generally, in order to prevent deterioration due to such feedback, a sufficiently large current is caused to flow through the receiving low-noise amplifier so that its gain is not suppressed and the noise figure is not lowered. In order to reduce the power consumption of a wireless terminal, the present invention increases the bias current of a receiving low-noise amplifier in synchronization with changes in transmission power, that is, only when there is a risk that transmission power will largely go around to the receiving section. , relates to semiconductor amplifiers used in wireless terminals.

In FIG. 3, the radio section of the terminal has a transmitting system and a transmitting oscillator 36. Power amplifier 35. Transmission output monitor coupler 34.
Isolator 33. The antenna 21 is shared by the receiving system (including the power control circuit 17, etc.) and the receiving system (including the receiving low-noise amplifier 24, the receiving post-stage filter 25, the receiving first-stage mixer 26, the intermediate frequency circuit 27, etc.) via the duplexer 22, 23. Both systems are connected to the baseband section 40. In the transmission system, a part of the transmission power is taken out for monitoring by a coupler 34, this monitor power is detected, and a power amplifier 35 is controlled so that the detected voltage becomes a predetermined value. The control circuit 38 controls the transmission power and also controls the receiving system amplifier 24 . Mixa 26
The output level of the local oscillator 32 is also controlled via control circuits 28, 29 and 31, respectively.

An embodiment of the present invention will be explained with reference to FIG. FIG. 1 is a circuit diagram of an embodiment of a semiconductor amplifier circuit for a two-stage wireless terminal according to the present invention. The first stage transistor 17 is biased with bias resistors 1a and lb, its collector is connected to the power supply 14 through a collector resistor 2, and its emitter is connected to a resistor 3. A bypass capacitor 8 provides a grounded emitter or circuit configuration.

The next stage transistor 18 includes bias resistors 4a and 4b.
biased, the collector is connected to a power supply 14 through a collector resistor 5, and a resistor 6. A bypass capacitor 11 provides a common emitter circuit configuration. The collector of the initial transistor 17 is coupled to the base of the next-stage transistor 18 via the coupling capacitor 7, and for the entire amplifier, the base of the first-stage transistor becomes the input terminal, and the collector of the next-stage transistor becomes the output terminal. . The emitter of the first stage transistor 17 is connected to the collector of a current switching transistor 9 whose emitter is grounded, and the base of the current switching transistor 9 is connected to a variable DC voltage source 10.
is connected to ground. The collector of the current switching transistor 12 whose emitter is grounded is connected to the emitter of the next stage transistor 18, and the variable DC voltage source 13 is connected to the base of the current switching transistor 12 between the ground and the base of the current switching transistor 12. . When not transmitting, the electromotive force of variable DC voltage sources 10 and 13 is set to zero, and when transmitting, the electromotive force of variable DC voltage sources 10 and 13 is increased. When the electromotive force of the variable DC voltage source 10.13 increases, the current switching transistor is turned on, and the bias currents of the first stage transistor 17 and the next stage transistor 18 increase. By increasing the bias current and adjusting the rate of increase in the first stage transistor 17 and the next stage transistor 18 in advance, it is possible to bring the input/output impedance of the entire amplifier close to the state before increasing the bias current. be.

FIG. 2 is a circuit diagram of another embodiment of a two-stage semiconductor amplifier circuit for a wireless terminal, which is vertically stacked in a direct current manner, according to the present invention. The difference from the embodiment shown in FIG. 1 is that the collector of the first-stage transistor 17 is coupled to the emitter of the next-stage transistor 8 via a DC coupling resistor 19, and connected to the power supply 14 via the next-stage transistor 18. and that the emitter of the next-stage transistor 18 is not directly grounded to earth via a resistor, but a stabilizing resistor 20 is connected between the emitter and the collector of the current switching transistor 12.

In the embodiment shown in Fig. 2, since a current approximately equivalent to the current consumed by the entire amplifier is supplied to each transistor, the effect of improving distortion characteristics by increasing the bias current of the transistor is large. Since more current is supplied by the transistor 12 to the next-stage transistor 18 into which the signal is input, there is an effect that the efficiency of current distribution to be consumed by the transistor is improved.

FIG. 4 and FIG. 5 specifically illustrate the effects of the present invention.

FIG. 4 is a circuit diagram when the input and output impedances of the circuit of FIG. 2 are matched to the signal source and load impedances, respectively. In this example, the cutting edge is connected to the alignment inductor 41.
Simply by grounding, the required input/output impedance matching is achieved. Note that the same parts as in FIG. 2 are given the same symbols and explanations will be omitted. FIG. 5 shows the frequency characteristics of reflection coefficients Ssx and Sxx, which indicate the degree of matching of input and output impedances, for the circuit shown in FIG. 4.

The smaller the reflection coefficient, the better the impedance matching. The solid line in Figure 5 is before increasing the bias current (
The characteristics of the total bias current (3 mA), - The dashed line is the characteristic when the bias current of the transistor in the amplifier in each stage is increased by the same amount (total bias current 12 mA), The dashed line is the characteristic of the transistor in the amplifier in each stage The characteristics are shown when the bias current is changed at a certain ratio (total bias current 12 mA). The standard of consistency status is S1t,
Both S22 are 0.2 or less, but when the bias current is increased by the same amount, there is no frequency band that shows good matching with the crowd. However, there is a frequency band of 850 MHz or higher in which the bias current is increased at a certain rate and exhibits good matching with both the increase and the number of people. In this example, the frequency band is 850 M
Current switching at Hz -890MHz (3mA
The low-noise amplifier operates in a well-matched input/output state even when the input voltage is increased from 12 mA to 12 mA. In other words, it is shown that by increasing the bias current of the transistors of the amplifiers in each stage by a certain ratio, it is possible to suppress fluctuations in the input/output matching state when the bias current is quadrupled.

FIG. 6 and FIG. 7 are in FIG. 1 and FIG. 2, respectively.
The bias current could be switched using a variable DC voltage source, but 1
Switch voltage divider resistor 42 for switching the voltage of two variable DC voltage sources
This figure shows a configuration diagram of a circuit that uses a, b, c, and d to obtain a desired value.

According to this embodiment, the bias current of the transistor in each stage of the multistage amplifier can be switched to a desired value using one variable DC voltage source.

〔Effect of the invention〕

According to the present invention, in a multi-stage amplifier that increases the bias current during transmission of a radio device, it is possible to suppress fluctuations in the input/output impedance of the amplifier when the bias current increases. This solves the problem of impedance mismatch that occurs between high-frequency circuits and high-frequency circuits.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a semiconductor amplifier for a two-stage wireless terminal according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a vertically stacked semiconductor amplifier for a two-stage wireless terminal according to another embodiment of the present invention. FIG. 3 is a configuration diagram of an example of a low power consumption wireless terminal that can transmit and receive calls at the same time, and FIG. 4 is a diagram of another embodiment of the present invention for a vertically stacked two-stage wireless terminal equipped with a matching inductor at the input. FIG. 5 is an input/output characteristic diagram of the circuit shown in FIG. 4, and FIGS. 6 and 7 are circuit diagrams of other embodiments of the semiconductor amplifier circuit according to the present invention. 1.4...Bias resistance, 2,5...Collector resistance, 3.6...Emitter resistance, 7...Coupling capacitor,
8゜11...Bypass capacitor, 9,12...Current switching transistor, 10.13...Variable DC voltage source, 1
4... Power supply, 15... Amplifier input, 16... Amplifier output, 17... First stage transistor, 18... Next stage transistor, 19... DC coupling resistor, 20... Stabilizing resistor , 21... antenna, 22... duplexer reception filter, 23... duplexer transmission filter, 24...
Reception low noise amplifier, 25...reception post-stage filter, 26
... Reception first stage mixer, 27... Intermediate frequency circuit, demodulator, 28... Low noise amplifier control circuit, 29... First stage mixer control circuit, 30... Local oscillator buffer amplifier,
31: Local oscillator output control circuit, 32: Local oscillator, 33: Isolator, 34: Transmission output monitor coupler, 35: Power amplifier, 36: Transmission oscillator, 3
7. Power control circuit, 38... Control circuit, 39. Synthesizer/modulator, 40... Baseband section, 41.
... Matching inductor, 42... Selector switch voltage division resistor.

Claims (1)

[Claims] 1. In a multi-stage amplifier with variable bias current, the bias current of at least some of the amplifier stages of the multi-stage amplifier is individually controlled to respond to bias current changes in the input/output impedance of the multi-stage amplifier. 1. A semiconductor amplifier circuit, comprising a circuit for suppressing fluctuations caused by 2. The semiconductor amplifier circuit according to claim 1, wherein the multi-stage amplifier circuit is a low-noise amplifier for a receiver input of a wireless device that simultaneously transmits and receives calls, and the bias current of some of the amplifier stages is transmitted. A semiconductor amplifier circuit comprising a circuit that performs individual control in synchronization with power control. 3. In the semiconductor amplifier circuit according to claim 3, the means for varying the bias current of the transistors in each stage of the multi-stage amplifier includes adding at least one of a voltage-controlled current source or a current-controlled current source to the amplifier. 1. A semiconductor amplifier circuit comprising: 4. The semiconductor amplifier circuit according to claim 2 or 4, wherein the semiconductor amplifier circuit increases the bias current of the amplifier when the radio transmits, and reduces the current when the radio device stops transmitting. Amplification circuit. 5. The semiconductor amplifier circuit according to claim 4, wherein when the radio transmits, the bias current of the amplifier is increased or decreased approximately in proportion to the transmission output. 6. The semiconductor amplifier circuit according to claim 2, 3, 4, or 5, wherein the multistage amplifier is grouped for each stage or for each stage, and the grouped amplifiers are
a first power supply having a voltage of
DC current is stacked in multiple stages in a hierarchical structure between a second power supply having a voltage of A semiconductor amplifier circuit characterized by: 7. The semiconductor amplifier circuit according to claim 7, wherein either the first voltage or the second voltage is set to a ground potential.