JPH01303756A - Drive circuit for element equipped with capacitive impedance - Google Patents

Abstract

PURPOSE:To reduce power consumption by a method wherein series circuits of inductance elements and switching circuits are arranged between the driving terminals of an element for applying driving signals. CONSTITUTION:In series with inductance elements 41 and 42 arranged between the charge-coupled element driving terminals or between a driving terminal and a semiconductor substrate, switching circuits 51 and 52 are further inserted, and the switches 51 and 52 are kept in the OFF state during the period wherein the driving is suspended. That is to say, there is no DC current through the inductance elements 41 and 42 in the drive circuit when the driving is suspended because the switches are in the OFF state then. Accordingly, the voltage source downtime voltage as is may be applied to the driving terminals. This design keeps power consumption low.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for driving an element having capacitive impedance such as a charge transfer element, and is particularly aimed at reducing power consumption.

[Conventional technology]

BACKGROUND ART Charge transfer devices (hereinafter referred to as CCDs), which have many features such as small size, light weight, low power consumption, and high reliability, have been rapidly developing in recent years with the development of process technology. In particular, solid-state image sensors using CCDs tend to have more pixels in order to improve resolution. For this reason, the horizontal register of this CCD solid-state image sensor inevitably has a large number of transfer stages, and requires higher-speed driving.

By the way, as shown in the cross-sectional view in Figure 3 (an example of a two-phase drive type), a CCD consists of a group of electrodes arranged on a semi-salt substrate with an insulating film interposed therebetween, and its impedance is as shown in Figure 4. can be approximated by capacitance. Therefore, the COD drive terminal φ1. When a signal is applied to φ2, power is consumed due to charging and discharging charges to this capacitor. When driving the CCU at high speed.

Power consumption due to charging and discharging will further increase.

In order to solve this problem, for example, as shown in Fig. 5, a CCD
A method has been considered to reduce power consumption by arranging an inductance between the drive terminal and the board (earth) and making the resonance point of the inductance and drive terminal capacitance equal to the transfer frequency (Japanese Patent Application Laid-Open No. 56 -Refer to Publication No. 80893)
.

[Problem to be solved by the invention]

However, when a CCD of a solid-state image sensor has to have a period in which driving is periodically stopped (FIG. 6, 4), in this drive circuit, the driving terminal φ1. The voltage of φ2 becomes an average voltage determined by the voltage source 21, 22 through the inductance, and the driving waveform as shown in FIG. 6 cannot be obtained.

[Means to solve the problem]

The COD drive circuit according to the present invention is connected between the CCD drive terminals or between the drive terminals and the semiconductor substrate (usually grounded).
A switch circuit is further inserted in series with the inductance disposed between the two, so that the switch is kept in the off state during the drive pause period, or a capacitance is inserted in place of the switch circuit.

[Effect]

In the present invention, because of the switch that is turned off during the drive pause period or the inserted capacitance, no direct current flows through the inductance even during the drive pause period.
The resting voltage waveform shown in FIG. 6 can be maintained while maintaining low power consumption.

〔Example〕

A first embodiment of the invention is shown in FIG. The circuit of FIG. 1 has a pulse φ11.4 in series with the inductance 41.42 of the conventional circuit of FIG. Switch circuit 51 operating at φ12.
52 and drive terminal φ1. The difference is that φ2 is directly driven by a voltage source 61°62.

The drive signals generated by the voltage sources 61, 62 are directly connected to the terminals φ1.
φ2 to generate the voltages shown in FIGS. 2(a) and (b).

At this time, if the resonance point of the resonant circuit consisting of the CCD input capacitance and inductance 41 (42) viewed from terminal φ1 (φ2) is adjusted to the driving frequency, power consumption in normal driving conditions can be reduced. It can be suppressed.

On the other hand, during the pause period 4 in FIGS. 2(a) and 2(b), the switch pulse φ11. Since the switches 51 and 52 are turned off by φ21 (FIGS. 2(Q) and (d)), no DC current flows through the inductance during this time, so power consumption can be kept low. Also, the terminal φ1
．． The resting voltage of the voltage sources 61 and 62 can be directly applied to φ2.

The capacitance sources 81 and 82 are inserted to prevent direct current from flowing through the inductance even in normal driving conditions, and when the circuit is started, the average voltage value of the voltage sources 61 and 62 during the normal driving condition is It is desirable to set this initially.

FIG. 7 shows a second embodiment of the present invention, which differs from the first embodiment in that a resonance inductance 43 and a switch 53 are inserted between terminals φ1 and φ2.

In the circuit of FIG. 7 as well, the drive signals generated by the voltage sources 61 and 62 are directly transmitted to the terminals φ1. Figure 8(a) joins φ2,
Generate the voltage shown in (b). At this time, two terminals φ1. By adjusting so that the resonance point of the resonant circuit consisting of the input capacitance of the CCD and the inductance 43 as seen from φ2 corresponds to the driving frequency, power consumption in the normal driving state can be kept low.

On the other hand, during the pause period 4 in FIGS. 8(a) and 8(b), the switch 53 is in the OFF state (the eighth
(C)), no direct current flows through the inductance during this time, and power consumption can be kept low.

Also, the terminal φ1. The resting voltage of the voltage sources 61 and 62 can be directly applied to φ2.

FIG. 9 shows a third embodiment of the present invention, which differs from the first embodiment in that the switches 51 and 52 are replaced with capacitors 71 and 72.

In this circuit, the capacitance is 71 (72) and the inductance is 41.
Since the impedance between both ends of this series circuit decreases at the resonance point (42), there is a drawback that power consumption increases if the drive signal includes this resonance point frequency component. However, this resonance frequency component is set so that it is not included in the signal of the voltage source 61 (62), that is, the resonance point frequency of the capacitor 71 (72) and inductance 41 (42) is set to about half of the normal drive frequency, and when the Frequency excluding integer multiples of frequency (approximately n
This power consumption can be suppressed by setting the power consumption to +1/2 times (preferably). Another feature of this circuit is that it does not have a switch circuit and is easy to drive.

In this circuit as well, the capacitance of terminal φ1 (φ2), the inserted capacitance jt71 (72), and the inductance 41 (42)
By setting the resonance point near the drive frequency, power consumption in normal drive conditions can be kept low. In addition, the inserted capacitor prevents direct current from flowing through the inductance even during the idle period, and the terminal φ1
．． The resting voltage of the voltage sources 61 and 62 can be directly applied to φ2.

[Effects of the Invention] As described above, in the CCD drive circuit according to the present invention, the switch is turned off during the drive pause period, or a capacitance is inserted, so that no direct current flows through the inductance. The resting voltage of the voltage source can be directly applied to the drive terminal.

Although the driving signal for the CCD in the above embodiments may be a waveform signal such as a rectangular wave, it is preferable to drive the CCD with a sine wave from the viewpoint of power consumption. Furthermore, although the above embodiments have been shown only in the case of two-phase drive, it is clear that the same holds true in the case of three-phase drive or more.

[Brief explanation of the drawing]

1 and 2 respectively show a first embodiment of the present invention and its explanatory diagram, FIGS. 3 to 6 respectively show a conventional charge transfer element drive circuit and its explanatory diagram, and FIG. FIG. 8 is a diagram showing a second embodiment according to the present invention and an explanatory diagram thereof, and FIG. 9 is a diagram showing a third embodiment according to the present invention. 1... Semiconductor substrate, 2, 3... Insulating film and electrode, 41
-43... Resonance inductance, 51-53...
switch circuit.

Claims (1)

[Claims] 1. In a drive circuit that drives an element with capacitive impedance with a plurality of signals having a rest period, an inductance and a switch circuit are provided between drive terminals to which drive signals of the element are applied. A drive circuit for an element having capacitive impedance, characterized by comprising a series circuit. 2. In a drive circuit that drives an element with capacitive impedance with multiple signals having a rest period, an inductance, a switch circuit, and a capacitance are placed between the drive terminal that applies the drive signal of the element and the substrate of the element. A drive circuit for an element having capacitive impedance, characterized by comprising a series circuit consisting of. 3. The drive circuit according to claim 1 or 2, wherein the drive circuit has a capacitive impedance, characterized in that the switch circuit in the series circuit is driven so as to be kept in an off state during a rest period of the drive signal. Element drive circuit. 4. In the drive circuit according to claim 1 or 2, the resonant frequency of the resonant circuit consisting of the capacitance and inductance between the drive terminals to which the drive signal is applied or between the drive terminal and the substrate is set near the drive frequency. A driving circuit for an element having capacitive impedance. 5. The drive circuit for an element having capacitive impedance according to claim 2, wherein the voltage of the DC voltage source is set to an average voltage value during a period in which the drive signal is not inactive. 6. A drive circuit that drives an element with capacitive impedance with a plurality of signals having a rest period, including a series circuit consisting of an inductance and a capacitance between the drive terminal of the element and the substrate of the element. A drive circuit characterized by: 7. In the drive circuit according to claim 6, the resonance point of the resonant circuit consisting of the capacitance of the drive terminal, the inserted capacitance, and the inserted inductance is set near the drive frequency, and the inserted capacitance and the inserted inductance, the resonant frequency of the resonant circuit is set to approximately half the normal driving frequency and approximately n+1/2 times the frequency at which rest periods are repeated. circuit.