JPH01302971A - Child screen frame signal generation circuit - Google Patents

Abstract

PURPOSE:To reduce the number of switches, and to obtain a child screen frame signal generation circuit free from secular change by making the child screen frame signal generation circuit into constitution in which a frame display timing signal is inserted into a child picture signal by a gate circuit, and afterward, a gate circuit output is converted into an analog signal. CONSTITUTION:The respective bits of the child picture signal 1 are supplied to the input terminals of one side of the AND gates 11-13 of the gate circuit 10, and the frame display timing signal 8 is supplied to the input terminals of other side. When the frame display timing signal 8 is 'L' or 'H', a frame signal or the child picture signal is outputted respectively. These outputs are supplied to a switch 3 through a D/A converter 2. The switch 3 receives a parent picture signal by a terminal 31, and receives a parent/child picture switch signal by the terminal 33, and selects one of the parent picture signal and a D/A converter output, and outputs it from the terminal 9. Since the frame display timing signal is inserted into the child picture signal by the gate circuit, one analog switch circuit can be abbreviated, and further, since the signal is processed digitally, the secular change is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a sub-screen frame signal generation circuit 2 that adds a frame signal to emphasize the boundary portion when a digital video signal is superimposed on an analog video signal. It is related to.

2. Description of the Related Art In recent years, as the capacity of semiconductor memory elements has increased, techniques for displaying a plurality of video signals on the same display device have been widely used and are becoming important.

FIG. 2 shows a conventional small screen frame signal generation circuit.

In FIG. 2, the input terminal 1 to which the small screen signal is applied is connected to the input terminal of the D-A conversion circuit 2, and the switch 3 has the following:
The output of the D-A conversion circuit 2 is sent to the small screen signal input terminal 31,
The input terminal 4 to which the parent screen signal is applied is connected to the parent image signal input terminal 32, and the input terminal 5 to which the parent and child screen switching signal is applied is connected to the control input terminal 33.
The output of the switch 3 is connected to the parent-child screen signal input terminal 61, the input terminal 7 to which the frame signal is applied is connected to the frame signal input terminal 62, and the input terminal 8 to which the frame display timing signal is applied is connected to the control input terminal 63. Then, the output terminal of the switch 6 is connected to the output terminal 9.

The operation of the above configuration will be explained below.

The small screen signal of the digital signal 3 inputted to the input terminal 1 without being switched is converted into an analog signal by the DA conversion circuit 2. The child screen signal converted to an analog signal is input to the switch 3 together with the main screen signal of the analog signal inputted from the input terminal 4, and the parent and child screen switching signal power inputted from the input terminal 5 is set to either high level or low level. The operator selects and outputs one of the other two human input signals input to the switch 3. The output of the switch 3, which temporally switches between the main screen signal and the child screen signal, is input to the switch 6 together with the frame signal input from the input terminal +7, and the frame display timing signal input from the input terminal 8 is at a high level. Which of the other two human input signals input to the switch 6 is selected and output is switched depending on whether the signal is at low level or low level.

The output signal of the switch 6 is outputted from the output terminal 9 as a framed two-sided signal.

Problems to be Solved by the Invention However, with the conventional configuration described above, two switches are required, which increases the price.Furthermore, since the frame signal applied to the switch 6 is set as an analog signal, it tends to deteriorate over time. It had

The present invention solves the above-mentioned conventional problems, and aims to provide a small screen frame signal generation circuit that reduces the number of switches and eliminates deterioration over time.

Means for Solving the Problem In order to achieve this object, the sub-screen frame signal generation circuit of the present invention inserts a frame display timing signal into the sub-screen signal using a gate circuit, and then converts the output of the gate circuit into an analog signal. It has a configuration that

Operation: With this configuration, even when the main screen signal is an analog signal and the sub-screen signal is a digital signal, the frame display timing signal can be stably inserted using digital processing that can be highly integrated.

Embodiment Hereinafter, an embodiment of the small screen frame signal generation circuit of the present invention will be described with reference to the circuit diagram of FIG.

57\-/ In Fig. 1, the input terminal 1 to which the small screen signal is applied and the input terminal 8 to which the frame display timing signal is applied are connected to the gate circuit 10, and the output of the gate circuit 1o is connected to the D-A conversion circuit. Enter 2. The switch 3 connects the input terminal 4 to which the main screen signal is applied to the main screen signal input terminal 31, and connects D-A to the main screen signal input terminal 31.
The output of the conversion circuit 2 is connected to the child screen signal input terminal 32, and the input terminal 5 to which the parent and child screen switching signal is applied is connected to the control input terminal 33.
and connect the output terminal of the switch 3 to the output terminal 9. In this embodiment, the small screen signal is 3 bits, and the gate circuit 10 is an AND game (AND game) of 2-man power AND.
1.12.13, each bit of the small screen signal is connected to one input terminal of each AND gate 11.12.13, and the other input terminal of each AND gate 11.12.13 is connected to the Apply a frame display timing signal.

The operation of the above configuration will be explained below.

First, the small screen signal input to the input terminal 1 is gated bit by bit by each AND gate (11, 12, 13) of the gate circuit 10. Frame table 67\-7 When the display timing signal is at a low level, a frame signal is output, and when it is at a high level, a small screen signal is output. I)-A
A conversion circuit 2 converts the output of the gate circuit 10 into an analog signal. The switch 3 inputs the main screen signal, the output of the D-A conversion circuit 2, and the parent/child screen switching signal, and switches between the main screen signal and D depending on whether the parent/child screen switching signal is at a high level or a low level.
- Select one of the outputs of the A conversion circuit 2 to switch the output signal. The output signal of the switch 3 is outputted from the output terminal 9 as a framed two-sided signal.

In this embodiment, the number of bits of the video signal is 3 bits, but it does not need to be 3 bits. Further, in this embodiment, the gate circuit 10 outputs a frame signal when the frame display timing signal is at a low level, and outputs a child screen signal when it is at a high level, and the switch 3 outputs a child screen signal when the frame display timing signal is at a high level. The main screen signal is output when the signal is at low level, and the output of the D-A converter circuit is output when the signal is at low level.

7. Effects of Heno's Invention According to the present invention, by inserting a frame display timing signal into a small screen signal using a gate circuit, analog switch circuits can be eliminated one by one, and furthermore, since processing is performed digitally, An excellent sub-screen frame signal generation circuit that can achieve the effect of not changing over time can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a small screen frame generation circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram of a conventional small screen frame generation circuit. 1... Input terminal (for small screen signal), 2...
D- conversion circuit, 3... switch, 4... input terminal (for main screen signal), 5... input terminal (R sub screen switching signal), 8... Input terminal (frame display timing signal), 9...output terminal, 10...gate circuit. Name of agent: Patent attorney Toshio Nakao and one other person ＼

Claims (1)

[Claims] a gate circuit that applies a small screen signal, which is a digital video signal, and a frame display timing signal, and switches whether to output the frame signal or the small screen signal depending on the level of the frame display timing signal; and the gate circuit output. A D-A conversion circuit that converts the image into an analog signal, a main screen signal that is an analog video signal, the output of the D-A conversion circuit, and a parent-child screen switching signal are applied, and the main screen is changed depending on the level of the parent-child screen switching signal. 1. A small screen frame signal generation circuit comprising: a switch circuit for switching between outputting a signal and outputting an output of a D-A conversion circuit.