JPH01300491A - Bubble memory device driving method - Google Patents

Bubble memory device driving method

Info

Publication number
JPH01300491A
JPH01300491A JP63130355A JP13035588A JPH01300491A JP H01300491 A JPH01300491 A JP H01300491A JP 63130355 A JP63130355 A JP 63130355A JP 13035588 A JP13035588 A JP 13035588A JP H01300491 A JPH01300491 A JP H01300491A
Authority
JP
Japan
Prior art keywords
bubble memory
memory device
load
time
starting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63130355A
Other languages
Japanese (ja)
Inventor
Motohiko Fukuhara
福原 元彦
Toshimitsu Minemura
峰村 敏光
Mikio Oshiro
大城 幹夫
Yukio Iigahama
飯ケ浜 行生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63130355A priority Critical patent/JPH01300491A/en
Publication of JPH01300491A publication Critical patent/JPH01300491A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent voltage fluctuation at the time of starting a bubble memory operation from occurring by preventing the fluctuation of a load at the time of starting the bubble memory operation from occurring by supplying the load in advance on a power source before starting the bubble memory operation. CONSTITUTION:In a bubble memory device in the inside of which the driving power source of the bubble memory device 13 is provided, voltage drop at the time of starting the operation of the bubble memory device 13 can be prevented from occurring by supplying the load on the driving power source 11 transiently at the time of starting the operation of the bubble memory device 13. Therefore, the fluctuation of an output voltage is generated before starting the operation of the bubble memory device 13, and it is already stabilized when the operation of the bubble memory device is started. In such a way, it is possible to eliminate the fluctuation of the load at the time of starting the operation of the bubble memory device 13, and to prevent the voltage fluctuation at that time from occurring.

Description

【発明の詳細な説明】 〔4既  要〕 バブルメモリデバイスの動作開始時に安定な電圧を供給
するようにしたバブルメモリデバイスの駆動方法に関し
、 バブルメモリデバイスの動作開始時における負荷変動を
なくすことによりその時の電圧変動をなくすことを目的
とし、 バブルメモリデバイスの動作開始前に一時的にその駆動
電源に負荷を与えることによりバブルメモリデバイスの
動作開始時の電圧低下を防止するように構成される。
[Detailed Description of the Invention] [4 Required] A method for driving a bubble memory device that supplies a stable voltage at the start of operation of the bubble memory device, by eliminating load fluctuations at the start of operation of the bubble memory device. In order to eliminate voltage fluctuations at that time, the device is configured to temporarily apply a load to the drive power supply before the bubble memory device starts operating, thereby preventing a voltage drop when the bubble memory device starts operating.

〔産業上の利用分野〕[Industrial application field]

本発明は、バブルメモリデバイスの駆動電源をその内部
に有するバブルメモリ装置において、バブルメモリデバ
イスの動作開始時に安定な電圧を供給する方法に関する
The present invention relates to a method for supplying a stable voltage at the start of operation of a bubble memory device in a bubble memory device having a drive power source for the bubble memory device inside.

〔従来の技術〕[Conventional technology]

バブルメモリデバイスは不揮発な磁性メモリであり、外
部から磁界を印加する事により情報として用いられる泡
状の磁区が移動する事から、機械的可動部を必要とせず
、従って保守が不要であり、振動・衝撃やチリ・ホコリ
等に強いという特徴がある。
Bubble memory devices are non-volatile magnetic memories in which the bubble-like magnetic domains used as information move when an external magnetic field is applied, so they do not require mechanical moving parts, therefore do not require maintenance, and are free from vibration.・It has the characteristics of being resistant to impact, dust, etc.

通常この情報転送の為の手段として、直交する2つのコ
イルと電源を用意し、これらのコイルと電源との間にス
イッチ回路を設け、周期的に電流を流す事により発生す
る磁界を用いているが、この磁界の大きさは電源電圧の
変動に伴なって変動し、一方バプルメモリデバイスが安
定に動作する為の磁界範囲が限られているという欠点か
ら電源電圧の変動を抑える必要がある。
Normally, as a means for this information transfer, two orthogonal coils and a power source are prepared, a switch circuit is installed between these coils and the power source, and a magnetic field is generated by periodically flowing current. However, the magnitude of this magnetic field fluctuates with fluctuations in the power supply voltage, and on the other hand, the range of the magnetic field for stable operation of the bubble memory device is limited, so it is necessary to suppress fluctuations in the power supply voltage.

ところで、この電源としては、小型である事、高効率で
ある事等の利点からスイッチングレギュレータが用いら
れるが、このスイッチングレギュレータは急激な負荷変
動に対する応答性が悪いという欠点がありバブルメモリ
駆動開始時の急峻な負荷変動により、電圧低下が生じる
By the way, a switching regulator is used as this power supply because of its advantages such as small size and high efficiency, but this switching regulator has the disadvantage of poor response to sudden load changes, and when the bubble memory drive starts. Voltage drops occur due to sudden load fluctuations.

第5図は従来技術におけるバブルメモリ駆動装置を示す
もので、1はスイッチングレギュレータ、2はコイルド
ライバと呼ばれるスイッチ回路、3はバブルメモリデバ
イス、4.5は回転磁界発生の為の2つの直交コイノペ
 6はスイッチングレギュレータのスインチング部、7
は平滑部、8は制御部であり、出力電圧の変動を8が検
知し、該スインチング部6のスイッチングデユーティを
変える事により出力電圧を安定化させているが、通常こ
の8から6へのフィードハック系には時間遅れが存在し
、負荷電流が定常的である場合は問題ないが、負荷変動
があった場合は、この応答の遅れにより出力電圧が変動
する。
Fig. 5 shows a conventional bubble memory drive device, in which 1 is a switching regulator, 2 is a switch circuit called a coil driver, 3 is a bubble memory device, and 4.5 is two orthogonal coinopes for generating a rotating magnetic field. 6 is the switching part of the switching regulator, 7
8 is a smoothing section, and 8 is a control section. 8 detects fluctuations in the output voltage and stabilizes the output voltage by changing the switching duty of the switching section 6. Normally, the change from 8 to 6. There is a time delay in the feedhack system, and there is no problem when the load current is steady, but when the load fluctuates, the output voltage fluctuates due to this response delay.

従って、バブルメモリデバイスを駆動させた場合、その
負荷変動により第6図に示す様に駆動開始時に、電圧の
変動が生じる。ここで、9は電源の負荷電流でありバブ
ルメモリが非動作の場合はほぼ無負荷であり、動作時は
通常数100m八から数Aである。また10は、出力電
圧波形である。
Therefore, when the bubble memory device is driven, voltage fluctuations occur at the start of driving as shown in FIG. 6 due to load fluctuations. Here, 9 is the load current of the power supply, which is almost no load when the bubble memory is not in operation, and normally ranges from several 100m8 to several A when it is in operation. Further, 10 is an output voltage waveform.

この電圧降下を抑える為には、上記平滑回路7を大きく
しなければならないという問題点がある。
In order to suppress this voltage drop, there is a problem in that the smoothing circuit 7 must be made larger.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明はかかる問題点を解決するためになされたもので
、その目的は、バブルメモリ動作以前に電源に対し、予
め負荷を与え、バブルメモリ動作開始時の負荷変動をな
くす事により該動作開始時の電圧変動をなくす事にある
The present invention has been made to solve this problem, and its purpose is to apply a load to the power supply in advance before bubble memory operation, and to eliminate load fluctuations at the start of bubble memory operation. The purpose is to eliminate voltage fluctuations.

〔課題を解決するための手段〕[Means to solve the problem]

第1図は、本発明方法を実施するための装置の基本構成
を示すもので、11はスイッチングレギュレータ、12
はコイルドライバ、13はバブルメモリデバイス、14
は負荷回路である。
FIG. 1 shows the basic configuration of an apparatus for carrying out the method of the present invention, in which 11 is a switching regulator, 12 is a switching regulator, and 12 is a switching regulator;
is a coil driver, 13 is a bubble memory device, 14
is the load circuit.

この時の動作状態を第2図に示す。15は負荷回路に流
れる電流、16はバブルメモリ駆動による電流、17は
該多電流15と16を加えたものであり全体として電源
にかかる負荷となる。18は出力電圧変動である。
The operating state at this time is shown in FIG. 15 is a current flowing through the load circuit, 16 is a current due to bubble memory drive, and 17 is a sum of the multiple currents 15 and 16, which collectively constitutes a load on the power supply. 18 is output voltage fluctuation.

〔作 用〕[For production]

上記構成によれば、出力電圧の変動はバブルメモリ動作
以前(時点t。以前)に発生し、バブルメモリ動作開始
時は(時点t。では)既に安定している。
According to the above configuration, fluctuations in the output voltage occur before the bubble memory operation (before time t), and the output voltage is already stable at the start of the bubble memory operation (at time t).

〔実施例〕〔Example〕

第3図は、本発明方法を実施する装置の具体的構成を例
示するもので、19はスイッチングレギュレータ、20
はコイルドライバ、21はフリップフロップ、22はF
ET、23は負荷抵抗、 。
FIG. 3 illustrates a specific configuration of an apparatus for carrying out the method of the present invention, in which 19 is a switching regulator, 20 is a switching regulator;
is a coil driver, 21 is a flip-flop, 22 is F
ET, 23 is the load resistance.

24はFETのゲート保護抵抗、25はフリップフロッ
プのクリア端子であり、コイルドライバの駆動タイミン
グ信号25が接続され、26はフリップフロップのデー
タ信号でハイレベル固定、27はクロック信号であり、
ホストシスデムからのコマンドが与えられてからコマン
ド終了までの時間ロウレベルを保持し、28はフリップ
フロップのQ出力である。
24 is a gate protection resistor of the FET, 25 is a flip-flop clear terminal, to which the drive timing signal 25 of the coil driver is connected, 26 is a flip-flop data signal fixed at a high level, 27 is a clock signal,
It maintains a low level from when a command is given from the host system until the end of the command, and 28 is the Q output of the flip-flop.

また、この時の動作状態が第4図に示されており、25
.27.28については上記したフリップフロップに供
給される信号およびそのQ出力を示している。該Q出力
28がハイレベルの時のみFET 22がオンとなり、
負荷抵抗23に電流29が流れる。
Moreover, the operating state at this time is shown in FIG.
.. 27 and 28 show the signals supplied to the above flip-flops and their Q outputs. The FET 22 is turned on only when the Q output 28 is at a high level,
A current 29 flows through the load resistor 23.

28はデバイス駆動開始時にコイル駆動タイミング信号
25によってクリアされるが、その時、30に示す様に
デバイスへのコイル電流が流れる為電源(スイッチング
レギュレータ)19に対する負荷電流は、31の如くな
り、従って、出力電圧変動は、バブルメモリ動作開始以
前(時点t。
28 is cleared by the coil drive timing signal 25 at the start of device drive, but at that time, the coil current flows to the device as shown at 30, so the load current to the power supply (switching regulator) 19 becomes as shown at 31, and therefore, The output voltage fluctuation occurs before the bubble memory operation starts (at time t).

以前)に発生し、動作開始時点では安定している。) and is stable at the start of operation.

ナオ、バフルメモリコントローラがホストシステムから
コマンドを受は取ってから、コイル駆動信号を発生する
までの間には必ずコントローラの内部処理時間が存在す
るので電圧は安定する。また負荷抵抗23は、負荷電流
29と上記コイル電流30の大きさがほぼ一致する様選
ぶ事が必要である。
After the baffle memory controller receives a command from the host system until it generates a coil drive signal, there is always internal processing time in the controller, so the voltage is stable. Further, the load resistor 23 must be selected so that the load current 29 and the coil current 30 are approximately equal in magnitude.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、スイッチングレギュレータ内に特に大
きな平滑回路などを設けなくても、バブルメモリデバイ
ス動作開始時の電圧低下を容易に防止することができる
According to the present invention, it is possible to easily prevent a voltage drop at the start of operation of a bubble memory device without providing a particularly large smoothing circuit in the switching regulator.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明方法を実施する装置の基本構成を示す
ブロック図、 第2図は、第1図の装置の動作を示すタイミング図、 第3図は、第1図に示される装置の具体的構成を例示す
る回路図、 (7ン 第4図は、第3図に示される装置の動作を示すタイミン
グ図、 第5図は、従来技術におけるバブルメモリ駆動装置を例
示する図、 第6図は、第5図の装置の動作を示すタイミング図であ
る。 (符号の説明) 1.11・・・スイッヂングレギュレータ (電源部)
、2・ 12・・・コイルドライバ、 3.13・・・バブルメモリ部、 14・・負荷回路、   21・・・フリップフロップ
、23・・・負荷抵抗。
FIG. 1 is a block diagram showing the basic configuration of an apparatus for carrying out the method of the present invention, FIG. 2 is a timing diagram showing the operation of the apparatus shown in FIG. 1, and FIG. 3 is a block diagram of the apparatus shown in FIG. 1. A circuit diagram illustrating a specific configuration; (7) FIG. 4 is a timing diagram showing the operation of the device shown in FIG. 3; FIG. 5 is a diagram illustrating a conventional bubble memory drive device; The figure is a timing diagram showing the operation of the device in Figure 5. (Explanation of symbols) 1.11...Switching regulator (power supply section)
, 2. 12... Coil driver, 3.13... Bubble memory section, 14... Load circuit, 21... Flip-flop, 23... Load resistor.

Claims (1)

【特許請求の範囲】[Claims] 1、バブルメモリデバイスの動作開始前に一時的にその
駆動電源に負荷を与える事によりバブルメモリデバイス
の動作開始時の電圧低下を防止した事を特徴とするバブ
ルメモリデバイスの駆動方法。
1. A method for driving a bubble memory device, characterized in that a voltage drop at the start of operation of the bubble memory device is prevented by temporarily applying a load to the drive power supply before the bubble memory device starts operating.
JP63130355A 1988-05-30 1988-05-30 Bubble memory device driving method Pending JPH01300491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63130355A JPH01300491A (en) 1988-05-30 1988-05-30 Bubble memory device driving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63130355A JPH01300491A (en) 1988-05-30 1988-05-30 Bubble memory device driving method

Publications (1)

Publication Number Publication Date
JPH01300491A true JPH01300491A (en) 1989-12-04

Family

ID=15032405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63130355A Pending JPH01300491A (en) 1988-05-30 1988-05-30 Bubble memory device driving method

Country Status (1)

Country Link
JP (1) JPH01300491A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002543506A (en) * 1999-04-26 2002-12-17 アルカテル Method and device for supplying electricity in mobile equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002543506A (en) * 1999-04-26 2002-12-17 アルカテル Method and device for supplying electricity in mobile equipment

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