JPH01285011A - Erasing core demagnetizer - Google Patents

Abstract

PURPOSE:To prevent the deterioration of the SN ratio of a reproducing signal by providing a switching means conducted with a prescribed voltage in the course of the connecting circuit of a capacitor for demagnetizing. CONSTITUTION:In the course of the connecting circuit of a capacitor 6 for demagnetizing connected to an erasing coil 3 in parallel, switching means 8 and 9 conducted with the prescribed voltage are provided. Namely, for example, by causing the prescribed voltage to conduct the switching means 8 and 9 to be higher than a voltage generated by an external noise to go into the erasing coil 3 at the time of a reading from a recording and reproducing head to be unitedly composed with an erasing head 1, the voltage generated by the external noise is interrupted to the capacitor 6 for demagnetizing, and thereby, a resonance phenomenon cannot be generated. On the other hand, since the voltage at the time of an erasing action completion is sufficiently higher than the voltage generated by the external noise, namely, the prescribed voltage, the automatic demagnetization of the erasing core can be executed without a problem. Thus, the deterioration of the SN ratio of the reproducing signal to the external noise can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a degaussing device for an erase core used in a flexible disk drive, which is an external storage device for a computer.

Conventional technology.

FIG. 2 shows the configuration of a conventional erase core degaussing device. In FIG. 2, 21 is an erasing core, around which an erasing coil 22 is wound. 23 is a demagnetizing capacitor, which is connected in parallel to the demagnetizing coil 22. One end of the erase coil 22 is connected to a power source, and the other end is connected to an erase current setting resistor 24.

One end of the erase current setting resistor 24 is connected to a transistor 25, and is turned on and off by the erase signal A.

Next, the operation of the above conventional example will be explained. In FIG. 2, when the erase signal A is input, the transistor 25 is turned on and current flows through the erase coil 22. When the erase signal is cut off, the transistor 25 is turned off, but the capacitance of the degaussing capacitor 23 is If selected appropriately, parallel resonance will occur between the degaussing capacitor 23 and the erasing coil 22. FIG. 3 is an equivalent circuit of FIG. 2, and the transistor 25
The operation is replaced by the switch 26, the resistor 24 is replaced by R, the erasing coil 22 is replaced by an inductance L and an internal resistance r, and the demagnetizing capacitor 23 is replaced by C. In FIG. 3, after the switch 26 is closed and the current flowing through the mustard becomes steady, when the switch 26 is opened, 5. When C<4L/r', the current l flowing through L is vibrationally damped, as shown in FIG. 4, and erases the erase core 21 automatically.

In this way, if the capacity of the degaussing capacitor 23 connected in parallel to the erasing coil 22 is appropriately selected, when the erasing circuit is opened, an oscillatory damping current flows through the erasing coil 22, so that the erasing core 21 is automatically activated. Can be demagnetized.

Problems to be Solved by the Invention However, according to the conventional erasing core degaussing device described above, the degaussing capacitor 23 is connected in parallel to the erasing coil 22, forming a parallel resonant circuit. When external noise having a frequency component interlinks with the erasing coil 22, there is a problem in that the noise leaks from the erasing core 21 to the core of the recording/reproducing head, deteriorating the S/N ratio of the reproduced signal.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an erase core degaussing device that can solve the above-mentioned problems.

Means for Solving the Problems In order to solve the above problems, the erasing core degaussing device of the present invention includes a switch means that conducts at a predetermined voltage in the connection circuit of the degaussing capacitor connected in parallel to the erasing coil. It's a general thing.

Effect In the above structure, when reading by a recording/reproducing head integrally constructed with the erasing head, for example, by setting the predetermined voltage that conducts the switch means higher than the voltage generated by external noise entering the erasing coil. Since the voltage generated by external noise is blocked by the degaussing capacitor, no resonance phenomenon occurs.On the other hand, since the voltage at the end of the erasing operation is sufficiently higher than the voltage generated by external noise, that is, the predetermined voltage, erasing is not possible. Automatic demagnetization of the core occurs without any problems.

Example An embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, reference numeral 1 denotes an erasing head that is integrated with the recording/reproducing head, and is composed of an erasing core 2 and an erasing coil 3 wound around the erasing core 2. One end of the erasing coil 3 is connected to a power supply, and an erasing current setting resistor 4 and a transistor 5 which is turned on and off by the erasing signal A are interposed at the other end. Further, a degaussing capacitor 6 is connected in parallel with the above-mentioned erasing coil 3, and its connection wiring (connection diagram R)
Arranged in antiparallel to each other in the middle of 7! A pair of diodes (switch means) 8.9 are interposed in series. Therefore, the degaussing capacitor 6 is electrically connected to the erasing coil 3 only when a voltage higher than the forward voltage of the diodes 8 and 9 is applied to the connecting wire 7. In addition,
One end of the connection wiring I17 is connected between the erasing coil 3 and the resistor 4. 10 is a recording medium.

Next, the operation will be explained.

In the above configuration, when external noise is linked to the erase coil 3 during reading, the voltage generated thereby is lower than the forward voltage of both diodes 8.9 and 8.9.
9 is not conductive, and the degaussing capacitor 6 is electrically open when viewed from the erasing coil 3, and a resonant circuit is not formed by the erasing coil 3 and the demagnetizing capacitor 6. On the other hand, when erasing is completed, the erasing coil 3 corresponds to the erasing current applied during erasing. A voltage is generated, but since this voltage is sufficient to make both diodes 8 and 9 conductive, the erase core 2 is automatically demagnetized by the same operation as described in the conventional example.

In this way, according to the above embodiment, during reading, the erasing coil 2 and the demagnetizing capacitor 6 are connected by the diode 8.9.
is in an electrically open state, and it is possible to prevent the SN ratio of the reproduced signal from deteriorating due to external noise.

Effects of the Invention According to the above configuration of the present invention, a switch means that conducts at a predetermined voltage is provided in the connection circuit of the degaussing capacitor. By setting the above predetermined voltage higher than the voltage generated by external noise entering the degaussing coil, the voltage generated by the external noise is blocked from the degaussing capacitor, and resonance phenomenon does not occur. Deterioration of the SN ratio can be prevented. Further, since the voltage at the end of the erase operation is sufficiently higher than the voltage generated by external noise, that is, the predetermined voltage, automatic demagnetization of the erase core is performed without any problem.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram of an eraser core demagnetizer according to an embodiment of the present invention, FIG. 2 is an electric circuit diagram of a conventional eraser core demagnetizer, FIG. 3 is an equivalent circuit diagram, and FIG. is a waveform diagram of the same demagnetizing current. 2... Erasing core, 3... Erasing coil, 6... Demagnetizing capacitor, 7... Connection wiring, 8.9... Diode. Agent Yoshihiro Morimoto Figure 7 + 57 2--Ichiura Yun Core 3-', Xiao and Phil 6...: Tei's first main cause Fushitanzer 7.1 Thread distance 0 Thread distance 11, 9--da' I

Claims (1)

[Claims] 1. A degaussing device for an erasing core, which is provided with a switching means that conducts at a predetermined voltage in the connection circuit of a degaussing capacitor connected in parallel to the erasing coil.