JPH01284134A - Multiplex transmission device - Google Patents

Abstract

PURPOSE:To deal with many signals without deteriorating the responsibility of a signal with urgency by transmitting the data of plural words by dividing every word into plural times in an input output unit to deliver and receive the data of plural words. CONSTITUTION:Single unit addresses ad(1)-ad(m1) are assigned to every unit of the input output units 61-6m1, 71-7m2 connected to respective stations 1, 21-2n. At the input output unit among those input output units in which one input needs to be expressed by the signal of one word, channel addresses ca(1)-ca(8) are given to one input respectively, and the signal is transmitted and received as being divided into plural channels. Namely, in the channel- divided unit, the transmission of the whole signal is finished by the transmission of eight times tor every channel, and on the other hand, in the unit without the channel, the transmission/reception of the signal is finished at every one time of the transmission, and the delivery/reception of the signal is finished in a short period. Thus, the many signals can be dealt with without deteriorating the responsibility of the signal requiring urgency such as an ON/OFF signal, etc.

Description

[Detailed Description of the Invention] [Industrial Application Field 1] This invention connects a master station and a plurality of slave stations via a transmission line to perform time division multiplexing transmission, and connects an input unit and an input unit connected to each station. The present invention relates to a multiplex transmission device that transmits and receives various signals to and from an output unit.

1. Prior Art J This type of multiplex transmission is used, for example, for monitoring and controlling various types of equipment. An example of its conventional use will be explained with reference to FIG.

1 is the master station, 2. .about.2n are slave stations, and 3 is a transmission line connecting these stations. The master station 1 includes a central control unit 4 that gives transmission timing to each station and controls the transmission and reception of signals at its own station, and the slave stations 21 to 2n control the transmission and reception of signals at their own station in synchronization with the given timing. Terminal control unit to control5. ~5n, respectively. Moreover, each of these stations 1 and 21 to 2n has a plurality of input terminals,
Each control section 4.5. Input units 61 to 6II+ that send signals to the transmission line 3 via ~5n, and an output unit 7 that also has a plurality of output terminals and receives and takes signals from the transmission line 3.
1 to 7 and 2 are provided as appropriate, and signals are exchanged via the transmission line 3 between the corresponding input unit and output unit.

For convenience of explanation, signal transmission between the master station 1 and the two slave stations 22, 2 will be discussed below, and the input/output units 6, - 64, 7, 6, 64, 7, 6, 7, 6, 7, 7, 8, 6, 7, 9, 10, 10, 10, 10, 11, 10, 10, 10, 11 will be explained below. ~7. An example will be explained in which each device is provided with eight input/output terminals.

The input units 61 and 6□ each have 8 decimal points.
Le M % (ON10FF signal) B+-Bs-B9-F
316 is input, and this signal is input to the input units 61 and 62.
are serialized and sent to the output units 7, 7□. The output units 71 and 7□ receive this signal, parallelize it, and output it to controlled devices such as relays S, ~S, and Sg~S.
16.

Eight types of analog signals A, ~AII such as voltage, current, and temperature are input to the input unit 6, and this signal is converted into D/D by the input unit 63 and sent to the output unit 73.
sent to. One output unit 7 converts this signal into D/^ and supplies it to the connected instruments M, to M8.

Eight types of pulses P, ~P, such as flow rate pulses, are input to the input unit 64, these pulses are counted by the input unit 6, and this counting data is sent to the output unit 74.
sent to. The output unit 74 outputs a pulse based on the received data and provides it to the connected display devices V, to 8.

In order to send and receive such signals, the input units 6, -
64 and output units 7, to 74 are assigned single or multiple addresses depending on the signals they handle. That is, assuming that the length of one transmission signal for each address is 8 bits, the input units 61 and 6
Since the digital signals at the 8 points in □ can be expressed using 8 bits at the top, they can be expressed using single addresses ad(1) and ad(
2) is assigned. Furthermore, since the address signal in the input unit 6 needs to be expressed as a word of multiple bits by ^/D conversion, one address is given for each input, and eight addresses ad(3) to ad(10) are Assigned. Since the pulse signal in the input unit 6 still needs to be sent as counting data, eight addresses ad(11) are used, one address per input.
~ad(18) is assigned. Correspondingly, on the other hand, the output unit is assigned the same address as the input unit to which the signal is transmitted, as shown in the figure.

The central control unit 4 performs time-division multiplexing for each address assigned in this way, and assigns an address code ad(1) to each address.
~ad(18) is attached, and a serialized signal as shown in FIG. 2 is cyclically sent to the transmission line 3.

Accordingly, each station reads data in synchronization with this signal, and reads the data areas D(1) to D(1,
In step 8), each of the above-mentioned signals is sent or received.

[Problem to be solved by the invention J] By the way, in the conventional transmission method as described above, as the number of input/output units connected to the transmission line increases and the number of signals to be handled increases, the number of signals transmitted once increases. There is a problem that the transmission cycle becomes long and the responsiveness of input and output deteriorates. In particular, many of the digital signals that provide 0N10FF, etc. of the controlled equipment have an urgent nature, such as providing control timing or alarm output, resulting in significant restrictions on system expansion. In addition, the number of addresses that can be used is limited by the number of bits of the signal used as the address code, so in the above method of allocating addresses for each signal to be handled, there are only a few addresses compared to the number of used increased, making it difficult to set up a large transmission system.

Therefore, an object of the present invention is how to handle a large number of signals without deteriorating the responsiveness of urgent signals.

Means for Solving 1 Problem 1 In order to solve these problems, the present invention, like the above-mentioned input/output unit that handles analog signals and pulse signals, uses a plurality of words (one word is the length of the signal transmitted at one time). This is an improved system in which a single address or the minimum necessary address is assigned to the unit that sends and receives data (corresponding to the above), and data is sequentially transmitted multiple times for each word on the same address.

In addition, in order to solve this problem, each input/output unit is assigned a consecutive unit address from the L position to the lowest, and the master station only assigns the lowest unit address at the beginning of each transmission. After that, it is desirable that each station performs data transfer by counting from the lowest address given and detecting the timing according to the address of each unit.

Furthermore, the master station periodically inserts a check frame during data transmission to monitor the status of the output unit and detect the lowest address of the functional unit.
This detection 1. It is desirable to give the transmission timing based on the lowest address.

Furthermore, the check frame shall be divided into multiple times according to the number of channels in each unit, and shall be inserted before each data transmission, and in this check frame, the address of the channel on which data will be transmitted in that time will be specified. According to the present invention, in a unit that sends and receives data of multiple words, such as the input/output unit that handles analog signals and pulse signals, the data is divided into multiple times for each word. It is possible to complete one transmission in an extremely short cycle compared to the conventional method, and it is possible to maintain responsiveness of highly urgent signals such as digital signals that are constantly transmitted in beat-number words.

That is, if this invention is adopted for the example of PttJ2 diagram, the transmission cycle can be shortened as shown in fjs3 diagram (,).

Moreover, if efficiency is improved based on the descriptions of claims (3) to (5), it is possible to further improve responsiveness as shown in the fjS3 diagram (b). In addition, ca(1) and ca(2) in the figure indicate channel addresses, and D(3-1) and D(4-
1) indicates the data of the channel to which the channel address ca(1) is allocated among the units having addresses ad(3) and ad(4), respectively, and D(3-2) and D(3-2).
D(4-2) indicates data of a channel to which channel address ea(2) is also allocated.

[Example 1 This example will be described below with reference to FIGS. 4 and 1715. FIG. 4 shows an example in which the present invention is applied to a device having the same configuration as that of FIG. 1, and the fjss diagram is a time chart of transmission in the device of FIG. 4.

In this example, the signal transmitted is 17 bits=8 bits per address each time.

Each station 1/21~2nl: connected input/output unit 61
~6+s, 71~7m2 are each assigned a single two-dimensional address ad(ri~ad(m+)) for each unit.The input units 61~6m and the output units 7,~72 are Units that send and receive signals share the same address, so the number of input units is equal to the number of allocated addresses.However, for output units, multiple output units correspond to one input unit, and signals are transmitted at multiple locations. Since reception may be performed, the number m2 of output units is in the relationship Lm2 ≥ ml with the number lI1 of input units and addresses.The unit address is expressed in 1 byte including a parity pit, and the maximum ad(
128), sequential numbers are allocated sequentially from the upper address ad(1).

Among the input/output units, 6.・64・73・7. In a unit that needs to be expressed by a signal of 1.1 word per input, channel addresses ca(1) to ca(8) are given to each input. The channel address is a common code for each unit (in this example, O~
)) is set and specified at the beginning of each transmission.

Next, the operation of this embodiment will be explained. In master station 1, the 5th
As shown in Figure (a), following the synchronization signal SYC, a check frame CF and a data frame OF are cyclically output in this order, and 7 data frames DF are transported twice for consecutive transmission verification. The slave stations 21 to 2n synchronize based on the synchronization signal SYC, detect the timing addressed to each address according to the address signal (final address in the device) given at the beginning of each frame, and transmit and receive signals. In other words, from a given address, the area for each subsequently allocated address is counted (-1), the address in each area is detected, and signals are sent and received.This method improves the efficiency of transmission. I'm counting.

The check frame CF is output from each station's output unit 7° to 7.
4 (b) (
As shown in d), first declare the lower address of the unit to be checked, and then check the given check pit C.
At B, the response pulses from the output canine / ) are received sequentially upwards from the declared address, and the lowest address ad(m-
) (where m1≦128) is detected. The check using this check frame is performed by dividing the unit address into 8 parts according to the number of channel addresses (8 in this example), and dividing the unit address into 8 parts according to the number of channel addresses (8 in this example).
, the channel address is specified in the upper nibble of the unit address given first. That is, in the first check frame CF, the unit address ad(1
8) = Declare rOFJ (hexadecimal number) and JOFJ~[0
OJ (ad(16)-ad(1)) is executed, and from then on, CF2 is set to "IF1~"10", and CF is set to "IF1~"10".
2F" ~ "20",...CF, "7F1 ~ "70"
”, and the check of all units up to the maximum address ad (128) is completed in eight transmissions. Therefore, the upper nibble of the unit address given in each check frame gives CF, ~CF, 1~7, and the channel address ca(1)~c
a(8) can be represented.

The data 7 frame DF corresponds to the fjS2 diagram and is a frame for transmitting and receiving signals between input and output units.First, the eight transmissions immediately after the device is started are based on the maximum address as shown in Figure 5(c). After declaring ad (128), data areas D (128) to
Give D(1). When the first eight transmissions are completed and the check of all crab units is completed in the check frames CF, ~CF, and the lowest address ad(m,) of the operating unit in the device is detected, the fifth figure(
As shown in e), after declaring this lowest address ad(m,), data areas D(m,) to (1) are sequentially given from that address toward the second place. Each station counts (-1) the address of each area based on the lower address declared at the beginning of the data frame for each data frame, and counts the address of each area that matches the address of the Uni node connected to the own station. Sends and receives signals. In addition, among input/output units, in units that transmit and receive signals by dividing into multiple channels such as 63, 64, 73, and 74, in the area where the address matches, the signal of the channel specified in the check frame first Send and receive only.

Therefore? ! Data frame DF of S1 transmits a signal of channel address ca(1), DF2 transmits a signal of ca(2), 6610F transmits a signal of ca(8), and so on, and all channels are transmitted by eight transmissions. The transmission and reception of signals is completed.

This embodiment is constructed as described above, and includes 6 input/output units.・73・7. In a channel-divided unit like this, transmission of all signals is completed in eight transmissions for each channel, while input/output units 61, 6□, 71
・7. A unit without a channel, such as , completes signal transmission and reception every - times of transmission, and completes signal transmission and reception in a short cycle. Comparing this with the conventional example shown in Figure 2, m
2 [f! In this case, 18 word signals D(1) to D(18) are serialized each time, whereas in this embodiment, 4 word signals D(1) to D(4) are serialized as shown in FIG. can be serialized to complete one transmission, and the responsiveness of digital signals in the input/output units 61, 62, 7, and 7□ is significantly improved. On the other hand, input/output units 63 and 64
・7. - The responsiveness of analog signals and pulse signals in 74 is poor, but these signals are often used mainly as measurement data and are not of a nature that requires urgency.

Furthermore, in this embodiment, the operating status of the human output unit is confirmed using a check frame, and signals are exchanged only between two operating units, thereby increasing transmission efficiency.

Furthermore, only one low-order address is transmitted as the address code, and each station then counts from this address code to detect the address of each data area. The responsiveness has been greatly improved.

[Effects of the Invention 1] The present invention is configured as described above, and can be used without deteriorating the responsiveness of urgent signals such as 0N10FF signals.
Can handle multiple signals. Furthermore, since addresses can be allocated according to input/output units regardless of the number of signals handled, a larger number of units can be connected than in the past, making it possible to configure a large transmission system.

[Brief explanation of the drawing]

fjS1 is a block diagram showing an example of a conventional device. The fjSZ diagram is a time chart of transmission in the same and unconventional cases. FIG. 3 is a time chart showing an example of transmission according to the present invention. FIG. 4 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 5 is a time chart of transmission in the same embodiment. 1 is the master station, 2. ~2n is a slave station, 3 is a transmission line, 4 is a central control unit, 5! -5n are terminal control units, 6I-6m are input units, and 7I-7m2 are output units. 112y Figure 4 Chiru 9 La Cloudy

Claims (5)

[Claims] (1) In a multiplex transmission device that connects a master station and multiple slave stations via a transmission path and cyclically transmits time-division multiplexed signals according to the transmission timing given by the master station, the signal input from the input terminal Each station uses one or both of an input unit that sends word data of a predetermined length based on a signal, and an output unit that receives data sent from an input unit with a matching address and outputs a signal from its output terminal. between the input/output units whose unit addresses match each other, data is sent and received via the transmission line according to the transmission timing given for each unit address, and between the corresponding input/output units, respectively. 1. A multiplex transmission device characterized in that when transmitting and receiving data of a plurality of different words, the data is divided into words and the transmission is performed in a plurality of times on the same unit address. (2) In a multiplex transmission device that connects a master station and multiple slave stations via a transmission line and cyclically transmits time-division multiplexed signals according to the transmission timing given by the master station, the signal input from the input terminal Each station uses one or both of an input unit that sends word data of a predetermined length based on a signal, and an output unit that receives data sent from an input unit with a matching address and outputs a signal from its output terminal. between the input/output units whose unit addresses match each other, data is sent and received via the transmission line according to the transmission timing given for each unit address, and among the corresponding input/output units, each A unit that sends and receives data of multiple different words has a single unit address or multiple unit addresses depending on the length of each word, and each word is divided with a channel address common to each unit. 1. A multiplex transmission device that transmits and receives data divided for each channel according to a channel address given by a master station at the beginning of transmission. (3) Consecutive unit addresses are assigned to each input/output unit from upper to lower, and the master station outputs only the lowest unit address at the beginning of each transmission. From then on, each station: 3. The multiplex transmission device according to claim 1, wherein data is transmitted and received by counting from a given lowest address and detecting timing according to the address of each unit. (4) The master station periodically inserts a check frame during data transmission to monitor the status of the output unit and detect the lowest address of the functional unit.
4. The multiplex transmission apparatus according to claim 3, wherein the transmission timing is given based on the detected lowest address. (5) The check frame shall be divided into multiple times according to the number of channels in each unit, and shall be inserted prior to each data transmission, and in this check frame, the address of the channel on which data will be transmitted in that time will be specified. 4. The multiplex transmission device according to claim 4, wherein: