JPH01270119A - Clock synchronizing system in multiprocessor system - Google Patents

Abstract

PURPOSE:To eliminate a dead lock state due to the queuing of a response message from a faulty processor by operating all of the processors on equal terms, and making the clock of each processor indicate a common time in a certain range. CONSTITUTION:Each of the processor (301-305) performs queuing after the lapse of a certain time since transmitting the clock, and after that, calculates the mean value of a clock difference with another processor, and performs the adjustment of its own clock based on the mean value. The above operation is repeated at every time when all of the processors (301-305) arrive at a prescribed time, and after a certain number of times of synchronism control is performed, the clocks of all processors (301-305) indicate almost the same time. Thus, each of the processors (301-305) performs control by using only a clock value transmitted from another processor. In such a way, the dead lock state due to the influence of the fault of the processor can be elominated even when either processors is set at a faulty state and transmission is impossible to perform.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention provides a method for adjusting the clocks of each processor to indicate time in a multiprocessor system in which each processor does not have a shared memory that can be commonly accessed. This paper relates to a clock synchronization method for

(Prior Art) In a multiprocessor system, it is necessary to synchronize the clocks of each processor making up the system so that they indicate a common time for the entire system. for example,
In a distributed filing system, a common time is required between each processor in order to identify a file version based on the creation and editing times recorded in each file. In addition, if each processor accumulates its own history information based on the time common to the system, it will be possible to know the order in which failures were detected when they occur, and to identify the cause of the failure. You can obtain useful information.

Even in a communication network system, which is an example of a multiprocessor system that does not have a shared memory, a synchronization method is required so that the clocks of each communication node indicate a common time. For example, the paper ``Unerected Algorithms and Distributed Chronic Synchronization Programs'' (Reference 1 The clock synchronization method TEMPO introduced in ) is implemented in a network running on the UNIX operating system 4.3 BSD.In the above system,
One node, which serves as a mask, queries all nodes about the time at every predetermined time, and calculates the average time based on the determined times of each node. Thereafter, the mask node instructs all nodes to adjust the C clock, and each node adjusts its clock according to this instruction.

Also, “16th Annual International Symposium on Fault Tolerant Computing”
The clock synchronization method introduced in the paper "Clock Synchronization in the Presence Opfaults and Processor Joins J (Reference 2)" described in Proceedings p., 218-223 is based on the TEM described earlier.
It uses distributed control rather than master-slave type control like PO. In this system, the processor adjusts the clock according to the synchronization message indicating the earliest time among the synchronization messages broadcast periodically within the system. As a result, the processor with the clock that advances the fastest will control the time in the system.

Furthermore, [Journal of Association for Computing Machinery-J Vol. 32° No. 1
．． January 1985. The clock synchronization method introduced in the paper "Synchronizing Clock in the Presence of Faults" (Reference 3) described in p. This is a synchronization method based on completely distributed control.

(Problem to be Solved by the Invention) In the clock synchronization method described in Document 1, a master node is essential. Therefore, when the master node fails, other nodes can perform the function of the master node.
A proxy method for the master node is required. In addition, since one master node queries the clocks of all nodes, as the number of nodes increases, the amount of communication to the master node increases, and the work of calculating the average time of all nodes increases. .

On the other hand, in the method described in Reference 2 that employs distributed control, although it is distributed, one processor with the fastest clock ends up controlling the time within the system. Moreover, if the clocks of the processors indicate approximately the same time, synchronization messages will be sent simultaneously from a plurality of processors, making the process of selecting the synchronization message indicating the earliest time complicated. Furthermore, in the method of Document 3, since each processor communicates with all other processors, communication overhead becomes a problem when applied to an actual system.

As a method to solve these problems, "Basic study of time management methods in networks" described in the first document p. In the method described in Reference 4), each processor periodically selects a plurality of processors at random and queries these processors about the time. The processors ensure synchronization based on the time returned from the selected processor. In the method of Document 4, there is no need to provide a processor for centralized control, and even if the number of processors in the system increases, communication messages will not be concentrated on a certain processor. However, since each processor must wait for a response from the selected processor,
If the selected processor is in a faulty state and cannot send a response message, there is a problem in that the processors waiting for a response message from the faulty processor end up in a deadlock state.

It is an object of the present invention to prevent deadlock conditions from occurring even when a processor is in a failure state and cannot send messages without each processor inquiring the time of the other processors. The object of the present invention is to provide a clock synchronization method in a multiprocessor system that does not require the use of multiple processors.

(Means for Solving the Problem) According to the present invention, in clock synchronization of a multiprocessor system consisting of n processors, the processors are provided with a clock indicating time, and the n processors are synchronized at each predetermined time. m processors are randomly selected from among the processors of A clock difference is obtained by subtracting the received clock value from the value indicated by the own clock when the clock is received, and at a time when a certain period of time is added to the predetermined time, the clock obtained up to that time is calculated. Calculate the average value of the differences,
When the average value is a negative value, the absolute value of the average value is added to the own clock, and when the average value is a positive value, the own clock is stopped for the time of the average value. A clock synchronization method in a multiprocessor system is obtained.

(Operation of the invention) The principle of the invention will be explained with reference to FIG. Third
The figure shows a specific example of a multiprocessor system. Each processor 301.302.303.304.305 is equipped with a clock that indicates its own time. Furthermore, each processor is mutually connected by logical communication paths 306 to 315 so that it can communicate with any processor. In a multiprocessor system that does not have a shared memory that can be commonly accessed by both processors, the clocks of each processor do not necessarily indicate the same time in the initial state of the system. Moreover, although clocks that start from the same value measure time at approximately the same rate, they gradually shift as time passes. Therefore, it is necessary for each processor to synchronize each other's clocks using the synchronization method according to the present invention, which will be described below.

In this synchronization method, when the clock reaches a predetermined time such as 1:00.2:00.3:00, each processor randomly selects m processors from among the n processors in the system. Select. After this,
The time indicated by its own clock is transmitted to these m processors. In the processor 301, when the clock shows
If one processor 302, 303, 304 is selected, the processor 3o1 is connected to the communication path 306, 312, 31
1 to these processors via their current clock value of 1:00. On the other hand, it is assumed that processor 302 receives a clock value of 1:00 from processor 301 when its own clock is 1=04. Processor 302 subtracts the received clock value from its own clock value;
Find a clock difference of 0:04. At this time, processor 3
02, it can be seen that its own clock is ahead of the clock of the processor 301 by 0204. for example,
In order for the processor 302 to synchronize with the processor 301, it is sufficient to stop its own clock for a time period of 0:04.

The times at which each processor sends a clock value vary based on the actual time by the amount of synchronization error, and in addition to this, it is thought that there will be some variation in the time required to transmit the clock value and the time to transmit the message. for,
Multiple clock values sent from other processors are not necessarily received at the same time. Therefore, each processor waits for a certain amount of time to pass after transmitting the clock value, and then
The average value of the clock differences with other processors determined so far is calculated, and the own clock is adjusted based on the average value. This waiting time is determined in consideration of synchronization error, processing time, and message transmission time so that synchronization control is performed after the transmitted clock value reaches each processor. For example, 1:3
It is determined that the average value of the clock differences is determined at a time obtained by adding 30 minutes to a predetermined time, such as 0.2:30° and 3:30. This is because even if there is a synchronization error of several minutes, all the transmitted clock values are expected to have been received by the target processor approximately 30 minutes after the clock values are transmitted. . processor 30
When the clock of processor 2 indicates time 1:30, the clock difference with other processors 301.304.305 is 0:0.
4. If -0:01.0:03 has already been determined, processor 302 calculates the average value of these clock differences and finds that the average value is 0:02. At this time,
It can be seen that the processor 302's own clock is ahead of the average time of the other three processors by a time of 0:02. Therefore, the processor 302 stops its own clock until the calculated average value time (0:02) of the clock difference has elapsed, thereby ensuring synchronization with other processors. Similarly, if the own clock is behind the average time of other processors, synchronization can be maintained by adding the average value of the calculated clock differences to the own clock. The above operations are repeatedly performed on all processors at predetermined times, and after synchronization control has been performed a certain number of times, the clocks of all processors come to indicate approximately the same time.

In this way, in this synchronization method, all processors are on completely equal footing and execute exactly the same algorithm.

As is clear from the above explanation, each processor performs control using only the clock values sent from other processors, so even if one of the processors is in a failure state and cannot transmit data, Those affected by the faulty processor will not be in a deadlock condition. Moreover, at this time, each processor performs synchronous control based on the clock information of m processors on average, so it is possible to reduce the amount of communication, and each processor
Since the processors are selected at random, the clock information of all processors in the system is reflected in the synchronization control by repeating the control.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings. 1st
An example of an algorithm for implementing the clock synchronization method according to the present invention is shown in FIG. FIG. 1 shows the algorithm executed by each processor. The algorithm is roughly divided into the following three modules. In other words, the self-processor time is 60 times, for example, 1:00.2:00.
．． If time interrupt 1, which is set to occur every time a predetermined time such as 3:00, is detected,
A module that randomly selects m processors and sends its own clock value to the selected processor, and when detecting a reception interrupt that occurs when receiving a clock value from another processor j, The module that calculates the clock difference δj is set to occur every time the own processor's clock reaches a predetermined time plus 30 minutes, such as 1:30.2:30.3:30. When a time interrupt 2 is detected, the average value δ of the clock differences δj received from other processors until the time interrupt 2 is detected is calculated, and the own clock is calculated based on the average value δ. There are three modules that perform adjustment. The control block 101 has the above three functions.
Detection of each side-in signal is performed to determine which of the two modules to execute.

When each processor detects time interrupt 1 in control block 101, control block 102 randomly selects m processors from n4tiTh processors in the system, and then
In step 3, the value indicated by its own clock is transmitted to these selected processors. Thereafter, the process returns to control block 101 and waits for the next interrupt signal to occur. Furthermore, when each processor detects a reception interrupt in the control block 101, the control block 108 subtracts the clock value transmitted by the processor J from the value indicated by its own clock to obtain a clock difference δj. Thereafter, the process returns to control block 101 and waits for the next interrupt signal to occur. Further, when each processor detects time interrupt 2 in the control block 101, the control block 10
4, the average value δ of the clock differences δj determined until the time delay 2 occurs is determined. Subsequently, in the control block 105, the value of the average value δ is determined, and δ>
If it is 0, it is assumed that the processor's own clock is ahead of other processors, and the control block 107 stops the processor's own clock for a time δ. If δ is 0, it is assumed that its own clock is delayed compared to other processors, and the absolute value of δ is added to its own clock. Further, if δ=0, it is assumed that the processor is synchronized with other processors, and no particular clock adjustment is required. After performing the control based on the average value δ of the clock differences as described above, the process returns to the control block 101 and detects the next interrupt signal. This algorithm is executed by all processors.

FIG. 2 is an algorithm showing in detail the control in control block 107 shown in FIG. In order to stop the clock within the processor for an arbitrary period of time, each processor is equipped with a timer that measures the passage of an arbitrary period of time. The control block 201 sets the average value δ (>0) of the calculated clock differences to the timer and starts measuring the passage of time. At the same time, the clock is stopped and control block 2
At step 03, it waits for a timer interrupt that occurs when the time δ from the timer has elapsed, and when it learns from the timer interrupt that the time δ has elapsed, it restarts its own clock at control block 204.

(Effects of the Invention) As described above, by using the clock synchronization method of the present invention, in a multiprocessor system, all processors can be operated equally without providing a processor that performs centralized control, and the clock of each processor can be adjusted. It can be controlled to point to a common time within a certain range. In this synchronization method, each processor performs synchronization control using only other transmitted clock values.

Therefore, since there is no need to wait for a response message from a certain processor, even if there is a processor that is in a faulty state and cannot send messages, a deadlock situation due to waiting for a response message from the faulty processor can be avoided. It will never occur. Furthermore, since there is no need for a centrally controlled processor, a failure in a specific processor will not cause a fatal failure to the system, ensuring high reliability, and messages sent by each processor are concentrated in a specific processor. Therefore, the processing of the processors can be distributed.

The information required by each processor is, on average, only the time information of m processors, and according to simulation experiments, even when the number of processors is sufficiently large, sufficient synchronization accuracy can be obtained with m = 4 to 10. It will be done. As described above, the effects obtained by the present invention are significant.

[Brief explanation of the drawing]

1 and 2 are flowcharts showing an embodiment of the present invention, and FIG. 3 is a diagram showing an example of a multiprocessor system. In the figure, 101 to 108 and 201 to 204 are control blocks, 301 to 305 are processors, and 306 to 204 are control blocks.
315 indicates a logical communication path between processors.

Claims (1)

[Claims] In clock synchronization of a multiprocessor system consisting of n processors, the processors are equipped with clocks that indicate time, and m processors are randomly selected from among the n processors at predetermined times. , transmits the value indicated by its own clock to the m processors, and if the clock value is received from another processor, the received value is determined from the value indicated by the own clock at the time when the clock value is received. A clock difference is obtained by subtracting the clock value, and at a time when a certain time is added to the predetermined time, the average value of the clock differences obtained up to that time is calculated, and the average value is a negative value. In this case, the multiprocessor adds the absolute value of the average value to its own clock, and when the average value is a positive value, stops its own clock for the time of the average value. Clock synchronization method in the system.