JPH01268475A - Dc motor servo device - Google Patents

Abstract

PURPOSE:To enable a DC motor to surely control its rotational frequency to a target value by detecting fluctuation of amplitude and phase of a frequency signal and correcting a control signal of the DC motor in accordance with a detected output of this frequency signal. CONSTITUTION:A frequency signal from a frequency generator 11 and a pulse signal from a pulse generator 15 are supplied to a mixing amplifier 14 respectively through a frequency discriminator 13, memory-correction circuit 31 and a phase comparator 18. In a memory mode of an initializing action mode, an output of the frequency discriminator 13 is integrated for a predetermined time by an integrator 32 and held. Next in the memory mode, an output of the integrator 32 is supplied to the mixing amplifier 14 through the memory-correction circuit 31. Simultaneously, a deviation of the output of the frequency discriminator 13 from the integrated output of the integrator 32 is successively stored in memory in the memory-correction circuit 31. And in a speed control action mode, the output of the frequency discriminator 13 is corrected by the deviation data stored in memory in the memory-correction circuit 31.

Description

Detailed Description of the Invention [Object of the Invention] (Industrial Application Field) The present invention relates to a servo device that controls the rotational speed (rotational frequency) of a DC motor.

(Prior Art) A head drum motor (!E-style motor) of a video tape recorder (hereinafter referred to as VTR) has a predetermined rotation frequency and a predetermined phase difference with respect to a reference signal. Subject to speed control and phase II II.

That is, the head drum motor includes a frequency generator (FG) that generates a signal with a frequency proportional to its rotational speed (hereinafter referred to as FG multiplied signal), and a frequency generator (FG) that generates a pulse ( A pulse generator (PG) that generates a PG multiplied signal (hereinafter referred to as a PG multiplied signal) is attached.

Then, the speed control is performed by adjusting the rotational frequency of the head drum motor to IIIt[I so that the FG multiplied signal period becomes a preset target value. The phase control is performed by controlling the rotational phase of the head drum motor so that the phase difference between the PG multiplied signal and the reference signal becomes a preset target value.

FIG. 4 is a circuit diagram showing a conventional configuration of a servo device that performs speed control and phase control of the above-mentioned head drum motor.

The FG multiplied signal output from the frequency generator 11 is waveform-shaped by the Schmitt trigger circuit 12 and then supplied to the frequency discriminator 13. This frequency discriminator 13 measures the FG multiplied signal period and supplies an output according to the result to the mixing amplifier 14. PG output from pulse generator 15
The doubled signal is waveform-shaped by the Schmitt trigger circuit 16. This waveform-shaped output is further supplied to the phase comparator 18 after its pulse generation timing is adjusted by a monostable multivibrator (M, M, >17). The phase difference of the signals is measured, and an output corresponding to the result is supplied to the mixing amplifier 14.

The mixing amplifier 14 has gain and phase characteristics for constructing a stable ml III loop, and mixes the discrimination output of the frequency discriminator 13 and the comparison output of the phase comparator 18 in an appropriate distribution. According to this mixed output, the motor drive amplifier 19 controls the rotation frequency and rotation phase of the head drum motor 20. Thereby, the rotational frequency and rotational phase of the head drum motor 20 are set to the target values.

The speed control described above uses the fact that the FG multiplied signal frequency is proportional to the rotation frequency of the head drum motor 20 to set the rotation frequency of the head drum motor 20 to a target value. However, since the frequency generator 11 that generates this FG multiplied signal is attached to the rotating shaft of the head drum motor 20, the head drum motor 2
0 field, and the frequency generator 11
The amplitude and phase may not be constant due to variations in the mechanical precision of the device itself. As a result, even though the rotational frequency of the head drum motor 20 is constant, the rotational frequency of the head drum motor 20 is controlled so that the FG double signal frequency is constant. The problem was that it fluctuated.

(Problem to be Solved by the Invention) As described above, in the conventional head drum motor servo device, when FG double signal amplitude fluctuation or frequency fluctuation occurs, the rotation frequency of the head drum motor is set to 41@. There was a problem in that the value was set to a different value even though it was.

SUMMARY OF THE INVENTION An object of the present invention is to provide a DC motor servo device that can reliably set the rotational frequency of a DC motor to a target value even if FG multiplied signal amplitude fluctuations and frequency fluctuations occur.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the present invention adjusts the rotational frequency of the DC motor according to the detection output of the rotational frequency of the DC motor, and After the integral processing is completed by the integrating means, the rotational frequency of the DC motor is controlled according to the integral output, the rotational frequency of the DC motor at this time is detected, and the detected output and the rotational frequency are A means for determining the deviation from the target value and storing this deviation; and after the storage processing by this means is completed, the detection output of the rotational frequency of the DC motor is corrected according to the storage result, and the detection output of the rotation frequency of the DC motor is adjusted according to the correction output. The rotation frequency of the motor is controlled.

(Function) By integrating the detection output of the rotation frequency of the DC motor mentioned above, the FG double signal phase fluctuation and frequency fluctuation are averaged, and the rotation frequency almost matches the target @ (rotation frequency when the servo is applied). Detection output can be obtained. Therefore, by controlling the rotational frequency of the DC motor according to this integral output, the DC motor can be controlled at a rotational frequency substantially close to the target value. Thereby, by determining the deviation between the FG multiplied signal detection output at this time and its target value, it is possible to produce FG multiplied signal amplitude fluctuations and frequency fluctuations. Therefore, by storing this deviation, correcting the detection output of the rotational frequency according to the memorized result during actual control, and controlling the rotational frequency of the DC motor according to this correction output, the FG multiplied signal amplitude and frequency can be improved. Even if it fluctuates, the target rotation frequency can be set.

(Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of an embodiment IIIi of the present invention.

FIG. 1 shows an example in which the present invention is applied to a servo device for a head drum motor of a VTR.

In FIG. 1, the same parts as in FIG. 4 are given the same reference numerals, and detailed explanations will be omitted.

The head drum motor servo device shown in Fig. 1 detects and stores FG multiplication signal fluctuations (phase fluctuations and frequency fluctuations) as an initial setting, and then controls the head drum motor according to the stored results during actual control. By correcting the detection output of the rotational frequency No. 20, this rotational frequency is set to a target value.

Therefore, first, the initial setting operation mode will be explained.

This initial setting operation mode further includes an operation mode (
The mode is divided into an operation mode (hereinafter referred to as integral mode) and an operation mode (hereinafter referred to as storage mode) in which the FG multiplied signal variation is detected and the detected output is stored.

The operation in integral mode is as follows.

After the FG multiplied signal output from the frequency generator 11 is waveform-shaped by the Schmitt trigger circuit 12, it is supplied to the frequency discriminator 13, and its period is detected. This detection output is directly supplied to the mixing amplifier 14 through the storage/correction circuit 31.

The mixing amplifier 14 then mixes the signal with the output of the phase comparator 18 . This mixed output is motor drive amplifier 1
9 to the head drum motor 20 to control its rotation.

The discrimination output of the frequency discriminator 13 is roughly expressed by the integrator 3.
2 and integrated over a predetermined period. This integral output is
It is held in an integrator 32.

After the integration of the output of the frequency discriminator 13 is completed, the storage mode is set.

In this storage mode, instead of the discrimination output of the frequency discriminator 13, the integral output obtained in the integral mode is supplied to the mixing amplifier 14 via the storage/correction circuit 31. Thereby, the rotation frequency of the head drum motor 2o is controlled by the integral output of the integrator 32. At the same time, the adder 32 outputs the discrimination output of the frequency discriminator 13 and the integrator 3.
The deviation from the integral output of 2 is sequentially determined. The determined deviations are supplied to the storage/correction circuit 31 and sequentially stored in the storage section. Once a predetermined number of deviations have been stored, the storage mode ends.

This storage result becomes the FG times signal variation amount. That is,
By integrating the discrimination output of the frequency discriminator 13, its fluctuations are averaged, and a discrimination output close to the target value can be obtained. Therefore, by controlling the rotational frequency of the head drum motor 20 according to this integral output, the rotational frequency of the motor 20 can be set to approximately the target value. As a result, if the deviation between the integral output of the integrator 31 and the discrimination output of the frequency discriminator 13 is calculated, the frequency discriminator 13
Therefore, it is possible to obtain the deviation of the discrimination output, that is, the FG times signal deviation.

With the above steps, the initial setting operation mode is completed, and normal speed control becomes possible.

In this speed control operation mode, the correction section of the storage/correction circuit 31 calculates the discrimination output of the frequency discriminator 13 and the deviation data stored in its storage section, and removes the fluctuation component from the discrimination output. Make corrections. and,
The rotation frequency of the head drum motor 20 is controlled by this correction output. As a result, the head drum motor 2
The rotation frequency of 0 is set to the target value even though the FG signal is fluctuating.

The operation of the storage/correction circuit 31 and the integrator 32 in each operation mode is switched in accordance with a mode designation signal supplied to the terminal 34. In addition, this mode designation signal controls the operation of the memory/correction circuit 31 so that the discrimination output of the frequency discriminator 13 is directly supplied to the mixing amplifier 14 without performing a correction operation even though it is in the speed control mode. It is also possible to set.

The overall configuration and operation of one embodiment have been described above in detail. Here, the storage mode and speed lljl1
The wJ mode will be explained in more detail.

The storage of the deviation data in the storage section of the storage/correction circuit 23 is performed every time the frequency discriminator 13 samples during one rotation period of the head drum motor 20. For example, if the FG multiplied signal arrives N times during one rotation period of the head drum motor 20 and the frequency discriminator 13 measures the FG multiplied signal period each time, the frequency discriminator 13 measures the FG multiplied signal period after entering the storage mode. Deviation m( Fa-F
:F is the target value and in this case, the integral output of the integrator 32) is
It is stored at address Ma in the storage section of the storage/correction circuit 23. Similarly, FG multiplied signals l, F2,...
・The deviation layer for .

The data are sequentially stored at addresses M1, M2, . . . in the storage section. When the storage of the deviation amount for the last FG multiplied signal N is completed, the storage mode ends, and the speed control mode starts from the arrival of the subsequent FG multiplied signal.

The first FG multiplied signal D in this speed control mode
- is stored in the address Mo of the memory section of the memory/correction circuit 23 and corresponds to the deviation data XO, and the correction operation (Fo -XO=FD'
-FO+F) is performed.

Thereafter, correction operations are similarly performed for the FG multiplied signals 1-, F2, Z, and so on.

By the way, in the above-mentioned storage mode, it is necessary to count the number of arrivals of the FG double signal. Further, as for the servo device, it is preferable that the initial setting is done only once by ensuring that the deviation data does not disappear even when the power switch of the system is turned off.

In the servo device shown in Fig. 1, the head drum motor 2
Since a pulse generator 15 for performing phase control is attached to o, by using this and using non-volatile memory for the storage section of the storage/correction circuit 31,
The above requirements are met.

That is, since the PG double signal generation position and the FG double signal generation position are mechanically determined to have a fixed relationship, the storage address of the deviation data in the storage section of the storage/correction circuit 23 should be determined based on the PG double signal. As a result, as shown in FIG. 2, the deviation data corresponding to the absolute position of the FG multiplied signal can be stored at a predetermined address in the storage section of the storage/correction circuit 23. In addition, FIG. 2 shows that the number N of FG multiple signal arrivals during one rotation period of the head drum motor 20 is 6.
The case is shown below.

Furthermore, if a non-volatile memory is used as the storage section, the deviation data stored in the storage section can be retained even when the power of the system is turned off, so initialization only needs to be done once.

As described above, in this embodiment, the FG multiplication signal fluctuation is detected and stored as an initial setting, and during actual control, the head drum motor 2 is controlled according to this stored result.
The detection output of the rotation frequency of 0 is corrected.

According to such a configuration, since the fluctuation component can be removed from the FG multiplied signal detection output, the rotational frequency of the head drum motor 20 can be set to the target value even if the FG multiplied signal fluctuation occurs. be able to.

Furthermore, in this embodiment, the number N of arrivals of the FG multiplied signal is counted using the PG multiplied signal, so that the circuit configuration can be simplified.

Furthermore, in this embodiment, a non-volatile memory is used for the memory section of the memory/correction circuit 31, so once the initial settings are made, there is no need to make the initial settings again even if the power switch is turned off. There are advantages.

FIG. 3 is a circuit diagram showing the configuration of another embodiment of the invention.

In the embodiment shown in FIG. 3, the various modes described above are executed by software of a microcomputer.

In FIG. 3, numeral 41 is a timer counter that counts the clock output from the clock generation circuit .

The latch circuits 43, 44, and 45 each have an FG multiplied signal P.
This is a latch circuit that latches the count value of the timer counter 41 at the arrival timing of the G-time signal reference signal. The latch data of these latch circuits 43, 44, and 45 is taken into the microcomputer 46 via the data bus.

The frequency discrimination function of the frequency discriminator 13 in FIG. 1 is obtained by using the microcomputer 46 to calculate the difference between the latch data taken in from the latch circuit 43 and the latch data one sample before, also taken in from this latch circuit 43. be able to. Similarly, the phase comparison function of the phase comparator 18 shown in FIG. In addition, a memory/correction circuit 31, an integrator 32,
The functions of the adder 33 and the mixing amplifier 14 can all be realized by processing on the microcomputer 45.

Furthermore, 47 is an analog/digital conversion circuit for taking in analog data for adjusting the PG double signal generation timing, 48 is a ROM for storing the program of the microcomputer 46, and 49 is for storing deviation data, etc. 50 is a digital/analog conversion circuit which converts the control signal of the head drum motor 20 into an analog signal and supplies it to the motor drive amplifier 19.

According to such a configuration, the amount of ROM and RAM used increases compared to the previous embodiment, but compared to the case where the conventional servo circuit is realized by software of a microcomputer, the number of response circuit parts etc. increases. The same effects as in the previous embodiment can be obtained without causing any problems.

In addition, in the previous example, a case was explained in which an integral output is used as the target value to find the deviation between the detected output of the rotational frequency of the DC motor and its target value, but it is also possible to use a separately prepared one. It is clear that it can be done.

Further, the present invention is of course applicable not only to speed control of a head drum motor of a VTR, but also to general speed control of a DC motor using an FG multiplied signal.

It goes without saying that various other modifications can be made without departing from the gist of the invention.

[Effects of the Invention] As described above, according to the present invention, fluctuations in the amplitude and phase of the FG multiplied signal are detected, and the control signal of the DC motor is corrected in accordance with this detection output. Even with amplitude and phase variations,
More accurate speed control can be performed.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG.
The figure is a timing chart for explaining the operation of FIG. 1, and FIG. 3 is a circuit diagram showing the configuration of another embodiment of the present invention.
FIG. 4 is a circuit diagram showing the configuration of a conventional DC motor servo device. 11... Frequency power generation, 12.16... Schmitt trigger circuit, 13... Frequency discriminator, 14... Mixing amplifier, 15... Phase generator, 17... Monostable multivibrator, 18... Phase comparator, 19... Motor drive amplifier, 20... Head drum motor, 31
...memory/correction circuit, 32...integrator, 33...
Adder, 34... terminal, 41... timer counter,
42... Clock generator, 43.44.45... Latch circuit, 46... Microcomputer, 47...
・Analog/digital conversion circuit, 48...ROM14
9...RAM. 50...Digital/analog conversion circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 3

Claims (1)

[Scope of Claims] A rotational frequency detection means for detecting the rotational frequency of a DC motor; a first rotational frequency control means for controlling the rotational frequency of the DC motor according to a detection output of the rotational frequency detection means; an integrating means for integrating the detection output of the rotational frequency detection means when the rotational frequency of the DC motor is controlled by the rotational frequency control means; and controlling the rotational frequency of the DC motor according to the integral output of the integrating means. a second rotational frequency control means for controlling the rotational frequency; a deviation calculation means to be obtained; a storage means for storing the calculated output of the deviation calculation means; a correction means for correcting the detected output of the rotational frequency detection means according to the stored result of the storage means; , and third rotational frequency control means for controlling the rotational frequency of the DC motor.