JPH01259717A - Protective relay - Google Patents

Protective relay

Info

Publication number
JPH01259717A
JPH01259717A JP63083148A JP8314888A JPH01259717A JP H01259717 A JPH01259717 A JP H01259717A JP 63083148 A JP63083148 A JP 63083148A JP 8314888 A JP8314888 A JP 8314888A JP H01259717 A JPH01259717 A JP H01259717A
Authority
JP
Japan
Prior art keywords
relay
output
circuit
short
shortcircuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63083148A
Other languages
Japanese (ja)
Other versions
JP2670291B2 (en
Inventor
Yukio Sukegawa
介川 行雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63083148A priority Critical patent/JP2670291B2/en
Publication of JPH01259717A publication Critical patent/JPH01259717A/en
Application granted granted Critical
Publication of JP2670291B2 publication Critical patent/JP2670291B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Emergency Protection Circuit Devices (AREA)

Abstract

PURPOSE:To prevent erroneous function, by holding the first stage function of a shortcircuit distance relay due to close point fault through AND operation of an output from a failsafe relay functionable only upon system fault and an output from the first stage of the shortcircuit distance relay. CONSTITUTION:Upon occurrence of shortcircuit or inner close point fault, the first stage element of a shortcircuit distance relay produces an H output based on a memory voltage only during several cycles. Upon function of an overcurrent relay 4, an H output is produced and an AND gate 13 produces an H output. At this time, a shortcircuit overcurrent relay 2 and a shortcircuit under voltage relay 3 function, while a NAND gate 6 produces an L output to set a FF7 thus bringing an OR gate 8 to H. The shortcircuit overcurrent relay 4 is in H state and an AND gate 9 produces an R output. Then an ON delay timer 9 is started and a stand-by trip command is fed through on OR gate 12. Consequently, even if the relay 1 produces H output during several cycles due to fault of PD secondary line, AND 13 conditions are not satisfied because the relay 4 is in L state and thereby the FF7 is not set. By such arrangement, mis-trip is prevented.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は送電線後備保護に適用される距離継電装置にお
いて、PD2次回路断線等のPD不良時にも誤動作する
ことなく、保護系統の内部至近点短絡事故を確実に除去
することが可能な保護継電装置に関する。
[Detailed Description of the Invention] [Objective of the Invention] (Field of Industrial Application) The present invention is a distance relay device applied to backup protection of power transmission lines, which does not malfunction even in the event of a PD failure such as a PD secondary circuit disconnection. The present invention relates to a protective relay device that can reliably eliminate internal short-circuit accidents in a protection system.

(従来の技術) 主保護、後備保護の2系列にて送電線保護を行なう保護
システムにおいて、生保m誤不動作時には、後備保護は
主保護との時間協調をとって限時トリップを行なう。ま
た、主保護不使用時は、後備保護第1段要素を瞬時トリ
ップとし、高速度に事故除去を行なうことが一般的であ
る。
(Prior Art) In a protection system that protects power transmission lines in two lines, main protection and back-up protection, when life insurance m malfunctions, the back-up protection performs a time-limited trip in time coordination with the main protection. Furthermore, when the main protection is not in use, the first-stage backup protection element is generally tripped instantaneously to perform accident removal at high speed.

距離リレーを使った後備保護継電装置において、リレー
設置点内部至近点短絡事故時、系統電圧が零またはそれ
に近い小さな事故電圧となった場合を考慮し、短絡距離
リレーには事故前の系統電圧を数サイクル記憶するメモ
リー回路が付加されており、至近点事故でも確実に動作
できるように対策されている。
In a backup protection relay system using a distance relay, in the event of a short-circuit accident at a close point inside the relay installation point, the system voltage becomes zero or a small accident voltage close to it. A memory circuit has been added to store several cycles of data, ensuring reliable operation even in the event of a near-point accident.

しかしながら、前述の如く、主保護不動作対策として、
距離リレー第1段要素を限時動作としている場合におい
ては、至近点短絡事故に対し、メモリー回路は事故前系
統電圧を数サイクルしか保持していないため第1段要素
限時タイマー整定値以上の時間、第1段要素出力を保持
する必要があリ、保護シーケンス部に短絡距離リレー第
1段の出力保持回路を設けることが行なわれる。
However, as mentioned above, as a countermeasure against main protection failure,
When the first stage element of the distance relay is set to time-limited operation, in the event of a short-circuit accident, the memory circuit retains the pre-failure system voltage for only a few cycles, so the time period exceeding the first stage element time-limited timer setting value, Since it is necessary to hold the first stage element output, a short circuit distance relay first stage output holding circuit is provided in the protection sequence section.

以下、従来の保持回路を有する保護継電装置の例を第2
図を用いて説明する。
Below, the second example of a protective relay device with a conventional holding circuit is shown.
This will be explained using figures.

第2図は、短絡距離リレー第1段要素の引外しブロック
図を示しており、1は短絡距離リレー第1段要素、2は
短絡過電流リレー、3は短絡不足′重圧リレー、4は系
統事故時のみ動作する短絡過電流リレー、5はj:、保
護継電装置不使用の条件。
Figure 2 shows a tripping block diagram of the short-circuit distance relay first stage element, 1 is the short-circuit distance relay first stage element, 2 is the short-circuit overcurrent relay, 3 is the short-circuit under-pressure relay, and 4 is the system A short-circuit overcurrent relay that operates only in the event of an accident. 5 is a condition where the protective relay device is not used.

6はN A N D論理、7はフリップフロップ、8お
よび12はOR論理、9および11はAND論理、10
はオンデイレ−タイマを示す。
6 is N A N D logic, 7 is a flip-flop, 8 and 12 are OR logic, 9 and 11 are AND logic, 10
indicates an on-delay timer.

第2図において、内部至近点短絡事故が発生し、系統電
圧が零、またはそれに近い小さな値となると、短絡距離
リレー第】−膜要素1は、内蔵のメモリー回路により、
数サイクルのみ出力を出し、また短絡過電流リレー2お
よび短絡不足電圧リレー3は、事故検出し動作となるた
めNAND、?!理6の出力は1101+となりフリッ
プフロップ7がセラ1〜される。
In Fig. 2, when an internal short-circuit accident occurs and the system voltage becomes zero or a small value close to it, the short-circuit distance relay No. 1 - Membrane element 1 uses a built-in memory circuit to
The output is output only for a few cycles, and the short-circuit overcurrent relay 2 and short-circuit undervoltage relay 3 detect an accident and operate, so the NAND, ? ! The output of the logic circuit 6 becomes 1101+, and the flip-flop 7 is turned on.

この時、主保護継電装置が誤不動作となり、事故が継続
となった場合、短絡過電流リレー2および短絡不足電圧
リレー3は動作継続するためフリップフロップ7のR(
リセット)端子はu Ouのままであり、フリップフロ
ップ7は、短絡距離リレーのメモリー電圧がなくなり第
1段要素1−の出力が“0″となっても動作を継続する
At this time, if the main protective relay device malfunctions and the accident continues, the short circuit overcurrent relay 2 and the short circuit undervoltage relay 3 will continue to operate, so the R(
The reset) terminal remains at uOu, and the flip-flop 7 continues to operate even if the memory voltage of the short-circuit distance relay disappears and the output of the first stage element 1- becomes "0".

従って、OR論理8の出力II I II、短絡過電流
リレー4の出力″1”となりAND論理9の出力は、事
故除去まで# I IIを継続する。ここで、主保護使
用状態では、主保護継電装置不使用の条件5の論理はi
t O+?であるので、AND論理11はLL OII
となり、オンデイレ−タイマ10が有効となる。
Therefore, the output of the OR logic 8 becomes "1" and the output of the short-circuit overcurrent relay 4 becomes "1", and the output of the AND logic 9 continues to be #III until the fault is removed. Here, in the main protection use state, the logic of condition 5 of not using the main protection relay device is i
t O+? Therefore, AND logic 11 is LL OII
Therefore, the on-delay timer 10 becomes effective.

従って、AND論理9は、オンデイレ−タイマ10を起
動し、その整定時間後にrr 1 rr高出力OR論理
12がll I IIとなるのでしゃ断器引外し指令を
出力する。
Therefore, the AND logic 9 starts the on-delay timer 10, and after the settling time, the rr 1 rr high output OR logic 12 becomes ll I II and outputs a breaker trip command.

次に、主保護継電装置不使用時は、主保護継電装置不使
用条件5は“1”論理となるためAND論理9がII 
I JTとなるとA N D論理11が瞬時にLL L
 IIとなりOR論理12を経由して瞬時に引外し指令
が出力され第1段瞬時引外しが可能となる。
Next, when the main protection relay device is not used, the main protection relay device non-use condition 5 is “1” logic, so the AND logic 9 is set to II.
When it comes to I JT, A N D logic 11 instantly changes to LL L.
II, a tripping command is instantaneously output via the OR logic 12, and the first stage instantaneous tripping becomes possible.

引外し指令出力後は、事故が除去されるため、短絡過電
流リレー2および不足電圧リレー3が復帰し、N A 
N D論理6はrt l uとなりまた、短絡距離リレ
ー第1段要素1も復帰しているのでフリップフロップ7
がリセットされる。
After the trip command is output, the fault is removed, so the short-circuit overcurrent relay 2 and the undervoltage relay 3 are restored, and the N A
ND logic 6 becomes rt l u, and short-circuit distance relay first stage element 1 has also returned, so flip-flop 7
is reset.

ところで、PD2次回次回線断線PD不良が発生すると
PD健全電圧から零電圧となる時に、メモリー電圧によ
り短絡距離リレー第1段要素1が数サイクル不要出力を
出し、かつ不足電圧リレー:3が動作となり、また潮流
により短絡過電流リレー2が動作している状態では、N
ANDAND論理6は11 Q IIとなりフリップフ
ロップ7がセットされてしまう。この状態において、外
部事故が発生するとフェイルセーフリレーである短絡過
電流リレー4が動作しOR論理8のII I I+高出
力短絡過電流リレー4のAND論理9が出力“1″とな
る。この時、主保護不使用であれば、主保護継電装置不
使用の条件5がl(I IIとなっているためAND論
理11が瞬時にLL I I+高出力なりOR論理12
を経由して誤って引外し指令を出力する恐れがある。
By the way, when a PD failure occurs due to a disconnection in the PD 2nd cycle, when the PD normal voltage becomes zero voltage, the short circuit distance relay 1st stage element 1 outputs an unnecessary output for several cycles due to the memory voltage, and the undervoltage relay 3 becomes activated. , and when the short-circuit overcurrent relay 2 is operating due to the current, N
AND logic 6 becomes 11 Q II and flip-flop 7 is set. In this state, when an external accident occurs, the short-circuit overcurrent relay 4, which is a fail-safe relay, operates, and the AND logic 9 of the OR logic 8 (II II I) and the high output short-circuit overcurrent relay 4 becomes "1". At this time, if the main protection is not used, the condition 5 for not using the main protection relay is 1 (I II), so AND logic 11 instantly becomes LL I I + high output, OR logic 12
There is a risk of accidentally outputting a trip command via the

(発明が解決しようとする課題) 前述のように、短絡距離リレー第1段要素の至近点事故
対策としての保持回路において、PD不良時に第1段要
素出力が誤って保持されてしまい。
(Problem to be Solved by the Invention) As described above, in a holding circuit as a measure against a close point accident of the first stage element of a short-circuit distance relay, the output of the first stage element is erroneously held when a PD fails.

その状fすで外部事故が生ずるとミストリップとなる可
能性があった。
In such a situation, if an external accident were to occur, there was a possibility of a mistrip.

よって本発明は、PD2次断線断線PD不良時にも、短
絡距離リレー第1段要素保持回路が誤って保持動作をす
ることなく、PD不良時の外部事故によるミストリップ
を防止することができ、かつ内部至近端事故時には、確
実にしゃ断器引外しを行なうことができる保持継電装置
を提供することを目的としている。
Therefore, the present invention prevents the short-circuit distance relay first-stage element holding circuit from erroneously performing a holding operation even when the PD is defective due to secondary disconnection or disconnection, and prevents mistrips due to external accidents when the PD is defective. It is an object of the present invention to provide a holding relay device that can reliably trip a breaker in the event of an internal close-end accident.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明の保護継電装置は送電線後備保護に適用される距
離継電器の出力に至近点短絡事故対応として出力保持回
路を持たせた保護継電装置であって、前記距離継電器第
1段要素出力とこの送電線系統の事故時に動作するフェ
イルセーフ継電器出力とがともに成立する条件で出力成
立し、この事故が除去されるまで出力保持する出力保持
回路を具備する。
(Means for Solving the Problems) The protective relay device of the present invention is a protective relay device in which the output of a distance relay applied to backup protection of a power transmission line is provided with an output holding circuit in response to a short-circuit accident at a close point. , an output holding circuit is provided that holds the output under the condition that the distance relay first stage element output and the fail-safe relay output that operates in the event of a fault in the transmission line system are both held, and holds the output until the fault is removed. .

ここで、フェイルセーフ継電器とは過電流継電器、電流
変化幅継電器などである6 (作用) 本発明では、短絡距離リレー第1段要素出力と系統事故
時にのみ動作するフェイルセーフ継電器。
Here, the fail-safe relay includes an overcurrent relay, a current variation width relay, etc. 6 (Function) The present invention is a fail-safe relay that operates only in the event of a short-circuit distance relay first stage element output and a system fault.

例えば短絡過電流リレーの出力のAND条件により、至
近点短絡事故による距離リレー第1段要素の動作を保持
することにより、短絡第1段による後備しゃ断を行なう
For example, by maintaining the operation of the first stage element of the distance relay due to a short-circuit accident based on the AND condition of the output of the short-circuit overcurrent relay, backup cutoff by the short-circuit first stage is performed.

(実施例) 以下、図面を参照して実施例を説明する。第1図は、本
発明による短絡距離リレー第1段要素の引外しブロック
図例を示したものであり、第2図と同一部分には同一符
号を付して、ここでは本発明の特徴点の部分について述
べる。第1図において13はAND論理を示しており、
短絡内部至近点事故時、短絡距離リレーは、数サイクル
のメモリー電圧により動作し、その第1段要素1はメモ
リー電圧がなくなるまで“1″出力となり、また過−電
流リレー4が事故電流により動作するのでAND論理1
3が“1”出力となる。
(Example) Hereinafter, an example will be described with reference to the drawings. FIG. 1 shows an example of a tripping block diagram of the first stage element of the short-circuit distance relay according to the present invention. The same parts as in FIG. Let's talk about that part. In FIG. 1, 13 indicates AND logic,
In the event of a short-circuit internal close point fault, the short-circuit distance relay is activated by several cycles of memory voltage, and its first stage element 1 outputs "1" until the memory voltage disappears, and the over-current relay 4 is activated by the fault current. Therefore, AND logic 1
3 becomes "1" output.

また、このとき、短絡過電流リレー2および短絡不足電
圧リレー3が動作するためNAND論理6の出力は“0
”であり、フリップフロップ7はセット状態となり、そ
の出力によりOR論理8がat 1 u出力および短絡
リレー4が″′1″出力となっているのでAND論理9
は“1″を出力している。従って、この時、主保護使用
状態でさらに主保護誤不動作であれば、AND論理9の
出力によりオンデイレ−タイマ10が起動されOR論理
12を経て後備引外し指令が出力される。そして、後備
引外しにより事故が除去されたことにより、短絡過電流
リレー2および短絡不足電圧リレー3が復帰するので、
NAND論理6が“1”出力となり。
Also, at this time, the short circuit overcurrent relay 2 and the short circuit undervoltage relay 3 operate, so the output of the NAND logic 6 is "0".
”, the flip-flop 7 is in the set state, and its output causes the OR logic 8 to output at 1 u and the short-circuit relay 4 to output “’1”, so the AND logic 9
outputs “1”. Therefore, at this time, if the main protection is malfunctioning in the main protection use state, the on-delay timer 10 is activated by the output of the AND logic 9, and the subsequent tripping command is outputted via the OR logic 12. Then, as the accident is removed by the subsequent tripping, the short-circuit overcurrent relay 2 and the short-circuit undervoltage relay 3 are restored.
NAND logic 6 outputs “1”.

短絡距離リレー第1段要素1も復帰しているのでフリッ
プフロップ7は、確実にリセットされる。
Since the short-circuit distance relay first stage element 1 has also returned, the flip-flop 7 is reliably reset.

次に、PD2次断線等のPD不良時を考えると、PD2
次電圧電圧失によりPD健全性電圧から零電圧となる時
にメモリー電圧により短絡距離リレーが数サイクル間不
要応動しその第1段要素1の出力が“1”となるが、系
統事故時にのみ動作する短絡過電流リレー4が不動作で
あるためAND論理13は、110 I+出力のままで
あり、フリップフロップ7が誤ってセットされることは
ない。
Next, considering the case of PD failure such as PD secondary disconnection, PD2
When the next voltage drops from the PD health voltage to zero voltage, the short-circuit distance relay responds unnecessarily for several cycles due to the memory voltage, and the output of the first stage element 1 becomes "1", but it only operates in the event of a system fault. Since the short-circuit overcurrent relay 4 is inactive, the AND logic 13 remains at the 110 I+ output and the flip-flop 7 is not erroneously set.

以上のように、系統事故時にのみ動作する短絡過電流リ
レー出力と短絡距離リレー第1段出力とのAND条件に
よりフリップフロップをセットするようにしたのでPD
不良時のPD雷電圧う失時 4でも誤ってフリップフロ
ップをセットすることがない。
As mentioned above, the flip-flop is set by the AND condition of the short-circuit overcurrent relay output, which operates only in the event of a system fault, and the short-circuit distance relay 1st stage output, so the PD
Even when the PD lightning voltage is lost in the event of a failure, the flip-flop will not be set by mistake.

なお、以上の説明では、短絡過電流リレーと短絡距離リ
レー第1段出力とのANDにより第1段動作を保持する
ように説明したが、フェイルセーフ継電器として短絡過
電流リレーのかわりに電流変化幅リレーにて行なっても
同じ効果をうろことができる。
In addition, in the above explanation, it was explained that the first stage operation is maintained by ANDing the short circuit overcurrent relay and the short circuit distance relay first stage output, but as a fail-safe relay, instead of the short circuit overcurrent relay, the current change width is You can get the same effect by using a relay.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く、本発明によれば、系統事故時のみ動
作するフェイルセーフ継電器出力と短絡距離リレー第1
段出力とのANDにより至近点事故による短絡距離リレ
ー第1段動作を保持するようにしたのでPD不良時の第
1段要素の不要応動を保持することがないのでPD不良
時の外部事故によるミストリップを防止することができ
、かつ内部至近点事故時には確実にしゃ断器例外しを行
なうことができる保護継電装置を提供することができる
As explained above, according to the present invention, the fail-safe relay output that operates only in the event of a system fault and the first short-circuit distance relay
Since the 1st stage operation of the short-circuit distance relay due to a close point fault is maintained by AND with the stage output, the unnecessary response of the 1st stage element in the event of a PD failure is not maintained, so errors caused by an external accident in the event of a PD failure are avoided. It is possible to provide a protective relay device that can prevent tripping and can reliably perform breaker exception in the event of an internal close point accident.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による短絡距離リレー第1段要素の引外
しブロック図、第2図は従来の短絡距離リレー第1段要
素の引外しブロック図である。 1・・・短絡距離継電器第1段要素 2・・・短絡過電流継電器 3・・短絡不足′6圧継電器 4・・・短絡過電流継電器 5・・・生保5継−11装置不使用条件6・・・N A
 N I)回路 7・・・フリップフロップ回路 8.12・・・OR回路 9 、1]、、 13・・・A N I)回路10・・
・オンデイレ−タイマー 代理人 弁理士 則 近 憲 佑 同  第子丸 健 5   第2図
FIG. 1 is a tripping block diagram of a short circuit distance relay first stage element according to the present invention, and FIG. 2 is a tripping block diagram of a conventional short circuit distance relay first stage element. 1...Short circuit distance relay 1st stage element 2...Short circuit overcurrent relay 3...Short circuit insufficient '6 Pressure relay 4...Short circuit overcurrent relay 5...Life insurance 5 relay-11 device non-use condition 6 ...NA
N I) Circuit 7...Flip-flop circuit 8.12...OR circuit 9, 1], 13...A N I) Circuit 10...
・On-day timer agent Patent attorney Nori Chika Ken Yudo Daishimaru Ken 5 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 送電線後備保護に適用される距離継電器の出力に至近点
短絡事故対応として出力保持回路を持たせた保護継電装
置において、前記距離継電器第1段要素出力とこの送電
線系統の事故時に動作するフェイルセーフ継電器出力と
がともに成立する条件で出力成立し、この事故が除去さ
れるまで出力保持する出力保持回路を具備することを特
徴とする保護継電装置。
In a protective relay device in which the output of a distance relay applied to backup protection of a power transmission line is provided with an output holding circuit in response to a short-circuit accident at a close point, the first stage element output of the distance relay operates in the event of an accident in the transmission line system. 1. A protective relay device characterized by comprising an output holding circuit that holds the output under conditions where both the fail-safe relay output and the fail-safe relay output hold until the fault is removed.
JP63083148A 1988-04-06 1988-04-06 Protective relay Expired - Lifetime JP2670291B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63083148A JP2670291B2 (en) 1988-04-06 1988-04-06 Protective relay

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63083148A JP2670291B2 (en) 1988-04-06 1988-04-06 Protective relay

Publications (2)

Publication Number Publication Date
JPH01259717A true JPH01259717A (en) 1989-10-17
JP2670291B2 JP2670291B2 (en) 1997-10-29

Family

ID=13794140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63083148A Expired - Lifetime JP2670291B2 (en) 1988-04-06 1988-04-06 Protective relay

Country Status (1)

Country Link
JP (1) JP2670291B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5755729A (en) * 1980-09-19 1982-04-02 Tokyo Shibaura Electric Co Protecting relay device
JPS61180521A (en) * 1985-02-04 1986-08-13 株式会社東芝 Carrier protective relay

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5755729A (en) * 1980-09-19 1982-04-02 Tokyo Shibaura Electric Co Protecting relay device
JPS61180521A (en) * 1985-02-04 1986-08-13 株式会社東芝 Carrier protective relay

Also Published As

Publication number Publication date
JP2670291B2 (en) 1997-10-29

Similar Documents

Publication Publication Date Title
JPH01259717A (en) Protective relay
JP3256639B2 (en) Digital relay device
JP5489742B2 (en) Protective relay
JPH0522850A (en) Apparatus for countermeasure against breaker operation failure
JP2009022063A (en) Power transmission line protection system, and protection relay device
JP3468950B2 (en) Monitoring circuit for undervoltage relay
JPS6210086B2 (en)
JPH06233445A (en) Overcurrent preventive circuit
JPS58154321A (en) Voltage variation width relay
JPH0112510Y2 (en)
JPH1169608A (en) Digital protection relay device
JP3146796B2 (en) DC circuit breaker
JPS5828451Y2 (en) Warmer body warmer
JP2986267B2 (en) Digital relay device
SU1188823A2 (en) Device for protective switching-off in a.c.network
JPS6146110A (en) Protective relaying device
JPS6041533B2 (en) Protective relay device
JP3353509B2 (en) Monitoring circuit for protective relay
JP2004274840A (en) Power line protection relay
JPH05146052A (en) Transmission line protection relay device
JPH02106119A (en) Fault information memory system
JPS5911721A (en) Protecting repeating device
JPH0125295B2 (en)
JPS61132028A (en) Protective relay unit
JPH0124016B2 (en)

Legal Events

Date Code Title Description
S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080704

Year of fee payment: 11

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080704

Year of fee payment: 11