JPH01252092A - Digital video signal processing circuit - Google Patents

Abstract

PURPOSE:To effectively execute a signal processing by providing a simple switching circuit and a controller thereof, forming a short wiring between adjoining blocks, controlling the switching circuit, measuring individual blocks while a testing or measuring instrument is connected to a same substrate terminal. CONSTITUTION:A low frequency region converting signal inputted to a signal input/output edge 58a is filtered by a signal processing part 100 and introduced to a signal input/output edge 58b. At this time, for switching circuits 101 and 102, respective buffer circuits are conducted. A switching circuit 103 introduces the output of the processing part 100 to the circuit 102. Consequently, the low frequency region converting signal inputted to the output edge 58b is filtered by the processing part 100 and derived to the output edge 58a. Next, in order to test another block, the circuit 103 is switched by a switching signal and when the output of the circuit 101 is introduced to the input edge of the circuit 102, the section of the output edges 58a and 58b can be made through.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention relates to a home video tape recorder (hereinafter referred to as VTR).
The present invention relates to video signal processing circuits (referred to as ``digital processing circuits''), and particularly to digital processing circuits constructed as semiconductor integrated circuits.

(Prior art) In general, video signal processing for home VTRs involves the following steps during recording:
After separating the composite video signal into a luminance signal and a color signal, the luminance signal is FM modulated, and the carrier frequency of the color signal is converted to a low frequency, and the luminance FM signal and low frequency color signal are superimposed and printed on the tape. After separating the luminance FM signal and low-range color signal using a filter, which are recorded and reproduced in a superimposed manner during playback, the luminance FM signal is
It has a function of performing FM detection on the M signal to obtain the original luminance signal, and for the low-range color signal, obtaining the original carrier frequency color signal through frequency conversion, and then superimposing and outputting these signals.

Conventionally, the above signal processing has been realized by analog circuits, but with advances in semiconductor technology and digital signal processing technology, proposals have been made to apply digital technology to the video signal processing circuits of home VTRs.

Hereinafter, the functions of the digitized video signal processing circuit described in the following literature will be explained, and the functions of the conventional analog video signal processing circuit will be explained with reference to FIG.

As a document showing a digital video signal processing circuit, for example, [ICCE 85 / JUNE 5, 19.85] No. 1
Page 32, 133...Reference 1 [ICCE 86/JU
NE 5, 1986] page 200.201...Reference 2
[ICCE 86 /JUNE 5, 1986'] 1st
96. Page 197...There are 3 documents.

FIG. 2 of Document 1 shows a circuit block that is a digitalized color signal processing circuit. This circuit is designed to be able to process television signals of different formats, such as NTSC, P^L, and 5, which have different carrier frequencies.
Each ECAH chroma signal can be converted to the same low frequency for recording, and a reproduced low frequency signal can be converted to a chroma signal of the original frequency.

FIG. 1 of Document 2 shows circuit blocks of a luminance signal processing system and a chroma signal processing system, and FIG. 3 of this document shows a frequency conversion circuit of the chroma signal processing section during recording. There is.

FIG. 3 of Document 3 shows a signal processing block that inherits the color signal processing technology in analog circuits. As stated in its description, this circuit performs time axis correction during variable-speed playback, etc., using color signals.

It is reported that the frequency conversion method is complicated to perform on both the luminance signal and has the APC loop method used in analog circuits. This is because ■ The carrier wave of the low frequency conversion color signal is set to an integral multiple of the horizontal frequency (denoted as fH) (40 in the VHS system).
xfH), ■The jitter during playback is, if the luminance FM signal is △fH (the horizontal synchronization signal jitter after FM detection is △
fH), the low frequency color carrier jitter is an integer ratio multiple (40 x 8 fH), and the phase lock circuit for the burst signal causes so-called mislock in which it locks to the spectrum next to the burst signal. , ■ This mislock detection is performed using a voltage controlled oscillator (hereinafter referred to as vCo) that oscillates at the same frequency as the low carrier frequency at the two prongs.
It is considered that Document 3, which inherited the analog circuit system, was superior to Documents 1 and 2 because it employed a method of detecting whether or not H was maintained.

Therefore, in the digital processing circuit shown in FIG. 2 of Document 1 and FIGS. 1 and 3 of Document 2, when considering the entire VTR, the oscillation frequency of vCO for frequency conversion is 40xfH. Instead, it is predicted that the performance of mislock correction will deteriorate.

For example, in the circuit shown in Figure 2 of Document 1, the conversion frequency modulator for input side frequency conversion has a frequency of 40
It is not possible to maintain the fH relationship.

In order to maintain the 40xfH relationship, another VCO and frequency converter are required, which increases the hardware scale. On the other hand, in the circuit of Document 3, VC
The oscillation frequency of O cannot be maintained in the relationship of 40 x fH, but the frequency change is 40 x 8 fH (with jitter).
It is possible to maintain the relationship. This is because the frequency of the VCO can be controlled so as to have a certain relationship with the frequency of the horizontal synchronizing signal by detecting it. however,
In this method, even in analog circuits, errors in horizontal frequency detection cause disturbances to the APC loop, resulting in degraded performance.

What should be noted here is the performance of circuits that have been cultivated using conventional analog systems.

FIG. 3 shows a VTR signal processing circuit using a conventional analog circuit.

First, the processing during the recording operation will be explained.

The composite video signal is supplied from an input section 1 to a comb filter 3 via a switch 2 . The comb filter 3 separates the color signal and supplies it to an automatic color control amplifier (hereinafter referred to as an ACC amplifier) 5 through a bandpass filter 4 . The color signal whose gain has been adjusted by the ACC amplifier 5 is input to the frequency converter 7 via the switch 6, and is converted to a low frequency for recording. The low-pass converted color signal is input to a synthesis circuit 9 via a low-pass filter 8. Here, the luminance FM signal and the low frequency conversion color signal are combined, amplified by the recording amplifier 10, and supplied to the magnetic herad 11.

Note that the synchronization circuit 22 separates a horizontal synchronization signal from the luminance signal of the input section 21 and supplies it to the horizontal phase synchronization and mislock circuit 23 and the burst gate pulse generation circuit 24 .

The horizontal phase synchronization and mislock circuit 23 controls the VCO 25 via a switch 26 so that the frequency relationship between the oscillation output of the voltage controlled oscillator 25 and the horizontal synchronization signal is in a predetermined relationship.
The oscillation frequency is controlled. The oscillation output of the VCO 25 is frequency-converted by the first frequency converter 27, and then supplied as a carrier to the second frequency converter 7 via the bandpass filter 28.

As the carrier of the first frequency converter 27, the output of a crystal voltage controlled oscillator (hereinafter referred to as VCXO) 30 is used. VCXO30 has a certain control 6f during playback operation.
l Pressure bias 31. It is applied via the switch 32, but during recording operation, the detection output from the APC detection circuit 33 is applied as a control voltage via the loop filter 34.

The APC detection circuit 33 detects a phase error between the oscillation output of the VCXo 30 and the color burst signal.

Therefore, during the recording operation, the VCO 25 is synchronized with the horizontal synchronization signal of the luminance signal to be recorded, and the VCXO 3
0 is synchronized in phase with the burst signal of the color signal to be recorded. A carrier for frequency converting the color signal is created using the outputs of the VCO 25 and VCXO 30. Therefore, it is possible to obtain a recording signal in which the relative phase relationship between the horizontal synchronization signal, that is, the luminance signal and the color signal is maintained constant.

The burst gate pulse generation circuit 24 generates timing pulses for the APC detection circuit 33 and the CC circuit 35. The ACC circuit 35 performs amplitude detection of the burst signal, controls the ACCtfI amplifier 5, and maintains the output signal level of this amplifier constant.

Next, the reproduction operation will be explained.

During the reproducing operation, the switches 2, 6, 26, and 32 are each switched to the terminal P side. The signal picked up by the magnetic head 11 is amplified by a pre-amplifier 41 and input to the second frequency converter 7 via a low-pass filter 42 and a switch 6. Here, the color signal converted to the original frequency is supplied to the comb filter 3 via the switch 2, where crosstalk components having a phase inversion relationship are removed, and the color signal is passed through the bandpass filter 4 and the ACC amplifier 5. The signal is outputted to the output section 43 via. During the reproducing operation, the VCXO 30 has a fixed constant frequency. Instead, since the detection output of the APC detection circuit 33 is supplied to the control terminal of the VCO 25 via the low-pass filter 34, the time axis fluctuation component is detected from the phase of the burst signal. During playback, ■C0
25 and the horizontal synchronizing signal is because the horizontal synchronizing signal is not always reproduced at a constant frequency during special reproduction.

(Point U while the invention is trying to solve the problem) By the way, it was explained first that the digitization circuit of Document 1.2 is a circuit that maintains the output of vCO at 40XfH, and the performance of mislock correction is poor. did. On the other hand, the digitization circuit of Document 3 has 40
It has been explained that it is possible to maintain ×ΔfH.

However, since the digitization circuit of Document 3 combines the horizontal synchronous detection output and the APC detection output to control vCO,
There is a problem in that the horizontal frequency detection error acts as a disturbance to the APC. Therefore, if we compare the performance with the analog circuit shown in Figure 3 without distinguishing between analog and digital,
This means that the performance of the circuit shown in FIG. 3 is good.

Therefore, consider converting the analog circuit shown in FIG. 3 directly into digital form. However, if the circuit shown in FIG. 3 were to be digitized as is, there would be a portion where the wiring between blocks would be long, for example from the frequency converter 7 to the changeover switch 2.

From the standpoint of IC design and manufacturing, when the wiring length between blocks is long, the delay caused therein varies greatly, making manufacturing and design management difficult.

Particularly when transmitting high-frequency signals, this delay becomes a problem, as it can impede the design or cause malfunction. Furthermore, if the third circuit block is digitized as it is, it becomes difficult to perform individual performance tests on each block. If test wiring is provided in each block for individual performance testing of each block, there are problems such as the wiring area becoming large.

Therefore, this invention can solve the problems caused by long wiring and the inconvenience of testing the performance of each block when digitizing a high-performance signal processing circuit that has been cultivated using analog methods. The purpose is to provide a digital video signal processing circuit.

[Structure of the Invention (Means for Solving the Problem) This invention provides a digital video@signal processing circuit having a plurality of circuit blocks for digitally processing a video signal. Second. Third switch means are provided. The first switch means is configured to switch between the first and second switch means.
A signal input/output terminal from outside the block is connected to each input terminal of the block, and an output terminal thereof is connected to a signal processing section within the block. The second switch means connects the first switch means to the input end of the first switch means, respectively. A second output end is connected. Third
The switch means has an output end connected to the input end of the second switch means, a first input end connected to the output end of the first switch means, and a second input end connected to the signal processing section. connected to the output end of the With this, by controlling the switch means, it is possible to switch any of the signal input and output terminals to the input and output relationship for the signal processing section, and to pass the signal processing section between the signal input and output terminals. It is possible to connect directly to the through state without any need to connect.

(Function) With the above means, it is easy to switch the direction of signal flow between each digitized block between recording and playback, and even when inspecting each block, blocks that are not subject to inspection are placed in a through state. The input/output relationship of the target block can be established between the board terminals on which the block is configured.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, and shows one block of a digital video signal processing section. This block is an example of a low pass filter 58. The signal input/output terminals 58a, 58b can be in an input/output relationship from either of them.

The first switch means 101 has a first input terminal connected to the signal input/output terminal 58a, and a second input terminal connected to the signal input/output terminal 58b. The output end of this first switch means 101 is connected to the input end of the signal processing section 100. The second switch means 102 has a first output terminal connected to the signal input/output terminal 58a and a second output terminal connected to the signal input/output terminal 58b. The third switch means 103 has an output terminal connected to the second switch means 102.
The first input terminal is connected to the input terminal of the first output means 1.
The second input terminal is connected to the output terminal of signal processing section 1.
Connected to the output terminal of 00.

1st. Second. Third switch means 101゜102.10
3 are each composed of a three-state buffer circuit, and the first . The second switch means 101, 102 are controlled by the recording/reproduction switching signal R/P. Further, the third switch means 103 is controlled by an output from a register 90 that stores a control signal.

Now, suppose that the VTR is in the recording operation mode and the low-frequency converted color signal is supplied to the input/output terminal 58a.
The first switch means 101 makes the buffer circuit 01R conductive, and the second switch means 102 makes the buffer circuit 02R conductive.
conducts. Further, the third switch means 103 guides the output of the signal processing section 100 to the second switch means 102.

Therefore, the low frequency conversion color signal inputted to the signal input/output terminal 58a is filtered by the signal processing section 100, and is outputted to the signal input/output terminal 58b.

Next, during reproduction of the VTR, the reproduced low frequency converted color signal is introduced to the signal input output f4A58b.

At this time, the buffer circuit OIP of the first switch means 101 is conductive, and the buffer circuit 02P of the second switch means 102 is conductive. Further, the third switch means 10
3 leads the output of the signal processing section 100 to the second switch means 102 as before. Therefore, the low frequency conversion color signal inputted to the signal input/output terminal 58b is transmitted to the signal processing section 10o.
The signal is filtered at the signal input output *58a.

Next, in order to test or inspect a block other than this block, if you want to put this block into a through state and allow only the test signal to pass through, use the third switch means 1.
03 is switched by a control signal to select the output of the first switch means 101 and lead it to the input end of the second switch means 102.

The first and second switch means 101 and 102 may be in either the recording or reproducing state. In this way, the signal input/outputs 158a and 58b can be brought into a through state. Note that in the signal processing section, a low-pass filter section 10A and a high-pass filter section 10B are provided in series, and the high-pass filter section 10B functions as a direct current cutter for the output of the low-pass filter section 10A.

FIG. 1(b) shows an example of the configuration of the high-pass filter section 10B. In this filter section 10B, input/output terminals 200 and 201 are provided, and a switch means 203 is provided. During recording or reproduction, the output of the high-pass filter section 10B is guided to the signal input/output 1201 via the switch means 203, but the output of the adjacent low-pass filter section 10A is
When the terminals 200 and 201 are to be in a through state in order to conduct a test, the switch 203 can short-circuit the terminals 200 and 201 using a control signal. In this example, there is one switch 203, but a plurality of switch means using three-state buffer circuits may be provided as shown in FIG.

FIG. 2 shows a digital video signal processing circuit constructed by applying the idea of FIG. 1 to each block.

The recording operation of the VTR will be explained.

The composite video signal from the input section 51 is input to an analog-to-digital converter 53 via a switch 52 and converted into a digital signal. The digital video signal is supplied to a digital delay circuit 55 via a three-state buffer circuit 54. The purpose of the digital delay circuit 55 is to obtain time correction with the luminance signal processing circuit section. The output of the digital delay circuit 55 is input to a digital comb filter 56 for luminance and color signal separation and color signal filtering, APC.

Receives ACC processing. The digital color signal output from the digital comb filter 56 is sent to the digital frequency converter 5.
7 and undergoes frequency conversion processing as shown in Reference 1.2. The low-pass converted digital color signal is supplied to a low-pass filter 58 and filtered. This low-pass filter 58 is as described in FIG. The digital color signal derived from the low-pass filter 58 is supplied to a digital-to-analog converter 60 via a three-state buffer circuit 59 and converted into an analog signal. The signal is then led to the recording amplifier via switch 61.

On the other hand, the synchronization separation circuit 72 separates a horizontal synchronization signal from the digital luminance signal of the input section 71 and supplies it to the phase comparison and mislock detection circuit #I81. The synchronization separation circuit 72 also creates a burst gate pulse BGP and supplies it to the APC circuit 73 and the comb filter 56 .

The phase comparison and mislock detection circuit 81 is a digital VC
Detects the phase error between the output of VC083 and the horizontal synchronizing signal, and sends the error information to control 6g of VC083 via switch 82.
The horizontal synchronization signal is supplied to the terminal to control the phase relationship between the horizontal synchronization signal and the digital oscillation output to a predetermined relationship. The output of digital VC083 is SIN in memory (ROM) 84.
It is used for address designation for reading data and COS data. That is, the color signal data is multiplied by SIN data and COS data as coefficients, and the result is added or subtracted to obtain an orthogonal modulation output, and by passing this through a filter, a frequency conversion output is obtained.

The APC circuit 73 detects phase error information of the burst signal and supplies it to the digital-to-analog converter 74. Thereby, during the recording operation, the frequency of the VCXO 77 is controlled via the switch 75. The output of the VCXO 77 is used as a system clock for the signal processing section. Therefore, by controlling the phase of the system clock, the sampling phase can be controlled, and the phase of burst data can also be controlled.

90 is the register explained in FIG. 1, which is a circuit for storing a control eR signal specifying the recording/reproducing operation mode;
The output of this circuit controls the switching means of each circuit block and determines the flow of signals.

Next, the path during playback on the VTR will be explained.

The low frequency converted color signal is supplied from the input section 91 to the analog-to-digital converter 53 via the switch 52. The digital color signal is input to low pass filter 58 via three-state buffer circuit 64 . The switching of the signal flow of this filter 58 is as explained in FIG. The filtered signal is converted into a digital color signal at the original frequency by a frequency converter 57, and is then converted to a digital color signal at the original frequency by a comb filter 56.
The crosstalk is removed by the delay circuit 55, and the output is sent to the delay circuit 55,
The digital-to-analog converter 60 reproduces the signal through a three-state buffer circuit 65 into an analog color signal. The signal is then supplied via the switch 61 to a circuit for combining it with a luminance signal. Note that three-state buffer circuits 54, 64 and 5
9.65 are also switched by being supplied with the output from the register 90, respectively.

In this system as well, the VC083 is controlled to be phase-synchronized with the horizontal synchronizing signal during the recording operation, but is controlled in phase by the output information of the APC circuit 73 during the reproducing operation.

As described above, this embodiment inherits the excellent performance cultivated in the analog system and solves the problems that would occur if the famous system was digitized as is.

[Effects of the Invention] As described above, according to the present invention, in the case of a system in which the order of blocks through which signals flow is switched between recording and reproduction, and in which as many circuit blocks as possible are used for both recording and reproduction, By providing a simple switch means and its control means, there is no need for long wiring between blocks.
Short wiring between adjacent broncs can be used. Furthermore, by controlling the switch means, it is possible to test or measure individual blocks up to the soil with test or measurement equipment connected to the same board terminal, and there is no need to prepare special wiring for the test.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of this invention, FIG. 2 is a block diagram showing a digital circuit system to which this invention is applied, and FIG. 3 is a circuit diagram showing a conventional analog video signal processing circuit. . 100...Signal processing section, 101 102, 103...
・First. Second. third switch means, 52,61.75
．． 82... Switch, 53... Analog-to-digital converter, 54, 59, 64.65... Three-state buffer circuit, 55... Delay circuit, 56... Comb filter, 57... Frequency Converter, 58...Low pass filter, 60...Digital analog converter, 72...
Synchronous separation circuit, 73...APC circuit, 74...digital-analog converter, 77...vcxo, 81...
Phase comparison and mislock detection circuit, 83...VCO1
84...Memory, 90...Register. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

[Claims] In a digital video signal processing circuit having a plurality of circuit blocks for digitally processing a video signal, each circuit block is provided integrally with a first and second input terminal connected to a signal from outside the block. a first switch means to which a signal input/output end is connected and whose output end is connected to a signal processing section in the block; and first and second output ends respectively connected to the input end of the first switch means. a connected second switch means; an output end is connected to the input end of the second switch means;
A digital device characterized in that a first input terminal is connected to an output terminal of the first switch means, and a second input terminal is provided with a third switch connected to an output terminal of the signal processing section. Video signal processing circuit.