JPH01243487A - Semiconductor laser driving circuit - Google Patents

Semiconductor laser driving circuit

Info

Publication number
JPH01243487A
JPH01243487A JP6941988A JP6941988A JPH01243487A JP H01243487 A JPH01243487 A JP H01243487A JP 6941988 A JP6941988 A JP 6941988A JP 6941988 A JP6941988 A JP 6941988A JP H01243487 A JPH01243487 A JP H01243487A
Authority
JP
Japan
Prior art keywords
current
fet
diode
signal current
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6941988A
Other languages
Japanese (ja)
Other versions
JP2702958B2 (en
Inventor
Kiichi Yamashita
喜市 山下
Isao Arai
功 新井
Yasushi Hatta
八田 康
Nobuo Kodera
小寺 信夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63069419A priority Critical patent/JP2702958B2/en
Publication of JPH01243487A publication Critical patent/JPH01243487A/en
Application granted granted Critical
Publication of JP2702958B2 publication Critical patent/JP2702958B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S3/00Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
    • H01S3/02Constructional details
    • H01S3/03Constructional details of gas laser discharge tubes
    • H01S3/036Means for obtaining or maintaining the desired gas pressure within the tube, e.g. by gettering, replenishing; Means for circulating the gas, e.g. for equalising the pressure within the tube

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To contrive stabilization of signal current by a method wherein the gate potential of an FET is clamped by a clamping circuit consisting of a diode and a resistor, and a resistor to be used for current limitation is inserted between the source of the FET and a negative power terminal. CONSTITUTION:The gate voltage of an FET 13 is applied through the intermediary of a clamping circuit 52 for the stabilization of a signal current, and the clamping circuit is biased by a constant current source 51. Also, a resistor 54 is connected to the source of the FET 13, and the fluctuation of the signal current caused by the variation in environmental condition and the manufacturing deviation of the FET 13 is suppressed utilizing a current negative feed-back effect. Said clamping circuit is composed of a diode 53. Utilizing the temperature dependency of the above- mentioned diode 53, terminal voltage gradually decreases when the temperature of the diode goes up, the gate potential of the FET 13 comes down with the rise of temperature, and the current. As a result, the temperature dependency of the signal current can be erased by setting the current density of the diode 53 in such a manner that the amount of the above-mentioned current attenuation and the amount of current increased by the temperature dependency of the threshold voltage of the FET 13 will be cancelled each other.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光通信や光ディスクなどにおける半導体レーザ
光源の駆動回路に係り、特に、FETを用いたIC化に
好適なレーザ駆動回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a drive circuit for a semiconductor laser light source in optical communications, optical disks, etc., and particularly relates to a laser drive circuit suitable for integration into an IC using FETs.

〔従来の技術〕[Conventional technology]

近年、G b / s光伝送システムの開発が活発化し
ているが、このようなシステムの実用化には装置の高速
化、信頼性の向上、消費電力の低減、小形化などの観点
から、モノリシックエ=C技術の導入が必須の状況にあ
る。G b / s伝送用ICは主としてSiバイポー
ラ技術の適用により実用化が進められてきた。しかし、
高速・大電流スイッチグが要求される半導体レーザ(以
下、LDと略す)の駆動用ICの実現はSiバイポーラ
技術では難しく、このためGaAsMESFET (シ
ョットキ接合形電界効果トランジスタ)技術が適用され
ている。
In recent years, the development of Gb/s optical transmission systems has become active, but in order to put such systems into practical use, monolithic systems are required from the viewpoints of speeding up equipment, improving reliability, reducing power consumption, and making it smaller. The situation is such that the introduction of E=C technology is essential. Gb/s transmission ICs have been put into practical use mainly by applying Si bipolar technology. but,
It is difficult to realize a driving IC for a semiconductor laser (hereinafter abbreviated as LD) that requires high-speed, large-current switching using Si bipolar technology, and therefore GaAs MESFET (Schottky junction field effect transistor) technology has been applied.

第2図は、G a A s M E S F E T技
術を用いて実現されたLD駆動用ICの従来構成例を示
したものである。半導体レーザは発振閾電流を有するた
め、通常、バイアス電流に信号電流を重畳した電流で駆
動される。第2図で、FETII、12゜13が電流ス
イッチ14を構成しており、第1及び第2の信号入力レ
ベルに応じてFET13から供給される電流をFETI
I、12の差動対によってスイッチングして生成される
信号電流で端子5に接続されるLDを変調する。一方、
バイアス電流はバイアス電流供給回路9より端子5を介
してLDに供給される。LDの発振閾電流は大きな温度
依存性をもつため、端子7に印加される制御信号によっ
てバイアス電流が制御され光出力の安定化が図られる。
FIG. 2 shows an example of a conventional configuration of an LD driving IC realized using the GaAs MESFET technology. Since a semiconductor laser has an oscillation threshold current, it is usually driven with a current obtained by superimposing a signal current on a bias current. In FIG. 2, FET II, 12°13 constitutes a current switch 14, which switches the current supplied from FET 13 according to the first and second signal input levels.
The LD connected to terminal 5 is modulated by the signal current generated by switching by the differential pair I and 12. on the other hand,
The bias current is supplied from the bias current supply circuit 9 to the LD via the terminal 5. Since the oscillation threshold current of the LD has a large temperature dependence, the bias current is controlled by the control signal applied to the terminal 7, and the optical output is stabilized.

又、信号電流の設定は端子6に印加される電圧レベルを
調整することによって行なわれる。尚、バイアス供給回
路9及びレベルシフト回路8は、例えば信学技報5SD
85−140に示されるように、夫々、FET及びFE
Tとダイオードで構成される。
Further, the signal current is set by adjusting the voltage level applied to the terminal 6. The bias supply circuit 9 and the level shift circuit 8 are, for example, IEICE Technical Report 5SD.
85-140, respectively, FET and FE
It consists of a T and a diode.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

信号電流は光出力信号の振幅と一対一の関係にあるため
、温度、電源電圧などの環境条件の変化やデバイスの製
造偏差に対する安定化が不可欠である。上記、従来技術
はこれらの点について配慮されていないため、端子6に
電圧を供給する外部回路が必要となること、又、この回
路には環境条件の変動やFET13の製造偏差を抑圧す
るための複雑な機能が必要となり、規模も大きくなり易
いこと、信号電流が端子6の電圧に敏感に反応すること
などの他、使い勝手も悪いと云う問題があった。
Since the signal current has a one-to-one relationship with the amplitude of the optical output signal, it is essential to stabilize it against changes in environmental conditions such as temperature and power supply voltage and manufacturing deviations of the device. The above-mentioned conventional technology does not take these points into consideration, so an external circuit is required to supply voltage to the terminal 6, and this circuit also includes a There are problems in that it requires complicated functions, tends to be large in size, the signal current sensitively reacts to the voltage at the terminal 6, and is not easy to use.

本発明の目的は上記従来技術の欠点を解消し。The object of the present invention is to overcome the drawbacks of the prior art mentioned above.

内部組込みが可能で簡易な補償回路によって信号電流を
安定化できるIC化に適した半導体レーザ駆動回路を提
供することにある。
It is an object of the present invention to provide a semiconductor laser drive circuit suitable for IC implementation, which can be incorporated internally and can stabilize a signal current with a simple compensation circuit.

〔課題を解決するための手段〕[Means to solve the problem]

上記本発明の目的は第2図においてFET13のゲート
電位をダイオードと抵抗から成るクランプ回路によって
クランプし、且つ、FET13のソースと負電源端子2
の間に電流制限用の抵抗を挿入することにより達成され
る。
The object of the present invention is to clamp the gate potential of FET 13 by a clamp circuit consisting of a diode and a resistor in FIG.
This is achieved by inserting a current limiting resistor between the two.

〔作用〕[Effect]

以下、第1図を用いて本発明の基本動作を説明する。信
号電流の安定化のために、クラップ回路52を介してF
ET13のゲート電圧が与えられる。クラップ回路は定
電流源51によりバイアスされる。又、抵抗54をFE
T13のソースに接続し電流負帰還効果を利用して環境
条件の変化やFET13の製造偏差による信号電流の変
動を抑圧している。第1図は、本発明の基本的な実施例
を示したもので、クランプ回路をダイオード53で構成
している。今、定電流源51の出力インピーダンスをR
1、ダイオード53の両端の電圧をVD及び流れる電流
を工、端子1の電位をov。
The basic operation of the present invention will be explained below with reference to FIG. In order to stabilize the signal current, the F
The gate voltage of ET13 is applied. The clap circuit is biased by a constant current source 51. Also, the resistor 54 is FE
It is connected to the source of T13 and uses the current negative feedback effect to suppress fluctuations in the signal current due to changes in environmental conditions or manufacturing deviations of FET13. FIG. 1 shows a basic embodiment of the present invention, in which the clamp circuit is composed of a diode 53. Now, the output impedance of the constant current source 51 is R
1. Set the voltage across the diode 53 to VD and the flowing current, and set the potential at terminal 1 to OV.

端子2の電圧をv58とすると次式が成立つ6R1I 
+ V□=  Vss    ’・’・”−(1)又、
IとV。どの関係は で与えられる。ここで、IO,βは物理定数である。従
って、電源電圧V。の変動によるV。の変化は式(1)
(2)より となる。1/βは約25’mVであるから、I=1mA
とすればr6は25Ωとなる。又、RfはV。
If the voltage at terminal 2 is v58, the following formula holds true: 6R1I
+ V□= Vss '・'・”−(1) Also,
I and V. Which relationships are given in. Here, IO and β are physical constants. Therefore, the power supply voltage V. V due to fluctuations in . The change in is expressed as equation (1)
(2) It becomes more. Since 1/β is about 25'mV, I=1mA
Then, r6 becomes 25Ω. Also, Rf is V.

を−5,2V、Vdを0.6vとすれば4.6にΩとな
る。よって2式(3)からV。の変化量は電源電圧の1
0%の変動に対して =2.8(mV) と非常に対さく、電源電圧変動による信号電流の変化を
僅小にできる。ちなみに、抵抗54の値は10Ω程度で
あるから信号電流の変化量は約0.3mAである。
If it is -5.2V and Vd is 0.6V, it becomes 4.6Ω. Therefore, from equation 2 (3), V. The amount of change in is 1 of the power supply voltage.
=2.8 (mV) for a 0% variation, which is extremely low, making it possible to minimize changes in the signal current due to variations in the power supply voltage. Incidentally, since the value of the resistor 54 is about 10Ω, the amount of change in the signal current is about 0.3 mA.

ところで、FET13の閾電圧■t□と相互コンダクタ
ンクス係数には温度依存性をもち、温度上昇により前者
は深くなり電流を増加する方向に、後者は小さくなり電
流を減少する方向に働く。しかし、総体的には閾電圧の
変動かに値の変動より大きいため、閾電圧の温度依存性
を低減ることが課題である。その方策として本発明では
ダイオード53の温度依存性を利用している。ダイオー
ドは一般に温度が上昇すると端子電圧が漸減する。
By the way, the threshold voltage ■t□ and the mutual conductance coefficient of the FET 13 have temperature dependence, and as the temperature rises, the former becomes deeper and increases the current, and the latter becomes smaller and acts in the direction of decreasing the current. However, overall, the variation in threshold voltage is larger than the variation in value, so reducing the temperature dependence of threshold voltage is an issue. As a measure against this, the present invention utilizes the temperature dependence of the diode 53. In general, the terminal voltage of a diode gradually decreases as the temperature rises.

従って、第1図の結線によれば、FET13のゲート電
位が温度上昇と共に下降し、電流が減少する。それ故、
この電流の減少分とFET13の閾電圧の温度依存性に
よって増加する分とが相殺するようにダイオード53の
電流密度を設定すれば信号電流の温度依存性を消去でき
る。
Therefore, according to the connection shown in FIG. 1, the gate potential of the FET 13 decreases as the temperature rises, and the current decreases. Therefore,
The temperature dependence of the signal current can be eliminated by setting the current density of the diode 53 so that the decrease in current is offset by the increase due to the temperature dependence of the threshold voltage of the FET 13.

G a A s M E S F E Tでは閾電圧の
製造偏差が他の定数に比べて最も大きい。よって、この
対策が信号電流の安定化には必須となる。抵抗53の値
をRg、信号電流をI8とすると工、はI s= K(
Vo  Vt−RI s)”で表わされる。従って、信
号電流の変化分ΔI8は閾電圧の変動分をΔVtとする
と式(4)よりとなる。ちなみに、Vt= IV 、R
g=10Ω。
In G a As M E S F E T, the manufacturing deviation of the threshold voltage is the largest compared to other constants. Therefore, this measure is essential for stabilizing the signal current. If the value of the resistor 53 is Rg and the signal current is I8, then Is=K(
Vo Vt - RI s)''. Therefore, the change in signal current ΔI8 is given by equation (4), where ΔVt is the change in threshold voltage. Incidentally, Vt=IV, R
g=10Ω.

I、=50mA、Vt)=−0,6Vとするとに=41
mA/V”となるので信号電流の変動量は3 、8 m
 A / Vとなる。閾電圧の許容変動範囲を±0.2
vとすると信号電流変動量を〜0.8mAに抑えること
ができる。
If I, = 50mA, Vt) = -0.6V, then = 41
mA/V", so the amount of fluctuation in the signal current is 3.8 m
It becomes A/V. ±0.2 threshold voltage variation range
When it is set to v, the amount of signal current fluctuation can be suppressed to ~0.8 mA.

〔実施例〕〔Example〕

第3図に本発明による一実施例の構成図を示す。 FIG. 3 shows a configuration diagram of an embodiment according to the present invention.

同図では、任意の温度係数をもつクランプ電圧を発生さ
せるため、クランプ回路52をダイオード6と電圧分割
用抵抗63.64で構成している。
In the figure, a clamp circuit 52 is constructed of a diode 6 and voltage dividing resistors 63 and 64 in order to generate a clamp voltage having an arbitrary temperature coefficient.

又、定電流源51は抵抗62で置き換えている。Further, the constant current source 51 is replaced with a resistor 62.

尚、バイアス供給回路9はFET66と電流制限用の抵
抗65(無くてもよい)とで構成している。
The bias supply circuit 9 is composed of a FET 66 and a current limiting resistor 65 (which may be omitted).

61は入力信号の波形整形と共に電流スイッチ14を高
速駆動するための入力バッファ回路である。電流スイッ
チング動作については第2図で説明したので、ここでは
信号電流の安定化について述べる。
61 is an input buffer circuit for shaping the waveform of the input signal and driving the current switch 14 at high speed. Since the current switching operation has been explained with reference to FIG. 2, stabilization of the signal current will be described here.

FET、13のに値、閾電圧の温度係数を夫々δ6.δ
Vts又、クランプ電圧V。(第3図中のA点−負電源
端子2間電圧)の温度係数をδvaとするとFET13
を流れる信号電流工、の温度係数δrsは式(4)より
次式で与えられる。
The value and temperature coefficient of threshold voltage of FET 13 are respectively δ6. δ
Vts also clamp voltage V. If the temperature coefficient of (voltage between point A and negative power supply terminal 2 in Figure 3) is δva, FET13
The temperature coefficient δrs of the signal current flowing through is given by the following equation from equation (4).

・・・・・・・・・ (6) ここで、KOI vaot vtoは初期設定時の標準
値。
・・・・・・・・・ (6) Here, KOI vaot vto is the standard value at the time of initial setting.

R,、、R,4は抵抗63.64の抵抗値を示す。ゲー
ト長1μmのG a A s M E S F E T
では、通常、δに/KOはほぼ−0,3%、δvtは−
1,6mV/℃、又、δvo (クランプダイオード5
3の温度係数)は−1,4mV/’Cである。第4図は
これらの値を用い信号電流を50mA、抵抗R54の値
を10Ω、ダイオード53の両端電圧を0.6Vに設定
した時の信号電流の温度係数とクランプ電圧VQとの関
係を示したものである。同図から分るように、信号電流
の温度係数はクランプ電圧vaによって任意に設定でき
、voが大きくなるに伴ない負の係数が増大、即ち、信
号電流は減少する。LDをペルチェ素子などで温度制御
する場合には、信号電流の温度係数は零に近い稲光出力
信号は安定化する。第4図によればクランプ電圧が0.
225Vの時、信号電流の温度係数を零にできることが
分る。尚、LDを温度制御せずに使用する場合も多い。
R, , R,4 indicates the resistance value of the resistor 63.64. G a As M E S F E T with gate length of 1 μm
Then, normally, δ/KO is approximately -0.3%, and δvt is -
1.6 mV/℃, and δvo (clamp diode 5
3) is -1.4 mV/'C. Using these values, Figure 4 shows the relationship between the temperature coefficient of the signal current and the clamp voltage VQ when the signal current is set to 50 mA, the value of the resistor R54 is set to 10 Ω, and the voltage across the diode 53 is set to 0.6 V. It is something. As can be seen from the figure, the temperature coefficient of the signal current can be arbitrarily set by the clamp voltage va, and as vo increases, the negative coefficient increases, that is, the signal current decreases. When the temperature of the LD is controlled using a Peltier element or the like, the lightning output signal is stabilized because the temperature coefficient of the signal current is close to zero. According to FIG. 4, the clamp voltage is 0.
It can be seen that when the voltage is 225V, the temperature coefficient of the signal current can be made zero. Note that the LD is often used without temperature control.

このような場合には、光出力の電流に対する効率(外部
微分量子効率と呼ばれる)は温度上昇に伴い低下する。
In such a case, the efficiency of optical output with respect to current (referred to as external differential quantum efficiency) decreases as the temperature rises.

即ち、高温では光出力信号が減少する。それ故、この光
出力信号の減少を軽減するには信号電流の温度係数を正
にする必要があり、クランプ電圧■。を0.225V(
Koχ95mA/V2)以下に設定すればよい。
That is, the optical output signal decreases at high temperatures. Therefore, to alleviate this decrease in the optical output signal, it is necessary to make the temperature coefficient of the signal current positive, and the clamp voltage ■. 0.225V (
It is sufficient to set it to 95mA/V2) or less.

次に、信号電流の電源電圧依存性を求めてみる。Next, let's find the power supply voltage dependence of the signal current.

ダイオード53に流れる電流を抵抗63.64に流れる
電流より1桁以上大きくなるようにRg3゜R64を設
定すれば、ダイオード両端の電圧変動は式(3)で与え
られる。従って、この変動がR63とRg4で抵抗分割
されるから信号電流の変動分は式(3)′より R!   Rg     R63+ R64で与えられ
る。ここで、vaを0.225Vに設定するとR111
4/ (RG3+ Rg4)は0 、375 トナル、
l’l’ら第1図の構成に比べ、結果電流の変動も0.
375となるから第1図の構成に比べ、信号電流の変動
も0.375倍となる。ちなみに、電源電圧が±0.5
v変動した時の信号電流の変動量は高々±0.1mAと
なる。
If Rg3°R64 is set so that the current flowing through the diode 53 is at least one order of magnitude larger than the current flowing through the resistor 63, 64, the voltage fluctuation across the diode is given by equation (3). Therefore, since this fluctuation is divided by the resistance between R63 and Rg4, the fluctuation of the signal current is R! from equation (3)'. Rg R63+ R64 is given. Here, if va is set to 0.225V, R111
4/ (RG3+Rg4) is 0, 375 tonal,
Compared to the configuration shown in FIG. 1, the resulting current fluctuation is 0.
375, the fluctuation of the signal current is also 0.375 times that of the configuration shown in FIG. By the way, the power supply voltage is ±0.5
The amount of variation in the signal current when v varies is at most ±0.1 mA.

FET13の閾電圧の製造偏差による信号電流の変動量
は式(5)より求めることができる。式(5)におイテ
、V、を0.225V、Kを95mA/V”Rgを10
Ω、vLを一1■とすれば信号電流の変動量は9 、6
 m A / Vとなる。閾電圧が一1vのFETでは
一般に製造偏差を±0.2V以下に抑えることは容易で
あるので、実用上の信号電流変動量は1.9mAとなり
標準値の±3.8%と小さな値に抑えることができる。
The amount of variation in the signal current due to the manufacturing deviation of the threshold voltage of the FET 13 can be obtained from equation (5). In formula (5), V is 0.225V, K is 95mA/V''Rg is 10
If Ω and vL are -1■, the amount of fluctuation of the signal current is 9,6
mA/V. For FETs with a threshold voltage of 1 V, it is generally easy to suppress the manufacturing deviation to below ±0.2 V, so the practical signal current fluctuation amount is 1.9 mA, which is a small value of ±3.8% of the standard value. It can be suppressed.

第5図は信号電流安定化回路の他の一実施例を示したも
のである。同図では第1図の定電流源51をゲート・リ
ース間を短絡接続したFET101で、又、クランプ回
路52を直列接続されたn個のダイオード201−1〜
201−nと抵抗R301+ 302とで構成している
。この場合はFETl0Iがほぼ定電流源として働くた
め、信号電流は電源電圧に対して殆んど変動しない利点
がある。クランプ回路はダイオードの個数、電流値と抵
抗R301y 302の値を適当に選ぶことにより任意
の温度係数をもつ出力電圧をFET13に供給すること
ができる。
FIG. 5 shows another embodiment of the signal current stabilizing circuit. In the same figure, the constant current source 51 of FIG. 1 is an FET 101 whose gate and lease are short-circuited, and the clamp circuit 52 is connected with n diodes 201-1 to 201-1 connected in series.
201-n and resistor R301+302. In this case, since FETl0I functions almost as a constant current source, there is an advantage that the signal current hardly changes with respect to the power supply voltage. The clamp circuit can supply an output voltage with an arbitrary temperature coefficient to the FET 13 by appropriately selecting the number of diodes, the current value, and the value of the resistor R301y 302.

以上は負荷としてLDを対象としてきたが、本発明は基
本的には電流切替回路であり、負荷としてはインピーダ
ンス回路であってもよい。これから1本発明が50Ωの
ライントライバや信号レベル変換器、増器等高速・大振
幅で動作する必要のある回路へも適用可能であることは
明らかである。
Although the above description has focused on an LD as a load, the present invention is basically a current switching circuit, and the load may be an impedance circuit. It is clear from this that the present invention is also applicable to circuits that need to operate at high speed and large amplitude, such as 50Ω line drivers, signal level converters, and amplifiers.

〔発明の効果〕〔Effect of the invention〕

本発明によれば定電流源とクランプ回路から成る簡易な
信号電流安定化回路により、LD駆動回路として重要な
電源電圧や温度などの環境条件変化による信号電流の変
動を数%に抑圧することができる。又、FETの製造偏
差に対してもソースに接続された抵抗の電流負帰還効果
によって信号電流の変動を数%に抑えることができる0
以上の結果によりモノリシックIC化が可能となり、使
い勝手のよい単一電源ののICを実現できる。
According to the present invention, by using a simple signal current stabilizing circuit consisting of a constant current source and a clamp circuit, fluctuations in signal current due to changes in environmental conditions such as power supply voltage and temperature, which are important for an LD drive circuit, can be suppressed to a few percent. can. Furthermore, due to the current negative feedback effect of the resistor connected to the source, fluctuations in the signal current can be suppressed to a few percent due to manufacturing deviations of the FET.
The above results make it possible to create a monolithic IC, which makes it possible to realize an easy-to-use IC with a single power supply.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるLD駆動回路の基本構成図、第2
図は従来のLD駆動回路の構成図、第3図は本発明によ
るLD駆動回路の一実施例を示す接続図、第4図は本発
明によるLD駆動回路における信号電流温度係数の一計
算例を示す図、第5図は本発明による信号電流安定化回
路の一実施例を示す接続図である。 14・・・電流スイッチ、11,12,13,101・
・・FET、60・・・信号電流安定化回路、53゜2
01−1〜201−n・・・ダイオード、51・・・定
電流源、54,63,64,301,302・・・抵抗
、52・・・クランプ回路、9・〜・バイアス電流供給
回路、8・・・レベルシフト回路、61・・・入力バッ
ファ回路。 第1図 菫z8 第3回 2ランア電、−%(v)
FIG. 1 is a basic configuration diagram of an LD drive circuit according to the present invention, and FIG.
Figure 3 is a configuration diagram of a conventional LD drive circuit, Figure 3 is a connection diagram showing an embodiment of the LD drive circuit according to the present invention, and Figure 4 is an example of calculation of the signal current temperature coefficient in the LD drive circuit according to the present invention. FIG. 5 is a connection diagram showing an embodiment of the signal current stabilizing circuit according to the present invention. 14... Current switch, 11, 12, 13, 101.
...FET, 60...Signal current stabilization circuit, 53゜2
01-1 to 201-n... Diode, 51... Constant current source, 54, 63, 64, 301, 302... Resistor, 52... Clamp circuit, 9... Bias current supply circuit, 8... Level shift circuit, 61... Input buffer circuit. Figure 1 Sumire z8 3rd 2-run aden, -% (v)

Claims (1)

【特許請求の範囲】 1、レーザに信号電流を供給する電流切替回路とバイア
ス電流を供給するバイアス電流供給回路とから成る半導
体レーザ駆動回路において、上記電流切替回路をソース
結合されたFET差動対と該差動対FETに定電流を供
給するFETと該定電流供給用FETのソースに接続さ
れた抵抗とで構成し、前記定電流供給用FETのゲート
と前記抵抗の他端間に電圧クランプ回路を接続したこと
を特徴とする半導体レーザ駆動回路。 2、前記電圧クランプ回路を単一又は複数個の直列接続
されたダイオードと該ダイオードの両端の電圧を分割す
る複数の抵抗で構成し、該抵抗の接続点より出力電圧を
取り出して前記定電流供給用FETのゲートに供給する
よう構成したことを特徴とする請求項1記載の半導体レ
ーザ駆動回路。
[Claims] 1. In a semiconductor laser drive circuit comprising a current switching circuit that supplies a signal current to the laser and a bias current supply circuit that supplies a bias current, the current switching circuit is connected to a source-coupled FET differential pair. A voltage clamp is provided between the gate of the constant current supply FET and the other end of the resistor. A semiconductor laser drive circuit characterized by connecting circuits. 2. The voltage clamp circuit is composed of a single or multiple series-connected diodes and a plurality of resistors that divide the voltage across the diodes, and the output voltage is taken out from the connection point of the resistors to supply the constant current. 2. The semiconductor laser drive circuit according to claim 1, wherein the semiconductor laser drive circuit is configured to supply the signal to the gate of the FET.
JP63069419A 1988-03-25 1988-03-25 Semiconductor laser drive circuit Expired - Fee Related JP2702958B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63069419A JP2702958B2 (en) 1988-03-25 1988-03-25 Semiconductor laser drive circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63069419A JP2702958B2 (en) 1988-03-25 1988-03-25 Semiconductor laser drive circuit

Publications (2)

Publication Number Publication Date
JPH01243487A true JPH01243487A (en) 1989-09-28
JP2702958B2 JP2702958B2 (en) 1998-01-26

Family

ID=13402076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63069419A Expired - Fee Related JP2702958B2 (en) 1988-03-25 1988-03-25 Semiconductor laser drive circuit

Country Status (1)

Country Link
JP (1) JP2702958B2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58105440A (en) * 1981-12-18 1983-06-23 Oki Electric Ind Co Ltd Optical modulating circuit of clamp potential variable video signal
JPS622580A (en) * 1985-06-27 1987-01-08 Fujitsu Ltd Laser diode driver circuit
JPS6323355A (en) * 1986-07-16 1988-01-30 Fujitsu Ltd Photonic integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58105440A (en) * 1981-12-18 1983-06-23 Oki Electric Ind Co Ltd Optical modulating circuit of clamp potential variable video signal
JPS622580A (en) * 1985-06-27 1987-01-08 Fujitsu Ltd Laser diode driver circuit
JPS6323355A (en) * 1986-07-16 1988-01-30 Fujitsu Ltd Photonic integrated circuit

Also Published As

Publication number Publication date
JP2702958B2 (en) 1998-01-26

Similar Documents

Publication Publication Date Title
US4274014A (en) Switched current source for current limiting complementary symmetry inverter
US4636742A (en) Constant-current source circuit and differential amplifier using the same
US4207538A (en) Temperature compensation circuit
US3984780A (en) CMOS voltage controlled current source
KR920010005B1 (en) Syhmetric integrated amplifier
JP2751422B2 (en) Semiconductor device
US4812784A (en) Temperature stable voltage controlled oscillator with super linear wide frequency range
US3786364A (en) Semiconductor amplifier protection
EP0268345B1 (en) Matching current source
US3248569A (en) Amplifier passive nonlinear feedback voltage limiting network
JPH01237807A (en) Semiconductor integrated circuit device
JPH01235416A (en) Fet logic circuit
US5661395A (en) Active, low Vsd, field effect transistor current source
JPH01243487A (en) Semiconductor laser driving circuit
US20050110525A1 (en) Current-mode logic circuit
US20030006842A1 (en) Split cascode driver
US5144405A (en) Temperature compensation apparatus for logic gates
KR100309028B1 (en) Gain control signal generator that tracks operating variations due to variations in manufacturing processes and operating conditions by tracking variations in dc biasing
JPS61273015A (en) Current switching circuit
JPH02177724A (en) Output buffer circuit
JPS622580A (en) Laser diode driver circuit
EP0063228B1 (en) Differential amplifier
Kotera et al. Constant-current circuit-biasing technology for GaAs FET IC
SU744914A1 (en) Device with s-type voltage-current output characteristic
SU905808A1 (en) Stabilizer diode

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees