JPH01236349A - Serial interface initializing system - Google Patents

Abstract

PURPOSE:To easily change the initialization of serial interfaces mutually between plural serial interface systems by changing the initialization of the opposite system from the processor of one's own system through a parallel interface. CONSTITUTION:Connection of buses of plural processors is performed by means of serial interfaces following the advice of a CCITT. Moreover, in order to cope with such a request as multimedia, multiprotocol, etc., a parallel interface 18 is provided in addition to the serial interfaces 16A and 16B so that changes in the initialization of the serial interfaces can be performed easily at a high speed and not only the serial interfaces of one's own system, but also the serial interfaces of the opposite system can be initialized from the processor of the other system.

Description

[Detailed Description of the Invention] [Summary of the Invention] This invention relates to an initial setting method for an inter-processor serial interface of a processing device composed of multiprocessors, multipaths, etc. In an initial setting method for a serial interface in a system in which buses of multiple processors are connected by a serial interface, the purpose is to enable changes to be made quickly by providing setting information from each processor. When changing the initial settings of one processor, it changes the initial settings of its own serial interface, and also sends the change information to the other system via the parallel interface. Configure it to change the initial settings.

[Industrial application field]

The present invention relates to an initial setting method for an inter-processor serial interface of a processing device configured with multiprocessors, multipaths, and the like.

Processing devices constituted by processors, memories, and the like can be made faster and have improved processing capabilities by distributing processing, such as by distributing two functions, so multipath and multiprocessorization is becoming a constant fF. In the case of multipath and multiprocessor systems, the problem of information transmission between processor systems, which did not occur in single processors and single hash systems, comes into focus.

There are two methods for transmitting information between processor systems: using a serial interface and using a parallel interface.
This is related to the initial settings managed by the other processor.

[Conventional technology]

Originally, information transmission between processors has been used in various ways depending on the purpose, and various hardware configurations have been selected depending on the purpose. For example, if local information is transmitted between processors, there is no problem whether it is a parallel interface or a serial interface, and various hardware configurations of parallel interfaces can be selected with flexibility. .

However, information transmission between processors to meet the hardware and software implementation requirements that require the unification of various interfaces related to the standardization of interface protocols, etc., which has become established in recent years, is naturally limited by the configuration of the hardware and software. It has to follow a fixed pattern.

For example, CCITT recommendation V, 25bis
When considering a device that protects a serial interface, the interface between processors is a serial interface, and the command system, electrical interface, etc. are also standardized. In such a case, it is not possible to arbitrarily implement a parallel interface.

What is shown in FIG. 1, excluding the dashed line frame, is a multiprocessor, multipath system in which processors are connected via serial interfaces. In this figure, 10A and 10B are processors, 12A and 12B are buses, 14A and 14B are memories, and 16A and 16B are serial interfaces.

To operate this system, serial interface 1
It is necessary to initialize 6A and 16B, but this initial setting is for serial interface 16A.

When the processors 10A and 1OB that manage the 16B are powered on, they read the initial setting information in the memories 14A and 14B connected to the buses 12A and 12B under their respective jurisdiction, and transfer that information to the respective serial interfaces 16A.
, write to 16B (10A to 16A, 10B to 16B
This is done by writing In other words, each serial interface receives initial settings by its respective managing processor, and cannot receive initial settings from a partner processor.

[Problem to be solved by the invention]

Conventionally, serial interface systems often have only one system mode (for this reason, predetermined initial setting information is stored in memory as program data, and this memory is read out before the system starts operating. In general, all that is required is to perform initial settings using the serial interface in operation. ...) to be dynamically changed and used in another application.

If it becomes necessary to change attributes during operation, it is common for the operator to manually operate a switch, etc., which is cumbersome, and since it is a serial interface, communication is slower than with a parallel interface. Since the speed is slow, there is a problem that it is not suitable for cases where immediacy is required.

Today, a wide variety of operations such as multimedia and multiprotocol are required, and it is extremely meaningful from the standpoint of cost, performance, and response to create an interface that can meet these demands.

The present invention has been made in view of the above-mentioned problems, and it is possible to quickly change the initial settings of a serial interface for managing a partner processor in a multiprocessor system by providing setting information from each other's processors. The purpose is to

[Means to solve the problem]

As shown in FIG. 1, in the present invention, a parallel interface 18 is provided in addition to serial interfaces 16A and 16B. It is normal for a multi-processor system to have a parallel interface as an interface for communication between processors. Therefore, if the system does not have a parallel interface, it must be installed, but if the system does have one, you can use it. often,
No special installation is required. In the present invention, the settings of the serial interface are changed as follows using this parallel interface.

[Effect]

When the system boots up, it is conventional, serial interface 16A is activated by processor 10A and serial interface 1 is activated according to the initial configuration information in memory.
6B is initialized by the processor 10H and is in operation.

Next, when an application is to be operated that requires a change in the purpose of using the serial interface, the processor 10A or 10B will use memory 14A or 14B for the application that is about to start operating. reads the initial setting pattern of the serial interface of the own system, for example, 16A, and sends the initial setting pattern to the other system's processor 10B in this example through the parallel interface 18, and then sends the initial setting pattern to the other system's serial interface, 10B in this example, through the parallel interface 18. 16B is initialized.

According to this method, instead of changing the communication attributes of the serial interface manually as in the past, it becomes possible to quickly and easily change the initial settings in an instant manner that corresponds to the application.

〔Example〕

Embodiments of the present invention are shown in FIGS. 2 and 3. In FIG. 2, the parallel interface 18 is a 2-point RAM 18.
A and a path buffer 18b are used, and in FIG. 3, FIFO buffers 18c and 18d are used. The path buffer 18b is for the drive and is not necessarily necessary. In addition to this, a PPI (parallel port interface) or the like can be used as a parallel interface.

In Figure 2, CP [JloA operates an application that uses the V, 25bis procedure for communication (serial) with CPU 10B and sends data to CPU 10B, and as a response, processed and processed data is sent from CPU 10B. When you want to receive a message, for example, if the serial communication mode you have been using does not match the communication mode you are about to use, you will have to change the mode. (Write the command that the initial settings will be performed from now on, the data indicating the contents of the initial settings, and the exit code). Once written, it will be transferred from the 2-port 1-RAM to the CPU.
Data is written into the 10B, and an interrupt is raised indicating that this is a serial interface initialization request.

Therefore, the CPU OB reads the data that has just been written from this 2-point RAM 18a and stores it in the memory 14.
Store in B.

Then, connect the serial interface 16B to that 1n information G.
Re-initialize based on this, and when the work is completed, the CPU 10
A report for A is written into the 2-point RAM 18a. Then, when it is written, an interrupt is raised to CPLlloA, and the CPU 10A reads the 2-point RAM 18a and learns that the initial setting of the serial interface 10B is completed, and since the initial setting of the serial interface A has already been completed, Serial communication to CPU 10B is immediately started. In this way, the CPU OA and the CPU 10B can perform serial communication operations by running applications that only operate in the changed communication mode.

In FIG. 3, the operation is the same as in FIG. 2, except that the 2-point RAM is replaced by a FIFO buffer. That is, CPU10
When A tries to change the initial setting of the serial interface, it reads the new (changed) initial setting information from the memory 14A, changes the initial setting of its own serial interface 16A, and stores it in the FIFO.
input to buffer 18c. CPU OB with this input
Since an interrupt is generated, the CPU 10B writes the output of the FIFO buffer 18c to the memory 14B, reads the memory 14B, and changes the initial settings of the serial interface 16B.

In one usage example of the illustrated system, the processor 10A is a personal computer, the processor IOB is a communication processor, and the personal computer 10A communicates with the outside via the communication processor 10B. In this case, serial transmission is required, so serial interfaces 16A and 16
The use of B is unavoidable, and changes in communication speed are also necessary due to the relationship with the communication partner. This communication procedure is R3
232C, etc. If the processor is 8086, the serial interface is 82511C or the like.

For PC, serial interface 16A, 16
For B, there is simply a connector terminal for R3232C, to which a connector including the above-mentioned interface (IC) is connected. The same applies to parallel interfaces.

The memories 14A and 14B store initial setting information for various modes, and pattern 1. Even if an ID such as pattern 2 is attached and the processor attempting to change the initial settings instructs the other processor to change the pattern 2, etc. via the parallel interface. good.

FIG. 4 shows a flowchart of the modification procedure. If the processor 10A changes the settings as described above, the processor 10A sends the serial communication mode change information to the processor 10B via the parallel interface. The initial setting of the interface 16B is changed (■), and a notification of its completion is sent to the processor 10A (■). Upon receiving this, the processor 10A connects its own serial interface 16A.
Change the initial settings and start serial communication on both systems. Transmission of the mode change information via the parallel interface may be performed while the serial transmission of the other system is not yet completed, so that interruption of the serial transmission for mode change can be extremely short.

It is also possible to send the mode change information to another system through a serial interface, but in this case it would be completely sequential and would take about ms due to information transmission, notification of completion, etc., but if a parallel interface is used, This can be done in about μS.

〔Effect of the invention〕

As explained above, the present invention can respond to application requests that require changes to the initial settings of serial interfaces for communication between processors in multipaths and multiprocessors, and can be done quickly and easily (without any troublesome operations). ), it is possible to change the communication mode immediately in response to an application request, and it is also reliable (because of the parallel interface).

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention, and FIGS. 2 and 3 are diagrams explaining the principle of the present invention. FIG. 4 is a block diagram showing the second embodiment. FIG. 4 is a flowchart showing how to change settings. In FIG. 1, lOA, 10B is a processor, and 12A. 12B is a bus, 14A, 14B is a memory, and 16A. 16B is a serial interface, and 18 is a parallel interface. No. of the present invention! Fig. 2 is a block diagram showing an embodiment of the present invention; Fig. 3 is a 70 block diagram showing the 20th practical example of the present invention

Claims (1)

[Claims] 1. Bus (12) of multiple processors (10A, 10B)
A, 12B) to serial interface (16A, 16
In the initial setting method of the serial interface of the system connected in B), when changing the initial setting of the serial interface, one processor (10A) changes the initial setting of its own serial interface (16A), and Initial setting of a serial interface characterized in that change information is sent to another system via a parallel interface (18), and the processor (16B) of the other system thereby changes the initial settings of the serial processor (16B) of the other system. method.