JPH01228314A - Filter device - Google Patents

Abstract

PURPOSE:To extend the dynamic range, reduce the circuit scale, and increase the operation speed by selecting a prescribed rise value or fall value based on the result of comparison between signal levels of the input signal and the output signal of a filter and operating and outputting a new filter output signal based on the selected value and the filter output signal. CONSTITUTION:An input signal A and a delay output signal B obtained by delaying a filter output signal C in a delay device 4 by a time corresponding to one sampling period are inputted to a comparator 1 and are compared with each other, and a comparison output D indicating the comparison result is sent to the control input terminal of a selector 2. A selected output E of the selector 2 is inputted to an adder 3. The adder 3 outputs the output signal C which is gradually increased with a step width alpha when the selector 2 selects the rise constant alpha, and the adder 3 outputs the output signal C which is gradually reduced with a step width beta when the selector 2 selects the rise constant -beta. Thus, the dynamic range is extended though this device is used for purposes of slow rise characteristic such as noise intensity detection. Multiplying circuits in the circuit are removed to not only reduce the circuit scale but also increase the operation speed.

Description

[Detailed description of the invention]

[Table of Contents] Overview Industrial field of application Conventional technology (Figures 17 and 18) Problems to be solved by the invention Means for solving the problems (Figure 1) Working examples (Figures 2 and 3) Modifications (FIGS. 4 to 14) Application Examples (FIGS. 15 and 16) Effects of the Invention [Summary] The present invention relates to a filter device, particularly a filter device that detects signal strength. The purpose of this design is to enable the rise and fall characteristics of the filter to be set separately and independently, to widen the dynamic range, and to further reduce the circuit scale and increase the operating speed. It is configured to have a function of comparing an input signal and a filter output signal and a function of determining a filter output based on the comparison result. [Industrial Field of Application] The present invention relates to a filter device, and particularly to a filter device that detects signal strength. Such a filter device is used for the purpose of detecting the signal strength of voice or noise, for example, when adjusting the gain of an amplifier circuit built in a communication device such as a telephone or a switchboard according to the strength of the voice or noise. Ru. If you make this kind of gain adjustment. ■Lower the gain of the amplifier during silent periods when there is no transmitted voice to reduce the noise transmitted to the other party. (2) Howling in a system where the transmitter and receiver circuits are incompletely separated is prevented by alternately reducing the gains of the transmitter and receiver amplifiers. It is possible to perform operations such as [Prior Art] An example of the configuration of a conventional signal strength detection filter using a digital processing circuit is shown in FIG. As shown in the figure, the signal strength detection filter has a correction value a=(1-b) for level adjustment.
Multiplier 30. Adder 31.1 Delayer 32.1 providing the sampling clock delay. It is configured to include a multiplier 33 that multiplies the filter coefficients. A closed loop including the adder 531, the delay device 32, and the multiplier 33 constitutes a first-order recursive low-pass filter 34. In this signal strength detection filter, a 1 multiplier 30 multiplies the input signal by a correction value a to adjust the level, and the level-adjusted input signal is output as a filter output signal via the -order cyclic low-pass filter 34. are doing. FIG. 18 shows the step response characteristic of this signal strength detection filter, in which the broken line is the step input signal and the solid line is the filter response output signal. Slow down the rise and fall characteristics of this step response.
In order to increase the speed, the filter coefficient of the -order recursive low-pass filter 34 is made large, and on the other hand, in order to increase the speed, the filter coefficient is made small. [Problems to be Solved by the Invention] Operations such as switching to lower the gain of the amplifier during silent periods when there is no transmitting voice, or switching to lower the gains of the transmitting side amplifier and the receiving side amplifier alternately, are not possible. This is a switching function, and the signal strength detection filter is required to have a fast rise response in order to improve the response to prevent the beginning of a conversation from being cut off due to a delay in switching. On the other hand. In order to ensure the stability of the set gain and prevent deterioration of sound quality, it is necessary to reduce the change in gain after voice detection, and to this end, it is also required that the falling response of the signal strength detection filter be slow. However, in conventional filters, the rising and falling characteristics cannot be set independently; if the rising characteristic is made faster, the falling characteristic will also be faster, and similarly, if the rising characteristic is made slower, the falling characteristic will also be made slower. As a result 1, for example, if the rise characteristic is made faster in order to improve the switching response, the fall characteristic will also become faster, making it more sensitive to fluctuations in voice intensity, making the gain of the amplifier circuit unstable and deteriorating call quality. 6 On the other hand, if the falling characteristic is slowed down to stabilize the set gain, the rising characteristic will also be slowed down, causing the beginning of speech to be cut off when switching the gain.Furthermore, when such a signal strength detection filter is used for noise strength detection, it is necessary to reduce the influence of speech. In order to suppress this, it is necessary to increase the time constant to slow down the rise characteristic. This is achieved by increasing the filter coefficient of the -th order recursive low-pass filter as large as possible. This increase causes an increase in the integral value within the first-order recursive low-pass filter, causing filter overflow. To prevent this, level adjustment is required to reduce the level of the input signal to the first-order recursive low-pass filter. In the filter shown in FIG. 16, this level adjustment is performed by multiplying the correction value a by the multiplier 30. This level adjustment is performed by setting the filter coefficient S to 9, for example, to 0.
If set to 999, the step response is 1/(1-0,
999) = 1000, the input signal becomes 0.
．． Level adjustment by multiplying by 001 is required. As a result,
An input signal whose magnitude is too small or less becomes O at the adder input of the first-order recursive low-pass filter and becomes undetectable, and the dynamic range of the input signal becomes narrower accordingly. Furthermore, as is clear from the configuration of conventional filters,
A multiplier is required within the -order cyclic low-pass filter, but such a multiplier generally has a large circuit scale and requires a large amount of calculation time. Therefore, an object of the present invention is to enable rise characteristics and fall characteristics to be set separately and independently. Another object of the present invention is to provide a wide dynamic range even when used in applications where the rise characteristic is slow, such as noise intensity detection. Still another object of the present invention is to reduce the circuit scale and increase the operating speed by excluding the multiplier circuits among the nine circuits. [Means for Solving the Problem] FIG. 1 is a principle block diagram according to the present invention. A filter device according to the present invention is one form. As shown in FIG. 1(A), a comparison means 51 for comparing the signal levels of the input signal and output signal of the filter, a rise setting means 52 for setting a predetermined rise value, and a rise setting means 52 for setting a predetermined fall value. Downlink setting means 53. Selection means 54 for selecting the rising value of the rising setting means 52 or the falling value of the falling setting means 53 based on the comparison result of the comparing means 51. and i! It is configured to include a calculation means 55 for calculating and outputting a new filter output signal based on the value selected by the selection means 54 and the filter output signal. In addition, the filter device according to the present invention has a first embodiment as another form.
As shown in Figure (B), comparison means 51 compares the signal levels of the input signal and output signal of the filter. Fall setting means 53 for setting a predetermined fall value. Fall setting means 5
Calculating means 55 for performing calculations based on the falling value of No. 3 and the filter output signal and outputting a calculated value. Based on the comparison result of the comparison means 51, the input signal or the calculation means 55
The filter includes a selection means 54 which selects the calculated value of and outputs it as a new filter output signal. The fall setting means 53 can be configured to include a memory that stores fall values whose values change sequentially according to predetermined fall characteristics. Further, the rise setting means 52 can be configured to include a memory that stores rise values whose values change sequentially according to predetermined rise characteristics. Furthermore, a filter device according to another aspect of the present invention includes a first
As shown in FIG. 1(C), a pre-low frequency band with a short time constant for preprocessing nine input signals is further provided before the filter multi-device 57 in the form shown in FIGS. 1(A) and 1(B). The configuration is such that a filter 56 is arranged. [Operation] The operation of the filter device of the present invention will be described below, taking as an example a case where a step input signal is input as an input signal. In the case of the filter device of FIG. 1(A), at the rising edge of the stepped input signal. The comparison means 5] determines that the input signal is greater than the output signal, and controls the selection means 54 to select the rise value α from the rise setting means 52.The calculation means 55 adds this rise value α to the filter output signal. Perform the calculation. The calculated value is output as a filter output signal. Therefore, the filter output signal has a rising characteristic that gradually increases with the width of the rising value α. On the other hand, at the falling edge of the step input signal, the comparison means 51
is determined to be the input signal <output signal, and the 9 selection means 54 selects the fall value β from the fall setting means 53. In this case, the calculation means 55 performs calculation to gradually subtract the falling value β from the filter output signal. As a result, the filter output signal has a falling characteristic that gradually decreases with the width of the falling value β. Here, the rise value α of the rise setting means 52 and the fall value β of the fall setting means 53 can be set separately, so that the rise characteristics and fall characteristics of the filter output signal can be set independently. can do. In the case of the filter device shown in FIG. 1CB), the 1 selection means 54 selects the input signal under the control of the comparison means 51 at the rising edge of the stepped input signal and outputs it as a filter output signal. Therefore, the rise characteristic of the filter output signal rises extremely steeply. On the other hand, at the falling edge of one input signal, the selection means 54 selects the output calculation value of the calculation means 55 and outputs it as a filter output signal. The calculated value of the calculating means 55 is a value obtained by gradually subtracting the falling value β of the falling setting means 53 from the filter output signal, and therefore the falling characteristic of the filter output signal is a characteristic that gradually decreases with the falling value β. . In the filter device shown in FIG. 1(C), the pre-low-pass filter 56 averages the input signal strength and suppresses high-frequency band components, thereby improving noise resistance.At the same time, by suppressing high-frequency components, the subsequent stage The sampling frequency of the filter device 57 is kept low, thereby equivalently increasing the time constant of the filter device 57. [Example] The present invention will be described in detail below with reference to one drawing. FIG. 2 is a block diagram showing a filter device as an example of one embodiment of the present invention. In the figure, 1 is a comparator, 2 is a selector, 3 is an adder,
4 is a delay device. The input signal A and the delayed output signal B, which is obtained by delaying the filter output signal C by one sampling period by the delay device 4, are input to the comparator 1, and the magnitudes of both signals A and B are compared here. A comparison output indicating the comparison result is sent to the control input terminal of the selector 2. A rise constant α from a rise characteristic setting circuit (not shown) and a fall constant −β from a fall characteristic setting circuit (not shown) are input to two input terminals of the selector 2, respectively, and the comparison output is the input signal. A> When representing the output signal B, the rising constant α is selected, and when representing the input signal A and the output signal B, the falling constant −β is selected. Note that when input signal A = output signal B, α, -β, or O
You can choose any of them. The selection output E of the selector 2 is input to the adder 3. The output signal B from the delay device 4 is also input to the adder 3,
Adder 3 adds selection output E from selector 2 to output signal B and outputs the result as filter output signal C. Therefore, adder 3 is. When the selector 2 selects the rise constant α, it outputs an output signal C that gradually increases with a step width α. When the selector 2 selects the falling constant -β, it outputs an output signal C that gradually decreases with a step width β. The operation of this embodiment device will be explained below with reference to FIG. FIG. 3 shows the step response of the embodiment device, and the broken line in FIG. 9 is the step input signal A. The solid line is the filter output signal C. In this embodiment, the magnitudes of the one-sampling period delayed output signal B of the filter output signal C and the input signal A are compared, and the filter input is determined according to the comparison result. That is, when a step input signal A is input, the comparator l first compares the magnitude of the input signal A and the delayed output signal B. At the rising edge of the input signal A, the input signal A>the output signal B. Then, the selector 2 is switched to the rising constant α side based on the comparison output. Therefore, adder 3 outputs signal B
The constant α is gradually added to . The filter output signal C is as shown in FIG. The characteristic is that the rise gradually increases with a step width α. When the filter output signal C becomes sufficiently large and equal to the input signal A, the selector 2 outputs either α, -β, or 0. Therefore, the filter output signal C is the input signal A
It comes to be maintained at a nearly constant value that increases or decreases in a range of α to −β around the peak value of . When the input signal A falls, the comparison result in the comparator 1 becomes output signal B>input signal A, so the selector 2 selects and outputs the falling constant -β. As a result, the output signal C from the adder 3 has a characteristic in which the falling edge thereof gradually decreases with a step width β, as shown in FIG. Note that when the filter output signal C falls and becomes a negative number, the output signal of the selector 2 may be set to α or 0. According to the embodiment shown in FIG. 2, the rise and fall characteristics of the filter output signal can be set independently by setting the values of the constants α and β separately. Furthermore, even if the time constant is lengthened to slow down the rise, the step widths α and β will only become finer and no level adjustment to the input signal will be necessary, so it is possible to prevent the dynamic range from becoming narrower. Kimitsho Shohenten■ Various modifications are possible in carrying out the present invention. FIG. 4 is a block diagram showing an example device according to another embodiment of the present invention. The apparatus of this embodiment is constructed so that the rise characteristic of the filter response is made steep so as to be suitable for detecting the intensity of voice. The difference between the device in FIG. 2 and the device in FIG. 4 is as follows. The input signal A is directly input to the selector 2 instead of the rising constant α, and the adder 3 is input instead of the falling constant −β.
The addition output F obtained by adding the falling constant -β and the delayed output signal B is inputted, and the selected output of the selector 2 becomes the filter output signal C as it is. The step response of the device of the embodiment shown in FIG. 4 is shown in FIG. As shown in FIG. 5, the rising edge of this embodiment device follows the rising edge of the input signal A, and on the other hand,
The fall is slow and decreases slowly with a certain time constant. This falling time can be arbitrarily set by selecting an appropriate falling constant -β. FIG. 6 is a diagram showing still another embodiment of the present invention, in which the falling characteristic of the filter response is configured to be as shown in FIG. 7. That is, the filter output signal C has a constant amplitude ho from time to when the step input signal A falls to time t.
is maintained and falls at a constant slope from 1 time t1 to 1 time t
It becomes zero at 2. In the embodiment shown in FIG. 6, the falling characteristic setting circuit includes an address counter 5 activated by the comparison output of the comparator 1, and a memory 6 from which data is read using the output signal of the address counter 5 as an address. The read data of the memory 6 is inputted to the input terminal of the selector 2 as a falling value T (tl).The data stored in the memory 6 corresponds to the falling characteristic shown in FIG. The address corresponding to up to tl has data r Ttl = 0. Also, the address corresponding from time 11 to tl has r
(tl = -β (certain constant) data is stored.Other configurations are the same as the embodiment device shown in FIG. 2.0 time t to explain the operation of the embodiment device in FIG. When the input signal A falls, the input signal A becomes the delayed output signal B, so the comparator 1 inverts the comparison output, which resets the address counter 5 to zero and starts counting, and the count output is The address is input to the memory 6. This result. During the time to-wL, the memory 6 inputs 0 as a falling value to the adder 3 via the selector 2. Therefore, the filter output signal C does not decrease. After time t1, which maintains a constant amplitude of 0 until time t1, the data output of the memory 6 becomes -β, and therefore the filter output signal C has a falling characteristic that gradually decreases with a constant step width β. 9 is a diagram showing still another embodiment of the present invention, in which the falling characteristic of the filter response is configured as shown in FIG. 9. That is, the filter output signal C is equal to the step input signal A Regardless of whether the amplitude of the filter output signal C at the time 1o at which the filter output signal C falls is ho-h3, the filter output signal C falls at a different slope so that it becomes zero at the time t3. In the example device, the falling characteristic setting circuit is composed of a memory 6 and a register 7, and the register 7 uses the delayed output signal B from the delay device 4 as a data input, and the inversion of the comparison output signal from the comparator 1. The input data is latched at the timing of . This latched data is input as an address into the memory 6. The memory 6 has a constant falling constant -β corresponding to each amplitude value ho-h3 using the amplitude value of the delayed output signal B as an address. ～−
β3 is stored as data. The read data is input to the input terminal of the selector 2 as a falling constant. The rest of the structure is the same as that of the embodiment shown in FIG. FIG. 8 is time 0 t for explaining the operation of the embodiment device. When the input signal A falls, the input signal A becomes the delayed output signal B, so the comparator 1 inverts the comparison output, and the register 7 latches the amplitude value of the filter output signal C at time to. Input the address into memory 6. The memory 6 stores a falling constant - in accordance with this amplitude value ho-h3.
Output β0~-β3 and its falling constant -β0~-β3
is input to the adder 3 via the selector 2. These falling constants −β. -β3 are each selected to have a value that provides a falling slope that becomes zero at time t3 even if the filter output signal C falls from any of the amplitude values ho - h3 at time 1o. Therefore, the filter output signal C that falls at time to is always at the time

[It becomes zero at 3. FIG. 10 is a diagram showing still another embodiment of the present invention,
The filter response is constructed so that the falling characteristic is as shown in FIG. 11 or FIG. 12. In the embodiment shown in FIG. 10, the falling characteristic setting circuit is composed of an address counter 5, a memory 6, and a register 7. As described above, the address counter 5 is reset by the inversion of the comparison output of the comparator 1, starts counting, and inputs the count output to the memory 6 as an address. Further, the register 7 receives the delayed output signal B from the delay device 4 as data input, latches the input data at the timing of inversion of the comparison output of the comparator 1, and inputs the address of this latched data into the memory 6. The memory 6 stores falling values -r(tl, ~-y
(t)3 is stored as data, and this read data is input as a constant across the input terminal of the selector 2. Falling value - r tt). ~-r(t)3 is a time function whose value changes over time so as to give each amplitude value ho-h3 a falling characteristic as shown in FIG. FIG. 1θ is 0 time t for explaining the operation of the embodiment device. When the input signal falls, the input signal A becomes the delayed output signal B, so the comparator 1 inverts the comparison output. As a result, the address counter 5 is reset, starts counting, and inputs the count value to the memory 6 as an address, and the register 7 latches the amplitude value of the filter output signal C at time to and inputs the address to the memory 6. The memory 6 stores the amplitude value ho in response to these address inputs.
The falling value -r(tl□~-d(t133) corresponding to ~h3 is output. This falling value -y(tl□~-y(t)3 is input to the adder 3 via the selector 2. As a result, the adder 3 outputs the 11th signal corresponding to the amplitude of the filter output signal C.
A filter output signal C having a falling characteristic as shown in the figure is output. In addition, in the case of realizing the filter response falling characteristic as shown in FIG. 12 in the embodiment device of FIG.
The falling value −φit), ~−φ(
[)3 is stored. It should be noted that the above-mentioned falling characteristics are merely examples, and it is obvious that various arbitrary shapes of falling can be realized by changing the data stored in the memory 6. In addition, although each of the above-mentioned embodiments has provided a desired shape of the falling characteristic, it is obvious that the shape of the rising characteristic can also be arbitrarily changed by using the same configuration as described above for the rising characteristic setting circuit. It is. FIGS. 13 and 14 are block diagrams showing still other embodiments of the present invention. In this embodiment, the time constant of the filter can be set longer than in each of the embodiments described above, and the noise resistance is improved. That is, in each of the above-mentioned embodiments, the rising or falling time constant can be lengthened by decreasing the value of the rising constant α or the falling constant β, respectively.However, if the device is realized by a digital circuit, , these values have a minimum value determined by the operation word length, and therefore there is a limit to increasing the time constant.
The example device shown in the figure has a steep rise response, but if this example device is used as an audio signal strength detection filter, it will react too sensitively to the slightest noise due to the faster rise. The device described below solves this problem, expands the limit value of the filter's time constant, and improves the noise resistance performance. It was planned. In FIG. 13, reference numeral 9 denotes a filter device according to the present invention in the form described in FIGS. 2 to 12. A pre-low-pass filter 8 with a short time constant is placed upstream of this filter device 9. The influence of response delay due to the arrangement of the pre-low-pass filter 8 can be reduced to a negligible level by setting the time constant of the low-pass filter 8 sufficiently short.
It has been confirmed that there is no problem with m5ec or so. When such a pre-low-pass filter 8 is placed before the filter device 9, the pre-low-pass filter 8 is an integrator and its integration averages the input signal strength, so high frequency band components are reduced. It is clear that the noise resistance performance is improved by making the change gradual. At the same time, since high frequency components are suppressed, the sampling frequency of the filter device 9 in the subsequent stage can be kept low. As a result, in the filter device 9, even if the rise constant α, the fall constant β, etc. are the same values as in the above-mentioned embodiment, the rate of increase/decrease is slowed down by the lower sampling frequency, and this filter device The time constant of 9 is equivalently set to be long. A detailed configuration example of such a pre-low-pass filter 8 is shown in FIG. This configuration example is constructed using a digital processing circuit, as shown in Figure 1. 15 delay circuits 801 to 8 that sequentially delay input signals
15, an adder 81 that adds the input signal and each output signal of the delay circuits 801 to 815, and a multiplier 82 that multiplies the output signal of the adder 81 by 1716. A digitalized input signal is input to this pre-low-pass filter 8 in the form of an absolute value. When an input signal with a sampling frequency of 16 kHz is input to this pre-low-pass filter 8, the input signal and delay circuits 801-
The respective output signals of 815 are added by an adder 81, and the added value is input to a multiplier 82 and divided by 16. Therefore, the output signal of this multiplier 82 is the average of 16 input sample values, and vibrations greater than lkh are attenuated. As a result, the sampling frequency of the filter device 9 in the subsequent stage is 1 k
k (1m5ec). The response delay caused by this pre-low-pass filter 8 is a maximum of 1 m5ec, and this degree of delay is rarely a problem in practice.
on the other hand. Since the noise variance is reduced to 1/16, noise resistance performance is improved, and the time constant can be equivalently set to be 16 times longer, which is a great advantage. Note that the number of pre-low-pass filters is not limited to one, and it is of course possible to arrange a plurality of pre-low-pass filters at the front stage of the filter device 9. It is also clear that the pre-low-pass filter can be realized not only by digital circuits but also by analog circuits. An application example of the filter device according to the present invention is shown in FIG. 15. In this application example, the filter device according to the present invention is applied to an amplifier circuit that adjusts the gain of a transmitter such as a telephone so as to suppress background noise during silent periods when no voice is being input. In the figure, 10 is an input terminal into which an audio signal from a microphone or the like is input, 11 is an absolute value conversion circuit, 12 is an audio intensity detection filter, and 13 is a noise intensity detection filter. 14 is a multiplier as an amplifier; 15 is a memory that receives each output signal of the sound intensity detection filter 12 and the noise intensity detection filter as address input; Amplify the audio signal by multiplying the signal. Here, the voice intensity detection filter 12 is a filter having a filter response having a steep rise as shown in FIG. On the other hand, the noise intensity detection filter 13 is a filter of the form shown in FIG. 2, and constants α and β are set so that the rise and fall of the filter response are sufficiently slow. To explain the operation of this application example device, an input signal input from a microphone or the like is input to the multiplier 14. Speech intensity detection filter 12. The signals are respectively input to the noise intensity detection filter 13. Now, since the rise of the voice intensity detection filter 12 instantaneously responds to the change from voiceless to voiced, cutting off at the beginning of one episode almost never occurs. Furthermore, since the falling time constant is slow and determined by −β, it is insensitive to voice waveform fluctuations, the amplifier gain is stable, and there is no deterioration in voice quality. On the other hand, the noise intensity detection filter 13 is used to detect noise intensity, and its time constant is set to be long in order to suppress the influence of voice as much as possible. Therefore, the noise intensity detection filter 13 does not receive much change in the voice, and detects a long-term average intensity of the input signal, that is, a value that is approximately approximate to the noise intensity. Memory 15 stores these two filters 12.13
receives the output signal of the noise intensity detection filter 13 as an address input, and applies the voice intensity detection filter 1 to the detection output of the noise intensity detection filter 13.
If the detection output of 2 is small, it is determined that there is no voice, and the multiplier 1 outputs a coefficient that reduces the output of 4 to the multiplier 14. The 0 multiplier 14 receives the coefficient and increases the attenuation of the input signal when there is no voice. Adjust audio output. Another example of application of the filter device according to the invention is shown in FIG. In this application example, the filter device of the present invention is applied to an audio switch of a public address telephone, and this audio switch reduces the gain of the transmitting side amplifier and the receiving side amplifier alternately depending on the presence or absence of an audio signal to prevent howling. This is to prevent In FIG. 16, 20 is an input terminal into which a transmitting side audio signal from a microphone or the like is input, 21 is an absolute value conversion circuit, and 22 is a transmitting side audio intensity detection filter. 23 is a transmitting side multiplier that amplifies the transmitted audio signal, 24 is a sound prevention circuit, 25 is a memory that stores a multiplication coefficient, 27 is an absolute value conversion circuit for the receiving audio signal, and 26 is a receiving side audio intensity detection A filter 28 is a receiving side multiplier that amplifies the received audio signal, and the received audio signal is sent to a speaker (not shown) via an output terminal 29. Here, the transmitting side voice strength detection filter 22 and the receiving side voice strength detection filter 26 are both constituted by a filter device according to the present invention shown in FIG. 4. The operation of this applied example device will be explained below. The absolute value of the transmitted voice obtained by the microphone is input to the transmitting side voice strength detection filter 22, and the receiving side voice strength detection filter 2
6, the absolute value of the received voice via the side sound protection circuit 24 is input. Each filter output gives the strength of the transmitting voice and the receiving voice, so by comparing these filter outputs, it can be determined which party is currently speaking. If the transmitted voice is strong, the output of the transmitting side multiplier 23 is increased so that the transmitted voice is output, and at the same time, the memory 25 outputs a multiplication coefficient so that the received voice is decreased.6 Conversely, when the received voice is If it is strong, the output of the receiving side multiplier 28 becomes large,
At the same time, it outputs a multiplication coefficient that reduces the transmitted voice. This allows the speaker, microphone, side sound protection circuit 2
By keeping the gain of the loop around 4 at 1 or less, howling can be prevented from occurring. [Effects of the Invention] According to the present invention, the rise characteristics and fall characteristics of the filter response can be set separately and independently. Furthermore, a wide dynamic range can be obtained even when used in applications where the rise characteristic is slow, such as noise intensity detection. Furthermore, by removing the multiplication circuit in the circuit, it is possible to reduce the circuit scale and increase the operating speed. Furthermore, if a pre-low-pass filter is provided. It is possible to improve noise resistance and set the time constant of the filter to a longer value.

[Brief explanation of the drawing]

FIG. 1 is a principle block diagram according to the present invention. FIG. 2 is a block diagram showing a filter device as an embodiment of the present invention. FIG. 3 is a filter response characteristic diagram of the embodiment device shown in FIG. FIG. 4 is a block diagram of an embodiment of (II) of the present invention. FIG. 5 is a filter response characteristic diagram of the device of the embodiment shown in FIG. 4. FIG. 6 is a block diagram of still another embodiment of the present invention. The figure is a falling characteristic diagram of the filter response of the device according to the embodiment shown in FIG. 6. FIG. 8 is a block diagram of still another embodiment of the present invention 2 FIG. Fig. 10 is a block diagram of still another embodiment of the present invention. Fig. 11 is a falling characteristic diagram of the filter response of the device of the embodiment shown in Fig. 10. Fig. 12 is a diagram of another embodiment of the device shown in Fig. 1θ. Filter response falling characteristic diagram. Fig. 13 is a block diagram of still another embodiment of the present invention. Fig. 14 is a block diagram showing a detailed configuration example of the pre-low-pass filter of the device of the embodiment shown in Fig. 13. Fig. 15 is a block diagram showing an application example of the filter device according to the present invention. Fig. 16 is a block diagram showing an application example of the filter device according to the invention. Fig. 17 is a block diagram showing an application example of the filter device according to the present invention. A block diagram showing a configuration example. Fig. 18 is a filter response characteristic diagram of the conventional filter shown in Fig. 17. In the figure: 1--Comparator 2-Selector 3, 31.81-m-Adder 4. 32.--Delay device 5--Address counter 6, 15.25--Memory 7--Register 8.56--Pre-low-pass filters 801 to 815--Delay circuits 11, 27--Absolute value conversion circuits 12, 22. 21ym-Speech intensity detection filter 13-
Noise intensity detection filter 14, 23.28.82.30.33--multiplier 24
- - Side sound protection circuit 51 - Comparison means 52 - Rise setting means 53 - Fall setting means 54 - Selection means 55 - Calculation means.

Claims (1)

[Claims] 1. Comparing means (51) for comparing the signal levels of the input signal and output signal of the filter, rising setting means (52) for setting a predetermined rising value, and rising setting means (52) for setting a predetermined falling value. The rising setting means (53) and the rising setting means (51) based on the comparison results of the comparing means (51)
Selection means (54) for selecting the rising value of 52) or the falling value of the falling setting means (53), and a new filter output based on the value selected by the selection means (54) and the filter output signal. A filter device comprising: calculation means (55) for calculating and outputting a signal. 2. Comparison means (51) for comparing the signal levels of the input signal and output signal of the filter, falling setting means (53) for setting a predetermined falling value, falling value of the falling setting means (53), and Calculating means (
55), and selection means (54) for selecting the input signal or the calculated value of the calculating means (55) based on the comparison result of the comparing means (51) and outputting it as a new filter output signal. A filter device. 3. The filter device according to claim 1 or 2, wherein the fall setting means (53) includes a memory storing fall values whose values change sequentially according to predetermined fall characteristics. 4. The filter device according to claim 1, 2 or 3, further comprising a pre-low-pass filter with a short time constant for pre-processing the input signal.