JPH01223848A - Start-stop data multiplexing system - Google Patents

Abstract

PURPOSE:To eliminate interruption of data communication by comparing number of characters of start-stop data recovered by an opposite station with a received character number and inverting each bit of the final character of the start-stop data in case of dissidence so as to cause an error in the data. CONSTITUTION:A multiplex data inputted from a multiplex data input terminal 24 is stored in a RAM 18 via a transmission reception circuit 21, sent to a transmission circuit 15 and recovered and outputted from a low speed start-stop data output terminal 18 as the start-stop data. The number of reception of the relevant low speed line of the received multiplex data is counted by a central processing unit 16. When one character or the multiplex data does not arrive, the data written finally in the RAM 18 is compared with the data counted by the reception circuit by the central processing unit 16. In case of discrimination of dissidence, each bit of the data written secondly from the end of processing into the RAM 18 is inverted to cause a data error, sent to the transmission circuit 15 and outputted from the low speed start-stop data output terminal 13 as the start-stop data. Thus, the retransmission sequence is activated.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention uses a time division multiplexing device to multiplex start-stop data input to a low-speed line, excluding start bits and stop bits, after start-stop reproduction, and transmit the data to the opposite station. The present invention relates to an asynchronous data multiplexing method in which a start bit and a stop bit are added to data bits and output.

[Conventional technology]

In the conventional start-stop data multiplexing method, after start-stop reproduction of input data, only the data part is multiplexed and transmitted.If the input data causes a start-stop error, the data is not multiplexed. It was configured as follows:

[Problem to be solved by the invention]

In the conventional start-stop data multiplexing method described above, when the start-stop data is time-division multiplexed and transmitted to the opposite station, if the input start-stop data becomes a start-stop error, the system does not multiplex the data, and the data is not reproduced. The data was supposed to include empty states between characters. Therefore, if the same character or number is sent repeatedly, it will not be detected by either the horizontal parity method or the vertical parity method used in the start-stop data transmission procedure, and there will be no error in the transmission control procedure. The data will then be passed to the upper-level data processing.

Although a data abnormality is detected here, there is a problem in that the application program does not issue a retransmission request and the data communication is interrupted in a blocked state. Furthermore, adding a retransmission sequence to an application program in the event of an abnormality requires modification of all existing application programs, which poses a problem in that the number of man-hours required for modification becomes enormous.

[Failure to solve the problem]

The start-stop data multiplexing method of the present invention multiplexes the start-stop data excluding the start bit and stop pit after start-stop reproduction, and includes a monitoring means for monitoring the continuity of Z polarity of the input start-stop data; means for inputting the final stage of the data element length counter and counting the number of characters in the received start-stop data; and when one block of the above-mentioned asynchronous data is completed and bipolar continuity is detected by the above-mentioned monitoring means, the received start-stop data and means for transmitting the characters to the opposing station.

Further, in the start-stop data multiplexing method according to another aspect of the present invention, in the method of multiplexing the start-stop data excluding start bits and stop pits after start-stop reproduction, continuity of Z polarity of input start-stop data is monitored. monitoring means; means for inputting the final stage of the element length counter of the start-stop data; and means for increasing the number of characters of the received start-stop data to 11; means for transmitting the characters of the received start-stop data to the opposite station when the start-stop data is detected, and means for counting the number of characters of the separated and reproduced start-stop data on the separation side of the opposite station, and the character transmitted from the opposite station. The apparatus is provided with a comparison means for comparing the number of received characters and the number of received characters, and the comparison means is arranged to erroneously reproduce output data when a mismatch is detected.

[Effect]

In the present invention, the end of a block of start-stop data is detected, the number of received characters of the start-stop data is counted, and after the end of the block of start-stop data, this number of received characters is multiplexed and transmitted to the opposite station, and is reproduced by the opposite station. The number of characters of the start-stop data and the number of received characters are compared, and if they do not match, each pit of the final character of the start-stop data is inverted to cause an error in the data.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, reference numeral 1 denotes an asynchronous data input terminal, and the asynchronous data input terminal 1 is connected to an asynchronous circuit 3 via an interface circuit 2. The asynchronous circuit 3 includes a Z-A polarity change point detection circuit (hereinafter referred to as Z-, A detection circuit) 9 that samples input data using a clock from a clock generation circuit 8 and detects data change points. , a gate circuit 7, a sample counter 5, an element counter 6, and a serial/parallel conversion circuit 4. 1° is a bipolar continuity detection circuit, which constitutes a means for monitoring bipolar continuity of the Tachichoho data. 11 is a gate circuit which receives the output of the bipolar continuous detection circuit 1o and the output of the element counter 6; 12 is a character counter which receives the output of this gate circuit 11; It constitutes a means for inputting the final stage of the counter and counting the number of characters of the received start-stop data. The input data is supplied to the bipolar continuity detection circuit 10, and the gate circuit 11 controls the input clock of the character counter 12 which counts the final element detection pulse from the start-stop synchronization circuit 3 based on the detection result. has been done.

Further, the parallel data and character counter 12 of the asynchronous circuit 3 are connected to the data bus of the central processing unit 16, and a read-only memory (ROM) 17. Random access memory (RAM) 18.

Programmable interrupt control circuit 19. Timing generation circuit 20. Transmission/reception circuit 21. It is connected to the transmitting circuit 15. Further, the transmitting/receiving circuit 21 is connected to a multiplexed data transmitting terminal 23 and a multiplexed data receiving terminal 24 via an interface circuit 22. Here, this central processing unit 16 and R
OM17, RAM18.

Programmable interrupt control circuit 19. Timing generation circuit 20. The transmitting/receiving circuit 21 and the interface circuit 22 constitute means for transmitting the characters of the received start-stop data to the opposing station when one block of start-stop data is completed and bipolar continuity is detected. And this central processing unit 1
6, ROM 17, and RAM 1B constitute means for counting the number of characters in the separated and reproduced start-stop data, and also constitute means for comparing the number of characters transmitted from the opposite station and the number of characters received. The comparison means is configured to erroneously reproduce output data when a mismatch is detected.

Further, the transmitting circuit 15 is connected to the low-speed start-stop data output terminal 13 via the interface circuit 14.

Figure 2 is a time chart used to explain the operation of Figure 1.
(,) shows start-stop input data, (b) is the final element detection pulse, (c) is the detection signal, (d)
(e) shows the count value of the character counter 12, and (e) shows the parallel data reproduced in a start-stop manner. Note that this second
In the figure, 1.2e meeting*5. n 2, 11-1, n
are the 1st, 2nd...5th, n-2nd,
The (n−1)th and nth data are shown.

Next, the operation of the embodiment shown in FIG. 1 will be explained with reference to FIG. 2.

First, when the start-stop data shown in FIG. 2(a) which has passed through the interface circuit 2 via the start-stop data input terminal 1 is input, it is reproduced in the start-stop synchronization circuit 3, and at the stop pit position of the start-stop data, the start-stop data shown in FIG. The final element detection pulse in (b) is output.

On the other hand, the Z polarity continuous detection circuit 10 detects the start bit of the first character of the input data.
) is output to the gate circuit 11, and a final element detection pulse is applied to the character counter 12. The character counter 12 counts the number of characters in the received start-stop data as shown in FIG. 2(d).

Also, the parallel data reproduced start-stop is shown in Figure 2 (, ).

As described above, the central processing unit 16 receives data from the RA via the data bus.
After being stored in the M18, the data is output from the multiplexed data transmission terminal 23 to the opposing time division multiplexing device via the transmission/reception circuit 21 and the interface circuit 22.

Here, after the character sequence of the start-stop synchronization data ends and the th character is multiplexed, if bipolarity continues for one character length in the data, the bipolarity continuation detection circuit 10 detects the result as shown in FIG. 2(c). (b) Detected like a point. When this detection output is input to the programmable interrupt control circuit 19, the count value of the character counter 12 is multiplexed on behalf of the start-stop reproduction data from the start-stop synchronization circuit 3.

Next, the operation on the receiving side will be explained. The multiplexed data inputted from the multiplexed data input terminal 24 is stored in the RAM 18 via the transmitter/receiver circuit 21, then sent to the transmitter circuit 15, and outputted from the low-speed start-stop data output terminal 13 as reproduced start-stop data. Ru. Here, the number of times the received multiplexed data is received on the corresponding low-speed line is counted by the central processing unit 16. When one or more characters of multiplexed data no longer come, the data last written in the RAM 18 is compared with the number of receptions counted by the central processing unit 16, and if a mismatch is determined, Each bit of the data written second to last in the RAM 18 is inverted to make the data erroneous, and then sent to the transmitting circuit 15 and output from the low-speed start-stop data output terminal 13 as start-stop data.

〔Effect of the invention〕

As explained above, the present invention detects the end of a block of start-stop data, counts the number of received characters of the start-stop data, multiplexes the number of received characters after the end of the block of start-stop data, and transmits the multiplexed number to the opposite station. , the number of characters in the start-stop data reproduced by the opposite station is compared with the number of received characters, and if they do not match, each bit of the last character of the start-stop data is inverted to make the data erroneous, thereby causing a start-stop synchronization error in the start-stop data. In this case, even if the asynchronous data is not multiplexed and transmitted to the opposite station, the number of characters received in the asynchronous data and the number of characters in the asynchronous data reproduced from the multiplexed data at the opposite station do not match, causing data to be erroneous. Since error detection in the control procedure is performed, there is an effect that a retransmission sequence can be operated.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation of FIG. 10... Z polarity continuous detection circuit, 12... Character counter, 16.1 fist, central processing unit, 17φφ.
ROM, 18 RAM, 19 Programmable interrupt control circuit, 2o Timing generation circuit, 21 Transmitting/receiving circuit, 22 Interface circuit.

Claims (2)

[Claims] (1) In a method of multiplexing start-stop data excluding start bits and stop bits after start-stop reproduction, a monitoring means for monitoring the continuity of Z polarity of the input start-stop data and a final stage of the element length counter of the start-stop data; means for inputting and counting the number of characters of the received start-stop data; and when one block of the start-stop data is completed, the monitoring means
1. A start-stop data multiplexing system comprising means for transmitting a character of received start-stop data to an opposing station when a continuity of polarity is detected. (2) In a method of multiplexing start-stop data excluding start bits and stop bits after start-stop reproduction, a monitoring means for monitoring the continuity of Z polarity of the input start-stop data and a final stage of the element length counter of the start-stop data; means for inputting and counting the number of characters of the received start-stop data; and when one block of the start-stop data is completed, the monitoring means
means for transmitting the characters of the received start-stop data to the opposite station when a continuation of polarity is detected, and means for counting the number of characters of the separated and reproduced start-stop data on the separation side of the opposite station; 1. A start-stop data multiplexing system, comprising a comparison means for comparing the number of transmitted characters and the number of received characters, and the comparison means falsifies reproduced output data when a mismatch is detected.