JPH01212444A - Manufacture of glass thin film - Google Patents

Manufacture of glass thin film

Info

Publication number
JPH01212444A
JPH01212444A JP3681988A JP3681988A JPH01212444A JP H01212444 A JPH01212444 A JP H01212444A JP 3681988 A JP3681988 A JP 3681988A JP 3681988 A JP3681988 A JP 3681988A JP H01212444 A JPH01212444 A JP H01212444A
Authority
JP
Japan
Prior art keywords
substrate
gas
plasma
thin film
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3681988A
Other languages
Japanese (ja)
Inventor
Yasukazu Seki
康和 関
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP3681988A priority Critical patent/JPH01212444A/en
Publication of JPH01212444A publication Critical patent/JPH01212444A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain a glass thin film having a superior evenness at a low temperature by a method wherein a semiconductor substrate with an Si oxide film formed on its surface is placed on the electrode on one side of a pair of parallel- plate electrodes in a sealed container, doping gas is filled up into the container and plasma is generated in this gas. CONSTITUTION:An Si oxide film 11 is formed on the surface of a semiconductor Si substrate 12 and, thereafter, this substrate is placed on the electrode 1B on one side of a pair of parallel-plate electrodes 1A and 1B provided in a sealed container 9 and the temperature of the substrate 12 is held at a prescribed temperature of 400 deg.C or lower. Moreover, atmospheric gas 4 obtainable by diluting doping gas containing phosphorus, boron or arsenic is filled up into the container at a prescribed pressure and a DC voltage is applied to the electrode pair to generate plasma in the atmospheric gas by glow discharge. Thereby, the plasma decomposes dopant gas and at the same time, uniformizes the concentration of active molecules generated, the active molecules generated by the plasma are diffused in the SiO2 film 11 at a low temperature of 400 deg.C or lower and a PSG (BSG, AsSG) thin film 13 can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野] この発明はガラス薄膜の製造方法に係り、特に400°
C以下の低い温度で均一性に優れたガラス薄膜を製造す
る方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a glass thin film, and particularly relates to a method for manufacturing a glass thin film.
The present invention relates to a method for producing a glass thin film with excellent uniformity at a low temperature of C or lower.

〔従来の技術〕[Conventional technology]

半導体素子の製造においてはホスホシリケートガラス(
Phospho−3ilicate Glass、 P
 S Gと略称)。
Phosphosilicate glass (
Phospho-3ilicate Glass, P
(abbreviated as SG).

ボロンシリケートガラス(Boron−3ilicat
e GIass+BSG)またはアーセニックシリケー
トガラス(^rsenic−3ilicaLe Gla
ss;’ A s S G )などのガラス薄膜が主と
し°ζゲッタ作用を目的として多用される。このゲッタ
作用は半導体製造工程で導入されるを害な不純物元素を
捕捉して基体中の素子形成領域を有害な不純物から守ろ
うとするものである。
Boron silicate glass (Boron-3ilicat)
e GIass+BSG) or arsenic silicate glass (^rsenic-3ilicaLe Gla
Glass thin films such as ss;' A s S G ) are mainly used for the purpose of gettering. This getter action is intended to capture harmful impurity elements introduced during the semiconductor manufacturing process and protect the element formation region in the substrate from harmful impurities.

ガラス薄膜の製造には従来下記のような方法が用いられ
ている。第1の方法は、半導体基体に熱酸化膜を形成し
てからリンを含むガス中で熱処理を行うものである。第
2の方法は熱酸化股上にPOCIsなどを塗布し、これ
を固相源として熱処理人元素を含むドーパントガスを同
時に流し、ガラス膜を形成するものである。
Conventionally, the following methods have been used to manufacture glass thin films. The first method is to form a thermal oxide film on a semiconductor substrate and then perform heat treatment in a gas containing phosphorus. The second method is to apply POCIs or the like onto a thermally oxidized layer, and use this as a solid phase source to simultaneously flow a dopant gas containing heat-treated elements to form a glass film.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら第1の方法および第2の方法においては、
熱処理温度が高いために形成済の半導体素子に悪影響を
与えるという欠点があり、また第3の方法は300’C
〜400℃の低い温度でガラス形成が行われるため上記
の欠点はないが、ガラス中にリン、ホウ素またはヒ素が
ガス濃度とか熱分布の不均一性に起因して一様に含まれ
ないという問題点がある。
However, in the first method and the second method,
There is a drawback that the heat treatment temperature is high, which adversely affects the formed semiconductor elements, and the third method is
Since glass formation is carried out at a low temperature of ~400°C, there is no above disadvantage, but there is a problem that phosphorus, boron or arsenic is not uniformly contained in the glass due to non-uniformity of gas concentration or heat distribution. There is a point.

この発明は上記の点に鑑みてなされ、その目的は400
℃以下の低温度操作が可能なうえ、活性分子濃度の平均
化作用に優れる方法を用いることにより、均一性に優れ
るガラス薄膜を低温度で製造する方法を提供することに
ある。
This invention was made in view of the above points, and its purpose is to
The object of the present invention is to provide a method for manufacturing a glass thin film with excellent uniformity at a low temperature by using a method that can be operated at a low temperature of .degree. C. or lower and is excellent in averaging the active molecule concentration.

〔課題を解決するための手段〕[Means to solve the problem]

上記の目的はこの発明によれば半導体基体12の表面に
酸化ケイ素膜11を形成したのち、この基体を密閉容器
9中に設けられた平行平板電極IA、IB対の一方の電
極IBに載置し、前記基体12の温度を400℃以下の
所定温度に保持し、前記、基体に導入するべきリン、ホ
ウ素またはヒ素を含むドーピングガスを稀釈したふんい
気ガス4を所定圧力で密閉容器内に満たし、前記電極対
に直流電圧を印加してグロー放電によりふんい気ガス内
にプラズマを発生させることにより達成される。
According to the present invention, the above purpose is to form a silicon oxide film 11 on the surface of a semiconductor substrate 12, and then place this substrate on one electrode IB of a pair of parallel plate electrodes IA and IB provided in a closed container 9. Then, the temperature of the substrate 12 is maintained at a predetermined temperature of 400° C. or less, and the fecal gas 4, which is a diluted doping gas containing phosphorus, boron, or arsenic to be introduced into the substrate, is introduced into a closed container at a predetermined pressure. This is achieved by applying a DC voltage to the electrode pair and generating plasma in the air gas by glow discharge.

酸化ケイ素(Sing)膜はプラズマCVD法等によっ
て形成される。ドーピングガスはホスフィン(PHs)
 、ジボラン(BtHi) 、アルシン(八5Hi)等
の無機系ガスの他有機金属化合物のガスも用いることが
できる。稀釈はアルゴン、ヘリウム、窒素、水素などが
用いられる。半導体基体としては結晶質。
The silicon oxide (Sing) film is formed by a plasma CVD method or the like. Doping gas is phosphine (PHs)
In addition to inorganic gases such as , diborane (BtHi), and arsine (85Hi), organic metal compound gases can also be used. Argon, helium, nitrogen, hydrogen, etc. are used for dilution. Crystalline as a semiconductor substrate.

非晶質のシリコンが用いられる。プラズマはドーパント
ガスを分解して目的元素をSiOア膜中に導入する。
Amorphous silicon is used. The plasma decomposes the dopant gas and introduces the target element into the SiO film.

〔作用〕[Effect]

プラズマはドーパントガスを分解すると共に発生した活
性分子の濃度を均一にする作用がある。
The plasma has the effect of decomposing the dopant gas and making the concentration of the generated active molecules uniform.

プラズマによって発生した活性分子は400°C以下の
低い温度で5iO1膜中に拡散することができる。
Active molecules generated by the plasma can diffuse into the 5iO1 film at low temperatures below 400°C.

400℃以下ではシリコン中の固溶酸素が活性化しない
At temperatures below 400°C, solid solution oxygen in silicon is not activated.

〔実施例〕〔Example〕

次にこの発明の実施例を図面に基いて説明する。 Next, embodiments of the present invention will be described based on the drawings.

第1図はこの発明の実施例に係る製造方法の説明図であ
る。密閉容器9の中に平板電極IA、IBが設けられる
。陰極側の平板電極IBにシリコン基板12が載置され
る。ヒータ8によってシリコン基板12は400℃以下
の所定温度に加熱される。
FIG. 1 is an explanatory diagram of a manufacturing method according to an embodiment of the present invention. Flat plate electrodes IA and IB are provided in the closed container 9. A silicon substrate 12 is placed on the flat plate electrode IB on the cathode side. The silicon substrate 12 is heated by the heater 8 to a predetermined temperature of 400° C. or less.

ふんい気ガス4がガス流量調整器5を経て密閉容器9内
に導かれる。真空排気装置6がガス圧力調整器7を介し
て密閉容器内のガス圧力を数TorrO値に制御する。
The effluent gas 4 is introduced into a closed container 9 through a gas flow rate regulator 5. A vacuum evacuation device 6 controls the gas pressure inside the closed container to a value of several TorrO via a gas pressure regulator 7.

直流電源3より直流電圧が平板電極IA、IBに印加さ
れる。プラズマが電極IA。
A DC voltage is applied from a DC power supply 3 to the flat plate electrodes IA and IB. The plasma is the electrode IA.

18間に発生する。Occurs between 18 and 18.

さ゛ζ以上のようなプラズマ発生方法を用いてガラス薄
膜が以下のようにして調製される。シリコン基板12上
に酸化ケイ素* tiを形成するためにふんい気ガス4
としてモノシランガス(Sin4)と水蒸気(II I
 O)の混合ガスが用いられる。ガス圧力はl Tor
rである。ヒータ8により基板温度は250〜400℃
に制御される。直流電圧を印加して、プラズマが発生さ
せ、Si0g膜をシリコン基板上に2μ嘗厚に成長させ
る。結果が第2図(a)に示される。Si0g膜の中に
リン、ホウ素またはヒ素が以下のようにして導入される
。リンを導入するためにはふんい気ガス4としてホスフ
ィン(pHs)を。
A glass thin film is prepared as follows using the above plasma generation method. Air gas 4 is used to form silicon oxide*ti on the silicon substrate 12.
As monosilane gas (Sin4) and water vapor (II
A mixed gas of O) is used. Gas pressure is l Tor
It is r. The substrate temperature is 250 to 400℃ by heater 8.
controlled by. A DC voltage is applied to generate plasma, and a Si0g film is grown to a thickness of 2 μm on the silicon substrate. The results are shown in Figure 2(a). Phosphorus, boron, or arsenic is introduced into the Si0g film as follows. To introduce phosphorus, use phosphine (pHs) as the fecal gas 4.

ホウ素の場合はジボラン(Btlt、)をヒ素の場合は
アルシン(AsHs)がそれぞれ水素ガスで稀釈され1
000p、−濃度として用いられる。基板温度は200
”Cである。ふんい気ガス圧力は’l Torrが選ば
れる。
In the case of boron, diborane (Btlt) and in the case of arsenic, arsine (AsHs) were diluted with hydrogen gas.
000p, - used as concentration. The substrate temperature is 200
``C.''l Torr is selected as the effluent gas pressure.

直流電圧として800vが3分間印加される。このよう
にしてリン、ホウ素又はヒ素がSi0g膜に対し0.1
〜0.5#−深さに導入されPSG、BSG。
A DC voltage of 800v is applied for 3 minutes. In this way, phosphorus, boron or arsenic is
~0.5# - PSG, BSG introduced to depth.

As5Gfjl膜が形成される。濃度は約IQ!!原子
/C−である。これは数%のモル濃度に相当する。結果
が第2図(b)に示される。ガラス薄膜は極めて薄いけ
れども不純物のゲッタ効果は基板のいづれの場所におい
ても認められる。これはリン等のドープ元素の濃度が均
一であることの証左である。
An As5Gfjl film is formed. The concentration is about IQ! ! Atom/C-. This corresponds to a molar concentration of several percent. The results are shown in Figure 2(b). Although the glass thin film is extremely thin, the getter effect of impurities can be observed anywhere on the substrate. This proves that the concentration of doping elements such as phosphorus is uniform.

〔発明の効果〕〔Effect of the invention〕

この発明によれば半導体基体の表面に酸化ケイ素膜を形
成したのち、この基体を密閉容器中に設けられた平行平
板電極対の一方の電極に@置し、前記基体の温度を40
0°C以下の所定温度に保持し、前記基体に導入するべ
きリン、ホウ素またはヒ素を含むドーピングガスを稀釈
したふんい気ガスを所定圧力で密閉容器内に満たし、前
記電極対に直流電圧を印加してグロー放電によりふんい
気ガス内にプラズマを発生させるので400℃以下の低
い温度でリン、ホウ素またはヒ素を酸化ケイ素中に均一
にドープすることができる。また酸化ケイ素膜をプラズ
マCV 1)法等により低温度で形成するようにするな
らばガラス薄膜製造の全体プロセスが低温度で行えるこ
ととなり、半導体素子製作工程において、調製済の素子
につきその不純物拡散距離を変えたり、電極を溶損させ
たりするようなことがなくいかなる製造プロセス段階に
おいてもガラスF#膜製造プロセスを挿入することが可
能となり、半導体製造プロセスの自由度が向上する。
According to this invention, after forming a silicon oxide film on the surface of a semiconductor substrate, this substrate is placed on one electrode of a pair of parallel plate electrodes provided in a closed container, and the temperature of the substrate is set to 40°C.
The airtight container is maintained at a predetermined temperature of 0° C. or less, and a diluted doping gas containing phosphorus, boron, or arsenic to be introduced into the substrate is filled in a sealed container at a predetermined pressure, and a DC voltage is applied to the electrode pair. Since plasma is generated in the air gas by glow discharge, phosphorus, boron, or arsenic can be uniformly doped into silicon oxide at a low temperature of 400° C. or less. Furthermore, if the silicon oxide film is formed at a low temperature using the plasma CV1) method, the entire glass thin film manufacturing process can be performed at a low temperature. It becomes possible to insert the glass F# film manufacturing process at any manufacturing process stage without changing the distance or melting and damaging the electrodes, improving the degree of freedom in the semiconductor manufacturing process.

さらにリン、ホウ素あるいはヒ素などのドーピングが均
一におこることから、不純物のゲッタ作用が一様で半導
体素子製造の歩留りが向上する。さらにこの発明に係る
方法はプラズマを利用したドープ方法であるので半導体
製造で多用されるプラズマCVDの装置をそのまま用い
ることができ、半導体製造プロセスを簡易化することが
できる。
Furthermore, since the doping of phosphorus, boron, arsenic, etc. occurs uniformly, the gettering effect of impurities is uniform and the yield of semiconductor device manufacturing is improved. Furthermore, since the method according to the present invention is a doping method using plasma, plasma CVD equipment often used in semiconductor manufacturing can be used as is, and the semiconductor manufacturing process can be simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例に係る方法の説明図、第2図
はガラス薄膜の製造工程を示す側面図である。 IA、IB・・・平板電極、3・・・直流電源、4・・
・ふんい気ガス、5・・・ガス流!調整器、6・・・真
空排気装置、7・・・ガス圧力調整器、8・・・ヒータ
、9・・・密閉容器、11・・・酸化ケイ素膜、12・
・・シリコン鋸板、第 2 図
FIG. 1 is an explanatory diagram of a method according to an embodiment of the present invention, and FIG. 2 is a side view showing a manufacturing process of a glass thin film. IA, IB... flat plate electrode, 3... DC power supply, 4...
・Funny gas, 5...gas flow! Regulator, 6... Vacuum exhaust device, 7... Gas pressure regulator, 8... Heater, 9... Sealed container, 11... Silicon oxide film, 12...
...Silicon saw board, Fig. 2

Claims (1)

【特許請求の範囲】[Claims] 1)半導体基体の表面に酸化ケイ素膜を形成したのち、
この基体を密閉容器中に設けられた平行平板電極対の一
方の電極に載置し、前記基体の温度を400℃以下の所
定温度に保持し、前記基体に導入するべきリン、ホウ素
またはヒ素を含むドーピングガスを稀釈したふんい気ガ
スを所定圧力で密閉容器内に満たし、前記電極対に直流
電圧を印加してグロー放電によりふんい気ガス内にプラ
ズマを発生させることを特徴とするガラス薄膜の製造方
法。
1) After forming a silicon oxide film on the surface of the semiconductor substrate,
This substrate is placed on one electrode of a pair of parallel plate electrodes provided in a sealed container, the temperature of the substrate is maintained at a predetermined temperature of 400°C or less, and phosphorus, boron, or arsenic to be introduced into the substrate is A glass thin film characterized in that a sealed container is filled with a doping gas diluted with a doping gas in a sealed container, and a DC voltage is applied to the electrode pair to generate plasma in the fume gas by glow discharge. manufacturing method.
JP3681988A 1988-02-19 1988-02-19 Manufacture of glass thin film Pending JPH01212444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3681988A JPH01212444A (en) 1988-02-19 1988-02-19 Manufacture of glass thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3681988A JPH01212444A (en) 1988-02-19 1988-02-19 Manufacture of glass thin film

Publications (1)

Publication Number Publication Date
JPH01212444A true JPH01212444A (en) 1989-08-25

Family

ID=12480366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3681988A Pending JPH01212444A (en) 1988-02-19 1988-02-19 Manufacture of glass thin film

Country Status (1)

Country Link
JP (1) JPH01212444A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120825A (en) * 1989-09-28 1991-05-23 Applied Materials Inc Boron phosphorus silicate glass compound layer on semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120825A (en) * 1989-09-28 1991-05-23 Applied Materials Inc Boron phosphorus silicate glass compound layer on semiconductor wafer

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