JPH01205128A - Liquid crystal electrooptic element - Google Patents

Liquid crystal electrooptic element

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Publication number
JPH01205128A
JPH01205128A JP3026788A JP3026788A JPH01205128A JP H01205128 A JPH01205128 A JP H01205128A JP 3026788 A JP3026788 A JP 3026788A JP 3026788 A JP3026788 A JP 3026788A JP H01205128 A JPH01205128 A JP H01205128A
Authority
JP
Japan
Prior art keywords
liquid crystal
erasing
writing
parameter
electrooptic element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3026788A
Other languages
Japanese (ja)
Inventor
Atsushi Sugiyama
淳 杉山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP3026788A priority Critical patent/JPH01205128A/en
Publication of JPH01205128A publication Critical patent/JPH01205128A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To perform writing and erasing at high speed with a liquid crystal electrooptic element by specifying the parameter which indicates the internal distortion of the liquid crystal. CONSTITUTION:The parameter which indicates the internal distortion of liquid crystal has very strong influences on the strong property and responding properties to writing and erasing of a liquid crystal electrooptic element. Therefore, the parameter DELTAP=Pc/Ps-1 which indicates the internal distortion of the liquid crystal caused by the difference between the cell pitch Pc found from the cell thickness and twist angle specified by the orientation process of the element and the inherent pitch Ps of the liquid crystal specified by the light rotating substance added to the liquid crystal constituting material is set larger than '0'. Therefore, an electrooptic element, with which writing and erasing can be performed at high speeds, is obtained.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、表示素子、透過光量制御素子などとして用い
ることが可能である、電気光学素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electro-optical element that can be used as a display element, a transmitted light amount control element, and the like.

[従来の技術] 液晶電気光学素子の製造上、特に大容量化/大面積化時
において単純マトリックスを用いたものが有利であるが
、従来のものでは光学応答特性から大容量化には適して
いない。たとえば、STN/SBEモードでも1/40
0デユーテイ以下でしか実用的に十分といえる表示品位
が確保できないという問題があった。
[Prior art] In manufacturing liquid crystal electro-optical devices, it is advantageous to use a simple matrix, especially when increasing capacity/area, but conventional devices are not suitable for increasing capacity due to optical response characteristics. do not have. For example, even in STN/SBE mode, it is 1/40
There has been a problem in that display quality that can be said to be practically sufficient can only be ensured at a duty of 0 or less.

そこで、単純マトリックスでもメモリー性を持たせて表
示品位を向上させるために、特異な物性定数を持つ液晶
組成物と配向の制御によって、印加電圧による双安定性
が生ずることを利用する(J、Appl、Phys、 
59,3087.’86など)方法が考えられた。本明
細書では以下、この方式をHTN方式と略記することと
する。
Therefore, in order to improve the display quality by imparting memory properties even to a simple matrix, we utilize the fact that bistability occurs depending on the applied voltage by controlling the alignment and the liquid crystal composition with unique physical property constants (J, Appl. , Phys.
59,3087. '86, etc.) method was considered. In this specification, this method will hereinafter be abbreviated as the HTN method.

HTN方式の駆動方法の概略は、表示内容の書き込みに
先立つ消去と、選択的な書き込み、および書き込まれた
内容の保持からなっている。
The HTN driving method generally consists of erasing prior to writing display content, selective writing, and retention of the written content.

[発明が解決しようとする問題点] しかしこのHTN方式について、セル作成やカイラルド
ーパント量等について適当な条件範囲については前記文
献には全く触れられておらず、ただセルの厚さdと液晶
の固有ピッチPsの比d/Psを0.75とするという
記述があるのみである。また、他の文献も含めて調査し
た範囲では現在までのところこれらの適正な条件につい
ては明らかにされていないようである。
[Problems to be solved by the invention] However, regarding this HTN method, the above-mentioned literature does not mention at all the appropriate range of conditions for cell preparation, amount of chiral dopant, etc., and only the cell thickness d and the liquid crystal. There is only a description that the ratio d/Ps of the characteristic pitch Ps is 0.75. Moreover, according to the research conducted including other documents, it seems that these appropriate conditions have not been clarified so far.

しかし、これらの条件について検討を行なったところ、
セル厚及び配向処理で規定されるツイスト角から求めら
れるセルピッチPcと、液晶組成物に加えられた旋光性
物質によって規定される液晶の固有ピッチPsの違いに
よって起こる液晶内部歪をあらわすパラメータΔP =
 P c / P s −1はメモリ性や書き込みや消
去の応答特性などに関して非常に大きな影響を与えるこ
とがわかった。
However, after considering these conditions,
A parameter ΔP that represents the internal distortion of the liquid crystal caused by the difference between the cell pitch Pc determined from the twist angle determined by the cell thickness and alignment treatment and the characteristic pitch Ps of the liquid crystal determined by the optically active substance added to the liquid crystal composition.
It has been found that P c /P s -1 has a very large effect on memory properties, writing and erasing response characteristics, and the like.

そこで本発明では上記ΔPを規定し、書き込みおよび消
去が高速に行なえる電気光学素子を提供することを目的
としている。
Therefore, it is an object of the present invention to provide an electro-optical element that specifies the above-mentioned ΔP and can perform writing and erasing at high speed.

[問題点を解決するための手段] 本発明の電気光学素子は、そのセル厚及び配向処理で規
定されるツイスト角から求められるセルピッチPcと、
液晶組成物に加えられた旋光性物質によって規定される
液晶の固有ピッチPsの差異によって起こる液晶内部歪
をあらわすパラメータΔP = P c / P s 
−1を、0より大きく設定することを特徴とする。
[Means for Solving the Problems] The electro-optical element of the present invention has a cell pitch Pc determined from the cell thickness and the twist angle defined by the alignment process,
Parameter ΔP = P c / P s representing the internal distortion of the liquid crystal caused by the difference in the characteristic pitch Ps of the liquid crystal defined by the optically active substance added to the liquid crystal composition
-1 is set larger than 0.

実施例 [実施例1] 電気光学素子として、200X320ピクセルで5イン
チの大きさの、HTN方式で駆動される液晶パネルを試
作した。配向処理としてはストライプ状の透明電極付き
の基体に珪素酸化物の斜め蒸着を行なうことによって液
晶のプレチルト角を約27度とし、液晶のライスI・角
を270度、セル厚は6μmとして構成した。この基体
間にメルク社製の液晶組成物ZLI−1132にカイラ
ルドーパントを加えて、ΔPが+0.20から−0゜2
0の間となるように調節したもの9種類を封入した。偏
光子は各基体における液晶分子の初期配向方向から45
度傾けて、各々の偏光子の偏光軸が直交するように置き
、試作液晶パネルとした。
Example [Example 1] As an electro-optical element, a liquid crystal panel having a size of 5 inches with 200×320 pixels and driven by the HTN method was manufactured as a prototype. As an alignment treatment, silicon oxide was obliquely vapor-deposited on a substrate with striped transparent electrodes, so that the pretilt angle of the liquid crystal was approximately 27 degrees, the rice I angle of the liquid crystal was 270 degrees, and the cell thickness was 6 μm. . A chiral dopant was added to the liquid crystal composition ZLI-1132 manufactured by Merck & Co. between the substrates, and ΔP was changed from +0.20 to -0°2.
Nine types were encapsulated, adjusted to be between 0 and 0. The polarizer is 45 mm from the initial alignment direction of liquid crystal molecules in each substrate.
A prototype liquid crystal panel was prepared by tilting the polarizers so that the polarization axes of each polarizer were perpendicular to each other.

データ電圧Vd=保持電圧Vh=1.6ボルトとし、選
択電圧Vs=16ボルトの駆動電圧で、フレーム時間を
200ミリ秒とし、消去/書き込み/保持の繰り返しに
より駆動した。
Data voltage Vd = holding voltage Vh = 1.6 volts, selection voltage Vs = 16 volts, frame time was 200 milliseconds, and driving was performed by repeating erasing/writing/holding.

この駆動条件で書き込みパルス幅を650マイクロ秒と
して最小消去時間を測定し、最小消去時間の10%増し
の消去時間で最小書き込みパルス幅を測定した。
Under these driving conditions, the minimum erase time was measured with a write pulse width of 650 microseconds, and the minimum write pulse width was measured with an erase time that was 10% longer than the minimum erase time.

この条件での測定の場合、ΔPが大きいものほど書き込
みパルス幅が短めでも書き込みやすくなる傾向があった
。また、ΔPが大きいものほど消えやすくなる傾向もみ
られた。また、駆動条件を変えた場合にも同じ傾向がみ
られた。△Pと最小書き込みパルス幅Pwおよび最小消
去時間teの関係を第1表に示す。
In the case of measurement under these conditions, there was a tendency that the larger ΔP was, the easier it was to write even if the write pulse width was shorter. There was also a tendency that the larger the ΔP, the easier it was to disappear. The same tendency was also observed when the driving conditions were changed. Table 1 shows the relationship between ΔP, minimum write pulse width Pw, and minimum erase time te.

第1表より、消去と書き込みあわせたものの最小時間は
ΔP=−0,20で175ミリ秒、ΔP=+0.05で
145ミリ秒となり、ΔPをOより小さくすることで1
5%以上の応答の向上がみられることかわかる。
From Table 1, the minimum time for erasing and writing together is 175 milliseconds when ΔP=-0, 20, and 145 milliseconds when ΔP=+0.05.
It can be seen that there is an improvement in response of 5% or more.

第1表 [実施例2] 実施例1と同様にして作成した基体間に、液晶組成物と
してメルク社製液晶組成!91ZLI−3187にカイ
ラルドーパントを加えて、実施例1と同様にΔPが+0
.15から−0,20となるようにしたものを入れ、液
晶パネルを作成した。
Table 1 [Example 2] A liquid crystal composition manufactured by Merck was placed between the substrates prepared in the same manner as in Example 1! By adding a chiral dopant to 91ZLI-3187, ΔP was +0 as in Example 1.
.. 15 to -0,20 was inserted to create a liquid crystal panel.

この液晶組成物を使用した場合、ZLI−1132より
もメモリ性が低下するため、保持電圧の範囲が狭くなる
When this liquid crystal composition is used, the memory property is lower than that of ZLI-1132, so the holding voltage range becomes narrower.

測定は、データ電圧Vd=保持電圧Vh=2゜15ボル
ト、選択電圧Vs=17.2ボルトとし、■フレームの
時間を120ミリ秒の駆動条件にし、消去/書き込み/
保持の繰り返しにより駆動した。
The measurement was performed with data voltage Vd = holding voltage Vh = 2° 15 volts, selection voltage Vs = 17.2 volts, ■ frame time driving condition of 120 milliseconds, and erase/write/
It was driven by repeated holding.

最小消去時間は、この駆動条件で書き込みパルス幅を3
50マイクロ秒として測定したのち、最小消去時間の1
0%増しで最小書き込みパルス幅を測定した。ZLエニ
ー187におけるΔPと最小書き込みパルス幅Pwおよ
び最小消去時間teの関係を第2表に示す。
The minimum erase time is determined by increasing the write pulse width by 3 under these driving conditions.
After measuring as 50 microseconds, the minimum erasure time is 1
The minimum write pulse width was measured with a 0% increase. Table 2 shows the relationship between ΔP, minimum write pulse width Pw, and minimum erase time te in ZL Any 187.

第2表より、消去と書き込みあわせたものの最小時間は
、ΔP=−0,20で87ミリ秒、ΔP=+0.05で
69ミリ秒となる。よって、ΔPを0より小さくするこ
とで実施例1と同様に応答の向上がみられ、この場合2
0%以上となることがわかる。
From Table 2, the minimum time for erasing and writing together is 87 milliseconds when ΔP=-0, 20, and 69 milliseconds when ΔP=+0.05. Therefore, by making ΔP smaller than 0, the response is improved as in Example 1, and in this case, 2
It can be seen that it is 0% or more.

また、他のメルク社製液晶組成物ZLI−3238、Z
LI−3239,ZLI−1840,ZLI−2861
,ZLI−3449/100.ZLI−3201100
0,ZLI−3201/100、ZLI−1694,Z
LI−1691,ZLI−18001000,ZLI−
1565,ZLI−30211000,ZLI−302
1/100、ZLI−2411などを用いて検討した結
果も、選択電圧vS、保持電圧vhなどを各々の液晶組
成物に合わせ適正な条件としたうえで、光学的な応答時
間を測定すると、ZLI−3,187と同様にΔPを0
より大きくすると消去および書き込みの時間に改善が見
られ、いずれもΔP=−0,20のときに比べ10%以
上高速な消去および書き込みが可能となることがわかっ
た。
In addition, other Merck liquid crystal compositions ZLI-3238, Z
LI-3239, ZLI-1840, ZLI-2861
, ZLI-3449/100. ZLI-3201100
0, ZLI-3201/100, ZLI-1694, Z
LI-1691, ZLI-18001000, ZLI-
1565, ZLI-30211000, ZLI-302
The results of studies using 1/100, ZLI-2411, etc. also show that when the selection voltage vS, holding voltage vh, etc. are set to appropriate conditions for each liquid crystal composition, and the optical response time is measured, the ZLI -3,187, ΔP is 0
It was found that when the value is increased, the erasing and writing times are improved, and in both cases, erasing and writing can be performed at a speed of 10% or more compared to when ΔP=-0 and 20.

第2表 [実施例3コ 以上の実施例の結果を踏まえ、HTN方式による112
0x750ビクセルで12インチの大きさの液晶パネル
を試作した。
Table 2 [Example 3 Based on the results of at least 3 examples, 112
We prototyped a 12-inch liquid crystal panel with 0x750 pixels.

配向処理は実施例1と同様に行ない、液晶のプレチルト
角を約27度とし、液晶のツイスト角度を270度、セ
ル厚は6μmとして構成した。
The alignment treatment was performed in the same manner as in Example 1, and the pretilt angle of the liquid crystal was about 27 degrees, the twist angle of the liquid crystal was 270 degrees, and the cell thickness was 6 μm.

この基体間にメルク社製の液晶組成物ZLエニー318
7にカイラルドーパントを加えて、ΔPを十0.05と
したものを封入し、試作液晶パネルとした。また、比較
用として同じ配向処理を行なった基体間にΔPが−0,
20としたものも封入して液晶パネルを作成した。
A liquid crystal composition ZLany 318 manufactured by Merck & Co., Ltd. was placed between the substrates.
7 was filled with a chiral dopant to give a ΔP of 10.05, and a prototype liquid crystal panel was prepared. Also, for comparison, ΔP was −0,
20 was also sealed to create a liquid crystal panel.

消去時間te=20ミリ秒、書き込みパルス幅を260
マイクロ秒とすると、消去および1フレ一ム分の書き込
み時間の合計は215ミリ秒となる。そこでフレーム時
間を270ミリ秒とし、データ電圧Vd=保持電圧Vh
=2.15ボルト、選択電圧Vs=17.2ボルトの条
件で、連続的な消去/書き込み/保持の繰り返しとする
実施例2と同様な方法で駆動を行なったところ、ΔPが
+0.05の試作液晶パネルは光学応答したが、ΔPが
−0,20のものは消去、書き込みとも不十分であった
。このΔp=−Q、20のものを光学応答させるには、
消去時間を25ミリ秒以上、書き込みパルス幅を310
マイクロ秒以上とする必要があった。
Erase time te = 20 ms, write pulse width 260
In microseconds, the total erasing and writing time for one frame is 215 milliseconds. Therefore, the frame time is set to 270 milliseconds, and data voltage Vd = holding voltage Vh
= 2.15 volts, selection voltage Vs = 17.2 volts, and when driving was performed in the same manner as in Example 2, in which continuous erasing/writing/holding was repeated, ΔP was +0.05. Although the prototype liquid crystal panel exhibited optical response, those with ΔP of -0 and 20 were insufficient in both erasing and writing. To make this Δp=-Q, 20 optically responsive,
Erase time is 25 ms or more, write pulse width is 310
It needed to be more than microseconds.

以上3つの実施例より、少なくともΔPを±0よりも大
きくすることにより応答速度を向上させることが可能で
あることがわかる。
From the above three examples, it can be seen that the response speed can be improved by at least making ΔP larger than ±0.

以上実施例を述べたが、本発明は上記実施例にのみ特定
されるものではなく、液晶組成物、配向処理方法、セル
条件、セル作成方法等を変えても成り立つ。
Although the embodiments have been described above, the present invention is not limited to the above-mentioned embodiments, but can also be realized by changing the liquid crystal composition, alignment treatment method, cell conditions, cell manufacturing method, etc.

[発明の効果コ 以上述べたように本発明によれば、液晶電気光学素子の
セル厚及び配向処理で規定されるツイスト角から求めら
れるセルピッチ’Pcと、液晶組成物に加えられた旋光
性物質によって規定される液晶の固有ピッチPsの差異
によって起こる液晶内部歪をあらわすパラメータΔP(
=Pc/Ps−1)を規定することによって、書き込み
および消去が高速に行なえる電気光学素子を提供するこ
とが可能である。
[Effects of the Invention] As described above, according to the present invention, the cell pitch 'Pc determined from the cell thickness of the liquid crystal electro-optical element and the twist angle defined by the alignment treatment, and the optically active substance added to the liquid crystal composition. Parameter ΔP(
=Pc/Ps-1), it is possible to provide an electro-optical element that can perform writing and erasing at high speed.

Claims (1)

【特許請求の範囲】[Claims]  消去、書き込み、およびバイアス電圧印加による書き
込み内容の保持からなる液晶電気光学素子において、そ
のセル厚及び配向処理で規定されるツイスト角から求め
られるセルピッチPcと、液晶組成物に加えられた旋光
性物質によって規定される液晶の固有ピッチPsの差異
によって起こる液晶内部歪をあらわすパラメータΔP=
Pc/Ps−1を、0より大きく設定することを特徴と
する液晶電気光学素子。
In a liquid crystal electro-optical element that erases, writes, and retains written content by applying a bias voltage, the cell pitch Pc determined from the cell thickness and the twist angle defined by the alignment process, and the optically active substance added to the liquid crystal composition. The parameter ΔP= represents the internal distortion of the liquid crystal caused by the difference in the characteristic pitch Ps of the liquid crystal defined by
A liquid crystal electro-optical element characterized in that Pc/Ps-1 is set larger than 0.
JP3026788A 1988-02-12 1988-02-12 Liquid crystal electrooptic element Pending JPH01205128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3026788A JPH01205128A (en) 1988-02-12 1988-02-12 Liquid crystal electrooptic element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3026788A JPH01205128A (en) 1988-02-12 1988-02-12 Liquid crystal electrooptic element

Publications (1)

Publication Number Publication Date
JPH01205128A true JPH01205128A (en) 1989-08-17

Family

ID=12298926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3026788A Pending JPH01205128A (en) 1988-02-12 1988-02-12 Liquid crystal electrooptic element

Country Status (1)

Country Link
JP (1) JPH01205128A (en)

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