JPH01204477A - Field-effect ultrahigh-frequency semiconductor device - Google Patents

Field-effect ultrahigh-frequency semiconductor device

Info

Publication number
JPH01204477A
JPH01204477A JP2942588A JP2942588A JPH01204477A JP H01204477 A JPH01204477 A JP H01204477A JP 2942588 A JP2942588 A JP 2942588A JP 2942588 A JP2942588 A JP 2942588A JP H01204477 A JPH01204477 A JP H01204477A
Authority
JP
Japan
Prior art keywords
input
fet
semiconductor device
frequency semiconductor
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2942588A
Other languages
Japanese (ja)
Inventor
Kenji Wasa
憲治 和佐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2942588A priority Critical patent/JPH01204477A/en
Publication of JPH01204477A publication Critical patent/JPH01204477A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To reduce a pellet in size by independently insetting input/output impedance matching circuits to N (N>=2) pieces of basic cells connected in parallel with each other. CONSTITUTION:Basic cells in which series circuits of N-square spiral inductance elements 4 (N>=2) made of pectinated electrode field-effect transistors and capacity elements 5 of thin film multilayer structure are inserted as matching circuits, are connected in parallel, and independently inserted to all the inputs and outputs of the cells 10. Thus, since each cell 10 can be impedance-matched, the input/output impedance matchings can be conducted in more accurate state. Accordingly, originally preferably characteristics of the FET can be employed in an external circuit at the points of gain, band, etc., as compared with the simultaneous matching of a conventional multi-cell field-effect transistor(FET). In this manner, the area of the pellet of the FET can be reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電界効果型超高周波半導体装置に関し、特にN
個のセル(N>2)を並列接続した高出力マイクロ波用
電界効果トランジスタ装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a field effect type ultra-high frequency semiconductor device, and in particular, to a field effect type ultrahigh frequency semiconductor device.
The present invention relates to a high-output microwave field effect transistor device in which several cells (N>2) are connected in parallel.

〔従来の技術〕[Conventional technology]

今日、マイクロ波用電界効果トランジスタ装置(以下単
にFETと記す)には、素材にガリウム砒素(GaAs
)を用いたGaAsF E Tが主流として用いられて
いる。このGaAsF E Tは、通常高出力マイクロ
波増巾器として使用されるものであって、ゲート及びド
レインのボンディング用電極を各々一つづつ有する基本
セルを複数個並列に並べて高出力を得る多セル構成のも
のが一般的である。
Today, microwave field effect transistor devices (hereinafter simply referred to as FETs) are made of gallium arsenide (GaAs).
) is mainly used. This GaAsFET is usually used as a high-output microwave amplifier, and is a multi-cell device that obtains high output by arranging a plurality of basic cells in parallel, each having one gate and drain bonding electrode. configuration is common.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このように、従来の高出力FETは多セル構成になって
いるので、入出力インピーダンスが極めて低くなってお
り、FET単独では充分にその特性を引き出すことがで
きない。従って、FETペレットの入出力側には、通常
、アルミナ基板上に形成したマイクロストリップライン
或いは高誘電体基板によるチップコンデンサ等から成る
インピーダンス整合回路がそれぞれ一括して挿入され、
一つのパッケージ内に組込まれるように形成される。し
かしながら、このような整合回路を内蔵した高出力FE
Tであっても、更にセル数を増やして出力を高めようと
すると、FETベレットの入出力インピーダンスが更に
低くなり整合回路の構成が難しくなるので、充分な利得
と利得帯域を確保することができなくなる。例えば、1
0GHz帯では基本セルが8個を越えると問題がおき、
30GHz帯ともなると2個を並列接続しただけでも定
在波比(VSWR)が2を越えるようになる。
As described above, since the conventional high-output FET has a multi-cell configuration, the input/output impedance is extremely low, and the FET alone cannot fully bring out its characteristics. Therefore, an impedance matching circuit consisting of a microstrip line formed on an alumina substrate or a chip capacitor formed on a high dielectric substrate is usually inserted all at once on the input and output sides of the FET pellet.
Formed to be incorporated into one package. However, a high output FE with a built-in matching circuit like this
Even with T, if you try to increase the output by further increasing the number of cells, the input/output impedance of the FET pellet will become even lower, making it difficult to configure a matching circuit, making it impossible to secure sufficient gain and gain band. It disappears. For example, 1
In the 0GHz band, problems occur when the number of basic cells exceeds 8,
In the 30 GHz band, the standing wave ratio (VSWR) will exceed 2 even if two devices are connected in parallel.

本発明の目的は、上記の情況に鑑み、10GHzを越え
る超高周波帯において充分な利得と利得帯域特性とを示
す電界効果型超高周波半導体装置を提供することである
In view of the above circumstances, an object of the present invention is to provide a field-effect ultra-high frequency semiconductor device that exhibits sufficient gain and gain band characteristics in an ultra-high frequency band exceeding 10 GHz.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によれば、電界効果型超高周波半導体装置は、く
し形電極の電界効果トランジスタから成るN (N> 
2)個の基本セルの並列接続から成り、入出力インピー
ダンス整合回路が前記基本セルの全ての入力側および出
力側にそれぞれ独立に挿入されることを含んで構成され
る。
According to the present invention, a field effect ultra-high frequency semiconductor device includes N (N>
2) The basic cells are connected in parallel, and input/output impedance matching circuits are independently inserted into all the input and output sides of the basic cells.

すなわち、本発明によれば、並列接続されるN(N>2
)個の基本セルに対し入出力インピーダンス整合回路が
それぞれ独立に挿入される。複数個の基本セルを並列接
続した装置構成の場合には、装置全体よりもそれを構成
する各基本セルの入出力インピーダンスの方が高いこと
は自明であるから、それだけ整合回路の構成は簡単とな
り、且つ基本セルを構成する電界効果トランジスタそれ
ぞれの特性を充分に外部回路に引出すことが可能となる
。すなわち、インダクタンス素子と容量素子を直列接続
した簡単な回路で整合回路を構成することができるので
ペレットサイズの小型化を実現することも可能となる。
That is, according to the present invention, N (N>2
) basic cells, input and output impedance matching circuits are inserted independently. In the case of a device configuration in which multiple basic cells are connected in parallel, it is obvious that the input/output impedance of each basic cell that makes up the device is higher than that of the entire device, so the configuration of the matching circuit becomes easier. , and it becomes possible to fully bring out the characteristics of each field effect transistor constituting the basic cell to an external circuit. That is, since the matching circuit can be configured with a simple circuit in which an inductance element and a capacitance element are connected in series, it is also possible to reduce the size of the pellet.

〔実施例〕〔Example〕

以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.

第1図は本発明の一実施例を示す電界効果型超高周波半
導体装置の平面図である。本実施例によれば、本発明の
電界効果型超高周波半導体装置は、ソース電極1とゲー
ト電極3およびソース電極1とドレイン電極2との間に
、角形スパイラル・インダクタンス素子4と薄膜多層構
造の容量素子5の直列回路を、整合回路としてそれぞれ
挿入した基本セル10の複数個から成る並列接続回路を
含む。ここで、薄膜多層構造の容量素子5はソース電極
1との間に誘電体を介在させるサンドイッチ構造に形成
され、角形スパイラル・インダクタンス素子4は基板上
に形成される。この際、これら2つの回路素子の直列回
路は基本セルL更それぞれの入出力インピーダンス整合
回路として機能し、基本セル10が通常用いられるガリ
ウム砒素FETで構成されている場合であれば、これが
8個以上の並列接続構成がとられたとしてもインダクタ
ンスおよび容量をそれぞれ1ピコ・ファラッド(PF)
および0.O1〜0.1ナノ・ヘンリー(n H’)に
選ぶことによって、半導体装置とじてカインピーダンス
整合を10GHzの動作帯域において定在波比1.2以
下に設定することが可能である。すなわち、極めて簡単
な整合回路によって基本セル10それぞれの特性を充分
に外部に引出すことができ、極めて大きな多セル構成を
容易に得ることができるので、高出力・広帯域特性をも
つ超高周波半導体装置を確実に実現せしめることができ
る。
FIG. 1 is a plan view of a field effect type super high frequency semiconductor device showing an embodiment of the present invention. According to this embodiment, the field-effect ultra-high frequency semiconductor device of the present invention includes a rectangular spiral inductance element 4 and a thin film multilayer structure between a source electrode 1 and a gate electrode 3 and between a source electrode 1 and a drain electrode 2. It includes a parallel connection circuit consisting of a plurality of basic cells 10 each having a series circuit of capacitive elements 5 inserted therein as a matching circuit. Here, the capacitive element 5 having a thin film multilayer structure is formed in a sandwich structure with a dielectric interposed between it and the source electrode 1, and the rectangular spiral inductance element 4 is formed on a substrate. At this time, the series circuit of these two circuit elements functions as an input/output impedance matching circuit for each of the basic cells L, and if the basic cell 10 is composed of commonly used gallium arsenide FETs, eight Even if the above parallel connection configuration is used, the inductance and capacitance will each be 1 pico Farad (PF).
and 0. By selecting O1 to 0.1 nano-Henry (n H'), it is possible to set the impedance matching of the semiconductor device to a standing wave ratio of 1.2 or less in an operating band of 10 GHz. In other words, the characteristics of each basic cell 10 can be sufficiently extracted to the outside using an extremely simple matching circuit, and an extremely large multi-cell configuration can be easily obtained. We can definitely make this happen.

第2図は本発明の他の実施例を示す電界効果型超高周波
半導体装置の平面図である。本実施例によれば、ジグザ
グ形インダククン素子6とクシ形容量素子7の直列回路
から成るインピーダンス整合回路が、ソース電[1とゲ
ート電極3およびソース電極1とドレイン電極2との間
にそれぞれ基本セルL更毎に対挿入される。本実施例に
よれば、容量素子をより分布常数型に形成することがで
きるので、整合がより一層とり易い利点がある。
FIG. 2 is a plan view of a field effect type super high frequency semiconductor device showing another embodiment of the present invention. According to this embodiment, an impedance matching circuit consisting of a series circuit of a zigzag-shaped inductor element 6 and a comb-shaped capacitive element 7 is provided between the source electrode [1 and the gate electrode 3 and between the source electrode 1 and the drain electrode 2, respectively]. A pair is inserted every time cell L is updated. According to this embodiment, since the capacitive element can be formed into a distributed constant type, there is an advantage that matching can be achieved more easily.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明によれば、多セル構
成のFETにおいて各セル毎にインダクタンス素子と容
量素子とから成る整合回路を具備することにより、以下
の効果を得ることができる。
As described above in detail, according to the present invention, the following effects can be obtained by providing a matching circuit consisting of an inductance element and a capacitance element for each cell in a multi-cell FET.

(1)各セル毎にインピーダンス整合がとられるのでよ
り高い状態で人出インピーダンス整合をとることができ
る。従って、従来の多セル構成FETの如く一括して整
合をとるよりも利得及び帯域等の点でFETが本来もつ
良好な特性をより外部回路にとり出すことが可能となる
(1) Since impedance matching is performed for each cell, impedance matching can be achieved in a higher state. Therefore, rather than matching all at once as in conventional multi-cell FETs, it is possible to extract more of the FET's inherently good characteristics in terms of gain and band to an external circuit.

(2)整合回路に従来のインダクタンス素子と容量素子
から′なるローパスフィルター形整合回路を用いること
なく、インダクタンス素子と容量素子の直列回路を、ゲ
ート電極とドレイン電極にそれぞれFET部と並列に挿
入する簡単な回路構成とすることができるので、FET
のペレット面積の縮小化をはかることができる。
(2) Instead of using a conventional low-pass filter type matching circuit consisting of an inductance element and a capacitance element as a matching circuit, a series circuit of an inductance element and a capacitance element is inserted in the gate electrode and the drain electrode in parallel with the FET section, respectively. Since it can have a simple circuit configuration, FET
The pellet area can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す電界効果型超高周波半
導体装置の平面図、第2図は本発明の他の実施例を示す
超高周波半導体装置の平面図である。 1・・・ソース電極、2・・・ドレイン電極、3・・・
ゲート電極、4・・・角形スパイラル・インダクタンス
素子、5・・・薄膜多M構造の容量素子、6・・・ジグ
ザグ形インダクタンス素子、7・・・クシ形容量素子、
L更・・・基本セル。 代理人 弁理士  内 原  音 兜 1 図 鵬 2 図
FIG. 1 is a plan view of a field effect type ultra-high frequency semiconductor device showing one embodiment of the invention, and FIG. 2 is a plan view of an ultra high frequency semiconductor device showing another embodiment of the invention. 1... Source electrode, 2... Drain electrode, 3...
Gate electrode, 4... Rectangular spiral inductance element, 5... Capacitive element with thin film multi-M structure, 6... Zigzag-shaped inductance element, 7... Comb-shaped capacitive element,
L change...Basic cell. Agent Patent Attorney Uchihara Otokabu 1 Tuho 2 Illustration

Claims (2)

【特許請求の範囲】[Claims] (1)くし形電極の電界効果トランジスタから成るN(
N≧2)個の基本セルの並列接続から成り、入出力イン
ピーダンス整合回路が前記基本セルの全ての入力側およ
び出力側にそれぞれ独立に挿入されることを特徴とする
電界効果型超高周波半導体装置。
(1) N(
A field-effect ultra-high frequency semiconductor device comprising N≧2) basic cells connected in parallel, and characterized in that input/output impedance matching circuits are independently inserted on all input sides and output sides of the basic cells. .
(2)前記入出力インピーダンス整合回路が前記基本セ
ルのゲート電極とソース電極およびソース電極とドレイ
ン電極との間にそれぞれ独立に接続されるインダクタン
ス回路素子と容量回路素子の直列回路から成ることを特
徴とする請求項第(1)項記載の電界効果型超高周波半
導体装置。
(2) The input/output impedance matching circuit is characterized by comprising a series circuit of an inductance circuit element and a capacitance circuit element each independently connected between the gate electrode and the source electrode and between the source electrode and the drain electrode of the basic cell. A field effect type super high frequency semiconductor device according to claim (1).
JP2942588A 1988-02-09 1988-02-09 Field-effect ultrahigh-frequency semiconductor device Pending JPH01204477A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2942588A JPH01204477A (en) 1988-02-09 1988-02-09 Field-effect ultrahigh-frequency semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2942588A JPH01204477A (en) 1988-02-09 1988-02-09 Field-effect ultrahigh-frequency semiconductor device

Publications (1)

Publication Number Publication Date
JPH01204477A true JPH01204477A (en) 1989-08-17

Family

ID=12275780

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2942588A Pending JPH01204477A (en) 1988-02-09 1988-02-09 Field-effect ultrahigh-frequency semiconductor device

Country Status (1)

Country Link
JP (1) JPH01204477A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0701332A1 (en) * 1994-09-09 1996-03-13 Kabushiki Kaisha Toshiba Variable gain circuit and radio apparatus using the same
JP2014204170A (en) * 2013-04-01 2014-10-27 富士通セミコンダクター株式会社 Power amplifier and communication device
JP2017169168A (en) * 2016-03-18 2017-09-21 三菱電機株式会社 Power amplifier
WO2022224354A1 (en) * 2021-04-20 2022-10-27 三菱電機株式会社 Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566467A (en) * 1979-06-27 1981-01-23 Nec Corp Microwave integrated circuit semiconductor device
JPS5776907A (en) * 1980-09-02 1982-05-14 Thomson Csf Monolithic amplifier
JPS6052642B2 (en) * 1979-12-27 1985-11-20 日本信号株式会社 Receiver for vehicle control equipment
JPH01198080A (en) * 1988-02-03 1989-08-09 Fujitsu Ltd Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566467A (en) * 1979-06-27 1981-01-23 Nec Corp Microwave integrated circuit semiconductor device
JPS6052642B2 (en) * 1979-12-27 1985-11-20 日本信号株式会社 Receiver for vehicle control equipment
JPS5776907A (en) * 1980-09-02 1982-05-14 Thomson Csf Monolithic amplifier
JPH01198080A (en) * 1988-02-03 1989-08-09 Fujitsu Ltd Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0701332A1 (en) * 1994-09-09 1996-03-13 Kabushiki Kaisha Toshiba Variable gain circuit and radio apparatus using the same
JP2014204170A (en) * 2013-04-01 2014-10-27 富士通セミコンダクター株式会社 Power amplifier and communication device
JP2017169168A (en) * 2016-03-18 2017-09-21 三菱電機株式会社 Power amplifier
CN107204746A (en) * 2016-03-18 2017-09-26 三菱电机株式会社 Power amplifier
WO2022224354A1 (en) * 2021-04-20 2022-10-27 三菱電機株式会社 Semiconductor device

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