JPH01189126A - Etching apparatus - Google Patents

Etching apparatus

Info

Publication number
JPH01189126A
JPH01189126A JP63014197A JP1419788A JPH01189126A JP H01189126 A JPH01189126 A JP H01189126A JP 63014197 A JP63014197 A JP 63014197A JP 1419788 A JP1419788 A JP 1419788A JP H01189126 A JPH01189126 A JP H01189126A
Authority
JP
Japan
Prior art keywords
electrode
plasma
semiconductor substrate
gas
chlorine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63014197A
Other languages
Japanese (ja)
Inventor
Takao Horiuchi
堀内 隆夫
Izumi Arai
泉 新井
Yoshifumi Tawara
田原 好文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP63014197A priority Critical patent/JPH01189126A/en
Priority to KR1019880016865A priority patent/KR970003885B1/en
Priority to US07/287,156 priority patent/US4931135A/en
Priority to EP88121606A priority patent/EP0323620B1/en
Priority to DE3889649T priority patent/DE3889649T2/en
Publication of JPH01189126A publication Critical patent/JPH01189126A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To increase the life of electrodes to be stabilized, to automate an apparatus, and to improve its productivity by forming an insulating layer having a predetermined resistance value or more on the face of at least one electrode in contact with plasma chlorine series gas. CONSTITUTION:A vacuum vessel 1 is opened, and receives a semiconductor substrate 12 conveyed on a lifting pin 18 raised by a pin elevating mechanism 17, the pin 18 is moved down to place the substrate 12 on a polymer film on a lower electrode 11, a clamp ring 13 is moved down by a ring elevating mechanism 15, and the substrate 12 is press-bonded. The vessel 1 is evacuated, and an upper electrode 4 is moved down by an electrode elevating mechanism 2. Chlorine series reaction gas is supplied from a supply pipe 5 to the electrode 4, fed from pores on the lower face of the electrode 4, a high frequency voltage is applied from a power source 6 to the electrode 4 to generate a plasma, thereby etching the substrate 12. The face of the base material of the electrode 4 in contact with the plasma chlorine gas of the aluminum layer is formed of an alumina layer having 900MOMEGA of insulation resistance, thereby providing a long life and high stability.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、エツチング装置に関する。[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to an etching apparatus.

(従来の技術) 近年、半導体素子の複雑な製造工程の簡略化。(Conventional technology) In recent years, the complicated manufacturing process of semiconductor devices has been simplified.

工程の自動化を可能とし、しかも微細なパターンを高精
度で形成することが可能な各種薄膜のエツチング装置と
して、ガスプラズマ中の反応成分を利用したプラズマエ
ツチング装置が注目されている。
Plasma etching equipment that utilizes reactive components in gas plasma is attracting attention as an etching equipment for various thin films that can automate processes and form fine patterns with high precision.

このプラズマエツチング装置とは、反応槽内に配置され
た一対の電極例えば高周波電極に高周波電力を印加する
ことで反応槽内に導入した反応気体例えばアルゴンガス
等の反応気体をプラズマ化し、このガスプラズマ中の活
性成分を利用して基板例えば半導体ウェハのエツチング
を行なう装置である。
This plasma etching apparatus converts a reactive gas, such as argon gas, introduced into a reaction tank into plasma by applying high frequency power to a pair of electrodes placed in the reaction tank, such as high frequency electrodes. This is an apparatus that etches a substrate, such as a semiconductor wafer, using the active ingredients contained therein.

この様な従来のエツチング装置では、塩素系のガスを用
いてPo1y −5iWXやメタルシリサイド膜や窒化
膜等をエツチングするのに高温でも安定した放電を行な
えるアルマイトの電極が使用されていた。そして、この
アルマイトの電極もエツチング処理時に徐々に塩化アル
ミニウムとして消費され。
In such conventional etching equipment, alumite electrodes that can perform stable discharge even at high temperatures are used to etch Po1y-5iWX, metal silicide films, nitride films, etc. using chlorine-based gas. This alumite electrode is also gradually consumed as aluminum chloride during the etching process.

電極の寿命がくると交換していた。When the electrode reached the end of its life, it was replaced.

(発明が解決しようとする課題) しかしながら、アルマイトの電極は寸法や形状やアルミ
ナ膜厚等に差がなくとも電極の寿命が一定せず、不定期
に電極を交換せねばならず、常に人間がエツチング処理
後の半導体ウェハの状態を監視し、エツチング処理の安
定性を確かめることが必要であり、自動化対応できない
という課題があった。
(Problem to be solved by the invention) However, even if there are no differences in size, shape, alumina film thickness, etc., alumite electrodes do not have a constant lifespan, and the electrodes must be replaced irregularly. It is necessary to monitor the state of the semiconductor wafer after the etching process and confirm the stability of the etching process, which poses the problem of not being able to be automated.

また、アルマイトの電極の寿命が短かすぎると。Also, the lifespan of anodized aluminum electrodes is too short.

電極の交換を頻繁に行なわなければならず、その度毎に
装置を停止してメンテナンスを行なうので装置の稼働効
率が低下し生産性が悪化するという課題があった。
The problem is that the electrodes must be replaced frequently, and the device must be stopped for maintenance each time, which reduces the operating efficiency of the device and reduces productivity.

本発明は上記点に対処してなされたもので、電極の寿命
を長くし安定化し、自動化対応を可能とし、装置の稼働
効率及び生産性を向上したエツチング装置を提供するも
のである。
The present invention has been made in view of the above-mentioned problems, and provides an etching apparatus that has a longer and more stable electrode life, is compatible with automation, and has improved operating efficiency and productivity.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 少なくとも一方の電極の少なくともプラズマ化した塩素
系ガスに接触する面は絶縁抵抗が900MΩ以上の絶縁
層であることを特徴とする。
(Means for Solving the Problems) The surface of at least one of the electrodes that comes into contact with at least plasma-formed chlorine-based gas is an insulating layer having an insulation resistance of 900 MΩ or more.

(作用) 本発明のエツチング装置では、少なくとも一方の電極の
少なくともプラズマ化した塩素系ガスに接触する面を絶
縁抵抗が900MΩ以上の絶縁層としたので、電極が塩
素系のガスに塩化アルミニウムとして食刻される量を低
下させ、電極を長時間安定して使用可能とし、電極の寿
命を一定以上に安定化したので、人間が監視していなく
とも一定処理時間は電極の寿命が保障され自動化対応可
能となった。しかも、電極を安定長寿命化したので、電
極交換の為のメンテナンスサイクルを長くできる。
(Function) In the etching apparatus of the present invention, the surface of at least one of the electrodes that comes into contact with plasma-formed chlorine-based gas is an insulating layer having an insulation resistance of 900 MΩ or more, so that the electrode is eroded by the chlorine-based gas as aluminum chloride. By reducing the amount of engraved parts, the electrode can be used stably for a long time, and the life of the electrode is stabilized to a certain level, so even if there is no human supervision, the life of the electrode is guaranteed for a certain processing time, making it compatible with automation. It has become possible. Furthermore, since the electrodes have a stable and long service life, the maintenance cycle for electrode replacement can be extended.

(実施例) 以下5本発明装置を半導体製造工程に適用した実施例に
つき図面を参照して説明する。
(Example) Hereinafter, five examples in which the apparatus of the present invention is applied to a semiconductor manufacturing process will be described with reference to the drawings.

Affi製で表面をアルマイト処理した円筒状真空容器
■内の上部には、電極昇降機構■例えばエアシリンダや
ボールネジ等と連結棒■を介して昇降可能な上部電極に
)が設けられている。この上部電極(イ)は、AQ製で
表面にアルマイト処理を施しである平板状で、図示しな
いガス供給源からの塩素系の反応ガス例えば四塩化炭素
や三塩化ホウ素等を導入する反応ガス供給パイプ0に接
続されている。
In the upper part of the cylindrical vacuum container (1) made by Affi and whose surface is alumite-treated, an electrode lifting mechanism (2) (for example, an air cylinder, a ball screw, etc., and an upper electrode that can be moved up and down via a connecting rod (2)) is provided. This upper electrode (a) is made of AQ and has a flat plate shape with an alumite treatment on the surface, and is supplied with a reaction gas for introducing a chlorine-based reaction gas such as carbon tetrachloride or boron trichloride from a gas supply source (not shown). Connected to pipe 0.

また、上部電極に)下部表面には多数の図示しない小孔
が設けられ、この小孔から真空容器ω内に反応ガスを流
出可能となっている。しかも、上部電極(へ)はプラズ
マ発生用で例えば電力が500Wで13MHz程度の高
周波電源(0に接続されており、また、上部電極(イ)
上側には、この上部電極に)を循環冷却液例えば水等で
冷却可能な如く、図示しない冷却液循環器から冷却液パ
イプ■を介して冷却液を循環可能な円板状上部電極冷却
ブロック(8)が設けられている。
In addition, a large number of small holes (not shown) are provided on the lower surface of the upper electrode, through which the reaction gas can flow out into the vacuum vessel ω. Moreover, the upper electrode (A) is connected to a high frequency power source (0) with a power of 500 W and a frequency of about 13 MHz for plasma generation, and the upper electrode (A)
On the upper side, there is a disk-shaped upper electrode cooling block (2) that can circulate a cooling liquid from a cooling liquid circulator (not shown) through a cooling liquid pipe (2) so that the upper electrode can be cooled with a cooling liquid such as water. 8) is provided.

ここで、上部電極(イ)のプラズマ化した塩素系ガスに
接触する面は絶縁抵抗が900MΩ以上の絶縁層である
アルミナの層がアルマイト処理により形成されている。
Here, on the surface of the upper electrode (a) that comes into contact with the chlorine-based gas turned into plasma, an alumina layer, which is an insulating layer having an insulation resistance of 900 MΩ or more, is formed by alumite treatment.

そして、真空容器■の下部には、上部電極に)と同様に
図示し°ない冷却液循環器から冷却液パイプ■を介して
冷却液例えば水等を循環可能な円板状下部電極冷却ブロ
ック(10)が設けられており、この下部電極冷却ブロ
ック(10)の上面と接する如く。
At the bottom of the vacuum container (2), there is a disk-shaped lower electrode cooling block (2) that can circulate a coolant, such as water, from a coolant circulator (not shown) to the upper electrode (2) through a coolant pipe (3). 10) is provided so as to be in contact with the upper surface of the lower electrode cooling block (10).

A2gで表面にアルマイト処理を施しである平板状下部
型t!(11)が設置されていて、この下部電極(11
)は接地されている。
The flat lower mold is made of A2g and has an alumite treatment on the surface! (11) is installed, and this lower electrode (11
) is grounded.

ここで、真空容器ωは図示しない開閉機構例えばゲート
バルブ機構等により開閉可能で、また、図示しない搬送
機構例えばハンドアーム等で内部に被処理体例えば半導
体基板(12)を搬送し、下部゛電極(11)上に半導
体基板(12)を載置可能となっている。しかも、真空
容器(υは、図示しない開閉機構を閉じると気密状態と
なり、内部を図示しない真空ポンプで所望の真空状態例
えば数10mTorr〜数10Torr程度とすること
が可能となっている。ここで、図示しない搬送機構を真
空予備室内に設置して、真空容器■と気密に連結すると
、半導体基板(12)の搬送後に真空容器ω内を図示し
ない真空ポンプで所望の真空度とする時間が短縮できる
Here, the vacuum container ω can be opened and closed by an opening/closing mechanism (not shown), such as a gate valve mechanism, etc., and an object to be processed, such as a semiconductor substrate (12), is transported inside by a transport mechanism (not shown), such as a hand arm, and the lower electrode A semiconductor substrate (12) can be placed on (11). Moreover, the vacuum container (υ) becomes airtight when an opening/closing mechanism (not shown) is closed, and the interior can be brought to a desired vacuum state, for example, from several tens of mTorr to several tens of Torr, using a vacuum pump (not shown).Here, If a transport mechanism (not shown) is installed in the vacuum preliminary chamber and is airtightly connected to the vacuum container (2), the time required to bring the inside of the vacuum container (ω) to the desired degree of vacuum using a vacuum pump (not shown) after transporting the semiconductor substrate (12) can be shortened. .

それから、下部電極(11)上側外周には、載置した半
導体基板(12)外周部を下部電極(II)に圧若可能
なillで表面にアルマイト処理を施しであるクランプ
リング(13)が、連結棒(14)を介してリング昇降
機4i1!(15)例えばエアシリンダ等で昇降可能に
設置されている。また、下部電極(11)の中央付近の
内部には、半導体基板(12)を下部電極(11)に対
して昇降可能な如く、連結部(16)を介してピン昇降
機構(17)例えばエアシリンダ等に連結された例えば
3本のSUS製リフトピン(18)が設けられている。
Then, on the upper outer periphery of the lower electrode (11), there is a clamp ring (13) whose surface is anodized with illumination, which can compress the outer periphery of the mounted semiconductor substrate (12) onto the lower electrode (II). Ring elevator 4i1 via connecting rod (14)! (15) For example, it is installed so that it can be raised and lowered using an air cylinder or the like. Also, inside the lower electrode (11) near the center, a pin elevating mechanism (17), for example, an air For example, three SUS lift pins (18) connected to a cylinder or the like are provided.

このリフトピン(18)は、下部電極(11)内に穿設
された孔(19)の一部を利用して下部電極(11)内
に挿入されている。そして孔(19)は、図示しない冷
却ガス供給源からの冷却ガス例えばヘリウムガスを半導
体基板(12)m面に供給可能な如く冷却ガス供給パイ
プ(20)に接続されている。
This lift pin (18) is inserted into the lower electrode (11) using a part of the hole (19) bored in the lower electrode (11). The hole (19) is connected to a cooling gas supply pipe (20) so that a cooling gas such as helium gas from a cooling gas supply source (not shown) can be supplied to the m-plane of the semiconductor substrate (12).

ここで、下部電極(11)の半導体基板(12)載置面
は、半導体基板(12)にクランプリング(13)で加
えた力が、半導体基板(12)に等分布荷重として加わ
ったと仮定した時の半導体基板(12)の変形曲線とな
る如く、凸形状に形成しである。
Here, the semiconductor substrate (12) mounting surface of the lower electrode (11) assumes that the force applied to the semiconductor substrate (12) by the clamp ring (13) is applied to the semiconductor substrate (12) as a uniformly distributed load. It is formed into a convex shape so as to follow the deformation curve of the semiconductor substrate (12) at the time.

また、下部電極(11)と半導体基板(12)載置面間
には、半導体基板(12)とこの半導体基板(12)を
保持する電極即ち下部電極(11)間のインピーダンス
を一様にする如く、合成高分子フィルム(21)例えば
厚さ20μm〜100μs程度の耐熱性ポリイミド系樹
脂が、下部電極(11)の半導体基板(12)載置面に
耐熱性アクリル樹脂系粘着剤で接着することにより設け
られている。
Further, between the lower electrode (11) and the semiconductor substrate (12) mounting surface, the impedance between the semiconductor substrate (12) and the electrode that holds this semiconductor substrate (12), that is, the lower electrode (11) is made uniform. Similarly, a synthetic polymer film (21), for example, a heat-resistant polyimide resin with a thickness of about 20 μm to 100 μs, is adhered to the semiconductor substrate (12) mounting surface of the lower electrode (11) with a heat-resistant acrylic resin adhesive. It is established by

そして、下部電極(11)外周と真空容器0間には、反
応ガスを真空容器■側壁の排気パイプ(22)に排気す
る如く、絶縁性例えば四弗化エチレン樹脂製で多数の排
気孔(23)を有する排気リング(24)が設けられて
いる。
Between the outer periphery of the lower electrode (11) and the vacuum vessel 0, there are many exhaust holes (23 ) is provided.

ここで、下部電極(11)に保持した半導体基板(12
)とほぼ同じ大きさにプラズマを発生可能な如く上部電
極(イ)外周1こは、絶縁性例えば四弗化エチレン樹脂
製のシールドリング(25)が設けられている。
Here, the semiconductor substrate (12) held on the lower electrode (11)
) An insulating shield ring (25) made of, for example, tetrafluoroethylene resin is provided on the outer periphery of the upper electrode (a) so that plasma can be generated to approximately the same size as the upper electrode (a).

また、上記構成のエツチング装置は図示しない制御部で
動作制御及び設定制御される。
Further, the etching apparatus having the above structure is controlled in operation and setting by a control section (not shown).

次に、上述したエツチング装置による半導体基板(12
)のエツチング方法を説明する。
Next, the semiconductor substrate (12
) etching method will be explained.

まず1図示しない開閉機構で真空容器■を開け、ピン昇
降機構(17)と連結部(16)により上昇したリフト
ピン(18)上に、図示しない搬送機構で搬送した半導
体基板(12)を受は取る。この後、リフトピン(18
)を降下して半導体基板(12)を下部電極(11)上
に載置し、リング昇降機構(15)と連結棒(14)に
より上昇していたクランプリング(13)を下降させ、
半導体基板(12)を下部電極(11)に圧着する。
First, open the vacuum container (1) using an opening/closing mechanism (not shown), and place the semiconductor substrate (12) transported by a transport mechanism (not shown) on the lift pin (18) raised by the pin lifting mechanism (17) and the connecting part (16). take. After this, lift pin (18
) to place the semiconductor substrate (12) on the lower electrode (11), and lower the clamp ring (13) that had been raised by the ring lifting mechanism (15) and connecting rod (14).
The semiconductor substrate (12) is crimped onto the lower electrode (11).

この時既に、真空容器■の図示しない開閉機構は閉じら
れており、真空容器ω内は図示しない真空ポンプで所望
の真空状態となっている。
At this time, the opening/closing mechanism (not shown) of the vacuum container (2) has already been closed, and the interior of the vacuum container (ω) is brought to a desired vacuum state by a vacuum pump (not shown).

そして、電極昇降機構■と連結棒■により、上部電極(
イ)は降下し、下部電極(11)との電極間隔が所望の
間隔例えば数I程度となる如く設定される。
Then, the upper electrode (
A) is lowered, and the electrode interval with the lower electrode (11) is set to a desired interval, for example, about several I.

次に、図示しないガス供給源より塩素系の反応ガス例え
ば三塩化ホウ素等がガス供給パイプ■を介して上部電極
(イ)に供給され、反応ガスは上部電極(イ)下面の図
示しない小孔より真空容器ω内に流出する。同時に、高
周波電源0により上部電極(イ)へ高周波電圧を印加し
、接地した下部電極(11)との間にプラズマを発生さ
せ、このプラズマで下部電極(11)上の半導体基板(
12)をエツチング処理する。
Next, a chlorine-based reactive gas such as boron trichloride is supplied from a gas supply source (not shown) to the upper electrode (a) through the gas supply pipe It flows out into the vacuum container ω. At the same time, a high frequency voltage is applied to the upper electrode (a) by the high frequency power supply 0, plasma is generated between it and the grounded lower electrode (11), and this plasma is used to generate the semiconductor substrate (
12) is etched.

ここで、上部電極に)は、ミクロ的に見ると第2図に示
す如く、母材のアルミニウム層(27)の少なくともプ
ラズマ化した塩素系ガスに接触する面は、絶縁抵抗90
0MΩ以上の絶縁層であるアルミナ層(28)がアルマ
イト処理により形成されている。このアルミナ層(28
)は、膜厚が50−〜70μs程度であり絶縁抵抗が9
00MΩ/ 500V以上であるが1寸法や形状や膜厚
等外観的に同等であっても絶縁抵抗が900MΩ/ 5
00Vより低い場合は、表面のアルミナ層(28)がプ
ラズマ化した塩素系のガス中の塩素原子ラジカルにより
不安定に食刻され塩化アルミニウムを生じて、アルミナ
層(28)の寿命は例えば半導体基板(12)処理枚数
750枚〜2250枚程度で一定せず、寿命となった上
部電極(へ)は異常放電を発生させ半導体基板(12)
にダメージを与えるため、アルミナ層(28)の寿命に
伴って不定期に電極を交換せねばならなかった。しかし
、絶縁層であるアルミナ! (28)の絶縁抵抗を90
0MΩ以上としたので、アルミナ層(28)がプラズマ
化した塩素系のガス中の塩素原子ラジカルにより食刻さ
れ塩化アルミニウムを生じる反応を安定して遅くできる
ので、アルミナ層(28)の寿命は例えば半導体基板(
12)処理枚数2250枚以上で安定化する。このこと
により、エツチング処理の安定性を常に人間が監視する
必要がなくなり自動化対応可能となる。また、上部電極
(イ)の寿命を長くし安定化したので、上部電極に)交
換の頻度を減少でき、メンテナンス時間を短縮すること
で装置の稼働効率及び生産性を向上することができる。
Here, as shown in FIG. 2 when viewed microscopically, the upper electrode (upper electrode) has an insulation resistance of 90% at least on the surface of the base material aluminum layer (27) that comes into contact with the plasma-formed chlorine gas.
An alumina layer (28), which is an insulating layer with a resistance of 0 MΩ or more, is formed by alumite treatment. This alumina layer (28
) has a film thickness of about 50-70 μs and an insulation resistance of 9
00MΩ/500V or more, but even if the dimensions, shape, film thickness, etc. are the same in appearance, the insulation resistance is 900MΩ/5
If it is lower than 00V, the alumina layer (28) on the surface is etched unstablely by chlorine atom radicals in the chlorine-based gas that has turned into plasma, producing aluminum chloride, and the life of the alumina layer (28) is shortened, for example, by the semiconductor substrate. (12) The number of wafers processed varies from 750 to 2,250 wafers, and the upper electrode (to), which has reached the end of its life, generates an abnormal discharge and the semiconductor substrate (12)
Due to the damage caused to the alumina layer (28), the electrode had to be replaced irregularly as the alumina layer (28) reached the end of its life. However, alumina is an insulating layer! The insulation resistance of (28) is 90
Since the value is 0 MΩ or more, the alumina layer (28) is etched by chlorine atom radicals in the chlorine-based gas that has turned into plasma, and the reaction that produces aluminum chloride can be stably slowed down, so the life of the alumina layer (28) is, for example, Semiconductor substrate (
12) Stabilization occurs when the number of sheets processed is 2250 or more. This eliminates the need for humans to constantly monitor the stability of the etching process, allowing for automation. Furthermore, since the life of the upper electrode (a) is extended and stabilized, the frequency of replacement of the upper electrode (a) can be reduced, and maintenance time can be shortened, thereby improving the operating efficiency and productivity of the device.

例えば、真空度0.15Torr、高周波電源電力50
0w。
For example, vacuum level 0.15 Torr, high frequency power supply power 50
0w.

CCV、 + Heガス流ft 200cc/min、
上部電極に)温度20℃、下部電極温度25℃以下、上
部電極■アルミナ層(28)膜厚60.の時に、上部電
極(イ)アルミナ層(28)(7)絶縁抵抗が10〜3
00MΩ1500Vニばらツイテいると上部電極に)寿
命は半導体基板(12)処理枚数750枚程度であり、
上部電極に)アルミナ層(28)の絶縁抵抗が900M
Ω1500Vとすると上部電極(至)寿命は半導体基板
(12)処理枚数2250枚以上となった。
CCV, + He gas flow ft 200cc/min,
Upper electrode) temperature 20℃, lower electrode temperature 25℃ or less, upper electrode ■ Alumina layer (28) film thickness 60. When , the insulation resistance of the upper electrode (a) alumina layer (28) and (7) is 10 to 3.
00MΩ1500V on the upper electrode) The lifespan is approximately 750 semiconductor substrates (12) processed.
The insulation resistance of the alumina layer (28) on the upper electrode is 900M.
When Ω was set to 1500 V, the life span of the upper electrode (up to) was 2250 or more semiconductor substrates (12) processed.

この様にアルミナ層(28)膜厚等外観が同様でも。Even though the appearance of the alumina layer (28), such as the film thickness, is the same.

絶縁層即ちアルミナ層(28)の絶縁抵抗が900MΩ
より小さくばらついていると上部電極(イ)の寿命が短
く不安定になり、アルミナ層(28)の絶縁抵抗が90
0阿Ω以上にすると上部電極に)の寿命が長く安定化す
る。このことは、発明者により多数の実験等で確認され
ている。
The insulation resistance of the insulation layer, that is, the alumina layer (28) is 900MΩ
If the variation is smaller, the life of the upper electrode (a) will be short and unstable, and the insulation resistance of the alumina layer (28) will be 90%.
If it is set to 0 Ω or more, the life of the upper electrode (in the upper electrode) will be long and stable. This fact has been confirmed by the inventor through numerous experiments.

この時、半導体基板(12)はクランプリング(13)
で下部電極(11)に圧着されているが、ミクロ的には
1表面粗さ等の為、第3図に示す如く下部電極(11)
と半導体基板(12)の間には空隙(30)が存在する
。この空隙(30)による半導体基板(12)と下部電
極(11)間のインピーダンスは小さいが均一性が悪く
ばらつきが大きい。また、下部電極(11)表面のアル
マイトによる絶縁層は多孔性であるので、半導体基板(
12)と下部電極(11)間のインピーダンスの均一性
はより悪くなる。しかしながら、第3図の如く、半導体
基板(12)とこの半導体基板(12)を保持する電極
即ち下部電極(11)間のインピーダンスを一様にする
手段として、半導体基板(12)と下部電極(11)間
に合成高分子フィルム(21)を設け、例えば、厚さ2
0/jfll−100μs程度の耐熱性ポリイミド系樹
脂を下部電極(11)に厚さ25μs程度の耐熱性アク
リル樹脂系粘着剤で接着した。この空隙(30)と下部
電極(11)間の合成高分子フィルム(21)のインピ
ーダンスは空隙(30)のインピーダンスより十分に大
きいので、半導体基板(12)と下部電極(11)間の
インピーダンスのばらつきを小さくできるので、このイ
ンピーダンスを均一で一様とすることができる。また、
合成高分子フィルム(21)はアルマイトの様に多孔性
ではないので、半導体基板(12)との接触性がよく、
空隙(30)のばらつきも小さくでき、空隙(30)の
インピーダンスの均一性を向上するという効果もある。
At this time, the semiconductor substrate (12) is attached to the clamp ring (13).
However, due to microscopic surface roughness, the lower electrode (11) is crimped as shown in Figure 3.
A gap (30) exists between the semiconductor substrate (12) and the semiconductor substrate (12). Although the impedance between the semiconductor substrate (12) and the lower electrode (11) due to this gap (30) is small, it is not uniform and has large variations. In addition, since the insulating layer made of alumite on the surface of the lower electrode (11) is porous, the semiconductor substrate (
12) and the lower electrode (11) becomes worse. However, as shown in FIG. 3, as a means to make the impedance uniform between the semiconductor substrate (12) and the electrode holding the semiconductor substrate (12), that is, the lower electrode (11), 11) A synthetic polymer film (21) is provided between them, for example, with a thickness of 2
A heat-resistant polyimide resin having a thickness of about 0/jfll-100 μs was adhered to the lower electrode (11) with a heat-resistant acrylic resin adhesive having a thickness of about 25 μs. Since the impedance of the synthetic polymer film (21) between this gap (30) and the lower electrode (11) is sufficiently larger than the impedance of the gap (30), the impedance between the semiconductor substrate (12) and the lower electrode (11) is Since the variation can be reduced, this impedance can be made uniform and uniform. Also,
The synthetic polymer film (21) is not porous like alumite, so it has good contact with the semiconductor substrate (12).
This also has the effect of reducing variations in the air gap (30) and improving the uniformity of the impedance of the air gap (30).

これらにより、半導体基板(12)と下部電極(11)
間のインピーダンスは一様となり、このことにより、半
導体基板(12)のエツチングの均一性を向上させるこ
とができる。
With these, the semiconductor substrate (12) and the lower electrode (11)
The impedance between them becomes uniform, thereby improving the uniformity of etching of the semiconductor substrate (12).

ここで、真空度2.4Torr、高周波電源(e電力5
00υ、プレオンガス流量80cc/win 、アルゴ
ンガス流量500cc/win、上部電極(イ)温度2
0℃、下部電極(11)温度8℃以下の時に、アルマイ
トの絶縁膜厚15μsの下部電極(11)上に厚さ25
μsの耐熱性アクリル樹脂系粘着剤を介して厚さ25−
の合成高分子フィルム(21)である耐熱性ポリイミド
系樹脂を接着した時の合成高分子フィルム(21)枚数
とエツチング速度とエツチングの均一性を第4図に示す
。この第4図より、エツチング速度は十分実用範囲であ
り、エツチングの均一性が顕著に向上していることが明
らかである。また、合成高分子フィルム(21)は、表
面が密で安定した材料なので、空隙(30)のインピー
ダンスのばらつき等による異常放電を防止でき、異常放
電による半導体基板(12)にダメージを与えることは
なく、安定したエツチング処理を行なえる。
Here, the degree of vacuum is 2.4 Torr, the high frequency power source (e power 5
00υ, preion gas flow rate 80cc/win, argon gas flow rate 500cc/win, upper electrode (a) temperature 2
When the lower electrode (11) temperature is 8°C or less, a 25μs thick alumite insulating film is deposited on the lower electrode (11) with a 15μs insulating film thickness.
25-μm thick through μs heat-resistant acrylic resin adhesive
FIG. 4 shows the number of synthetic polymer films (21), etching speed, and etching uniformity when heat-resistant polyimide resin, which is the synthetic polymer film (21), is adhered. From FIG. 4, it is clear that the etching rate is well within the practical range and that the uniformity of etching is significantly improved. In addition, since the synthetic polymer film (21) is a stable material with a dense surface, it can prevent abnormal discharge due to variations in impedance of the void (30), and damage to the semiconductor substrate (12) due to abnormal discharge can be prevented. It is possible to perform stable etching processing without any problems.

ここで、エツチング処理時に、図示しない冷却液循環器
による冷却液で、冷却パイプ(7,9)と上部電極冷却
ブロック■と下部電極冷却ブロック(10)を介して、
上部電極(イ)及び下部電極(11)を所望の温度に冷
却すると、エツチング速度が向上する。また、図示しな
い冷却ガス供給源からの冷却ガスを、冷却ガス供給パイ
プ(20)と孔(19)を介して半導体基板(12)と
合成高分子フィルム(21)間に所定の圧力と流量例え
ば数cc/min程度で供給し、半導体基板(12)1
面を冷却することにより、半導体基板(12)の温度均
一性が向上し、この結果、エツチングの均一性が向上す
る。
During the etching process, a cooling liquid from a cooling liquid circulator (not shown) is passed through the cooling pipes (7, 9), the upper electrode cooling block (2), and the lower electrode cooling block (10).
Cooling the upper electrode (a) and the lower electrode (11) to a desired temperature improves the etching rate. Further, a cooling gas from a cooling gas supply source (not shown) is supplied between the semiconductor substrate (12) and the synthetic polymer film (21) through the cooling gas supply pipe (20) and the hole (19) at a predetermined pressure and flow rate, for example. Semiconductor substrate (12) 1
Cooling the surface improves the temperature uniformity of the semiconductor substrate (12), which results in improved etching uniformity.

また、上部電極(イ)外周部に設けた絶縁性のシールド
リング(25)と下部電極(11)外周部に設けた絶縁
性のクランプリング(13)により、半導体基板(12
)の処理面とほぼ同じ大きさにプラズマを発生すること
ができるので、プラズマの拡散を防止でき、安定したエ
ツチング処理を行なえる。
Additionally, an insulating shield ring (25) provided on the outer periphery of the upper electrode (a) and an insulating clamp ring (13) provided on the outer periphery of the lower electrode (11) allow the semiconductor substrate (12
) Since plasma can be generated in approximately the same size as the processing surface, plasma diffusion can be prevented and stable etching processing can be performed.

そして、処理後の反応ガスを、排気リング(24)の排
気孔(23)を介して排気パイプ(22)から排出する
The treated reaction gas is then exhausted from the exhaust pipe (22) through the exhaust hole (23) of the exhaust ring (24).

次に、図示しない開閉機構で真空容器■を開け、クラン
プリング(13)とりフトピン(18)を上昇し、リフ
トピン(18)上の半導体基板(12)を図示しない搬
送機構で搬送し、動作が終了する。
Next, the vacuum container (■) is opened by an opening/closing mechanism (not shown), the clamp ring (13) and the lift pin (18) are lifted, and the semiconductor substrate (12) on the lift pin (18) is transferred by a transfer mechanism (not shown), and the operation is completed. finish.

上記実施例では上部電極の少なくともプラズマ化した塩
素系ガスに接触する面を用いて説明したが、少なくとも
一方の電極の少なくともプラズマ化した塩素系ガスに接
触する面であればよく、下部電極でもよく、上下両電極
でもよく、プラズマ化した塩素系ガスに接触しない電極
面を含んでもよく、上記実施例に限定されるものではな
い。
In the above embodiment, the explanation was given using the surface of the upper electrode that comes into contact with at least the chlorine-based gas that has become plasma, but any surface of at least one electrode that comes into contact with at least the chlorine-based gas that has become plasma may be used, and the lower electrode may also be used. , may be both upper and lower electrodes, or may include an electrode surface that does not come into contact with the chlorine-based gas turned into plasma, and is not limited to the above embodiments.

また、上記実施例ではアルマイト処理したAM製電極の
アルミナ層を用いて説明したが、プラズマ化した塩素系
ガスに接触し侵される電極面の絶縁層が900MΩ以上
であればよく、電極材質や絶縁層材質は上記実施例に限
定されるものでないことは言うまでもない。
Furthermore, in the above embodiment, the alumina layer of the alumite-treated AM electrode was used. It goes without saying that the layer material is not limited to the above embodiments.

しかも、上記実施例では被処理体に半導体基板を用いて
説明したが、エツチング処理されるもの  □であれば
何れでもよく、L CD (Liquid Cryat
al[)isplay)基板でもよく、ガラス基板でも
よい。
Moreover, in the above embodiment, a semiconductor substrate was used as the object to be processed, but any object to be etched may be used.
al[)isplay) substrate or a glass substrate may be used.

以上延べたようにこの実施例によれば、対向した電極の
少なくとも一方の電極の少なくともプラズマ化した塩素
系ガスに接触する面は絶縁抵抗が900MΩ以上の絶縁
層とし、対向した電極間に電圧を印加して被処理体をプ
ラズマ化した塩素系のガスでエツチングするので、電極
の寿命を長くし安定化でき、エツチング処理の安定性の
監視等を不要とし、電極交換の頻度を減少しメンテナン
ス時間の短縮及びメンテナンスサイクルを長くすること
ができる。
As described above, according to this embodiment, at least one of the opposing electrodes is provided with an insulating layer having an insulation resistance of 900 MΩ or more on the surface that comes into contact with the plasma chlorine gas, and a voltage is applied between the opposing electrodes. Since the object to be processed is etched with plasma-formed chlorine-based gas, the life of the electrode can be extended and stabilized, eliminating the need to monitor the stability of the etching process, reducing the frequency of electrode replacement, and reducing maintenance time. It is possible to shorten the maintenance cycle and lengthen the maintenance cycle.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、プラズマ化した塩
素系のガスに対する電極の寿命を長くし安定化したので
、自動化対応を可能とし、装置の稼働効率及び生産性を
向上できる。
As explained above, according to the present invention, the life span of the electrode for plasma-formed chlorine-based gas is extended and stabilized, so that automation is possible and the operating efficiency and productivity of the device can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のエツチング装置を説明する為の構成図
、第2図は第1図の上部電極の絶縁層を説明する図、第
3図は第1図の合成高分子フィルムの働きを説明する図
、第4図は第1図のエツチング速度と均一性と合成高分
子フィルム枚数との関係を示す図である。 図において、 11・・・下部電極     12・・・褥会箒惨28
・・・アルミナ層 特許出願人 東京エレクトロン株式会社第3図 1フ 第4図 OA、Blガ子フィルムオ乏)グ、
Figure 1 is a block diagram to explain the etching apparatus of the present invention, Figure 2 is a diagram to explain the insulating layer of the upper electrode in Figure 1, and Figure 3 is a diagram to explain the function of the synthetic polymer film in Figure 1. The explanatory diagram, FIG. 4, is a diagram showing the relationship between the etching rate and uniformity of FIG. 1 and the number of synthetic polymer films. In the figure, 11...Lower electrode 12...Bouai Houki 28
... Alumina layer patent applicant Tokyo Electron Ltd.

Claims (1)

【特許請求の範囲】[Claims]  対向した電極間に電圧を印加して被処理体をプラズマ
化した塩素系のガスでエッチングするエッチング装置に
おいて、少なくとも一方の上記電極の少なくともプラズ
マ化した塩素系ガスに接触する面は絶縁抵抗が900M
Ω以上の絶縁層であることを特徴とするエッチング装置
In an etching apparatus that applies a voltage between opposing electrodes and etches the object to be processed with plasma-turned chlorine-based gas, at least one of the electrodes has an insulation resistance of 900 M on the surface that comes into contact with the plasma-turned chlorine-based gas.
An etching device characterized by an insulating layer of Ω or more.
JP63014197A 1987-12-25 1988-01-25 Etching apparatus Pending JPH01189126A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP63014197A JPH01189126A (en) 1988-01-25 1988-01-25 Etching apparatus
KR1019880016865A KR970003885B1 (en) 1987-12-25 1988-12-17 Etching method and apparatus thereof
US07/287,156 US4931135A (en) 1987-12-25 1988-12-21 Etching method and etching apparatus
EP88121606A EP0323620B1 (en) 1987-12-25 1988-12-23 Etching method and etching apparatus
DE3889649T DE3889649T2 (en) 1987-12-25 1988-12-23 Etching process and device.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63014197A JPH01189126A (en) 1988-01-25 1988-01-25 Etching apparatus

Publications (1)

Publication Number Publication Date
JPH01189126A true JPH01189126A (en) 1989-07-28

Family

ID=11854394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63014197A Pending JPH01189126A (en) 1987-12-25 1988-01-25 Etching apparatus

Country Status (1)

Country Link
JP (1) JPH01189126A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03104887A (en) * 1989-09-20 1991-05-01 Hitachi Ltd Vacuum treating device
JPH0410335U (en) * 1990-05-18 1992-01-29
JPH05114582A (en) * 1991-10-22 1993-05-07 Tokyo Electron Yamanashi Kk Vacuum processor
US7264850B1 (en) 1992-12-28 2007-09-04 Semiconductor Energy Laboratory Co., Ltd. Process for treating a substrate with a plasma

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58206125A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Treating device for plasma
JPS59163827A (en) * 1983-03-09 1984-09-14 Toshiba Corp Plasma etching device
JPS6271231A (en) * 1985-09-25 1987-04-01 Toshiba Corp Susceptor
JPS62189725A (en) * 1986-02-14 1987-08-19 Matsushita Electric Ind Co Ltd Plasma cvd apparatus
JPS635528A (en) * 1986-06-25 1988-01-11 Nec Corp Reactive sputter etching device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58206125A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Treating device for plasma
JPS59163827A (en) * 1983-03-09 1984-09-14 Toshiba Corp Plasma etching device
JPS6271231A (en) * 1985-09-25 1987-04-01 Toshiba Corp Susceptor
JPS62189725A (en) * 1986-02-14 1987-08-19 Matsushita Electric Ind Co Ltd Plasma cvd apparatus
JPS635528A (en) * 1986-06-25 1988-01-11 Nec Corp Reactive sputter etching device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03104887A (en) * 1989-09-20 1991-05-01 Hitachi Ltd Vacuum treating device
JPH0410335U (en) * 1990-05-18 1992-01-29
JPH05114582A (en) * 1991-10-22 1993-05-07 Tokyo Electron Yamanashi Kk Vacuum processor
US7264850B1 (en) 1992-12-28 2007-09-04 Semiconductor Energy Laboratory Co., Ltd. Process for treating a substrate with a plasma

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