JPH01181231A - Binary data coding/decoding system - Google Patents

Abstract

PURPOSE:To improve the recording density and transfer rate of a sample servo system optical disk device or the like by increasing the shortest pit interval into 2T from 1.5T of (2-7)RLLC. CONSTITUTION:A data B is inputted to a terminal 2 and subject to serial/ parallel conversion by a shift register 4. The output is latched by a D-F/F5 and supplied to a PLA 6. Input terminals I0-I7 of the PLA correspond to 2-bit data Z0-Z3. In the basic conversion, the data is separated into 2-bit and 5-bit data are made correspondent to '10000', '01000', '00100' and '00000' with respect to codes A-D being obtained. Thus, the Tmin of a consecutive data satisfies 2T (T: data bit length, Tmin=2T) except 'CA', 'CB' and 'BA'. When the 'CA', 'CB' and 'BA' are consecutive, the two cases of them are converted into bit codes '0001000000' and '0000100000'.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method for recording binary data on a recording medium such as an optical disk or reproducing the original binary data from a recording medium that is suitable for recording. The present invention relates to a binary data encoding/decoding method that converts the converted double code string into a double code string and decodes and transforms the converted double code string.

[Conventional technology]

2. Description of the Related Art Conventionally, various encoding methods have been proposed and put into practical use in order to improve the recording density when recording binary data on a recording medium such as an optical disk.

FIG. 2 is an explanatory diagram showing an example of a conventional encoding method, and FIG. 2 (2) shows an example of a bit pattern of an original binary data string, and T indicates a bit interval. Figures (c) and 0 are examples of conventional encoding methods, and (c) is said to be the MFM method.
Q as in U.S. Patent No. 4115768 (2-7)
It is called RLLC.

In the figure, when applied to an optical disc, a recording pit is formed on the optical disc at the position of the converted code (channel code) 111, and during playback, the pit position is detected by a method such as detecting the differential signal of the playback signal. do.

This recording method is called RZ recording and is unique to optical discs. Conventional magnetic recording devices use the NRZI recording method in which the magnetization polarity is alternately reversed at pits of 1" in the encoded code. However, in the NRZI recording method, when even-order distortion occurs in the reproduced waveform, the detection signal duty fluctuates. do.

For this reason, the RZ recording method is mainly used in devices such as optical disk devices where it is difficult to create accurate pit shapes during recording due to power fluctuations in the recording laser power due to temperature and variations in disk characteristics. There is.

On the other hand, it is necessary to improve the linear density because the optical disk device needs to have a larger capacity and a higher transfer rate. We will discuss the obstacles when performing high-density recording.

First, we will discuss the increase in reproduced waveform interference. When the minimum recording pit interval (minimum pit interval "To* (2-7) 1.5T0 for RLLC in the MFM system in Figure ν) becomes smaller than the recording and reproducing light beam spot diameter, adjacent pits are also reproduced and the waveform Interference increases the jitter of the detected signal and reduces the error rate.

The light beam spot diameter is given by K·λ/NA, and currently it is difficult to achieve a diameter of about 1.0 μm or less.

(K: constant, λ: laser wavelength, NA: objective lens aperture) Therefore, an encoding method with a larger minimum pit interval is desirable.

Next, an increase in noise jitter due to a decrease in the S/N ratio will be described.

As the recording frequency increases, the S/N ratio of the reproduced signal decreases due to the phenomenon of high frequency reduction (resolution decrease), which is mainly caused by the optical beam spot diameter, and the S/N ratio deteriorates. Detection signal jitter increases and error rate decreases.

For this reason, an encoding system with a larger minimum pit interval is desirable.Next, we will discuss the increase in noise jitter due to a decrease in the S/N ratio.

As the recording frequency increases, the S/N ratio of the reproduced signal decreases due to the phenomenon of high frequency reduction (resolution decrease), which is mainly caused by the optical beam spot diameter, and the S/N ratio deteriorates. Detection signal jitter increases and error rate decreases.

For this reason, an encoding system with a larger minimum pit interval is desirable.

On the other hand, considering the encoding method, generally m-pit data is converted to n-bit code, and the minimum pit interval is Tm
1n, the following theoretical idea has been reported.

stand up

Tw (in discrimination window) = -xT ・・・・・・・・・
(1) Efficiency (Tw) cannot exceed the value shown in Figure 3.

That is, Tm1n is (2-7)RLLC (m=2,
n=4.

Missing d=2, k=7, Tm1n=1. ! yT,
Tw=0.5T) (D limit is described in the following paper.

[D, T, TANG and L, , R, BAHL1
g70. Information and information
rol 17 * 436-461d ゛' BLock Codes for a C1ass
of Con5trainedNoiseless
Channels' J "F, A, FRANASZE
K 197Q, July IBM Journal R
es, Develop' 5equuece-3t
ate Methods for Run-Length
hLimited Coding ”JOn the other handTm
Even if only in is increased, if W becomes extremely small,
Since jitter due to various noises, external crosstalk, etc. cannot be tolerated, a coding method with large Tm1n+Tw is desirable.

However, with the aforementioned optical disc, due to improvements in the S/N of the disc, the reproduction S/N ratio in the low frequency range is approximately 36 dB.
This results in a reduction in the recording frequency.

High-density recording becomes possible by improving the reduction in S and the reproduction waveform interference. On the other hand, in conventional encoding systems, it was more important to reduce the M value than the need for a self-clocking function. However, in recent years, optical disk devices have become more resistant to disk tilt and can simplify optical heads.

Sample servo type tracking servo started to be used. An outline of this method is shown in FIG.

On the disk track, servo signal extraction area (c) (
More than 1,000 servo byte areas (called servo byte areas) are formatted as pre-pits at equal intervals for one revolution. During recording and playback, the signal level between wobble pits is sampled and compared using the playback signal (c) of the servo bite section, thereby controlling the tracking servo and detecting prepits following the wobble pits, thereby providing a standard for indicating the servo bite position. Detect signal 0.

This signal is multiplied by a PLL circuit to obtain read/write channel clock 0. Data is divided into servo areas and data areas, such as 0, and the data format with preamble (self-locking format) used for conventional magnetic disks has a decrease in data efficiency (each data area is small and most of the data is in the preamble). (proprietary).

Possibly configurable.

However, in the data format as shown in FIG. 3, a necessary condition is that each data area is arbitrarily recorded and reproduced so that the encoded code is completed within each data area.

The (2-7) RLLC divides the data length into variable lengths of 2 bits, 3 bits, or 4 bits, and converts each channel code into 4 bits, 6 bits, or 8 bits. Therefore, it is difficult to complete the conversion at the last conversion section of the data area without inserting it into the servo area.

The function can be achieved by adding dummy data at the end of the data section, but the data section is usually composed of bytes, and each data byte is an area of about 10 to 15 bytes, and 1 byte is used as dummy data. It is very disadvantageous to use it for high density.

[Problem to be solved by the invention] Conventionally, (2-7) RLLC has been superior as a high-density recording method used in optical disk devices, etc., and has been put into practical use as an ISO standard for 5.25-inch optical disk devices. .

However, the shortest pit length is 1.5T (T: data pit length), and during high-density recording, S△ ratio deterioration occurs due to playback waveform interference and a decrease in signal component S. is required.

In addition, when applying the sample servo method to an optical disk device, even if it is a variable length code method, it is necessary that the encoding is completed within the data area of each servo byte area. The above-mentioned (2-7) RLLC has been problematic.

This invention solves the above-mentioned problems and proposes a new encoding method with the shortest pit length (2T) and the discrimination window (0,4T).

[Means to solve the problem]

The encoding/decoding method according to the present invention has the shortest pit interval (
2-7) We propose an encoding system that increases the RLLC's 1.5T to 2T, which allows the reduction in the discrimination window to almost reach the theoretical limit.

Using the sign parameter of d=4 in Fig. 2, “/n
= 215, the encoding algorithm achieves nearly 100% encoding efficiency.The following three points are characteristics of the encoding algorithm.

(1) Separate data into 2×N bits (an integer of 1≦N≦4) of variable length, and separate into 5×N bits, Tm1n=2.
Accomplish the code parameters of OT.

(2) In the case of N=1 conversion, the 5-bit code is a code in which one of the first three bits is "lo" or all "0", for example.

(3) When N≧2, the last 5-bit code of the converted 5-bit code 1”.

Also, for the input binary data string, a specific code that is always converted into an "O" pattern is assumed for the servo byte area of the optical disk device, and by performing the conversion, the servo byte area of the optical disk device is The entire conversion process is completed.

The decoding algorithm uses the maximum conversion code length (5xN (=
4) In order to prevent the hardware from increasing due to matching 20-bit patterns, we count the bits °1" in a specific 2-bit pattern of a 5-bit code, and
By having a counter that is cleared with a ``OO'' pattern and storing the output value of this counter for a maximum of four clocks using a 5-bit code clock, conversion information at the time of variable length conversion can be obtained from this stored data.

This conversion information is decoded by a 5-bit code,
It has the advantage of being easily decoded using a logical algorithm.

[Operation] In this invention, an input binary code string is subjected to variable length separation every 2×N bits (an integer of 1≦N≦4), converted into a 5×N bit channel code, and in the converted code string, Provided is a code conversion method having a feature that the minimum number of bits "0" is 4 or more consecutively adjacent to bit °1 °. When used as a recording code for an optical disk using the sample servo method, the minimum pit length can be increased to 2XT (T: data pit length), making it possible to achieve higher density than the conventional method.

Further, the encoding is completed from beginning to end within each data area, and the disadvantages of conventional RLL encoding methods, such as (2-7) RLLC, are eliminated.

In addition, in the decoding method, the maximum conversion code length (5X
In order to prevent the increase in hardware due to matching 4 = 20 bits) patterns, for the 5-bit code to be decoded, a specific 2-bit code pattern of the following 5-bit code is converted during variable length conversion. By providing a decoding scheme with logic used as information, the amount of hardware is greatly reduced.

〔Example〕

FIG. 1 shows an encoding algorithm showing one embodiment of the present invention. As for the conversion method for input data, priority is given to the conversion logic with the smallest number.

Basic conversion separates data into 2 bits, and the resulting four types of codes are A to D. For A to D, 5-bit data @10000" (1 in decimal notation) and 01000"
(2 in decimal notation), “00100” (8 in decimal notation), and “°ooooo” (O in 10 decimal notation).

When each code corresponds to numbers 10 to 13 in Figure 1,
Continuous data other than “CA”, “CB”, and “BA”5
XT=2'T). @CA", @CB", @B
If “A” are consecutive, two of these cases are considered as bit codes.
F -0001000000” andhi@0000100
000' lc conversion.

The characteristics during conversion are that the first 3 bits of the 5-bit code used in the basic conversion are always ``0'', and the last 5-bit code are all °O'', which is a unique pattern in the code pattern, and ``l''. min = 2. OT is satisfied.

If data and codes are assigned as shown in Figure 1, “C
When data of “B” is generated, similar idea 1, “C
BA”, “CBB”, “CBC”, “CB
D' (7) Convert 563 types into positive bit codes. There are three types of conversion patterns that satisfy Tm1n = 2T and have unique conversion patterns.For the remaining one type, the following 2-bit data (A, D) is added and converted to the title bit code. The converted code string is
It satisfies Tm1n=2T, is a unique pattern, and can be decoded. In addition, in the present invention, it is clear that the correspondence between the input data and the conversion code shown in FIG. 1 holds true even if the correspondence method is changed as described above. Situation (e.g., are there many errors that result in “1” → @Om, but many errors that result in @0 “→”1”?)
By optimizing the response depending on the situation, it is possible to improve decoding error propagation.

Also, as shown in Figure 4 instead of Figure 1, the 5-bit code in basic conversion is 10100'', '00010', @000
01'.

The conversion hood may be configured as shown in FIG. 4, except for the basic conversion, in which bit °1 exists in the latter three bits of ``ooooo'' or all ``0'' patterns are used. In this case as well, it is clear that the conversion code corresponding to the input data can be set freely as described above.In addition, in Fig. The servo area is configured in byte units, and in the case of 1 byte, “DD
By changing the conversion code to "DD"), all conversion codes become "O" patterns, and there is no recording in the servo area (recording is done in RZ with code °l"), and variable length conversion. Although it is a code, data conversion is completed before and after the servo byte area.

Next, an example of hardware for the encoding system shown in FIG. 1 will be explained.

FIG. 5 is an example of an encoding circuit, FIG. 6 is a timing chart for explaining the operation of the circuit in FIG. 5, and FIG. 7 is a PLA (programmable logic array) in FIG.
FIG. 6 is an explanatory diagram of the logical algorithm (6).

In FIG. 5, the source clock shown in FIG. 6(c) is input to the terminal (1), and data is input to the terminal (2), which are converted into serial/parallel data by the shift register (4). This output is generated by D-F/F (5), which is an inverted signal of the conversion mode signal (carry output 0 of counter (8)), which will be described later, and corresponds to the conversion number N (an integer of 1≦N≦4) described above. ) and input to PLA(e).

The input terminals Io to Iτ of the PLA each have 2-bit data Z.

~ Corresponds to Zs. The internal logic of the PLA is shown in FIG. 7, and P1 to P4 in FIG. 7 give the number N of conversions. Counter (8) is a preset counter, N=1.2,
According to 3.4, the pre-cassette values are 14 and L! .

The PLA outputs 0.01o are set to give 10.8. Oo～0. is a code conversion code, and an output code is set corresponding to the input data shown in FIG.

This code output is sent as serial data to the terminal aυ by the parallel/serial conversion shift register (7) in response to the channel clock 0 of the terminal @. The shift register (7) has D-F/F (
The latch (9) of 5) applies a shift load signal f,) for each conversion. Now, if the carry output p) of the counter (8) is output and the number of conversions N=2, the preset value 0 is set by the value ν. Therefore, the counter output value 0 becomes the value 1.5. and P until carry output appears.
The LA input data is held, and the output code string 0 is 10
Bits will be output. Note that a set signal for determining the 2-bit separation timing of data is inputted to the terminal (3) at the time of conversion stand-by. FIG. 8 shows an example of a decoding circuit according to the present invention. FIG. 9 shows an example of hardware of a decoding mode parameter detection circuit αη, which will be described later. Figure 10 is an explanatory timing chart,
FIG. 11 is an explanatory diagram of the internal logic of the decoding PLAI.

The channel clock (C) is input to the terminal (to), and the channel code @ is input to the terminal Q4, and is delayed by an additional bit by the serial/parallel shift register αθ.

(Xo is the maximum delay output) delayed 5-bit data (xo
~)C4) is latched by the D-F/F with the 5-bit separated clock 0 input to the terminal (A), and PLA(1
) is entered. On the other hand, the latter 2-bit signal of the 5-bit data is similarly latched by D=F/FB@ and input to the decoding mode parameter detection circuit αη.

As shown in FIG. 9, the detection circuit αη counts when “1” exists in the two bits,
) is output (J=-Js), and 5
1 is counted as @1'' in the last bit of the bit data, and the output value (J, , Jl) of the counter (C2) is output.

Note that these counters use this 2-bit signal as 100".
This is a configuration that is cleared when . This decoding mode parameter signal (Jo~J,) is similarly D-F/F (T).
~M at the input of the PLA.

and are input to the PLA as N0 to N1. ~M3 is information indicating the number of conversions N (an integer of 1≦N≦4),
No. to N becomes information giving the data separation position within each conversion number N.

Note that M,, No corresponds to the position of the converted data (Io to I4), and Mt - Ns corresponds to the position 5 bits later.

N! corresponds to the position after 10 hits. For example, if data encoded as @BA' with number 8 in Figure 1 is input, and the current data (Io = I4) corresponds to B,
MS=12M! By detecting =O, the number of conversions N=
2 is recognized as the first data, then 1Ns=
O determines that it is B.

Similarly, if A of @BA' becomes the current data position, then = 1. By M1=Q, it is recognized that the data is after the number of conversions N=2, and by No. 20, it is detected that it is A.

In Fig. 10, the input signal (Kl, to) to the decoding mode parameter detection circuit is (1,1)e (1,0)e
(0, O), the output of the OR circuit in FIG. 9 becomes 0, and the counter value (J, , J,) becomes 0. The 1 signal becomes 0 in the − direction, and the counter value (J, , J, )
becomes 0.

The PLA output signal O becomes a 2-bit input of the parallel/serial shift register, and decoded data (J) is output to the terminal (to) in response to the decoding clock (I) input to the terminal (c).

Note that a shift load signal of 0 is input to the shift register Q1), and channel data 0 is input every 5 bits.
The decoded 2-bit data is updated and output.

〔Effect of the invention〕

According to the present invention, the encoding parameters allow the minimum pit interval to be made much wider than in conventional MFM or (2-7) RLLC, and the discrimination window during decoding can be reduced to a value close to the theoretical limit value. Therefore, the recording density and transfer rate of sample servo type optical disk devices and the like can be greatly improved. In addition, the encoding and decoding hardware are commercially available ICs.
It is possible to easily construct a small-sized, large-capacity device using .

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of conversion showing an embodiment of one encoding algorithm of the present invention, Fig. 2 is an explanatory diagram showing restraint limits of encoding efficiency, etc., and Fig. 3 is an optical disk of sample servo type. An explanatory diagram of the format, FIG. 4 is a conversion explanatory diagram showing another embodiment of the encoding algorithm of the present invention, FIG. 5 is an encoding circuit diagram of the encoding method of the present invention, and FIG. 7 is a logic diagram of the PLA in the circuit of FIG. 5; FIG. 8 is a circuit diagram showing an embodiment of the decoding circuit of the present invention; FIG. 9 is a timing diagram for explaining the operation in the circuit; The figure is a circuit diagram showing the decoding mode parameter detection circuit in the circuit of Figure 8, Figure 10 is an explanatory timing diagram, Figure 11 is a logical explanatory diagram of the PLA of Figure 8, and Figure 1 is a conventional encoding FIG. 2 is an explanatory diagram illustrating an example of method conversion. In the figure, (4) is a Z shift register, (5) is a D-F/F
. (6) is a PLA, and (7) is a Y shift register. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (2)

[Claims] (1) Separate the binary data string into variable length units of 2 x N bits (an integer of 1≦N≦4), convert it into a 5 x N-bit code string, and convert the bit “1” of the code string to constituting a binary data code in which four or more consecutive minimum bits “0” are adjacent;
When N=1, the 5-bit code to be converted is all “0”
Or, 1 bit of a specific 3-bit code is “1”, and if N = 2, 3, or 4, the separated 5-bit code is all “0” or the specific 3 bits are “1” Binary data encoding method. (2) When decoding a code string encoded using the encoding method set forth in claim 1, the code string is separated into every 5 bits, and a specific 2-bit pattern of the 5-bit code is identified. It has a counter that counts codes and clears them with a "00" pattern, and means for storing the output value of the counter, and decodes 2-bit data according to the 5-bit pattern logic to be decoded with the storage logic. Binary data decoding method.