JPH01179444U - - Google Patents

Info

Publication number
JPH01179444U
JPH01179444U JP7654688U JP7654688U JPH01179444U JP H01179444 U JPH01179444 U JP H01179444U JP 7654688 U JP7654688 U JP 7654688U JP 7654688 U JP7654688 U JP 7654688U JP H01179444 U JPH01179444 U JP H01179444U
Authority
JP
Japan
Prior art keywords
output
input
interface area
rectangular planar
output interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7654688U
Other languages
English (en)
Japanese (ja)
Other versions
JPH085558Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988076546U priority Critical patent/JPH085558Y2/ja
Publication of JPH01179444U publication Critical patent/JPH01179444U/ja
Application granted granted Critical
Publication of JPH085558Y2 publication Critical patent/JPH085558Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP1988076546U 1988-06-09 1988-06-09 半導体チップにおける入出力インタフェース領域の平面レイアウト構造 Expired - Lifetime JPH085558Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988076546U JPH085558Y2 (ja) 1988-06-09 1988-06-09 半導体チップにおける入出力インタフェース領域の平面レイアウト構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988076546U JPH085558Y2 (ja) 1988-06-09 1988-06-09 半導体チップにおける入出力インタフェース領域の平面レイアウト構造

Publications (2)

Publication Number Publication Date
JPH01179444U true JPH01179444U (US07923587-20110412-C00001.png) 1989-12-22
JPH085558Y2 JPH085558Y2 (ja) 1996-02-14

Family

ID=31301567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988076546U Expired - Lifetime JPH085558Y2 (ja) 1988-06-09 1988-06-09 半導体チップにおける入出力インタフェース領域の平面レイアウト構造

Country Status (1)

Country Link
JP (1) JPH085558Y2 (US07923587-20110412-C00001.png)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114246A (en) * 1981-01-07 1982-07-16 Toshiba Corp Master-slice type semiconductor device
JPS62154640A (ja) * 1985-12-26 1987-07-09 Nec Corp 半導体装置
JPH01109746A (ja) * 1987-10-22 1989-04-26 Mitsubishi Electric Corp Cmosゲートアレイ

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57114246A (en) * 1981-01-07 1982-07-16 Toshiba Corp Master-slice type semiconductor device
JPS62154640A (ja) * 1985-12-26 1987-07-09 Nec Corp 半導体装置
JPH01109746A (ja) * 1987-10-22 1989-04-26 Mitsubishi Electric Corp Cmosゲートアレイ

Also Published As

Publication number Publication date
JPH085558Y2 (ja) 1996-02-14

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