JPH01174070A - Digital vertical deflection circuit - Google Patents

Abstract

PURPOSE:To prevent production of distortion on a screen of a picture tube by counting a horizontal synchronizing signal such as an input video signal, changing linearly the magnitude of a magnetic field generated by a vertical deflection coil and varying the direction of the magnetic field from one to other direction. CONSTITUTION:A horizontal synchronizing signal and a vertical synchronizing signal of a video signal or the like are inputted to a counter circuit 1. When the count of the horizontal synchronizing signal is increased, since an H level output of the counter circuit 1 is increased in a binary way, the magnetic field generated in the vertical deflection coil is weakened and cancelled. Moreover, when the count is increased, the magnetic field is increased gradually in the opposite direction and reaches a maximum magnitude finally. Since the split winding coils 31-39 of the vertical deflection coil are subject to weighting such as one turn, two turns -256 turns, the magnetic field generated in the vertical deflection coil is varied linearly in a binary way is response to the number of horizontal synchronizing signals..

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a vertical deflection circuit that vertically controls the electron beam of a picture tube of a display device, etc. This relates to a vertical deflection circuit.

[Conventional Examples] Conventionally, this type of vertical deflection circuit consists of a vertical oscillation circuit that generates a sawtooth voltage, a vertical drive circuit that shapes and amplifies this voltage, and a vertical deflection circuit that further amplifies the shaped and amplified voltage. It consists of a vertical output circuit that provides a sawtooth flow to the coil. Further, the frequency and phase of the vertical oscillation circuit are controlled by a vertical synchronization signal separated from the video signal by a synchronization circuit within the receiver. That is, the voltage applied to the vertical deflection coil is an analog sawtooth wave, and the current flowing through the vertical deflection coil changes in an analog manner.

[Problems to be solved by the invention] However, ideally, the voltage applied to the vertical deflection coil increases linearly and returns instantaneously at the end, but the deflection circuit described above is an analog circuit. Due to the shape of the deflection yoke, etc., it is difficult to make the magnetic field corresponding to the sawtooth wave perfectly linear, which also causes distortion of the picture tube screen.

On the other hand, most computers these days are digital, and display devices have become indispensable for these computers. This display device uses a picture tube also as a display device, and is therefore equipped with the above-mentioned vertical deflection circuit and the like.

By the way, since the computer mentioned above is digital,
If the deflection circuit and the like of the display device can also be controlled digitally, there will be advantages such as easier control.

This invention was made in view of the above points.

The purpose is to provide a novel digital vertical deflection circuit in which the voltage applied to the vertical deflection coil is changed by digital switching, and the magnetic field of the vertical deflection coil is made linear.

[Means for Solving the Problems] In order to achieve the above object, the present invention includes a vertical deflection coil consisting of n divided coils each having a different number of turns, and at least n output terminals. A counter circuit that counts horizontal synchronization signals such as signals, and loads the signal of this count value from the above output terminal with a vertical synchronization signal such as an input video signal, and according to the signal from the output terminal. and n switch circuits for respectively switching and supplying a constant current in a predetermined direction to the divided winding coil through the switching, and as the count value of the counter circuit increases, the vertical deflection coil The magnitude of the magnetic field generated by the magnetic field is changed linearly, and the direction of this magnetic field is changed from one direction to the opposite direction.

[Example] Embodiments of the present invention will be described below based on the drawings.

In the figure, a counter circuit 1 receives a horizontal synchronization signal and a vertical synchronization signal separated from a video signal, etc. input to the display device, etc., counts the horizontal synchronization signal, and also counts the horizontal synchronization signal. and its count value, for example 2t', .

Nine output terminals 1□ that output binary signals of 2a,
..., 19 are provided. In other words, when 5 horizontal synchronization signals are counted, output terminal 11 (2°)
, L (2''), and L level signals are output to the other output terminals.

These output terminals 1□,...,1. The signals from the respective switch circuits 21. ..., 2. and these switch circuits 21. ..., 2. performs a switching operation to output either a positive constant voltage e or a negative constant voltage e, and has a different number of turns depending on the voltage.
Two split winding coils 30. ..., a constant current is applied at 3 degrees. In addition, those divided winding coils 3
1. ..., 3. The other end of 0-divided winding coil 3□,...,3. is grounded. A vertical deflection coil is constructed, and the number of turns thereof is 1, for example, output terminals 1□, . . . , 1. Output 2°,... 1 turn, 2 turns, 2 m,
..., 256 volumes.

Then, the switch circuit 21. ..., 2. The switching operation is as follows: 1. For example, when an L level signal is input, a negative constant voltage e is divided into coils 3□, . . . , 3. When an H level signal is input, a positive constant voltage e is applied to the divided winding coils 31,...
3. It is designed to be applied to Therefore, the split winding coil to which the positive constant voltage e is applied and the negative constant voltage e
Current flows in the opposite direction to the split-wound coil to which the current is applied (as indicated by the arrow in the figure), and the magnetic fields generated by them are exactly opposite in direction. Therefore, when the count number of the horizontal synchronization signal by the counter circuit 1 increases, H and L level signals are output in binary form according to the count number, and the switch circuit to which these H level signals are input receives a positive signal. A constant voltage e is output, and a negative constant voltage e is output from the switch circuit to which the L level signal is input, and the magnetic field of the vertical deflection coil can be changed linearly in a binary manner. .

Note that the switch circuit 21. ..., 2. has the configuration shown in FIG. 2, for example. Taking the switch circuit 21 as an example, the output signal of the counter circuit 1 is amplified by a predetermined current in the amplifier 2a, and the signal from the output terminal of the amplifier 2a is amplified by a resistor. The signal is inputted to the bases of the pnρ type transistor 2b and the npn type transistor 2c via. that pn
The emitter of the p-type transistor 2b is connected to a positive constant voltage e, and its collector is connected to the npn-type transistor 2.
d, and is connected to the base of npn transistor 2
The collector of pnp transistor 2e is connected to the base of pnp transistor 2e, and its emitter is grounded. np
The emitter of the n-type transistor 2d is connected to a negative constant voltage e, and the emitter of the pnp-type transistor 2e is connected to a positive constant voltage.
The collectors of the pnp transistors 2e and 2e are connected to each other, and the collectors are connected to one end of the split-wound coil 31 via a resistor 2f (which determines the current flowing through the split-wound coil 31). The base of the npn transistor 2c is grounded via a resistor, and the npn
The base of the pnp type transistor 2d is connected to a negative constant voltage e through a resistor, and the base of the pnp type transistor 2e is connected to a positive constant voltage through a resistor.

That is, when the input signal is at the L level, the pnp transistor 2b is turned on, and when the input signal is at the high level, the npn transistor 2c is turned on. When the pnp transistor 2e is turned on due to the npn transistor 2c being turned on, a constant current flows through the one-divided winding coil 31 in the direction of the solid arrow. Further, when the npn transistor 2d is turned on due to the ON state of the pnp transistor 2b, a constant current flows through the divided winding coil 31 in the direction of the broken line arrow. Note that the resistor 2f is connected to each divided winding coil 31. of the vertical deflection coil.・・・
・.

3. The number of turns may be taken into consideration to make the number of turns different.

Next, the operation of the digital vertical deflection circuit having the above configuration will be explained in detail.

First, when the counter circuit 1 is reset, its output terminal 11. ..., 1. is in the output state of an L level signal. Then, when a synchronizing signal or the like is input to a device provided with the digital vertical deflection circuit.

First, the data based on the L level signal is loaded with the vertical synchronization signal, and a negative constant voltage e is applied to each divided winding coil 31 of the vertical deflection coil. ..., 3. A current is applied in the direction of the dashed arrow. Therefore, the maximum magnetic field is generated in the vertical deflection coil, and the amount of deflection of the electron beam is the largest, and the electron beam is deflected toward the top of the picture tube, for example.

Subsequently, when the horizontal synchronization signal and vertical synchronization signal such as the video signal are input to the counter circuit 1, the counter circuit 1
From then on, 2o, 2',
... A binary signal of 2 m is output. Here, for example, when the count number of the horizontal synchronization signal is 1, the vertical synchronization signal is output from the output terminal 11 of the counter circuit 1.
Since a level signal is output, switch circuit 2. is switched to output a positive constant voltage Φ, current flows through the split winding coil 31 in the direction of the dashed arrow opposite to the above, a reverse magnetic field is generated, and the magnetic field of all vertical deflection coils is weakened. Therefore, the amount of deflection of the electron beam is correspondingly reduced, and the spot of the electron beam is positioned slightly below the top position of the picture tube.

In this way, as the count number of the horizontal synchronization signal increases, the H level output of the counter circuit 1 increases in a binary manner, so that the magnetic field generated by the vertical deflection coil is weakened and even cancelled. Further, as the count increases, the magnetic field gradually increases in the opposite direction, and reaches its maximum size at the end (for example, when all the output terminals 11, . . . , 1. are at H level). As a result, the amount of deflection of the electron beam becomes maximum again, and the electron beam is directed toward the lowest position of the picture tube.

That is, each divided winding coil 3□ of the vertical deflection coil,
..., 3. is the output terminal 11° of the counter circuit 1...
1. 1 corresponding to 2°, ... 2 m output from
Since the magnetic field is weighted as one turn, two turns, . . . , 256 turns, the magnetic field generated by the vertical deflection coil changes linearly in a binary manner according to the number of horizontal synchronization signals.

Note that, when the count number of the counter circuit 1 increases, the counter circuit 1 outputs, for example, the output terminal 12. . . , 19 are all cleared at the H level, and upon clearing, the output terminals 11 . . . , of the counter circuit 1 are cleared. ..., 1.
is output at L level. Therefore, after the electron beam is deflected in the direction of the lowest position of the picture tube, its output terminal 1
1. ..., 1. The electron beam is again deflected toward the top of the picture tube by the output of the L level signal from the picture tube.

FIG. 3 is a circuit block diagram showing a modified embodiment of the invention. In addition, in the figure, the same parts as in FIG. 1 are given the same reference numerals, and redundant explanation will be omitted.

In this embodiment, each split winding coil 31 . of the vertical deflection coil in the above embodiment is used. ..., 3. Taking into account the fact that errors occur in the magnitude of the magnetic field generated due to manufacturing, etc., which causes distortion in the picture tube image, it is possible to correct this error.

Therefore, the output terminal 11 of the counter circuit 1. ....

The output signal from 19 is treated as an address and the memory circuit (
For example, it is input to FROM) 4. The memory circuit 4 stores data in which the magnetic field generated by the already manufactured vertical deflection coil is corrected.

For example, in the manufactured vertical deflection coil.

The number of horizontal synchronization signals is 128 (output 0 of counter circuit 1)
10000000), even though the magnetic field generated by the deflection coil must be H, the vertical deflection coil is H + I (for example, a single-turn coil 3
．． ) is generated, the address specified by the signal (000000001) output from the counter circuit 1 is
010000001) will be written. For example, when the horizontal synchronization signal becomes 128, an H level signal is output from the output terminals 11 and 1° of the counter circuit 1, and (010000001) is output from the memory circuit 4.
data is read.

The 9-bit data read out by the signal from the counter circuit 1 is sent to an amplifier 51. which is provided with inverted and non-inverted output terminals for each bit. ... are respectively input to t5i. That is, when the count number of the counter circuit 1 is 128, the amplifiers 51, 5 . An H level signal is input to the amplifier, and an L level signal is input to the other amplifiers.

Taking as an example a circuit to which the least significant bit is input, amplifier 5. The signal from the inverting output terminal of
A positive constant voltage e is input to the collector of the n-type transistor 6□ and the pn-type transistor 61 through the resistor 81.
The pnρ type transistor reflectors are grounded, and their emitters are connected to each other. Further, a signal from the non-inverting output terminal of the amplifier 51 is input to the bases of the npn transistor 9□ and the pnp transistor 101, and a positive constant voltage Φ is input to the collector of the npn transistor 91 via the resistor 81. , the collectors of the pnp transistors 10L are grounded, and their emitters are connected to each other. These amplifiers 5
□, npn type transistors 61, 91, pnρ type transistors 7□, 10□, and resistor 8□ correspond to the switch circuit 21 (shown in FIG. 1) in the previous embodiment.

The npn type transistor 6 □, the pnp type transistor 1mitter, the npn type transistor 91 and the pnp type transistor 10. A split winding coil of the deflection coil between the emitter of 3. is connected.

Therefore, when an L level signal is input to the amplifier 5□, the npn transistor 6X and the pnp transistor 101 are turned on, so that the divided winding coil 3
．． A constant current flows in the direction of the solid arrow.

Also, amplifier 5. When an H level signal is input to the split winding coil 3. A constant current flows in the direction of the dashed arrow, that is, in the opposite direction.

In addition, other split winding split winding coils 3□,...

The circuit for passing current through 3 is exactly the same as described above.

Therefore, 1. For example, the count value of counter circuit 1 is 12.
When 8=(010000000), (010000001) is read out from the memory circuit, so current flows in the divided winding coil 31.38 in the direction of the dashed arrow.
Other split winding coils 321 aa* 3493g1
3G, 3. ．． 3. Current flows in the direction of the solid arrow.

In other words, the magnitude of the magnetic field of the vertical deflection coil is 3□
..., 3. It is obtained by subtracting the magnetic field generated by the coils 31 and 3 degrees from the magnetic field generated when a constant current flows in the same direction.

Next, the operation of the digital vertical deflection circuit having the above configuration will be explained.

First, it is assumed that the memory circuit 4 stores data in which distortion is detected by operating a manufactured set, and if there is an error in the magnetic field, the error is corrected. In this case, for example, if the memory circuit 4 is constituted by a FROM, the data may be written using a ROM writer or the like. Then, when the counter circuit 1 is reset,
Its output terminal 11. ..., 1. is in the output state of an L level signal. When a video signal or the like is input to a device equipped with the digital vertical deflection circuit, the signal is first sent from the memory circuit 4 at the address of the L level signal (000000000) loaded with the L level signal using the vertical synchronization signal. For example, the data (oooooooooo) is output, and the divided winding coil 31. ..., 3. Since a constant current is passed through all of them in the same direction, the maximum magnetic field is generated in the vertical deflection coil as in the previous embodiment, and the amount of deflection of the electron beam is the largest. Deflected toward the top position.

Subsequently, when the horizontal synchronization signal and vertical synchronization signal such as the video signal are input to the counter circuit 1, the counter circuit 1
From then on, 2 degrees, 21.
..., 28 binary signals are output. here,
For example, if the horizontal synchronization signal count is 128,
Counter circuit 1 outputs the count value (0) using the vertical synchronization signal.
10000000) is loaded. Then, at that address (010000000), the memory circuit 4 outputs (
010000001) is read out, the split winding coils 31, 3 . generates a magnetic field opposite to that of the other split winding coils, and the magnetic field of the vertical deflection coil is weakened accordingly. Therefore, the amount of deflection of the electron beam is correspondingly reduced, and the spot of the electron beam is positioned below the top position of the picture tube.

In this way, when the count number of the horizontal synchronization signal increases, the H level data read out from the memory circuit 4 increases in a binary manner as in the previous embodiment, and the magnetic field generated by the vertical deflection coil is weakened and canceled out. Until. Furthermore, as the count increases, the magnetic field gradually increases in the opposite direction, as in the previous embodiment, and finally reaches its maximum size. That is, the amount of deflection of the electron beam becomes maximum again, and the electron beam is directed toward the lowest position of the picture tube.

That is, as in the previous embodiment, the magnetic field generated by the vertical deflection coil is linearly changed in binary according to the number of horizontal synchronization signals and the data read from the memory circuit 4.

In the above two embodiments, the output of the counter circuit 1 is nine, but it may be changed depending on the number of scanning lines of a picture tube of a display device or the like. In this case, the output terminal 11 of the counter circuit 1. ...The magnetic field generated by the vertical deflection coil may be maximized when all tl-i output L level or H level. Further, the switch circuits 2□, . . . , 2. may be used in the embodiment of FIG. 3, and the switch circuit in the embodiment of FIG. 3 may be used in the embodiment of FIG.

[Effects of the Invention] As explained above, according to the present invention, the magnitude of the magnetic field of the deflection coil can be linearly changed in digital values (binary), and when used in a display device of a digital computer, Display control can be made easier.

[Brief explanation of the drawing]

FIG. 1 is a schematic circuit block diagram of a digital vertical deflection circuit showing an embodiment of the present invention, FIG. 2 is a specific circuit diagram of a switch circuit provided in the digital vertical deflection circuit, and FIG. 3 is a diagram of the present invention. FIG. 3 is a schematic circuit block diagram of a digital vertical deflection circuit showing a modified embodiment of FIG. In the figure, 1 is a counter circuit, 11. ..., one is an output terminal, 21. ..., 2g is a switch circuit, 2c amplifier,
2b, 2e are pnp type transistors, 2c, 2d are npn type transistors, 2f is a resistor, 31. ..., 3
．． is a split winding coil (deflection coil), 4 is a memory circuit (
PROM), 5. ,...,5. is an amplifier (inverting, non-inverting output), 6□,...169991? ..., 3. is an npn type transistor. 71,-,7. ．． 101.・,10. is a pnp type transistor. Patent applicant: Fujitsu General Co., Ltd. Agent, patent attorney: Takuya Ohara! 5 (X
J version Masato

Claims (2)

[Claims] (1) A vertical deflection coil consisting of n divided coils each having a different number of turns, and at least n output terminals, which counts horizontal synchronizing signals such as input video signals and transmits the counted value signal to the input terminal. A counter circuit loaded from the output terminal with a vertical synchronization signal such as a video signal, and a counter circuit that switches in accordance with the signal from the output terminal, and supplies a constant current in a predetermined direction to the split-wound coil by the switching. n switch circuits for linearly changing the magnitude of the magnetic field generated by the vertical deflection coil and changing the direction of the magnetic field as the count value of the counter circuit increases. A digital vertical deflection circuit characterized by changing from one direction to the opposite direction. (2) In claim (1), a memory circuit is provided from which data is read out using the signal output from the counter circuit, and data that has been corrected for the magnetic field generated by the vertical deflection coil is stored in the memory circuit in advance. and a digital vertical deflection circuit that performs switching of the switch circuit based on the data.