JPH01157785U - - Google Patents
Info
- Publication number
- JPH01157785U JPH01157785U JP5575888U JP5575888U JPH01157785U JP H01157785 U JPH01157785 U JP H01157785U JP 5575888 U JP5575888 U JP 5575888U JP 5575888 U JP5575888 U JP 5575888U JP H01157785 U JPH01157785 U JP H01157785U
- Authority
- JP
- Japan
- Prior art keywords
- subtraction
- counting
- display
- timer
- displays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Electric Clocks (AREA)
- Measurement Of Predetermined Time Intervals (AREA)
Description
第１図は本考案の一実施例のタイマ及び計数機
能付電子腕時計の外観を示す図、第２図は表示部
の拡大図、第３図は回路構成を示すブロツク図、
第４図はＲＡＭの構成の一部を示す図、第５図は
表示の一例を示す図、第６図〜第８図は動作を示
すフローチヤートである。
１……時計本体、２……表示部、２ａ，２ｂ…
…セグメント表示部、２ｃ……イラスト表示体、
４……ＲＯＭ、６……ＲＡＭ。
Fig. 1 is a diagram showing the external appearance of an electronic wristwatch with a timer and counting function according to an embodiment of the present invention, Fig. 2 is an enlarged view of the display section, and Fig. 3 is a block diagram showing the circuit configuration.
FIG. 4 is a diagram showing a part of the configuration of the RAM, FIG. 5 is a diagram showing an example of the display, and FIGS. 6 to 8 are flowcharts showing the operation. 1...Watch body, 2...Display section, 2a, 2b...
...Segment display section, 2c...Illustration display body,
4...ROM, 6...RAM.
Claims (1)
段と、 該記憶手段のタイマ時間を減算する減算手段と
、 前記記憶手段のタイマ時間と前記減算手段の減
算結果とを表示する少なくとも２つの表示手段と
、 競技の得点を計数する計数手段と、 前記表示手段の一方に前記計数手段による得点
を他方に前記減算手段の減算結果を表示するよう
切り換える表示制御手段とを備えることを特徴と
するタイマ付計数装置。[Claims for Utility Model Registration] Storage means for storing at least two timer times; subtraction means for subtracting the timer time of the storage means; and displaying the timer time of the storage means and the subtraction result of the subtraction means. At least two display means, a counting means for counting the scores of the competition, and a display control means for switching so that one of the display means displays the score obtained by the counting means and the other display means displays the subtraction result of the subtraction means. Features a counting device with a timer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5575888U JPH01157785U (en) | 1988-04-25 | 1988-04-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5575888U JPH01157785U (en) | 1988-04-25 | 1988-04-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01157785U true JPH01157785U (en) | 1989-10-31 |
Family
ID=31281660
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5575888U Pending JPH01157785U (en) | 1988-04-25 | 1988-04-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01157785U (en) |
-
1988
- 1988-04-25 JP JP5575888U patent/JPH01157785U/ja active Pending