JPH01157173A - Automatic focusing device - Google Patents

Abstract

PURPOSE:To always attain an exact focusing by providing a gate pulse generator, executing the opening and closing of a gate circuit with using this gate pulse and removing a high luminance component. CONSTITUTION:An image level and a prescribed threshold are compared by a comparator 10 and high luminance information over the threshold are stored to a memory 12. The output of the memory 12 is shifted by D-FFs 140 and 141 of a gate pulse generating circuit 102 and a logical sum is obtained in an OR gate 142 for the output. Then, the output is fetched into an (n)-bit shift register 144 with the clock of a clock generator 149. In a process to rotate the data of the register 144, the logical sum between the respective outputs of the register 144 and D-FFs 145 and 146 is obtained in an OR gate 147 and the gate pulse is obtained. A gate circuit 5 is opened and closed with using this gate pulse and the removal of the high luminance component is executed. Thus, the extension of the high luminance component at a non-focusing time can be removed and the position control of a lens is exactly executed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Application of the Invention) The present invention relates to an improvement in an automatic focusing device disposed in a video camera or the like.

(Background of the Invention) Conventionally, this type of device extracts the high frequency components contained in the video signal using a band pass filter (hereinafter referred to as BPF) or the like, or extracts the sharpness of the edge of the object using a differentiating circuit or the like. A method is known in which the state of the subject image is determined and the position of the lens is moved so that the extracted amount is maximized to obtain the in-focus state of the video signal. This method is described in detail in NHK Technical Research, Vol. 17, No. 1, ``Automatic focus adjustment of television cameras using mountain-climbing servo system,'' written by Ishida et al.

In the above method, if a light source such as a light bulb is present in the captured image, the image will appear as if a high-brightness object was present in a portion of the relatively dark image. Even if the lens is out of focus, the video signal obtained from such a subject image has a considerably large high frequency component due to the influence of the high-brightness subject in the video. Also, when using a differential circuit,
The edge portion has a large differential value. In this way, a high-brightness subject itself has a large high-frequency component, so when the focusing device operates as described above, it does not try to focus on the target person or other subject, but instead focuses on the high-brightness subject. It ends up. Furthermore, as described above, since a high-brightness subject has large high-frequency components and differential values even in an out-of-focus state, the focusing device is likely to malfunction, and even a high-brightness subject may not be in focus.

In view of this point, conventionally, the following method has been proposed to eliminate the influence of this high-brightness object. The first conventional example will be explained using FIG. 4.

In FIG. 4, 1 is a lens, 2 is an image sensor that converts the subject image projected by the lens 1 into an electrical signal, 3 is a preamplifier that amplifies the video signal obtained from the image sensor 2, and 4 is an image from the preamplifier 3. A process circuit that obtains a standardized video signal such as NTSC from the signal, 5 is a preamplifier 3
gate circuit that opens and closes the output signal of , 6 is the preamplifier 3
BPF extracts high frequency components from the output of , 7 is BPF6
8 is a motor drive circuit that moves a motor (to be described later) in a direction in which the output of the detection circuit 7 increases; 9 is a lens driven by the output of the motor drive circuit 8; 1 is a motor that moves the position of 1; 10 is a comparator that compares the video level of the video signal from the preamplifier 3 with a certain threshold value Vs; 11 is each block that divides one screen into a grid of m length x n width. 12 is a memory for storing the output result of the comparator 10 for each divided block; 13 is a memory 12 corresponding to the position of each block divided by the divided pulse generator 11; An address counter 14 is a gate pulse generation circuit that reads out the contents of the memory 12, generates a gate pulse based on the data, and outputs the gate pulse to the gate circuit 5.

Next, the operation will be explained.

As shown in FIG. 5(a), when a high-brightness object A exists in the screen, when this high-brightness object A is scanned with scanning line B, the output of the preamplifier 3 will be as shown in FIG. 5(b). Become. The image level of a high-brightness subject is very high compared to that of other subjects, and the threshold value Vs as shown in Figure 5(b) is
By setting the threshold value Vs and the video level of the previous high-brightness object using the comparator 1o, the result shown in FIG.
A high brightness detection output shown in C) is obtained. On the other hand, the divided pulse generator 11 divides the screen into m vertical x n horizontal blocks as shown in FIG. 6(a), and generates a pulse train as shown in FIG. An address signal representing the position of each block shown in C) is generated.

It should be noted that each signal in (b) and (c) shown in FIG. 6 is for only the horizontal direction, but the signals in FIG.
) The same applies to the vertical direction as shown in (c). The address counter 13 specifies the memory address so that the position of each divided block corresponds to the address of the memory 12, but the data written to the memory is the high brightness detection output in each block. If there is a region of "H", "1" is written as data, and if there is no region of high brightness detection output "H" in the block, "0" is written. General static RA
In the case of M, writing as described above is possible by always setting the data input to "1" and connecting the high brightness detection output obtained from the above-mentioned comparator 10 to the write enable terminal.

The details of reading the memory contents will be described later, but the screen scan as shown in FIG. 2(b) is performed from line ai to line a in FIG.
During the horizontal retrace period (hereinafter referred to as HBLK) while moving to the il1 row, the data in the ai+1 row is read, but immediately after this reading, the data input to the memory 12 is
0" and the write enable is set to "H", the memory in the a i+1 row is reset. Using the n pieces of data read during this time, the gate pulse generation circuit 14 resets the data in the a i1 row. “H”, “O” when “1”
A pulse train that becomes "L" when `` is generated is generated every horizontal period (hereinafter referred to as IH), and the gate circuit 5 is opened and closed using this output pulse train.

As described above, the high brightness information in one field is converted into information for each block and stored in the memory, and the gate pulse is obtained based on the memory contents in the next field, so that the high brightness information for the focusing device is The influence of the subject can be removed.

As a second conventional example, as shown in FIG. 7, after obtaining a high brightness detection output B from a video signal A, a pulse C is created by widening the pulse width of this high brightness detection output B by a predetermined width. ,
On the other hand, this pulse C
A method has also been proposed in which high-luminance components are removed by gating using . This method
No. 877.

Here, the brightness component of a high-brightness subject expands radially depending on the focal state, as shown in FIGS. 8(a) to (C). That is, in the in-focus state, the high-luminance component is sharp as shown in Figure 8(C), and is limited to a narrow part on the waveform, but in the out-of-focus state, the high-luminance component is sharp as shown in Figure 8(a) and (b). The waveform becomes wider in the left and right direction. Although FIG. 8 shows only the horizontal direction, this effect is the same in the vertical direction as well.

In the above-mentioned two conventional examples, in the first conventional example, when a high-brightness subject exists near the boundary line of divided blocks, the spread of the high-brightness component at the time of out-of-focus as described above is There may be cases where the brightness component extends to other adjacent blocks other than the existing block, and the high-luminance component that extends to this block is not removed. Further, in the second conventional example, since the width of the gate pulse is expanded only in the horizontal direction, the spread of the high luminance component in the horizontal direction can be compensated for, but the spread in the vertical direction cannot be eliminated.

As can be seen from the above, in the past, the effect of removing the spread of a high-brightness object when out of focus was not sufficient.

(Objective of the Invention) An object of the present invention is to solve the above-mentioned problems and provide an automatic focusing device that can always perform accurate focusing.

(Features of the Invention) In order to achieve the above object, the present invention provides a high-brightness component detection means for detecting the presence or absence of a high-brightness component in each of a plurality of divided areas set on an imaging surface, and gate opening/closing control means for blocking the supply of video signals to the focus detection means in the divided regions and the adjacent peripheral divided regions by means of gate means, thereby eliminating obstacles to obtaining a focused state of the lens. It should be noted that an object having a high luminance component greater than a predetermined value usually has a high luminance component over a wider area than the one divided area, and the video signal passing through these divided areas is not used for focus detection. It is characterized by the following.

(Embodiments of the Invention) Hereinafter, the present invention will be described in detail based on illustrated embodiments.

FIG. 1 is a block diagram showing one embodiment of the present invention.
The same parts as in the figure are given the same reference numerals.

In FIG. 1, reference numeral 101 is an address counter that can sequentially designate memory addresses according to the screen scanning position. 1
02 is a gate pulse generation circuit that takes the logical sum of three rows of data read from the memory 12 and generates a gate pulse that is further spread by one block on the left and right. 2 of the block data
D flip-flops (hereinafter referred to as D-FF) 140 and 141 that hold data for blocks; a three-man OR gate 142 that takes the logical sum of three rows of data; a changeover switch 143; An n-bit shift register 144 that holds the data of each block, D-FFs 145 and 146 that further shifts the output of the n-bit shift register 144 by 2 bits, and a logical sum of the outputs of the n-bit shift register 144 and D-FFs 145 and 146. Toru 3-man power or gate 147, D-FF 14
Clock generator 148 providing clocks to 0 and 141
, n-bit shift register 144 . It is composed of a clock generator 149 that provides clocks to D-FFs 145 and 146.

The operation will be explained below. The object is projected with lens 1, and this high brightness information (high brightness information exceeding the threshold value Vs)
The process up to storing the data in the memory 12 is the same as that described in FIG. 4, so a description thereof will be omitted here.

The data stored in the memory 12 is read out while the screen is being scanned from line ai to line ai+1 while the HBLK, that is, the pulse shown in FIG. 2(b) is "L". It is shown in Figure 3. Figure 3 (a) is similar to Figure 2 (
The period in which the pulse in b) is "L" is expanded. The waveform in FIG. 3(b) shows the address signal of the memory 12 divided into horizontal and vertical directions.
), the horizontal address signal ranges from "1" to rn
The addresses up to J are sequentially counted, and the vertical address signals are i-1, i, i+ for a predetermined row (ai row).
Address designation is performed by switching the data in the first row three times for each horizontal address. The data output of the memory 12 addressed and read in this way is shown in FIG.
It is shifted to the D-FFs 140 and 141 using the clock shown in C). These memories 12, D-FF140,1
The output of 41 is logically summed by an OR gate 142, and the output from the clock generator 149 is obtained as shown in FIG. 2(d).
The data is taken into the n-bit shift register 144 at the clock of . Note that during this period, that is, the period when the pulse in FIG. 2(b) is "L", the switch 143 is connected to the OR gate 142 side.

After taking in the data in the memory 12 in this manner, all data in row ai is reset to "0" during the memory reset period shown in FIG. 3(a). Address specification at this time is as shown in FIG. 2(b), by sequentially specifying the addresses from at, 1 to ai, m, and during this period, the write enable terminal of the memory 12 is set to "H", and the data input is set to "L". ”

After data reading and resetting in the ai row of the memory 12 is completed, the switch 143 is switched to the D-FF 14
It can be switched to the 6th side. Here, the n-bit shift register 144 and the D-FFs 145 and 146 constitute an n+2-bit loop-shaped shift register. This n-bit shift register 144 and D-FF 145,
The clock 146 uses a pulse train as shown in FIG. 6(b) that rises every horizontal block, and one more pulse train in HBLK. FIG. 6(b) shows n+1 clocks generated for each IH, but by adding one clock to HBLK, it becomes n+2 clocks, so the data in the n-bit shift register 144 is D-FF 145.146 It will be rotated through IH, and it will rotate just around -. Note that the "L" period in FIG. 2(b), which is the memory data read period, is as follows:
As mentioned above, the clock shown in FIG. 3(d) is used, and the above-mentioned additional pulses are not applied. These clocks are generated by clock generator 149.

In the process of rotating the data of the n-bit shift register 144 in this manner, the OR gate 147 calculates the logical sum of the outputs of the n-bit shift register 144 and the D-FFs 145 and 146, and a gate pulse is obtained.

Immediately after reading the memory data, that is, immediately before the rise of the pulse train in FIG. 2(b), the n-bit shift register 14
The output of 4 is the data in the first column of that row, i.e. ai-1
, 1, ai, 1, and ai+1.1, this data is then shifted to the D-FF 145 at the clock immediately after entering the video area.

Therefore, n-bit shift register 144, D-FF14
The outputs of 5.146 are data one block later in the horizontal direction. The obtained gate pulse is logically summed, and this signal is finally the logical sum of the data spread one block at a time in the top, bottom, left, and right for the target block aij, that is, ai-1, j-1.

ai, j-1, ai+1. j-1, ai-1,j,
ai, j.

ai+1. j, at-1, j+1, ai, j
+1, ai+1. It is composed of the logical sum of each data j+1 (see the shaded area in FIG. 6).

The gate pulse thus obtained is used to open and close the gate circuit 5 to remove high-luminance components.

According to this embodiment, the screen is divided into a grid of length m x width n, and the presence or absence of a high luminance component is determined using one divided block (one area) as the minimum unit and stored in the memory. When reading the memory, the data of the area expanded by one block in the vertical and horizontal directions is also read out at the same time, and a gate pulse is generated by the OR of these signals, which eliminates the spread of high brightness components when out of focus. This makes it possible to always accurately control the lens position.

(Correspondence between the invention and the embodiments) In this embodiment, the image sensor 2 is the imaging means of the present invention,
The comparator 10 corresponds to high brightness component detection means, the gate pulse generation circuit 102 corresponds to gate opening/closing control means, the gate circuit 5 corresponds to gate means, and the circuit from BPF 6 to motor drive circuit 8 corresponds to focus detection means.

(Modified Example) In this embodiment, the gate is spread out by one block in the top, bottom, left, and right directions for the detection area of a high-brightness object. However, if the screen is to be divided into smaller blocks, it is possible to divide the detection area into multiple blocks instead of just one block. It is also conceivable to have a configuration in which the gates are spread out and gated. In this case, a larger capacity memory is required, but more accurate and efficient high brightness removal is possible.

Additionally, video cameras are often equipped with a zoom lens, and when this zoom lens is on the wide side, the amount of blur is smaller than on the telephoto side, and therefore the spread of high-luminance components is also small. Therefore, by changing the amount of spread of the above block depending on the zooming position of this lens, i.e. by making it smaller when the zoom lens is on the wide side and larger when it is on the tele side, more efficient high brightness removal is possible. It goes without saying.

(Effects of the Invention) As described above, according to the present invention, there is provided a high-luminance component detection means for detecting the presence or absence of a high-luminance component in each of a plurality of divided regions set on an imaging surface, and a high-luminance component detection means for detecting the presence or absence of a high-luminance component in each of a plurality of divided regions set on an imaging surface. gate opening/closing control means for blocking the supply of video signals to the focus detection means in the divided regions and the adjacent peripheral divided regions by means of gate means, thereby eliminating obstacles to obtaining a focused state of the lens. □Note that a subject that has a high brightness component greater than a predetermined value usually has some of the high brightness component spread over an area wider than the one divided area, and the video signal passing through these divided areas is used for focus detection. Since it is not used, accurate focusing can be achieved at all times.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 (
a) to (d) are waveform diagrams of various parts during one field period, Figures 3 (a) to (d) are diagrams of a part of Figure 2 enlarged on the time axis, and Figure 4 is a diagram of the waveform of each part during one field period. FIGS. 5(a) to 5(c) are block diagrams showing conventional examples of the conventional example, and FIGS. a) to (C) are diagrams illustrating the screen division state and horizontal screen division pulse waveform in the conventional example and this embodiment, FIG. 7 is a diagram illustrating the second conventional focus detection method, and FIG. FIG. 3 is a diagram illustrating the spread of signals in each focus state of a general high-brightness subject. 2...Image sensor, 3...Preamplifier,
5...Gate circuit, 6...BPF, 7
...Detection circuit, 8...Motor drive circuit, 9...Drive motor, 1o...Comparator, 11...Divided pulse generation Circuit, 12...
...Memory, 101...Address counter, 1
02...Gate pulse generation circuit. Patent applicant Canon Co., Ltd.

Claims (1)

[Claims] (1) An imaging device that converts the subject image formed on the imaging surface into a video signal, a gate device that controls passage of the video signal from the imaging device, and a focus based on the video signal that has passed through the gate device. An automatic focus matching device comprising: a focus detection means for detecting a state of a high-luminance component; An automatic focus matching device comprising gate opening/closing control means for causing the gate means to prevent the supply of video signals to the focus detection means in the divided region where the component has been detected and the neighboring divided regions adjacent thereto. .