JPH01152279U

JPH01152279U -

Info

Publication number: JPH01152279U
Application number: JP4890388U
Authority: JP
Priority date: 1988-04-12
Filing date: 1988-04-12
Publication date: 1989-10-20

Description

[Brief explanation of the drawing]

第１図は考案の実施例を示す構成図、第２図は
この考案のデジタル補正自動利得制御部の動作タ
イムチヤート、第３図はこの考案による制御電圧
特性図、第４図はこの考案による減衰量特性図、
第５図は従来のレーダ装置の構成図、第６図は従
来のレーダ装置の制御電圧特性図、第７図は従来
のレーダ装置の減衰量特性図である。図において、１は送受信共用のアンテナ、２は
送信機部、３は送受切換部、４は高周波減衰器、
５は周波数ミキサ、６はローカル発生部、７は中
間周波減衰器、８は中間周波増幅器、９はビデオ
アンプ、１０は信号処理部、１１はサンプルホー
ルド、１２はポテンシヨメータ、１３は切換用リ
レー、１４はデジタル補正自動利得制御部、１４
ａはリニア化部、１４ｂはＡ／Ｄコンバータ、１
４ｃは読出し専用メモリ、１４ｄはデータ入力部
、１４ｅはラツチ回路、１４ｆはＤ／Ａコンバー
タ、１４ｇはタイミング発生部、１４ｈはＡ／Ｄ
コンバータ入力ラツチ信号、１４ｉはＲＯＭリー
ド信号、１４ｊはＲＯＭ出力ラツチ信号、１４ｋ
はＤ／Ａコンバータ出力信号、１５は自動利得制
御、１６はビデオアンプ出力波形、１７はサンプ
ルホールドの出力波形、１８は試験用信号発生器
である。なお、図中同一あるいは相当部分には同
一符号を付してある。 Fig. 1 is a block diagram showing an embodiment of the invention, Fig. 2 is an operation time chart of the digital correction automatic gain control section of this invention, Fig. 3 is a control voltage characteristic diagram according to this invention, and Fig. 4 is according to this invention. Attenuation characteristic diagram,
FIG. 5 is a block diagram of a conventional radar device, FIG. 6 is a control voltage characteristic diagram of the conventional radar device, and FIG. 7 is an attenuation characteristic diagram of the conventional radar device. In the figure, 1 is an antenna for both transmitting and receiving, 2 is a transmitter section, 3 is a transmitting/receiving switching section, 4 is a high frequency attenuator,
5 is a frequency mixer, 6 is a local generator, 7 is an intermediate frequency attenuator, 8 is an intermediate frequency amplifier, 9 is a video amplifier, 10 is a signal processing unit, 11 is a sample hold, 12 is a potentiometer, and 13 is for switching. Relay, 14, digital correction automatic gain control section, 14
a is a linearization section, 14b is an A/D converter, 1
4c is a read-only memory, 14d is a data input section, 14e is a latch circuit, 14f is a D/A converter, 14g is a timing generator, 14h is an A/D
Converter input latch signal, 14i is ROM read signal, 14j is ROM output latch signal, 14k
15 is an automatic gain control, 16 is a video amplifier output waveform, 17 is a sample-and-hold output waveform, and 18 is a test signal generator. Note that the same or corresponding parts in the figures are given the same reference numerals.

Claims

[Scope of utility model registration request]

In a radar device having a target search or tracking function, a transmitter-receiver antenna that emits transmitted radio waves to the outside and receives reflected waves from the target, a transmitter section that creates high-frequency power pulses, and a transmitter section that a transmission/reception switching unit that performs switching between transmitting radio waves and receiving radio waves from the antenna; a high-frequency attenuator that controls the amount of attenuation of radio waves input via the transmission/reception switching unit; a frequency mixer that performs frequency conversion into a frequency, a local signal generator that creates a local signal for converting the received radio wave into an intermediate frequency, an attenuator that controls the amount of attenuation of the output of the frequency mixer, and an output of the attenuator. an intermediate frequency amplifier that amplifies the output of the intermediate frequency amplifier, a video amplifier that detects and amplifies the output of the intermediate frequency amplifier, and a signal processing unit that receives the output of the video amplifier and processes distance tracking, angle tracking, and detection and creates various triggers. A radar device comprising an automatic gain control section having a high frequency attenuator control circuit and an intermediate frequency attenuator control circuit for keeping the output of the video amplifier constant in response to changes in received radio waves.