JPH01139629U - - Google Patents
Info
- Publication number
- JPH01139629U JPH01139629U JP3653488U JP3653488U JPH01139629U JP H01139629 U JPH01139629 U JP H01139629U JP 3653488 U JP3653488 U JP 3653488U JP 3653488 U JP3653488 U JP 3653488U JP H01139629 U JPH01139629 U JP H01139629U
- Authority
- JP
- Japan
- Prior art keywords
- signal input
- fet
- voltage
- circuit
- input port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3653488U JPH01139629U (enExample) | 1988-03-18 | 1988-03-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3653488U JPH01139629U (enExample) | 1988-03-18 | 1988-03-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01139629U true JPH01139629U (enExample) | 1989-09-25 |
Family
ID=31263132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3653488U Pending JPH01139629U (enExample) | 1988-03-18 | 1988-03-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01139629U (enExample) |
-
1988
- 1988-03-18 JP JP3653488U patent/JPH01139629U/ja active Pending
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