JPH01137347A - Input/output controller - Google Patents

Abstract

PURPOSE:To increase the input/output processing speed by adding a function to a channel command to instruct the load of the designated data stored in an input/output device into a cache device. CONSTITUTION:An input/output controller 20 receives a channel instructing the load of the designated data stored in an input/output device 30 into a cache device 12 via a channel 13 set at the side of a CPU/main storage device 10. Then, the controller 20 loads the designate data into a cache device 23 and receives a channel command through the channel 13 for the instruction of the input of the loaded data. Thus, the controller 20 reads the designated data out of the device 23 and transfers it to the channel 13. Thus, a data group is loaded into the device 23 before the execution of the input processing when the memory 10 can previously decide or estimate an input object data group. Then, the input/output processing is carried out at high speed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an input/output control device for a computer system, and particularly to input/output control that performs prefetching to a cache device in an input/output system having a cache memory such as a disk cache. Regarding equipment.

[Conventional technology]

In recent years, in computer systems, the gap between the access speed of a main storage device and the access speed of a secondary storage device, especially a magnetic disk device, has been widening. Therefore, input/output processing to the disk becomes a bottleneck, and the performance of the entire computer system may deteriorate. One way to eliminate the above gap is to effectively speed up disk input/output processing using a disk cache.

Regarding a disk control device having a cache memory, Japanese Patent Application Laid-Open Nos. 59-100964 and 60-25
As described in No. 6854, several modes are prepared as cache management algorithms, taking into account the organization method of files to be input/output and the processing form of programs. In the normal mode, the cache is managed using the LRU (Least Recently IJ+ad) method based on the idea of local referentiality of data.

In other words, when evicting data in the cache to write data to the cache, data that has not been referenced for the longest time is evicted from the cache, and data near the referenced data may continue to be referenced. Based on this idea, the data before and after the referenced data is also loaded into the cache. Climb to these;
The data loaded in the cache is more likely to be referenced, and the average access time can be reduced. Further, for sequential access processing, there is a sequential access mode. In the sequential access mode, after reading the track containing the requested data, the tracks following that track are preloaded (read ahead) from the disk into the cache.

With this prefetch control, in the case of sequential access, data other than the first one always exists in the cache, so it is possible to achieve faster input/output processing.

In addition to these two modes, there is a cache bypass mode, etc. These modes can be specified at the beginning of a channel command word (CCW) sequence representing an instruction for instructing input/output processing from a channel on the central processing unit side to a disk controller.

[Problem that the invention seeks to solve]

In the conventional method described above, the disk control device determines the data to be loaded into the cache based on the cache management mode. For this reason, even if the data group to be input can be known or predicted in advance on the central processing unit side by means other than sequential access, the data group cannot always be loaded into the cache prior to input processing. Note that cases in which input target data can be known or predicted in advance on the central processing unit side include database batch processing, relational database set search processing, etc.

There are cases where the data to be processed is known in advance using an index or the like.

An object of the present invention is to enable the central processing unit to input/output input data to an input/output control device such as a disk control device when the input data can be known or predicted in advance on the central processing unit side as described above. The purpose is to speed up input/output processing by making it possible to instruct the device to preload data into the cache.

[Means for solving problems]

The above purpose is a function that instructs a channel command, which is a command to instruct input/output processing to an input/output control device, from a channel on the central processing unit side to load specified data in the input/output device into the cache device. This is achieved by adding .

[Effect]

The operation of the above means will be described below.

(1) When the input/output control device receives a channel command from the channel on the central processing %m side that instructs to load specified data in the input/output device into the cache device,
Load the specified data into the cache device. Note that the data loaded into the cache device is kept in the cache device at least until a channel command is received or received.

(2) When the input/output control device receives a channel command from the channel that instructs input of data loaded into the cache device, the input/output control device reads the specified data from the cache device and transfers it to the channel.

As described above, when the input target data group can be known or predicted in advance on the central processing unit side even when access is not sequential,
By loading the data group into the cache device prior to input processing, input processing can be performed at high speed.

〔Example〕

Hereinafter, four embodiments of the present invention will be described with reference to the drawings.

First, the configuration of this embodiment will be explained. FIG. 2 is a diagram showing the overall outline of the computer system in this embodiment. Channel 13° disk controller 20.
It is composed of a disk device 30. Disk control device 2
0 further includes storage director 21.0. directory 22
．． It consists of a disk cache device v123. The central processing unit 11 has a function of executing and controlling arithmetic and logical judgment operations, a function of controlling other devices, etc., and a main memory 12 controls the entire computer system.

Various information processed by the central processing unit 11 and the channel 13 is stored. The channel 13 controls information transfer between the main storage device 12 and various input/output devices within the computer system. The storage director 21 controls the disk device 30 and also manages the disk release device 23. It controls data transfer between the channel 13 and the disk cache device 23, data transfer between the disk cache device 23 and the disk device 30, and data transfer between the channel 13 and the disk device 30.

The directory 22 stores information indicating which part of the data of the disk device 30 is stored on the disk cache device 23.

The disk cache device 23 includes a storage director 21
Under the control of , part of the data in the disk device 30 is placed as necessary.

Next, the operation of the system will be explained. FIG. 1 is a diagram showing the features of the present invention, and is a diagram illustrating an overview of an example of the operation of the system in this embodiment. In FIG. 1, the program on the central processing unit/main memory 10 knows in advance that the input target data are a, b, and c at the start of processing, and requests pre-reading of these data before making an input request. . This prefetch request is converted into a PRELOAI (preload) command, which is a channel command that instructs prefetching of specified data from the disk drive 30 to the disk cache device 23, and is transmitted to the storage director 21 in the disk controller ff20 via the channel. will be notified. In response to the PRELOAD command, the storage director 21 notifies the channel that command processing has ended, and transfers the specified data a, b, and c to the disk cache device 2.
Load into 3. Following the above prefetch request, the program on the central processing unit/main memory 10 reads data a and b.
, c in sequence and perform the necessary processing. These data a.

Input requests for b and c are converted into a sequence of channel commands including a READ command, and sent to the storage director 21 in the disk controller 2o via the channel.
will be notified. In response to these input requests, the storage disk 21 transfers the data a g b y c loaded on the disk cache device 23 to the central processing unit/main storage device 1o via the channel 13.

In the above PRELOAD command, the disk device 30
Specify the number of records to be loaded into the disk cache device 23 and the address of each record. The address of the record is the cylinder number (CC), track number (H
H), specified by record number (R).

A schematic processing flow of the storage director 21 when receiving PREI and OAD commands will be described below with reference to FIGS. 3 and 4. When receiving a command, the storage director 21 creates a prefetch request block 40 for the command, and creates a chain of prefetch request blocks 40 provided for each device (volume).

Add the created prefetch request block 40 (Step 1
01). FIG. 4 is a detailed diagram of the prefetch request block 40. A pointer 41 to another block is.

It is a pointer for chaining with other blocks.

In the case of the last block, a value indicating that fact is set. CCHHR42 is the disk device 3 of input target data.
Cylinder number indicating address above 0.

Track number, record number. The disk cache address 43 stores the address of an area within the disk cache device 23 into which input target data is loaded. The locating request flag 44 is set to ON when a locating request is issued to the disk device [30, and OFF when no locating request is issued. The weight flag 45 is.

The positioning indicates that there is a wait for data transfer.

FIG. 5 shows a prefetch request block 40 provided for each device.
3 is a diagram showing a chain in which three prefetch request blocks 40 are chained, and the first block is pointed to by a prefetch request block pointer 5o.

When the processing in step 101 above is completed, the storage director 21 notifies the channel 13 of the completion of the PRHLOAD command (step 102).

Thereafter, the storage director 21 pre-reads the specified data from the disk device 3o to the disk cache device 23, separately from the command from the channel 13. First, as an initial setting process, the prefetch request block pointer 5
The address of the first prefetch request block 40 is set in step 103), and the requested data is subsequently prefetched to the disk cache device 23.

First, it is checked whether the specified data exists in the disk cache device 23 by referring to the directory 22 (step 104).
The designated data is loaded into the disk cache device 23 (steps 105 to 108). Therefore, first, the directory 22 is referred to and an area for the data is secured in the disk cache device 23 (step 105). Next, if the disk device 30 is vacant, a positioning request is issued to the disk device 30, and the 1-positioning request flag 44 is turned ON (step 106).
If the disk device 30 is not vacant, the positioning turns off the request flag 44, waits for a vacant space, and processes the event.

Once the positioning is complete, transfer the specified data to the disk.
! 130 to the disk cache device 23 (
Step 107). Note that if a wait occurs during data transfer, the wait flag 45 is turned ON to wait for a free space, and then the processing for holding the event is performed.

Finally, the data is stored in the directory 22 on the disk device 3.
After setting the address (CCHHR) etc. on 0 (step 108), the loading process is completed.

After the loading process is completed, the process is the same as when the specified data exists in the disk cache device 23, and the prefetch request counter for the data in the directory 22 is 1.
Increase (step 109).

The prefetch request counter is used to control the multiplicity of prefetch requests, and when it reaches 0, the area is targeted for replacement in the disk cache device 23.

The prefetching process for one data is completed, and the address of the next prefetching request block 40 is set in the prefetching request block pointer 50 in order to process the next data (step 110). At this time, the next prefetch request block 40
It is checked whether there is a next block or not (step 111), and if there is no next block, the pre-reading process for the device is completed.

Note that during the above processing, steps 103 to 111
Processing is done by channel 13 and disk cache device 1\2
3, between the channel 13 and other devices, and between the disk cache device 23 and other devices.
These parallel processes can be realized by the method described in Japanese Patent Application Laid-Open No. 60-256854.

Next, the R F, ! corresponding to the PRELOAD command from the channel. : The processing of the storage director 21 when receiving an AD request will be described. In addition, the receiver is the RE who took the
In order to distinguish whether the AD request corresponds to PREL or OAD commands, if they do, a channel command indicating that it is a corresponding READ request is added to the head of the channel command string.

For a READ request corresponding to a PRELOAD command.

The specified data in the disk cache device 23 is transferred to the channel 13, and the prefetch request counter is decremented by 1. When the prefetch request counter reaches 0, the data is targeted for replacement in the disk cache device 23 as described above.

Finally, the programs and processing on the central processing unit 11 will be explained. Input/output processing in a computer system is usually handled by an operating system (hereinafter referred to as O8), which is a collection of general-purpose programs for operating the computer system.
) provides general-purpose functions for various access methods.

Various programs other than O8, such as database management systems, perform input/output processing using the functions provided by these access methods. Therefore, in this embodiment, a function corresponding to the PRELOAD command provided as a type of channel command is added as an access method function.

That is, in a program such as a database management system, a macro applied by an access method requests the O8 to prefetch a group of input data, and the O8 generates a series of channel commands including a PRELOAD command in response to this prefetch request. , instructs the storage director 21 to pre-read the designated data group via the channel 13.

This allows the prefetch function shown in the present invention to be used from programs other than O8, such as a database management system. .

The following two typical examples of processing for which the present invention is effective are as follows.
There is one.

(1) Set search process for a relational database In the case of a search process for a relational database, it is necessary to manually search for a set of data that satisfies a certain condition from a database on a disk device. At this time, the storage location of the human-powered data in the database may be known in advance using an index or the like. In such a case, by using the macro provided by the access method described above, the database management system can pre-read the data to be input.

(2) Batch processing for databases In batch processing for databases, such as month-end processing in bank online systems, only data that meets certain conditions are often processed, rather than all items being processed. In such a case, if the batch processing program specifies the data to be processed to the database management system using values such as indexes and keys, the database management system can pre-read these data as in the previous section.

Although the embodiments of the present invention have been described above in detail in the case of a disk memory, the concept of the present invention can be applied to any memory having a cache memory. In addition, as a unique effect of this embodiment, multiple control of prefetch requests is performed, so even if multiple prefetch requests are issued for the same data, the effect of the prefetch command (PRIOAD command) will not be lost. do not have. Although not mentioned in the explanation of this embodiment, in preparation for the case where the program or terminal that is the source of the prefetch request stops processing midway through, the prefetch request is discarded for data for which there is no prefetch or READ request for a certain period of time or more. shall be taken as a thing.

〔Effect of the invention〕

According to the present invention, even in cases other than sequential access, when input target data can be known or predicted in advance on the central processing unit side,
To speed up input/output processing by enabling a central processing unit to instruct an input/output control device such as a disk control device to preload input target data from the input/output device to a cache device. Can be done. In particular, in the case of a disk device, if the input data exists in physical proximity on the disk device, such as on the same track or in the same cylinder, the storage director continuously transfers this data from the disk device to the disk cache device. , the input/output processing can be greatly speeded up.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of an overview of an example of system operation in an embodiment of the present invention, FIG. 2 is an overall configuration diagram of a computer system in an embodiment of the present invention, and FIG. 3 is a prefetch command (PR
FIG. 4 is a detailed explanatory diagram of a prefetch request block, and FIG. 5 is an explanatory diagram showing a chain of prefetch request blocks provided for each device. . DESCRIPTION OF SYMBOLS 10... Central processing unit/main storage device, 11... Central processing unit, 12... Main storage device, 13... Channel, 20... Disk control device, 21... Storage director, 22 ...Directory, 23...Disk cache device, 30...Disk device, 40...Pre-read request block Fig. 2 JuT4X7 basket, l Fig. 3

Claims (1)

[Claims] 1. In a computer system comprising a main storage device, a processing device, an input/output device, an input/output control device, and a cache device located between the main storage device and the input/output device, the above processing An input/output control device comprising means for instructing the input/output control device from the device to load specified data in the input/output device into the cache device.