JPH01136334A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH01136334A
JPH01136334A JP62294073A JP29407387A JPH01136334A JP H01136334 A JPH01136334 A JP H01136334A JP 62294073 A JP62294073 A JP 62294073A JP 29407387 A JP29407387 A JP 29407387A JP H01136334 A JPH01136334 A JP H01136334A
Authority
JP
Japan
Prior art keywords
ion beam
lithography
electron beam
optical system
condensed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62294073A
Other languages
Japanese (ja)
Inventor
Yuichi Madokoro
祐一 間所
Shoji Yadori
章二 宿利
Masao Tamura
田村 誠男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62294073A priority Critical patent/JPH01136334A/en
Publication of JPH01136334A publication Critical patent/JPH01136334A/en
Pending legal-status Critical Current

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  • Electron Beam Exposure (AREA)

Abstract

PURPOSE:To perform lithography simply and to make it possible to perform highly accurate position alignment without special steps, by performing the detection of a position aligning mark by using an electron beam, which is emitted from the same particle beam source as an ion beam. CONSTITUTION:A positive potential is applied to the lead-out electrode of a liquid metal particle beam source, and electrons are taken out 1. The electrons are scanned with a particle beam optical system, and a position aligning mark is detected 2. Thus a region for lithography and exposure of an ion beams is determined. The side of a lead-out electrode is made to be a negative potential, and positive ions are taken out 3. At the same time the polarity of the optical system is changed 4, and the condensed ion beam is formed. In this way, the path of an electron beam system and the path of the condensed ion beam in the electrostatic optical become substantially the same, and the scanning regions become equal. Thus the lithography and the exposure can be performed 5 with the condensed ion beam in the region, where the position alignment is performed with the electron beam. Said two operations are repeated, the position alignment is performed with the electron beam and, at the same time, the lithography can be performed with the condensed ion beam.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置の製造方法に係り、特に集束イオ
ン線によるリソグラフィを用いた半導体装置の製造方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using lithography using focused ion beams.

〔従来の技術〕[Conventional technology]

集束イオン線によるリソグラフィー及びレジストの変質
による二次電子放出パターンの変化については、第34
回応用物理学関係連合講演会講演予稿集(1987年春
季)pp407に述べられている。ここでは、ネガ型レ
ジストCMSについて、レジストの炭化により二次電子
放出パターンが変化し検出が困難になる事が述べられて
いる。
Regarding changes in secondary electron emission patterns due to lithography using focused ion beams and alteration of resist, see Section 34.
It is described in the Proceedings of the United Conference on Applied Physics (Spring 1987), pp. 407. This article describes that with respect to negative resist CMS, the secondary electron emission pattern changes due to carbonization of the resist, making detection difficult.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は、集束イオン線によりマーク検出を行っ
ており、電子線等信のプローブによりマークを検出する
ことについては配慮がされておらずイオン線によるレジ
ストの変質により位置合せ精度が低下する0位置合せ精
度を向上させるためにはマーク付近のレジストを除去す
る必要がある等の問題があった。
The above conventional technology detects marks using a focused ion beam, and does not take into account the detection of marks using an electron beam probe, resulting in a decrease in alignment accuracy due to alteration of the resist by the ion beam. There have been problems such as the need to remove the resist near the marks in order to improve the alignment accuracy.

本発明の目的は、イオン線リソグラフィーにおいて、特
別な工程を要さずに高精度の位置合せを行う方法を提供
することにある。
An object of the present invention is to provide a method for performing highly accurate alignment without requiring special steps in ion beam lithography.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、位置合せマーク検出を集束イオン線の代り
に、同じ液体金属粒子線源に逆バイアスをかけて引き出
される電子線を用いて行うことにより、達成される。
The above object is achieved by performing alignment mark detection using, instead of a focused ion beam, an electron beam drawn from the same liquid metal particle source with a reverse bias.

具体的な方法を第1図の流れ図に示した。まず。The specific method is shown in the flowchart of Figure 1. first.

液体金属粒子源の引き出し電極にチップに対して正の電
位をかけ、電子を引き出し、これを粒子線光学系で走査
して、位置合せマークの検出を行う。
A positive potential is applied to the extraction electrode of the liquid metal particle source relative to the chip to extract electrons, which are scanned by a particle beam optical system to detect alignment marks.

これにより、イオン線の描画、露光領域を決定する事が
できる1次に、引出し電極側を負の電位にし、正イオン
を引き出し、同時に上記光学系の極性も入れ換えて集束
イオン線を形成する。このようにすると、電子線と集束
イオン線の静電型光学系内の経路は実質的に同じになり
、走査領域は等しくなる。これにより、電子線により位
置合せを行った領域に集束イオン線により描画・露光す
ることができる。上記の2つの操作をくり返すことによ
り、位置合せを電子線で行いながう、集束イオン線によ
るリソグラフィーを行うことができる。
Thereby, the drawing and exposure area of the ion beam can be determined.The extraction electrode side of the primary electrode is set to a negative potential to draw out positive ions, and at the same time, the polarity of the optical system is also changed to form a focused ion beam. In this way, the paths of the electron beam and the focused ion beam within the electrostatic optical system become substantially the same, and the scanning areas become equal. Thereby, the area aligned by the electron beam can be drawn and exposed by the focused ion beam. By repeating the above two operations, it is possible to perform lithography using a focused ion beam in which positioning is performed using an electron beam.

第2図に、電子線引き出し時の、装置構成の一例を示し
た。加速系、光学系の電源を逆方向に入れ換えることに
より、イオン線の引出しができる。
FIG. 2 shows an example of the device configuration during electron beam extraction. The ion beam can be extracted by switching the power supplies of the acceleration system and optical system in opposite directions.

〔作用〕[Effect]

電子線のレジスト中の到達距離は、イオン線と比較して
大きく、20keV程度の加速エネルギーを与えれば、
2μm程度までの通常のレジストを通過して基板に達す
る。このため、イオン線の場合と比較して、二次電子放
出は基板との相互作用から起り、レジスト膜の変質・炭
化の影響は受けにくい、これにより、二次電子放出パタ
ーンは基板凹凸を忠実に“再現するため、位置合せマー
クを感度良く検出でき、高精度の位置合せが可能になる
The distance that an electron beam can reach in a resist is larger than that of an ion beam, and if an acceleration energy of about 20 keV is applied,
It passes through a normal resist of up to about 2 μm to reach the substrate. Therefore, compared to the case of ion beams, secondary electron emission occurs from interaction with the substrate, and is less susceptible to deterioration and carbonization of the resist film.As a result, the secondary electron emission pattern faithfully follows the irregularities of the substrate. ”, the alignment marks can be detected with high sensitivity, making it possible to perform highly accurate alignment.

また、同一の粒子線源から電子とイオンの両方が放−出
されることにより、同一の光学系を用いて粒子線が形成
でき、機械的な試料の移動等を要しないため、位置合せ
を極性の置換のみにより簡単に行うことができ、かつ高
精度である。
In addition, since both electrons and ions are emitted from the same particle beam source, the particle beam can be formed using the same optical system, and there is no need for mechanical sample movement. It can be easily performed by only replacing , and is highly accurate.

〔実施例〕〔Example〕

以下、本発明の方法を用いてMO8型電界効果トランジ
スタのゲート電極を集束イオン線リソグラフィにより形
成した実施例について述べる。この方法によるトランジ
スタの製造工程の概略を第3図に示した。10Ω・(!
I(100)P型基板上にドライエツチングにより凹型
の集束イオン線直接描画用位置合せマークを形成した後
、LOGO3酸化により活性領域を形成、ゲート酸化膜
を950℃、30分のドライ酸化で膜厚約20nmに゛
形成した。ホウ素をチャネル部にイオン打込みした後、
CVD法により多結晶シリコンを厚さ300nm堆積、
その上に0MSレジストを膜厚0.6 μmスピン塗付
した。
Hereinafter, an example will be described in which a gate electrode of an MO8 field effect transistor is formed by focused ion beam lithography using the method of the present invention. FIG. 3 shows an outline of the manufacturing process of a transistor using this method. 10Ω・(!
After forming concave alignment marks for focused ion beam direct writing on an I(100)P type substrate by dry etching, an active region is formed by LOGO3 oxidation, and a gate oxide film is formed by dry oxidation at 950°C for 30 minutes. It was formed to have a thickness of about 20 nm. After implanting boron ions into the channel,
Deposit polycrystalline silicon to a thickness of 300 nm using the CVD method.
A 0MS resist was spin-coated thereon to a thickness of 0.6 μm.

ウェーハを集束イオン線描画装置に移し、装置を真空排
気(〜10−’Torr) L/た後、液体金属粒子源
の引き出し側に5kVの正電圧をかけ、電子線を放出さ
せた。加速電圧を徐々に上げていき、300keVに設
定した後、試料台のファラデーカップにより電流を測定
し、電子線が安定に放出されていることを確認した。こ
の電子線をウェーハ端から徐々に移動しながら、小面積
で走査し、最初の位置合せマークを検出、試料台の回転
によりビームの走査方向をゲートの幅方向(ソース・ド
レインを結ぶ直線と垂直の方向)に合せ、また。
The wafer was transferred to a focused ion beam lithography system, and after the system was evacuated (~10-'Torr) L/L, a positive voltage of 5 kV was applied to the extraction side of the liquid metal particle source to emit an electron beam. After gradually increasing the accelerating voltage and setting it at 300 keV, the current was measured using a Faraday cup on the sample stage, and it was confirmed that the electron beam was stably emitted. This electron beam is gradually moved from the edge of the wafer, scanning a small area, detecting the first alignment mark, and rotating the sample stage to change the scanning direction of the beam in the width direction of the gate (perpendicular to the straight line connecting the source and drain). direction), and also.

十字マークから得られる二次電子強度ピークから、試料
台の移動距離を用いて、活性領域のパターン寸法を測定
した。
The pattern dimensions of the active region were measured from the secondary electron intensity peak obtained from the cross mark and using the moving distance of the sample stage.

この後、液体金属粒子源の引き出し電圧、加速電圧、ビ
ームの走査用の電圧の極性を逆にして。
After this, reverse the polarity of the extraction voltage of the liquid metal particle source, the acceleration voltage, and the voltage for scanning the beam.

300kaVの一価の集束ガリウムイオン線を形成した
。この時のファラデーカップによる測定からイオン電流
は30 p A を二次電子像の解像度からビーム径は
〜0.1 μmφであることがわかった。この集束イオ
ン線を電子線走査による寸法測定から得られたデータに
基づき、試料台を移動しながら直接描画を行いウェーハ
上のゲートパターンを全て露光した。
A focused monovalent gallium ion beam of 300 kaV was formed. At this time, measurements using a Faraday cup revealed that the ion current was 30 pA, and the resolution of the secondary electron image revealed that the beam diameter was ~0.1 μmφ. Based on the data obtained from dimension measurement using the focused ion beam and electron beam scanning, direct writing was performed while moving the sample stage to expose the entire gate pattern on the wafer.

通常の現像処理後、ドライエツチングを用いて多結晶シ
リコンゲートを形成した。ソース・ドレインは、ヒ素を
加速電圧40keVで5X10”3−2打込みを行い形
成した。PSGS増膜堆積後ンタクトホール形成を行い
、アルミ蒸着、ドライエツチングにより配線を行った。
After a normal development process, a polycrystalline silicon gate was formed using dry etching. The source and drain were formed by implanting arsenic 5×10''3-2 at an accelerating voltage of 40 keV. After the PSGS film was deposited, contact holes were formed, and wiring was performed by aluminum evaporation and dry etching.

1成したMO8型電界効果トランジスタの特性は第4図
に示した通りであった。素子断面のSEMWl!Sから
、ゲート長は約0.3μmであった。
The characteristics of the MO8 type field effect transistor produced were as shown in FIG. SEMWl of device cross section! From S, the gate length was about 0.3 μm.

穴子線とイオン線の輝点位置の変化を調べる為にレジス
ト上に、まず電子線で0.5 μm間隔で直線を20本
描画した後、極性を逆にして集束イオン線を形成し、全
く同じパターンをこの上に重ねて描画するという実験を
行ったが、パターンのずれは認められず、描画パターン
にして0.05μmの誤差(線幅)範囲で一致した。こ
の実験から、バイアスを反転することによる電子線とイ
オン線の輝点位置のずれは極めて小さく5位置合せに使
用した場合の誤差は問題にならないことがわかった。
In order to investigate the change in the bright spot position of the conger beam and the ion beam, we first drew 20 straight lines at 0.5 μm intervals on the resist using an electron beam, then reversed the polarity to form a focused ion beam, and completely An experiment was conducted in which the same pattern was drawn on top of this, but no pattern deviation was observed, and the drawn patterns matched within an error (line width) of 0.05 μm. From this experiment, it was found that the shift in the bright spot positions of the electron beam and ion beam due to bias reversal is extremely small, and the error does not pose a problem when used for five-position alignment.

また、集束イオン線を用い七マーク検出を行った場合に
は、レジストの炭化が生じ、位置合せマークの検出は不
可能であった。
Furthermore, when seven marks were detected using a focused ion beam, carbonization of the resist occurred, making it impossible to detect alignment marks.

本実施例によれば、厚いレジスト膜下の位置合せマーク
を検出でき、これにより、集束イオン線リソグラフィを
用いた微細加工が可能になるという効果がある。
According to this embodiment, alignment marks under a thick resist film can be detected, which has the effect of enabling microfabrication using focused ion beam lithography.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、集束イオン線リソグラフィーにおいて
、マーク検出感度を上げ、また位置合せ精度を高くする
ことができるため、微細パターン形成に不可欠な10−
2μmオーダーの位置合せを任意のレジストに対し膜厚
と無関係に行うことができるため、微細パターンと有す
る半導体装置の製造において1位置合せマークの露出な
どの工程を省き、リソグラフィーを簡便に行うことがで
き、また位置合せ精度の低下に伴う小止りの低下を解消
することができる。
According to the present invention, in focused ion beam lithography, it is possible to increase mark detection sensitivity and alignment accuracy, so that 10-
Since alignment on the order of 2 μm can be performed on any resist regardless of film thickness, it is possible to omit processes such as exposing one alignment mark in the manufacture of semiconductor devices with fine patterns, and to perform lithography easily. In addition, it is possible to eliminate the problem of small stoppages caused by a decrease in alignment accuracy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の基本的操作を表わす流れ図、第2図は
本発明の実施に好適な装置の基本的構成を表わす縦断面
図、第3図は本発明の一実施例においてMO8型FET
を作る際の製造工程の概略流れ図、第4図は上記実施例
で製造したMOSFETの動作特性図である。 1・・・液体金属粒子源エミッタ、2・・・液体金属、
3・・・引出し・加速用電源、4・・・収束用レンズ系
、5・・・光学系電源、6・・・試料台、7・・・試料
ウェーハ。
FIG. 1 is a flowchart showing the basic operation of the present invention, FIG. 2 is a vertical sectional view showing the basic configuration of an apparatus suitable for carrying out the present invention, and FIG. 3 is a MO8 type FET in one embodiment of the present invention.
FIG. 4 is a schematic flowchart of the manufacturing process for manufacturing the MOSFET, and FIG. 4 is a diagram showing the operating characteristics of the MOSFET manufactured in the above embodiment. 1...Liquid metal particle source emitter, 2...Liquid metal,
3... Power supply for extraction/acceleration, 4... Lens system for convergence, 5... Power supply for optical system, 6... Sample stage, 7... Sample wafer.

Claims (1)

【特許請求の範囲】[Claims] 1、凸または凹状の位置合せマークを持つ半導体基板上
に塗付されたレジスト膜に対して、微細なイオン線を走
査することにより、基板上の特定の位置のレジスト膜を
露光する工程を含む加工工程において、位置合せマーク
の検出を、該イオン線と同一の粒子線源から放出される
電子線を用いて行うことを特徴とする半導体装置の製造
方法。
1. Includes the step of exposing the resist film at a specific position on the substrate by scanning a fine ion beam on a resist film coated on a semiconductor substrate with convex or concave alignment marks. 1. A method of manufacturing a semiconductor device, characterized in that, in a processing step, alignment marks are detected using an electron beam emitted from the same particle beam source as the ion beam.
JP62294073A 1987-11-24 1987-11-24 Manufacture of semiconductor device Pending JPH01136334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62294073A JPH01136334A (en) 1987-11-24 1987-11-24 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62294073A JPH01136334A (en) 1987-11-24 1987-11-24 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH01136334A true JPH01136334A (en) 1989-05-29

Family

ID=17802933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62294073A Pending JPH01136334A (en) 1987-11-24 1987-11-24 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH01136334A (en)

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