JPH01133828U - - Google Patents
Info
- Publication number
- JPH01133828U JPH01133828U JP3084388U JP3084388U JPH01133828U JP H01133828 U JPH01133828 U JP H01133828U JP 3084388 U JP3084388 U JP 3084388U JP 3084388 U JP3084388 U JP 3084388U JP H01133828 U JPH01133828 U JP H01133828U
- Authority
- JP
- Japan
- Prior art keywords
- latch circuits
- circuit
- data
- signal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3084388U JPH01133828U (da) | 1988-03-07 | 1988-03-07 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3084388U JPH01133828U (da) | 1988-03-07 | 1988-03-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01133828U true JPH01133828U (da) | 1989-09-12 |
Family
ID=31256257
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3084388U Pending JPH01133828U (da) | 1988-03-07 | 1988-03-07 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01133828U (da) |
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1988
- 1988-03-07 JP JP3084388U patent/JPH01133828U/ja active Pending