JPH011337A - signal receiver - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates generally to programmable signal receivers, and more particularly to computer-controlled receivers, which can be installed within a microcomputer. , can be used to receive, amplify, and demodulate one or more selected signals within a broadband signal source.

BACKGROUND OF THE INVENTION The prior art includes a number of receivers, sometimes referred to as channel tuners. These devices are
a particular channel of broadband signals, such as broadband satellite signals;
or used to tune into (i.e., receive) a band of television signals transmitted through the atmosphere or cables.

There are many cases where it would be advantageous to control the tuner with a computer that is also used for other purposes. For example, it would be desirable to be able to use a personal computer to receive data sent on a particular channel at a particular time.

The present invention does not concern systems such as video cassette recorders that have a dedicated microcontroller inside the receiver. This is because such systems do not provide users with the extensive data processing capabilities provided by microcomputers or larger computer systems.

Using currently available technology, it would be possible to control an external tuner with a computer by sending a control signal through one of the computer's ports, typically an R5232 serial port. Such prior art tuners would be located external to the computer for at least the following two reasons.

That is, (1) a tuner is originally located inside a device such as a television or radio;
) RF (radio frequency) noise from the computer interferes with the operation of the tuner.

Fact 1: It is well known to those skilled in the art that all general purpose computers generate a significant amount of RF noise.

In the United States, RF noise that can be generated by computers is subject to government control. Nevertheless, even an RF nozzle generated by a small computer system is powerful enough to distort weak signals, such as satellite signals picked up by a satellite antenna. Therefore, prior art satellite receivers have their own power and control circuitry.
It was a built-in external unit.

It should also be noted that the amount of RF noise inside a typical computer housing is at least several times greater than the RF noise measured outside the computer. Government RF noise regulations currently apply only to RF noise measured external to the computer.

Having a tuner external to the computer has its drawbacks. This is because the tuner would require a separate power source from the computer.

Also, if the output of the tuner is data to be processed by the computer, an additional interface will be required to connect the output of the external tuner to the computer's data bus. .

Another disadvantage of using an external tuner is that it is difficult to control two or more tuners simultaneously through a series port. Of course, it would be possible to design special interfaces and protocols to control multiple external tuners through a single serial port, but this would also increase the cost of the system. .

The present invention provides a channel tuner included within a computer, such as a personal computer.

The channel tuner is connected to the computer bus such that commands are sent to the tuner by sending data directly to one or more addresses corresponding to the tuner. If several tuners are provided, each is given a separate address within the computer's address space.

Although the channel tuner described herein may be housed inside a computer, the sensitivity of the tuner to RF radiation is limited by the use of low impedance circuits and by shielding some of the tuner components from RF radiation. This is because it was lowered by

Another feature of the invention is that the necessary DC power for the signal source, such as the satellite feed horn polarization controller, is provided by the computer's own power supply. Power is sent to the signal receiver using the same conductors used to send the signal from the signal source to the computer's tuner.

Although the invention is very simple in concept, it substantially reduces the cost of satellite and other channel tuners and substantially simplifies the delivery of incoming data to computers.

SUMMARY OF THE INVENTION In summary, the present invention is a tunable signal receiver for use in a computer system. The signal tuner is located within the computer and has an interface directly connected to the computer's bus;
This is for receiving command signals specifying one or more channels to be selected from the wideband input signal.

Each channel tuner typically includes a voltage-controlled oscillator, a phase-locked loop to create a mixed signal at a frequency corresponding to the selected signal, and a tracking circuit to combine the wideband signal with the mixed signal. and a filter mixer. The output of the tuner is then amplified using an amplifier circuit with sufficiently low impedance so that the RF radiation produced by the computer does not distort the received signal.

In the preferred embodiment, the receiver is mounted and on-board inside the computer chassis. Most general purpose computers have at least one bank plane port for removable devices to the computer's bus.

At-on receiver boards have input/output connectors that removably plug into such bank plane ports. Thus, the receiver can receive and transmit data directly to the computer's bus. However, the receiver is also in close proximity to computer circuitry that produces significant RF noise. As mentioned above, the amount of RF noise generated inside most general purpose computers distorts satellite signals and similar signals while they are amplified and demodulated within conventional signal receivers. is sufficient.

In one embodiment, the input port of the receiver is DC coupled to a computer DC power supply, such that the computer DC power supply is capable of powering equipment external to the computer system, such as a satellite dish feed horn. It can be used for the purpose of supplying.

For systems used to receive digital data,
One tunable signal receiver includes a digital demodulator that produces a digital signal stream and a series-to-parallel converter (such as a UART) for sending the digital data stream from the demodulator to a computer bus.

EXAMPLE The conceptual diagram of FIG. 1 shows a satellite receiver 20 using the present invention. As shown, a satellite antenna 22 reflects a broadband signal (typically 3.7 to 4.2 GHz) to a feedhorn 24 . The feedhorn sends the input signal to an amplifier/downconverter 26 that converts the satellite microwave signal into a broadband, 950 to 1450 MHz, multichannel signal 27 suitable for processing by a receiver. .

The converted broadband satellite signal is sent to receiver 20 by coaxial cable 28. In a preferred embodiment,
The receiver is mounted at-onboard inside the computer chassis.

Most general purpose computers have at least one backplane port for devices that are removably attached to the computer's bus.

This at-on receiver board has 4 input/output connectors
7 (FIG. 2), which is removably inserted into such a hack plane port. Therefore, the receiver can receive data and send it directly to the computer's bus.

The output from receiver 20 for this series includes video-as well as audio signals suitable for use in a standard television set 32.

FIG. 2 shows a block diagram of a programmable receiver 20 according to the present invention. The output of broadband signal source 4o is AC coupled to tuner 42 of receiver 20. In different applications, the signal source can be a satellite antenna, a television antenna, or a microwave antenna.

In the preferred embodiment, tuner 42 is configured to tune video (9
50 to 145゛OMHz) channel tuner, which tunes the input signal 27 to the computer system 3o.
shielded by a grounded metal cover to protect from RF radiation generated by the Tuner 42 includes a voltage controlled oscillator (VCO) for producing a mixed signal at a frequency corresponding to the selection signal, and a trunking filter mixer for combining a wideband signal with the mixed signal.

The frequency of the mixed signal is determined by a phase-locked loop (P
The loop monitors the sample output from the VCO at the tuner and automatically adjusts the VCO's control voltage Vc until the VCO produces the selected mixed signal.

The PLL is programmed by computer 30 via bus interface 46. In other words, computer 30 sends data via data bus 48 to a predetermined address. Bus interface 46 leads the data to PLL 44, which holds the data. P
The data stored in LL 44 defines the target frequency of the mixed signal used in tuner 42.

Since receiver 20 is intended for use in a general-purpose computer, computer 30 includes standard components: a central processing unit (CPU), random access memory, disk storage, keyboard, monitor, and computer bus. 48 to at-on-board, such as the receiver 20, in a detachable manner.
It is assumed that the backplane port 49 includes one backplane port 49.

As mentioned above, the RF noise generated in most general-purpose computers is extremely strong, and the RF noise generated in most general-purpose computers is extremely strong, making it difficult for satellite and similar signals to be amplified and demodulated in conventional receivers. It is certainly more than enough to transform it. In order for receiver 20 to be able to be placed inside a general purpose computer, several features are required to protect the input signal from this RF nozzle.

One such feature is that the output of the tuner 42 is amplified using an amplifier circuit 50 with sufficiently low impedance that the RF emissions generated by the computer do not distort the received signal. be. In the preferred embodiment, the amplifiers used are monolithic gain blocks, each having an input impedance of 50 ohms and an output impedance of 50 ohms. Monolithic gain plots of this type are available from Avantek, Mint Circuits Labs,
It can be obtained from manufacturers such as NEC.

Other features for protecting the input signal from the RF nozzle include shielding the tuner 42 and allowing the PLL to react to the RF nozzle to transform the mixed signal created by the VCO within the tuner 42. This includes shielding the sample line 52 of the VCO to prevent this from occurring, and shielding the output line 54 of the tuner 42 if it is longer than 1 to 2 inches. Additionally, the output of the tuner 42, also referred to herein as the selected channel signal or the IF (intermediate frequency) signal, is amplified prior to any other signal processing process to minimize the influence of the RF nozzle within the computer on the selected channel signal. ing.

The inventor of the present invention has realized that, due to the above-mentioned characteristics of noise countermeasures,
It has been discovered that reliable reception of data within a satellite microwave signal is possible even if the receiver is located within a computer 30 that produces the highest RF noise levels consistent with United States federal regulations. Generally, satellite signals are
being the weakest type of wideband signal processed by the receiver, the receiver of the invention allows reliable reception of other types of wideband signals;
Some of these signals include those sent through cables and the atmosphere.

The output of IF amplifier 50 is demodulated and/or further divided into subchannels depending on the nature of the selected channel signal. In the case of a standard chill vision video signal, the amplified channel signal 56 is processed by an FM demodulator 58 and the resulting signal is sent directly to the standard chill vision video input port.

FIG. 3 is a detailed configuration diagram of the satellite receiver 60.

Receiver 60 is used in conjunction with satellite antenna 22, which is typically a parabolic antenna for microwave reception.

In this example, it is assumed that the satellite signal is a microwave signal occupying approximately 500 MHz within the 3.7 to 4.2 GHz frequency range. This 500 MHz range is divided (by using reverse polarization on the AC channel) into approximately 24 40 MHz channels, each of which receives a frequency modulated 5.0 MHz video signal and 14 100 KHz subchannels, some of which carry 20 KHz audio FM signals and other signals used for data transmission.

Antenna 22 is located external to computer 30 (FIG. 1) and includes a feed assembly 24.

In most applications, the feed assembly will include a motor-driven or DC-controlled polarization assembly, such that the computer 30 will control the polarization of the feed to match that of the satellite signal. Can be done.

One feature of the invention is that the DC power for feed assembly 24 as well as the polarization control signal 62 are both fed via the same coaxial cable used to send input signal 27 to receiver 60. It will be sent to assembly.

This is accomplished by connecting the computer's DC power supply 64 to the cable by a choke 66 and AC coupling the polarization control signal 62 to the cable via a low pass filter 65. The polarization control signal 62 in the preferred embodiment is a pulse-width modulated signal, which is such that it does not distort the high frequency input signal 27 (which is filtered at high frequencies). , filtered at a low frequency (for example, 10 MHz).

The operation of channel tuner 42, video PLL 44 and IF amplifier 50 is as described above with reference to FIG. In particular, tuner 42 selects one channel of input signal 27 by mixing the input signal with a signal corresponding to the selection signal. The output of the tuner 42 has a center frequency of 70 MHz. An example of a suitable channel tuner 42 is manufactured by HWA Lin Electronics, a Chinese private company.
This is a HL-DBA31 type tuner manufactured by In Electronic Co., Ltd. suitable video PLL
A suitable example of 44 is Toshiba Co.
An example of this is the TD6350P frequency synthesizer manufactured by R.P.

Channel tuner 42 is AC coupled to the signal source (i.e. antenna 22) via a high pass filter 67, with low frequencies cut off at around 100 MHz to provide a low pass signal and/or pulse generator 94 and DC power supply 64. Protects the tuner 42 from associated noise.

The amplified channel signal 56 is demodulated by an FM demodulator 58. In the preferred embodiment, demodulator 58
uses a regulated 12V power supply 59, which is isolated from the computer power supply so that the channel signal is detected without being affected by any noise in the computer power supply. In other embodiments, a regulated power supply is available for all components in receiver 60, so noise in the computer power supply does not affect any of these components. However, the most important part is the demodulator 58, and it is usually sufficient to isolate only this from the computer's power supply. In a preferred embodiment,
The output of demodulator 58 is processed in three parallel paths.

The main video signal is amplified by a video amplifier 70;
Produces a signal suitable for use on a standard television monitor. The audio subchannels are connected to a subchannel tuner 72 and a phase-locked audio loop 74.
selected by

The target carrier frequency of the VCO in subchannel tuner 72 is selected by sending appropriate data values to audio PLL 74. In this example, the selected subchannel signal is converted by audio FM demodulator 76 to an audio output suitable for driving an audio amplifier and speakers.

A second subchannel tuner 82 and another phase-locked loop 84 (herein referred to as the data PLL) select the data subchannel. The target carrier frequency for CO in subchannel tuner 82 is selected by sending the appropriate data value to data PLL 84.

In this example, the selected subchannel signal is converted to a binary data stream by a digital data demodulator 86 (eg, an AFSK or FSK type demodulator).

The interface 46 at the receiving a60 functions as follows. That is, board select decoder 90 monitors a predetermined subset of address lines Ax-Ay on computer bus 48. When the address values on these lines match the address values assigned to the receiver, a selection signal SEL is generated, which enables operation of the other components in the bus interface 46.

When SEL is valid, ie, when the receiver is being addressed by computer 30, data demultiplexer 92 routes to the bootara receiver on the data bus. A second subset of computer address lines Al-Am is used by demultiplexer 92 to determine the destination of the data within the receiver. Thus, PLLs 44, 74 and 84, and pulse generator 94 are each assigned a different address and, as a result of demultiplexer preparation, when the address signal matches the preassigned signal, each Uke takes the above data.

Pulse generator 94 produces pulses to control the polarization orientation of feed assembly 24 at satellite antenna 22 . Feed assembly 24 includes a motor that responds to the received pulses by reorienting the feed horn by an amount corresponding to the width of the pulses. In other embodiments, the feed assembly 24 may be
The direction of polarization can be controlled.

Finally, bus interface 46 converts the serial data from demodulator 86 into parallel data and connects it to computer bus 4.
includes a UART (Universal Asynchronous Receiver/Transmitter) 96 for sending to 8. As understood by those skilled in the art,
The destination of this data depends on how computer 30 is programmed to process this data.

- Boat destinations include convenience store monitors, computer printers, and/or disk files.

FIG. 4 shows a channel or subchannel receiver 100, which includes an analog-to-digital converter 102 for converting analog input signals to digital signals to be used in a computer. These types of conversions are required when the data to be received is not transmitted in digital form. For example, data transmitted by weather satellites is often transmitted in the form of analog signals for slow scan television.

FIG. 5 shows a flowchart of a computer program for programming a transmitter such as that shown in FIG. The user is prompted to select the channel, audio subchannel and digital data subchannel to be received (box 1)0). When the user makes these selections, the corresponding data is sent to a phase-locked loop within the receiver where it is held (
Box 1) 2). As explained above, this is done by sending each data set to a pre-assigned address corresponding to each of the phase-locked loop components.

If no digital data is collected (box l
In step 14), whatever program is calling this procedure, the program exits and returns to the initial state. Otherwise, the user is prompted to check whether the received data should be displayed on the computer monitor and decide whether the received data should be stored in a disk file (see box 1). )8). The computer then directs the received data to each selected destination (Box 1
20 and 122). In other applications, the data may be routed to a printer, telephone modem, or other predetermined destination. As will be understood by those skilled in the art, the data input process for a satellite receiver is similar to the process of data input from a modem, but the X
The difference is that the data flow cannot be stopped or continued using the 0FF or XON protocols.

Although the present invention has been described above with reference to several specific embodiments, this description is merely illustrative of the invention.
It should not be construed as limiting the invention. Various modifications may occur to those skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

[Brief explanation of drawings]

Figure 1 is a conceptual diagram of a satellite receiver using the present invention, Figure 2 is a block diagram of a programmable receiver according to the present invention, Figure 3 is a detailed diagram of the satellite receiver, and Figure 4 shows analog input signals. FIG. 5 is a flowchart of a computer program for programming a receiver such as that shown in FIG. 2. 20...Receiver, 27...Input signal,
30... Computer, 42... Channel tuner, 46.・. ... bus interface, 48 ... data node, 50 ... amplifier. Procedural amendment (formality) Director General of the Patent Office Yoshi 1) Takeshi Moon 1, Indication of the case 1988 Patent Case No. 81) No. 78 2, Title of the invention Signal receiver 3, Relationship of the person making the amendment to the case Appearing person 4, agent 5, date of amendment order June 28, 1985 (Kadoya Fumiko

Claims (7)

[Claims] (1) A programmable signal receiver for receiving broadband signals for use in a computer system having a central processing unit (CPU) and a bus for transmitting and receiving data to and from the central processing unit. interface means connected directly to said bus for receiving a command signal, and tuning means, said interface means being configured to perform, in accordance with said command signal,
channel selection means for selecting at least one channel within the wideband signal, and the tuning means is for each selected channel of the wideband signal, the tuning means being for each selected channel of the wideband signal; frequency and amplifying said converted signal, thereby producing an amplified channel signal, each of said tuning means having an amplification means of sufficiently low impedance such that the RF (radio frequency) radiation produced by said computer system is A signal receiver characterized in that the channel signal is not modified. (2) the computer system includes a backplane port for removably connecting a device to the bus; and the programmable signal receiver is for connecting the interface means to the backplane port in the computer system. 2. A signal receiver according to claim 1, further comprising connector means of. (3) the broadband signal is provided by a satellite antenna having a feed assembly, the feed assembly including orientation means for changing the direction of its polarization in accordance with a predefined polarization control signal;
The signal receiver further includes polarization orientation control means connected to the interface means for receiving a command signal specifying a polarization orientation for the feed assembly, the polarization orientation control means 2. The signal receiver of claim 1, further comprising control signal generating means connected to said input port means for transmitting a polarization control signal to said feed assembly corresponding to said command signal. (4) the computer system includes a DC power source; the feed assembly means is connected to the input port by a single shielded cable; and the input port provides DC power to the orientation means of the feed assembly. and the polarization orientation control means is AC coupled to the input port means such that the single shielded cable receives the DC power and the orientation control signal. 4. The signal receiver of claim 3, wherein the signal receiver is used to feed the feed assembly and to transmit the broadband signal from the satellite antenna to the input port means. (5) the computer system includes a DC power supply; the tuning means is AC connected to the input port means; the input port means is DC coupled to the DC power supply; 2. The signal receiver of claim 1, wherein the signal receiver is operable to power a device external to the computer system that sends the wideband signal to the input port means. (6) Each of said tuning means includes a phase-locked loop means connected to said channel selection means for producing a mixed signal whose frequency corresponds to said selection signal; signal tuning means for combining; low-pass filter means for filtering out a portion of the output of the tuning means outside the selected channel; and amplification means for amplifying the output of the low-pass filter means. The signal receiver according to claim 1, characterized in that it includes: (7) one of said tuning means includes digital demodulation means for demodulating at least a portion of said amplified channel signal, thereby generating a digital data stream; 2. A signal receiver according to claim 1, further comprising data routing means connected to said digital demodulation means and said bus for transmitting said signal from said demodulation means to said bus.