JPH01133443A - Method for transmitting data by remain-undefeated system - Google Patents

Abstract

PURPOSE:To eliminate the limitation in time required for synchronously transmitting start bits in a CSMA/CD system by causing a terminal to omit sending of a start bit upon detecting that another terminal has already sent a start bit to a bus. CONSTITUTION:A preceding terminal 2b sends a preferential start bit when the terminal 2b again confirms the vacancy of a bus 1, 10mS-208muS after confirming the vacancy of the bus 1. When succeeding terminal 2a detects the state of the bus 1 where the terminal 2b has already sent the start bit, 10mS-208muS after the terminal 2a similarly confirms the vacancy of the bus 1, the control section 6 of the terminal 2a does not make any data transmission during the period of the start bit which is 104muS and, after the bit period, starts data sending from the bit next to the preferential start bit. Thereafter, the control section 6 collates the sent bit with a received bit and discriminate the priority.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention provides data bits sent by a certain terminal among a plurality of terminals connected to a common bus and data on the bus. The present invention relates to a data transmission method based on a winner-take-all system in which data bits are compared with each other, and when these data bits match, data transmission is continued, and when they do not match, data transmission is stopped.

(Prior art) The above-described data transmission method of the winner-take-all method is generally
MA/CD (Carrier 5ense M
ultipleAccess with Co11is
ion Detection) method. This CS MA/CD method is basically an asynchronous method, and each terminal can send data at any instant as long as the bus is free, but two or more terminals can send data to the bus at the same time. To avoid conflicts where data is sent out,
It also has a function that monitors the bus status even while data is being sent, and detects collisions with data from other terminals. When a collision is detected, the terminal with a lower priority stops sending data, and the terminal with a higher priority survives and continues sending data.When making this determination of victory or defeat, To do so, bit synchronization must be achieved among multiple terminals as explained below.

As shown in FIG. 7, there is a pause period T, l of 10 m5 after the terminal that was transmitting data finishes its transmission. During this suspension period, the CPU provided in the terminal finishes necessary processing and begins monitoring data. After this pause period, if there are multiple terminals that wish to transmit data, the other terminals will send their own start bits to the bus within a certain period of time T to the terminal that started sending the start bit first. It is necessary to perform bit synchronization.

This period T is extremely short, 1/8 of the bit period. The reason for this is that if the start bit is not sent out within this period T3 and the bits are synchronized, it will not be possible to compare bits b0 to b of the priority code following the start bit bit by bit to determine the winner. be.

This bit comparison starts from the first bit b, and when the bit of the succeeding terminal is "1" (no data sent), the data of the preceding terminal on the bus is "0" (data sent). In this case, the succeeding terminal loses, and this terminal is prevented from transmitting any further data. By performing such a comparison for each sequential bit of the priority code, the terminal with the highest priority among competing terminals survives to the end, and all other terminals lose and are prevented from transmitting data. There is.

(Problems to be Solved by the Invention) In data transmission using the conventional CS MA/CD method described above, when a certain terminal is about to start transmitting data, another terminal has already started transmitting data. If this occurs, it is necessary to send out the start bit within an extremely short period of time in order to achieve bit synchronization. For example, if the bit period is 104 μs, this synchronizable time is extremely short, 13 μs.
U), which has the disadvantage of increasing equipment costs. For example, in the case of a home communication system in which devices such as telephones, personal computers, and security devices are connected to a bus as terminals, if a CPU with a machine cycle of 2 μs is used, competition processing must be started within 6 steps. The number of steps required to interrupt the work being executed and switch to data transmission is significantly small (and almost impossible).

An object of the present invention is to eliminate the above-mentioned drawbacks, eliminate the time constraints required for synchronous transmission of start bits, eliminate the need for a high-speed CPU, and therefore reduce the cost of equipment. This is what we are trying to provide.

(Means and effects for solving the problem) The data transmission method of the present invention is such that when a certain terminal among a plurality of terminals connected to a common bus transmits, the data bits sent by that terminal and the bus When transmitting data using the win-win method, in which data bits are checked against each other, and when these data bits match, data transmission is continued, and when they do not match, data transmission is stopped. When a terminal attempts to transmit data, if it detects that another terminal's start bit has been sent onto the bus first, that terminal skips sending its own start bit and transmits the next bit after the start bit. It is characterized by sending data from the bus onto the bus.

According to the data transmission method of the present invention described above, a terminal that detects that another terminal has already sent a start bit onto the bus skips sending the start bit and starts transmitting data from the next bit. In order to start, a margin of only the period of the start bit is obtained, and since software processing can be performed within this period, a low-speed operating CPU can be used.

(Example) FIG. 1 is a block diagram showing the configuration of a communication system implementing the data transmission method according to the present invention, and FIG. 2 is a flowchart showing control operations in a certain terminal device.
FIG. 3 shows the structure of data sent from each terminal to the bus. Note that timing and the like will be described using the timing in a protocol that is being considered as a home bus as an example. As shown in FIG. 3, the sending data includes a priority code, a self address, a partner address, and data, and the first bit of the priority code is a start bit. Bus 1 has multiple terminals 2 a, 2
b---2n are connected in common, and the bus is connected to the bus controller 3. Each terminal 2a,
2b--1 includes a receiving section 4, a transmitting section 5, and a control section 6.

First, a description will be given of the data sending operation when no data is being transmitted from another terminal to the bus 1, that is, when the bus is empty.

The receiving unit 4 of the terminal 2a constantly detects transmission requests, and when detecting a transmission request, discloses monitoring of the state of the bus 1. If the bus 1 is not being used by another terminal or if the other terminal has already completed transmission and the bus is vacant, the control unit 6 checks the state of the bus 1 again after a period of 10 mS - 208 μs has elapsed. Start detecting. Bus empty status 208
When detecting for .mu.s, it is determined that there is no competing terminal, and a signal is sent to the transmitter 5, which sends the start bit, which is the first bit of the priority code, to the bus 1. In this case 208μs
The time is a margin time for absorbing device variations. The control section 6 of the terminal 2a transmits the data from the transmission section 5 to the bus 1.
The data sent to the terminal is compared with the data on the bus via the receiving unit 4, but if no other terminal is sending data, all data of these priority codes and self-addresses must match. Therefore, the terminal in question survives and sends out the remaining data.

Next, the operation when there is a transmission request to the bus controller 3 from another terminal 2b will be explained. The structure of the data sent out on the bus 1 by the other terminal 2b is also as shown in FIG. 3, similar to that sent out by the terminal 2a.

As described above, the preceding terminal 2b confirms that the bus 1 is empty and once again confirms that the bus is empty after a period of 10 mS-208 μs has elapsed, and sends a start bit to the bus. At this time, the follower terminal 2a detects the bus status after a time of 10mS-208μs has passed after confirming that the bus is empty in the same way as the preceding terminal 2b, but the other terminal 2b has already sent the start bit. This will be detected.

At this time, the control unit 6 of the follow-up terminal 2a does not transmit data during the start bit period of 104 μs, and after this time has elapsed, starts transmitting data from the bit next to the start bit of the priority code.

After a period of 1/4 bit length has elapsed since the transmission of this bit, the receiving section 4 detects the state of the bus 1 and supplies the state data to the control section 6. The control unit 6 compares the bits sent from the transmitting unit 5 to the bus 1 and the bits on the bus received by the receiving unit 4, and if they match, sends the next bit to the bus 1. In this manner, each time data is sent out to the bus 1 bit by bit, the control unit 6 compares the sent bit with the bit on the bus. This verification is continued until the priority code and self-address data have been sent. If the bit data sent to the bus midway does not match the bit data on the bus, it is determined that the own terminal has lost, and subsequent data transmission is stopped. on the other hand,
If the bits sent to bus 1 continue to match the bits on the bus until all priority code and self-address data have been sent, it is determined that the own terminal has won, and the control unit 6 then performs a verification operation. The other party's address and data are sent without doing so.

As described above, according to the data transmission method of the present invention, a terminal following a preceding terminal transmits the start bit to the bus within a short period of 1/8 of the bit period after the preceding terminal sends the start bit. There is no need to transmit data, and data can be transmitted starting from the next bit, so the control section can be configured with a CPU having a slow processing speed.

FIG. 4 is a block diagram showing the configuration of a home communication system to which the data transmission method of the present invention is applied, and FIG. 5 is an AMI (alternate
Fig. 6 is an explanatory diagram of a signal (Mark Inversion) code, and Fig. 6 is a waveform diagram of a signal transmitted from a terminal such as a telephone. A control line 13 is connected, and two office lines 14 are further drawn in. A plurality of terminals such as a telephone 15, a personal computer 16, a security device 17, a captain terminal 18, and an intercom are connected to the information line 12 and the control line 13, but FIG. 4 shows the internal configuration of only the telephone and the security device. It is.

In the AMI code used in the data transmission method of this example, in order to maintain DC balance of the data transmission line, as shown in FIG. 5A, the polarity of the transmitted data is alternately inverted and sent. In Figure 5A, negative logic is used, and "0"
When in the state, there is data output, and its date is 5.
0%, and when it is in the "1" state, no data is output. On the other hand, at the time of reception, as shown in FIG. 5B, the reception signal is created by determining the presence or absence of data output regardless of the polarity.

The operation of the communication system of this example will be described in the case where a call request from the telephone 15 and an abnormality report from the security device 17 occur simultaneously.

When a call request occurs on the telephone 15, the telephone
The PU 15a monitors the state of the control line 13 using the receiving section 15b. The start bit of the priority code shown in FIG. 6A is sent from the transmitter 15c to the control line 13 after 10 m5 has elapsed after detecting that the other terminal has finished transmitting the signal.

On the other hand, when the security device 17 detects an abnormality using the sensor 17a, its CPU 17b starts an abnormality notification operation. The CPU 17b attempts to transmit the start bit of the priority code 10m5 after detecting that the other terminal has finished transmitting the signal. However, when the CPU 17b of the security device 17 detects in its reception unit 17c that the telephone 15 has already sent a start bit to the control line 13, it controls the CPU 17b not to send its own start bit, as shown in FIG. As shown in B, transmission is started from bit b0 next to the start bit.

Now, when the security device 17 sends a bit b0, that is, a "0" signal to the control line 13 under the control of the CPU 17b, the receiving section 17c of the security device detects the signal on the control line 13 and outputs a detection output to the CPU 17b. In the CPU 17b, bit b sent to the control line 13,
In other words, the "0" signal and the control line state "0" are compared, and if it is determined that they are the same, the next bit b+ of the priority code is
'Send IJ to control line 13. Security device 1
The receiving unit 17c of 7 detects the signal on the control line 13 again,
The detection output is output to the CPU 17b. The CPU 17b compares the bit b, that is, the signal rl, sent to the control line 13 with the state rl of the control line 13, determines that they are the same, and then outputs the signal r1 of the next bit of the priority code, rl.
is sent to the control line 13 from the transmitter 17d. As described above, the CPU 17b receives the bit signal sent from the transmitter 17d to the control line 13 and the control line 1 received by the receiver 17c.
3, and if they match, the next bit is sent to the control line. If all the bits of the priority code and the self-address match, it means that the self-address has won, and the data after the self-address is sent to the control line 13 without bit verification.

Now, after the telephone 15 sends the start bit, the CPU 1
Under the control of 5a, a signal of bit b0 in the priority code, that is, "0", is sent from the transmitter 15c to the control line 13. Further, the CPU 15a detects the state "0" of the control line 13 by the receiving section 15b, and compares it with the transmitted "0" signal. When the CPU 15a determines that they are the same, it sends the next bit, ie, b+'IJ, to the control line 13. In this way, the telephone 15 compares the bit signal sent from the transmitter 15c to the control line 13 by the CPU 15a with the state of the control line 13 received by the receiver 15b, and if they match, transmits the next bit to the control line 13. Send to. Since the bit signal sent by the telephone 15 and the state of the control line 13 match up to the signal "0" of bit b3 of the priority code, the telephone transmits the next signal "1" of bit b4 from the transmitter 15c to the control line 13. do. Since the signal of bit b4 of the priority code of the security device is "0", the state of the control line 13 is now "0" state, and the CPU 15a receives the signal from the receiving section 15b that detects this "0" state. Upon receiving the signal, the telephone 15 compares it with the "1" state of its own bit b4, and if a mismatch is determined, the telephone 15 determines that it has lost, and stops transmitting the bit b of the priority code, the following bits, and the data after its own address.

In this way, even if the telephone 15 and the security device 17 start sending data to the control line 13 at the same time, the telephone will stop transmitting data midway, and only the security device will survive and continue to send data to the control line. The winning security device 17 not only transmits abnormality data to the main device 11 and other devices, but also connects the abnormality reporting unit 17e to the information linework 2, and sends the information to the monitoring center via the central office line 14 from the information line under the control of the main device. etc. (not shown).

It should be noted that only the telephone 15 uses the control line 13 for transmission request data.
When a call is sent to the other party, the main device 11 controls the telephone to capture the office line 14 via the information line 13 using the telephone communication circuit 15d, and when the other party answers by dialing from the telephone, a telephone call is established.

In the embodiment described above, when both the telephone set 15 and the security device 17 are transmitting data on the control line 13, the state of the control line is the OR of the bit information that both are transmitting, as shown in FIG. 6C. It has been taken. Therefore, if the telephone set 15 transmits the start bit of the priority code, the state of the control line 13 is not affected whether or not the security device 17 outputs the start bit of the priority code.

In the above-described embodiments, a telephone and a security device have been described as the terminals connected to the information line and the control line, but other terminals such as a cab, a ten terminal, a personal computer, an intercom, etc. may also be used. Further, a plurality of these devices may be installed.

In the embodiment described above, there were two competing terminals, but even if there are three or more terminals, the competing operation is performed in the same manner.

Normally, in the case of a home bus, the bit width is 104 μs, but the bit synchronization to determine who is the winner needs to be accurate to less than 1/8 of the bit width. Therefore, after the preceding terminal sends the start bit, The follower terminal had to send a start bit within 13 μs. In this case, if a CPU with a machine cycle of 2 μs is used, the follow-up terminal must send the start bit within 6 steps, but the number of steps required to interrupt the current task and switch to data transmission is This is an almost impossible number of steps. In contrast,
In the present invention, since a margin corresponding to the bit width is obtained, as many as 52 steps can be performed, and a sufficient number of steps can be secured for work switching.

(Effects of the Invention) As described above, according to the data transmission method of the present invention, when it is detected that the preceding terminal is sending data to the bus, the following terminal stops sending the start bit. Since the bit is omitted and data is sent from the next bit, it is possible to control transmission to the bus using a CPU that has a slower processing speed than before, significantly reducing system costs. can.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the basic configuration of a device implementing the data transmission method according to the present invention, FIG. 2 is a diagram showing a flowchart for explaining the operation, and FIG. Figure 4 is a diagram showing the configuration of a home communication system to which the data transmission method of the present invention is applied. Figure 5 is a diagram showing the AMI code used therein. Figure 6 A, B, and C are the same. FIG. 7 is a signal waveform diagram for explaining the operation. FIG. 7 is a diagram showing the structure of transmission data for explaining the conventional data transmission method. 1... Bus 2 a, 2 b---2n... One terminal 3... Bus controller 4... Receiver B part '5...
Transmission unit 6...Control unit 11...Main device
12... Information line 13... Control line
14... Office line 15... Telephone 16...
Personal computer 17... Security device 18... Captain terminal Patent applicant Kanda Tsushin Kogyo Co., Ltd.

Claims (1)

[Claims] 1. When a certain terminal among a plurality of terminals connected to a common bus transmits data, the data bits sent by that terminal are compared with the data bits on the bus, and these data bits are When transmitting data using the winner-take-all method, in which data transmission is continued when the terminals match, and data transmission is stopped when they do not match, when one terminal is about to transmit data, another terminal The present invention is characterized in that when it detects that the terminal's start bit has been sent onto the bus first, the terminal omits sending its own start bit and sends data onto the bus from the bit following the start bit. A data transmission method based on a winner-take-all method.