JPH01122282A - Pre-value holding circuit - Google Patents

Abstract

PURPOSE:To suppress a noise due to the lack of a signal by closing an analog switch to be conducted out of the opening/closing control range of a pre-value holding circuit provided with a holding capacitor, and moving the holding potential of the holding capacitor. CONSTITUTION:In the pre-value holding circuit provided with a pre-value holding switch 38 which allows the signal to pass through or to be interrupted by a selective opening and closing and a holding capacitor 80 which holds an FM demodulating signal F to pass through this switch 38 and outputs the signal to be held just before the signal is interrupted when the signal passing through the switch is interrupted, an analog switch 86 conducted out of the opening/ closing control range of the switch, and an electric potential setting circuit 81 which moves the holding electric potential of the holding capacitor 81 through a resistance 88 to the mid point direct current potential of the FM demodulating signal F are provided. Since the holding potential of the holding capacitor 80 is forcibly moved to the mid point direct current potential of the signal by closing the analog switch 86, electric potential difference is suppressed when the switch is closed again.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a previous value hold circuit that is installed on the playback circuit side of a video tape recorder, etc., and that holds and outputs the signal immediately before the loss when a signal is lost. It is something.

[Conventional technology]

In the audio reproduction circuit of a video tape recorder, a previous value hold circuit is installed to hold the FM demodulated signal in response to dropouts and switching hold pulses, and to suppress noise in missing portions of the signal.

The previous value hold circuit is, for example, as shown in FIG.
Switch 6 between buffer amplifier 2.4 in demodulation signal path
is interposed, and a hold capacitor 8 is installed on the output side. The input side of the buffer amplifier 2 is connected to a resistor 1.
The FM demodulated signal F1 applied to the input terminal 12 is applied to the switch 6 through the buffer amplifier 2. Normally, the switch 6 is closed and the buffer amplifier The FM demodulated signal F from 2 is allowed to pass through, held in the hold capacitor 8, and sent out to the demodulated output side through the buffer amplifier 4.

In case of a long-term dropout (missing signal) or in the recording mode, the switch 6 is opened by the H (high) level section of the switching pulse P shown in A of FIG.
At this time, passage of the signal is blocked. That is, when a dropout occurs in the FM demodulated signal F1, noise is superimposed on the dropout portion as shown in B in FIG. 4. In order to remove this, the dropout is detected and the switch 6 is opened. , the hold signal of the hold capacitor 8 is added as a correction signal. In this case, when the signal passage is prohibited in the playback mode, the hold capacitor 8 holds the signal just before the signal was cut off, so the period (instantaneous time) until the switch 6 is closed and the signal passage starts.
By adding the held signal (previous value signal) to the dropout portion Do of the FM demodulated signal F, as a correction signal,
A corrected FM demodulated signal F2 shown at C in FIG. 4 is obtained and output from the buffer amplifier 4.

[Problems to be Solved by the Invention] In such a previous value hold circuit, the switch 6 is completely open during long-term dropout or recording mode, so the output side potential of the switch 6 is is not determined, and when the switch 6 is closed again, there is a drawback that a large potential difference occurs between the previous value level and the current level.

If such a potential difference occurs, it may cause abnormal noise depending on the timing conditions of the signal processing at the subsequent stage.

For this reason, in the conventional previous value hold circuit, as shown in FIG. 3, a high resistance 14 is installed as a potential correction means in parallel with the switch 6, or a bias circuit is connected to one end of this high resistance 14. As a result, a measure is taken to apply a DC potential even when the switch 6 is cut off, and to prevent a large potential difference between the switches 6.

However, when such a high resistance 14 is installed, this high resistance 14 becomes a signal path for the switch 6, and in the case of long-term dropout, the reproduced signal (demodulated wave) becomes an H-level noise waveform. This has the disadvantage that the noise component leaks through the high resistance 14.

In order to eliminate this inconvenience, the circuit of the high resistance 14 may be configured as a filter necessary for blocking noise components, but in that case, in order to obtain a large time constant, the high resistance 14 may be configured with M
It is necessary to set it to a large value on the order of Ω, and when a bias circuit is installed and a current is caused to flow, a potential difference is generated between the terminals of the high resistance 14, which causes the potential level to shift.

When one end of the high resistance 14 is connected to a bias circuit and a potential is applied, there is an inconvenience that the waveform of the signal held by the hold capacitor 8 is distorted.

Therefore, the present invention eliminates such high resistance and the inconvenience of potential setting by a bias circuit for high resistance, and improves the reliability of holding the previous value.

[Means for solving problems]

The previous value hold circuit of the present invention, as shown in FIG.
A switch (previous value hold switch 38) that passes or cuts off a signal by selectively opening and closing holds the signal (FM demodulated signal Fl) that has passed through this switch, and when the signal passing through the switch is cut off, immediately before the signal is cut off. In the previous value hold circuit, the holding potential of the hold capacitor 80 is output as a signal (FM demodulated signal , ) to the midpoint DC potential (bias voltage VS).

[For production]

With this configuration, when the analog switch 86 is closed, the holding capacitor 80 is forcibly shifted to the midpoint DC potential of the signal (FM demodulated signal F), so that the switch is closed again. When this happens, the potential difference can be suppressed.

〔Example〕

FIG. 1 shows an embodiment of the previous value hold circuit of the present invention.

The reproduced FM input signal Fi is transmitted together with the FM demodulation circuit 20,
It is added to the dropout detection circuit 22. The FM demodulation circuit 20 outputs an FM demodulated signal F by demodulating signal processing from the reproduced FM input signal Fi, and the dropout detection circuit 22 detects a dropout (missing signal) of the reproduced FM input signal Fi, that is, Detects no-signal areas due to scratches on magnetic tape, etc.

FM demodulated signal F, is applied as an input signal to buffer amplifier 30 through capacitor 28 connected between terminals 24 and 26. A constant bias voltage (1) from a bias circuit 34 stabilized using a capacitor 32 is applied to the input section of the buffer amplifier 30 through a resistor 36. In this case, the bias voltage (18) is set, for example, to a voltage Vcc/2, which is one half of the power supply voltage VCC, and the output DC potential of the buffer amplifier 30 is also set to the same potential.

The FM demodulated signal F, which has passed through this buffer amplifier 30, is applied to a previous value hold switch 38. in this case,
The previous value hold switch 38 is formed by connecting a series circuit in parallel consisting of a diode 40, 42 and a diode 44, 46 connected in the forward direction, and a switching drive circuit 48 for opening and closing this previous value hold switch 38. is installed.

The switching drive circuit 48 has a transistor 54 of a current mirror circuit 56 including transistors 50, 52, and 54 installed on the anode side of the diode 40.44, and a transistor 58.54 on the cathode side of the diode 42.46.
Transistor 6 of current mirror circuit 62 consisting of 60
0 and the transistor 5 of the current mirror circuit 56
2 is applied to the transistor 58 on the diode-connected input side of the current mirror circuit 62. A transistor 66 is connected as a switching element through a resistor 64 to the transistor 50 on the diode-connected input side of the current mirror circuit 56, and the power supply voltage ■c is connected to the base of the transistor 66 through a resistor 68.
C is added. A transistor 70 is connected to the base of the transistor 66 and is switched by the first dropout detection signal of the dropout detection circuit 22. That is, transistor 7
A dropout detection signal from the dropout detection circuit 22 is applied to the base of the transistor 0 through a diode 72, and when a dropout is detected and its level shifts to H level, the transistor 70 becomes conductive. When this transistor 70 becomes conductive, the transistor 66 becomes non-conductive, and the current of the current mirror circuit 56, 62 is cut off. Therefore, when a dropout is detected, the previous value hold switch 38 becomes open, and the FM demodulated signal The passage of F is blocked.

By the way, in the audio FM system of a video tape recorder, the FM signal recorded on discontinuous recording tracks on the magnetic tape is reproduced using a rotary head having two magnetic heads, so the reproduced signal includes the connection between each recording track. There is a discontinuous point corresponding to the eye, and noise due to the phase shift between tapes exists in the minute time period of no signal that represents this discontinuous point, so it is necessary to perform the same hold processing as when dropping out. There is. That is, the joint between the recording tracks is represented by the hold pulse HP generated from the hold pulse generation circuit 74. Therefore, the hold pulse H is generated from the hold pulse generation circuit 74 when switching the switch.
P is applied to the base of the transistor 70 through the diode 76, so the transistor 70 becomes conductive due to the H level section of the hold pulse HP, and the conduction causes the previous value hold switch 38 to output the FM demodulated signal F.

block the passage of

FM demodulated signal F+ that passed through the previous value hold switch 38
Fi is added to and held by a hold capacitor 80 connected to the previous value hold switch 38 through a terminal 78. Hold capacitor 80 holds the instantaneous value of FM demodulated signal F1 whose amplitude changes moment by moment.

Further, on the output side of the previous value hold switch 38, there is a potential setting circuit 81 that forcibly shifts the holding voltage of the hold capacitor 80 to the midpoint level of the original FM demodulated signal F when the signal is missing for a long time. is installed. In this case, a bias voltage (2) is applied from the bias circuit 34 as the potential setting circuit 81 through an analog switch 86 formed by connecting transistors 82 and 84 in parallel and a resistor 88 in series. Transistor 82.
A current mirror circuit 96 consisting of transistors 90, 92 and a resistor 94 is installed at the base of the transistor 84, and a transistor 98 is installed on the base/collector side of the diode-connected transistor 90 of the current mirror circuit 96.

The base of this transistor 98 receives an FM demodulated signal F from an FM detection circuit 100 installed as a second dropout detection means for the dropout detection circuit 22.
A second dropout detection signal D2 indicating the presence or absence of the dropout detection signal D2 is applied through the diode 102, and a recording mode signal REC indicating the presence or absence of the recording mode is applied through the diode 104 during the recording mode.

In this case, the FM detection circuit 100 is set to have a longer time constant than the dropout detection circuit 22, and detects the omission of the FM demodulated signal F exceeding the time constant. Dropout detection signal D2
occurs. Since the transistor 98 becomes conductive due to the H level section of the dropout detection signal D2, the analog switch 86 becomes conductive through the current mirror circuit 96, and the bias circuit 34 sends the previous value hold switch 3 to the current mirror circuit 96.
A DC potential equal to the input DC potential of 8, that is, a bias voltage V, is applied to the hold capacitor 8 through the resistor 8.
0, forcing the hold capacitor 80 to that potential. Also, in the recording mode, the recording mode signal REC turns on the transistor 98, so that the potential of the hold capacitor 80 is similarly forcibly shifted to the bias voltage (3).

Then, the FM demodulated signal F1 that has passed through the previous value hold switch 38 or the held signal of the hold capacitor 80 (
The FM demodulated signal held just before the previous value hold switch 38 cut off the signal) is taken out from the buffer amplifier 106 as a corrected FM demodulated signal F2, and subjected to noise reduction (
NR) is added to the decode circuit 108. The audio signal decoded by the NR decoding circuit 108 passes through the mute switch 110 and the output switch circuit 112, which are controlled by the dropout detection signal D2 of the FM detection circuit 100, and is taken out from the output circuit 114 as a playback output f.

The operation of this previous value hold circuit will be explained with reference to FIG.

A in Figure 2 is a playing FM with irregular dropouts.
An input signal Fi is shown. The dropout detection circuit 22 is
The dropout portion of this reproduced FM human input signal Fi is detected, and a first dropout detection signal shown at B in FIG. 2 is generated. That is, this dropout detection signal RI is a pulse-like signal that sets the missing portion of the reproduced FM input signal Fi to an H level.

Since the FM detection circuit 100 is set with a longer detection time constant than the dropout detection circuit 22, it detects a long dropout section t, and generates a second dropout detection signal D2 shown in C of FIG. occurs.

When the reproduced FM input signal Fi shown in A of FIG. 2 is demodulated by the FM demodulation circuit 20, as shown in D of FIG.
FM demodulated signal F with significant noise in missing parts of the signal
, is obtained.

Therefore, the previous value hold switch 38 is opened through the switching drive circuit 48 based on the first dropout detection signal D1, and during a long dropout period, the analog switch 86 is closed based on the second dropout detection signal D2 and the hold switch 38 is held. The potential of the capacitor 80 is F
The bias voltage is set to 8, which is the midpoint potential of the M demodulated signal F1. At the output side of the buffer amplifier 106, as shown in E of FIG.
The previous value hold correction was performed by cutting off the signal of the previous value hold switch 38 based on the signal, holding the previous value signal of the hold capacitor 80, and forcibly shifting the hold capacitor 80 to the midpoint potential based on the second dropout detection signal D2. A corrected FM demodulated signal F2 is obtained.

This corrected FM demodulated signal F2 is supplied to the NR decoding circuit 10.8.
The audio signal is converted into an audio signal through the mute switch 110, the output switch circuit 112, and the output circuit 114, and is output as a playback output f. Note that the mute switch 110 and the output switch circuit 11
2, when a long signal dropout occurs, the signal is cut off to suppress the output level of the highly distorted signal or prohibit the signal output.

In this previous value hold circuit, when a long signal missing part occurs, the level of the FM demodulated signal F1 in that part is set to the midpoint DC potential, and when the previous value hold switch 38 is closed, unnecessary potential difference is This suppresses the occurrence of Therefore, when the previous value hold switch 38 returns,
No noise is generated, and the response time can also be increased. Then, short signal loss and long signal loss are separated, and correction is performed in a separate system from the previous value hold correction for the former, so the latter previous value hold correction will not have a negative effect on the former value hold correction. do not have.

Furthermore, the resistance value of the resistor 88 is smaller than that of the high resistance 14 of the conventional previous value hold circuit shown in FIG. can.

〔Effect of the invention〕

According to the present invention, a hold capacitor is provided which holds a signal passed through a switch that passes the signal by selective opening and closing, and outputs the signal held immediately before the signal is cut off when the signal passing through the switch is cut off. The previous value hold circuit is equipped with an analog switch that conducts outside the switch opening/closing control range and a potential setting means that transfers the hold capacitor to the DC potential at the input end of the switch through the resistor. The holding potential of the hold capacitor can be shifted to a potential equal to the side DC potential, which can reliably suppress noise caused by signal loss, etc. When the switch is closed again, the potential difference is suppressed and noise generation is ensured. can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the previous value hold circuit of the present invention, FIG. 2 is a diagram showing operating waveforms of the previous value hold circuit shown in FIG. 1, and FIG. 3 is a conventional previous value hold circuit. FIG. 4 is a diagram showing the previous value hold operation of the previous value hold circuit shown in FIG. 3. 38... Previous value hold switch (switch) 80...
・Hold capacitor 81...Potential setting circuit (potential setting means) 86...Analog switch 88...Resistor Ve Fig. 3A (switching pulse P)
-Unification (: ,) Figure 4

Claims (1)

[Claims] A switch that is selectively opened and closed to pass or cut off a signal, and a signal that holds the signal that has passed through the switch, and when the signal passing through the switch is cut off, the signal that is held immediately before the signal is cut off. In the previous value hold circuit, the hold capacitor outputs a voltage, and a potential setting means moves the holding potential of the hold capacitor to the midpoint DC potential of the signal through an analog switch and a resistor that conducts outside the opening/closing control range of the switch. A previous value hold circuit with