JPH01121911A - Phase controller for rotating body - Google Patents

Phase controller for rotating body

Info

Publication number
JPH01121911A
JPH01121911A JP62280449A JP28044987A JPH01121911A JP H01121911 A JPH01121911 A JP H01121911A JP 62280449 A JP62280449 A JP 62280449A JP 28044987 A JP28044987 A JP 28044987A JP H01121911 A JPH01121911 A JP H01121911A
Authority
JP
Japan
Prior art keywords
pulse
phase difference
circuit
counting
pulses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62280449A
Other languages
Japanese (ja)
Inventor
Masahiko Suzuki
雅彦 鈴木
Kozo Tsunoda
角田 幸三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Corp
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp, Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Corp
Priority to JP62280449A priority Critical patent/JPH01121911A/en
Publication of JPH01121911A publication Critical patent/JPH01121911A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P23/00Arrangements or methods for the control of AC motors characterised by a control method other than vector control
    • H02P23/18Controlling the angular speed together with angular position or phase
    • H02P23/186Controlling the angular speed together with angular position or phase of one shaft by controlling the prime mover

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Control Of Velocity Or Acceleration (AREA)

Abstract

PURPOSE:To perform detection and phase control of quick response by using the counted value of a counter, which takes one output of a pulse processing circuit of a pair of pulses proportional to rotation of a rotating body as the up-counting pulse and takes the other as the down-counting pulse, as a phase difference detection value. CONSTITUTION:An up/down pulse processing circuit 15 differentiates pulses from pulse pickups 1A and 1B to obtain an up/down command U/D, an up pulse, and a down pulse from both pulses. An up/down counter 16 is switched to up-counting or down-counting by the command U/D from the circuit 15 and is counted up by the up pulse at the time of counting-up and is counted down by the down pulse at the time of counting-down. A dead band circuit 17 uses the counted value of the counter 16 as phase difference detection data. An adding/subtracting circuit 18 performs addition/subtraction between phase difference detection data Y from the circuit 17 and a prescribed value X of a phase difference setter 19 to obtain the phase deviation, and this deviation is converted to an analog signal by a D/A converter 20 and is outputted. Thus, the phase difference free from delay is obtained as the counted value.

Description

【発明の詳細な説明】 A、産業上の利用分野 本発明は、複数の回転体の位相制御装置に係り、特に回
転体の速度パルスから位相差を検出する位相差検出回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a phase control device for a plurality of rotating bodies, and more particularly to a phase difference detection circuit that detects a phase difference from speed pulses of the rotating bodies.

B0発明の概要 本発明は、複数の回転体間の回転位相差を検出・制御す
る位相制御装置において、 回転体の回転に比例した一対のパルスの一方を加算計数
パルスとし、他方を減算計数パルスとするアップダウン
カウンタの計数値を位相差検出値とすることにより、 比較的簡単な回路にしながら応答性に優れた位相制御が
できるようにしたものである。
B0 Summary of the Invention The present invention provides a phase control device that detects and controls rotational phase differences between a plurality of rotating bodies, in which one of a pair of pulses proportional to the rotation of the rotating bodies is an addition counting pulse and the other is a subtraction counting pulse. By using the count value of the up/down counter as the phase difference detection value, it is possible to perform phase control with excellent responsiveness while using a relatively simple circuit.

C8従来の技術 4輪駆動車(4WD)のパワートレン試験装置では、前
輪と後輪に独立的に負荷を与える前後輪独立ンヤーシベ
ンチや前後輪夫々左右輪にも独立的に負荷を与える4輪
独立シャーシベンチが設備され、各車輪の負荷状態(差
回転、負荷分担)を試験条件に合わせて各種性能試験を
可能にする。
C8 Conventional technology Four-wheel drive vehicle (4WD) powertrain test equipment uses independent front and rear benches that apply loads to the front and rear wheels independently, and four-wheel independent benches that apply loads independently to the left and right wheels of each front and rear wheels. A chassis bench is installed to enable various performance tests by adjusting the load status of each wheel (differential rotation, load sharing) to test conditions.

この負荷部の制御は、直流電気動力計等における定速度
制御、定トルク制御、走行抵抗制御が行われるほかに、
被試験機の左右輪あるいは前後輪の差回転制御、差トル
ク制御1位相差制御等が行われる。
This load section is controlled by constant speed control, constant torque control, and running resistance control using a DC electric dynamometer, etc.
Differential rotation control, differential torque control 1 phase difference control, etc. of the left and right wheels or front and rear wheels of the test machine are performed.

第2図は負荷制御部の要部制御回路を示す。シャーシベ
ンチ上の被試験機の前輪と後輪の回転速度又は回転量は
パルスピックアップIA、IBのパルス周波数又はパル
ス個数として検出される。
FIG. 2 shows the main control circuit of the load control section. The rotational speed or amount of rotation of the front and rear wheels of the machine under test on the chassis bench is detected as the pulse frequency or number of pulses of the pulse pickups IA and IB.

位相制御部2はパルスピックアップIA、IBからのパ
ルスから前輪と後輪の位相差を検出し、この位相差と位
相差設定器3の設定位相差との偏差に応じた位相制御出
力を得る。一方、パルスピックアップIA、IBのパル
ス出力は周波数−電圧変換器4A、4Bによって電圧信
号に変換され、この両信号の偏差から前輪と後輪の差回
転が検出される。差回転制御部5は位相制御部2による
位相制御のマイナループとして該制御部2からの出力を
差回転指令として変換器4A、4B側からの差回転をフ
ィードバック信号として両信号の偏差を比例積分演算し
、この出力をトルク指令として前輪と後輪のトルク制御
増幅器6A、6Bによるトルク設定器7の設定トルク又
はトルク検出器8の検出トルクとの偏差からトルク制御
が行われる。
The phase control section 2 detects the phase difference between the front wheels and the rear wheels from the pulses from the pulse pickups IA and IB, and obtains a phase control output according to the deviation between this phase difference and the phase difference set by the phase difference setting device 3. On the other hand, the pulse outputs of the pulse pickups IA and IB are converted into voltage signals by frequency-voltage converters 4A and 4B, and the differential rotation between the front wheels and the rear wheels is detected from the deviation between these two signals. The differential rotation control section 5 uses the output from the control section 2 as a minor loop of the phase control by the phase control section 2 as a differential rotation command, uses the differential rotation from the converters 4A and 4B as a feedback signal, and calculates the deviation of both signals by proportional integral calculation. Using this output as a torque command, torque control is performed based on the deviation between the torque set by the torque setter 7 or the torque detected by the torque detector 8 by the torque control amplifiers 6A and 6B for the front and rear wheels.

このような制御回路において、位相制御部2の従来の回
路構成を第3図に示す。ディジタル演算部11はパルス
ピックアップLA、IBの出力パルスを一定時間(サン
プリングタイム)単位で夫々計数して両針数値の差速度
A−Bを求め、ディジタル積分部12は差速度A−Bを
積分して位相差検出信号を求め、これと位相差設定器1
3の設定値との偏差を増幅器14で増幅する構成にされ
る。
In such a control circuit, a conventional circuit configuration of the phase control section 2 is shown in FIG. The digital calculation section 11 counts the output pulses of the pulse pickups LA and IB in fixed time (sampling time) units to obtain the differential speed A-B between the numerical values of both hands, and the digital integration section 12 integrates the differential speed A-B. to obtain a phase difference detection signal, and use this and phase difference setting device 1.
The configuration is such that the deviation from the set value of No. 3 is amplified by the amplifier 14.

D1発明が解決しようとする問題点 従来の位相制御部の構成では、ディジタル演算部11に
よるサンプリング周期による速度差演算のための遅れ、
及びディジタル積分部12による積分遅れがある。この
遅れは位相制御系のデッドタイムになり、該制御系の応
答時間を制限する問題があった。この応答性の悪さは、
例えば負荷試験での加減速時の過渡位相制御を困難にす
るものであった。
D1 Problems to be Solved by the Invention In the configuration of the conventional phase control section, there is a delay due to the speed difference calculation due to the sampling period of the digital calculation section 11;
There is also an integration delay caused by the digital integration section 12. This delay becomes a dead time of the phase control system, which poses a problem of limiting the response time of the control system. This poor responsiveness is due to
For example, this made it difficult to control transient phases during acceleration and deceleration during load tests.

本発明の目的は、回路構成を複雑にすることなく応答性
に優れた位相制御装置を堤供するにある。
An object of the present invention is to provide a phase control device with excellent responsiveness without complicating the circuit configuration.

E1問題点を解決するための手段と作用本発明は上述の
目的を達成するため、複数の回転体の回転速度又は回転
量に比例したパルスを夫々発生する複数のパルスピック
アップと、このパルスピックアップの2つのパルスのう
ち一方を加算計数パルスとし他方を減算計数パルスとす
るアップダウンカウンタ回路とを備え、この回路の計数
値を前記複数の回転体の回転位相差として該回転体の回
転位相検出信号にすることを特徴とする。
Means and Effects for Solving Problem E1 In order to achieve the above-mentioned object, the present invention includes a plurality of pulse pickups each generating a pulse proportional to the rotational speed or amount of rotation of a plurality of rotating bodies, and a plurality of pulse pickups of the pulse pickup. an up/down counter circuit that uses one of the two pulses as an addition counting pulse and the other as a subtraction counting pulse, and uses the count value of this circuit as the rotational phase difference of the plurality of rotating bodies to generate a rotational phase detection signal of the plurality of rotating bodies. It is characterized by making it.

F、実施例 第1図は本発明の一実施例を示す位相制御部の回路図で
ある。アップ・ダウンパルス処理回路15はパルスピッ
クアップIA、IBからのパルスを夫々微分処理してそ
の立ち上がり又は立ち下がりタイミングのパルスを得、
この両パルスからアップ・ダウンの指令U/D及びアッ
プパルスとダウンパルスを得る。アップ・ダウンカウン
タ16は処理回路15からのアップ・ダウン指令U/D
によって加減算が切り換えられ、加算時にはアップパル
スを計数加算し、減算時にはダウンパルスを計数減算す
る。デッドバンド回路17は、カウンタ16の計数値を
0±1の範囲をデッドバンドとして取り出し、位相差検
出データとする。加減算回路18はデッドバンド回路1
7からの位相差検出データYと位相差設定器19の設定
値Xとのディジタル加減算をして位相偏差を求め、この
偏差をD/A変換器20によってアナログ信号に変換出
力する。
F. Embodiment FIG. 1 is a circuit diagram of a phase control section showing an embodiment of the present invention. The up/down pulse processing circuit 15 performs differential processing on the pulses from the pulse pickups IA and IB, respectively, to obtain a pulse at the rising or falling timing.
The up/down command U/D and the up pulse and down pulse are obtained from these two pulses. The up/down counter 16 receives up/down commands U/D from the processing circuit 15.
Addition and subtraction are switched by , and up pulses are counted and added during addition, and down pulses are counted and subtracted during subtraction. The dead band circuit 17 takes out the count value of the counter 16 as a dead band in the range of 0±1, and uses it as phase difference detection data. Addition/subtraction circuit 18 is dead band circuit 1
The phase difference detection data Y from 7 and the setting value X of the phase difference setter 19 are digitally added and subtracted to obtain a phase deviation, and this deviation is converted into an analog signal by a D/A converter 20 and output.

こうした構成において、アップ・ダウンカウンタ16で
はアップパルスとダウンパルスの入力数に応じた計数値
(位相差に相当する値)になり、しかも該計数値はパル
ス入力に対してリアルタイムで変化する。従って、従来
のようなサンプリングタイムによる遅れ及び積分処理に
よる遅れを無くした位相差を計数値として得ることがで
きる。
In such a configuration, the up/down counter 16 has a count value (a value corresponding to a phase difference) depending on the number of up pulses and down pulses input, and the count value changes in real time with respect to the pulse input. Therefore, it is possible to obtain a phase difference as a count value without delay due to sampling time and delay due to integration processing as in the conventional method.

そして、カウンタ16の計数値をデッドバンド回路17
によって位相差0±1にデッドバンドを与える。これに
より、パルスピックアップからのパルスが交互に入力さ
れる同期状態ではカウンタ16の計数値は0±1のデッ
ドバンド内にあり、回路17の出力は一定値(+1又は
−1)に固定され、加減算器18での加減算結果及びD
/A変換器20の変換出力に不要な振動を無くすことが
できる。
Then, the count value of the counter 16 is converted into a dead band circuit 17.
A dead band is given to the phase difference of 0±1. As a result, in a synchronous state where pulses from the pulse pickup are input alternately, the count value of the counter 16 is within a dead band of 0±1, and the output of the circuit 17 is fixed at a constant value (+1 or -1). The addition and subtraction results in the adder/subtractor 18 and D
Unnecessary vibrations can be eliminated from the conversion output of the /A converter 20.

なお、カウンタ16の最大計数値やパルスピックアップ
IA、IBのパルス周波数は位相制御の精度から適宜決
定され、例えばピックアップIA。
Note that the maximum count value of the counter 16 and the pulse frequencies of the pulse pickups IA and IB are appropriately determined based on the precision of phase control, for example, the pulse frequency of the pulse pickups IA and IB.

IBが360.<ルス/1回転であれば±16の回転位
相精度になる。
IB is 360. <Rus/1 rotation, the rotational phase accuracy is ±16.

また、実施例では2つの回転検出器からの位相差を検出
する場合を示すが、これは3つ以上の検出器からの位相
差を個々に検出するなど複数の回転体の位相制御に適用
できるのは勿論である。
In addition, although the example shows a case where the phase difference from two rotation detectors is detected, this can be applied to phase control of multiple rotating bodies, such as detecting phase differences from three or more detectors individually. Of course.

G1発明の効果 以上のとおり、本発明によれば、一対のパルスピックア
ップの出力パルスの一方を加算計数パルスとし、他方を
減算計数パルスとするアップ・ダウンカウンタの計数値
を位相差検出値とするため、従来のサンプリングタイム
及び積分演算の遅れを無くした高速応答の検出及び位相
制御ができる効果がある。また、回路構成上は従来の演
算に較べて簡単化される。
G1 Effects of the Invention As described above, according to the present invention, the count value of the up/down counter in which one of the output pulses of a pair of pulse pickups is an addition count pulse and the other is a subtraction count pulse is used as a phase difference detection value. Therefore, it is possible to perform high-speed response detection and phase control without the conventional sampling time and delay in integral calculation. Furthermore, the circuit configuration is simplified compared to conventional calculations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す要部制御回路図、第2
図はパワートレン試験装置の負荷制御部の要部制御回路
図、第3図は従来の位置制御部の回路図である。 IA、IB・・・パルスピックアップ、2・・・位相制
御部、15・・パルス処理回路、16・・・アップ・ダ
ウンカウンタ、1.7・・・デッドバンド回路、18・
・・加減算部、19・・・位相差設定器、20・・・D
/A変換器。
FIG. 1 is a main part control circuit diagram showing one embodiment of the present invention, and FIG.
The figure is a main part control circuit diagram of a load control section of a power train testing device, and FIG. 3 is a circuit diagram of a conventional position control section. IA, IB... Pulse pickup, 2... Phase control unit, 15... Pulse processing circuit, 16... Up/down counter, 1.7... Dead band circuit, 18...
... Addition/subtraction section, 19... Phase difference setting device, 20... D
/A converter.

Claims (1)

【特許請求の範囲】[Claims] 複数の回転体の回転速度又は回転量に比例したパルスを
夫々発生する複数のパルスピックアップと、このパルス
ピックアップの2つのパルスのうち一方を加算計数パル
スとし他方を減算計数パルスとするアップダウンカウン
タ回路とを備え、この回路の計数値を前記複数の回転体
の回転位相差として該回転体の回転位相検出信号にする
ことを特徴とする回転体の位相制御装置。
A plurality of pulse pickups each generating a pulse proportional to the rotational speed or amount of rotation of a plurality of rotating bodies, and an up/down counter circuit that uses one of the two pulses of the pulse pickup as an addition counting pulse and the other as a subtraction counting pulse. A phase control device for a rotating body, characterized in that the counted value of this circuit is used as a rotational phase detection signal of the plurality of rotating bodies as a rotational phase difference of the plurality of rotating bodies.
JP62280449A 1987-11-06 1987-11-06 Phase controller for rotating body Pending JPH01121911A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62280449A JPH01121911A (en) 1987-11-06 1987-11-06 Phase controller for rotating body

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62280449A JPH01121911A (en) 1987-11-06 1987-11-06 Phase controller for rotating body

Publications (1)

Publication Number Publication Date
JPH01121911A true JPH01121911A (en) 1989-05-15

Family

ID=17625213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62280449A Pending JPH01121911A (en) 1987-11-06 1987-11-06 Phase controller for rotating body

Country Status (1)

Country Link
JP (1) JPH01121911A (en)

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