JPH01112047U - - Google Patents
Info
- Publication number
- JPH01112047U JPH01112047U JP1988007257U JP725788U JPH01112047U JP H01112047 U JPH01112047 U JP H01112047U JP 1988007257 U JP1988007257 U JP 1988007257U JP 725788 U JP725788 U JP 725788U JP H01112047 U JPH01112047 U JP H01112047U
- Authority
- JP
- Japan
- Prior art keywords
- liquid
- module
- heater
- support frame
- hot plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000007788 liquid Substances 0.000 claims description 5
- 238000007654 immersion Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988007257U JPH01112047U (fr) | 1988-01-22 | 1988-01-22 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988007257U JPH01112047U (fr) | 1988-01-22 | 1988-01-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01112047U true JPH01112047U (fr) | 1989-07-27 |
Family
ID=31212117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988007257U Pending JPH01112047U (fr) | 1988-01-22 | 1988-01-22 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01112047U (fr) |
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1988
- 1988-01-22 JP JP1988007257U patent/JPH01112047U/ja active Pending