JPH01108637U - - Google Patents
Info
- Publication number
- JPH01108637U JPH01108637U JP315888U JP315888U JPH01108637U JP H01108637 U JPH01108637 U JP H01108637U JP 315888 U JP315888 U JP 315888U JP 315888 U JP315888 U JP 315888U JP H01108637 U JPH01108637 U JP H01108637U
- Authority
- JP
- Japan
- Prior art keywords
- diversity receiver
- antenna switching
- level
- antenna
- field strength
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 230000005684 electric field Effects 0.000 claims 1
- 230000035945 sensitivity Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 1
Description
第1図は本考案の一実施例のダイバーシチ受信
機1のブロツク図、第2図は停止レベル判定部1
7および時定数回路18の一構成例を示す電気回
路図、第3図は停止レベル判定部17および時定
数回路18の他の構成例を示す電気回路図、第4
図はアンテナ入力に対する音響出力レベルの変化
を示すグラフ、第5図はアンテナ入力レベルに対
するミユート信号レベルを示すグラフ、第6図は
チユーナ入力に対するS信号レベルとミユート信
号レベルとの変化を示すグラフ、第7図はダイバ
ーシチ受信機1における離調状態に対するミユー
ト処理を説明するグラフ、第8図はチユーナ入力
とミユート信号レベルおよびSレベルとの関係を
示すグラフである。
1……ダイバーシチ受信機、2……ロツドアン
テナ、3……ガラスアンテナ、4……アンテナ切
換部、6……検波部、12……離調検出部、13
……電界強度検出部、17……停止レベル判定部
、18……時定数回路、19……フリツプフロツ
プ回路。
FIG. 1 is a block diagram of a diversity receiver 1 according to an embodiment of the present invention, and FIG. 2 is a stop level determination unit 1.
7 and the time constant circuit 18; FIG. 3 is an electric circuit diagram showing another example of the structure of the stop level determination unit 17 and the time constant circuit 18;
FIG. 5 is a graph showing changes in acoustic output level with respect to antenna input; FIG. 5 is a graph showing changes in mute signal level with respect to antenna input level; FIG. 6 is a graph showing changes in S signal level and mute signal level with respect to tuner input; FIG. 7 is a graph illustrating the mute processing for the detuned state in the diversity receiver 1, and FIG. 8 is a graph showing the relationship between the tuner input, the mute signal level, and the S level. DESCRIPTION OF SYMBOLS 1... Diversity receiver, 2... Rod antenna, 3... Glass antenna, 4... Antenna switching section, 6... Detection section, 12... Detuning detection section, 13
. . . Field strength detection section, 17 . . . Stop level judgment section, 18 . . . Time constant circuit, 19 . . . Flip-flop circuit.
Claims (1)
力を共通にアンテナ切換手段に与えて、複数のア
ンテナを受信感度が増大するように切換えるダイ
バーシチ受信機において、 上記検出出力が予め定められるレベル範囲であ
る期間、アンテナ切換を停止するようにしたこと
を特徴とするダイバーシチ受信機。[Claims for Utility Model Registration] In a diversity receiver that detects electric field strength and detuning state and commonly applies these detection outputs to antenna switching means to switch a plurality of antennas so as to increase receiving sensitivity, A diversity receiver characterized in that antenna switching is stopped during a period when a detection output is within a predetermined level range.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP315888U JPH01108637U (en) | 1988-01-14 | 1988-01-14 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP315888U JPH01108637U (en) | 1988-01-14 | 1988-01-14 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01108637U true JPH01108637U (en) | 1989-07-24 |
Family
ID=31204543
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP315888U Pending JPH01108637U (en) | 1988-01-14 | 1988-01-14 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01108637U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60232727A (en) * | 1984-05-01 | 1985-11-19 | Hitachi Ltd | Single system diversity control circuit |
-
1988
- 1988-01-14 JP JP315888U patent/JPH01108637U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60232727A (en) * | 1984-05-01 | 1985-11-19 | Hitachi Ltd | Single system diversity control circuit |
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