JPH01104701U - - Google Patents
Info
- Publication number
- JPH01104701U JPH01104701U JP20059087U JP20059087U JPH01104701U JP H01104701 U JPH01104701 U JP H01104701U JP 20059087 U JP20059087 U JP 20059087U JP 20059087 U JP20059087 U JP 20059087U JP H01104701 U JPH01104701 U JP H01104701U
- Authority
- JP
- Japan
- Prior art keywords
- pin
- chip component
- printed board
- utility
- attached
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Connecting Device With Holders (AREA)
- Details Of Resistors (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20059087U JPH01104701U (en:Method) | 1987-12-29 | 1987-12-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20059087U JPH01104701U (en:Method) | 1987-12-29 | 1987-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01104701U true JPH01104701U (en:Method) | 1989-07-14 |
Family
ID=31490991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20059087U Pending JPH01104701U (en:Method) | 1987-12-29 | 1987-12-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01104701U (en:Method) |
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1987
- 1987-12-29 JP JP20059087U patent/JPH01104701U/ja active Pending