JP7843537B2 - Gaming machine - Google Patents

Description

This invention relates to a gaming machine.

Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows corresponding to each reel, which display some of the symbols on each reel so that the player can see them; a start switch that, when it detects a player operation (hereinafter referred to as "start operation") provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel; a stop switch that, when it detects a player operation (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and stop switch, thereby controlling the rotation and stopping of each reel. Typically, in such a pachislo machine, whether or not a win has occurred is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

Some gaming machines disclose a system where the settlement process, executed when the settlement button is pressed while waiting for a unit game to start, and the payout process, executed at the end of a unit game, are performed as separate processes (see Patent Document 1).

Japanese Patent Publication No. 2019-170605

Regarding the dispensing of game tokens, there is no difference between the settlement process and the payout process, and although there are common processing parts, it is common for the settlement process and the payout process to be separate processes, as shown in Patent Document 1. The fact that these separate processes, each containing a common processing part, are described separately is one of the factors that puts pressure on the program area of the main ROM.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that can reduce the strain on the main ROM's program area capacity by standardizing the process of pressing the settlement button while waiting for a unit game to start, and the payout process of the gaming medium executed at the end of a unit game.

Furthermore, the present invention aims to provide a gaming machine that can mitigate the strain on the main ROM's program area capacity by setting the lower address of the target counter when executing the payout process for the gaming medium, which is performed when the settlement button is pressed or when a unit of game ends.

Furthermore, the present invention aims to improve the development efficiency and maintainability of programs by simplifying the program structure and description through the standardization of dispensing processes.

To achieve the above objective, the present invention provides the following gaming machine.

The invention according to the first embodiment of the present invention has the following configuration.
A gaming machine (e.g., a pachislo machine 2001) that controls the progress of a game by implementing a microprocessor (e.g., a microprocessor 2100) including a central processing unit (e.g., a main CPU 2101), read memory (e.g., a main ROM 2102), and read/write memory (e.g., a main RAM 2103),
The central processing unit is
Main registers including extended registers, general-purpose registers, flag registers, index registers, and stack pointer,
Subregisters including extended registers, general-purpose registers, flag registers, and index registers,
Bank 0 and Bank 1 include the main register and the sub-registers,
It is configured to include control registers, which include an interrupt page address register, a memory refresh register, a program counter, an interrupt enable register 1, and an interrupt enable register 2.
The read memory comprises a first storage means (for example, an in-use ROM area 2202a) in which programs and data directly involved in the progress of the game are stored, and a second storage means (for example, an out-of-use ROM area 2202b) in which programs and data not directly involved in the progress of the game are stored.
The program stored in the second storage means includes specific subroutines that, after being called by a program stored in the first storage means and executing a process, always return to the calling program in the first storage means (for example, a subprogram that executes the out-of-use RAM initialization process (continued) shown in Figure 177, or a subprogram that executes the interface 2 output process (continued) shown in Figure 180), and normal subroutines that, after being called by a program stored in the second storage means and executing a process, always return to the calling program in the second storage means (for example, the CRC calculation process (out-of-use area) shown in Figure 173).
The central processing unit is
The specific call instruction used to call the aforementioned specific subroutine (for example, "CALLEX") is executed to call the aforementioned specific subroutine,
The specific subroutine executes a specific return instruction used when returning to the program stored in the first storage means that called it, thereby controlling the return to the program stored in the first storage means.
The specified call instruction has different instruction capacity stored in the first storage means depending on whether the specified subroutine being called calls a program stored before a specific address (e.g., "2100"H) in the second storage means or a program stored at an address after the specific address (for example, a 2-byte instruction when calling a program before the specific address, and a 4-byte instruction when calling a program after the specific address).
The instruction capacity required is greater when calling a program stored at an address after the specified address than when calling a program stored at an address before the specified address.
If the program body of the specified subroutine is stored at an address after the specified address, in order to reduce the instruction capacity, the specified call instruction executes the program body of the specified subroutine via a call to a program stored at an address before the specified address (for example, the "JR" or "JP" instruction).
When the aforementioned specific call command is executed, the system switches from bank 0 to bank 1.
When the aforementioned specific return command is executed, the system switches from bank 1 to bank 0.
The aforementioned specific subroutine executes processing after switching from bank 0 to bank 1.
If the program body of the specified subroutine is stored at an address after the specified address, the address before the specified address stores processing code for executing the program body of the specified subroutine (for example, code that can be interpreted by the main CPU 2101).
The aforementioned specific call instruction executes the program body of the aforementioned specific subroutine by executing the processing code.
The processing code is a jump instruction (for example, a "JR" or "JP" instruction) for jumping to the program body of the specific subroutine .
The aforementioned specific call instruction is:
When calling a program stored at an address prior to the aforementioned specific address, this is a two-byte instruction that identifies the program using a lower address of the address where the program is stored.
A gaming machine characterized in that , when calling a program stored at an address after the aforementioned specific address, it can be configured as a 3-byte instruction .

According to this invention, by standardizing the payout process for game media executed when the settlement button is pressed or at the end of a game, the pressure on the program area capacity of the main ROM can be reduced.

Furthermore, according to the present invention, when executing the payout process for game media, which is performed when the settlement button is pressed or when a unit of game ends, the lower address of the target counter is set. This reduces the size of the calling program, thereby mitigating the pressure on the main ROM's program area capacity.

Furthermore, according to the present invention, by standardizing the dispensing process, the program's structure and description can be made more concise, thereby improving the development efficiency and maintainability of the program.

This is a diagram showing the external structure of a gaming machine according to the first embodiment. This is a diagram showing the internal structure of a gaming machine according to the first embodiment. This is a block diagram showing the electrical configuration of a gaming machine according to the first embodiment. This is a diagram illustrating the functional flow of a gaming machine according to the first embodiment. This is a diagram illustrating the gameplay of the first gaming machine according to the first embodiment. This is a diagram illustrating the modes of the first gaming machine according to the first embodiment. This figure shows various tables for the first gaming machine according to the first embodiment. This figure shows various tables for the first gaming machine according to the first embodiment. This is a diagram showing the pattern arrangement table for the first gaming machine according to the first embodiment. This is a diagram showing the internal lottery table of the first gaming machine according to the first embodiment. This figure shows a pattern combination table for a first gaming machine according to the first embodiment. This figure shows a pattern combination table for a first gaming machine according to the first embodiment. This is a diagram showing a symbol combination table for a first gaming machine according to the first embodiment. This figure shows a pattern combination table for a first gaming machine according to the first embodiment. This diagram illustrates the correspondence between the internal winning combination, the stopping operation mode, and the display combination of a first gaming machine according to the first embodiment. This is a diagram illustrating the limit processing of a first gaming machine according to the first embodiment. This diagram shows the configuration of the winning flag storage area, the prize activation flag storage area, and the symbol code storage area of the first gaming machine according to the first embodiment. This diagram shows the configuration of the carryover bonus storage area of the first gaming machine according to the first embodiment. This diagram shows the configuration of the game state flag storage area of the first gaming machine according to the first embodiment. This diagram shows the configuration of the mode flag storage area of the first gaming machine according to the first embodiment. This diagram shows the configuration of the operation stop button storage area of the first gaming machine according to the first embodiment. This diagram shows the configuration of the button press sequence storage area of the first gaming machine according to the first embodiment. This is a flowchart showing the main processing performed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the power-on processing performed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the medal reception and start check process executed by the main control circuit of the first gaming machine according to the first embodiment. This is a flowchart showing the internal lottery process executed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the game start state control process executed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the processing performed at the start of gameplay during the advantageous period, which is executed by the main control circuit of the first gaming machine according to the first embodiment. This is a flowchart showing the reel stop control process executed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the game end state control process executed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the processing performed at the end of a game during a favorable period, which is executed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows the periodic interrupt processing performed by the main control circuit of the first gaming machine according to the first embodiment. This flowchart shows an overview of the sub-side control processing performed by the sub-control circuit of the gaming machine according to the first embodiment. This diagram shows an example configuration of a medalless gaming machine according to the first embodiment. This figure shows an example of the configuration of the main control board of a gaming machine according to the first embodiment. This figure shows an example of a rock performance according to the second embodiment. This diagram shows the specific details of the lock effect corresponding to lock effect number "1". This diagram shows the specific details of the lock effect corresponding to lock effect number "2". This diagram shows the specific details of the lock effect corresponding to lock effect number "3". This diagram shows the specific details of the lock effect corresponding to lock effect number "4". This diagram shows the specific details of the lock effect corresponding to lock effect number "5". This diagram shows the specific details of the lock effect corresponding to lock effect number "6". This is a flowchart showing the lock effect determination process performed in the main control circuit. This is a flowchart showing the lock effect execution process performed in the main control circuit. This figure shows an example of an image displayed on the main display device during a simulated game. This flowchart shows the processing performed in the main control circuit during simulated gameplay. This flowchart shows the normal processing performed during simulated gameplay in the main control circuit. This flowchart shows the reel animation processing performed in the main control circuit after a simulated game. This flowchart shows the processing performed in the main control circuit after the reel animation during simulated gameplay. This is a flowchart showing the reel rotation start process performed in the main control circuit. This is a flowchart showing the random delay processing performed in the main control circuit. This figure shows an example of the temporal change in the reel control state when a simulated game is being played. This figure shows an example of the temporal change in the reel control state when a simulated game is being played. This figure shows an example of the temporal change in the reel control state when a simulated game is being played. This is a flowchart showing the lock effect execution process performed in the main control circuit according to the third embodiment. This flowchart shows the process for starting a simulated game that is performed in the main control circuit. This flowchart shows the normal processing performed during simulated gameplay in the main control circuit. This flowchart shows the stop button operation reception process performed in the main control circuit. This flowchart shows the oscillation control process performed in the main control circuit. This flowchart shows the process for ending a simulated game that is performed in the main control circuit. This flowchart shows the process for receiving a simulated game challenge operation in the main control circuit. This figure shows an example of an image displayed on the main display device. This flowchart shows the bonus winning process performed in the main control circuit. This flowchart shows the process for determining the game end lock animation, which is performed in the main control circuit. This flowchart shows the process of executing the game end lock animation in the main control circuit. This flowchart shows the process performed in the main control circuit to initiate the game end lock animation. This is a diagram showing the memory map of the main control circuit. This is a diagram illustrating the gameplay of a first gaming machine (modified example) according to the first embodiment. This figure illustrates an example of preferential control (during normal operation) of a first gaming machine (modified version) according to the first embodiment. This is a diagram illustrating an example of preferential control (during ST) of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates an example of controlling the anticipation-building effect of a first gaming machine (modified version) according to the first embodiment. This figure illustrates a modified example 3 (transmission information control example (part 1)) of the push-button bell of the first gaming machine (modified example) according to the first embodiment. This figure illustrates a modified example 3 (transmission information control example (part 2)) of the push-button bell of the first gaming machine (modified example) according to the first embodiment. (a) is a diagram showing the transitions between game states according to the fourth embodiment of the present invention. (b) is a table summarizing the transition conditions for game states according to the fourth embodiment of the present invention. (a) is a diagram showing the pattern placement table. (b) is a diagram showing the pattern code table. This is a diagram showing a pattern combination table. This is a diagram showing a pattern combination table. This is a diagram showing the combination table by flag. This is a diagram showing the combination table by flag. This is a diagram showing the combination table by flag. This is a diagram showing the combination table by flag. This is a diagram showing the combination table by flag. This diagram shows the internal lottery table for the RT0 game state. (a) is a diagram showing the internal lottery table for the RT1 game state. (b) is a diagram showing the internal lottery table for the BB game state. This diagram shows an example of the correspondence between internal winning symbols, stop operation methods, and display symbols. This figure shows an example of the transition flow of game states in the non-advantageous and advantageous periods according to the fourth embodiment of the present invention. This figure shows the transition of the payout state according to the fourth embodiment of the present invention. This is a table summarizing the transition conditions for the payout state according to the fourth embodiment of the present invention. (a) is a diagram showing the numerical values displayed on the instruction monitor during pseudo-BIG and pseudo-REG. (b) is a diagram showing the content corresponding to the numerical values displayed on the instruction monitor. This diagram shows the correspondence between the internal winning combination, the sub-flag, and the payout flag. This flowchart shows the processing performed in the main control circuit at the start of a game during a non-advantageous period. (a) is a diagram showing the lottery table for transitioning to the advantageous period. (b) is a diagram showing the lottery table at the time of transitioning to the advantageous period. This flowchart shows the processing performed in the main control circuit at the start of a game to prepare for consecutive wins. (a) is a diagram of the winning streak preparation mode lottery table (1). (b) is a diagram of the winning streak preparation mode lottery table (2). This diagram shows the lottery table for transitioning to the Consecutive Win Challenge. (a) is a diagram showing the draw table for determining when transitioning to the Consecutive Win Challenge. (b) is a diagram showing the draw table for dropping out of the Consecutive Win Preparation. This flowchart shows the processing performed in the main control circuit at the start of a normal game stage. This is a flowchart showing the normal stage start processing performed in the main control circuit. (a) is a diagram showing the mode lottery table during normal transitions. (b) is a diagram showing the ceiling lottery table during normal transitions. This is a diagram showing the point mode lottery table. This flowchart shows the processing specific to the normal stage performed in the main control circuit. This diagram shows the freeze lottery table during the normal stage. This diagram shows the draw table for transition flags and winning flags during normal stages. This diagram shows the draw table for transition flags and winning flags during normal stages. This diagram shows the draw table for transition flags and winning flags during normal stages. This is a flowchart showing the common processing performed in the main control circuit for normal payout states. This flowchart shows the normal game count counter update process performed in the main control circuit. This diagram shows the lottery table for transitioning to High Probability 1 after a normal number of games played. This diagram shows the lottery table for transitioning to High Probability 1 after a normal number of games played. This diagram shows a lottery table being prepared for a ceiling fake. This flowchart shows the ceiling-related processing performed in the main control circuit. This diagram shows the lottery table for the type of winning ticket when the ceiling is reached. This diagram shows the lottery table for the type of winning ticket when the ceiling is reached. This flowchart shows the point-related processing performed in the main control circuit. This diagram shows the point acquisition lottery table. This diagram shows the lottery table when points are reached. This flowchart shows the process of drawing the number of pre-announcement games when a flag is drawn during a normal stage, which is performed in the main control circuit. This flowchart shows the process of drawing the number of pre-bonus games when a pseudo-BIG or promotion chance is won during the normal stage, which is performed in the main control circuit. This flowchart shows the process of drawing the number of pre-announcement games when a chance stage is won during a normal stage, which is performed in the main control circuit. (a) is a diagram showing the lottery table for the number of pre-bonus games played when a pseudo-BIG or promotion chance is won during the normal stage (when a point is reached). (b) is a diagram showing the lottery table for the number of pre-bonus games played when a pseudo-BIG or promotion chance is won during the normal stage (when the ceiling is reached). (c) is a diagram showing the lottery table for the number of pre-bonus games played when a pseudo-BIG or promotion chance is won during the normal stage (basic). (d) is a diagram showing the lottery table for the number of pre-announcement games played when a chance stage is won during a normal stage (when a point is reached). (e) is a diagram showing the lottery table for the number of pre-announcement games played when a chance stage is won during a normal stage (basic). (f) is a diagram showing the lottery table for the number of pre-announcement games played when a ceiling fake win occurs during a normal stage. This flowchart shows the pre-game count management process for the normal stage, which is performed in the main control circuit. This flowchart shows the stochastic mode-related processing performed in the main control circuit. (a) is a diagram of the high probability 2 transition lottery table (1). (b) is a diagram of the high probability 2 transition lottery table (2). (c) is a diagram of the high probability 2 transition lottery table (3). (d) is a diagram of the high probability 2 fall-off lottery table. This is a flowchart showing the pre-processing for promotion opportunities performed in the main control circuit. This diagram shows the lottery table for when a promotion opportunity is triggered. This flowchart shows the processing performed in the main control circuit at the start of the chance stage game. This diagram shows the lottery table for the guaranteed number of games played at the start of the Chance Stage. This diagram shows the pseudo-BIG and promotion chance lottery table during the chance stage. This diagram shows the lottery table for increasing the number of games played during the Chance Stage. This flowchart shows the process of drawing the number of pre-announcement games when a flag is won during the chance stage, which is performed in the main control circuit. This diagram shows the lottery table for the number of pre-announcement games played when a flag is won during the chance stage. This flowchart shows the counter management process for the chance stage performed in the main control circuit. This flowchart shows the processing performed in the main control circuit at the start of a game for promotion chances. This diagram shows the promotion chance mode lottery table. This diagram shows the promotion chance mode lottery table. This diagram shows the lottery table for promotion opportunities. This is a diagram showing the next simulated game lottery table. This diagram shows the pseudo-BIG bonus upgrade lottery table after a set number of games have been played. This is a diagram showing the simulated game lottery table. Figure 139 shows the contents of the simulated game. This diagram shows the contents of the simulated game. This diagram shows the flow of gameplay during a promotion opportunity. This diagram shows an example of the presentation when a pseudo-BIG win occurs in the first game of the promotion chance. This diagram shows an example of the presentation when all pseudo-BIG bonuses are not won in the first to fourth games of the promotion chance. This flowchart shows the processing performed in the main control circuit when a pseudo-BIG game starts. This is a flowchart showing the processing performed in the main control circuit when a pseudo-BIG bonus is initiated. This diagram shows the lottery table for the consecutive win challenge at the start of a pseudo-BIG bonus round. This is a diagram showing the 1G consecutive lottery table during the pseudo-BIG bonus round. This flowchart shows the counter management process for pseudo-BIG performed in the main control circuit. This flowchart shows the pseudo-BIG termination processing (1) performed in the main control circuit. This diagram shows the draw table when the number of successful replies is insufficient. This is a flowchart showing the pseudo-BIG termination processing (2) performed in the main control circuit. This diagram shows the lottery table for the continuous win challenge at the end of the final second pseudo-BIG. This flowchart shows the processing performed in the main control circuit when a pseudo-REG game starts. This diagram shows the lottery table for the consecutive win challenge at the start of a pseudo-REG. This is a diagram showing the 1G consecutive draw table during pseudo-REG. This flowchart shows the pseudo-REG counter management process performed in the main control circuit. This flowchart shows the processing performed in the main control circuit at the start of a game for the continuous win challenge. This diagram shows the pseudo-bonus lottery table at the start of the consecutive win challenge. This diagram shows the table for determining the number of games played at the start of the consecutive win challenge. This diagram shows the lottery table during the consecutive win challenge. This diagram shows the draw table for transitioning to normal mode at the end of the consecutive win challenge. This flowchart shows the counter management process for the continuous win challenge performed in the main control circuit. This diagram shows a list of counters managed by the main control circuit. This flowchart shows the AT-related processing performed in the main control circuit when the lever is turned on. This flowchart shows the AT-related processing performed in the main control circuit when the system is completely stopped. This diagram shows an example of a visual effect that occurs when a penalty is incurred during a promotion opportunity. This figure shows an example of the configuration of the microprocessor in the main control board according to the fifth embodiment of the present invention. This is a diagram showing the configuration of various registers in the main CPU according to the fifth embodiment of the present invention. This figure shows the memory map of a microprocessor according to a fifth embodiment of the present invention. This figure illustrates the outline of the external interrupt processing related to power outage detection in the fifth embodiment of the present invention. This is a flowchart showing the main process in the fifth embodiment of the present invention. This is a flowchart showing the power-on processing in the fifth embodiment of the present invention. This is a flowchart showing the CRC inspection process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the CRC calculation process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the error handling for game recovery failure (outside the usage area) in the fifth embodiment of the present invention. This flowchart shows the BB (Special Prize) game count check process, transmission standby & RAM initialization process, and designated RAM initialization process in the fifth embodiment of the present invention. This flowchart shows the BB (Special Prize) game count check process, transmission standby & RAM initialization process, and designated RAM initialization process in the fifth embodiment of the present invention. A flowchart showing the RAM initialization process outside the usage area (outside the usage area) and the RAM initialization process outside the usage area (continued) in the fifth embodiment of the present invention. This is a flowchart illustrating the random value acquisition process and internal lottery process in the fifth embodiment of the present invention. This is a flowchart showing the random value acquisition process and internal lottery process in the fifth embodiment of the present invention. This is a flowchart showing the interface 2 output processing (outside the usage area) and interface 2 output processing (continuation) in the fifth embodiment of the present invention. This is a flowchart showing the medal count abnormality detection process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the medal payout/re-play operation process, settlement execution process, and medal payout process in the fifth embodiment of the present invention. This is a flowchart showing the medal payout/re-play operation process, settlement execution process, and medal payout process in the fifth embodiment of the present invention. This is a flowchart showing the medal counting process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the start process for the ratio monitor aggregation (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart illustrating the periodic interrupt processing in the fifth embodiment of the present invention. This is a flowchart showing the test firing signal control process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the error detection process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the setting value check process (outside the usage area) and the random number check process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the power interruption processing in the fifth embodiment of the present invention. This is a flowchart showing the CRC generation process (outside the usage area) in the fifth embodiment of the present invention. This is a flowchart showing the error cause clearing process (outside the usage area) in the fifth embodiment of the present invention. This figure illustrates the situation regarding the specification of the call destination in CALLEX in the fifth embodiment of the present invention. This figure illustrates the process related to the CRC check of the main RAM in the fifth embodiment of the present invention. This is a flowchart illustrating the 4-bit data acquisition process in the fifth embodiment of the present invention. This figure illustrates the process related to the acquisition of 4-bit data in the fifth embodiment of the present invention. This figure shows an example of a table defined to be readable by applying a 4-bit data acquisition process in the fifth embodiment of the present invention. This figure shows an example of a table defined to be readable by applying a 4-bit data acquisition process in the fifth embodiment of the present invention. This figure shows an example of a table defined to be readable by applying a 4-bit data acquisition process in the fifth embodiment of the present invention. This is a flowchart illustrating the 2-bit data acquisition process in the fifth embodiment of the present invention. This figure illustrates the process related to the acquisition of 2-bit data in the fifth embodiment of the present invention. This figure shows an example of a table defined to be readable by applying a 2-bit data acquisition process in the fifth embodiment of the present invention. This figure illustrates the common processing in the fifth embodiment of the present invention, which uses the lower address of a counter as an input parameter. This figure illustrates the common processing in the fifth embodiment of the present invention, which uses the lower address of a counter as an input parameter. This figure illustrates a method for determining the start address for clearing an unused RAM area in a fifth embodiment of the present invention. This is a flowchart showing the stop button input monitoring process in the fifth embodiment of the present invention. This is a flowchart showing the common information backup generation process and the common information backup restoration process in the fifth embodiment of the present invention. This is a flowchart illustrating the common information recovery process in the fifth embodiment of the present invention. This figure illustrates the common processing in backup generation and backup restoration in the fifth embodiment of the present invention. This is a block diagram showing the electrical configuration of a gaming machine equipped with a main control board according to the sixth embodiment of the present invention. This figure shows an example configuration of a game information display unit, a medal count display unit, and a medal dispensing display unit provided in a gaming machine equipped with a main control board according to the sixth embodiment of the present invention. This figure shows an example configuration of the main control microprocessor and the medal count control microprocessor of the main control board according to the sixth embodiment of the present invention. This is a schematic diagram of an example circuit configuration of the main control board according to the sixth embodiment of the present invention.

[First Embodiment]
The gaming machine according to this embodiment will be described below with reference to the drawings. In this embodiment, a pachislo machine will be used as an example of the gaming machine.

[1. Structure of a pachislo machine]
First, the structure of the pachislo machine 1 will be explained with reference to Figures 1 and 2. Figure 1 shows the external structure of the pachislo machine 1, and Figure 2 shows the internal structure of the pachislo machine 1. For the sake of explanation, in the following explanation of the external structure, some parts of the internal structure may be explained, and vice versa.

[1-1. External structure]
[1-1-1. Enclosure]
The pachislo machine 1 is composed of a rectangular box-shaped casing 2. The casing 2 also includes a metal cabinet G as the main body of the gaming machine, which has a rectangular opening on the front side, an upper door mechanism UD located on the upper front of the cabinet G, and a lower door mechanism DD located on the lower front of the cabinet G.

Cabinet G comprises an intermediate support plate G1, a pair of left and right side walls G2, a rear wall G3, a top wall G4, and a bottom wall G5. Note that the rear wall G3 and bottom wall G5 are omitted from Figures 1 and 2. Furthermore, the top wall G4 of cabinet G has two openings G4a that are spaced apart horizontally and penetrate vertically. Wooden plate members G4b are attached to the top wall G4 to close each of these two openings G4a.

Furthermore, while the plate member G4b is used to fix the pachislo machine 1 to the gaming island (not shown) when installing it in a gaming parlor, it can be made of metal or resin, or it can be formed integrally with the upper wall G4, as long as such a fixing method is ensured. Also, as long as a certain level of strength is ensured for the cabinet G, some or all of the constituent members can be made of wood or resin.

Furthermore, within the cabinet G, an upper opening G101 that opens forward is formed above the intermediate support plate G1, and a lower opening G102 that opens forward is formed below the intermediate support plate G1. In other words, the interior of the cabinet G is divided into an upper space and a lower space by the intermediate support plate G1, and the intermediate support plate G1 functions as a partition plate dividing the interior of the cabinet G into the upper and lower spaces. The upper space is the space behind the upper door mechanism UD inside the cabinet G, and houses the main display device 210, etc., described later. The lower space is the space behind the lower door mechanism DD inside the cabinet G, and houses the reel unit RU, main control board 71, etc., described later.

Furthermore, the cabinet G does not necessarily have to include the intermediate support plate G1. That is, as long as the various devices are appropriately housed within the cabinet G, the upper and lower spaces may not be separated. Also, the cabinet G can simply be referred to as the "box" or "main body," or, since it functions as a frame supporting or fixing the upper door mechanism UD and the lower door mechanism DD, it can also be referred to as the "main body frame," "support," "support frame," or "fixing frame."

[1-1-2. Front Door]
The upper door mechanism UD and the lower door mechanism DD are formed to correspond to the shape and size of the opening in the cabinet G, and are provided to be able to close the upper and lower spaces of the opening in the cabinet G. In other words, the upper door mechanism UD and the lower door mechanism DD function as front doors provided on the front side of the pachislo machine 1.

Furthermore, the upper door mechanism UD and the lower door mechanism DD are each attached to the cabinet G so as to be openable and closable by an opening/closing mechanism (not shown), such as a hinge, provided on the left side wall G2. Alternatively, either the upper door mechanism UD or the lower door mechanism DD can be opened and closed by the aforementioned opening/closing mechanism, while the other can be configured to be detachable only when the other door mechanism is open.

The upper door mechanism UD has a performance display window UD1 located in its center and an upper lamp 23 located above the performance display window UD1. The performance display window UD1 is, for example, constructed as a transparent panel made of resin, and allows the performance image displayed on the screen device C, which constitutes the main display device 210 (described later) located on its rear side, to be visible. In this embodiment, the main display device 210, which displays the performance via the performance display window UD1, may be described as the main performance display unit 21.

The lower door mechanism DD has a main display window 4 located approximately in the center of its upper part, and a reel unit RU mounted on the rear side of the main display window 4, on the inside side of the cabinet G.

The reel unit RU is mainly composed of three reels: 3L (left reel), 3C (middle reel), and 3R (right reel). Each reel, 3L, 3C, and 3R, consists of, for example, a cylindrical reel body and a translucent reel strip attached to the circumferential surface of the reel body. Multiple (for example, 20) patterns are drawn on the reel strip at predetermined intervals along the direction of rotation of the reel. The reels 3L, 3C, and 3R are arranged in parallel (in a horizontal row) so that each can rotate at a constant speed in the vertical direction. The main display window 4 is, for example, made of a transparent resin panel, and allows at least a portion (for example, three) of the patterns on the circumferential surface of each reel 3L, 3C, and 3R to be visible. Furthermore, each reel (3L, 3C, 3R) is equipped with a light source (reel lamps, included in the lamps/LEDs described later) positioned so that the symbols are visible from at least the main display window 4. By illuminating these reels from within with a constant brightness while each reel (3L, 3C, 3R) is rotating, the visibility of the symbols is ensured.

Furthermore, the lower door mechanism DD includes a sub-effect display unit 22 located to the left of the main display window 4, and an effect button 10b located to the right of the main display window 4. The sub-effect display unit 22 displays the effect images shown on the sub-display device 220, which will be described later. The sub-effect display unit 22 can also be configured as a touch panel, allowing it to function not only as an effect display unit but also as one of the effect buttons. The effect button 10b is an operation unit that receives the player's effect operations (effect operations).

Furthermore, the lower door mechanism DD, located below the main display window 4 on a roughly horizontal base, includes a MAX bet button 6a, a 1 bet button 6b, and a payout button 9 on the left side, a special effect button 10a located approximately in the center, and a coin slot 5 on the right side.

The MAX bet button 6a and the 1 bet button 6b are control units that receive player input (betting operations; also referred to as "insertion operations" or "placement operations") for using the tokens deposited (credited) inside the pachislo machine 1. When the MAX bet button 6a is pressed, if the current bet is less than the maximum bet (for example, 3 tokens) and the credited tokens are equal to or greater than that difference, the maximum bet amount will be bet. Conversely, if the credited tokens are less than or equal to that difference, no tokens will be bet. When the 1 bet button 6b is pressed, if the current bet is less than the maximum bet and there are 1 or more credited tokens, 1 token will be bet.

The settlement button 9 is an operation unit that accepts the player's game operation (settlement operation) to return (settle) the credited tokens. Furthermore, if the settlement button 9 is operated when there are no credited tokens, the machine may accept the player's game operation (C/P mode selection operation) to select either a credit mode (C mode) that credits the tokens inserted or dispensed, or a pay mode (P mode) that does not credit the tokens, within the range of the number of tokens that can be credited (for example, 50 tokens). In other words, the settlement button 9 can also function as a so-called C/P button. The effect button 10a is an operation unit that accepts the player's operation (effect operation) for effects.

The medal slot 5 receives medals inserted into the pachislo machine 1 from the outside by the player. The received medals are detected by the selector 31 (described later), and it is determined whether they are valid medals. If a received medal is not valid, it is returned from the medal payout port 11 (described later). If a received medal is valid, and the current bet is less than the maximum bet, one medal is placed as a bet. If the current bet is the maximum bet and the credited medals have not reached the creditable limit, one medal is credited. On the other hand, if the credited medals have reached the creditable limit, the received medal is returned from the medal payout port 11 (described later).

Furthermore, the lower door mechanism DD has an information display device 14 located between the main display window 4 and the aforementioned base. The information display device 14 is composed of multiple lamps (LEDs) and a 7-segment LED, and displays information related to the game through its lighting pattern.

Furthermore, the lower door mechanism DD, located below the aforementioned base, includes a start lever 7 on the left side, three stop buttons 8L, 8C, and 8R located approximately in the center, and a locking mechanism 15 on the right side. The start lever 7 is mounted to be tiltable within a predetermined angle range and is an operating unit that receives the player's game operation (start operation) to begin the game. Each stop button 8L, 8C, and 8R is provided corresponding to each reel 3L, 3C, and 3R, and is an operating unit that receives the player's game operation (stop operation) to stop the rotation of each reel.

The locking mechanism 15 is, for example, composed of a key cylinder lock. When the lower door mechanism DD is in the closed state, the lock is released when the administrator of the amusement parlor (for example, an employee of the amusement parlor; the same applies hereinafter) inserts the door key (not shown) into the keyhole and turns it to the right, opening the lower door mechanism DD. The locking mechanism 15 may also function as a reset switch in addition to managing the opening and closing of the door mechanism. For example, if the administrator of the amusement parlor inserts the door key into the keyhole and turns it to the left, it may be possible to detect a reset operation similar to that of the reset switch 53 described later. Furthermore, in this embodiment, the upper door mechanism UD can be configured to open in conjunction with the opening of the lower door mechanism DD, or a separate locking mechanism corresponding to the upper door mechanism UD can be provided, allowing for independent management of opening and closing.

Furthermore, the lower door mechanism DD includes a waist panel 13 located in the center of its lower section, a medal tray 12 located below the waist panel 13, a medal dispensing opening 11 located above the medal tray 12, and sound-transmitting holes 24a and 24b located on the left and right sides of the medal dispensing opening 11.

The waist panel 13 consists of a decorative panel depicting machine information, such as a logo representing the machine's name or a character representing its motif, and a light source (a waist lamp included in the lamps/LEDs described later) for illuminating this decorative panel from the rear. The medal tray 12 stores the medals dispensed from the medal payout port 11. The medal payout port 11 discharges medals dispensed (or returned) from inside the pachislo machine 1 to the outside. The medals discharged from the medal payout port 11 include those dispensed from the hopper device 32 described later and those returned through the cancel chute (not shown) from the selector 31 described later. The sound-transmitting holes 24a and 24b are on their respective rear sides and transmit sound such as sound effects and background music output from speakers 35a and 35b (speaker 35a is not indicated in Figure 2) mounted inside the cabinet G toward the front of the pachislo machine 1.

In this embodiment, the upper door mechanism UD and the lower door mechanism DD are provided to correspond to the partition of the cabinet G into an upper and lower space. However, as long as the opening in the cabinet G can be opened and closed appropriately, it can be configured as a single door mechanism or as three or more door mechanisms. It can also be configured as a double door mechanism in the front-to-back direction (for example, an outer door and an inner door). Furthermore, the upper door mechanism UD and the lower door mechanism DD can simply be referred to as "doors," or, since they function as components that enable the opening in the cabinet G to be opened and closed, they can also be referred to as "opening/closing components," "door components," or "door parts."

[1-1-3. Variable Display Section]
As described above, the pachislo machine 1 is equipped with reels 3L, 3C, and 3R and a main display window 4. When the start lever 7 is operated (when the player initiates the start operation), the stepping motors 51L, 51C, and 51R described later are driven and controlled to start the rotation of each reel 3L, 3C, and 3R. As a result, the symbols displayed in the main display window 4 change. Also, when the stop buttons 8L, 8C, and 8R are operated (when the player initiates the stop operation), the stepping motors 51L, 51C, and 51R described later are driven and controlled to stop the rotation of each reel 3L, 3C, and 3R. As a result, the symbols displayed in the main display window 4 stop.

In other words, each reel 3L, 3C, 3R and the main display window 4 constitute a variable display unit (means) capable of displaying (and stopping) multiple symbols in multiple rows, or multiple variable display units (means) capable of displaying (and stopping) multiple symbols in a variable manner. Note that the variable display unit (means) may also be referred to as a "symbol display unit (means)" or "variable display unit (means)." Furthermore, the symbols may be referred to as "pictures" or "patterns," and since any information that can be visually identified by the player is acceptable, they can also be referred to as "identification information."

Furthermore, the main display window 4 is configured so that when the rotation of each reel 3L, 3C, and 3R stops, three symbols arranged consecutively for each reel are displayed within its frame. That is, the main display window 4 displays one symbol in each of the upper, middle, and lower sections of each row (a total of three symbols) (the symbols are displayed in a 3x3 arrangement within the frame of the main display window 4). The main display window 4 is sometimes referred to as the "symbol display area" or "window section."

Furthermore, valid lines are defined in the main display window 4. Valid lines are lines used to determine whether a predetermined combination of symbols has been displayed when all the symbols in all columns have stopped and been displayed in response to the player's stopping operation. In this sense, valid lines can also be called "winning lines" or "determination lines." Valid lines are configured as lines connecting any of the areas in each column. That is, if the main display window 4 is configured to display symbols in a 3x3 arrangement, it is possible to define up to 27 valid lines. However, in practice, one or more of these lines can be defined as valid lines, and the others can be defined as invalid lines.

For example, the line connecting the middle areas of reel 3L, reel 3C, and reel 3R is called the "center line," the line connecting the upper areas of reel 3L, reel 3C, and reel 3R is called the "top line," the line connecting the lower areas of reel 3L, reel 3C, and reel 3R is called the "bottom line," the line connecting the lower area of reel 3L, reel 3C, and reel 3R is called the "cross-up line," and the line connecting the upper area of reel 3L, reel 3C, and reel 3R is called the "cross-down line." Since these lines connect each area of each column in a straight line, one or more of these lines are often defined as valid lines. However, as mentioned above, it is also possible to define so-called irregular lines, which connect each area of each column with a broken line, as valid lines.

Furthermore, for active paylines to be activated, the required number of tokens for the game (the number of tokens available to start the game) must be bet prior to the player's start operation. However, the number of active paylines that are activated may be the same regardless of the number of bets, or it may vary depending on the number of bets. For example, if the three lines described above—"center line," "top line," and "bottom line"—are defined as active paylines, in the former case, the "center line," "top line," and "bottom line" will be activated regardless of whether the number of bets is 1 to 3. On the other hand, in the latter case, if the number of bets is 1, only the "center line" will be activated; if the number of bets is 2, the "center line" and "top line" will be activated; and if the number of bets is 3 (the maximum bet), the "center line," "top line," and "bottom line" will be activated.

In this embodiment, the variable display unit has three reels 3L, 3C, and 3R, and a main display window 4 capable of displaying three symbols in each column, thus displaying symbols in a 3x3 configuration. However, the symbol display configuration in the variable display unit is not limited to this. For example, the number of reels can be set to one, two, or four or more, and the number of symbols displayed in each column can be set to one, two, or four or more, thereby displaying symbols in a configuration different from the one described above. In this case, the number of definable active lines can also be increased or decreased as appropriate.

Furthermore, in this embodiment, the variable display unit displays the patterns by rotating each reel 3L, 3C, and 3R, but the configuration of the variable display unit is not limited to this. For example, it may be configured using an image display device similar to the main display device 210 and sub-display device 220 described later, or it may be configured using other display devices (e.g., organic EL or 7-segment LED). It may also be configured using other physical devices (e.g., a belt). The arrangement and size of the variable display unit can also be changed as appropriate.

Furthermore, in this embodiment, the variable display unit functions as a main-side display unit directly related to the game, controlled by the main control circuit 100 described later. However, a sub-side variable display unit related to effects not directly related to the game may also be provided, controlled by the sub-control circuit 200 described later. The sub-side display unit can be configured, for example, using a main display device 210 and a sub-display device 220. That is, a sub-side display unit may be provided in addition to the main-side display unit, which displays a variable pattern in response to the player's start operation (or the fulfillment of other start conditions) and displays a stopped pattern in response to the player's stop operation (or the fulfillment of other stop conditions). In this case, in order for the player to identify whether the variable display unit is directly related to the game, an identification mark such as "Slot Machine" or "Main Reel" may be attached near the main-side display unit to identify that the variable display unit is the main-side display unit. Furthermore, such identification displays may be shown on the main display device 210 or the sub-display device 220.

[1-1-4. Medal slot]
As described above, the pachislo machine 1 is equipped with a coin slot 5 that accepts coins inserted into the pachislo machine 1 from the outside by the player. The coin slot 5 and the selector 31, described later, have the function of betting the number of coins required for one game, similar to the MAX bet button 6a and the 1 bet button 6b, so such insertion operations can also be referred to as betting operations. Therefore, the coin slot 5 can also be said to be a betting operation detection unit (means) that can detect the player's betting operations. The shape, arrangement, and size of the coin slot can be changed as appropriate. Furthermore, this configuration is not necessarily required when the pachislo machine 1 is configured as a coinless game machine, as described later.

In this embodiment, while the use of tokens as a game medium is explained as an example of game value used in games or awarded based on game results, the game value used in this way is not limited to tokens. For example, coins, game balls, game point data, or tokens can also be used. Furthermore, game value can simply be referred to as "value" or "game value," etc.

[1-1-5. Operation section]
The pachislo machine 1 includes, for example, the following operating parts that can be operated by the player. Note that the following operating parts are merely examples, and the machine may be configured to include different operating parts, or it may be configured to omit operating parts that are not necessarily essential.

[1-1-5-1. Bet Button]
As described above, the pachislo machine 1 is equipped with a MAX bet button 6a and a 1 bet button 6b that accept betting operations from the player to use the tokens deposited (credited) inside it. Furthermore, such betting operations are detected by a bet switch 6S, which will be described later. Therefore, the MAX bet button 6a, the 1 bet button 6b, and the bet switch 6S constitute a betting operation detection unit (means) capable of detecting the player's betting operations. Note that the bet buttons only need to be able to detect the player's betting operations, and their shape, arrangement, and size can be changed as appropriate. In this embodiment, a MAX bet button 6a and a 1 bet button 6b are provided, but it is also possible to provide only the MAX bet button 6a without the 1 bet button 6b. Furthermore, a separate 2 bet button for betting two tokens may be provided.

[1-1-5-2. Start Lever]
As described above, the pachislo machine 1 is equipped with a start lever 7 that receives the player's start operation to begin playing. Such a start operation is detected by the start switch 7S, which will be described later. Therefore, the start lever 7 and the start switch 7S constitute a start operation detection unit (means) capable of detecting the player's start operation. The start lever only needs to be capable of detecting the player's start operation, and its shape, arrangement, size, etc., can be changed as appropriate.

[1-1-5-3. Stop button]
As described above, the pachislo machine 1 is equipped with stop buttons 8L, 8C, and 8R, which are provided corresponding to each reel 3L, 3C, and 3R, and which accept the player's stop operation to stop the rotation of each reel. Furthermore, such stop operations are detected by the stop switch 8S, which will be described later. Therefore, each stop button 8L, 8C, 8R and the stop switch 8S constitute a stop operation detection unit (means) capable of detecting the player's stop operation. Note that the stop buttons only need to be able to detect the player's stop operation, and their shape, arrangement, and size can be changed as appropriate.

[1-1-5-4. Checkout button]
As described above, the pachislo machine 1 is equipped with a settlement button 9 that accepts the player's settlement operation (return operation) to return (cash out) the credited tokens. Furthermore, such a settlement operation is detected by the settlement switch 9S described later. Therefore, the settlement button 9 and the settlement switch 9S constitute a settlement operation detection unit (means) capable of detecting the player's settlement operation. Note that the settlement button only needs to be able to detect the player's settlement operation, and its shape, arrangement, size, etc. can be changed as appropriate.

[1-1-5-5. Buttons for performance/effects]
As described above, the pachislo machine 1 is equipped with performance buttons 10a and 10b that receive performance operations from the player. Such performance operations are detected by detection switches (not shown) provided in conjunction with each performance button. Therefore, the performance buttons 10a and 10b and the detection switches constitute a performance operation detection unit (means) capable of detecting performance operations from the player. The performance buttons only need to be capable of detecting performance operations from the player, and their shape, arrangement, and size can be changed as appropriate. In this embodiment, two performance buttons 10a and 10b are provided, but it is also possible to configure the machine without either of them, or to provide only one of them. Furthermore, it is also possible to configure the machine with three or more performance buttons.

The main uses of the effect buttons are to change the effect pattern when executing specific effects (for example, the operation-linked effects described later) and to perform selection and confirmation operations in the user menu described later. Therefore, it is possible to configure the system to have effect buttons tailored to specific uses. For example, effect buttons 10a and 10b could be used for the former purpose, while the touch panel described above could be used for the latter. Furthermore, for the latter purpose, it is possible to configure the system to include a separate effect button, such as a jog dial or directional pad, capable of accepting selection and confirmation operations.

[1-1-6. Medal Dispensing Outlet]
As described above, the pachislo machine 1 is equipped with a medal payout port 11 that discharges medals dispensed (or returned) from inside the pachislo machine 1 to the outside. When a win occurs and medals are dispensed, the medal payout port 11 provides the medals dispensed from the hopper device 32 (described later) to the player, and can therefore be considered part of the means of providing benefits to the player. The shape, arrangement, and size of the medal payout port can be changed as appropriate. Furthermore, this configuration is not necessarily required when the pachislo machine 1 is configured as a medalless gaming machine (described later).

[1-1-7. Medal tray]
As described above, the pachislo machine 1 is equipped with a medal tray 12 for storing medals dispensed from the medal payout port 11. In other words, the medal tray 12 constitutes a storage unit (means) capable of storing the assigned game value. The shape, arrangement, and size of the medal tray can be changed as appropriate. Furthermore, this configuration is not necessarily required when the pachislo machine 1 is configured as a medalless game machine as described later.

[1-1-8. Lumbar Panel]
As described above, the pachislo machine 1 includes a waist panel 13, which consists of a decorative panel depicting machine information and a waist lamp for illuminating the decorative panel from the rear. The waist panel 13 basically serves to clearly indicate to the player what type of pachislo machine 1 it is, but it can also be configured as one of the means for executing effects, for example, by changing the lighting pattern of the waist lamp or by configuring the waist panel 13 itself as an image display device.

[1-1-9. Information display]
As described above, the pachislo machine 1 is equipped with an information display device 14 that displays information related to the game depending on its lighting pattern. In other words, the information display device 14 constitutes an information display unit (means) capable of displaying information related to the game.

The information display device 14 includes, for example, an insert lamp, a start lamp, a replay lamp, a bet count lamp, a credit lamp, a payout count lamp, an instruction monitor, a limit lamp, and the like.

The insert lamp indicates that medals can be inserted when lit. The start lamp indicates that the game can be started by operating the start lever 7 when lit. The replay lamp indicates that medals have been automatically inserted due to the replay function when lit. The bet lamp indicates the number of medals bet when lit. The credit lamp indicates the number of medals credited based on its lighting pattern. The payout lamp indicates the number of medals paid out (payout) according to the game result based on its lighting pattern.

Furthermore, the instruction monitor is composed of a notification lamp (stop operation display unit) and a section lamp (status display unit). The notification lamp displays the stop operation information by lighting up in a manner that uniquely corresponds to the stop operation information being notified when the player is notified of the stop operation information (for example, in AT state). The "manner that uniquely corresponds to the stop operation information being notified" means, for example, when notifying the push order (in this embodiment, this may be described as "batting order") "1st (performing the first stop operation on reel 3L)", the instruction monitor displays the number "1", when notifying the push order "2nd (performing the first stop operation on reel 3C)", the instruction monitor displays the number "2", and when notifying the push order "3rd (performing the first stop operation on reel 3R)", the instruction monitor displays the number "3". The notification lamp does not necessarily have to be provided separately from the credit lamp or payout lamp. For example, information about the stop operation may be displayed using either the credit lamp or the payout lamp.

Thus, in this embodiment, when information about a stop operation is notified to the player, the information is notified not only by the sub-side notification means (for example, the main performance display unit 21) controlled by the sub-control circuit 200 described later, but also by the instruction monitor, which is the main side notification means controlled by the main control circuit 100 described later. Note that the notification manner in the main side notification means and the notification manner in the sub-side notification means may be different from each other. That is, the main side notification means only needs to notify in a manner that uniquely corresponds to the information about the stop operation to be notified, and it is not necessarily required to directly notify the information about the stop operation. For example, when notifying the order "1st", even if the numerical value "1" is displayed on the instruction monitor, some players may not be able to identify the notification content. On the other hand, the sub-side notification means only needs to directly notify the information about the stop operation. For example, when notifying the order "1st", the main performance display unit 21 only needs to directly notify the instruction information for performing the first stop operation on the reel 3L.

Furthermore, the section lamp, when lit, indicates that the current state is within the advantageous section described below. For example, when transitioning from a non-advantageous section to an advantageous section (described below), the section lamp lights up at any time before gameplay in the advantageous section begins. When transitioning from the advantageous section to a non-advantageous section after its end, the lamp turns off at any time before gameplay in the non-advantageous section begins. However, the timing of the section lamp's illumination is not limited to these. For example, when transitioning from a non-advantageous section or an advantageous section's performance section (normal advantageous section) to the initial increase section (AT state) within the advantageous section (described below), the lamp may light up at any time before gameplay in the increase section begins. In other words, the section lamp may indicate that the player is in an advantageous section regardless of whether it is a performance section or an increase section, or it may indicate at least the period from the start of the first increase section until the end of the advantageous section including that section.

Furthermore, the limit lamp indicates, or is likely to be, that the limit processing described below has been performed, depending on its illumination pattern. For example, if the lamp lights up when limit processing is performed, it informs the player that a favorable state (e.g., AT state) has been forcibly terminated by the limit processing. Alternatively, if the lamp blinks when limit processing is imminent, it informs the player that there is a high probability that this favorable state will be forcibly terminated by the limit processing. In addition to these, other information regarding limit processing can be communicated as appropriate by providing triggers for lighting, blinking, or turning off the lamp.

[1-1-10. Performance display]
As described above, the pachislo machine 1 includes a main performance display unit 21 and a sub-performance display unit 22 that display performance images. The main performance display unit 21 and the sub-performance display unit 22 constitute a performance display unit (means) capable of performing performances. They are also configured as one of the performance execution means that can perform performances from a visual standpoint for the player.

The main performance display unit 21 includes a main display device 210 that performs performance displays via a performance display window UD1. The main display device 210 is configured as a display unit A that is replaceably mounted on an intermediate support plate G1 within the cabinet G. The display unit A is a so-called projection mapping device having an illumination unit B that emits illumination light for image display, and a screen device C that displays an image when illuminated by the illumination light from the illumination unit B. In this embodiment, configuring the main display device 210 in this way enables advanced and impactful performance displays, but the configuration of the main display device 210 is not limited to this. That is, it is sufficient to perform performances from a visual standpoint for the player; it can be configured as an image display device such as a liquid crystal display device or an organic EL display device, or a display device such as a 7-segment LED, or as a variable display device such as a sub-reel or a dot display device. Furthermore, from this perspective, its shape, arrangement, and size can also be changed as appropriate. Furthermore, if the pachislo machine 1 primarily focuses on providing entertainment through the resulting reel outcomes, for example, it can be configured without the main display unit 21 (the same applies to the sub-display unit 22).

The sub-display unit 22 includes a sub-display device 220. The sub-display device 220 is configured as a liquid crystal display device. The sub-display device 220, like the main display device 210, can also be configured as another image display device or display device, or as a variable display device or dot display device. Furthermore, its shape, arrangement, and size can be appropriately changed from this perspective. The main display unit 21, being a large screen, primarily displays effects closely related to the current game, such as button press order notifications, win notifications, or continuous effects. The sub-display unit 22, being a small screen, primarily displays effects less closely related to the current game, such as game history. Thus, the display content can be divided according to purpose. In this embodiment, two display units, the main display unit 21 and the sub-display unit 22, are provided. However, it is also possible to configure the system without either of these, or with only one of them. It is also possible to configure the system with three or more display units.

[1-1-11. Lamp]
As described above, the pachislo machine 1 is equipped with one or more lamps (lighting means) capable of performing effects through their light emission mode (including not only illumination, flashing, or extinguishing, but also their brightness and color if they are configured as full-color LEDs), such as the upper lamp 23 given as an example. Furthermore, such lighting means are configured as one of the performance execution means that can perform visual effects for the player. From this perspective, their number, shape, arrangement, and size can also be changed as appropriate.

Furthermore, other lamps included in the lamps and LEDs described later include, for example, the side lamps provided on both end faces of the upper door mechanism UD and the lower door mechanism DD, and the control panel lamps provided within each control panel. The latter, since they include a function to inform the player whether each control panel is operable or not, can be controlled to emit light in a single, unambiguous pattern without changing the light emission pattern according to the performance content when this function is activated.

[1-1-12. Speaker]
As described above, the pachislo machine 1 is equipped with speakers 35a and 35b that output sound effects, background music, and other audio. Speakers 35a and 35b constitute an audio output means capable of performing effects through audio output. They are also configured as one of the means of performing effects that can deliver auditory effects to the player. From this perspective, their number, shape, arrangement, and size can be changed as appropriate.

[1-1-13. Other stage equipment]
Furthermore, in pachislo machine 1, it is also possible to provide performance devices other than the various performance devices (performance execution means) described above. For example, it is possible to provide performance devices such as movable performance devices, so-called "mechanisms," vibration performance devices that perform performances through vibration, or air performance devices that perform performances by spraying air, and to perform performances using such devices. In other words, any performance device that can perform a performance that appeals to any of the player's five senses (sight, hearing, touch, taste, smell) (making it possible for the player to recognize that a performance is being performed) can be used. Therefore, in this embodiment, "performing a performance" means that, unless otherwise specified, a performance may be performed using one or more of the various performance devices (performance execution means) described above.

[1-2. Internal structure]
[1-2-1. Selector]
The selector 31 (not shown in Figure 2) is a flow path for the medals inserted from the medal slot 5 and is located on the rear side of the lower door mechanism DD. The selector 31 includes, for example, a medal sensor 31S (described later) and a sorting device.

The medal sensor 31S detects medals inserted through the medal slot 5 and determines whether the detected medal is a valid medal. If the medal sensor 31S determines that the detected medal is a valid medal and the machine is in a state where it can accept medals, the sorting device is driven to guide the medal towards the hopper device 32 (described later). In this case, the bet count or credit count is increased by 1. On the other hand, if the medal sensor 31S determines that the detected medal is not a valid medal, and the machine is not in a state where it can accept medals, the sorting device is driven to return the medal through the cancel chute to the medal payout port 11. A selector error occurs if an abnormality occurs in the medal detection by the medal sensor 31S. In this case, the error state is cleared after the cause of the abnormality (e.g., a medal jam) is resolved and a reset operation is performed.

In other words, the selector 31 constitutes a game medium detection unit (means) capable of detecting inserted game medium. The selector 31 also constitutes a determination means capable of determining whether the inserted game medium is appropriate or not. Furthermore, the selector 31 constitutes a sorting means that stores the inserted game medium internally if it is appropriate, and discharges it externally if it is not appropriate. The configuration, arrangement, and size of the selector 31 can be changed as appropriate. Also, if the pachislo machine 1 is configured as a medalless game machine as described later, this configuration is not necessarily essential.

[1-2-2. Hopper device]
The hopper device 32 is located in the lower space inside the cabinet G. The hopper device 32 includes, for example, a bucket section for storing medals that are inserted from the medal input port 5 and guided by the selector 31, a disc section located at the bottom of the bucket section which agitates the medals stored in the bucket section and guides them one by one to the discharge section, a discharge section which discharges the medals guided by the disc section one by one, and a count sensor which counts the medals discharged from the discharge section.

The bucket section is configured to store a certain number of medals. Medal exceeding this limit are guided through a guide passage on the top surface to the medal auxiliary storage compartment 33 (described later). If the medals stored in the bucket section become empty, a hopper empty error occurs. In this case, replenishing the medals and performing a reset operation will clear the error.

The disc section has multiple medal-shaped cutouts radiating from the center. The central axis rotates according to a drive signal, guiding medals that fit into the cutouts one by one to the discharge section. The rotation of the disc section also agitates the medals stored in the bucket section. If an abnormality occurs in the rotation of the disc section, a hopper jam error will occur. In this case, the error state will be cleared by resolving the cause of the abnormality (e.g., a medal jam) and then performing a reset operation.

The count sensor detects the medals dispensed from the dispensing unit and counts their number. For example, when dispensing one medal, the disc unit begins to rotate, and then, in response to the count sensor counting the dispensing of one medal, the disc unit stops rotating. In this way, the correct number of medals are dispensed.

In other words, the hopper device 32 constitutes a game medium dispensing unit (means) capable of dispensing game mediums. Furthermore, as mentioned above, it can also be considered part of the means for granting benefits to players. The configuration, arrangement, and size of the hopper device 32 can be changed as appropriate. Also, if the pachislo machine 1 is configured as a medalless game machine as described later, this configuration is not necessarily essential.

[1-2-3. Medal Auxiliary Storage]
The medal auxiliary storage compartment 33 is located in the lower space of the cabinet G. The medal auxiliary storage compartment 33 includes, for example, a storage section for storing medals guided from the bucket section of the hopper device 32, and a medal auxiliary storage compartment switch 33S located near the storage section for detecting the volume of medals stored in the storage section.

The storage compartment is configured to hold a certain number of medals. If the medal auxiliary storage compartment switch 33S determines that more than this certain number of medals have been stored, a medal auxiliary storage compartment error occurs. In this case, the error state is cleared when the number of medals stored in the compartment is reduced to at least below the certain number, and then a reset operation is performed.

In other words, the medal auxiliary storage compartment 33 constitutes a surplus game medium storage unit (means) capable of storing surplus game mediums. The configuration, arrangement, and size of the medal auxiliary storage compartment 33 can be changed as appropriate. Furthermore, this configuration is not necessarily required when the pachislo machine 1 is configured as a medalless game machine, as described later.

[1-2-4. Power supply]
The power supply unit 34 is located in the lower space inside the cabinet G. The power supply unit 34 includes, for example, a power supply board 34a and a power switch 34b, and supplies power to the pachislo machine 1 when the power switch 34b is turned on. The power supply unit 34 converts the AC voltage 100V power supplied from a power cable (not shown) into DC voltage power required for each part, similar to household electrical appliances, and supplies the converted power to each part. In other words, the power supply unit 34 constitutes a power supply unit (means) capable of supplying the necessary power to the gaming machine. The configuration, arrangement, and size of the power supply unit 34 can be changed as appropriate.

In this embodiment, the setting key-type switch 52 and reset switch 53, described later, are configured to be provided on the main control board 71 (more specifically, on the main control board case, described later). However, these switches can also be configured to be provided on the power supply unit 34.

[1-2-5. Circuit Board]
Pachislo machine 1 includes, for example, the following circuit boards as circuit boards necessary for various controls. Note that the following circuit boards are merely examples, and the machine may be configured to include different circuit boards, or it may be configured to omit circuit boards that are not necessarily essential.

[1-2-5-1. Main control board]
The main control board 71 is mounted on the rear side of the reel unit RU inside the cabinet G. The main control board 71 is a game control board that controls gameplay, and is housed in a transparent (or semi-transparent) resin main control board case (not shown) so that its status can be visually observed. The electrical configuration of the main control board 71 will be described later.

Furthermore, the specifications of the main control board 71 are subject to various constraints. While it is basically constructed with various electronic components mounted in DIP (dipstick) form, some or all of the electronic components may be mounted using SMT (surface mount technology). In this case, test points may be provided for operational verification using a tester or oscilloscope. Additionally, small electronic components not exceeding 6 square mm may be used for some or all of the electronic components. Furthermore, the main control board 71 may be constructed with multiple layers.

[1-2-5-2. Sub-control board]
The sub-control board 72 is mounted on the back side of the intermediate support plate G1 inside the cabinet G. The sub-control board 72 is a performance control board that controls the performance effects and is housed in a resin sub-control board case (not shown). The sub-control board case can be made of a resin case that is transparent (or semi-transparent), similar to the main control board case, or it can be made of another material that is opaque (or semi-opaque). The electrical configuration of the sub-control board 72 will be described later.

[1-2-5-3. Other circuit boards]
(Main relay board)
The main relay board 73 (not shown in Figure 2) is mounted at a specific location inside the cabinet G (for example, on the rear side of the lower door mechanism DD) and is an intermediate control board for relaying signals between the various devices connected to the main relay board 73 and the main control board 71, and between the main control board 71 and the sub-control board 72. Since the main relay board 73 is configured as a separate board from the main control board 71 for the convenience of control efficiency and wiring efficiency, if there are no particular problems, all the functions of the main relay board 73 can be assigned to the main control board 71, and the main relay board 73 can be omitted. Furthermore, from this perspective, the main relay board 73 may be further divided into multiple relay boards to improve control efficiency and wiring efficiency. In other words, multiple boards may be provided as the main relay board.

(Sub-relay board)
The sub-relay board 74 is mounted at a specific location within the cabinet G (for example, on the rear side of the lower door mechanism DD) and is an intermediate control board that relays signals between the various devices connected to the sub-relay board 74 and the sub-control board 72, and between the main control board 71 and the sub-control board 72. Since the sub-relay board 74 is configured as a separate board from the sub-control board 72 for the convenience of control efficiency and wiring efficiency, if there are no particular problems, all the functions of the sub-relay board 74 can be assigned to the sub-control board 72, and the sub-relay board 74 can be omitted. Furthermore, from this perspective, the sub-relay board 74 may be further divided into multiple relay boards to improve control efficiency and wiring efficiency. In other words, multiple boards may be provided as sub-relay boards.

(External centralized terminal board)
The external central terminal board 55 is installed in a specific location within the cabinet G (for example, at the back of the lower space) and outputs signals such as a medal insertion signal, a medal payout signal, external signals 1 to 4, and a security signal to the outside of the pachislo machine 1. The output start and end conditions for external signals 1 to 4 can be set as appropriate, making it possible to notify the outside of the transition of the internal state of the pachislo machine 1 (for example, bonus state or AT state) according to the gameplay. Since the external central terminal board 55 is usually connected to an external data display or hall computer, these devices can recognize not only the medal insertion and payout status and error occurrences in the pachislo machine 1, but also the transition of such internal states.

(Interface board for test machine)
The first interface board 301 for the test machine and the second interface board 302 for the test machine are both relay boards used to output various game-related signals to the test machine during the certification test (trial firing test) of the pachislo machine 1. (Note that these relay boards are not installed in the pachislo machine 1 as a commercially released product, and therefore the various electronic components necessary to connect to the first interface board 301 and the second interface board 302 for the test machine are not mounted on the main control board 71 for sale.) For example, test signals for controlling major game-related operations (e.g., internal lottery, reel stop control, etc.) are output via the first interface board 301 for the test machine, and test signals related to the push-button navigation determined by the main control board 71 are output via the second interface board 302 for the test machine.

[2. Electrical Configuration of a Pachislo Machine]
Next, the electrical configuration of the pachislo machine 1 will be explained with reference to Figure 3. Figure 3 is a block diagram showing the electrical configuration of the pachislo machine 1.

As described above, the pachislo machine 1 has a main control board 71, a sub-control board 72, a main relay board 73, and a sub-relay board 74. The main control board 71 and the main relay board 73, the main relay board 73 and the sub-relay board 74, and the sub-relay board 74 and the sub-control board 72 are electrically connected to each other. Furthermore, the main control board 71 and the sub-control board 72 are electrically connected via the main relay board 73 and the sub-relay board 74, enabling one-way serial communication from the main control board 71 to the sub-control board 72.

The main control board 71 is equipped with a main control circuit 100, which functions as a game control unit that performs control related to gameplay. The main control circuit 100 is composed of, for example, a main CPU 101, a main ROM 102, a main RAM 103, a clock pulse generation circuit (not shown), a random number circuit (not shown), and the like. The main ROM 102 stores various control programs executed by the main CPU 101, various data tables, and data for sending various control commands to the sub-control circuit 200. The main RAM 103 is provided with a storage area for storing various data such as internal winning combinations determined by the execution of the control programs. The clock pulse generation circuit generates a clock pulse signal for the operation of the main CPU 101. The random number circuit generates random numbers within a predetermined range (for example, 0 to 65535 or 0 to 255). The main CPU 101 executes various control programs based on the generated clock pulse signal. It also extracts one or more values as random values from the generated random numbers as needed. In this way, control is performed over the entire game operation.

The sub-control board 72 is equipped with a sub-control circuit 200, which functions as a performance control unit that performs performance-related control. The sub-control circuit 200 is composed of, for example, a sub-CPU 201 and a sub-RAM 203. A ROM cartridge board 202 is also connected to the sub-control board 72. The ROM cartridge board 202 stores various control programs executed by the sub-CPU 201, various data tables, and various performance data (for example, video data and drive data related to the main display device 210, video data related to the sub-display device 220, lamp data related to the lamp/LED group, sound data related to the speaker group, etc.). The sub-RAM 203 is provided with a storage area for registering performance content and various performance data determined by the execution of the control program, and a storage area for storing data related to various control commands transmitted from the main control board 71. Furthermore, the random numbers used for the visual effects may be generated and extracted within the sub-CPU 201 from a predetermined range of random numbers (e.g., 0 to 32767), or they may be generated and extracted by providing a random number circuit similar to that of the main control circuit 100. Alternatively, the sub-ROM may be included in the sub-control circuit 200 instead of the ROM cartridge board 202, and various control programs may be stored in the sub-ROM. Alternatively, the ROM cartridge board 202 may store various visual effect data, while the sub-ROM in the sub-control circuit 200 stores various control programs and data tables. The sub-control circuit 200 may also include a dedicated image processor such as a GPU (also known as a "VDP"), and be configured to generate (edit) the images displayed on the main display device 210 and sub-display device 220.

The main control board 71 is electrically connected to the stepping motors 51L, 51C, 51R, the setting key-type switch 52, the reset switch 53, the payout ratio monitor device 54, the external centralized terminal board 55, the hopper device 32, the medal auxiliary storage switch 33S, and the power supply device 34. Furthermore, the main control board 71 is electrically connected to the door opening/closing monitoring switch 56, the medal sensor 31S, the bet switch 6S, the start switch 7S, the stop switch 8S, the settlement switch 9S, and the information display device 14 via the main relay board 73. If the first interface board 301 and the second interface board 302 for the test machine are installed, they are electrically connected to the main control board 71, for example, via the main relay board 73.

Furthermore, the external centralized terminal board 55, hopper device 32, medal auxiliary storage switch 33S, power supply unit 34, medal sensor 31S, bet switch 6S, start switch 7S, stop switch 8S, settlement switch 9S, information display device 14, first interface board 301 for the test machine, and second interface board 302 for the test machine have already been explained, so their explanation here will be omitted.

Each stepping motor 51L, 51C, and 51R is connected to each reel 3L, 3C, and 3R via gears with predetermined reduction ratios, and their drive rotates and stops each reel 3L, 3C, and 3R. Since each reel 3L, 3C, and 3R rotates by a certain angle each time a pulse is output to each stepping motor 51L, 51C, and 51R, the main CPU 101 counts the number of pulses output to each stepping motor 51L, 51C, and 51R and manages the position of the symbols on each reel 3L, 3C, and 3R based on this count. Each reel 3L, 3C, and 3R is also provided with a reel index (not shown) to define an initial position for this management, and an index sensor (not shown) to detect the position of the reel index.

The setting key-type switch 52 is used to change the setting value of the pachislo machine 1 (for example, one of six settings, from setting 1 to setting 6) (setting change), or to check the setting of the pachislo machine 1 (setting check). Here, the setting value indicates the degree of advantage to the player in relation to the game. Generally, the lower the setting value (for example, the closer to setting 1), the lower the relative advantage to the player, and the higher the setting value (for example, the closer to setting 6), the higher the relative advantage to the player. The setting key-type switch 52 is turned ON when the administrator of the amusement parlor inserts a setting key (not shown) into the keyhole and turns it to the left from the initial position, and turns OFF when it is returned to the initial position from the leftward position. Furthermore, when the power to the pachislo machine 1 is off, setting the setting key-type switch 52 to the ON position and then turning the power on will enable setting changes. If the setting key-type switch 52 is turned ON while the power to the pachislo machine 1 is already on, setting confirmation will be possible.

The reset switch 53 is capable of detecting reset operations performed by the administrator of the gaming establishment. A reset operation is performed to clear various error states. Furthermore, the reset switch 53 is capable of detecting setting value determination operations performed by the administrator of the gaming establishment when setting changes are possible. When the reset switch 53 is operated while setting changes are possible, the setting value increases by 1 each time it is operated (returning to setting 1 after reaching setting 6). In this way, setting value determination operations can be performed. The determined setting value is then finalized when the start lever 7 is operated once. That is, the start switch 7S is capable of detecting setting value finalization operations performed by the administrator of the gaming establishment. Thus, when changing settings, the setting key-type switch 52 must be turned ON, the reset switch 53 must be operated to select a setting value, the start lever 7 must be operated to finalize the selected setting value, and then the setting key-type switch 52 must be turned OFF. Note that this is just one example of a setting change operation, and the system can be configured to allow setting changes through other operations. Furthermore, when changing or checking settings, it is sufficient to display the current setting value using, for example, the credit lamp or payout lamp mentioned above.

The payout ratio monitor device 54 is, for example, composed of a 4-digit 7-segment LED and is installed inside the main control board case. The payout ratio monitor device 54 sequentially displays various percentage information related to the game, which has been compiled and calculated by the main CPU 101. This percentage information is used by the manager of the amusement parlor to check whether the pachislo machine 1 has been illegally modified, etc. The payout ratio monitor device 54 may be mounted on the main control board 71, or on another board connected to the main control board 71 (for example, a percentage display board). It may also be installed in other locations within the cabinet G. For example, it may be installed on the main control board case. Furthermore, a management switch for starting the display on the payout ratio monitor device 54 or switching its contents may be installed inside the cabinet G, and when this is operated, the various percentage information described above may be displayed. Also, assuming the use of such a management switch, for example, the information display device 14 may be used in conjunction with the payout ratio monitor device 54. Furthermore, to allow confirmation that the 4-digit 7-segment LEDs of the performance ratio monitor device 54 are functioning correctly, immediately after power-on or after a predetermined time has elapsed since power-on (for example, about 10 seconds, which is a buffer time to account for the time required to start up the main control circuit 100 and the sub-control circuit 200), it is desirable to configure the device to light up (or blink) for a predetermined period of time in a test pattern such as "8.8." (a pattern in which all segment and decimal LEDs light up).

In the payout ratio monitor device 54, for example, the upper two digits display the type of payout information, and the lower two digits display the value (%) representing that payout information. Here, the various types of payout information displayed in the payout ratio monitor device 54 include, for example, cumulative payout ratio information for a specific section, continuous payout ratio information and payout ratio information for the most recent 6000 games, and cumulative continuous payout ratio information and payout ratio information.

The specific section ratio information refers to the percentage of games played within the target number of games (for example, 175,000 games for "cumulative" games, or 6,000 games for "most recent 6,000 games" games; the same applies hereinafter) where information about advantageous stopping operations for the player was provided (for example, during AT mode) (or simply the number of games played within an advantageous section). The continuous bonus ratio information refers to the percentage of medals paid out during the operation of a Type 1 Special Bonus (RB) within the target number of games played (including during the operation of a Type 1 Special Bonus (RB) when the continuous bonus device (BB) related to the Type 1 Special Bonus is in operation). Furthermore, the bonus payout ratio information indicates the ratio of the number of medals dispensed during the operation of Type 1 Special Bonus (RB), Type 2 Special Bonus (CB), and Regular Bonus (SB) within the game period of the target number of games. Here, "during the operation of Type 1 Special Bonus (RB)" includes the operation of Type 1 Special Bonus (RB) when the continuous bonus payout device (BB) related to Type 1 Special Bonus is in operation, and "during the operation of Type 2 Special Bonus (CB)" includes the operation of Type 2 Special Bonus (CB) when the continuous bonus payout device (MB) related to Type 2 Special Bonus is in operation.

Furthermore, game sections in which information regarding advantageous stopping operations for the player is provided (e.g., AT state) can be treated as periods of operation of the special feature or continuous special feature operation device, and these can be included in the aggregation and calculation of their respective percentage information. In other words, the special feature ratio monitor device 54 only needs to appropriately display the necessary percentage information, and the types of percentage information that can be displayed are not limited to these. Also, for example, when displaying continuous special feature percentage information in a machine without a Type 1 Special Feature (RB), or when displaying specific section percentage information in a machine without an advantageous section function (AT function), in machines where no corresponding numerical information (corresponding information) exists, it is desirable that, when displaying the item, the last two digits of the four-digit seven-segment LED displaying the numerical information (percentage information) should be illuminated with an identification display for non-corresponding information, such as "- -", so that the user can immediately recognize that the machine does not have corresponding information.

The door opening/closing monitoring switch 56 is, for example, installed on the opening/closing side (right side) of the lower door mechanism DD. It may also be configured to be installed on the rear side of the lower door mechanism DD, or on the cabinet G side. Furthermore, a similar door opening/closing monitoring switch may be installed on the upper door mechanism UD. The door opening/closing monitoring switch 56 monitors the opening and closing of the lower door mechanism DD by turning ON when the lower door mechanism DD is open and OFF when it is closed. Note that a door opening error occurs when the door opening/closing monitoring switch 56 is ON. In this case, closing the lower door mechanism DD clears the error.

The sub-control board 72 is electrically connected to the ROM cartridge board 202, the main display device 210, and the sub-display device 220. Furthermore, the sub-control board 72 is electrically connected to the 24-hour door monitoring unit 61, the performance buttons 10a and 10b, the lamps and LEDs such as the upper lamp 23, and the speakers 35a and 35b via the sub-relay board 74.

The ROM cartridge board 202, main display device 210, sub-display device 220, effect buttons, lamps/LEDs, and speaker group have already been explained, so their explanations will be omitted here.

The 24-hour door monitoring unit 61, like the door opening/closing monitoring switch 56, is installed, for example, on the opening/closing side (right side) of the lower door mechanism DD. While it shares the same function as the door opening/closing monitoring switch 56 in that it monitors the opening and closing of the lower door mechanism DD, this monitoring can also be performed on the sub-control circuit 200 side, allowing for the storage of the lower door mechanism DD's opening and closing history for a certain period. This opening and closing history can be checked from the hall menu described later. Therefore, for example, if there is an opening history outside of business hours after the amusement parlor manager has left, or if there is an opening/closing history of the door being left open for a long period during business hours, it becomes possible to recognize that there is a high probability of fraudulent activity.

[3. Functional Flow of a Pachislo Machine]
Next, we will explain the functional flow of the pachislo machine 1 with reference to Figure 4. Figure 4 is a diagram illustrating the functional flow of the pachislo machine 1.

When a player inserts tokens into the pachislo machine 1 (a bet operation is performed) and the start lever 7 is operated (a start operation is performed), a random number (in this embodiment, this may be described as an "internal random number") is drawn from a predetermined range of random numbers (for example, 0 to 65535).

The internal lottery means (the main CPU 101 which performs the internal lottery processing described later) performs a lottery based on the extracted random values to determine the internal winning combination. The determination of the internal winning combination predetermines the combinations of symbols that are permitted to be displayed on the active lines. The combinations of symbols are categorized into those related to "winning," which grants the player benefits such as medal payouts, replay activation, and bonus activation, and those related to other so-called "misses." The combinations related to medal payouts are called "minor wins," those related to replay activation are called "replay wins," and those related to bonus activation (bonus state) are called "bonus wins." Furthermore, the combinations that can be internally won (i.e., the combinations of symbols permitted to be formed) are sometimes simply referred to as "wins." Furthermore, the internal winning combination may be referred to as the "winning combination," "pre-determined result," or "derivative acceptable condition." Similarly, the internal drawing means may be referred to as the "combination determination means," "winning combination determination means," "pre-determined means," or "derivative acceptable condition determination means."

Furthermore, when the start lever 7 is operated (the start operation is performed), multiple reels rotate. Subsequently, when the player operates the stop buttons (each stop button 8L, 8C, 8R) corresponding to each reel (each reel 3L, 3C, 3R) (the stop operation is performed), the reel stop control means (the main CPU 101, which performs the reel stop control processing described later) controls the rotation of the corresponding reel based on the internal winning combination and the timing (including the order in which the stop buttons were pressed). Note that the operating means for performing the start operation is not limited to a lever-shaped means such as the start lever 7; any operating means is acceptable as long as the player can perform the start operation. Similarly, the operating means for performing the stop operation is not limited to a button-shaped means such as the each stop button 8L, 8C, 8R; any operating means is acceptable as long as the player can perform the stop operation.

In pachislo machine 1, control is basically performed to stop the rotation of the corresponding reel within a specified time (190 msec) from the moment the stop button is pressed. In this embodiment, the number of symbols that move with the rotation of the reels within this specified time is called the "number of sliding symbols." In this embodiment, when the specified period is 190 msec, the maximum number of sliding symbols (maximum number of sliding symbols) is set to four symbols.

The reel stop control means, when an internal winning combination that permits the display of a winning symbol combination has been determined, normally stops the rotation of the reels within a specified time of 190 msec (equivalent to 4 symbol frames) so that the symbol combination is displayed on the active line as much as possible. Furthermore, the reel stop control means also uses the specified time to stop the rotation of the reels so that symbol combinations not permitted to be displayed by the internal winning combination are not displayed on the active line. The symbols displayed when the reels stop rotating are sometimes referred to as the "stop display" or "display result." The process of displaying symbols when the reels stop rotating is sometimes referred to as the "derivation of the stop display" or "derivation of the display result."

Furthermore, the reel stop control means may be configured to automatically stop each reel after a predetermined automatic stop time has elapsed since the reels began rotating, even if the player has not performed a stop operation. In this case, since the reels will stop without any stop operation by the player, it is desirable to stop the rotation of the reels so that, even if any internal winning combination has been determined, none of the winning symbol combinations are displayed along the valid lines.

In this way, once the rotation of all the reels has stopped, the prize determination means (the main CPU 101 which performs the prize activation determination process described later) determines whether the combination of symbols displayed on the active line is a prize-winning combination (or other predetermined combination). That is, it determines whether a prize-winning combination (or other predetermined combination) has been achieved. If the prize determination means determines that the displayed combination of symbols is a prize-winning combination (or other predetermined combination) (i.e., a prize-winning combination (or other predetermined combination) has been achieved), the player is given a bonus such as a payout of medals, or various controls are performed as a result. In pachislo machine 1, as an example, the above sequence of events constitutes one game (unit game).

Furthermore, the prize-winning determination means may simply determine whether the combination of symbols displayed on the active line corresponds to one of a predetermined set of symbol combinations, or it may determine whether it corresponds to a symbol combination related to an internal winning combination determined by the internal lottery means. In other words, in the former case, it may determine whether the combination of symbols is related to a prize, independently of the internal winning combination. In this case, as long as the reel stop control means appropriately controls the stopping, the occurrence of erroneous wins can be sufficiently ensured, thus reducing the control burden related to erroneous win detection. On the other hand, in the latter case, by also determining whether the combination of symbols related to a prize is a combination of symbols that was permitted to win, it becomes possible to detect erroneous wins that occur due to reel malfunctions, etc., thereby improving security.

Furthermore, in pachislot machines, within the aforementioned sequence of gameplay operations, various effects are performed using display devices (e.g., main display device 210 and sub-display device 220), various lamps (e.g., upper lamp 23), speakers (e.g., speakers 35a, 35b), or combinations thereof. In other words, these are means for executing the effects. The content of the effects executed by these means may be determined by the main control circuit 100 (main side) or by the sub-control circuit 200 (sub side). That is, either of these can serve as means for determining the content of the effects.

For example, when the start lever 7 is operated (the start operation is performed), a random number for the performance is extracted separately from the random number for the internal lottery. Once the random number for the performance is extracted, the performance content determination means determines which performance to execute from among several types of performance content associated with the internal winning combination, either by lottery (or according to predetermined determination conditions).

Next, once the performance content is determined by the performance content determination means, the performance execution means executes the corresponding performance in conjunction with various triggers, such as when the reels start spinning, when each reel stops spinning, and when determining whether a win has occurred. In this way, in pachislot machine 1, for example, by executing performance content associated with the internal winning combination, the player is given the opportunity to learn about or predict the determined internal winning combination (which can also be described as the combination of symbols to aim for or the order in which to press the buttons), thereby increasing the player's interest.

[4. Basic specifications regarding the gameplay of pachislo machines]
Next, we will explain the basic specifications regarding the gameplay of pachislo machine 1.

[4-1. Pattern Placement]
As described above, the pachislo machine 1 is designed so that the game is played by displaying and stopping multiple symbols. Therefore, the main control circuit 100 needs to be configured to be able to determine which symbols are located in which positions on each reel 3L, 3C, and 3R. For this reason, the main ROM 102 stores data to identify the type of symbol at each symbol position on each reel 3L, 3C, and 3R. As long as this objective is achieved, various data configurations can be adopted, but in this embodiment, as one example, the symbol arrangement table (see Figure 9) described later is used.

The symbol placement table defines symbol position data (e.g., "0" to "19") indicating the position of each symbol in the rotation direction of each reel (3L, 3C, 3R). Furthermore, data (e.g., symbol code) is associated with each symbol position data to identify the type of symbol. The symbol placement table also defines "0" as the position of the symbol located in the middle section of each reel within the frame of the main display window 4 when the reel index is detected. The number of symbols in each column, the number of symbol types, and the maximum number of sliding symbols can be changed as needed.

[4-2. Pattern Combinations]
As described above, the pachislo machine 1 is designed so that the combination of displayed symbols affects the game result. In other words, the pachislo machine 1 can grant various benefits, transition from the current state to a relatively advantageous state, or transition from the current state to a relatively disadvantageous state, depending on the combination of displayed symbols. Therefore, the main control circuit 100 needs to be configured to be able to grasp such combinations of symbols. For this reason, the main ROM 102 contains data for identifying such combinations of symbols. As long as this objective is achieved, various data configurations can be adopted, but in this embodiment, as one example, the symbol combination table described later (see Figures 11 to 14) is used.

The symbol combination table contains data (e.g., "display symbols" or "winning activation flags") that indicate the types of predetermined symbol combinations that can be displayed on the active lines. The symbols that make up each symbol combination can be identified, for example, using the symbol codes mentioned above. Furthermore, data indicating the type of bonus or reward (e.g., "payout, etc.") is associated with each symbol combination. The symbol combination table basically has a data structure that corresponds to the winning flag storage area, winning activation flag storage area, and symbol code storage area (see Figure 17) described later. The number of symbol combination types and the content of the bonuses can be changed as appropriate.

[4-3. Internal Winning Role]
As described above, the pachislo machine 1 is designed so that the combination of symbols that is permitted to be displayed (determined in advance) affects the game result. In other words, the pachislo machine 1 is capable of determining the internal winning combination (i.e., the type of symbol combination that can be displayed (or the type of prize that can be awarded)) in advance of the player's stop operation. Therefore, the main control circuit 100 needs to be configured to be able to grasp such internal winning combinations. For this reason, the main ROM 102 contains data for identifying such internal winning combinations. As long as this objective is achieved, various data configurations can be adopted, but in this embodiment, as one example, the internal lottery table (see Figure 10) described later is used.

The internal lottery table contains data indicating the types of predetermined internal winning combinations (e.g., "No." or "Winning Number") and a lottery value that determines each internal winning combination in each game state. Note that the lottery value may vary depending on the set settings. Furthermore, each internal winning combination is associated with the types of symbol combinations that are permitted to be displayed (corresponding to) it. In pachislo machine 1, it is possible to associate multiple symbol combinations with a single internal winning combination, and when such an internal winning combination is determined, which symbol combination is displayed is determined by the stop control.

Here, for example, in the internal lottery process described later in this embodiment (see Figure 26; more specifically, the internal winning combination determination process in S64), first, random values extracted from a predetermined range of numbers (for example, 0 to 65535) by a random number circuit are sequentially added and updated with lottery values defined for each internal winning combination. Next, a determination is made as to whether the lottery result (lottery value + random value) exceeds 65535 (whether the lottery result has overflowed). Then, for a predetermined internal winning combination, if the result of this determination exceeds 65535, that internal winning combination is declared the winner (the internal winning combination is determined). However, if none of the internal winning combinations exceed 65535 after this determination is made for all of them, the internal winning combination for this game will be a "miss". This is merely one example of an internal lottery process. As long as an appropriate lottery is performed according to the lottery value (probability of winning), various methods can be employed for the lottery process. For example, the extracted random values could be sequentially subtracted and updated using lottery values defined for each internal winning combination. Then, the internal winning combination could be determined by determining whether the subtraction result (lottery result) falls below zero (whether the lottery result underflowed).

Thus, in the internal lottery table, the higher the numerical value of the defined lottery value for an internal winning combination, the higher the probability of it being determined (winning probability). The winning probability for each internal winning combination can be expressed as "the defined lottery value for each winning number / the total number of possible random values that can be extracted (random denominator: 65536)".

[4-4. Stop Control]
As described above, in pachislo machine 1, the game result is affected by which combination of symbols is ultimately displayed by the player's stopping operation from among the combinations of symbols permitted to be displayed based on the determination of the internal winning combination. In other words, pachislo machine 1 is capable of controlling (determining) the type of combination of symbols that is ultimately displayed not only by the type of internal winning combination that has been determined, but also by the timing and order of the player's stopping operation (also referred to as "stopping operation manner" or "stopping operation procedure"). Therefore, the main control circuit 100 needs to be configured to understand how to perform stopping control for each internal winning combination according to the player's stopping operation manner. For this reason, the main ROM 102 contains data for specifying such stopping control manners. As long as this objective is achieved, various data configurations can be adopted, but in this embodiment, as an example, a stopping table and a pull-in priority table (not shown) are used.

The stop table defines data indicating the amount of movement of each symbol (e.g., "number of sliding pieces") for each symbol position data of reels 3L, 3C, and 3R. For example, suppose a predetermined stop table is selected in a game where a predetermined internal winning combination has been determined. Next, suppose a stop operation is performed on reel 3L while it is spinning. Suppose the starting stop position (the symbol position data in the middle section of reel 3L at the time of the stop operation) is "0". Then, suppose the number of sliding pieces defined for symbol position data "0" in the predetermined stop table is "4". In this case, the main control circuit 100 controls reel 3L to stop at the symbol position that has moved 4 symbol pieces (the position of symbol position data "4") (the planned stop position becomes "4"). Thus, the stop table defines data (number of sliding pieces) that allows for the direct determination of the stopping position. Note that this data configuration is merely one example. Furthermore, performing stop control using such a stop table is generally referred to as "table control".

The reel pull-in priority table contains data (e.g., "pull-in priority") indicating which symbol combination should be displayed (pull-in) first when multiple symbol combinations are permitted to be displayed. For example, suppose a predetermined reel pull-in priority table is selected in a game where a predetermined internal winning combination has been determined. Here, the predetermined internal winning combination permits the display of symbol combination A and symbol combination B, and the predetermined reel pull-in priority table is set so that symbol combination B is displayed preferentially over symbol combination A. Next, suppose a stop operation is performed on the spinning reel 3L. At this time, suppose the stop start position was "0".

Then, the main control circuit 100 searches for each symbol position within the maximum number of sliding frames (for example, "4"), including the stop start position, to see if there are symbols that make up symbol combination A and symbols that make up symbol combination B. If neither symbol exists, the stopping position is determined according to a predetermined rule (for example, stopping at a closer position, stopping at a farther position, etc.). If only the symbols that make up symbol combination A exist, the stopping position is determined to be at the position corresponding to that symbol. If only the symbols that make up symbol combination B exist, the stopping position is determined to be at the position corresponding to that symbol. If both symbols exist, since symbol combination B is given priority over symbol combination A, the stopping position is determined to be at the position corresponding to the symbols that make up symbol combination B. Note that the reel pull-in priority may be stored for all symbol positions while the target reel is rotating, according to the selected reel pull-in priority table, or it may be stored for each symbol position within the maximum number of sliding frames, including the stop start position, when a stop operation is performed on the target reel. Also, this data configuration is merely an example. Furthermore, using such a priority table for stopping trains is generally referred to as "control control."

In this embodiment, the system can be configured to perform stop control solely through "table control," or solely through "control control." Alternatively, it can be configured to first tentatively determine the stopping position through "table control," then search for a more appropriate stopping position through "control control," and, depending on the search results, allow for a change in the stopping position.

Thus, in pachislo machine 1, the final combination of symbols displayed on the winning lines is determined based on, for example, the following three factors:

The first element is the determined internal winning combination (the result of the internal lottery process). For example, if the result of the internal lottery process is "miss," then no combination of symbols related to replays, minor wins, or bonus wins will ultimately be displayed on the active payline. Note that "miss" can be considered either one of the internal winning combinations, or a lottery result in which no internal winning combination was determined.

The second element is the timing of the player's stop operation (the position of the symbols when the player operates any of the stop buttons). For example, in this embodiment, since the maximum number of sliding symbols is set to four, even if the internal lottery process results in a win in any internal winning combination, if the symbols constituting the permitted symbol combination are positioned beyond four symbols on the active line (or each active line if there are multiple lines), the symbol combination may not be displayed depending on the timing of the player's stop operation. This is known as a "missed win."

The third element is the player's button press order (the order in which the player operates the stop buttons). For example, in this embodiment, an internal winning combination may be determined by associating multiple symbol combinations. In this case, the final combination of symbols displayed on the active payline may vary depending on the player's button press order. Such internal winning combinations are called "button press order combinations," and if they are replay combinations, they may be called "button press order replays," and if they are minor combinations, they may be called "button press order minor combinations."

[4-5. Game Status]
In pachislo machine 1, various game states can be set up to vary the player's advantage or to create a desired gameplay experience. An example of such a game state is described below.

[4-5-1. Bonus State]
In pachislo machine 1, when a bonus role is won and the combination of symbols related to that bonus role is displayed on an active payline, it is possible to transition to a bonus state (activate the bonus state). It is also possible to configure the machine so that no such bonus state is provided. Furthermore, by providing multiple types of bonus roles, it is possible to configure the machine so that multiple bonus states are provided. When a bonus role is won, a state occurs in which that bonus role is carried over as an internal winning role (carryover state) for multiple games until the combination of symbols related to that bonus role is displayed on an active payline. Such a bonus role is sometimes called a "carryover role". Also, such a carryover state is sometimes called "(bonus) flag interval" or "(bonus) internal in progress".

The bonus state is a state in which the manner in which small wins are drawn (including the probability of winning, the content of those wins, and the manner of stop control, etc.; the same applies hereinafter) can be altered compared to the state in which the bonus state is not active (non-bonus state). (Since it is also a state in which the manner in which replay wins are drawn can be altered, the bonus state can also be considered as a form of the RT state described later.) Therefore, if such a drawing manner is relatively advantageous to the player, the bonus state is a more advantageous game state than the non-bonus state. On the other hand, if such a drawing manner is relatively disadvantageous to the player, the bonus state is a less advantageous game state than the non-bonus state.

Examples of bonus features include the first-type special feature (RB), the continuous feature activation device related to the first-type special feature (BB), the second-type special feature (CB) (however, it is not a carryover feature), the continuous feature activation device related to the second-type special feature (MB), and the regular feature (SB) (however, it is not a carryover feature). Furthermore, for example, the bonus states corresponding to each bonus feature are configured as follows: The RB state is configured as a game state that ends when a predetermined number of winning combinations (for example, an upper limit of 8) or a predetermined number of games (for example, an upper limit of 12) have been played. The BB state is configured as a game state that ends when a predetermined number of medals have been paid out (for example, an upper limit of 285).

The CB state is configured as a game state that ends after one game is played. The MB state is configured as a game state that ends when a predetermined payout amount (for example, an upper limit of 153 coins) is exceeded, or when an RB or SB is won during the MB state. The SB state is configured as a game state that ends after one game is played.

Furthermore, the activation conditions for the bonus state are not limited to the display of a bonus symbol combination on an active payline. For example, while the continuous bonus device (BB) for the first type of special bonus is in operation, the system can be configured to automatically activate the first type of special bonus (RB) at the start of operation of the continuous bonus device (BB) for the first type of special bonus, at the start of gameplay when the first type of special bonus is not in operation, or at the end of operation of the first type of special bonus. In other words, it is possible to control the system so that the RB is always in operation while the BB is in operation, without specifying a symbol combination for the RB. Here, the RB during BB operation is sometimes referred to as "JAC," and this specification in which the RB is automatically activated while the BB is in operation is sometimes referred to as "Auto JAC." Also, while the BB is in operation, it is possible to control the system so that the RB is in operation when a specified symbol combination for the RB is displayed on an active payline. This specification in which the RB is activated based on the display of a corresponding symbol combination is sometimes referred to as "Manual JAC." Furthermore, the relationship between the continuous activation device (MB) for the Type 2 special feature and the Type 2 special feature (CB) is similar. That is, it is possible to control the system so that the CB is always in operation while the MB is operating, without specifying the combination of symbols related to the CB. Alternatively, during MB operation, the system can be controlled so that the CB is in operation when a specified combination of symbols related to the CB is displayed on the active line.

[4-5-2. RT State]
In pachislo machine 1, it is possible to transition to the RT state (activate the RT state) when predetermined transition conditions are met. It is also possible to configure the machine so that no such RT state is provided. Furthermore, it is possible to configure the machine so that multiple RT states are provided. The RT state is a state in which the lottery pattern for replay roles can be changed compared to the state in which the RT state is not activated (non-RT state). Therefore, if such a lottery pattern is relatively advantageous to the player, the RT state becomes a more advantageous game state than the non-RT state. On the other hand, if such a lottery pattern is relatively disadvantageous to the player, the RT state becomes a less advantageous game state than the non-RT state. The same applies to the relationships between multiple RT states when multiple RT states are provided. In this case, an RT state in which the draw pattern for the replay symbol (especially the probability of winning) is relatively favorable to the player is sometimes referred to as a "high RT state" or "high probability replay state," while an RT state in which the draw pattern for the replay symbol (especially the probability of winning) is relatively unfavorable to the player is sometimes referred to as a "low RT state" or "low probability replay state."

The RT state can be transitioned to, for example, by fulfilling any of the following transition conditions. The same applies to transitions between multiple RT states if multiple RT states are provided.
(1) When a win occurs in RB, BB, or MB; (2) When a combination of symbols related to RB, BB, or MB is displayed; (3) When the RB state, BB state, or MB state ends; (4) When a specific combination of symbols is displayed when a win occurs in RB, BB, or MB (not carried over) and the player is not in the RB state, BB state, or MB state; (5) When a predetermined number of games have been played after the conditions for transition in (3) or (4) have been met.

[4-5-3. AT status]
In pachislo machine 1, it is possible to transition to the AT state (activate the AT state) when predetermined transition conditions are met. It is also possible to configure the machine so that there is no such AT state. Furthermore, it is also possible to configure the machine so that there are multiple AT states. The AT state is a game state in which, for example, when the player wins the aforementioned button-press combination, information on advantageous stopping operations is notified to the player, making it a more advantageous state than the state in which the AT state is not activated (non-AT state).

Furthermore, when multiple AT states are provided, the degree of advantage for the player can be varied by differentiating the game duration of each AT state (including the likelihood of extension if such extension is possible), the types of notifiable roles for which stop operation information is reported, and the probability of stop operation information being reported for each state. Also, the transition and termination conditions for AT states can be set appropriately according to the gameplay (excluding termination due to the execution of the limit processing described later). In addition, AT states may be treated similarly to the bonus states described above, in which case they may be referred to as "pseudo-bonus states," etc.

Furthermore, the duration of the AT state may be managed by the number of games (number of plays), as long as the period is appropriately managed (game count management), or by the number of sets, with a predetermined number of games considered as one set (set number management). It may also be managed by the number of payouts or net increase (difference in tokens) during the AT state (payout management, difference in tokens management). It may also be managed by the number of times notifications affecting token payouts during the AT state (for example, push-order navigation during push-order small wins) are given (navigation count management). The same applies when the AT state is extended. Additionally, the duration of the game granted when transitioning to the AT state and the duration of the game granted when the AT state is extended may be managed using different management methods. Furthermore, when multiple AT states are provided, they may be managed using the same management method or using different management methods.

[4-5-4. ART State]
In pachislo machine 1, when predetermined transition conditions are met, it is possible to transition to an ART state, which is a combination of the high RT state and the AT state described above (activating the ART state). In other words, the ART state means the AT state that is performed in the high RT state. Therefore, although it differs from the AT state in that at least a low RT state and a high RT state are provided as RT states, and control is performed to transition to the high RT state (or to avoid transitioning to the low RT state), the basic control is the same as the AT state (it can also be said that it is synonymous with the AT state if it transitions to the high RT state (or avoids transitioning to the low RT state) as a result of notifying the player of information on stopping operations that are advantageous to the player). When the transition conditions for the ART state are met, it may first transition to the AT state and then to the high RT state to transition to the ART state, or it may transition to the ART state by simultaneously (or nearly simultaneously) transitioning to the high RT state and the AT state.

[4-5-5. Other game conditions]
Furthermore, in pachislo machine 1, it is also possible to provide game states other than the various game states described above. For example, the various modes during the advantageous section described later (see Figures 5 and 6) are also states in which the player plays the game, and since they can change the degree of advantage in whether or not to transition to the AT state as a pseudo-bonus state, they can be considered as game states. Also, from a similar perspective, for example, game states can be provided that can change the degree of advantage in whether or not to transition to a bonus state. For example, when a bonus role has been won (carried over), it is possible to configure the machine so that the degree of advantage for the player can be changed by providing a game state in which the combination of symbols related to the bonus role is more likely to be displayed by stop control, and a game state in which the combination of symbols related to the bonus role is relatively less likely to be displayed. Furthermore, for example, the game can be configured to vary the player's advantage by providing two game states: one in which a bonus role is won with a predetermined probability (making it easier to win), and another in which the bonus role is won with a lower probability than that predetermined probability (making it relatively harder to win).

Furthermore, the following methods can be employed to vary the degree of advantage in transitioning to the AT state (including whether or not the duration of the AT state is extended; the same applies hereinafter). For example, a "specific role" can be determined as an internal winning role. The number of medals awarded for this specific role will vary depending on the player's stopping operation (this may be the timing of the stopping operation, the order of pressing the buttons, or a combination of these) (for example, if the stopping operation is appropriate (correct), 8 medals are paid out; if it is inappropriate (incorrect), 1 medal is paid out or no medal is paid out).

Furthermore, if a specific winning combination is achieved in a particular game state, and eight coins are paid out, the decision on whether or not to change the degree of advantage in transitioning to the AT state to a more favorable one (including the decision on whether or not to directly transition to the AT state, or whether or not to directly extend the duration of the AT state; hereinafter referred to as "favorable decision") will not be made. On the other hand, if eight coins are not paid out, the favorable decision will be made in the current game. Alternatively, if a specific winning combination is achieved in the aforementioned specific game state, and eight coins are paid out, the favorable decision will be made in the current game. On the other hand, if eight coins are not paid out, the favorable decision will not be made in the current game.

Thus, the game can be configured such that, depending on the player's playing method, a favorable outcome may be determined for the current game, or it may not be determined (or its occurrence may be restricted). It should be noted that the player may change between games, and if such restrictions continue into subsequent games, the next player may suffer a significant disadvantage. Therefore, it is desirable that such restrictions be limited to the current game and not carried over to subsequent games. Such restrictions are sometimes referred to as "penalties."

[4-6. Gaming Section]
In pachislo machine 1, in order to suppress excessive gambling tendencies, it is possible to set up various game sections as states in which the game is played using a concept different from the game states described above. An example of such a game section is described below. The game section is broadly composed of a non-advantageous section and an advantaged section.

(Non-advantageous period)
The non-advantageous period is defined as a game period during which it is not possible to notify the player of a stopping operation that is advantageous to the player, and it meets the following requirements. Note that the following requirements are merely examples, and may be modified as appropriate if at least one of the requirements is relaxed or tightened.

(1) It is not possible to provide the player with information on a stop operation that is advantageous to them (for example, a button press order navigation). Therefore, it is not possible to control the machine to the AT state or ART state as described above.
(2) If the setting value is changed (setting change), or if the initialization conditions such as "RAM abnormality" described below are met, a non-advantageous period will be set as the initial state.
(3) When the limit processing described below is performed in the advantageous section (i.e., when a predetermined value that is updated in accordance with the progress of the game in the advantageous section (for example, the value of the advantageous section game counter or the advantageous section payout counter described below) reaches a specified value (for example, 1500 games or 2400 coins)), the non-advantageous section is set as the initial state. In addition, by referring to the predetermined value, if the predetermined value has reached a specific updated value even before it reaches the specified value, the non-advantageous section may be set as a condition. Furthermore, when a predetermined termination condition is met and termination is determined during the advantageous section (for example, when the system is configured to hold an advantageous section termination lottery and the player wins the lottery), the non-advantageous section may be set as a condition.
(4) In the non-advantageous section, processing related to the advantageous section (for example, processing to determine whether or not to transition to the advantageous section) is only possible if it refers to the determined internal winning combination, and it is not possible to perform processing that refers to various parameters other than the internal winning combination, such as the derived result display (combination of symbols) or the number of games played in the non-advantageous section (or the advantageous section before the transition). In addition, the determined internal winning combination can be determined by referring to data that directly indicates the internal winning combination, such as the winning number, or by referring to data that indirectly indicates the internal winning combination, such as sub-flags (where multiple combinations are treated as one judgment target data) generated or converted from the internal winning combination data.
(5) The non-advantageous period is basically state 1, and it is not possible to set multiple states within the non-advantageous period. For example, it is not possible to set the non-advantageous period after the end of the advantageous period as non-advantageous period A and the non-advantageous period after the setting change as non-advantageous period B, or to set them as different states.

(Advantageous period)
The advantageous period is defined as a game period during which the player can be notified of a stopping operation that is advantageous to them, and it meets the following requirements. Note that the following requirements are merely examples, and may be modified as appropriate if at least one of the requirements is relaxed or tightened.

(1) The machine can notify the player of a stop operation that is advantageous to them (for example, a button press order navigation). Therefore, it can control the machine to the AT state or ART state as described above.
(2) If the setting value is changed (setting change), or if the initialization conditions such as "RAM abnormality" described below are met, it is not possible to set the advantageous period as the initial state.
(3) If the limit processing described below is executed during the advantageous period, the advantageous period must be terminated.
(4) In the advantageous period, processing related to the advantageous period (for example, processing to determine whether or not to transition the game state (mode) during the advantageous period, or whether or not to extend a specific game state (mode)) can refer not only to the determined internal winning combination, but also to the derived result display (combination of symbols) and various parameters other than the internal winning combination, such as the number of games played during the advantageous period. Other examples of various parameters that can be referenced include, for example, bonus information such as points that can be awarded according to the various parameters mentioned above, the type of bonus state, the type of RT state, the timing of stopping any of the reels, or the order in which to press the buttons.
(5) Multiple states can be set within the advantageous period. For example, a normal state that is disadvantageous to the player, a CZ state that makes it easy to transition to the AT state, or an AT state in which the expected value of medal increase is positive when the player performs a stop operation according to the notification can be set. In addition, depending on the gameplay, states such as a CZ pre-announcement state, which is set as a waiting state until the player actually transitions to the CZ state in response to the decision to transition to the CZ state in the normal state, and in which a premonition performance that suggests the transition to the CZ state may be performed, or an AT pre-announcement state, which is set as a waiting state until the player actually transitions to the AT state in response to the decision to transition to the AT state in the normal state or CZ state, and in which a premonition performance that suggests the transition to the AT state may be performed, can also be set.
(6) The system can notify the user that they are in a favorable section by lighting up a section lamp (status indicator) that can indicate whether they are in a non-favorable section or a favorable section (if the section lamp is off, it indicates that they are in a non-favorable section). The timing of when the section lamp lights up can be set to a somewhat arbitrary timing, as described above. Basically, it may be set to start lighting up when transitioning from a non-favorable section to a favorable section and continue lighting up until transitioning to a non-favorable section, or it may be set so that the lamp does not start lighting up when transitioning from a non-favorable section to a favorable section (when the favorable section has started) but the transitioned favorable section is in a normal state, and only starts lighting up when the AT state is first entered. If the transitioned favorable section is in an AT state, the lamp should start lighting up from that point.

[4-7. Limiter]
In pachislo machine 1, in order to prevent excessive gambling tendencies caused by the advantageous period continuing for too long, it is possible to set an upper limit (restriction) on the period during which the advantageous period continues consecutively. Such an upper limit is called a "limiter". In this embodiment, the termination of the advantageous period by such a limiter is described as the execution of limit processing or the operation of the limiter. An example of such a limiter is described below.

(Game count limiter)
The game count limiter is configured to execute a limit process when the number of games (plays) during the advantageous period reaches "1500". For example, the advantageous period game count counter, described later, starts counting from the start of the advantageous period and adds 1 to the count each time a game is played. Then, based on the value of the advantageous period game count counter reaching a predetermined value (for example, "1500" or more), the advantageous period is forcibly terminated and the game transitions to a non-advantageous period (for example, even if there is still time remaining in the AT state). Note that the number of games at which the game count limiter is activated can be set to any number of games as long as it is less than or equal to the upper limit of "1500". Furthermore, if the requirements for such a game count limiter are relaxed or tightened, it can be changed accordingly. It is also possible to gradually suppress the gambling aspect according to the number of games played during the advantageous period.

(Payout limiter)
The payout limiter is configured to execute a limit process when the number of medals paid out during the advantageous period reaches "2400". For example, the advantageous period payout counter, described later, starts counting from the start of the advantageous period and adds the corresponding number of medals each time a medal is paid out (more specifically, the net increase obtained by subtracting the number of bets from the number of medals paid out). Then, based on the value of the advantageous period payout counter reaching a predetermined value (for example, "2400" or more), the advantageous period is forcibly terminated and the game transitions to a non-advantageous period (for example, even if there is still time remaining in the AT state). The payout number at which the payout limiter is activated can be set to any payout number as long as it is less than or equal to the upper limit of "2400" medals. Furthermore, if the requirements for such a payout limiter are relaxed or tightened, it can be changed accordingly. It is also possible to gradually suppress the gambling aspect according to the number of medals paid out during the advantageous period.

Furthermore, for example, the advantageous period payout counter described later may be configured to count the increase from the most recent lowest point, using the point where the absolute value of the number of medals decreased the most since the start of the advantageous period as the lowest point (i.e., subtracting the count if there were no payouts). In other words, the payout limiter can be configured as a limiter that executes a limit process when a maximum of 2400 medals have been paid out from the point when the number of medals increases during the advantageous period (for example, when the AT state begins). Also, for example, the advantageous period payout counter described later may simply count the actual payout (i.e., the payout without subtracting the number of bets) instead of the net increase mentioned above.

Furthermore, pachislo machine 1 may perform the limit processing of the advantageous period using only the game count limiter, using only the payout limiter, or using both the game count limiter and the payout limiter. When using both limiters, it is desirable to terminate the advantageous period when the activation conditions of either limiter are met after the advantageous period has started.

Furthermore, the types of limiters are not limited to the game count limiter and payout limiter mentioned above. For example, a navigation count limiter may be implemented, which executes a limit process when the number of navigations for specific button press combinations during AT mode (i.e., the number of times information regarding advantageous stop operations for combinations related to medal payouts is provided to the player) reaches a predetermined number (e.g., 400 times). In other words, as long as the element of chance can be appropriately suppressed, it is possible to execute limit processing using various conditions related to the game.

[4-8. External Signals]
As described above, pachislo machine 1 is designed to output multiple types of external signals externally. For example, if external signal 1 is turned on when a bonus state begins and turned off when the bonus state ends, the external data display can also perform bonus state effects in conjunction with this. Also, for example, if external signal 1 is turned on when a BB state begins and turned off when the BB state ends, and external signal 2 is turned on when an MB state begins and turned off when the MB state ends, the external data display can not only perform the bonus state effects described above, but also count the number of bonuses by type.

Furthermore, for example, by turning on external signal 1 based on the start of the AT state and turning off external signal 1 based on the end of the AT state, the external data display can also perform synchronized AT state effects. Also, for example, by turning on external signal 1 based on the start of a predetermined AT state and turning off external signal 1 based on the end of the predetermined AT state, and turning on external signal 2 based on the start of a specific AT state and turning off external signal 2 based on the end of a specific AT state, the external data display can not only perform the aforementioned AT state effects but also count the number of ATs by type.

Furthermore, for example, if the AT state is configured as an AT state with set count management, and external signal 1 is turned ON based on the start of the first set of AT states, and external signal 2 is turned ON each time a set starts for the second set and beyond, the number of initial AT state wins and the number of AT state extensions can be counted on the external data display unit. The timing for turning each external signal ON and OFF can be set as appropriate. In other words, as long as the situation is appropriately recognized by the external data display unit or hall computer, the output mode of each external signal can be set as appropriate. For example, the period from the OFF state to the ON state and then back to the OFF state can be set to various conditions such as a predetermined time, during one game, or until the state changes.

[4-9. Commands]
As described above, the pachislo machine 1 is designed to transmit multiple types of commands from the main control circuit 100 to the sub-control circuit 200. However, in the pachislo machine 1, the main control circuit 100 and the sub-control circuit 200 cannot communicate with each other; communication is required to be unidirectional, from the main control circuit 100 to the sub-control circuit 200. Therefore, the main control circuit 100 needs to transmit information (commands) to the sub-control circuit 200 in a timely manner to report changes in the state of the pachislo machine 1. An example of such a command is described below.

The main control circuit 100 sends an initialization command to the sub-control circuit 200, for example, when a setting change operation is performed. The initialization command includes parameters that specify the setting value, game state, etc. Furthermore, for example, when a bet operation is performed, a medal insertion command is sent. The medal insertion command includes parameters that specify the number of bets, etc. Also, for example, when a start operation is performed, a start command is sent. The start command includes parameters that specify the internal winning combination, game state, etc. Furthermore, for example, when a lock effect is performed, a lock command is sent. The lock command includes parameters that specify the content of the lock effect, etc. Also, for example, when the rotation of each reel 3L, 3C, and 3R begins, a reel rotation start command is sent. The reel rotation start command includes parameters that specify that the reel rotation has begun, etc.

Furthermore, for example, when a stop operation is performed, a reel stop command is sent. The reel stop command consists of parameters that specify the reel to be stopped and the position in which that reel stops. Also, for example, when all reels have stopped and the displaying role (winning activation flag) is determined, a winning activation command is sent. The winning activation command consists of parameters that specify the type of displaying role and the content of the bonus to be awarded. Also, for example, when a favorable period begins, a favorable period start command is sent. The favorable period start command consists of parameters that specify the start of a favorable period and the mode (game state). Also, for example, when a favorable period ends, a favorable period end command is sent. The favorable period end command consists of parameters that specify the end of a favorable period and the reason for its termination. Also, for example, when a settlement operation is performed, a settlement command is sent. The settlement command consists of parameters that specify the number of tokens to be returned. Note that these are merely examples; other commands can be sent as needed, and unnecessary commands can be omitted.

[4-10. Performance]
As described above, pachislo machine 1 is capable of executing various effects using various effects devices in order to enhance the enjoyment of the game, to inform the player of useful information, or to achieve the intended gameplay. An example of such an effect is described below.

[4-10-1. Main Stage Production]
In pachislo machine 1, the main control circuit 100 (main side) can control, for example, the following effects. As mentioned above, pachislo machine 1 is capable of notifying information about stop operations via an instruction monitor, and this is also included in the effects in a broad sense.

(Rock performance)
In pachislo machine 1, if predetermined execution conditions are met, a feature may be displayed that halts the game's progress for a predetermined period (invalidating the player's game operations for a predetermined period). Such a feature is called a "lock feature" (or simply "lock"), or a "freeze feature" (or simply "freeze"), etc. It is also possible to configure the machine so that such lock features do not occur, or to configure it so that multiple types of lock features can be displayed.

Furthermore, the game operations to be invalidated may include, for example, start operations, stop operations, or other operations. For example, if start operations are invalidated for a predetermined period, the game will be halted for a predetermined period after all stop operations have been performed. Similarly, if stop operations are invalidated for a predetermined period, the game will be halted for a predetermined period after the start operation has been performed. Additionally, if multiple types of lock effects are provided, the duration of the game's suspension (the period during which the player's game operations are invalidated) and the types of game operations to be invalidated should be set for each lock effect.

(Reel animation)
In pachislo machine 1, when predetermined execution conditions are met, the following effects may be performed during the execution of the aforementioned lock effect: the effects display patterns of each reel 3L, 3C, and 3R (including not only the variation display patterns but also combinations with the stop display patterns). Such effects are referred to as "reel effects," as well as "symbol effects," etc. It is also possible to configure the machine so that such reel effects do not occur, or to configure it so that multiple types of reel effects can be performed. Furthermore, when referring to "performing (executing) the lock effect," this includes both cases in which reel effects occur and cases in which they do not.

Reel effects, in essence, are created by rotating or stopping (temporarily stopping) each reel (3L, 3C, 3R) without the player's input during a period when the player's gameplay is disabled. Therefore, it is possible to set operation patterns for these effects without considering rotation speed or maximum number of sliding frames. Furthermore, by setting multiple operation patterns, multiple types of reel effects can be provided. Combining multiple types of reel effects with multiple types of lock effects allows for an even wider variety of effect patterns. Note that the reel effects may use any one of the three reels (3L, 3C, 3R), any two, or all three.

(Simulated game)
In pachislo machine 1, if predetermined execution conditions are met, a simulated game may be played during the execution of the aforementioned lock effect. Such an effect is called a "simulated game." It is also possible to configure the machine so that such a simulated game does not occur, or so that multiple types of simulated games can be played. Furthermore, when referring to "performing (executing) the lock effect," this includes both cases where a simulated game is played and cases where it is not.

In essence, simulated gameplay involves simulating player input during a period when player input is disabled, thereby generating visual effects by rotating or stopping (temporarily stopping) the reels 3L, 3C, and 3R. In other words, it further enhances the reel effects by incorporating player input. It should be noted that buttons such as the MAX bet button 6a, 1 bet button 6b, start lever 7, stop buttons 8L, 8C, and 8R, and the payout button 9 are primarily intended for gameplay and should not be used for any other purpose. However, in simulated gameplay, it is permitted to accept these inputs, provided that measures are taken to prevent the player from mistaking the simulation for actual gameplay.

Here, we will explain the flow of a simulated game using an example. A simulated game proceeds as follows:
(1) The player's actual start operation (the execution conditions are met here and the simulated game starts)
(2) Each reel rotates in a simulated manner (during simulated gameplay)
(3) The machine accepts a stop command in a simulated manner, causing each reel to temporarily stop (during simulated gameplay).
(4) After a random delay process, each reel actually starts spinning (the simulated game ends and the actual game begins).

Furthermore, random delay processing is a process that corrects the situation described in (3) above, where, for example, if a specific pattern is displayed in a specific order, and the reels start rotating normally in the situation described in (4) above, it may become easier for the player to stop the reels using the specific pattern as a guide (effectively assisting in so-called "eye-stopping"). This process involves randomly generating a delay period for each reel before starting rotation (such a delay period is also called a "repositioning period"). Additionally, in situations (3) and (4) above, when the reels are temporarily stopped, it is desirable to ensure that the phase signal in the excitation control of each stepping motor is always kept below a predetermined time (e.g., 500 ms) to alternately change the reels between forward and reverse directions, so as not to be mistaken for a complete stop.

One of the measures described above is, for example, if any combination of symbols temporarily stops in the situation described in (3) above (when the third reel temporarily stops and all reels temporarily stop), then each reel may be made to vibrate slightly up and down (oscillate) until the random delay processing begins in the situation described in (4) above. However, as long as the phase signal changes in less than the predetermined time described above, such oscillation may be omitted when the first reel temporarily stops or when the second reel temporarily stops.

Furthermore, one of the measures mentioned above is to provide a simulated game lamp to indicate that a simulated game is in progress, and to illuminate the simulated game lamp from the time the simulated game starts in the situation described in (1) above until the random delay processing starts in the situation described in (4) above. It is desirable that the simulated game lamp be installed above the control unit that receives the player's game operations and in a position where it can be seen during gameplay. It is also desirable that the simulated game lamp be a separate lamp not used for any other purpose, and that the entire display area of the simulated game lamp be covered with a single-color border. Furthermore, it is desirable that the display area of the simulated game lamp, including the explanatory part of the simulated game lamp, has a certain surface area (for example, one side exceeding 10 mm and a surface area exceeding 642 square mm). Furthermore, the explanatory section for the simulated game lamp should preferably contain wording that clearly indicates that the lamp is used to signal that a simulated game is in progress (for example, wording such as "FREEPLAY," "Simulated Game Performance in Progress," or "Automatic Reel Performance in Progress"). It is also desirable that such wording occupies at least one-third of the surface area. The simulated game lamp may be controlled by either the main control circuit 100 or the sub-control circuit 200.

Furthermore, one of the measures mentioned above is to display a "simulated game in progress" indicator on the main display device 210 or the sub-display device 220 (or both) from the time the simulated game starts in the situation described in (1) above until the random delay processing starts in the situation described in (4) above. It is desirable that the "simulated game in progress" indicator be displayed above the control unit that receives the player's game operations and in a position that is visible during gameplay (in this embodiment, both the main display device 210 and the sub-display device 220 are above the control unit, so either can be used). It is also desirable that the display range of the "simulated game in progress" indicator, including its explanatory portion, has a certain surface area (for example, one side exceeds 10 mm, the surface area exceeds 642 square mm if the display screen is less than 7 inches, or the surface area is 8.2% or more of the entire screen if the display screen is 7 inches or larger). Furthermore, the explanatory text for the "Simulated Game" display should ideally be clearly identifiable as an indication that a simulated game is in progress (for example, "FREEPLAY," "Simulated Game Performance," or "Automatic Reel Performance"), and should be large enough for the player to read without being obscured.

Furthermore, for example, during simulated gameplay (for instance, from the start of simulated gameplay in situation (1) above until the start of random delay processing in situation (4) above), it is desirable to configure the instruction monitor so that information about stopping operations is not displayed (if it is necessary to display information about stopping operations on the instruction monitor during the game, the display should be started at the timing when random delay processing begins). This further reduces the likelihood of the player mistakenly believing that they are playing an actual game while playing a simulated game. Note that if any of the above measures are taken, during simulated gameplay, the sub-display devices (for example, the main display device 210 and the sub-display device 220) may be configured to display information about stopping operations. Similarly, during simulated gameplay, the sub-display devices may perform effects that correspond to the results of the simulated game (linked to the simulated game operations).

Furthermore, during actual gameplay, test signals corresponding to the player's game operations or the state in which such game operations become possible are output via the first interface board 301 for the test machine. However, during simulated gameplay, no test signals corresponding to the player's simulated game operations or the state in which such simulated game operations become possible are output. Therefore, during simulated gameplay, a test signal (simulated game signal) may be output to allow the test machine to recognize that simulated gameplay is in progress. The first interface board 301 for the test machine may, upon receiving a simulated game signal from the main control board 71, output a signal for controlling the progress of the simulated game to the main control board 71, thereby allowing the main control board 71 to proceed with the simulated game (i.e., the first interface board 301 for the test machine may be given a simulated game progression function). Also, if the first interface board 301 for the test machine is given such a simulated game progression function, a switch to toggle this function on and off may be provided. This makes it possible to arbitrarily set whether or not to check the simulated gameplay effects during the certification test (trial firing test) of pachislot machine 1.

[4-10-2. Sub-side production]
In pachislo machine 1, the sub-control circuit 200 (sub-side) can control, for example, the following effects can be performed. As mentioned above, pachislo machine 1 is capable of notifying information about stop operations via the main display device 210, etc., and this is also included in the effects in a broad sense.

(Normal performance)
In pachislo machine 1, if predetermined execution conditions are met, a special effect may occur that concludes within the current game (i.e., ends in one game). Such effects are called "normal effects," or sometimes "single-shot effects." It is also possible to configure the machine so that such normal effects do not occur, or to configure it so that multiple types of normal effects can be performed.

(Continuous performance)
In pachislo machine 1, if predetermined execution conditions are met, a continuous sequence of events (i.e., continuing for multiple games) can be performed over multiple gameplay rounds. Such a sequence of events is called a "continuous sequence of events," or sometimes a "continuation sequence of events." It is also possible to configure the machine so that such continuous sequences do not occur, or to configure it so that multiple types of continuous sequences can be performed.

(Operation-linked effects)
In pachislo machine 1, when predetermined execution conditions are met, it is possible to perform effects that change in response to the player's actions. Such effects are called "operation-linked effects," as well as "button effects," etc. It is also possible to configure the machine so that such operation-linked effects do not occur, or to configure it so that multiple types of operation-linked effects can occur. Furthermore, operation-linked effects can be configured as normal effects or as continuous effects. In addition, the effects operations can include not only operations on the effect buttons but also various game operations.

Furthermore, the various effects described above can be used for a variety of purposes. For example, they can be used to indicate or notify about settings, internal winning combinations, game state, game intervals, bonus content, and the time until bonuses are awarded. They can also be used to indicate or notify the degree of these advantages. These uses are merely examples.

(Other production elements)
In pachislo machine 1, effects other than those described above can also be displayed. For example, in addition to the uses described above, various notifications to players or amusement parlors (e.g., anti-addiction notifications, anti-lost item notifications, error status notifications, demo status notifications, etc.) are also included in the broad sense of effects. For example, anti-addiction notifications may be issued as a warning when the advantageous period ends. Similarly, anti-lost item notifications may be issued as a warning when the advantageous period ends or when a settlement operation is performed. Error status notifications may be issued as a warning when an error occurs and until it is resolved. Demo status notifications may be issued as a notification that a machine is available when a predetermined period of inactivity has been reached or when a settlement operation is performed.

[5. The First Gaming Machine]
Next, with reference to Figures 5 to 22, a specific example of the specifications related to the gameplay of the pachislo machine 1 will be described as the "first game machine." It should be noted that some or all of the specifications and functions described as the first game machine in this embodiment can be applied to other game machines described in this embodiment, and conversely, some or all of the specifications and functions described as other game machines in this embodiment can be applied to the first game machine described in this embodiment. In other words, the invention according to this embodiment can be formed by appropriately combining these.

First, in the first gaming machine, the number of active lines is defined as only one line, the "center line" mentioned above. Furthermore, the first gaming machine has two game states: a non-bonus state and a bonus state. The non-bonus state consists of three states: between 2BB flags where "F_2BB" (a bonus role that can only be won in a 2-coin bet state; hereinafter sometimes simply referred to as "2BB") is carried over; between 3BB flags where "F_3BB" (a bonus role that can only be won in a 3-coin bet state; hereinafter sometimes simply referred to as "3BB") is carried over; and between non-flags where no bonus role has been won (not carried over). The bonus state consists of two states: the 2BB state, which is entered when a combination of symbols related to 2BB is displayed, and the 3BB state, which is entered when a combination of symbols related to 3BB is displayed.

Furthermore, in the first gaming machine, it is possible to play with two tokens bet (two-token bet state) and three tokens bet (three-token bet state). Note that "betting" includes any of the following: the player inserting two or three tokens into the token slot 5 for gameplay; the player betting two or three tokens from the credits by operating the MAX bet button 6a or the 1 bet button 6b; and the automatic betting of two or three tokens upon winning a replay.

[5-1. Gameplay of the First Gaming Machine]
Next, the gameplay flow in the first gaming machine will be explained with reference to Figures 5 to 8. Figure 5 is a diagram showing an example of the transition flow of game states in the non-advantageous and advantageous sections of the first gaming machine, Figure 6 is a diagram illustrating an example of each mode in the first gaming machine, and Figures 7 and 8 are diagrams showing examples of various tables in the first gaming machine.

As shown in Figure 5, in the first gaming machine, the state in which the player plays is broadly divided into a non-advantageous section and an advantageous section. The advantageous section is further divided into a performance section (advantageous section - normal gameplay) and an increase section (advantageous section - pseudo-bonus). The non-advantageous section is a game state (non-AT state) in which information on advantageous stopping operations is not announced to the player, making it a disadvantageous game state for the player. The performance section is also a game state (non-AT state) in which information on advantageous stopping operations is not announced to the player, and is similar to the non-advantageous section in that it is a disadvantageous game state for the player. However, as will be described later, it differs from the non-advantageous section in that mode transitions occur.

In other words, the non-advantageous section is a control state that is controlled as the initial state when gameplay in the advantageous section ends, when a setting change operation is performed, when other initialization conditions are met, or when the machine is at its factory default settings. The performance section is a control state that allows the expectation of transitioning to (granting) an increase section to be varied by mode transitions, etc., and is the normal state in which the player plays the game as usual.

On the other hand, the increase section is a game state (AT state) in which information on advantageous stopping operations is notified to the player, making it a game state that is advantageous to the player. In other words, the increase section is a control state that is advantageous for the player as they can increase their medal count. Both the performance section and the increase section are advantageous sections, and transitioning between these sections constitutes a series of advantageous sections.

In the first gaming machine, as shown in Figure 7(a), a non-advantageous-period sub-flag is determined as secondary information (sub-flag) corresponding to the internal winning combination (see Figure 10, described later) during the non-advantageous-period section. The sub-flag is information that allows for the identification of groups of internal winning combinations that play similar roles (such as whether they are a target combination for drawing and their winning probability) in various draws related to gameplay (various processes related to the advantageous-period section) performed by the main control circuit 100, by assigning the same information to them. This eliminates the need to create separate data tables for each internal winning combination, thereby compressing the amount of data and avoiding strain on the main ROM 102's capacity. During the non-advantageous-period section, a draw is performed using this non-advantageous-period sub-flag.

The non-advantageous section sub-flag "Replay Bell" is determined when the internal winning combination is one of "F_Replay A" (No. "3"), "F_Replay B" (No. "4"), or "F_Bell 123A1" to "F_Bell 321B2" (No. "10" to No. "33"). The non-advantageous section sub-flag "Weak Cherry" is determined when the internal winning combination is "F_Cherry" (No. "5"). The non-advantageous section sub-flag "Watermelon" is determined when the internal winning combination is "F_Watermelon" (No. "9"). The non-advantageous section sub-flag "Confirmed Combination" is determined when the internal winning combination is one of "F_Confirmed Cherry" (No. "6") or "F_Reach Eye" (No. "8"). The non-advantageous section sub-flag "Middle Cherry" is determined when the internal winning combination is "F_Middle Cherry" (No. "7"). Furthermore, it is possible to configure the system so that the winning sub-flag and the entry sub-flag can be determined in the non-advantageous section, similar to the advantageous section. Also, the correspondence between these is not limited to the one described above.

Furthermore, in the first gaming machine, as shown in Figure 7(a), during the advantageous period, a sub-flag for winning during the advantageous period is determined as secondary information (sub-flag) corresponding to the internal winning combination (see Figure 10 described later). In addition, during the advantageous period, a sub-flag for entering the advantageous period is determined as secondary information (sub-flag) corresponding to the combination of displayed symbols. During the advantageous period, a lottery is conducted using these sub-flags for winning during the advantageous period and the sub-flags for entering the advantageous period.

The sub-flag "Bell" during the advantageous section win is determined when the internal winning combination is one of "F_Bell 123A1" to "F_Bell 321B2" (No. "10" to No. "33"). The sub-flag "Weak Cherry" during the advantageous section win is determined when the internal winning combination is "F_Cherry" (No. "5"). The sub-flag "Watermelon" during the advantageous section win is determined when the internal winning combination is "F_Watermelon" (No. "9"). The sub-flag "Confirmed Combination" during the advantageous section win is determined when the internal winning combination is either "F_Confirmed Cherry" (No. "6") or "F_Reach Eye" (No. "8"). The sub-flag "Middle Cherry" during the advantageous section win is determined when the internal winning combination is "F_Middle Cherry" (No. "7").

The sub-flag "Normal Replay 1" is determined when the internal winning combination is either "F_Replay A" (No. "3") or "F_Replay B" (No. "4"), and a combination of symbols for "Diagonal Replay" is displayed (i.e., the winning combination is "Diagonal Replay"). The sub-flag "Normal Replay 2" is determined when the internal winning combination is either "F_Replay A" (No. "3") or "F_Replay B" (No. "4"), and a combination of symbols for "Parallel Replay" is displayed (i.e., the winning combination is "Parallel Replay").

In the first gaming machine, as described later, when the internal winning combination is "F_Replay A" (No. "3"), the combination of symbols for "upward-sloping replay" is displayed between 3BB flags, and the combination of symbols for "parallel replay" is displayed between 2BB flags and between non-flags.

In other words, when the internal winning combination is "F_Replay A" (No. "3"), "Normal Replay 1" is determined as the sub-flag for entering the advantageous section between 3BB flags, and "Normal Replay 2" is determined as the sub-flag for entering the advantageous section between 2BB flags and between non-flags. Furthermore, in the first gaming machine, when the sub-flag for entering the advantageous section differs in this way, the degree of advantage in the various draws described later (for example, the pseudo-bonus transition draw using the pseudo-bonus transition draw table shown in Figure 7(c) and the mode transition draw using the mode transition draw table shown in Figure 8(f)) is adjusted accordingly.

In the first gaming machine, for example, "F_Replay A" (No. "3") is used as an example to explain how the sub-flag changes upon entering the advantageous section depending on whether it is between 3BB flags or 2BB flags. However, the manner in which the sub-flag changes upon entering the advantageous section is not limited to this. For example, as will be described later, when the internal winning combination is "F_Bell 123B1" (No. "12"), the stop control is made different depending on whether it is between 3BB flags or 2BB flags. Therefore, when such a combination is won, the number of medals paid out may not change (or may be changed), but the combination of displayed symbols may be different, thereby determining a different sub-flag upon entering the advantageous section. Then, the degree of advantage in the various draws described later may be changed according to the difference in the sub-flag upon entering the advantageous section.

Furthermore, as will be explained later, when the internal winning combination is "F_Watermelon" (No. "9"), regardless of which flags (or non-flags) are involved, if the button press position (stopping timing) is appropriate, the combination of "Watermelon" symbols will be displayed. If the button press position is inappropriate, a missed win will occur and the combination of "Missed Watermelon" symbols will be displayed. Therefore, when such a combination is won, different sub-flags for entering the advantageous section may be determined depending on whether the win was achieved without any missed wins or if a missed win occurred. Then, the degree of advantage in the various draws described later may be adjusted according to the difference in the sub-flags for entering the advantageous section.

Furthermore, for example, when the internal winning combination is "F_Replay A" (No. "3"), between the 3BB flags, if the stop operation is performed in a specific manner (this specific manner may be, for example, if the stop operation is performed in a predetermined order (correct button press order), if the button press position (timing of the stop operation) is appropriate, or a combination of these), the combination of "Parallel Replay" symbols will be displayed. If the operation is not performed in the specific manner, the combination of "Upward-Sloping Replay" symbols will be displayed. This will determine different sub-flags for entering the advantageous section. Then, depending on the difference in the sub-flags for entering the advantageous section, the degree of advantage in the various draws described later may be varied.

In other words, in the first gaming machine, it is possible to make it possible for the final stop display to differ depending on the number of bets, the game state, the manner of stopping the reels, or any combination of these, and to determine different secondary information according to the different stop display manners, thereby allowing all possible configurations to be applied that allow the degree of advantage to be varied.

Let's return to the explanation of the gameplay of the first gaming machine. During the non-advantageous section, a lottery for transitioning to the advantageous section is held after each game. Specifically, the advantageous section transition lottery table shown in Figure 7(b) is referenced to determine the internal winning combination. Based on this internal winning combination, the non-advantageous section sub-flag is determined. Then, at a predetermined timing during the game, the transition destination mode is determined according to the non-advantageous section sub-flag. Note that in this determination, there are cases where only the type of mode upon transitioning to the advantageous section is determined (Figure 5, "Advantageous Section Start"), and cases where not only the type of mode but also a transition to a pseudo-bonus is determined (Figure 5, "Advantageous Section Start + Pseudo-Bonus Start"). However, it is also possible to have a specification where a transition to a pseudo-bonus is not determined during the non-advantageous section.

Here, referring to Figure 6, the modes in the first gaming machine will be explained. In the first gaming machine, the mode is control information (which can also be called the game state or control state) that changes the expected probability of transitioning to (granting) an increase section (pseudo-bonus) during the performance section (normal gameplay). During the performance section (normal gameplay), the presence or absence of a pseudo-bonus transition, the maintenance of the advantageous section, or the termination of the advantageous section and transition to a non-advantageous section are determined according to this mode.

The Start Mode is a mode in which players tend to stay when transitioning from a non-advantageous section to an advantageous section (performance section). It is a relatively disadvantageous mode, with a relatively low probability of transitioning to a pseudo-bonus (see Figure 7(c) below), and also a relatively low probability of transitioning to a more advantageous mode (see Figure 8(f) below). Although not shown in the diagram, the Start Mode has a ceiling game count of "965 games." The ceiling game count is used to force a transition to a pseudo-bonus when a certain period of time has passed without a pseudo-bonus. Therefore, a lower ceiling game count is more advantageous to the player, while a higher ceiling game count is more disadvantageous.

Normal Mode A is the mode in which players are most likely to stay while playing, and it is relatively disadvantageous. The probability of transitioning to a pseudo-bonus is relatively low (see Figure 7(c) below), and the probability of transitioning to a more advantageous mode is also relatively low (see Figure 8(f) below). In Normal Mode A, the ceiling game count is set to "965 games". Also, in Figure 6, "approximately 999G after pseudo-bonus" refers to the fact that after the pseudo-bonus ends, if the player transitions to either End Mode A or End Mode B (described below), plays for 32 games in that mode without transitioning to a pseudo-bonus, and then transitions to a non-advantageous section, and then selects Normal Mode A when transitioning from the non-advantageous section to the advantageous section, the apparent ceiling game count is "965 games" + the duration of play in End Mode A or End Mode B ("32 games") + the number of games required to transition from the non-advantageous section to the advantageous section. This is represented here. The same applies to Normal Mode B, Heaven Preparation Mode, and Chance Mode.

Normal Mode B is a mode that players tend to stay in relatively often. While it is a relatively disadvantageous mode, it is more advantageous than Normal Mode A. The probability of transitioning to a pseudo-bonus is relatively low (see Figure 7(c) below), and the probability of transitioning to a more advantageous mode is also relatively low (see Figure 8(f) below). In Normal Mode B, the maximum number of games is set to "965 games".

While the Heaven Preparation Mode has a relatively low probability of transitioning to a pseudo-bonus (see Figure 7(c) below), the maximum number of games is set at "466 games," and if a pseudo-bonus is triggered, it is guaranteed to transition to Heaven Mode after its completion (see Figure 8(f) below). Therefore, in that sense, it is a relatively advantageous mode.

The Chance Mode offers a relatively high probability of transitioning to a pseudo-bonus (see Figure 7(c) below), and the ceiling game count is set at "222 games," making it a relatively advantageous mode in that sense. However, the probability of transitioning to Heaven Mode is not high (see Figure 8(f) below).

Ending Mode A is a relatively unfavorable mode that players are likely to remain in if they transition to a pseudo-bonus and do not transition to Heaven Mode (including Heaven Preparation Mode) after its completion. The probability of transitioning to a pseudo-bonus is the lowest in this mode (see Figure 7(c) below), and the probability of transitioning to a more favorable mode is also relatively low (see Figure 8(f) below). In Ending Mode A, if 32 games are played after the completion of a pseudo-bonus without transitioning to another pseudo-bonus, the favorable section itself ends, and the player transitions to a non-favorable section.

Ending Mode B is a mode that players are likely to remain in if they transition to a pseudo-bonus and do not transition to Heaven Mode (including Heaven Preparation Mode) after its completion. While relatively unfavorable, it is more advantageous than Ending Mode A. The probability of transitioning to a pseudo-bonus is relatively low (see Figure 7(c) below), and the probability of transitioning to a more advantageous mode is also relatively low (see Figure 8(f) below). In Ending Mode B, similar to Ending Mode A, if 32 games are played after the pseudo-bonus ends without transitioning to another pseudo-bonus, the advantageous section itself ends, and the player transitions to a non-advantageous section. Note that Ending Mode A and Ending Mode B can be collectively referred to as "Ending Modes."

The Guarantee Mode is the mode you enter when Heaven Mode C ends. The probability of transitioning to a pseudo-bonus is relatively high (see Figure 7(c) below), and the ceiling game count is set at "32 games," making it a relatively advantageous mode in that sense. However, the probability of transitioning to Heaven Mode is not high (see Figure 8(f) below). In other words, when Heaven Mode C ends, this mode is positioned as a way to maintain (guarantee) a relatively advantageous state for a certain period to prevent a decline in enjoyment.

Heaven Mode A is a mode in which it is expected that pseudo-bonuses will occur in succession (including extensions (additions) if the AT state is designed to continue by making a decision to extend (add) during the AT state; the same applies hereinafter), the probability of transitioning to a pseudo-bonus is relatively high (see Figure 7(c) below), the ceiling game count is set to "32 games", and the probability of maintaining the ceiling mode (Heaven Mode loop rate) is set to a moderate level, making it a relatively advantageous mode. Although not shown in Figure 6, for example, it is possible to set a difference in this ceiling mode loop rate depending on the setting. For example, when the setting value is odd (1, 3, 5), the ceiling mode loop rate can be set to about 75%, and when the setting value is even (2, 4, 6), the ceiling mode loop rate can be set to about 67%, or the setting value can simply be set so that the ceiling mode loop rate is higher the higher the setting value. The same applies to Heaven Mode B and Heaven Mode C, described later; it is also possible to set a difference in the ceiling mode loop rate.

Heaven Mode B is a mode where consecutive pseudo-bonuses are expected, and the probability of transitioning to a pseudo-bonus is relatively high (see Figure 7(c) below). The ceiling game count is set at "32 games," and the probability of maintaining the ceiling mode (Heaven Mode loop rate) is set high, making it a relatively advantageous mode. In other words, in terms of the ceiling mode loop rate, it is an even more advantageous mode than Heaven Mode A.

Heaven Mode C is a mode where consecutive pseudo-bonuses are expected, and the probability of transitioning to a pseudo-bonus is relatively high (see Figure 7(c) below). The ceiling game count is set at "32 games," and the probability of maintaining the ceiling mode (Heaven Mode loop rate) is set quite high, making it a relatively advantageous mode. In other words, in terms of the ceiling mode loop rate, it is an even more advantageous mode than Heaven Mode A and Heaven Mode B. Note that Heaven Mode A, Heaven Mode B, and Heaven Mode C can be collectively referred to as "Heaven Mode."

Please note that the modes described above are merely examples, and the mode configuration is not limited to these. You can also configure modes other than those described above, or you can choose not to configure some of the modes described above.

Furthermore, while we have described the non-advantageous period as a state with relatively lower advantages compared to the advantageous period, the relationship between the non-advantageous and advantageous periods is not limited to this configuration. For example, it is possible to have specifications such as a higher transition rate to the increase period when in a non-advantageous period, or a shorter average number of games required to transition to the increase period, compared to when at least one mode is set in the advantageous period. Alternatively, the non-advantageous period could be designed to be the easiest to transition to the increase period. This would create an incentive to continue playing even when it is confirmed to be a non-advantageous period, such as after a setting change, thus motivating players to start playing from opening time. Also, even if the period lamp stops lighting up after 32 games following the end of a pseudo-bonus, it is not confirmed that the most unfavorable state is in place, thus motivating players to continue playing. Furthermore, while we have described the performance period as a game state where information on advantageous stopping operations is not announced to the player, it is also possible to have a game state where information on stopping operations is announced, provided it is in a less favorable configuration compared to the increase period (for example, by reducing the frequency of announcements or changing the roles that are announced).

Let's return to the explanation of the gameplay of the first gaming machine. During the performance section (normal gameplay), first, for each game, a pseudo-bonus transition lottery (when a win occurs) is conducted by referring to the advantageous section win sub-flag. Specifically, the pseudo-bonus transition lottery table shown in Figure 7(c) is referred to determine the internal winning role, and then, at a predetermined timing during the game after the advantageous section win sub-flag is determined according to that internal winning role, it is decided whether or not to transition to a pseudo-bonus, according to the advantageous section win sub-flag. Note that in Figure 7(c), "Not a Win" means that the game will not transition to a pseudo-bonus, "Win (Current Game)" means that the game will transition to a pseudo-bonus from the current game, and "Win (Next Game)" means that the game will transition to a pseudo-bonus from the next game.

Furthermore, in the first gaming machine, if a "win (this game)" is determined, the game operation (stop operation) is invalidated for a certain period at the start of the current game. If a "win (next game)" is determined, the game operation (stop operation) is invalidated for a certain period at the start of the next game. During this invalid period, after a reel animation ("Red 7 alignment" animation) is performed in which the "Red 7 alignment" animation is displayed in the main display window 4, a pseudo-bonus is started. If it is necessary to notify information about the stop operation in a game in which the "Red 7 alignment" animation has been performed, the information about the stop operation is notified at least when the invalid period ends and the game operation (stop operation) becomes valid again (it may be earlier, but not before the random delay processing described above begins).

During the performance section (normal gameplay), if the pseudo-bonus transition lottery (upon winning) determines that the game will transition to a pseudo-bonus, a mode transition lottery (upon winning) is conducted. Specifically, the mode transition lottery table shown in Figure 8(f) is referenced, and the destination mode is determined according to the current mode and the sub-flag at the time of winning the advantageous section. This destination mode may include the mode during the pseudo-bonus, or it may be the mode after the pseudo-bonus ends. Furthermore, if the pseudo-bonus transition lottery (upon winning) determines that the game will transition to a pseudo-bonus, and the mode transition lottery (upon winning) is conducted, the pseudo-bonus transition lottery (upon winning), mode transition lottery (upon winning), and mode transition lottery (upon reaching the ceiling), described later, will not be conducted.

During the performance section (normal gameplay), if the pseudo-bonus transition lottery (at the time of winning) does not result in a transition to a pseudo-bonus, a pseudo-bonus transition lottery (at the time of winning) is conducted for each game (more specifically, for games where "F_Replay A" or "F_Replay B" is won), referencing the sub-flag at the time of entering the advantageous section. Specifically, the pseudo-bonus transition lottery table shown in Figure 7(c) is referenced to determine the winning combination, and after the sub-flag at the time of entering the advantageous section is determined according to that winning combination, at a predetermined timing during the game (before the start of the next game), it is decided whether or not to transition to a pseudo-bonus according to the sub-flag at the time of entering the advantageous section.

Furthermore, in the pseudo-bonus transition lottery table shown in Figure 7(c), the probability of transitioning to a pseudo-bonus is higher when "Normal Replay 2" is determined as the sub-flag upon entering the advantageous section than when "Normal Replay 1" is determined. However, this is not the only way to favor "Normal Replay 2" over "Normal Replay 1". For example, if "Normal Replay 2" is determined as the sub-flag upon entering the advantageous section, a transition to a pseudo-bonus may be determined with a predetermined probability, but if "Normal Replay 1" is determined as the sub-flag upon entering the advantageous section, a transition to a pseudo-bonus may not be determined.

During the performance section (normal gameplay), if the pseudo-bonus transition lottery (at the time of winning) determines that the game will transition to a pseudo-bonus, a mode transition lottery (at the time of winning) is conducted. Specifically, the mode transition lottery table shown in Figure 8(f) is referenced, and the destination mode is determined according to the current mode and the sub-flag at the time of entering the advantageous section. This destination mode may include the mode during the pseudo-bonus, or it may be the mode after the pseudo-bonus has ended. Furthermore, if the pseudo-bonus transition lottery (at the time of winning) determines that the game will transition to a pseudo-bonus, and the mode transition lottery (at the time of winning) is conducted, the mode transition lottery (at the ceiling) described later will not be conducted.

Furthermore, in the mode transition lottery table shown in Figure 8(f), the probability of transitioning to a relatively advantageous mode for the player is higher when "Normal Replay 2" is determined as the sub-flag upon entering the advantageous section compared to when "Normal Replay 1" is determined. However, this is not the only way to favor "Normal Replay 2" over "Normal Replay 1". For example, when "Normal Replay 2" is determined as the sub-flag upon entering the advantageous section, it may be possible to determine that transitioning to a relatively advantageous mode for the player is possible with a predetermined probability, but when "Normal Replay 1" is determined as the sub-flag upon entering the advantageous section, it may be possible to prevent transitioning to a relatively advantageous mode for the player.

During the performance section (normal gameplay), if the pseudo-bonus transition lottery (upon winning) does not result in a transition to a pseudo-bonus, the ceiling game count is updated (either by addition or subtraction). When the ceiling game count reaches the ceiling game count associated with the current mode (or predetermined at the time of transition to the advantageous section, etc.), a transition to a pseudo-bonus is determined. In this case, it is possible to ensure that a "win (this game)" is always determined, or that a "win (next game)" is always determined. Alternatively, either of these can be determined by a lottery.

During the performance section (normal gameplay), if the game reaches the ceiling game count and it is determined that the game will transition to a pseudo-bonus, a mode transition lottery (at the ceiling) is conducted. Specifically, the mode transition lottery table shown in Figure 8(f) is referenced, and the destination mode is determined according to the current mode. This destination mode may include the mode during the pseudo-bonus or the mode after the pseudo-bonus ends.

Furthermore, the processing related to the pseudo-bonus transition lottery (when a win is achieved) and the pseudo-bonus transition lottery (when a prize is won) are identical except for the type of sub-flag, and can therefore be controlled using the same lottery table and control flow. Similarly, the processing related to the mode transition lottery (when a win is achieved) and the mode transition lottery (when a prize is won) are identical except for the type of sub-flag, and can therefore be controlled using the same lottery table and control flow.

Furthermore, if we were to not include "Win (Current Game)" as a type of pseudo-bonus win, then at the time the sub-flag for entering the advantageous section is determined, the sub-flag for winning in the advantageous section would already be determined, and the ceiling game count could also be updated. Therefore, the pseudo-bonus transition lottery (when winning), the pseudo-bonus transition lottery (when entering), and the pseudo-bonus transition process upon reaching the ceiling could all be performed in a single process. Similarly, the mode transition lottery (when winning), the mode transition lottery (when entering), and the mode transition lottery (when reaching the ceiling) could all be performed in a single process.

Let's return to the explanation of the gameplay of the first gaming machine. As described above, if it is decided to transition to a pseudo-bonus during the performance section (normal gameplay) and the pseudo-bonus begins (in Figure 5, "Pseudo-bonus Start"), the game transitions to the increase section (pseudo-bonus). Also, as described above, if the game is controlled to either End Mode A or End Mode B during the performance section (normal gameplay) and 32 games are played without transitioning to a pseudo-bonus (in Figure 5, "Advantageous Section End (Via End A/B)"), the game transitions to the non-advantageous section. Furthermore, if the conditions for the limit processing shown in Figure 16 (described later) are met, the advantageous section will be forcibly terminated (in Figure 5, "Advantageous Section End (Limit Processing)"), resulting in a transition to the non-advantageous section.

During the increase period (pseudo-bonus), a ceiling reduction lottery is conducted when the pseudo-bonus begins. Specifically, the ceiling reduction lottery table shown in Figure 8(e) is referenced, and it is determined whether or not to reduce the number of games until the end of the pseudo-bonus, depending on the current mode. In Figure 8(e), "Not a Winner" means that the number of games until the end of the pseudo-bonus will not be reduced, and "Winner (Ceiling Games = 0 Updated)" means that after the end of the pseudo-bonus, regardless of the mode, the set number of games until the end of the pseudo-bonus will be set to "0" (reduced). Note that the ceiling reduction lottery can be conducted not only when the pseudo-bonus begins, but also with every game played during the pseudo-bonus.

If the ceiling reduction lottery results in a decision not to shorten the ceiling game count, and the pseudo-bonus ends without any 1G consecutive win stocks (described later) being held, the ceiling game count will be set according to the current mode (in the termination mode, it will not be set because the advantageous section ends after 32 games (and is cleared accordingly), but it may be possible to set a provisional ceiling game count at this point), the pseudo-bonus will end (in Figure 5, "Pseudo-bonus ends"), and the game will transition to the performance section (normal gameplay). On the other hand, if the ceiling reduction lottery results in a decision to shorten the ceiling game count, "0 games" will be set as the ceiling game count when the pseudo-bonus ends. As a result, the pseudo-bonus will start again from the next game after the pseudo-bonus ends. In this case, since the pseudo-bonus started due to reaching the ceiling game count, the mode transition lottery (at ceiling) described above will be performed.

During the increase period (pseudo-bonus), a mode transition lottery (at the time of winning) is conducted for each game (more specifically, in games where "confirmed role" or "middle cherry" is determined as the sub-flag at the time of winning in the advantageous period). Specifically, the mode transition lottery table shown in Figure 8(f) is referenced, and the destination mode is determined according to the current mode and the sub-flag at the time of winning in the advantageous period. Note that even if a sub-flag at the time of winning in the advantageous period other than those mentioned above is determined, the destination mode may also be determined. In this case, in principle, to prevent the destination mode from being a mode that is relatively less favorable than the current mode, a different mode transition lottery table with different lottery values from the mode transition lottery table shown in Figure 8(f) may be referenced.

During the increase period (pseudo-bonus), a mode transition lottery (at the time of winning) is conducted for each game (more specifically, for games where "F_Replay A" or "F_Replay B" is drawn). Specifically, the mode transition lottery table shown in Figure 8(f) is referenced, and the destination mode is determined according to the current mode and the sub-flag at the time of entering the advantageous period. In this case, as with the above, in principle, to prevent the destination mode from being one that is relatively less favorable than the current mode, a different mode transition lottery table with different lottery values from the one shown in Figure 8(f) may be referenced.

During the increase period (pseudo-bonus), a 1G consecutive win lottery is held for each game played. Specifically, the 1G consecutive win lottery table shown in Figure 7(d) is referenced, and whether or not a 1G consecutive win occurs is determined according to the current mode and the sub-flag at the time of winning the advantageous period or the sub-flag at the time of entering the advantageous period. In Figure 7(d), "Not Winning" means that a 1G consecutive win will not occur, and "Winning (1G consecutive win + 1)" means that one right to generate a 1G consecutive win (1G consecutive win stock) is granted (the 1G consecutive win stock counter is increased by 1). It is possible to stock (store) multiple 1G consecutive win stocks (up to 255) using the 1G consecutive win stock counter. Therefore, it is possible to be granted multiple 1G consecutive win stocks during a single pseudo-bonus. Furthermore, the 1G consecutive win lottery table can be configured so that multiple 1G consecutive win stocks can be granted in a single 1G consecutive win lottery.

When the pseudo-bonus ends, if the value of the 1G consecutive bonus stock counter is 1 or greater (i.e., if you have 1G consecutive bonus stocks), one 1G consecutive bonus stock is consumed (the 1G consecutive bonus stock counter is deducted by 1), and the pseudo-bonus will start again from the next game after the pseudo-bonus ends. In this case, since the pseudo-bonus starts according to the right of having 1G consecutive bonus stocks, the mode transition lottery mentioned above does not take place. On the other hand, when the pseudo-bonus ends, if the value of the 1G consecutive bonus stock counter is not 1 or greater (i.e., you do not have 1G consecutive bonus stocks), and you have not won the ceiling reduction lottery mentioned above, the ceiling game count is set according to the current mode (in the termination mode, it is not set because the advantageous section ends after 32 games (and is cleared accordingly), but it is also possible to set the ceiling game count provisionally here), the pseudo-bonus ends ("Pseudo-bonus ends" in Figure 5), and the game transitions to the performance section (normal gameplay).

Furthermore, if you win the ceiling reduction lottery and also possess a 1G consecutive win stock, the result of the ceiling reduction lottery may take precedence, and a pseudo-bonus corresponding to the ceiling reduction may be executed first, followed by a pseudo-bonus corresponding to the 1G consecutive win stock. Alternatively, the 1G consecutive win stock may take precedence, and a pseudo-bonus corresponding to the 1G consecutive win stock may be executed first, followed by a pseudo-bonus corresponding to the ceiling reduction. In the latter case, information that the ceiling reduction exists should be stored separately.

In the first gaming machine, one example given is a pseudo-bonus that lasts for "55 games" and allows for a maximum of 275 coins to be won, but the configuration of the pseudo-bonus is not limited to this. For example, the said pseudo-bonus could be configured as a "pseudo-BB (Big Bonus)," and another pseudo-bonus, a "pseudo-RB (Regular Bonus)," could be included that lasts for "22 games" and allows for a maximum of 110 coins to be won. In this case, when it is decided to transition to a pseudo-bonus (grant the right) in the pseudo-bonus transition lottery, when the ceiling is reached, or in the 1G consecutive draw lottery, the type of pseudo-bonus (for example, whether it will be a "pseudo-BB" or a "pseudo-RB") should be determined by a predetermined probability (for example, 50% each). Furthermore, since "pseudo-RB" should have a different value from "pseudo-BB" (more specifically, a lower value than "pseudo-BB"), for example, the number of continuous games could be the same as "pseudo-BB," but the bell navigation rate (the probability of being notified of information about stopping operations) could be lowered to create a difference in the maximum number of coins that can be obtained, thus differentiating its value. Also, when starting "pseudo-RB," a reel animation should be displayed in the main display window 4 showing either "BAR" symbols aligned or "Red 7-Red 7-BAR." Moreover, the increase section is not limited to being configured as a pseudo-bonus. For example, it can also be configured as an AT state or ART state that allows for changes in the number of continuous games (playing period).

Furthermore, if the conditions for executing the limit process shown in Figure 16 (described later) are met during the pseudo-bonus, the advantageous period will be forcibly terminated (in Figure 5, "End of Advantageous Period Due to Limit Process"), resulting in a transition to a non-advantageous period.

Furthermore, the gameplay flow described above for the first gaming machine is based on the premise that the game is played with a 3-coin bet. Therefore, if the game is played with a 2-coin bet, various draws such as those shown in Figures 7(a) to (d), and Figures 8(e) and (f) will not be performed, and the maximum number of games will not be updated. Also, if the game is played with a 2-coin bet during a pseudo-bonus, the game is configured so that the number of medals does not increase in the 2-coin bet state; therefore, the pseudo-bonus period does not constitute a medal increase period. In other words, the first gaming machine is configured so that the player is generally at a disadvantage when playing with a 2-coin bet.

Here, when the game is played with two coins bet, while the draws and processing related to the advantageous period (AT) (for example, various draws using Figures 7(a) to (d), Figures 8(e) and (f), etc.) and the update of the ceiling game count (for example, the update of the ceiling game count) are not performed, it is desirable that the advantageous period game count counter for the game count limiter and the advantageous period payout counter for the payout limiter are updated. These limiters have the function of appropriately suppressing gambling tendencies by limiting the upper limit of the number of games played in the advantageous period and the number of coins acquired. If these counters were not updated in the two-coin bet state, it is possible that the upper limit of the number of games played in the advantageous period and the number of coins acquired would be exceeded due to the intervention of playing in the two-coin bet state, resulting in an inability to appropriately suppress gambling tendencies. Therefore, it is desirable that the limiter counters be configured to be updated every game regardless of the number of bets.

Furthermore, in the first gaming machine, the game flow described above is based on the premise that the game is played in a non-bonus state. Therefore, when the game is played in a bonus state (2BB state and 3BB state), various draws such as those shown in Figures 7(a) to (d), and Figures 8(e) and (f) are not performed, and the ceiling game count is not updated. Also, if a bonus state is entered during a pseudo-bonus, the bonus state is configured to have a lower expected value of medal increase than the non-bonus state (more specifically, the 3-coin bet state in the non-bonus state), so the pseudo-bonus period may not be a period of medal increase. In other words, the first gaming machine is configured in such a way that playing in a bonus state may be disadvantageous to the player.

Therefore, in the first gaming machine, it is recommended to play with a 3-coin bet between 2BB flags (in this embodiment, the 3-coin bet between 2BB flags is described as the "recommended playing state," and other states are described as "not recommended playing states"). That is, in the first gaming machine, 2BB is a bonus that can only be won with a 2-coin bet, and the combination of symbols related to 2BB between 2BB flags is awarded only with a 2-coin bet, and not with a 3-coin bet. Similarly, 3BB is a bonus that can only be won with a 3-coin bet, and the combination of symbols related to 3BB between 3BB flags is awarded only with a 3-coin bet, and not with a 2-coin bet. Furthermore, 3BB cannot be won between 2BB flags, and 2BB cannot be won between 3BB flags.

Furthermore, in the first gaming machine, using these configurations, for example, by triggering a 2BB win (without actually awarding the 2BB) in a 2-coin bet state between non-flag symbols, and then playing with a 3-coin bet state, it becomes possible to play in the recommended game state described above without having to worry about whether or not to award a bonus.

As described above, in the first gaming machine, a ceiling reduction lottery is conducted during the pseudo-bonus round. Looking at the ceiling reduction lottery table shown in Figure 8(e), when the current mode is one of the following modes: Guaranteed Mode, Heaven A Mode, Heaven B Mode, or Heaven C Mode, there is a 1/8 (32/256) probability of winning the ceiling reduction lottery. However, when in any other mode, the ceiling reduction lottery is not won. In other words, in modes where the ceiling game count is "32 games," there is a possibility that this "32 games" will be reduced to "0 games," while in modes where the ceiling game count is greater than that, there is no possibility of the ceiling game count being reduced.

Furthermore, even in modes where the maximum number of games is greater than 32, the probability of the maximum number of games being shortened may be lower than in modes where the maximum number of games is 32 (for example, 1/64).

Furthermore, the methods for shortening the ceiling game count are not limited to those described above. For example, shortening "32 games" to a predetermined number of games (0 to 31 games) can achieve a similar effect. Therefore, the number of games shortened may be further determined when the ceiling shortening lottery is won, or the number of games to be shortened may be predetermined in the ceiling shortening lottery.

Furthermore, the triggers for the ceiling reduction lottery are not limited to those mentioned above. For example, during a pseudo-bonus, the ceiling reduction lottery may be held for each game played. Also, during the advantageous section (normal gameplay), if the current mode is one of the following modes: guaranteed mode, heaven A mode, heaven B mode, or heaven C mode, the ceiling reduction lottery may be held for each game played. In these cases, the sub-flag for advantageous section win and the sub-flag for entering the advantageous section should be referenced to determine whether or not the ceiling reduction lottery is won.

Furthermore, as mentioned above, in the first gaming machine, a 1G consecutive win lottery is conducted during the pseudo-bonus. Looking at the 1G consecutive win lottery table shown in Figure 7(d), it appears that a 1G consecutive win stock may be granted regardless of the current mode. In other words, regardless of whether the mode has a ceiling of "32 games" or not, the right to continue the pseudo-bonus can be granted.

Furthermore, the manner in which these rights are granted is not limited to those described above. For example, in modes where the maximum number of games is "32," the 1G consecutive win lottery may be disabled to allow for a reduction in the maximum number of games, while in modes where the maximum number of games is greater than "32," the 1G consecutive win lottery may be enabled to prevent the game from becoming excessively speculative.

Furthermore, the triggers for the 1G consecutive win lottery are not limited to those mentioned above. For example, the 1G consecutive win lottery may be conducted during advantageous periods (performance periods) other than pseudo-bonuses, and the resulting stocked 1G consecutive wins may be used up in the next pseudo-bonus.

Although not shown in Figures 5 to 8, in the first gaming machine, at the start of a pseudo-bonus or during a pseudo-bonus, if the current mode is Heaven Mode, a special bonus animation is executed with a predetermined probability to suggest that the player is in a favorable state. Therefore, if the special bonus animation is executed, the player can expect that a ceiling reduction lottery will be performed. Furthermore, this special bonus animation may be executed with 100% probability when the ceiling reduction lottery is won. In this way, for example, if the special bonus animation is executed at the start of a pseudo-bonus, it can be suggested that the player is at least in Heaven Mode, and furthermore, the player can be expected to have won the ceiling reduction lottery. Furthermore, this special bonus animation may also be executed with a predetermined probability or with 100% probability when the 1G consecutive win lottery is won during a pseudo-bonus. This approach allows for the suggestion of various possibilities, such as (1) Heaven Mode only, (2) Heaven Mode + shortened ceiling win, (3) Heaven Mode + 1G consecutive win, (4) Heaven Mode + shortened ceiling win + 1G consecutive win, or (5) 1G consecutive win only, thereby enhancing the enjoyment of the game.

Thus, in the first gaming machine, if it is confirmed that the game will be controlled to an advantageous state again within a predetermined period (e.g., 32 games) after the end of an advantageous state (e.g., a pseudo-bonus) (e.g., in the case of Heaven Mode), that period may be further shortened. Therefore, even when the duration of a series of advantageous periods is limited (e.g., when limit processing is performed), it is possible to prevent a decline in the enjoyment of the game by allowing players to play in a state with the highest possible degree of advantage.

Furthermore, in the first gaming machine, even if it is not guaranteed that the advantageous state will be restored within a predetermined period after the advantageous state ends (for example, in the termination mode), the advantageous state may be restarted by granting a right (for example, a 1G consecutive win stock). This can increase the player's anticipation and enhance the enjoyment of the game.

Furthermore, although not shown in Figures 5 to 8, in the first gaming machine, if a "confirmed role" is determined as the sub-flag during a winning streak in the advantageous section (i.e., "F_Confirmed Cherry" or "F_Reach Eye" is determined as the internal winning role), and if the mode transition lottery results in a transition to Heaven C mode, then a special lock effect can be executed with a probability of 1/2 (this probability is arbitrary). Note that if the sub-flag "Middle Cherry" is determined during a winning streak in the advantageous section (i.e., "F_Middle Cherry" is determined as the internal winning role), the player can receive the same benefits as when a "confirmed role" is determined as the sub-flag during a winning streak. Therefore, when the sub-flag "Middle Cherry" is determined during a winning streak in the advantageous section, the special lock effect may be made executable in the same way as when a "confirmed role" is determined as the sub-flag during a winning streak.

Here, since the "confirmed role" is a role that also confirms the transition to a pseudo-bonus (see Figure 7(c)), when the special lock effect is executed, the player can recognize that a pseudo-bonus transition and a transition to Heaven C mode have occurred, making it highly engaging for the player. The special lock effect is configured, for example, as an effect that disables game operations (stop operations) for approximately 20 seconds at the start of the game. During this time, special reel effects such as vibration or reverse rotation of each reel may be performed, or special images that are not normally displayed may be shown on the main effect display unit 21. Furthermore, special music that is not normally output may be output. Of course, combinations of these can also be used to create the effect. Also, even if game operations are not disabled, these effects can be performed until the player performs the next game operation (i.e., the player can decide whether to let the effect run to completion or cancel it midway and continue the game).

However, in the first type of gaming machine, as shown in Figure 16 below, even if the player is in Heaven Mode C, for example, the advantageous period may be forcibly terminated by the execution of limit processing. Therefore, it may not be desirable to repeatedly execute the special lock animation described above.

Therefore, in the first gaming machine, the special lock effect is executed only once within the same series of advantageous periods. Specifically, if it is decided to execute the special lock effect for the first time within a series of advantageous periods, the special lock effect will be executed. However, thereafter, even if the same conditions are met within the same series of advantageous periods, the special lock effect will not be executed. As a method, once the special lock effect has been executed, information indicating that has been executed is stored. Thereafter, if this information is stored within the same series of advantageous periods, the decision of whether or not to execute the special lock effect may not be made at all. Alternatively, the decision may be made, but if the information is stored, the result of the decision, even if it indicates execution, may be rewritten to indicate no execution. The stored information should be cleared when the advantageous period ends.

Furthermore, the manner in which the execution of the special lock-out effect is restricted is not limited to those described above. For example, the maximum number of times the special lock-out effect is restricted may be set to "two times" or "three times" instead of "one time." In other words, the execution of the special lock-out effect may be restricted, but the upper limit may be set to multiple times. This can be set appropriately according to the expected value of payouts per special lock-out effect.

Furthermore, the conditions under which the special lock animation is determined are not limited to those described above. That is, while the above describes a mode transition triggered by a "winning combination" and the determination of whether the special lock animation is performed based on the condition that the current mode is Heaven C mode, there are other triggers that can lead to a transition to Heaven C mode (see Figure 8(f)). Therefore, the determination of whether the special lock animation is performed may also be made in these cases, and the execution of the special lock animation may be determined at a predetermined probability (which may be the same probability as when triggered by a "winning combination," or a different probability).

Furthermore, for example, upon winning a "guaranteed win," a decision may be made as to whether or not a special lock animation will be executed. If it is decided that the special lock animation will be executed, the game may transition to Heaven C mode. In other words, the special lock animation may be executed in response to the decision to transition to Heaven C mode, or the game may transition to Heaven C mode in response to the decision to execute the special lock animation.

Furthermore, for example, the progress of gameplay during the advantageous period may be used as a condition for determining whether or not the special lock effect is executed. For instance, when the value of the advantageous period game counter or control game counter (described later) is less than "750," or when the value of the advantageous period payout counter or control payout counter (described later) is less than "1201," the decision on whether or not the special lock effect is executed is made as described above. However, when the value of the advantageous period game counter or control game counter (described later) becomes "750" or greater, or when the value of the advantageous period payout counter or control payout counter (described later) becomes "1201" or greater, the decision on whether or not the special lock effect is executed is not made for subsequent advantageous periods.

Thus, in the first gaming machine, the duration of a series of advantageous periods is limited to a certain period (see Figure 16 below). Furthermore, even if control information that is highly advantageous to the player (e.g., Heaven C mode) is set multiple times within the same series of advantageous periods, the system is controlled so that special effects (e.g., special lock effects) are not triggered each time. Therefore, it is possible to prevent the gambling aspect of the game from becoming excessively high while also preventing a decline in the enjoyment of the game.

Furthermore, in the first gaming machine, within a series of advantageous periods, the machine is guaranteed to enter an advantageous state (e.g., a pseudo-bonus) upon winning a specific role (e.g., a "guaranteed role"), and control information with a high degree of advantage for the player (e.g., Heaven C mode) may be set. Even if this occurs multiple times within the same series of advantageous periods, the machine is controlled so that special effects (e.g., special lock effects) are not performed each time. Therefore, it is possible to prevent the game from becoming excessively gambling-oriented while simultaneously preventing a decline in the enjoyment of the game.

Furthermore, the first gaming machine is capable of determining secondary information corresponding to the determined internal winning combination (for example, a sub-flag for winning in the advantageous section), as well as secondary information corresponding to the combination of displayed symbols (for example, a sub-flag for entering the advantageous section). Based on the determined secondary information, it is possible to determine whether or not to grant an advantageous state (for example, a pseudo-bonus) in which information regarding the player's stopping operations is reported.

Thus, in the first gaming machine, the expectation of being granted a favorable state can be created not only when the internal winning combination is determined, but also when the combination of symbols is displayed, thus diversifying the gameplay related to the granting of a favorable state.

Furthermore, in the first gaming machine, information corresponding to the determined internal winning combination and information corresponding to the displayed symbol combination are both managed as common secondary information. Therefore, it is possible to suppress the increase in control load and information volume related to granting advantageous states.

Furthermore, in the first gaming machine, if the bet is a first amount (e.g., 3 coins), the first special prize (e.g., 3BB) can be won, while the second special prize (e.g., 2BB) cannot. Also, if the bet is a second amount (e.g., 2 coins), the second special prize can be won, while the first special prize cannot. Additionally, if a specific prize (e.g., "F_Replay A") is won, if the first special permission state (e.g., between 3BB flags) is active, a predetermined symbol combination (e.g., "Upward-Sloping Replay") is displayed, and if the second special permission state (e.g., between 2BB flags) is active, a specific symbol combination (e.g., "Parallel Replay") is displayed (see Figure 15 below).

Furthermore, the first gaming machine is capable of determining different secondary information depending on whether a predetermined combination of symbols is displayed or a specific combination of symbols is displayed. In other words, the first gaming machine can vary the determination regarding the granting of advantageous states depending on which special permission state is in effect, even when the same specific winning combination is determined. This allows for increased control load and information volume related to granting advantageous states, while further diversifying the gameplay.

Furthermore, in the first gaming machine, it is possible to determine whether or not to grant a favorable state when a specific winning combination is achieved and a specific combination of symbols is displayed.

In this first gaming machine, since both the predetermined symbol combination and the specific symbol combination are symbol combinations related to replay, the same benefit—the activation of replay—is granted regardless of which combination is displayed.

Furthermore, the manner in which the same benefits are granted is not limited to those described above. For example, a specific role may be configured as a specific minor role related to the granting of game value. When a specific minor role is won, for example, in the first special permission state, a combination of predetermined symbols (a combination of symbols related to the granting of game value equivalent to "upward-sloping replay") that grants one game value (this value is arbitrary and may be any other value less than or equal to the bet game value, or a value exceeding the bet game value) may be displayed. In the second special permission state, a combination of specific symbols (a combination of symbols related to the granting of game value equivalent to "parallel replay") that grants the same number of game values as when the predetermined symbol combination was displayed may be displayed.

Furthermore, both the predetermined symbol combination and the specific symbol combination may be configured as "losing" symbol combinations (however, in order to determine whether or not a favorable state is granted, the symbol combinations must be identifiable as being different from purely "losing" cases). Even in this case, the value remains the same.

Thus, in the first gaming machine, the decision regarding the granting of advantageous states can be varied depending on which special permission state is in effect, even when the same specific role is determined. This allows for diversification of gameplay while suppressing an increase in the control load and information volume related to granting advantageous states. Furthermore, since the same benefits are granted regardless of the special permission state when a specific role is determined, it is possible to prevent players from suffering direct disadvantages even when gameplay is varied.

Furthermore, in the first gaming machine, when a specific winning combination is achieved, or when the second special permission state is in effect, the machine may be configured to display a specific combination of symbols when a specific stopping operation is performed, but to prevent the display of the specific combination of symbols when the stopping operation is not performed in a specific manner.

Furthermore, it may be possible to determine whether or not to grant a favorable state when a specific winning combination is achieved and a specific combination of symbols is displayed. When a specific winning combination is determined as an internal winning combination, it may be possible to differentiate the degree of favorability regarding the granting of the favorable state depending on whether or not the specific combination of symbols is displayed.

Furthermore, if a specific winning combination is achieved, and the machine is in the first special permission state, the machine may display a predetermined combination of symbols regardless of the stopping operation method. If the machine is in the second special permission state, it may display a specific combination of symbols when the stopping operation is performed in a specific manner, and display a predetermined combination of symbols when the stopping operation is not performed in a specific manner.

In this case, the specific winning combination can be configured such that, on at least one reel, a specific symbol combination is displayed when the timing of the stop operation is appropriate (in this embodiment, this may be described as "pressed at the correct position" or "pressed at the correct position"), and a predetermined symbol combination is displayed when the timing of the stop operation is inappropriate (in this embodiment, this may be described as "pressed at the incorrect position" or "pressed at the incorrect position"). This allows the degree of advantage regarding the granting of a favorable state to be varied based on the player's stop operation (and its timing), thus encouraging the player to concentrate more on the game and improving the enjoyment of the game.

Furthermore, as mentioned above, specific roles can also be configured as specific minor roles. In this case, at least one reel can be configured such that when the timing of the stop operation is appropriate (pressed at position ○), a specific symbol combination is displayed and a predetermined number of game values are awarded, and when the timing of the stop operation is inappropriate (pressed at position ×), a predetermined symbol combination is displayed and a specific number of game values are awarded. In this case, the predetermined number may be the same as the specific number (i.e., the same bonus). Also, the predetermined number may be awarded with a greater game value than the specific number. Also, the predetermined number may be awarded with a less game value than the specific number. In addition, at least one of the specific symbol combinations and the predetermined symbol combinations may be the symbol combination when a miss occurs. That is, either the predetermined number or the specific number may be set to "0". This allows not only to vary the degree of advantage granted based on the timing of the player's stop operation, but also to change the content of the direct benefits. This encourages players to concentrate more on the game, further diversifies the gameplay, and enhances the enjoyment of the game.

Furthermore, if there is only one type of specific winning combination, the timing for appropriate stopping operations becomes limited. Therefore, it is desirable to have multiple specific winning combinations with different timings for appropriate stopping operations. For example, on a single reel, there may be a first specific winning combination where, when the stopping operation is performed at the first timing, the appropriate stopping operation is performed and the specific symbol combination is displayed, but when the stopping operation is performed at any other timing, the appropriate stopping operation is not performed and the specific symbol combination is not displayed; a second specific winning combination where, when the stopping operation is performed at a second timing different from the first timing, the appropriate stopping operation is performed and the specific symbol combination is displayed, but when the stopping operation is performed at any other timing, the appropriate stopping operation is not performed and the specific symbol combination is not displayed; and a third specific winning combination where, when the stopping operation is performed at a third timing different from the first and second timings, the appropriate stopping operation is performed and the specific symbol combination is displayed, but when the stopping operation is performed at any other timing, the appropriate stopping operation is not performed and the specific symbol combination is not displayed. These should all be designed to have the same winning probability.

Furthermore, in this case, the specific winning combination can be configured such that a specific symbol combination is displayed when the batting order is correct (correct button press order), and a predetermined symbol combination is displayed when the batting order is incorrect (incorrect button press order). This allows the degree of advantage regarding the granting of a favorable state to be varied based on the player's stopping operation (procedure), thus encouraging the player to concentrate more on the game and improving the enjoyment of the game.

Furthermore, as mentioned above, specific roles can also be configured as specific minor roles. In this case, when the batting order is correct (correct button press order), a specific symbol combination is displayed and a predetermined number of game values are awarded. When the batting order is incorrect (incorrect button press order), a predetermined symbol combination is displayed and a specific number of game values are awarded. In this case, the predetermined number may be the same as the specific number (i.e., the same bonus). Alternatively, the predetermined number may award a greater game value than the specific number. Alternatively, the predetermined number may award a less game value than the specific number. In addition, at least one of the specific symbol combinations and the predetermined symbol combinations may be the symbol combination when a miss occurs. That is, either the predetermined number or the specific number may be set to "0". This allows not only to change the degree of advantage regarding the awarding of advantageous states due to the player's stopping operation (procedure), but also to change the content of direct bonuses. As a result, players will be able to concentrate more on the game, the gameplay will be further diversified, and the enjoyment of the game will be enhanced.

Furthermore, if there is only one type of specific winning combination, the appropriate batting order is limited. Therefore, it is desirable to have multiple specific winning combinations that result in different appropriate batting orders. For example, a first specific winning combination could be provided where, when the left reel is stopped first, the appropriate stopping operation is performed and a specific symbol combination is displayed, but when the middle or right reel is stopped first, the appropriate stopping operation is not performed and the specific symbol combination is not displayed; a second specific winning combination could be provided where, when the middle reel is stopped first, the appropriate stopping operation is performed and a specific symbol combination is displayed, but when the left or right reel is stopped first, the appropriate stopping operation is not performed and the specific symbol combination is not displayed; and a third specific winning combination could be provided where, when the right reel is stopped first, the appropriate stopping operation is performed and a specific symbol combination is displayed, but when the left or middle reel is stopped first, the appropriate stopping operation is not performed and the specific symbol combination is not displayed. These should all be designed to have the same probability of winning.

Up to this point, we have described how, in a unit game where a specific role is won, the stopping operation method (at least one or both of the timing and order of the stopping operation) can change the transition determination process from the non-advantageous section to the advantageous section, and the determination process regarding the granting of an advantageous state in the advantageous section (including pseudo-bonus transition lottery, mode transition lottery, and other processes that change the degree of advantage of the game situation in the advantageous section). Among such changes, those that are relatively disadvantageous to the player (or may result in disadvantage) can be considered the aforementioned penalties. Therefore, when such changes occur, the system may be configured to generate an optional visual effect (warning notification) to alert the player.

Furthermore, in the first gaming machine, when a specific winning combination is achieved, the likelihood of being granted an advantageous state is higher when a specific combination of symbols is displayed than when a predetermined combination of symbols is displayed. In other words, assuming a three-coin bet, the second special permission state (for example, between two BB flags) is more favorable in granting an advantageous state than the first special permission state (for example, between three BB flags).

Furthermore, in the first gaming machine, when a predetermined role (for example, "Push Order Bell B" described later) is won, if the first special permission state is active, the combination of symbols awarded (for example, a combination of symbols that pays out 8 coins) is displayed regardless of the order of pressing the buttons. However, in the second special permission state, if the button pressing order is the predefined correct order, the combination of symbols awarded is displayed. If the button pressing order is not the predefined correct order, the combination of symbols awarded is not displayed, resulting in a missed opportunity with no game value awarded, or a combination of symbols that awards less game value than the combination of symbols awarded would have been displayed (for example, a combination of symbols that pays out 1 coin). In other words, without considering the operation of the advantageous state, the first special permission state is a state in which game value is awarded more favorably than in the second special permission state.

In other words, even if a player is in a non-recommended playing state, if they play with a 3-coin bet between 3BB flags, the probability of being granted an advantageous state is not favored, but the probability of gaining game value when the advantageous state is not active is favored. Therefore, the difference in the slope value between when the advantageous state is active and when it is not is relatively small, allowing the player to continue playing. This state, where the possibility of the player rapidly increasing game value is reduced, but the player's game value is less likely to decrease, can be defined as a "stable state."

On the other hand, if a player plays under recommended conditions, the probability of being granted an advantageous state is favored, but the probability of gaining game value when the advantageous state is not active is not favored. Therefore, the difference in the slope value between when the advantageous state is active and when it is not is relatively large. This state, where the possibility of a player rapidly increasing their game value is high, but the player's game value is also likely to decrease, can be defined as, for example, a "volatile state."

Here, the methods for creating the two states, stable and volatile, are not limited to those described above. For example, in the "stable state," the probability of transitioning to a pseudo-bonus is increased in the pseudo-bonus transition lottery described above compared to the "volatile state," while the probability of transitioning to Heaven Mode in the mode transition lottery described above is decreased compared to the "volatile state." Similarly, in the "volatile state," the probability of transitioning to a pseudo-bonus is decreased in the pseudo-bonus transition lottery described above compared to the "stable state," while the probability of transitioning to Heaven Mode in the mode transition lottery described above is increased compared to the "stable state." In this way, in the "stable state," it is easy to hit a pseudo-bonus initially, but difficult to achieve consecutive wins. In the "volatile state," it is possible to create a state where it is difficult to hit a pseudo-bonus initially, but easy to achieve consecutive wins. Regarding the stopping control of predetermined roles, as described above, it may vary between the 2BB flag and the 3BB flag, or it may be different (i.e., no preferential treatment between the 3BB flags).

[5-2. Symbol arrangement configuration of the first gaming machine]
Next, with reference to Figure 9, the symbol arrangement configuration of the first gaming machine will be explained. Figure 9 is a diagram showing an example of a symbol arrangement table for the first gaming machine. As shown in Figure 9, in the first gaming machine, 10 types of symbols—"Red 7", "BAR", "Replay", "Bell", "Watermelon", "Cherry", "Red Blank", "Yellow Blank", "White Blank 1", and "White Blank 2"—are arranged in the positions shown in Figure 9 on each of the reels 3L, 3C, and 3R. In addition, as shown in the symbol code table, each symbol is assigned a symbol code from 1 to 10.

[5-3. Internal Winning Combination of the First Gaming Machine]
Next, the internal winning combination configuration of the first gaming machine will be explained with reference to Figures 10 to 15. Figure 10 is a diagram showing an example of the internal lottery table of the first gaming machine. Figures 11 to 14 are diagrams showing an example of the symbol combination table of the first gaming machine. Figure 15 is a diagram showing an example of the correspondence between the internal winning combinations, stop operation patterns, and display combinations of the first gaming machine. Specifically, the following will explain the types of internal winning combinations that are drawn in the first gaming machine, and which combination of symbols (which can also be called display combinations, winning combinations, stop display patterns, display results, etc.) is displayed depending on the stop operation pattern (i.e., the order of play and the timing of the stop operation) when a winning combination is achieved.

First, in the first gaming machine, in the internal lottery process described later (see Figure 26), each internal winning combination shown in Figure 10 is drawn with the probability shown in Figure 10 (draw value / probability denominator: 65536). The combinations of symbols permitted to be displayed when each internal winning combination is drawn are as shown in "Corresponding Symbol Combinations" in Figure 10. Furthermore, in Figures 11 to 14, "BB" indicates a combination of symbols related to a bonus combination, "REP" indicates a combination of symbols related to a replay combination, and "FRU" indicates a combination of symbols related to a minor win.

"F_2BB" is configured to be an internal winning combination when played with a 2-coin bet during a non-bonus state (more specifically, between non-flag states), but not when played with a 3-coin bet. In a game where "F_2BB" is won with a 2-coin bet, or in a game where there is a "miss" between 2BB flags, if the button press position is ○ on each reel, "BB01" will be displayed, and the game will transition to the 2BB state (a bonus state based on 2BB). On the other hand, "BB01" will never be displayed in a 3-coin bet state, even between 2BB flags.

"F_3BB" is configured to be an internal winning combination when played with a 3-coin bet during a non-bonus state (more specifically, between non-flag states), but not when played with a 2-coin bet. In a game where "F_3BB" is won with a 3-coin bet, or in a game where there is a "miss" between 3BB flags, "BB02" is displayed if the button press position is ○ for each reel, and the game transitions to the 3BB state (a bonus state based on 3BB). On the other hand, "BB02" will never be displayed in a 2-coin bet state, even between 3BB flags.

In the 2BB and 3BB states, the draw value in the "Bonus State" column in Figure 10 is referenced to determine the internal winning combination (only 3-coin bets are allowed to start the game). During the 2BB and 3BB states, the game is always controlled to be in the RB state (RB state), which is a special first-class bonus feature. The RB state is controlled to terminate and then reactivate after two winning combinations or two games have been played. Furthermore, in the first game machine, the termination condition for the 2BB state is defined as the payout of more than one coin in the 2BB state, and the termination condition for the 3BB state is defined as the payout of more than 176 coins in the 3BB state.

Here, when the 2BB state or 3BB state ends, a special mode transition process is performed. For example, if the mode when transitioning to the bonus state (since mode transitions do not occur during the bonus state, this is equivalent to when the bonus state ends), i.e., the current mode, is "Start Mode," then the transition destination mode will be "Start Mode." Also, if the current mode is one of "Normal A Mode," "Normal B Mode," "Heaven Preparation Mode," or "Chance Mode," then the transition destination mode will be "Normal A Mode." Also, if the current mode is one of "End A Mode" or "End B Mode," then the transition destination mode will be "End A Mode." Also, if the current mode is one of "Guarantee Mode," "Heaven A Mode," "Heaven B Mode," or "Heaven C Mode," then the transition destination mode will be "Guarantee Mode."

"F_Replay A" is configured to be determined as an internal winning combination regardless of the number of bets in a non-bonus state. When determined as an internal winning combination, between non-flags and between 2BB flags, regardless of the stopping operation, one of "REP64" to "REP72" (these display the "Replay" symbol in a straight line at the bottom or middle, and can therefore be collectively called "Parallel Replays." "REP64" to "REP71" can be collectively called "Bottom Replays," and "REP72" can be called "Middle Replay") will be displayed, and a replay will be granted. On the other hand, between 3BB flags, regardless of the stopping operation, "REP73" (this displays the "Replay" symbol diagonally upwards to the right, and can therefore be called "Diagonal Replay") will be displayed, and a replay will be granted.

"F_Replay B" is configured to be determined as an internal winning combination regardless of the number of bets in a non-bonus state. It can also be configured so that it can be determined as an internal winning combination in a 3-coin bet state, but not in a 2-coin bet state. When determined as an internal winning combination, regardless of the state or the stopping operation, "Parallel Replay" will be displayed, and a re-game will be granted.

The "F_Cherry" symbol is configured to be determined as an internal winning combination regardless of the number of bets in a non-bonus state. It can also be configured so that it is determined as an internal winning combination in a 3-coin bet state, but not in a 2-coin bet state. If it is determined as an internal winning combination, in a 2-coin bet state, regardless of the stopping operation, a "Middle Replay" is displayed, and a re-spin is granted. In a 3-coin bet state, if the left reel 3L is pressed in the ○ position, either "REP28" or "REP60" to "REP63" (these can be collectively called "Cherry Replays" as they display the "Cherry" symbol in the lower position on the left reel 3L) is displayed, and a re-spin is granted. On the other hand, if the pressed position is ×, other replays (for example, "REP57" to "REP59") are displayed, and a re-spin is granted.

"F_Confirmed Cherry" is configured to be determined as an internal winning combination regardless of the number of bets when not in bonus mode. It can also be configured so that it is determined as an internal winning combination when betting 3 coins, but not when betting 2 coins. When determined as an internal winning combination, in 2-coin mode, regardless of the stopping operation, "Middle Replay" is displayed and a re-play is granted. In 3-coin mode, if the pressing order is one of "Order 1" to "Order 4", at least for left reel 3L, if the pressing position is ○, one of "REP42" to "REP56" (these display the "Cherry" symbol in the lower position on left reel 3L, and since symbols that can raise the player's expectations on other reels, such as "REP42," are also displayed, these can be collectively referred to as "Confirmed Cherry Replay") and a re-play is granted. On the other hand, if the button press position is marked with an "X," other replays (for example, the aforementioned "Cherry Replay" or "REP29" to "REP41") will be displayed, and a replay will be granted. Also, if the button press order is either "Bat Order 5" or "Bat Order 6," regardless of the stopping operation, a "Middle Replay" will be displayed, and a replay will be granted.

The "F_Middle Cherry" is configured to be determined as an internal winning combination regardless of the number of bets when not in bonus mode. It can also be configured so that it is determined as an internal winning combination when betting 3 coins, but not when betting 2 coins. When determined as an internal winning combination, in 2-coin mode, regardless of the stopping operation, "Middle Replay" is displayed and a re-spin is granted. In 3-coin mode, if the pressing order is one of "Order 1" to "Order 4", at least for left reel 3L, if the pressing position is ○, one of "REP15" to "REP19" (these can be collectively called "Middle Cherry Replay" as they display the "Cherry" symbol in the middle position on left reel 3L) is displayed and a re-spin is granted. On the other hand, if the pressing position is ×, other replays (for example, "REP20" to "REP27") are displayed and a re-spin is granted. Furthermore, if the button press order is either "Bat Order 5" or "Bat Order 6," regardless of the stopping operation, "Middle Reel Replay" will be displayed, and a re-play will be granted.

The "F_Reach Symbol" is configured to be determined as an internal winning combination regardless of the number of bets in a non-bonus state. It can also be configured so that it is determined as an internal winning combination in a 3-coin bet state, but not in a 2-coin bet state. If it is determined as an internal winning combination, in a 2-coin bet state, a "Middle Reel Replay" is displayed regardless of the stopping operation, and a re-game is granted. In a 3-coin bet state, if the button press order is any of "Butt Order 1" to "Butt Order 4", one of "REP01" to "REP14" (these are conventionally configured as combinations of symbols that can definitively notify (or suggest) a transition to a state advantageous to the player, and these can be collectively referred to as "Reach Symbol Replays") is displayed regardless of the stopping operation, and a re-game is granted. Furthermore, if the button press order is either "Butt Order 5" or "Butt Order 6", a "Middle Reel Replay" is displayed regardless of the stopping operation, and a re-game is granted.

The "F_Watermelon" symbol is configured to be determined as an internal winning combination regardless of the bet amount in a non-bonus state. When determined as an internal winning combination, if the button is pressed in the ○ position on each reel, one of "FRU10" to "FRU12" (these display consecutive "Watermelon" symbols and can therefore be collectively referred to as "Watermelon") will be displayed, and if a 3-coin bet is made, 3 coins will be dispensed; if a 2-coin bet is made, 2 coins will be dispensed. On the other hand, if the button is pressed in the × position, one of "FRU08" or "FRU09" (these do not display consecutive "Watermelon" symbols and can therefore be collectively referred to as "Watermelon Spill") will be displayed, and 1 coin will be dispensed. Note that if the button is pressed in the × position, it is also possible to configure the machine to cause a "slip-up" and dispense 0 coins.

"F_Bell 123A1", "F_Bell 123A2", "F_Bell 132A1", "F_Bell 132A2", "F_Bell 213A1", "F_Bell 213A2", "F_Bell 231A1", "F_Bell 231A2", "F_Bell 312A1", "F_Bell 312A2", "F_Bell 321A1", and "F_Bell 321A2" are configured to be determined as internal winning combinations regardless of the number of bets in a non-bonus state. These can be collectively referred to as "Push Order Bell A".

As shown in Figure 15, "Push Order Bell A" is a push order small win with 6 choices (one of the batting orders from "Batting Order 1" to "Batting Order 6" is the correct push order). When it is determined as an internal winning win, if the stop operation is performed with the corresponding correct push order, one of the following "bells" will be displayed: "Diagonal Right Bell" ("FRU03"), "Upper Bell" ("FRU01" and "FRU02"), "Middle Bell" ("FRU04"), "Upward Right Bell" ("FRU05"), "Small Mountain Bell" ("FRU06"), and "Lower Bell" ("FRU07"). If 3 coins are bet, 8 coins will be paid out, and if 2 coins are bet, 2 coins will be paid out. On the other hand, if the stop operation is not performed in the correct sequence, and the first stop operation is correct, there is a 1/2 probability that the button press position will be ○ in the remaining stop operations. If the button press position is ○, one of the winning "single-coin payouts" ("FRU13" to "FRU116") will be displayed, and one coin will be dispensed. On the other hand, if the button press position is ×, a loss occurs and no coins are dispensed. Also, if the first stop operation is incorrect, there is a 1/8 probability that the button press position will be ○ in the remaining stop operations. If the button press position is ○, one of the winning "single-coin payouts" will be displayed, and one coin will be dispensed. On the other hand, if the button press position is ×, a loss occurs and no coins are dispensed.

"F_Bell 123B1", "F_Bell 123B2", "F_Bell 132B1", "F_Bell 132B2", "F_Bell 213B1", "F_Bell 213B2", "F_Bell 231B1", "F_Bell 231B2", "F_Bell 312B1", "F_Bell 312B2", "F_Bell 321B1", and "F_Bell 321B2" are configured to be determined as internal winning combinations regardless of the bet amount in non-bonus states. These can be collectively referred to as "Push Order Bell B".

As shown in Figure 15, "Push-Order Bell B" is not a push-order minor role between the 3BB flags in the 2-coin bet state and the 3-coin bet state. If it is determined as an internal winning role, one of the aforementioned "bells" will be displayed regardless of the stopping operation. If the 3-coin bet state is active, 8 coins will be dispensed; if the 2-coin bet state is active, 2 coins will be dispensed.

Furthermore, as shown in Figure 15, "Push-Order Bell B" is a push-order small win in states other than between the 3BB flags in the 3-coin bet state (between non-flags in the 3-coin bet state, and between the 2BB flags in the 3-coin bet state). If it is determined to be an internal winning combination, and the stop operation is performed with the corresponding correct push order, one of the above-mentioned "bells" will be displayed and 8 medals will be paid out. On the other hand, if the stop operation is not performed with the corresponding correct push order, if the first stop operation is correct, there is a 1/2 probability that the press position will be ○ in the remaining stop operations. If the press position is ○, one of the winning "1-coin wins" will be displayed and 1 medal will be paid out. On the other hand, if the press position is ×, a loss occurs and no medals are paid out. Also, if the first stop operation is incorrect, there is a 1/8 probability that the press position will be ○ in the remaining stop operations. If the press position is ○, one of the winning "1-coin wins" will be displayed and 1 medal will be paid out. On the other hand, if the button is pressed in the wrong position, a missed coin will be dispensed and no coins will be paid out.

The "F_RB (8 coins)" combination is configured to be determined as an internal winning combination during bonus mode. When determined as an internal winning combination, one of the aforementioned "bell" symbols will be displayed regardless of the stopping operation, and 8 coins will be dispensed.

The "F_RB (1 coin)" combination is configured to be determined as an internal winning combination during bonus mode. When determined as an internal winning combination, regardless of the stopping operation, one of the aforementioned "1-coin combinations" (more specifically, "FRU117" to "FRU120" are added) will be displayed, and one coin will be dispensed.

The internal lottery table shown in Figure 10, the symbol combination tables shown in Figures 11 to 14, and the correspondence between internal winning combinations, stop operation patterns, and display combinations shown in Figure 15 are merely examples and are not limited to the patterns shown.

For example, in the first gaming machine, a "miss" can occur in various situations, such as a pure "miss," a "miss" occurring when "BB01" is missed in a 2-bet state where "BB01" can be displayed, a "miss" occurring when "BB02" is missed in a 3-bet state where "BB02" can be displayed, a "miss" occurring due to being in a 3-bet state between 2BB flags, a "miss" occurring due to being in a 2-bet state between 3BB flags, or a "miss" occurring due to missing a "push-order small win." Therefore, in order to make the combination of symbols displayed as a "miss" different in some or all of these cases, these different symbol combinations can be predetermined in a symbol combination table, and these can also be permitted to be displayed as "corresponding symbol combinations" according to the determined internal winning combination, thereby making the symbol combination related to the "miss" displayed different depending on the state, etc.

[5-4. Limit Processing Configuration for the First Gaming Machine]
Next, with reference to Figure 16, the limit processing configuration of the first gaming machine will be explained. Figure 16 is a diagram illustrating an example of each limit processing in the first gaming machine. As shown in Figure 16, the first gaming machine is configured to execute the following limit processing: normal limit processing (number of games), normal limit processing (number of payouts), special limit processing (number of games), special limit processing (number of payouts), semi-limit processing (number of games), and semi-limit processing (number of payouts). Note that this is just one example of executable limit processing, and it is also possible to execute limit processing other than these limit processing, or to not execute some of these limit processing.

The normal limit processing (game count) is executed when the value of the advantageous section game count counter reaches "1500" or more (i.e., when 1500 consecutive games have been played during the advantageous section). The advantageous section game count counter begins counting the number of games played from the start of the advantageous section (including the performance section) and ends counting and is cleared (initialized) when the advantageous section ends (including when the limit processing is activated). Furthermore, the advantageous section game count counter counts regardless of whether the bet is 2 or 3 coins. The advantageous section game count counter also counts in both the 2BB state and the 3BB state.

When the normal limit processing (number of games) is executed (activated), the advantageous period is forcibly terminated and the game transitions to a non-advantageous period, regardless of whether it is in a performance period or an increase period (pseudo-bonus). At this time, all information related to the advantageous period (for example, information used to control the performance period or increase period, information related to the current mode, information related to the duration of the pseudo-bonus, information related to the ceiling game count or whether the ceiling has been shortened, the value of the 1G consecutive win stock counter, and other various information obtained during that advantageous period, as well as various information necessary to control that advantageous period) is also cleared (initialized).

The normal limit processing (payout count) is executed when the value of the advantageous section payout counter reaches "2401" or more (i.e., when the number of medals paid out during the advantageous section exceeds 2400). The advantageous section payout counter starts counting the number of medals paid out (here, for example, "net increase (difference in medals)") from the start of the advantageous section (including the performance section), and stops counting and is cleared (initialized) when the advantageous section ends (including the end due to the activation of the limit processing). The advantageous section payout counter also performs counting regardless of whether the bet is 2 or 3 medals. Furthermore, the advantageous section payout counter also performs counting in the 2BB state and 3BB state. In addition, if a "miss" or "missed medal" occurs during the advantageous section, the value to be counted is appropriately subtracted according to the actual payout (for example, "-2 medals" or "-3 medals", etc.). Therefore, if the number of medals decreases instead of increasing after the start of the advantageous period, the value may become negative (or, it can be configured so that "0" is always maintained if the value becomes negative). In other words, the advantageous period payout counter can count from the lowest point of medals paid out during the advantageous period up to the defined highest point (difference in medals: 2400).

When the normal limit processing (payout limit) is executed (activated), the advantageous period is forcibly terminated and the game transitions to a non-advantageous period, regardless of whether it is in a performance period or an increase period (pseudo-bonus) period. At this time, all information related to the advantageous period is also cleared (initialized).

The special limit processing (game count) is executed when the value of the control game counter reaches "1445" or more (i.e., when 1445 consecutive games have been played during the advantageous period). The control game counter begins counting the number of games from the start of the advantageous period (including the performance period) and ends counting and is cleared (initialized) when the advantageous period ends (including when the limit processing is activated). Furthermore, the control game counter counts when the bet is 3 coins, but does not count when the bet is 2 coins. Also, the control game counter counts when in a non-bonus state, but does not count in the 2BB state or 3BB state. However, the control game counter can also be configured similarly to the advantageous period game counter.

When the special limit processing (number of games) is executed (activated), if a pseudo-bonus is in progress (i.e., during an increasing period), the advantageous period will be forcibly terminated when the pseudo-bonus ends, without forcibly ending the pseudo-bonus midway, and the game will transition to a non-advantageous period. At this time, all information related to the advantageous period mentioned above will also be cleared (initialized).

On the other hand, if the game is not in a pseudo-bonus phase (i.e., in a performance phase), it will first forcibly transition to a pseudo-bonus. That is, even without winning the pseudo-bonus transition lottery, the game will transition to a pseudo-bonus through the execution of this special limit process (number of games). Then, when the transitioned pseudo-bonus ends, the advantageous phase will forcibly end accordingly, and the game will transition to a non-advantageous phase. At this time, all information related to the advantageous phase mentioned above will also be cleared (initialized).

Here, we note that the value of the advantageous section game counter where the normal limit processing (game count) is executed (activated) is "1500," while the value of the control game counter where the special limit processing (game count) is executed (activated) is "1445." Considering that the maximum number of games (possible continuation period) during the pseudo-bonus in the first gaming machine is "55 games" (see Figure 5), this difference reflects the consideration of the playable period during the pseudo-bonus.

In other words, the normal limit processing (game count) is implemented to curb excessive gambling tendencies in the game, and is performed when a predetermined regulated period of gameplay has been reached within the advantageous section. However, if this normal limit processing (game count) is performed immediately after the start of a pseudo-bonus or during it, players may feel distrust or a sense of loss, which can diminish the enjoyment of the game. Therefore, in the first gaming machine, the special limit processing (game count) is performed during gameplay that is 55 games before the normal limit processing (game count) is executed, thereby preventing the pseudo-bonus from ending prematurely and causing players to feel distrust or a sense of loss.

Furthermore, from this perspective, the timing at which the special limit processing (number of games) is executed (activated) is not limited to those described above. For example, the special limit processing (number of games) may be executed in a game played a number of times earlier than the game in which the normal limit processing (number of games) is executed, equal to the possible continuation period per two increase intervals (55 games x 2 sets = 110 games). Also, for example, to give a slight grace period, the special limit processing (number of games) may be executed in a game played a number of times earlier than the game in which the normal limit processing (number of games) is executed, equal to the possible continuation period per increase interval (55 games) + grace period (2 games). In addition, for example, in the case of a specification where a premonition state is passed before transitioning to a pseudo-bonus, and the maximum number of games played in this premonition state is "4 games", the special limit processing (number of games) may be executed in a game played a number of times earlier than the possible continuation period per increase interval (55 games) + maximum premonition period (4 games). In other words, the timing at which the special limit processing (number of games) is executed (activated) can be any timing prior to the timing at which the normal limit processing (number of games) is executed, and can be set appropriately according to the individual game specifications, etc.

The special limit processing (payout count) is executed when the value of the control payout counter reaches "2126" or higher (i.e., when the number of medals paid out during the advantageous period exceeds 2125). The control payout counter begins counting the number of medals paid out (here, for example, "net increase (difference in medals)") from the start of the advantageous period (including the performance period), and ends counting and is cleared (initialized) when the advantageous period ends (including the end due to the activation of the limit processing). Furthermore, the control payout counter counts when the bet is 3, but does not count when the bet is 2. Also, the control payout counter counts when in a non-bonus state, but does not count in the 2BB state or 3BB state.

Furthermore, when a "miss" occurs during the advantageous period, the control payout counter subtracts a value according to the actual payout (for example, "-3 coins"). However, when a "miss" occurs during the advantageous period (at least when a difference occurs from the maximum number of medals paid out), the control payout counter counts the number of medals paid out as if no "miss" (or difference) had occurred. Specifically, for example, in a game where a player bets 3 coins and wins "Push Order Bell A," if the order of pressing the buttons is correct, the maximum number of coins paid out will be "8" (a difference of "+5"). However, if the order of pressing the buttons is incorrect, if the button press position is correct, the number of coins paid out will be "1" (a difference of "-2"). If the button press position is incorrect, a coin will be missed and the number of coins paid out will be "0" (a difference of "-3"). However, the control payout counter will count a difference of "+5" in all cases during the game.

Furthermore, if, for example, the 2BB state or 3BB state is activated and the value of the advantageous section payout counter becomes greater than the value of the control payout counter, the value of the control payout counter will be corrected to match the value of the advantageous section payout counter. Note that the control payout counter can also be configured similarly to the advantageous section payout counter.

When the special limit processing (payout limit) is executed (activated), if a pseudo-bonus is in progress (i.e., during an increasing period), the advantageous period will be forcibly terminated when the pseudo-bonus ends, without prematurely ending the pseudo-bonus, and the game will transition to a non-advantageous period. At this time, all information related to the advantageous period mentioned above will also be cleared (initialized).

On the other hand, if the game is not in a pseudo-bonus phase (i.e., in a performance phase), it will first forcibly transition to a pseudo-bonus. That is, even without winning the pseudo-bonus transition lottery, the game will transition to a pseudo-bonus through the execution of this special limit processing (payout amount). Then, when the transitioned pseudo-bonus ends, the advantageous phase will forcibly end accordingly, and the game will transition to a non-advantageous phase. At this time, all information related to the advantageous phase mentioned above will also be cleared (initialized).

Here, we note that the value of the advantageous section payout counter, where the normal limit processing (payout count) is executed (activated), is "2401," while the value of the control game counter, where the special limit processing (payout count) is executed (activated), is "2126." Considering that the maximum number of coins obtainable during the pseudo-bonus (amount of playable value that can be awarded) in the first gaming machine is "275 coins" (see Figure 5), this difference reflects the amount of playable value that can be awarded during the pseudo-bonus.

In other words, the normal limit processing (payout) is executed when a predetermined regulated amount of game value is granted during the advantageous period, in order to curb the excessive gambling aspect of the game. However, if this normal limit processing (payout) is executed immediately after the start of a pseudo-bonus or during it, players may feel distrust or a sense of loss, and the enjoyment of the game may decrease. Therefore, in the first gaming machine, special limit processing (payout) is executed when the amount of game value granted is less than the amount of game value at which the normal limit processing (payout) is executed, by the amount of game value that can be granted per increase period (275 coins). This prevents the pseudo-bonus from ending prematurely and causing players to feel distrust or a sense of loss.

Furthermore, from this perspective, the timing at which the special limit processing (payout) is executed (activated) is not limited to those described above. For example, the special limit processing (payout) may be executed when the amount of game value awarded is less than the amount of game value awarded when the normal limit processing (payout) is executed, by the amount of game value that can be awarded per two increase intervals (275 coins x 2 sets = 550 coins). Alternatively, for example, to provide a slight grace period, the special limit processing (number of games) may be executed when the amount of game value awarded is less than the amount of game value awarded when the normal limit processing (payout) is executed, by the amount of game value that can be awarded per increase interval (275 coins) plus the amount of game value equivalent to the grace period (8 coins). In other words, the timing at which the special limit processing (payout) is executed (activated) can be any timing prior to the timing at which the normal limit processing (payout) is executed, and can be set appropriately according to the individual game specifications, etc.

The semi-limit processing (game count) is executed when the value of the control game count counter is multiplied by the value of the 1G consecutive win counter (adding an additional "1" if the ceiling reduction lottery is won and "ceiling reduction available") and "55" (i.e., the possible duration of the pseudo-bonus). The result of this addition is "1390" or more. For example, if the 1G consecutive win counter value is "1" and "ceiling reduction available" is indicated, the latter value becomes "55 x 2 = 110". Therefore, the semi-limit processing (game count) is executed (activated) when the control game count counter value becomes "1280".

The semi-limit processing (payout count) is executed when the value of the control payout counter is multiplied by the value of the 1G consecutive counter (adding an additional "1" if the ceiling reduction lottery is won and "ceiling reduction is available") and "275" (i.e., the amount of game value for which a pseudo-bonus can be awarded). The result of this addition is "1851" or greater. For example, if the 1G consecutive counter value is "1" and "ceiling reduction is available," the latter value becomes "275 x 2 = 550," so the semi-limit processing (payout count) is executed (activated) when the control payout counter value becomes "1301." Note that both the semi-limit processing (game count) and the semi-limit processing (payout count) perform the same regulation; therefore, once one's activation condition is met and it is activated, it is not necessary for the other to activate even if its activation condition is met.

When the quasi-limit processing (number of games) or the preparation limit processing (number of payouts) is executed (activated), the 1G consecutive win lottery and the ceiling reduction lottery mentioned above will not be executed during the pseudo-bonus in the subsequent series of advantageous periods. In other words, the extension of the game period in the increase period is suppressed. However, the method of suppressing the extension of the game period in the increase period is not limited to this. For example, in the 1G consecutive win lottery mentioned above, the probability of winning a 1G consecutive win may be made lower than usual, or in the ceiling reduction lottery mentioned above, the probability of winning a ceiling reduction may be made lower than usual. In other words, the 1G consecutive win lottery and the ceiling reduction lottery themselves are executed, but it may be made more difficult to win these lotteries. Also, for example, in the performance period after the execution of the quasi-limit processing (number of games), the lottery value that results in a win in the pseudo-bonus transition lottery may be made lower to make it more difficult to transition to a pseudo-bonus. Alternatively, the probability of a mode transition favorable to the player being determined in the mode transition lottery could be lowered, making it less likely for pseudo-bonuses to occur in consecutive rounds.

Furthermore, once the quasi-limit processing (number of games) or quasi-limit processing (number of payouts) is executed (activated), during the subsequent advantageous period, special processing is performed when a "guaranteed win" (see Figure 7(a)) occurs during the performance period. Below, this special processing will be explained using the example where the "guaranteed win" is "F_Guaranteed Cherry" (hereinafter sometimes simply referred to as "Guaranteed Cherry").

When neither the semi-limit processing (number of games) nor the semi-limit processing (number of payouts) is activated, if a "confirmed cherry" is drawn during the performance section (which may also be during the increase section), a "win (next game)" is determined in the pseudo-bonus transition lottery (see Figure 7(c)). In addition, in the first game machine, the "cherry" symbol on the left reel 3L is a symbol that is highly anticipated by the player, so in games where information on stopping operations is not announced, the general procedure for the player is to stop the left reel first, aiming for the "cherry" symbol (or the "BAR" symbol as a guide). Therefore, when the game is played using the general procedure, when a "confirmed cherry" is drawn, the "cherry" symbol will first stop on the lower part of the left reel 3L at the left reel first stop. Furthermore, if neither the semi-limit processing (number of games) nor the semi-limit processing (number of payouts) is activated, and a "Confirmed Cherry" is drawn, a notification may be issued indicating that the left reel should be stopped first ("Batting Order 1" and "Batting Order 2"). Also, "Winning (Next Game)" is not limited to a pseudo-bonus starting from the next game; it may also mean that a pseudo-bonus starts from a game after the next game.

Here, a skilled player will further determine whether it is a "weak cherry" or a "guaranteed cherry" by, for example, aiming for the "BAR" symbol on the middle reel 3C and the right reel 3R. As a result, the "BAR" symbol will align in the middle of each reel, and it will be recognized that a "guaranteed cherry" has been won (see, for example, "REP42" in Figure 11). On the other hand, an unskilled player may not, or may not be able to, aim for the "BAR" symbol on the middle reel 3C and the right reel 3R, and therefore may not be able to determine whether it is a "weak cherry" or a "guaranteed cherry" from the stop display (see, for example, "REP28" in Figure 11).

Furthermore, in the first gaming machine, when neither the semi-limit processing (number of games) nor the semi-limit processing (number of payouts) is activated, and a "guaranteed cherry" is drawn, and the combination of symbols for "guaranteed cherry replay" is displayed, a special winning sound is output. Also, when a "guaranteed cherry" is drawn, and the combination of symbols for "guaranteed cherry replay" is not displayed, but the combination of symbols for "cherry replay" is displayed, a special winning sound is output. The output of the special winning sound may be set to occur with 100% probability, or with a predetermined probability (for example, 50% probability).

In any case, when neither the semi-limit processing (number of games) nor the semi-limit processing (number of payouts) is activated, if a "guaranteed cherry" is drawn, the "red 7 alignment" animation will occur at the start of the next game, informing the player that a pseudo-bonus will begin, and the pseudo-bonus will then start.

On the other hand, if a "Confirmed Cherry" is drawn during the performance section (or even during the increase section) after either the semi-limit processing (number of games) or the semi-limit processing (number of payouts) has been activated, the pseudo-bonus transition lottery will initially determine a "Win (Next Game)" (see Figure 7(c)). However, due to the execution of a special process, this determination is rewritten to "Win (Current Game)." Then, at the start of the current game, the "Red 7 Alignment" animation will occur, announcing the start of the pseudo-bonus, and the pseudo-bonus will begin.

In this instance, during the current game, the combination of symbols for "Confirmed Cherry Replay" (including the combination of "Cherry Replay" symbols) is not displayed, and information regarding the stop operation to display the combination of symbols for "Middle Replay" is provided (special notification). For example, in the first game machine, a special notification is given indicating that the right first stop ("Bat Order 5" and "Bat Order 6") should be performed (see Figure 15). As a result, when neither the semi-limit processing (number of games) nor the semi-limit processing (number of payouts) is activated, the game flow is changed from "Confirmed Cherry Replay" display → pseudo-bonus start from the next game to "Middle Replay" display after either the semi-limit processing (number of games) or the semi-limit processing (number of payouts) has been activated. Furthermore, the special notification may be controlled by the main control board (main control board 71), or, from the perspective of ensuring that the player does not suffer any disadvantage as the result is still a transition to a pseudo-bonus, it may be controlled solely by the sub-control board (sub-control board 72).

Furthermore, if a "Confirmed Cherry" is drawn after either the semi-limit processing (number of games) or the semi-limit processing (number of payouts) has been activated, and despite a special notification being given, if the combination of symbols for "Confirmed Cherry Replay" is displayed, the special winning sound will not be output.

Furthermore, in the first gaming machine, if "F_Replay A" or "F_Replay B" is determined as the internal winning combination, the stopping procedure is generally not announced. Therefore, if the stopping procedure is announced and "Middle Replay" is displayed only when the aforementioned special announcement is made, then when such a situation occurs, the player will clearly recognize that one of the semi-limit processes has been activated, which may reduce the enjoyment of the game. For this reason, during the advantageous period, regardless of whether one of the semi-limit processes is activated or not (or even after one of the semi-limit processes has been activated), if "F_Replay A" or "F_Replay B" is determined as the internal winning combination, a notification similar to the special announcement may be made with a predetermined probability. This prevents the player from feeling that the special announcement is unnatural. Furthermore, the notification similar to the special notification may occur when "F_Replay A" or "F_Replay B" is determined as the internal winning combination, or when the pseudo-bonus transition lottery is won. In this case, the pseudo-bonus transition lottery when "F_Replay A" or "F_Replay B" is determined as the internal winning combination may be configured so that "Winning (This Game)" is determined with a predetermined probability.

Up to this point, we have explained the process of activating normal limit processing, special limit processing, and semi-limit processing by using "game count" and "payout count" to monitor the game duration of the advantageous period as an example. However, the conditions under which each limit processing is executed are not limited to those described above and can be changed as appropriate. For example, the values of the advantageous period game count counter, the advantageous period payout counter, the control game count counter, the control payout counter, the 1G consecutive win counter, and whether or not the ceiling is shortened (i.e., the variables for activating semi-limit processing), etc., can be changed as appropriate according to the game specifications, market trends, etc.

Furthermore, the methods for monitoring the duration of the advantageous period are not limited to those described above. For example, if "navigation count" is used to monitor the duration of the advantageous period, then, similar to the above, normal limit processing (navigation count), special limit processing (navigation count), or semi-limit processing (navigation count) can be executed. In other words, any element (parameter) whose value can be counted can be used to monitor the duration of the advantageous period. By defining the values for which normal limit processing is executed, special limit processing is executed, and semi-limit processing is executed for the adopted element, each limit processing can be executed in the same manner as described above.

As described above, in the first gaming machine, advantageous states (e.g., pseudo-bonuses) and specific states (e.g., performance sections) are controlled as a series of advantageous sections. When the game duration in this series of advantageous sections reaches a predetermined period (e.g., the value of the advantageous section game counter is "1500" or more), or when the amount of game value granted in this series of advantageous sections reaches a predetermined amount (e.g., the value of the advantageous section payout counter is "2401" or more), this series of advantageous sections is forcibly terminated. However, when the game duration in this series of advantageous sections becomes a specific period shorter than the predetermined period (e.g., the value of the control game counter is "1445" or more), or when the amount of game value granted in this series of advantageous sections becomes a specific amount less than the predetermined amount (e.g., the value of the control payout counter is "2126" or more), if the player is in an advantageous state, the series of advantageous sections is terminated when transitioning to a specific state.

In other words, in the first gaming machine, the advantageous period is not forcibly terminated midway through the advantageous state. Instead, it is possible to terminate the advantageous period within a certain period in a natural flow that coincides with the end of the advantageous state. This suppresses excessive gambling tendencies while preventing players from feeling distrust or loss, thus demonstrating consideration for the players' emotions.

Furthermore, in the first gaming machine, advantageous states (e.g., pseudo-bonuses) and specific states (e.g., performance sections) are controlled as a series of advantageous sections. When the game duration in this series of advantageous sections reaches a predetermined period (e.g., the value of the advantageous section game counter is "1500" or more), or when the amount of game value granted in this series of advantageous sections reaches a predetermined amount (e.g., the value of the advantageous section payout counter is "2401" or more), this series of advantageous sections is forcibly terminated. However, when the game duration in this series of advantageous sections becomes a specific period shorter than the predetermined period (e.g., the value of the control game counter is "1445" or more), or when the amount of game value granted in this series of advantageous sections becomes a specific amount less than the predetermined amount (e.g., the value of the control payout counter is "2126" or more), if the player is not in an advantageous state, the player is transitioned to an advantageous state. When the transitioned advantageous state ends and the player transitions to a specific state, the series of advantageous sections is terminated.

In other words, in the first gaming machine, the advantageous period is not forcibly terminated midway through the advantageous state. Instead, it is possible to terminate the advantageous period within a certain period in a natural flow that coincides with the end of the advantageous state. Furthermore, when terminating the advantageous period in this way, if the player is not in an advantageous state, the machine transitions to an advantageous state before terminating. This prevents excessive gambling tendencies while also preventing players from experiencing distrust or feelings of loss, thus demonstrating consideration for the players' emotions.

Furthermore, in the first gaming machine, the specific period or amount is set considering the duration of the advantageous state (e.g., "55 games") or the amount of game value that can be awarded (e.g., "275 tokens"). Therefore, while considering the player's feelings, it is possible to prevent the amount of game value awarded to the player from being excessively restricted.

Furthermore, in the first type of gaming machine, the advantageous state may be extended by granted rights (for example, "1G consecutive stock" and "ceiling reduction"). However, when the game period in a series of advantageous sections becomes shorter than a specific period and becomes a special period set according to the number of granted rights (for example, when the value of the control game counter reaches the value at which quasi-limit processing (game count) is executed), or when the amount of game value granted in a series of advantageous sections becomes less than a specific amount and becomes a special amount set according to the number of granted rights (for example, when the value of the control payout counter reaches the value at which quasi-limit processing (payout count) is executed), the granting of rights in subsequent series of advantageous sections is suppressed. This prevents situations where, for example, a player is granted more rights than they can use, and the series of advantageous sections is forcibly terminated in such a state, resulting in the player feeling distrust or loss. Therefore, it is possible to suppress excessive gambling tendencies while also considering the player's feelings.

Furthermore, in the first gaming machine, when counting the aforementioned "specific amount" or "special amount," even if a difference arises between the amount of game value that should have been awarded and the amount actually awarded due to, for example, a player's operational error or disregard of instructions, this difference is not taken into account. The counting is performed based on the amount of game value that should have been awarded. This prevents the advantageous period from being unnecessarily extended by such player actions, and prevents unfairness between players who engage in such actions and those who do not. Thus, it is possible to suppress excessive gambling tendencies while also considering the players' feelings.

Furthermore, in the first gaming machine, when a player hits a winning combination (e.g., "guaranteed cherry") that guarantees a transition to a favorable state while the granting of rights is suppressed (e.g., after the quasi-limit processing has been activated), a special notification is provided to prevent the display of a special symbol combination (e.g., "guaranteed cherry replay") that clearly indicates the winning combination. This prevents the player from feeling, for example, that the winning combination was a wasted win. In other words, by preventing the player from clearly recognizing the trigger for the start of the favorable state while the granting of rights is suppressed, it is possible to suppress excessive gambling tendencies while also considering the player's feelings. Note that any of the performance execution methods may be used to provide the special notification.

Furthermore, in the first gaming machine, when a special notification is issued, the advantageous state, which would normally begin in the next game, is instead started in the current game. This allows players to naturally perform the stopping operation according to the special notification, thus preventing them from feeling any discomfort or unease even when such special notifications are issued.

Furthermore, in the first gaming machine, when the granting of rights is not suppressed and a winning combination of special symbols is displayed after hitting a guaranteed winning combination, it is possible to provide a special notification (for example, outputting a special winning sound). However, when the granting of rights is suppressed and a winning combination of special symbols is displayed after hitting a guaranteed winning combination, it is not possible to provide a special notification. This prevents players from feeling, for example, that their winning combination was a wasted win. In other words, by not clearly indicating to the player when the advantageous state has begun when the granting of rights is suppressed, it is possible to suppress excessive gambling tendencies while also considering the player's feelings. Note that any of the performance execution methods may be used to provide the special notification.

Furthermore, in the first gaming machine, the decision of whether or not to issue a special notification is made based on whether or not a winning combination was achieved, whether or not a special symbol combination was displayed, and whether or not a special notification was issued. This allows for more appropriate management of the circumstances under which a special notification is issued.

Furthermore, in the first gaming machine, the advantageous section game count counter and the advantageous section payout counter count regardless of the amount of game value bet. As a result, the normal limit processing (game count) and normal limit processing (payout) are executed not only in the 3-coin bet state but also in the 2-coin bet state.

Furthermore, in the first gaming machine, the control game counter and control payout counter count when three coins are bet, but not when two coins are bet. Therefore, in the three-coin bet state, special limit processing (game count) and special limit processing (payout) can be executed, but in the two-coin bet state, special limit processing (game count) and special limit processing (payout) cannot be executed. Consequently, in the two-coin bet state, the execution of normal limit processing (game count) or normal limit processing (payout) may forcibly terminate a series of advantageous periods, even during a pseudo-bonus.

Furthermore, in the first gaming machine, the probability of winning small prizes and the number of medals paid out differ between the 3-coin betting state and the 2-coin betting state (see Figures 10-15). As a result, playing with a 2-coin bet is more disadvantageous to the player than playing with a 3-coin bet. However, this is not the only method that makes playing with a 2-coin bet disadvantageous to the player. For example, if the game is played with a 2-coin bet during a pseudo-bonus, the stopping procedure may not be announced, thus making it disadvantageous to the player.

Thus, in the first gaming machine, when a first amount of game value (for example, "3 coins") is bet and the game is played, the advantageous period is not forcibly terminated midway through the advantageous state. Instead, the advantageous period is terminated within a certain period in a natural flow that coincides with the end of the advantageous state. This suppresses excessive gambling tendencies while preventing players from feeling distrust or loss, thus considering the players' emotions. On the other hand, when a second amount of game value (for example, "2 coins") is bet and the game is played, the advantageous period may be forcibly terminated midway through the advantageous state. This makes the player aware that they have not played the game in the intended manner, thus encouraging them to play the game in the intended manner.

Furthermore, within a series of advantageous periods, playing with a second amount of game value bet is less advantageous for the player than playing with a first amount of game value bet. Therefore, by enabling this kind of warning, it is possible to encourage players to play in a more advantageous position, and to prevent a decrease in the enjoyment of the game due to players playing in unintended ways.

[5-5. Storage area configuration for the first gaming machine]
Next, the storage area configuration of the first gaming machine will be explained with reference to Figures 17 to 22. Figure 17 is a diagram showing an example of the winning flag storage area, the prize activation flag storage area, and the symbol code storage area of the first gaming machine. Figure 18 is a diagram showing an example of the carry-over role storage area of the first gaming machine. Figure 19 is a diagram showing an example of the game state flag storage area of the first gaming machine. Figure 20 is a diagram showing an example of the mode flag storage area of the first gaming machine. Figure 21 is a diagram showing an example of the operation stop button storage area of the first gaming machine. Figure 22 is a diagram showing an example of the button press order storage area of the first gaming machine.

(Winning flag storage area, prize activation flag storage area, and symbol code storage area)
First, referring to Figure 17, the configuration of the winning flag storage area (internal winning combination storage area), the prize activation flag storage area (display combination storage area), and the symbol code storage area will be explained. In the first gaming machine, the winning flag storage area, the prize activation flag storage area, and the symbol code storage area have the same data configuration.

Each of the storage areas described above consists of storage areas 1 to 26, each represented by one byte of data. Note that the data stored in each storage area is only the one-byte data shown in the "Data" column of Figure 17. However, for the sake of explanation, Figure 17 also includes the "combinations" (shown in the order of reel 3L, reel 3C, and reel 3R in Figure 17) and their contents (see Figures 11 to 14), which represent the pattern combinations associated with the bits of each storage area.

The data stored in the winning flag storage area is used by the main CPU 101 to identify the type of symbol combination corresponding to the internal winning combination (i.e., the type of symbol combination permitted to be displayed in this game). For example, if a 2BB win occurs in this game (i.e., if it is carried over), "1" is stored in bit 0 of storage area 1.

The data stored in the prize activation flag storage area is used by the main CPU 101 to identify the type of symbol combination corresponding to the displayed role (i.e., the type of symbol combination displayed on the active line in this game). For example, if a symbol combination related to 2BB is displayed on the active line in this game, "1" is stored in bit 0 of storage area 1.

The data stored in the symbol code storage area is used by the main CPU 101 to identify the types of symbol combinations that are still available to be displayed on the active payline during the current game, while at least one reel is rotating. For example, if a symbol combination related to 2BB is available to be displayed on the active payline while at least one reel is rotating during the current game, then "1" is stored in bit 0 of storage area 1.

(Storage area for carryover items)
Next, with reference to Figure 18, the configuration of the carryover storage area will be explained. The carryover storage area consists of a storage area represented by 1 byte of data.

When the internal lottery process determines that the bonus symbols "F_2BB" (2BB) or "F_3BB" (3BB) are the internal winning symbols, these bonus symbols are stored in the carry-over symbol storage area as carry-over symbols (the corresponding bits are stored as "1"). The carry-over symbols stored in the carry-over symbol storage area are retained without being cleared until the corresponding symbol combination is displayed on an active payline. Furthermore, while carry-over symbols are stored in the carry-over symbol storage area, in addition to the internal winning symbols (minor symbols and replay symbols) determined by the internal lottery process, the carry-over symbols (bonus symbols) are stored in the winning flag storage area.

(Game status flag storage area)
Next, with reference to Figure 19, the configuration of the game state flag storage area will be explained. The game state flag storage area consists of a storage area represented by 1 byte of data. For example, if the current game state is 2BB state, "1" is stored in bit 0 of the storage area.

In the first gaming machine, since there is no RT (Replay Time) state, the gaming state flag storage area shown in Figure 19 does not have an area indicating the type of RT state. However, if an RT state is present, for example, "1" will be stored in the bit of the storage area corresponding to the current RT state. In the first gaming machine, data indicating the type of gaming state (mode) during the advantageous section is stored separately in the mode flag storage area described later, but it can also be stored and managed in this gaming state flag storage area. The same applies to the gaming sections of the non-advantageous section and the advantageous section. It is possible to manage this data in an advantageous section flag storage area (not shown), or it can be stored and managed in this gaming state flag storage area. The same applies to gaming states such as AT (Attack Time) state and ART (Advanced Replay Time) state. It is possible to manage this data in an AT (Attack Time) state (ART) state flag storage area (not shown), or it can be stored and managed in this gaming state flag storage area.

(Mode flag storage area)
Next, with reference to Figure 20, the configuration of the mode flag storage area will be explained. The mode flag storage area consists of storage area 1 and storage area 2, each represented by one byte of data. For example, if the current mode is start mode, "1" is stored in bit 0 of storage area 1. Also, for example, if the current mode is heaven A mode, "1" is stored in bit 0 of storage area 2. In the first gaming machine, the pseudo-bonus state is also managed as one of the modes.

(Storage area for the stop button)
Next, with reference to Figure 21, the configuration of the operation stop button storage area will be described. The operation stop button storage area consists of a storage area represented by 1 byte of data. Bits 0 to 2 of the operation stop button storage area store data indicating the type of stop button that has already been operated (the type of reel that has stopped), and bits 4 to 6 store data indicating the type of stop button that has not yet been operated (the type of reel that is currently rotating).

For example, if stop button 8L is the stop button that was pressed this time, i.e., the activated stop button, then "1" is stored in bit 0 of the activated stop button storage area. Also, for example, if stop button 8L is a stop button that has not yet been pressed, i.e., the active stop button, then "1" is stored in bit 4. The main CPU 101 identifies the stop button that was pressed this time and the stop buttons that have not yet been pressed based on the data stored in the activated stop button storage area.

(Pressing order storage area)
Next, with reference to Figure 22, the configuration of the button press order storage area will be explained. The button press order storage area consists of a storage area represented by 1 byte of data. The button press order indicates the order in which the stop buttons were pressed, that is, the pressing order (or hit order).

For example, when all reels are spinning, bits 0-5 of the button press order storage area are stored as "1". Then, when stop button 8L is pressed (the first stop being "left"), bits 0 and 1 remain "1", but bits 2-5 are changed to "0". Next, when stop button 8C is pressed (the first stop being "left" and the second stop being "middle"), bit 0 remains "1", but bit 1 is changed to "0". The main CPU 101 identifies the button press order for the current game based on the data stored in the button press order storage area.

[6. Processing by the main control circuit]
Next, with reference to Figures 23 to 32, the contents of the various processes executed by the main CPU 101 of the main control circuit 100 using each program will be explained. In the explanation of the various processes shown below, a specific example of the processing content may be explained using the specifications of the first gaming machine, but the processing content of the various processes shown below is not limited to this.

[6-1. Main Processing]
First, with reference to Figure 23, the main processing (main operation processing) executed by the main CPU 101 of the main control circuit 100 will be explained. Figure 23 is a flowchart showing an example of the procedure for the main processing. In addition, Figure 23 also shows the power-on processing that is executed prior to the start of the main processing.

First, when power is supplied to the pachislo machine 1 (when the power is turned on), the main CPU 101 performs power-on processing (S1). This processing involves various operations necessary at the time of power-on. Details of the power-on processing will be described later.

Next, the main CPU 101 performs initialization processing at the end of a game (S2). This process clears the data in the designated storage area in the main RAM 103. The designated storage area here is, for example, a storage area where data must be erased after each game, such as the winning flag storage area or the prize activation flag storage area.

Next, the main CPU 101 performs the medal reception and start check process (S3). This process checks the input status of, for example, the medal sensor 31S, the bet switch 6S, and the start switch 7S, and performs various necessary processing at the start of gameplay. Details of the medal reception and start check process will be described later.

Next, the main CPU 101 performs a random value acquisition process (S4). In this process, random values for internal lottery (e.g., in the range of 0 to 65535) and random values for various gameplay-related lotteries (other lottery random values) (e.g., in the range of 0 to 65535 or 0 to 255) are extracted, and these extracted random values are stored in a random value storage area (not shown) provided in the main RAM 103. Note that the methods of acquiring these random values are not limited to those described above. The required number of random values can be acquired as needed from predetermined numerical ranges (e.g., the range of 0 to 65535, 0 to 32767, 0 to 255, or 0 to 127, etc.).

Next, the main CPU 101 performs internal lottery processing (S5). This process involves various operations necessary to determine the internal winning combination based on the internal lottery table and random values used for internal lottery, corresponding to the current game state. Details of the internal lottery processing will be described later.

Next, the main CPU 101 performs a game start state control process (S6). In this process, for various game states, if a transition condition is met at the start of the game (for example, based on a determined internal winning combination), the CPU performs various processes necessary to transition the game state according to the met transition condition, or to manage the duration of the current game state. Details of the game start state control process will be described later.

Next, the main CPU 101 performs a start command generation and storage process (S7). In this process, data for the start command to be transmitted to the sub-control circuit 200 is generated and stored in a communication data storage area (not shown) in the main RAM 103. The data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 in the communication data transmission process described later (see S204 in Figure 32). The generation, storage, and transmission methods for other command data are basically the same.

Next, the main CPU 101 performs the main-side performance control processing at the start of the game (S8). In this process, when various performances are performed by the main control circuit 100 (main side) at the start of the game, the CPU performs the necessary processing to execute those performances. For example, if a lock performance is performed at the start of the game, the CPU controls the execution of that lock performance. Furthermore, if this includes a simulated game, the CPU controls the progress of the simulated game (or the notification related to the simulated game). Also, for example, if the game is in AT mode and the instruction monitor notifies information about the stop operation, the CPU controls the notification method. Although details are omitted, if a lock performance is performed, a lock command generation and storage process is performed in this process.

Next, the main CPU 101 performs the initial reel stop setup process (S9). In this process, based on the internal winning combination and game state, various information necessary for stop control, such as the type of stop table and the type of reel pull-in priority table to be used in the current game, is set.

Next, the main CPU 101 performs the reel rotation start process (S10). This process requests the rotation start of all reels. Once the rotation start of all reels is requested, the reel control process (see S203 in Figure 32) controls the drive of each stepping motor 51L, 51C, and 51R, and the rotation of each reel 3L, 3C, and 3R begins. Each reel that has started rotating is accelerated until its rotation speed reaches a constant speed, and then that constant speed is maintained. Although details are omitted here, this process also includes the generation and storage of reel rotation start commands.

Next, the main CPU 101 performs the reel pull-in priority storage process (S11). In this process, for each symbol (symbol position) on the rotating reels (in this case, all reels), data indicating the reel pull-in priority is obtained by referring to the set internal winning combination and the set reel pull-in priority table, and stored in the reel pull-in priority data storage area (not shown). Although not shown in the diagram, the symbol code storage process described later is performed prior to this process.

Next, the main CPU 101 performs reel stop control processing (S12). This processing involves performing various operations necessary to stop the rotation of the corresponding reel based on the determined internal winning combination (or the information related to various stop controls set accordingly) and the stop operation patterns of each stop button 8L, 8C, and 8R. Details of the reel stop control processing will be described later.

Next, the main CPU 101 performs a prize activation determination process (S13). This process determines whether the combination of symbols displayed on the active line is one of the combinations defined in the symbol combination table. For example, it checks whether there is a bit containing "1" in the prize activation flag storage area. Although details are omitted here, this process also includes the generation and storage of a prize activation command.

Next, the main CPU 101 performs the medal payout and re-play activation process (S14). In this process, if the combination of symbols determined in the aforementioned prize activation determination process is a combination of symbols related to a minor win, the corresponding number of medals are paid out. If the combination of symbols is related to a replay win, various processes necessary to activate re-play in the next game are performed. For example, if the combination of symbols determined in the aforementioned prize activation determination process is related to a replay win, the automatic medal counter (described later) is set to a value equal to the number of bets in the current game. Furthermore, in this process, a medal payout signal corresponding to the number of medals to be paid out is output from the external centralized terminal board 55.

Next, the main CPU 101 performs a game-ending state control process (S15). In this process, for each game state, when the game ends, if a transition condition is met (for example, based on the combination of displayed symbols), the game state is transitioned according to the met transition condition, or various processes are performed to manage the duration of the current game state. Details of the game-ending state control process will be described later.

Next, the main CPU 101 performs the main-side performance control processing at the end of the game (S16). In this process, if various performances are to be performed by the main control circuit 100 (main side) when the game ends, the CPU performs the necessary processing to execute those performances. For example, if a lock performance is to be performed at the end of the game, the CPU controls the execution of that lock performance. Furthermore, if this includes a simulated game, the CPU controls the progress of that simulated game (or the notification related to the simulated game). Although details are omitted here, if a lock performance is to be performed, a lock command generation and storage process is performed during this process.

Thus, in pachislo machine 1, the processes S2 to S16 described above control one unit of gameplay, and the progress of the game is controlled by repeating these processes. It should be noted that other processes may be performed as needed, and some of these processes may be omitted. In other words, the various processes described above are merely examples.

(Power-on processing)
Next, with reference to Figure 24, the power-on processing performed in S1 of the main processing described above will be explained. Figure 24 is a flowchart showing an example of the procedure for power-on processing.

First, the main CPU 101 performs an initialization process (not shown) upon power-on, then performs a write test on the main RAM 103. Based on the results of this test, it determines whether the write to the main RAM 103 was successful (S21). In other words, the main CPU 101 determines whether or not an abnormality has occurred in the main RAM 103.

If the main CPU 101 determines that the write operation to the main RAM 103 was successful (S21 is YES), it determines whether the setting key-type switch 52 is in the ON state (S22). That is, the main CPU 101 determines whether or not the setting can be changed.

If the main CPU 101 determines that the setting key-type switch 52 is in the ON state (S22 is YES), it performs the initialization process for setting changes (S23). This process clears the data in the designated storage area in the main RAM 103. The designated storage area here refers to storage areas where data needs to be erased when settings are changed, such as the carryover role storage area, the game state flag storage area, or the mode flag storage area.

Next, the main CPU 101 performs initialization command generation and storage processing (S24). In this process, it generates initialization command data to be sent to the sub-control circuit 200, indicating that the configuration change process has started, and stores the generated data in the communication data storage area.

Next, the main CPU 101 performs a setting change process (S25). In this process, after receiving the setting value determination operation and setting value confirmation operation described above, the main RAM 103 is initialized, and the new setting value is set (stored) in the setting value storage area (not shown) of the main RAM 103. Next, the main CPU 101 determines whether the setting key-type switch 52 has turned off (S26). That is, after the new setting value has been set, the main CPU 101 determines whether the state in which setting changes are possible has ended.

If the main CPU 101 determines that the setting key-type switch 52 is not in the off state (S26 is NO), it waits for the setting key-type switch 52 to turn off. On the other hand, if it determines that the setting key-type switch 52 is in the off state (S26 is YES), it performs initialization command generation and storage processing (S27). In this process, it generates initialization command data indicating the completion of the setting change process to be sent to the sub-control circuit 200, and stores the generated data in the communication data storage area. After this process, the main CPU 101 terminates the power-on processing.

In S22, if the main CPU 101 determines that the setting key-type switch 52 is not in the ON state (S22 is NO), it determines whether the backup data is normal (S28). In other words, the main CPU 101 determines whether the various information backed up when the power supply to the pachislo machine 1 is cut off (power outage) is normal.

If the main CPU 101 determines that the backup data is normal (S28 is YES), it performs a game recovery process (S29). This process restores the pachislo machine 1 to its state before the power outage. After this process, the main CPU 101 terminates the power-on process.

If the main CPU 101 determines in S21 that the write operation to the main RAM 103 was not performed correctly (S21 is NO), or if it determines in S28 that the backup data is not normal (S28 is NO), it performs a power-on error process (S30). Note that errors caused by this power-on error process are not resolved by the reset operation described above, but are resolved when new settings are established. Therefore, after the power-on error process, the main CPU 101 does not proceed to normal operation (from S2 onwards in Figure 23) until the power to the pachislo machine 1 is turned off and new settings are established (until the processes described in S22 to S26 are performed).

(Medal reception and start check processing)
Next, referring to Figure 25, the medal reception and start check process performed in S3 of the main process described above will be explained. Figure 25 is a flowchart showing an example of the procedure for the medal reception and start check process.

First, the main CPU 101 determines whether the value of the automatic medal counter is "0" (S41). That is, the main CPU 101 determines whether a replay was achieved in the previous game (i.e., whether a replay was activated).

The main CPU 101, if it determines that the value of the automatic medal insertion counter is not "0" (S41 is NO), performs the automatic medal insertion process (S42). In this process, the same number of medals as those inserted in the previous unit of play are automatically inserted. Although details are omitted, if automatic insertion is performed, a medal insertion command generation and storage process is carried out during this process. Furthermore, in this process, the medal insertion signal is output from the external centralized terminal board 55.

The main CPU 101, in S41, determines that the value of the automatic medal insertion counter is "0" (S41 is YES), and after processing in S42, performs a medal auxiliary storage switch check (S43). This process determines whether the medal auxiliary storage switch 33S is in the ON state (i.e., whether a certain number of medals or more are stored in the medal auxiliary storage 33). If it determines that the medal auxiliary storage switch 33S is in the ON state, a medal auxiliary storage error is generated. In this case, the process waits until the error is resolved. If it determines that the medal auxiliary storage switch 33S is not in the ON state, this process terminates.

Next, the main CPU 101 performs a medal insertion status check (S44). This checks the current number of bets and credits, and also determines whether medal acceptance is prohibited or if a selector error has occurred. If medal acceptance is possible, the system is set to a state where medal acceptance is possible (a state where betting operations can be accepted) (medal acceptance is permitted). If a selector error has occurred, the process waits until the error is resolved.

Next, the main CPU 101 determines whether or not it is possible to accept medals (S45). If the main CPU 101 determines that it is possible to accept medals (S45 is YES), it performs a medal insertion check process (S46). In this process, the number of bets and credits are updated based on the detection results of the medal sensor 31S and the bet switch 6S. Although details are omitted, if a bet operation is performed, a medal insertion command generation and storage process is performed during this process. Also, in this process, the medal insertion signal is output from the external centralized terminal board 55.

Next, the main CPU 101 determines whether it is possible to insert medals or credit (S47). That is, the main CPU 101 determines whether the bet is set to "3" and the credit count is not "50". If the main CPU 101 determines that it is not possible to insert medals or credit (i.e., the bet is set to "3" and the credit count is "50") (S49 is NO), it prohibits accepting medals (S48). In other words, the main CPU 101 sets the system to a state where it cannot accept medals (a state where betting operations are not accepted).

The main CPU 101 determines in S45 that it is not possible to accept medals (S45 is NO), in S47 that it is possible to insert medals or credit (S47 is YES), and after processing in S48, it determines whether the number of inserted medals is the number of medals required to start the game (S49). In the case of the first gaming machine, this process determines, for example, whether the current bet is "2" or "3" medals.

The main CPU 101, upon determining that the number of inserted tokens is sufficient to start the game (S49 is YES), determines whether the start switch 7S is turned ON (S50). In other words, the main CPU 101 determines whether the player has initiated the start operation.

If the main CPU 101 determines that the start switch 7S is ON (S50 is YES), it prohibits accepting medals (S51). After this process, the main CPU 101 terminates the medal acceptance and start check process.

If the main CPU 101 determines in S49 that the number of inserted tokens is not the number of tokens required to start the game (S49 is NO), or if it determines in S50 that the start switch 7S is not in the ON state (S50 is NO), the process returns to S44.

(Internal lottery process)
Next, with reference to Figure 26, the internal lottery process performed in S5 of the main process described above will be explained. Figure 26 is a flowchart showing an example of the procedure for the internal lottery process.

First, the main CPU 101 performs a check of the set value and the number of tokens inserted (S61). This checks the set value and the number of bets for the current game. Next, the main CPU 101 sets an internal lottery table according to the set value, the number of bets, and the game state (S62). Then, the main CPU 101 retrieves a random number for internal lottery from the random number storage area (S63). That is, the main CPU 101 retrieves the data of the random number for internal lottery obtained in S4 of the main process described above. If, during this process, the set value is determined to be anything other than "1" to "6" or the number of bets is anything other than "1" to "3", the main CPU 101 determines that a serious error has occurred and executes the power-on error processing described above (see S30 in Figure 24).

Next, the main CPU 101 performs the internal winning combination determination process (S64). In this process, the acquired random number for internal抽選 (random number generation) is sequentially updated (for example, by addition) using the lottery values for each internal winning combination defined in the set internal lottery table. It is then determined whether the update result is a predetermined result (for example, an overflow). If the predetermined result is met, that internal winning combination is determined as the internal winning combination for this unit game. If, after checking all internal winning combinations, the predetermined result is not met, the result of this unit game is "miss" ("miss" is determined as the internal winning combination).

Next, the main CPU 101 determines whether or not an internal winning combination has been determined (S65). If the main CPU 101 determines that no internal winning combination has been determined (S65 is NO), it returns to processing S64. That is, the main CPU 101 sequentially updates the internal winning combinations to be determined (sequentially updating the random values for internal drawing), and repeats the process of S64 until a determination has been made for all internal winning combinations (or until an internal winning combination is determined during that process).

If the main CPU 101 determines that an internal winning combination has been determined (S65 is YES), it determines whether the determined internal winning combination is a non-carry-over combination (i.e., whether it is a minor combination or a replay combination, rather than a bonus combination that carries over) (S66). If the main CPU 101 determines that the determined internal winning combination is a non-carry-over combination (S66 is YES), it updates the winning flag storage area (S67). In this process, the data in the winning flag storage area is updated based on the internal winning combination determined in S64. That is, the main CPU 101 stores a "1" in the bit corresponding to the combination of symbols that are permitted to be displayed in the winning flag storage area corresponding to the determined internal winning combination.

The main CPU 101, in S66, determines if the determined internal winning combination is not a combination that is not eligible for carryover (S66 is NO), and after processing in S67, determines whether the determined internal winning combination is a combination eligible for carryover (i.e., a bonus combination that is a carryover) (S68).

The main CPU 101, if it determines that the determined internal winning combination is a combination eligible for carryover (S68 is YES), determines whether the data in the carryover combination storage area is "0" (S69). That is, the main CPU 101 determines whether any bonus combinations have not yet been carried over. If the main CPU 101 determines that the data in the carryover combination storage area is "0" (S69 is YES), it updates the carryover combination storage area (S70). In this process, the data in the carryover combination storage area is updated based on the internal winning combination determined in S64. Specifically, the main CPU 101 stores a "1" in the bit corresponding to the combination of symbols that are permitted to be displayed in relation to the determined internal winning combination in the carryover combination storage area.

The main CPU 101, in S68, determines that the determined internal winning combination is not a combination eligible for carryover (S68 is NO), in S69, determines that the data in the carryover combination storage area is not "0" (S69 is NO), and after processing in S70, it again determines whether the data in the carryover combination storage area is "0" (S71).

The main CPU 101, if it determines that the data in the carryover role storage area is not "0" (S71 is NO), updates the winning flag storage area (S72). This process reflects the data stored in the carryover role storage area into the winning flag storage area. Specifically, if a bonus role is carried over (or a win was achieved in the current game), the main CPU 101 stores a "1" in the bit corresponding to the symbol combination permitted to be displayed for that bonus role in the winning flag storage area.

If the main CPU 101 determines in S71 that the data in the carryover role storage area is "0" (S71 is YES), and after processing in S72, it performs sub-flag setting processing (S73). In the case of the first gaming machine, in this process, for example, non-advantageous section sub-flags and advantageous section win sub-flags are set based on the internal winning role. In this process, for example, when in AT state, information corresponding to the stop operation information notified by the instruction monitor may be set. After this process, the main CPU 101 terminates the internal lottery processing.

(Game start state control processing)
Next, with reference to Figure 27, the game start state control process performed in S6 of the main process described above will be explained. Figure 27 is a flowchart showing an example of the procedure for the game start state control process.

First, the main CPU 101 performs a check for the fulfillment of game state transition conditions (S81). This check determines whether the transition conditions for moving from one game state to another have been met when the game begins. For example, if the game transitions to a predetermined RT state between flags based on winning a predetermined bonus role, this process checks whether the predetermined bonus role has been won. In the case of the first game machine, since the flags are not configured as an RT state (i.e., as a game state stored in the game state flag storage area), this check is unnecessary. Furthermore, if there is a specific RT state that starts or ends after a specific number of games have been played following the fulfillment of a specific transition condition, this process can also manage this specific number of games.

Next, the main CPU 101 determines whether the transition conditions for transitioning to any game state have been met (S82). If the main CPU 101 determines that the transition conditions for transitioning to any game state have been met (S82 is YES), it updates the game state flag storage area (S83). That is, the main CPU 101 sets the game state according to the met transition conditions. Next, the main CPU 101 performs setting processing according to the set game state (S84). In this process, if it is necessary to set the game period for the game state or to set the lottery values (lottery table) in various lottery processes other than the internal lottery process, such setting processing is performed as appropriate, depending on the transition in game state.

The main CPU 101, if it determines in S82 that the transition conditions for transitioning to any game state are not met (S82 is NO), and after processing in S84, determines whether the current game section is a non-advantageous section (S85). If the main CPU 101 determines that the current game section is a non-advantageous section (S85 is YES), it performs an advantage section start condition fulfillment check (S86). This process checks whether the transition conditions (advantageous section start conditions) for transitioning from a non-advantageous section to an advantage section have been met when the game starts. In the case of the first game machine, this process, for example, involves performing the aforementioned advantage section transition lottery and checking whether the lottery result initiates an advantage section.

Next, the main CPU 101 determines whether the conditions for starting the advantageous period have been met (S87). If the main CPU 101 determines that the conditions for starting the advantageous period have not been met (S87 is NO), it terminates the game start state control processing. If the main CPU 101 determines that the conditions for starting the advantageous period have been met (S87 is YES), it performs the setting processing for the start of the advantageous period (S88). In other words, the main CPU 101 starts (sets) the advantageous period. In this process, depending on the start of the advantageous period, it appropriately performs setting processing such as starting the counting of various counters related to various limit processing (see Figure 16) (i.e., starting monitoring of the game period of a series of advantageous periods).

Next, the main CPU 101 updates the mode flag storage area (S89). That is, the main CPU 101 sets the mode (game state) during the newly started advantageous period. In the case of the first game machine, this process sets the destination mode determined, for example, according to the result of the advantageous period transition lottery described above.

Next, the main CPU 101 performs setting processing according to the set mode (S90). In this process, depending on the set mode, it performs setting processing as needed, such as setting the game duration (including the maximum number of games, etc.) for that mode, or setting the lottery values (lottery table) for various lottery processes other than the internal lottery process. In the case of the first gaming machine, for example, in this process, depending on the set destination mode, if the game transitions to a pseudo-bonus, the game duration is set to "55 games," if it transitions to the termination mode, the game duration is set to "32 games," and if it transitions to any other mode, the corresponding maximum number of games is set. Also, the lottery values (lottery table) for various lotteries (see Figures 7 and 8, etc.) are set. After this process, the main CPU 101 terminates the game start state control processing.

If the main CPU 101 determines in S85 that the current game section is not a non-advantageous section (i.e., an advantageous section) (S85 is NO), it performs the start-of-game processing during the advantageous section (S91). Details of the start-of-game processing during the advantageous section will be described later.

Next, the main CPU 101 performs a check to determine if the conditions for ending the advantageous section have been met (S92). This check determines whether the transition conditions (the conditions for ending the advantageous section) for transitioning from the advantageous section to the non-advantageous section have been met when the game starts. In the case of the first gaming machine, this check, for example, determines whether the activation conditions for various limit processes have been met based on the number of games played in the advantageous section (see Figure 16), or whether 32 games have elapsed if the current mode is the termination mode.

Next, the main CPU 101 determines whether the conditions for ending the advantageous period have been met (S93). If the main CPU 101 determines that the conditions for ending the advantageous period have been met (S93 is YES), it performs the initialization process at the end of the advantageous period (S94). That is, the main CPU 101 ends the advantageous period and sets up a non-advantageous period. In this process, in response to the end of the advantageous period, it performs initialization processing to clear all information related to the advantageous period, such as various counters related to various limit processing (see Figure 16), the mode (game state) during the advantageous period, and the game period of that mode (including the number of games until the ceiling, etc.) (i.e., information related to the advantageous period). After this process, the main CPU 101 terminates the game start state control process. Also, if the main CPU 101 determines that the conditions for ending the advantageous period have not been met (S93 is NO), it terminates the game start state control process.

(Processing at the start of gameplay during the advantageous period)
Next, with reference to Figure 28, the processing performed at the start of game during the advantageous period, which takes place in S91 of the game start state control processing described above, will be explained. Figure 28 is a flowchart showing an example of the procedure for processing at the start of game during the advantageous period.

First, the main CPU 101 performs various counter update processing (at the start of gameplay) (S101). In this process, for example, various counters related to various limit processing based on the number of games played during the advantageous period (see Figure 16), various counters managing the game duration such as various modes (game states) during the advantageous period, or other counters managing the degree of advantage are updated according to predetermined update conditions (for example, subtracting (adding) 1 for each game).

Next, the main CPU 101 determines whether or not the system is in a specific mode (AT state) (S102). If the main CPU 101 determines that the system is in a specific mode (S102 is YES), it performs AT period management processing (at the start of the game) (S103). In this processing, for example, if it is possible to extend the game period of the AT state at the start of the game (for example, extending the number of games or adding sets), it determines whether or not the conditions for such extension are met, and performs processing such as extending the game period based on the result of this determination (if it is possible to shorten the game period of the AT state, it performs processing related to such shortening). In addition, this processing may manage the game period of the AT state regardless of whether or not it is extended, or the game period of the AT state may be managed in the processing of S101 described above, and this processing may only perform processing related to extension. In the case of the first type of gaming machine, this process involves, for example, the aforementioned 1G consecutive win lottery based on the sub-flag at the time of winning the advantageous section. Following this lottery, processing is performed to extend the pseudo-bonus according to the lottery result.

Next, the main CPU 101 performs navigation setting processing (S104). This processing sets information corresponding to the stop operation information notified by the instruction monitor, and information corresponding to the stop operation information to be included in the start command. Note that this processing may also allow for the determination of whether or not to generate navigation. That is, even if a notified role is won in the AT state, navigation may not necessarily be generated, and this processing may determine whether or not navigation is generated according to predetermined conditions (for example, the type of notified role or a predetermined navigation generation probability).

The main CPU 101, if it determines in S102 that the machine is not in a specific mode (S102 is NO), and after S104, determines whether the mode transition conditions have been met (S105). In the case of the first gaming machine, this process determines, for example, whether the destination mode was determined according to the results of the mode transition lottery based on the sub-flag at the time of winning the advantageous section.

If the main CPU 101 determines that the mode transition conditions have been met (S105 is YES), it updates the mode flag storage area (S106). That is, the main CPU 101 sets the mode (game state) during the transitioned advantageous section. In the case of the first gaming machine, this process sets the destination mode determined according to the result of the mode transition lottery based on the sub-flag at the time of winning the advantageous section.

Next, the main CPU 101 performs setting processing according to the set mode (S107). In this process, depending on the set mode, it performs setting processing as needed, such as setting the game duration (including the maximum number of games, etc.) for that mode, or setting the lottery values (lottery table) for various lottery processes other than the internal lottery process. In the case of the first gaming machine, this process is similar to, for example, the process in S90 described above. After this process, the main CPU 101 terminates the processing at the start of gameplay during the advantageous section. Furthermore, if the main CPU 101 determines that the mode transition condition has not been met (S105 is NO), it terminates the processing at the start of gameplay during the advantageous section.

Furthermore, the game start state control process shown in Figure 27, the game end state control process shown in Figure 30, and the game start process during the advantageous period shown in Figure 28, and the game end process during the advantageous period shown in Figure 31, have essentially the same processing configuration. This means that processes that can be performed either when the game starts or when the game ends (for example, processes that refer to determined internal winning combinations, such as transitions in game states or modes, but whose results only need to be reflected by the end of the current game (or the start of the next game)) only need to be performed at one of these times, and it does not mean that the same processes are performed redundantly at both times. Therefore, such processes can be performed either when the game starts or when the game ends.

In contrast, processes that need to be performed when the game starts (for example, the navigation setting process mentioned above) should be performed at the start of the game, and processes that need to be performed when the game ends (for example, the process of referencing the displayed symbol combinations) should be performed at the end of the game. Furthermore, processes that need to be performed, or should be performed, at a predetermined time after the game has started but before it ends (for example, the process of referencing the stopping operation pattern of the first stop operation) should be performed at that time.

(Reel stop control process)
Next, with reference to Figure 29, the reel stop control process performed in S12 of the main process described above will be explained. Figure 29 is a flowchart showing an example of the procedure for the reel stop control process.

First, the main CPU 101 determines whether the rotation speed of all reels has reached a predetermined constant speed (for example, 80 rotations/minute) (i.e., whether they are rotating at a constant speed) (S111). If the main CPU 101 determines that all reels are not rotating at a constant speed (S111 is NO), it waits for all reels to rotate at a constant speed before proceeding. On the other hand, if it determines that all reels are rotating at a constant speed (S111 is YES), it permits each reel to stop (S112). That is, the main CPU 101 activates each stop button. In conjunction with this, the operation stop button storage area is updated (in the case of the first gaming machine, for example, bits 4 to 6 of the operation stop button storage area are stored with "1").

Next, the main CPU 101 determines whether a valid stop button has been pressed (S113). If the main CPU 101 determines that no valid stop button has been pressed (S113 is NO), it waits for a valid stop button to be pressed. Note that, when automatic stop control is performed, this waiting time can be measured, and the system can be configured to perform automatic stop control when the measurement result reaches a predetermined time.

The main CPU 101, upon determining that a valid stop button has been operated (S113 is YES), updates the operating stop button storage area and the button press order storage area (S114). In the case of the first gaming machine, for example, when the first stop operation is performed on reel 3L (when stop button 8L is pressed), in this process, bit 0 of the operating stop button storage area is set to "1", and bit 4 is updated to "0". Also, bits 2 to 5 of the button press order storage area are updated to "0".

Next, the main CPU 101 determines the reel to be controlled based on the operation stop button (S115). In this process, for example, if the stop button 8L is pressed, reel 3L is determined to be the reel to be controlled.

Next, the main CPU 101 stores the stop start position from the symbol counter (S116). The symbol counter is configured as a counter for tracking symbol position data (for example, "0" to "19"). In this process, for example, if the stop button 8L is pressed, the symbol position data of the middle section of reel 3L at the time the stop button 8L was pressed is stored as the stop start position.

Next, the main CPU 101 performs a sliding piece determination process (S117). In this process, for example, it refers to the sliding piece count specified in the aforementioned stop table and the data in the aforementioned retraction priority data storage area to determine the most appropriate sliding piece count (the amount of movement of the pattern).

Next, the main CPU 101 stores the planned stopping position based on the stopping start position and the number of sliding pieces (S118). In this process, the symbol position data representing the final stopping position of the symbols, based on the stopping start position stored in the process of S116 and the number of sliding pieces determined in the process of S117, is stored as the planned stopping position.

Next, the main CPU 101 performs reel stop command generation and storage processing (S119). In this process, data for the reel stop command to be transmitted to the sub-control circuit 200 is generated, and the generated data is stored in the communication data storage area provided in the main RAM 103. The reel stop command can be configured to include parameters that specify not only the planned stopping position, but also the starting stopping position and the number of sliding frames.

Next, the main CPU 101 performs a symbol code storage process (S120). In this process, it updates the symbol code storage area while also referring to the type of symbol (symbol code) at the planned stopping position for the reels whose stopping positions have already been determined. Next, the main CPU 101 determines whether or not there is an active stop button (S121). That is, the main CPU 101 determines whether or not there are still reels rotating (i.e., whether or not a stop operation has been performed on all reels).

The main CPU 101, upon determining that a valid stop button exists (S121 is YES), performs a control modification process (S122). In this process, depending on the player's stop operation up to this point, if changes are necessary, such as to the stop table or reel pull-in priority table set in the initial reel stop setup process described above, the CPU resets the various information necessary for such stop control.

Next, the main CPU 101 performs the reel stop priority storage process (S123). In this process, for each symbol (symbol position) on the rotating reels, the CPU 101 references the type of symbol at the planned stop position on reels whose planned stop positions have already been determined, and obtains data indicating the reel stop priority by referencing the set internal winning combination and the set reel stop priority table. This data is then stored in the reel stop priority data storage area. After this process, the main CPU 101 returns to the process at S113. Furthermore, if the main CPU 101 determines that there are no valid stop buttons (S121 is NO), it terminates the reel stop control process.

(Game end state control processing)
Next, with reference to Figure 30, the game end state control process performed in S15 of the main process described above will be explained. Figure 30 is a flowchart showing an example of the procedure for the game end state control process.

First, the main CPU 101 performs a check for the fulfillment of game state transition conditions (S131). This check determines whether the transition conditions for transitioning from one game state to another have been met when the game ends. For example, if the game transitions to a predetermined RT state or bonus state based on the display of a predetermined combination of symbols, this process checks whether the predetermined combination of symbols was displayed. Furthermore, if the game is in a predetermined RT state or bonus state, this process checks whether the termination conditions for these game states have been met. In the case of the first game machine, this process checks, for example, whether a combination of symbols related to 2BB or 3BB has been displayed. Also, if the game is in a 2BB state or a 3BB state, it checks whether the termination conditions for these game states have been met by the payout of medals.

Next, the main CPU 101 determines whether the transition conditions for transitioning to any game state have been met (S132). If the main CPU 101 determines that the transition conditions for transitioning to any game state have been met (S132 is YES), it updates the game state flag storage area (S133). That is, the main CPU 101 sets the game state according to the met transition conditions. In the case of the first game machine, for example, if a combination of symbols related to 2BB or 3BB is displayed, "1" is stored in bit 0 or bit 1 of the game state flag storage area, setting the 2BB state or 3BB state. Also, for example, if the termination conditions for the 2BB state or 3BB state are met, bit 0 or bit 1 of the game state flag storage area is updated to "0".

Next, the main CPU 101 performs setting processing according to the set game state (S134). In this process, when it becomes necessary to set the game duration for a given game state or to set the lottery values (lottery table) for various lottery processes other than the internal lottery process, such setting processing is performed as appropriate. In the case of the first game machine, for example, if the 2BB state is set, the payout amount as the termination condition is set to "1," and if the 3BB state is set, the payout amount as the termination condition is set to "176."

If the main CPU 101 determines in S132 that the transition conditions for transitioning to any game state are not met (S132 is NO), and after processing in S134, it determines whether the current game section is a non-advantageous section (S135). If the main CPU 101 determines that the current game section is a non-advantageous section (S135 is YES), it performs a check to confirm that the conditions for starting an advantageous section have been met (S136). As mentioned above, in a non-advantageous section, only processing that refers to the determined internal winning combination is possible, so this processing is the same as the processing in S86 (game start state control processing) described above.

Next, the main CPU 101 determines whether the conditions for starting the advantageous period have been met (S137). If the main CPU 101 determines that the conditions for starting the advantageous period have not been met (S137 is NO), it terminates the end-of-game state control processing. If the main CPU 101 determines that the conditions for starting the advantageous period have been met (S137 is YES), it performs the setting processing for the start of the advantageous period (S138). As mentioned above, in the non-advantageous period, only processing that refers to the determined internal winning combination is possible, so this processing is the same as the processing in S88 above (end-of-game state control processing).

Next, the main CPU 101 updates the mode flag storage area (S139). That is, the main CPU 101 sets the mode (game state) for the newly started advantageous period. As mentioned above, in the non-advantageous period, only processing that references the determined internal winning combination is possible; therefore, this process is the same as the process in S89 (game start state control processing) described above.

Next, the main CPU 101 performs setting processing according to the set mode (S140). In this process, depending on the set mode, it performs setting processing as needed, such as setting the game duration (including the maximum number of games, etc.) for that mode, or setting the lottery values (lottery table) for various lottery processes other than the internal lottery process. As mentioned above, in the non-advantageous section, only processing that references the determined internal winning combination is possible; therefore, this processing is the same as the processing in S90 (game start state control processing) described above.

If the main CPU 101 determines in S135 that the current game section is not a non-advantageous section (i.e., it is an advantageous section) (S135 is NO), it performs the end-of-game processing during the advantageous section (S141). Details of the end-of-game processing during the advantageous section will be described later.

Next, the main CPU 101 performs a check to determine if the conditions for ending the advantageous section have been met (S142). This check determines whether the transition conditions (the conditions for ending the advantageous section) for transitioning from the advantageous section to the non-advantageous section have been met when the game ends. In the case of the first gaming machine, this check, for example, determines whether the activation conditions for various limit processes have been met based on the number of payouts during the advantageous section (see Figure 16), or whether 32 games have elapsed if the current mode is the termination mode.

Next, the main CPU 101 determines whether the conditions for ending the advantageous period have been met (S143). If the main CPU 101 determines that the conditions for ending the advantageous period have been met (S143 is YES), it performs the initialization process at the end of the advantageous period (S144). That is, the main CPU 101 ends the advantageous period and sets up a non-advantageous period. In this process, in response to the end of the advantageous period, it performs initialization processing to clear all information related to the advantageous period, such as various counters related to various limit processing (see Figure 16), the mode (game state) during the advantageous period, and the game period of that mode (including the number of games until the ceiling, etc.) (i.e., information related to the advantageous period). After this process, the main CPU 101 terminates the game end state control process. Also, if the main CPU 101 determines that the conditions for ending the advantageous period have not been met (S143 is NO), it terminates the game end state control process.

(Processing at the end of gameplay during the advantageous period)
Next, referring to Figure 31, the processing performed at the end of the game during the advantageous period, which is carried out in S141 of the game end state control processing described above, will be explained. Figure 31 is a flowchart showing an example of the procedure for processing at the end of the game during the advantageous period.

First, the main CPU 101 performs various counter update processing (at the end of gameplay) (S151). In this process, for example, various counters related to various limit processing based on the number of payouts during the advantageous period (see Figure 16), various counters managing the game period such as various modes (game states) during the advantageous period, or other counters managing the degree of advantage are updated according to predetermined update conditions (for example, the number of payouts, the number of times a predetermined combination of symbols is displayed, the type of stop operation, etc.).

Next, the main CPU 101 determines whether or not the system is in a specific mode (AT state) (S152). If the main CPU 101 determines that the system is in a specific mode (S152 is YES), it performs AT period management processing (at the end of the game) (S153). In this processing, for example, if it is possible to extend the game period of the AT state at the end of the game (for example, extending the number of games or adding sets), it determines whether or not the conditions for such extension are met, and performs processing such as extending the game period based on the result of this determination (if it is possible to shorten the game period of the AT state, it performs processing related to such shortening). In addition, this processing may manage the game period of the AT state regardless of whether or not it is extended, or the game period of the AT state may be managed in the processing of S151 above, and this processing may only perform processing related to extension. In the case of the first type of gaming machine, this process involves, for example, the aforementioned 1G consecutive win lottery based on the sub-flag at the time of entering the advantageous section, and then processing to extend the pseudo-bonus according to the result of this lottery.

The main CPU 101 determines if it is not in a specific mode (S152 is NO), and after S153, it determines whether the mode transition conditions have been met (S154). In the case of the first gaming machine, this process determines, for example, whether the destination mode has been determined according to the results of the mode transition lottery based on the sub-flag at the time of entering the advantageous section.

If the main CPU 101 determines that the mode transition conditions have been met (S154 is YES), it updates the mode flag storage area (S155). That is, the main CPU 101 sets the mode (game state) during the transitioned advantageous section. In the case of the first game machine, this process sets the destination mode determined according to the lottery result of the mode transition lottery based on the sub-flag at the time of entering the advantageous section.

Next, the main CPU 101 performs setting processing according to the set mode (S156). In this process, depending on the set mode, it performs setting processing as needed, such as setting the game duration (including the maximum number of games, etc.) for that mode, or setting the lottery values (lottery table) for various lottery processes other than the internal lottery process. In the case of the first gaming machine, this process is similar to, for example, the process in S140 described above. After this process, the main CPU 101 terminates the processing at the end of gameplay during the advantageous section. Furthermore, if the main CPU 101 determines that the mode transition condition has not been met (S154 is NO), it terminates the processing at the end of gameplay during the advantageous section.

[6-2. Periodic Interrupt Processing]
First, with reference to Figure 32, we will explain the periodic interrupt processing performed by the main CPU 101 of the main control circuit 100. Figure 32 is a flowchart showing an example of the procedure for periodic interrupt processing.

In this embodiment, the periodic interrupt processing cycle (1 interrupt time) is set to "1.1172 ms". However, the periodic interrupt processing cycle is not limited to this. For example, the periodic interrupt processing may be executed at a different cycle, or even if the same cycle is set, the number of interrupts actually performed for some or all of the processing may be set to "2" or more, resulting in the periodic interrupt processing being executed at a different cycle.

First, the main CPU 101 performs register saving (S201). Next, the main CPU 101 performs input port check processing (S202). This process checks the input states (on or off) of various sensors and switches connected to the main control board 71 (including those connected via the main relay board 73). For example, it compares the input state at the time of the previous interrupt with the input state at the time of the current interrupt to check whether there has been a change in the input state. If there has been a change in the input state, the change is stored in the input port storage area 0 (not shown) of the main RAM 103. Input states that are not affected by the change are stored as they are in the input port storage area 1 (not shown) of the main RAM 103.

Next, the main CPU 101 performs reel control processing (S203). This process controls the drive of each stepping motor 51L, 51C, and 51R, and controls the rotation and stopping of each reel 3L, 3C, and 3R. Next, the main CPU 101 performs communication data transmission processing (S204). This process transmits the parameters of each command stored in the communication data storage area to the sub-control circuit 200. If no command data is stored in the communication data storage area, the data stored in input port storage area 0 and input port storage area 1 is transmitted to the sub-control circuit 200 as input status commands.

In this embodiment, various command data are stored in a communication data storage area before being transmitted to the sub-control circuit 200 during periodic interrupt processing. However, for example, the various command data may be stored directly in a communication circuit (not shown) provided within the main control circuit 100 and transmitted to the sub-control circuit 200 without being stored in the communication data storage area. Furthermore, although detailed explanations are omitted in this embodiment, various command data are transmitted to the sub-control circuit 200 via serial communication. However, for example, various command data may be transmitted to the sub-control circuit 200 via parallel communication.

Next, the main CPU 101 performs 7-segment LED driving processing (S205). This process controls the display content of devices connected to the main control board 71 (including those connected via the main relay board 73), such as the information display device 14. Following this, the main CPU 101 performs timer update processing (S206). This process updates various timers managed by the main control circuit 100.

Next, the main CPU 101 performs error detection processing (S207). In this process, it detects whether various error conditions have occurred based on the input states checked in S202. Next, the main CPU 101 performs door open/close check processing (S208). In this process, for example, it checks the open/closed state of the lower door mechanism DD based on the input state of the door open/close monitoring switch 56. If various error conditions have occurred, or if the input state of the door open/close monitoring switch 56 is in the open state (off state), a security signal is output from the external centralized terminal board 55.

Next, the main CPU 101 performs register restoration (S209). After this process, the main CPU 101 terminates the periodic interrupt processing.

[7. Processing by the sub-control circuit]
Next, with reference to Figure 33, an overview of the sub-side control processing executed by the sub-CPU 201 of the sub-control circuit 200 using each program will be described. Figure 33 is a flowchart showing an example of the overview of the sub-side control processing.

In pachislo machine 1, various restrictions are imposed on the main control circuit 100 (including the main control board 71 and the main control board case) from the perspective of preventing fraudulent activities and modifications. However, there are not as many restrictions on the sub-control circuit 200 (including the sub-control board 72 and the sub-control board case). Therefore, the sub-control board 72 (and the sub-control circuit 200) can be configured in various ways depending on the type and number of connected performance devices, the type of performances performed by those devices, and the balance between these factors and manufacturing costs. This is why Figure 33 is labeled "Overview."

First, the sub-CPU 201 performs power-on processing, similar to the main CPU 101, upon power-up (S301 and S302). This processing includes detecting whether an abnormality occurred during power-up, initializing data stored in the sub-RAM 203, and activating various tasks necessary for the various performance execution control processes described later.

Furthermore, when the sub-CPU 201 receives a command transmitted from the main control circuit 100, it performs command reception and performance execution control processing (S303 and S304). In this process, for example, if an initialization command is received, the sub-CPU 201 refers to the parameter information of the received initialization command. If a setting change has been made, the sub-CPU performs the appropriate initialization process; if no setting change has been made, the sub-CPU performs a process to restore the state to what it was before the power outage.

Furthermore, for example, upon receiving a start command, the system refers to the parameter information of the received start command. If the system is not in AT mode, it determines (by drawing lots as necessary) the content of the animation that suggests or notifies the internal winning combination or game state, and controls various animation devices to execute the animation based on the determined content. If the system is in AT mode, in addition to the above, it also determines the content of the animation that notifies a favorable stopping operation pattern, and controls various animation devices to execute the animation based on the determined content.

Furthermore, for example, upon receiving a lock command, the system refers to the parameter information of the received lock command to determine the content of the animation linked to the lock animation, and controls various animation devices to execute the determined animation. Similarly, upon receiving a reel stop command, the system refers to the parameter information of the received reel stop command to determine the content of the animation linked to the stop start position, planned stop position (or simply which stop operation was performed), and controls various animation devices to execute the determined animation. Furthermore, upon receiving a prize activation command, the system refers to the parameter information of the received prize activation command to determine the content of the animation linked to the awarded prize, and controls various animation devices to execute the determined animation.

Furthermore, the sub-CPU 201 performs control processing for the execution of performance actions when the performance buttons 10a and 10b, which are connected to the sub-control board 72 (including those connected via the sub-relay board 74), are operated (S305 and S306). In this processing, for example, if a performance button corresponding to a performance is operated during the execution of an operation-linked performance, the sub-CPU 201 controls various performance devices so that the content of the operation-linked performance changes. Also, for example, if a performance button is operated during non-gameplay to call the user menu (described later), the sub-CPU 201 performs control to display the user menu. Furthermore, if a performance button is operated for selection or confirmation while the user menu is displayed, the sub-CPU 201 performs control according to these operations.

Furthermore, if a trigger other than those mentioned above occurs, the sub-CPU 201 performs other performance execution control processing (S307). In this process, for example, if a predetermined period of inactivity (e.g., about 30 seconds) occurs during which no game-related operations or user menu operations are performed, the sub-CPU 201 determines the content of the performance related to the demo status notification and controls various performance devices to execute the determined performance.

[8. Other functions of pachislo machines]
As described above, pachislo machine 1 is equipped with various functions to control gameplay and various functions to control the effects, as well as various configurations to realize these functions. However, it may also be equipped with other functions, such as those shown below. Below, we will explain some examples of other functions on the player's side and some examples of other functions on the arcade's side.

[8-1. Player's Side]
For example, when a player controls the game's presentation, a user menu is displayed. If the player selects a desired menu item from that menu, and then makes appropriate selection and confirmation operations within that menu, the player can obtain various information and make various settings.

For example, if the "Symbol Arrangement/Payout Table" is selected and confirmed, an information screen will be displayed on the display unit showing the symbol arrangement in pachislo machine 1, the specified symbol combinations, and the payouts (bonus details) upon winning.

Furthermore, for example, if "Volume/Brightness Adjustment" is selected and confirmed, a settings screen will be displayed on the display unit, allowing the user to adjust the brightness of various display devices in the pachislo machine 1, the volume of sound output from the speaker group, or the brightness of the lamps/LEDs. In such settings, to enable more detailed settings or to facilitate easier acceptance of setting operations, the various operation units that receive player game operations may be used as part of the operation unit that receives setting operations (i.e., the operation unit that receives performance operations).

Furthermore, if "Custom" is selected and confirmed, for example, a settings screen will be displayed on the performance display unit, allowing the user to configure the performance mode of the pachislot machine 1 (for example, the type of character used in the performance (including the type of the character (display mode) itself, the type of sound corresponding to the character, or the type of costume or item (individual display mode) related to the character), the probability of the performance occurring (including the type of expected value when the performance occurs), or the mode of suggestion or notification (including the timing of the performance execution), etc.). In such settings, to enable more detailed settings or to facilitate easier acceptance of setting operations, various operation units that accept player game operations may be used as part of the operation unit that accepts setting operations (i.e., the operation unit that accepts performance operations).

Furthermore, if "UniMemo" is selected, for example, players can receive information services using their mobile devices (e.g., mobile phones or smartphones). This information service allows players to log in and start playing (or start playing without logging in), and then log out at the end of the game to view or retrieve game history information (for example, the total number of games played, the number of times advantageous game states occurred, the highest number of tokens won, and other information related to the game's results).

Furthermore, the game history information also includes information about associated bonuses, such as the types of characters that became available to display and the types of music that became available to output during gameplay, depending on the game's outcome (fulfillment of unlocking conditions), as well as information about the types of characters that became available to display and the types of music that became available to output on the player's mobile device.

Furthermore, various methods can be employed for login and logout in such information provision services. For example, login and logout could be performed by having the player scan a QR code displayed on the display unit using their terminal. Alternatively, login and logout could be performed by having the player enter a password or remember a password (specifically, for example, when logging out at the end of a game, a 4- to 10-digit string could be displayed as a password for the next time, instead of a QR code, which the player could then write down on paper or take a picture of with their mobile device, and then enter this password when logging in before the next game). These methods can also be combined as appropriate for login and logout.

[8-2. On the side of the amusement parlor]
For example, if the administrator of the gaming establishment performs a setting confirmation operation (which may be a setting change operation or any other operation performed by the administrator of the gaming establishment), the hall menu will be displayed. If the desired menu is selected from that hall menu, and further selection and confirmation operations are performed for the selected menu, the administrator of the gaming establishment will be able to obtain various information and make various settings.

For example, if "Time Setting" is selected and confirmed, a settings screen will be displayed on the display unit, allowing the date and time of the pachislo machine 1 to be set. The date and time can also be configured to be automatically updated, for example, during the sub-side power-on process described above (see S302 in Figure 33).

Furthermore, if, for example, "Total Medal Information" is selected and confirmed, an information screen will be displayed on the display unit showing historical information such as the number of medals inserted and dispensed during a predetermined period (for example, each of seven business days) in the pachislo machine 1. Such a menu can also be configured as a menu within the user menu.

Furthermore, if, for example, "Setting Change/Confirmation History" is selected and confirmed, an information screen will be displayed on the display unit showing historical information such as the number of setting change operations and setting confirmation operations within a predetermined period (for example, each of seven business days) on the pachislo machine 1. Also, if, for example, "Error Information History" is selected and confirmed, an information screen will be displayed on the display unit showing historical information such as the date and time of errors and their details within a predetermined period (for example, each of seven business days) on the pachislo machine 1.

Furthermore, if, for example, "Monitoring History" is selected and confirmed, an information screen will be displayed on the display unit that allows users to check history information such as the date and time the doors were opened and the duration of those openings within a predetermined period (for example, each of seven business days) in the pachislo machine 1. Also, if, for example, "Warning Settings" is selected and confirmed, a settings screen will be displayed on the display unit that allows users to configure the type and frequency of various warning notifications in the pachislo machine 1.

Furthermore, for example, if "Power Saving Mode Setting" is selected and confirmed, a settings screen will be displayed on the display unit, allowing the user to configure whether or not to activate the power saving function of the pachislo machine 1. Such a menu can also be configured as a menu within the user menu. Additionally, in order to enable more detailed settings or to facilitate easier acceptance of setting operations, various control units that accept player game operations may be used as part of the control unit that accepts setting operations (i.e., the control unit that accepts performance operations).

Furthermore, if, for example, the "stop setting" is selected and confirmed, a settings screen will be displayed on the display unit that allows setting whether or not to activate the stop function in pachislo machine 1. The stop function refers to a function that, when predetermined operating conditions are met, renders the machine unplayable until a release operation (e.g., a reset operation) is performed by the administrator of the amusement parlor. The predetermined operating conditions may be, for example, when the advantageous section is forcibly terminated by the execution of the limit processing described above, or when a specific state (e.g., a bonus state, an increase section, or an advantageous section (including the performance section)) ends. Also, when the stop function is set to ON, the automatic settlement function described later may also be set to ON in conjunction with this.

Furthermore, if, for example, "Automatic Settlement Setting" is selected and confirmed, a settings screen will be displayed on the display unit, allowing users to configure whether or not to activate the automatic settlement function in pachislo machine 1. The automatic settlement function refers to a function that automatically settles credits (i.e., all credited game value is automatically returned) when predetermined operating conditions are met. These predetermined operating conditions may be, for example, met when the advantageous section is forcibly terminated by the execution of the aforementioned limit processing, or when a specific state (for example, a bonus state, an increase section, or an advantageous section (including the performance section)) ends. Additionally, if the automatic settlement function is set to ON, the aforementioned stop-play function may also be set to ON in conjunction with it.

Furthermore, when setting the stop-play function or automatic settlement function, in order to enable more detailed settings or to simplify the acceptance of setting operations, various control units that accept player game operations may be used as part of the control unit that accepts operations related to the said settings (i.e., the control unit that accepts performance operations). However, in this case, since it is undesirable to unnecessarily increase the number of control units that can accept operations, it may be possible to use only a specific control unit (for example, the stop button) as part of the control unit that accepts operations related to the said settings.

[9. Examples of extensions]
Up to this point, the invention according to this embodiment has been described using pachislo machine 1 as an example of a gaming machine to which the invention according to this embodiment can be applied. However, the gaming machines to which the invention according to this embodiment can be applied are not limited to this. For example, it can also be applied to gaming machines commonly referred to as "pachinko machines" or "slot machines," and similar effects can be obtained. In other words, the invention according to this embodiment can be applied to any gaming machine that is capable of performing a game (controlling the game) in accordance with the player's game actions (operations). Furthermore, the configuration and functions of gaming machines, including pachislo machine 1, are not limited to those described above, and various modifications and extensions are possible. The following describes some examples of such extensions.

(Pachinko machine)
A pachinko machine includes, for example, a game board having a game area in which game balls can roll down, a glass door including protective glass that allows the game area to be seen from the outside while protecting it, a display device for effects provided in a predetermined area of the game area (which may be provided outside the game area), a payout unit for dispensing game balls, and a circuit board unit including various control boards that perform various controls related to the game and effects, and these are supported by a frame (sometimes simply referred to as a "frame").

Furthermore, the front of a pachinko machine is equipped with, for example, a launch handle as one of the player's operating mechanisms, an upper tray for storing game balls used in the game, and a lower tray for storing dispensed game balls. Many machines also feature the aforementioned buttons and movable display devices for special effects. The game area also includes, for example, a starting area (sometimes called a "starting opening") through which game balls can pass, a specific area (sometimes called a "V-prize opening"), a variable prize-winning device (sometimes called a "large prize opening") that can switch between a state where game balls are more likely to enter and a state where they are less likely to enter, and a variable display device capable of variably displaying identification information (sometimes called "symbols," including "special symbols" and "regular symbols").

In a pachinko machine, the player operates the launch handle to fire a game ball into the game area. For example, when the launched game ball passes through the starting area, the variable display starts. At this time, a probability is determined, depending on the current state (for example, whether it is a probability variation game state with a relatively high probability of winning) and the type of starting area, to determine whether or not to transition to a different game state (for example, whether or not to transition to a jackpot game state or a minor win game state that is advantageous to the player). (That is, whether or not to transition to a different game state is determined by a lottery (or judgment)). Subsequently, when the conditions for stopping the variable display (for example, when the set variation time has ended) are met, the variable display stops in a manner corresponding to the above determination result. At this time, if the above determination result is one that transitions to a different game state (a win), the stopping manner will also be the display result corresponding to that win, and the game will transition to the game state corresponding to that win when that display result is displayed. On the other hand, if the above decision result does not result in a change of game state (a loss), the stopping pattern will also be a display result corresponding to a loss, and the game state will not change. However, for example, if the launched game ball passes through a specific area (which is usually a state where it is difficult for the game ball to pass through), a change in game state will be determined regardless of the variable display device.

In other words, while pachislo machine 1 starts when the player bets the required number of tokens and performs the start operation, pachinko machine starts when the player launches the required number of game balls by operating the launch handle, and for example, when the game balls pass through the starting area, both machines start in the same way that the game is initiated by the player's actions. Furthermore, pachislo machine 1 and pachinko machine share the commonality that the final stopping pattern permitted to be displayed (in other words, the content of the granted reward) is determined when the start trigger is met.

Furthermore, while pachislot machine 1 differs in that the variable display is stopped by the player's stop operation, and pachinko machine stops the variable display when a stop condition is met (without the player's stop operation), both machines stop the variable display according to a predetermined result and grant benefits according to the type of stop. Also, pachislot machine 1 and pachinko machine are similar in that they are capable of executing game-related effects. For example, the above-mentioned effect display device functions as the effect display unit and information display unit described above. Of course, pachinko machines may also be equipped with the above-mentioned lamps, speakers, or other effect execution means, and may execute effects using these.

In pachinko machines, the decorative symbols (sometimes referred to as "identification information") on the above-mentioned display device are often displayed in a variable manner. As mentioned above, the actual game result is displayed on the variable display device, but because the variable display device is small and the display result is shown by the lighting patterns of multiple LEDs, it is often difficult for players to recognize the game result. For this reason, the mainstream pachinko machines are designed so that the decorative symbols on the above-mentioned display device are displayed in a variable manner (and stopped) in conjunction with the variable display of the variable display device, allowing players to play the game. Furthermore, the display of such decorative patterns, while sometimes delayed for a certain period after the trigger is met for dramatic effect, or temporarily stopped before the stop condition is met, is fundamentally similar to the variable display device described above. It displays identification information in a variable or stopped manner according to the progress of the game (for example, in the case of a win, the decorative patterns are displayed in a special stopping pattern (e.g., matching patterns), while in the case of a loss, the decorative patterns are displayed in a non-special stopping pattern (e.g., scattered patterns)). Therefore, it is possible to apply the invention according to this embodiment by considering this as one aspect of the variable display unit described above.

In other words, in this embodiment, the various aspects described as the configuration of the external or internal structure of the pachislo machine 1 can be applied to the external or internal structure of a pachinko machine, except for those with properties unique to the pachislo machine 1 (for example, those that require tokens and cannot be replaced with game balls).

Furthermore, in pachinko machines, various controls related to gameplay are performed by the main control circuit, which acts as the game control unit, mounted on the main control board (including, in some cases, payout controls, which are performed by the payout control circuit mounted on a payout control board electrically connected to the main control board), and various controls related to the visual effects are performed by the sub-control circuit, which acts as the visual effect control unit, mounted on the sub-control board. Therefore, the various matters described as the electrical configuration of pachislo machine 1 can be applied to the electrical configuration of pachinko machines, except for those with properties unique to pachislo machine 1 (for example, those related to stopping operations).

Furthermore, in pachislot machine 1, as described above, it is possible to provide game states that are relatively advantageous to the player (or, depending on the configuration, may be disadvantageous), such as bonus states, RT states, AT states, and ART states that combine these. For example, in bonus states, by making the drawing method for small wins more favorable than in non-bonus states, it is possible to maintain a state where medals are more likely to be awarded (increased) for a certain period of time. In RT states, by making the drawing method for replay wins more favorable than in non-RT states, it is possible to maintain a state where misses are less likely to occur (and as a result, medals are less likely to decrease) for a certain period of time. In AT states, by notifying the player of advantageous stopping operation patterns, it is possible to maintain a state where medals are more likely to be awarded (increased) for a certain period of time.

In response to this, it is possible to provide various game states with similar properties in pachinko machines. For example, in the jackpot and minor jackpot game states, the variable prize-winning device is controlled differently than usual, making it possible to shift to a state where game balls are more likely to enter, thereby allowing a state where game balls are more likely to be awarded (increased) to continue for a certain period. Furthermore, for example, in the time-saving game state (sometimes referred to as the "electric support state"), the normal symbols are controlled differently than usual, making it possible to make it easier for game balls to pass through the starting area, thereby increasing the frequency of draws by the variable display device and allowing a state where game balls do not decrease easily to continue for a certain period. Also, for example, in the probability-changing game state, the special symbols are controlled differently than usual, making it possible to maintain a state where the probability of winning by the variable display device is higher (resulting in a state where game balls increase easily) for a certain period.

In other words, in this embodiment, the various aspects described as control configurations related to the transition (or shift) of game states in the pachislo machine 1 can be applied to the control configurations related to the transition (or shift) of game states in a pachinko machine, except for those with properties unique to the pachislo machine 1 (for example, those involving transitions between game sections). The same applies to other aspects of the pachislo machine 1's gameplay described elsewhere.

Furthermore, regarding the shortened play state, even in pachinko machines, it is possible to transition to the shortened play state when the number of games played in the non-shortened play state (normal play state) reaches a predetermined number. In other words, pachinko machines can also be equipped with a ceiling function (a function that allows transitioning to an advantageous state (e.g., shortened play state) as a relief measure when an unfavorable state (e.g., normal play state) continues for a predetermined period (e.g., 900 games (spins)) without transitioning to an advantageous state (e.g., jackpot play state)). Therefore, the various matters described regarding the ceiling function configuration of pachislot machine 1 can also be applied to the ceiling function configuration of pachinko machines.

Furthermore, even in the case of a shortened play state, in pachinko machines, if the stop pattern of the variable display device corresponds to a specific losing result during a non-shortened play state (normal play state), it is possible to transition to a shortened play state as a trigger. In other words, in pachinko machines, it is possible to transition to a play state (not triggered by a transition to a jackpot play state, etc.) by displaying a specific display result (a specific combination of symbols). Therefore, for example, the various matters described as the configuration for the transition (transition) of the RT state due to the display of a specific combination of symbols in pachislot machine 1 can be applied to the configuration for the transition (transition) of the shortened play state due to the display of a specific display result in a pachinko machine.

(Coinless gaming machine)
In this embodiment of the pachislo machine 1, the game starts with the player making a bet (i.e., inserting their tokens into the token slot 5 to place a bet, or betting credited tokens by operating the MAX bet button 6a or the 1 bet button 6b), and when the game ends and there are tokens to be paid out, the hopper device 32 is driven to pay out tokens from the token payout port 11, or the tokens are credited. However, the configuration of the pachislo machine 1 is not limited to this.

For example, the invention according to this embodiment is applicable to all forms in which a player bets the game value necessary for the game, the game is played based on that bet, and a reward (for example, game value is awarded) is given based on the result of the game. That is, it is applicable not only to forms in which medals are physically inserted (bet) and dispensed by the player's actions, but also to pachislo machines 1 that electromagnetically manage the game value held by the player (or, even if not electromagnetically, manage it in a manner that prevents the player from directly touching the game value), enabling medalless gameplay. Here, such a pachislo machine 1 is referred to as a "medalless game machine." Note that medalless game machines are sometimes referred to as "managed game machines" or "sealed game machines."

Furthermore, the electromagnetic management of the game value held by the player may be performed by the main control circuit 100 (main control board 71) itself, or by a game value management device attached to (connected to) the main control circuit 100 (main control board 71) (hereinafter, such a management device may be described as a "medal count control board"). An example of how this game value management device is provided will be described below.

The game value management device is a device installed in the pachislo machine 1, comprising at least ROM and RWM (or RAM), and is connected to an external game value provisioning device (hereinafter, such a game value provisioning device may be described as a "communication-only unit") via a communication device (hereinafter, such a communication device may be described as a "connection terminal board") in a bidirectional manner. The game value management device can perform operations such as game value lending (i.e., operations that provide game value necessary for the player to bet game value), game value granting (i.e., operations that provide the granting game value to the player when a winning combination related to the granting of game value is achieved), and operations that electromagnetically record the game value provided by these operations. The game value provisioning device may be referred to as a "game value (game medium) handling device," a "game value (game medium) lending device," or a "sandbox," etc.

Furthermore, the external gaming value provision device is connected to an external payout management device (payout management server). The gaming value management device is configured to transmit payout management information to the external payout management device via a communication device and the external gaming value provision device. Here, the payout management information consists of various types of information necessary for the external payout management device to manage payouts. An example of payout management information will be described later. The connection between the external gaming value provision device and the external payout management device is, for example, via an internet connection.

Here, "payout" directly refers to the number of game tokens dispensed. However, in this embodiment, it also encompasses concepts such as the degree to which benefits are granted to the player (e.g., how much the player profited (how much the arcade lost), or how much the player lost (how much the arcade profited), the duration of advantageous states (e.g., bonus states, AT states, or a series of advantageous periods), and the degree of gambling potential expected from combinations of these factors.

Furthermore, for example, a display device (not shown) showing the number of game values held may be provided on the front side of the pachislo machine 1, and the game value management device may manage the number of game values displayed on this display device based on the management results of the number of game values. That is, the game value management device may not only record the total number of game values that the player can use for playing by electromagnetic means, but may also be configured to control the display of the recorded results. In this case, it is desirable that the game value management device has the capability to allow the player to freely transmit a signal indicating the recorded number of game values to an external game value providing device, that the recorded number of game values cannot be reduced except by direct operation by the player, and that the signal indicating the recorded number of game values can only be transmitted via a communication device.

Furthermore, the game value management device may not only have the function of electromagnetically managing the player's game value using an external game value provisioning device, but may also have the function of managing the number of game values bet by the player's physical actions and the number of game values paid out by the physical actions of the pachislo machine 1. In other words, it may also be capable of managing the actual insertion and payout of tokens in a conventional pachislo machine 1. In this way, the pachislo machine 1 can be controlled using conventional methods, or using methods such as the aforementioned tokenless game machine, thus allowing for a common configuration regardless of the specifications of the pachislo machine 1. Also, in this case, the game value management device may directly control the selector 31 and hopper device 32, or it may be indirectly controlled by the main control circuit 100 (main control board 71), with the control results being transmitted.

Furthermore, in addition to the above, the pachislo machine 1 should be equipped with various operating means necessary for the operation of a medalless gaming machine, such as lending and return (settlement) operating means that can be operated by the player. The gaming value provision device should also be equipped with various devices such as an insertion slot for valuable items like banknotes, an insertion slot for recording media (e.g., IC cards), and a contactless communication antenna for depositing electronic money from mobile terminals, as well as various operating means necessary for the operation of a medalless gaming machine, such as lending and return operating means that can be operated by the player (none of which are shown). Note that the insertable recording media include not only non-member recording media issued by the gaming parlor on the day, but also member recording media held by members of the gaming parlor. The gaming value recorded on the non-member recording media is valid only on the day of issue (it becomes invalid from the following day onwards), but the gaming value recorded on the member recording media remains valid from the following day onwards.

Let's explain an example of the game flow in this case. For example, first, the player deposits valuable value into the game value provision device using one of the methods. The game value provision device subtracts a predetermined number of valuable value in response to the player's operation of one of the lending operation means, and provides the pachislo machine 1 with game value corresponding to the subtracted valuable value. The player then plays the game, and if more game value is needed, repeats the above operation. After that, when the player has acquired a predetermined number of game value as a result of the game and is ready to end the game, the player operates one of the return operation means. The game value management device transmits the number of game value to the game value provision device in response to the player's operation of one of the return operation means. The game value provision device ejects a recording medium that has recorded the transmitted number of game value. The game value management device clears the number of game value it has stored when it transmits the number of game value. Players can take the dispensed recording medium to a prize exchange center to exchange it for prizes, or they can insert the dispensed recording medium into a game value provision device compatible with another pachislo machine and continue playing. Furthermore, if the dispensed recording medium is a member recording medium, it remains valid for subsequent days, allowing players to stop playing at that point.

In the example above, the game value management device transmitted the total game value to the game value provision device in response to the player's return operation. However, depending on the nature of the player's return operation, the system may be configured to transmit only the game value desired by the player. In other words, the game value held by the player may be divided. Furthermore, while the game value provision device recorded the transmitted game value on a recording medium and discharged it, it may also transmit information of equivalent value to the player's mobile terminal using the aforementioned contactless communication antenna, or it may discharge, for example, cash or cash equivalents, as long as it provides the player with something of equivalent value.

Furthermore, the pachislo machine 1 or the game value provisioning device may be provided with a lock operation means that can be operated by the player, and in response to the operation of this lock operation means, it may be possible to control the device to a state where communication between the game value management device and the game value provisioning device is impossible (locked state). In this case, the pachislo machine 1 or the game value provisioning device may be configured to allow authentication processing such as setting a PIN (and inputting the set PIN), issuing a one-time password (and inputting the issued one-time password), or biometric authentication, and the lock state may be released when the result of the authentication processing is successful.

As described above, with the coinless gaming machine, compared to a machine where the gaming medium is physically used for gameplay, some external structures such as the coin slot 5 and coin payout port 11, or some internal structures such as the selector 31 and hopper device 32, are no longer necessary. This not only reduces the cost and manufacturing cost of the gaming machine, but also reduces its power consumption. Furthermore, since accessing the inside of the gaming machine becomes more difficult, fraudulent activities against the machine can be prevented. In addition, because players do not directly touch the gaming medium, the gaming environment is improved and noise is reduced. In short, it becomes possible to provide a gaming machine that improves various aspects of the environment surrounding the gaming machine.

(Example configuration of a coinless gaming machine)
Next, with reference to Figure 34, an example configuration of the pachislo machine 1 when it is configured as a coinless gaming machine will be described. Figure 34 is a diagram showing an example configuration of a coinless gaming machine. In the following, we will mainly describe an example configuration when a coin count control board (game value management device) is provided.

As described above, the medal count control board is connected to the main control board 71 and manages the number of medals (game value) held by the player. The medal count control board is also connected to a dedicated communication unit (game value provision device) via a connection terminal board (communication device). Furthermore, the medal count control board transmits payout management information to the payout management device via the connection terminal board and the dedicated communication unit. The medal count control board also incorporates a medal count control circuit (not shown). This control circuit, for example, includes a medal count control CPU (not shown), a medal count control ROM (not shown), and a medal count control RWM (not shown).

Furthermore, the payout management device is, for example, a server managed by an information center of a cooperative to which amusement machine manufacturers belong. The purpose of this device is to monitor whether the gambling aspect (payout performance) of each amusement machine is appropriate, by accumulating the transmitted payout management information.

Therefore, from this perspective, the medal count control board and connection terminal board, like the main control board 71, play important functions in the pachislo machine 1, and thus need to be installed inside the pachislo machine 1 in a manner that prevents fraudulent activity and unauthorized modification. Configuration examples 1 and 2 shown in Figure 34 illustrate examples of such configurations.

<Configuration Example 1>
The configuration example 1 shown in Figure 34 shows that the medal count control board and the connection terminal board are housed in the main control board case, similar to the main control board 71. Here, the main control board case is usually sealed in various ways to make it difficult to open (or remove) or to allow for the recognition of evidence of opening (or the number of times it has been opened) (for example, sealing by crimping, attaching sealing stickers, or attaching crimp stickers that record the cutting of the crimp).

Therefore, by housing the medal count control board and connection terminal board within the main control board case, the same security effect as the main control board 71 can be obtained, and fraudulent activities and unauthorized modifications can be appropriately prevented.

<Configuration Example 2>
The configuration example 2 shown in Figure 34 shows that, unlike the configuration example 1 described above, the medal count control board and connection terminal board are housed in a separate medal count control board case, which is provided separately from the main control board case. The medal count control board case is constructed as a transparent (or semi-transparent) resin case, similar to the main control board case, so that the medal count control board and connection terminal board housed inside are easily visible.

In the medal count control board case of Configuration Example 2, the same sealing process as the main control board case can be applied, or at least a portion of the sealing process can be applied. For example, the medal count control board case may be sealed by crimping, similar to the main control board case, but without a sealing sticker. Furthermore, while the main control board case may be required to use a predetermined crimping sticker, the medal count control board case may be allowed to use any sticker as the crimping sticker.

<Example of accumulated data>
The example of stored data shown in Figure 34 illustrates an example of various data stored in the payout management device. Specifically, it shows an example of payout management information transmitted from the medal count control board to the payout management device via the connection terminal board and dedicated communication unit. Note that this is merely an example, and it is possible to configure the device to not transmit some of the various types of information shown in Figure 34, or to transmit information other than the various types of information shown in Figure 34.

Furthermore, the timing at which the medal count control board transmits information to the dedicated communication unit is arbitrary, and the timing at which the dedicated communication unit transmits information to the payout management device is also arbitrary. As long as the payout management device can monitor the payout performance of each gaming machine at least for each unit (for example, one business day of a gaming parlor), the transmission timing may be arbitrary. For example, the timing at which the medal count control board transmits information to the dedicated communication unit and the timing at which the dedicated communication unit transmits information to the payout management device may be different. Also, for example, the timing at which the medal count control board transmits information to the dedicated communication unit may vary depending on the type of information.

The accumulated data "Total Number of Coins Inserted" represents the cumulative number of coins inserted per unit since the power was turned on for each gaming machine. For example, the coin count control board transmits information on the number of game values bet by the player's betting operations (excluding those bet through the re-play function) to a dedicated communication unit at predetermined timings (e.g., after each game). The dedicated communication unit then transmits the cumulative total of this information to the payout management device at predetermined timings (e.g., at the end of business hours for the gaming parlor).

The accumulated data "Total Payouts" represents the cumulative number of payouts per unit since each gaming machine was powered on. For example, the medal count control board transmits information on the number of game values assigned by the gaming machine's payout process (excluding those assigned through re-play) to a dedicated communication unit at predetermined timings (e.g., after each game). The dedicated communication unit then transmits the cumulative total of this information to the payout management device at predetermined timings (e.g., at the end of business hours for the gaming parlor).

The accumulated data "MY" represents the maximum difference in tokens generated within one unit since the power was turned on for each gaming machine (in short, the difference in tokens obtained during the period in which the gaming value increased the most within one unit; this is referred to as "MY"). For example, the token count control board calculates this maximum difference in tokens and transmits the calculated information to a dedicated communication unit at a predetermined timing (for example, at the end of business hours of the gaming parlor). The dedicated communication unit then transmits this information to the token management device at a predetermined timing (for example, at the end of business hours of the gaming parlor).

The accumulated data, "Total Payouts from Special Features," represents the cumulative payout per unit since the power was turned on for each gaming machine, and specifically, the cumulative payouts during the operation of various special features. For example, the medal count control board transmits information about the number of game values assigned by the gaming machine's payout process during the operation of various special features to a dedicated communication unit at predetermined timings (e.g., after each game during the operation of various special features). The dedicated communication unit then transmits the cumulative total of this information to the payout management device at predetermined timings (e.g., at the end of business hours for the gaming parlor).

The accumulated data, "Total Payouts from Continuous Bonus Features," represents the cumulative payout per unit since the power was turned on for each gaming machine, and specifically, the cumulative payouts during the operation of continuous bonus features (RB, including RB during BB operation). For example, the medal count control board transmits information about the number of game values assigned by the gaming machine's payout process during the operation of continuous bonus features to a dedicated communication unit at predetermined timings (e.g., after each game during the operation of continuous bonus features). The dedicated communication unit then transmits the cumulative total of this information to the payout management device at predetermined timings (e.g., at the end of business hours for the gaming parlor).

Furthermore, the medal count control board transmits various information that can be displayed on the payout ratio monitor device 54 to the dedicated communication unit at a predetermined timing (for example, at the time of calculation by the payout ratio monitor device 54), and the dedicated communication unit transmits this information to the payout management device at a predetermined timing (for example, at the time of transmission from the medal count control board). Note that the stored data "payout ratio" corresponds to, for example, the payout ratio information described above; the stored data "continuous payout ratio" corresponds to, for example, the continuous payout ratio information described above; the stored data "advantageous section ratio" corresponds to, for example, the specific section ratio information described above; the stored data "payout ratio including instructions" corresponds to, for example, the payout ratio information described above that is also included in the aggregation and calculation even during the AT state; and the stored data "payout status ratio" corresponds to, for example, the specific section ratio information described above that is also included in the aggregation and calculation even while various payouts are operating.

The accumulated data, "Number of Games Played," represents the cumulative number of games played per unit since each gaming machine was powered on. For example, the medal count control board transmits information about the number of games played to a dedicated communication unit at predetermined timings (e.g., after each game), and the dedicated communication unit transmits the cumulative total of this information to the payout management device at predetermined timings (e.g., at the end of business hours for the gaming parlor).

The stored data, "Main Control Chip ID Number," is the individual identification number (also called "CPUID," referred to as the "Chip ID Number") of the main control circuit 100 of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this individual identification number. The dedicated communication unit, when transmitting various information to the payout management device, transmits information including this transmitted individual identification number.

The stored data, "Main Control Chip Manufacturer Code," is the manufacturer code recorded in the management area of the main ROM 102 of the main control circuit 100 of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this manufacturer code. The dedicated communication unit, in turn, transmits information including this transmitted manufacturer code to the payout management device.

The stored data, "Main Control Chip Product Code," is a product code recorded in the management area of the main ROM 102 of the main control circuit 100 of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this product code. The dedicated communication unit, in turn, transmits information including this transmitted product code to the payout management device.

The stored data, "Medal Count Control Chip ID Number," is the individual identification number of the medal count control circuit of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this individual identification number. The dedicated communication unit, in turn, transmits information including this transmitted individual identification number to the payout management device. Note that if the system is configured so that various information is transmitted to the dedicated communication unit via the main control board 71 without a medal count control board, this information will be "0".

The stored data, "Medal Count Control Chip Manufacturer Code," is the manufacturer code recorded in the management area of the medal count control ROM in the medal count control circuit of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this manufacturer code. The dedicated communication unit, in turn, transmits information including this transmitted manufacturer code to the payout management device. Note that if the system is configured so that various information is transmitted to the dedicated communication unit via the main control board 71 without a medal count control board, this information will be "0".

The stored data, "Medal Count Control Chip Product Code," is the product code recorded in the management area of the medal count control ROM in the medal count control circuit of each gaming machine. For example, when the medal count control board transmits various information to the dedicated communication unit, it transmits information including this product code. The dedicated communication unit, in turn, transmits information including this transmitted product code to the payout management device. Note that if the system is configured so that various information is transmitted to the dedicated communication unit via the main control board 71 without a medal count control board, this information will be "0".

Thus, the payout management device is capable of storing various types of information (payout management information) transmitted from the gaming machine. Furthermore, the payout management information includes multiple individual identification pieces of information that can identify a specific gaming machine (for example, the "main control chip ID number" to the "medal count control chip product code" mentioned above). Therefore, the payout management device can identify the source gaming machine using this individual identification information. Moreover, if, for example, the correspondence between the "main control chip ID number" and the "medal count control chip ID number" changes at some point, the device can recognize the possibility that one of the control boards has been replaced (i.e., the possibility of fraudulent activity or modification).

Furthermore, the payout management information includes multiple payout data points that identify the payout performance per unit (for example, the "total number of tokens inserted" to the "number of games played" mentioned above). Therefore, the payout management device can recognize whether the gambling potential of the transmitting gaming machine is within an appropriate range based on this payout information. For example, if the "total number of tokens paid out" or the "ratio of bonus items with instructions" suddenly becomes significantly high, the device can recognize the possibility of fraudulent activity or modification, or the possibility of some flaw in the original design specifications.

Furthermore, if the payout management device detects the aforementioned possibilities, the results will be notified to the amusement parlor or amusement machine manufacturer, and appropriate measures can be expected to be taken. In other words, a management system is constructed that includes multiple managed amusement machines, a gaming value provision device (communication-only unit) that transmits payout management information from the managed amusement machines to the payout management device, and a payout management device that manages the payout performance of each managed amusement machine based on the transmitted payout management information. This makes it possible to properly manage all managed amusement machines under control.

<Variation 1>
As described above, in a medalless gaming machine, the number of game tokens held by a player can be managed by a token count control board. Therefore, a token count monitor device (not shown) may be provided on the token count control board so that the manager of the gaming parlor can grasp this management status or other information.

The medal count monitor device is, for example, composed of a four-digit seven-segment LED and is installed inside the medal count control board case. The medal count monitor device sequentially displays various information related to the game value (for example, some or all of the aforementioned payout management information) aggregated and calculated by the medal count control CPU (or the main CPU 101). Note that if the medal count monitor device displays all the information displayed by the payout ratio monitor device 54, the payout ratio monitor device 54 may be omitted. Alternatively, the payout ratio monitor device 54 may be used in conjunction with the medal count monitor device.

Furthermore, the medal count monitor device may be mounted on the medal count control board, or on another board connected to the medal count control board (for example, a connection terminal board). It may also be located elsewhere within the cabinet G. For example, it may be mounted on the medal count control board case. Additionally, a control switch for starting or switching the display content of the medal count monitor device may be provided within the cabinet G, and various information may be displayed when this switch is operated. Furthermore, assuming the use of such a control switch, for example, the information display device 14 may be used in conjunction with the medal count monitor device.

Furthermore, the medal count monitor device may display the type of error that has occurred when various error conditions related to it occur. For example, if a communication error occurs with the main control board 71, a communication error occurs with the connection terminal board, a communication error occurs with the game value provision device, or an abnormality occurs in the medal count control RWM, the device may display a corresponding numerical value. In this case, to allow the manager of the amusement parlor to easily recognize which error condition the displayed numerical value corresponds to, an explanatory section (such as a sticker or printing) indicating the correspondence should be provided on or near the medal count control board case.

<Modified Example 2>
As described above, in a medalless gaming machine, the medal count control board can be configured to transmit payout management information to the outside via a connection terminal board. In this embodiment, an external centralized terminal board 55 is also provided to transmit information to the outside. Therefore, the connection terminal board and the external centralized terminal board 55 can be configured as follows, for example.

For example, the connection terminal board and the external centralized terminal board 55 can be configured as a common terminal board. This not only reduces the number of components but also reduces external wiring, thereby enhancing security.

Furthermore, for example, the connection terminal board and the external centralized terminal board 55 are configured as a single unit. Alternatively, for example, the connection terminal board and the external centralized terminal board 55 are placed in close proximity within the cabinet G. This improves work efficiency during connection. Additionally, the length of the wiring can be kept constant, and the wiring locations can be limited, thereby enhancing security.

<Example 3>
As described above, a medalless gaming machine can be configured to transmit payout management information to a payout management device. The payout management device can then appropriately manage the payout performance of each medalless gaming machine based on the transmitted payout management information. Therefore, assuming that the payout performance can be appropriately managed in this way, the aforementioned limiter may be omitted. In other words, the machine may not have a function to forcibly terminate the advantageous period based on the fulfillment of certain regulatory conditions.

Furthermore, the medal count control board may be equipped with a function to appropriately manage payout performance, and assuming that payout performance can be appropriately managed in this way, the aforementioned limiter may be omitted. In other words, the system may not have a function to forcibly terminate the advantageous period based on the fulfillment of certain regulatory conditions.

For example, the medal count control board may be configured to include a payout monitoring RWM (which may be the aforementioned medal count control RWM or another RWM). The payout monitoring RWM monitors payouts by, for example, being initialized when settings are changed but not initialized when the advantageous period ends. If the monitored payout exceeds a certain threshold, control may be implemented to reduce payout performance by, for example, not forcibly ending the advantageous period itself, but reducing the probability of navigation occurrences, reducing the probability of AT state extension, or ending the AT state itself. This also allows for appropriate management of payout performance. In this case, such control results may be transmitted to the payout management device as payout management information. That is, both the medal count control board and the payout management device may be configured to manage the payout performance of each medalless gaming machine.

(Example of the main control board configuration for a pachislo machine)
Next, with reference to Figure 35, an example of the configuration of the main control board 71 of the pachislo machine 1 will be described. Figure 35 is a diagram showing an example of the configuration of the main control board 71. In the following, we will mainly describe an example of a reuse (repurposing) configuration of the main control board 71.

As described above, the specifications of the main control board 71 in pachislo machine 1 are subject to various constraints. One of these constraints is the requirement that the manufacturer's name and board management number be printed on the main control board 71. The manufacturer's name is the name of the gaming machine manufacturer that produces pachislo machine 1, and the management number is a number used to identify the model of the main control board 71.

<Configuration Example 1>
Configuration Example 1 shown in Figure 35 shows that the manufacturer's name and board management number are printed in text on the main control board 71, as in the conventional method. Here, in Configuration Example 1 shown in Figure 35, it is assumed that a pachislo machine 1 (hereinafter referred to as "Model A") equipped with the main control board 71 was first manufactured by BB Corporation. At this time, initially, only the manufacturer's name "BB Corporation" and board management number "BB-00-11-22" are printed on the lower section. Subsequently, when Model A is removed from the amusement parlor, for example, if AA Corporation tries to reuse the main control board 71 to manufacture a different pachislo machine 1 (hereinafter referred to as "Model B"), AA Corporation must laser-etch the manufacturer's name and board management number that were printed on the lower section and newly print its own manufacturing number and board management number (for example, the manufacturer's name "AA Corporation" and board management number "AA-00-11-22" on the upper section of Configuration Example 1 shown in Figure 35) in a different space.

Furthermore, if, after machine B is removed from the amusement parlor, and for example, BB Corporation attempts to reuse the main control board 71 to manufacture a different pachislo machine 1 (hereinafter referred to as "machine C"), BB Corporation would have to laser-engrave the manufacturer's name and board management number printed on the upper section and print its own manufacturing number and board management number in a different space. However, in the configuration example 1 shown in Figure 35, there is no more available space. Therefore, even though the hardware is still perfectly reusable, there is a problem in that the main control board 71 may not be reusable due to the aforementioned constraints.

This also applies if multiple manufacturer names and board management numbers were printed from the outset. For example, even if manufacturing numbers and board management numbers for both AA Corporation and BB Corporation were pre-printed, the manufacturing numbers and board management numbers for AA Corporation would be laser-etched off during the manufacturing of model A. Therefore, while reuse might be possible for BB Corporation, it would not be possible for AA Corporation. In contrast, configuration examples 2 and 3 below are expected to resolve the above-mentioned problem. Specifically, the reusability of boards used for game control, such as the main control board 71, can be improved.

<Configuration Example 2>
Example configuration 2 shown in Figure 35 illustrates the printing of a code that includes the manufacturer's name and board management number. In Example configuration 2 shown in Figure 35, a QR code (registered trademark), which is a two-dimensional code, is used as an example of a code that includes the manufacturer's name and board management number, but a JAN code (barcode) or other codes can be used. In other words, the code can be anything as long as it contains information that allows the verifier to uniquely identify the manufacturer's name and board management number by some means (e.g., a mobile terminal).

In the configuration example 2 shown in Figure 35, assuming that model A was manufactured by BB Corporation, the first code from the right is printed. This code contains information that identifies the manufacturing number and circuit board management number related to BB Corporation. Later, when model A is removed from the arcade and, for example, AA Corporation attempts to manufacture model B, the second code from the right is printed, and the first code from the right is removed by laser engraving. This second code contains information that identifies the manufacturing number and circuit board management number related to AA Corporation.

Subsequently, when machine B is removed from the amusement parlor, and for example BB Corporation attempts to manufacture machine C, the third code from the right is printed, and the second code from the right is laser-engraved and removed. The third code from the right contains information that identifies the manufacturing number and board management number related to BB Corporation. Later, when machine C is removed from the amusement parlor, and for example AA Corporation attempts to reuse the main control board 71 to manufacture a different pachislo machine 1, AA Corporation can reuse the main control board 71 in yet another pachislo machine 1 by laser-engraving the third code from the right and printing the fourth code from the right, ensuring that the fourth code contains information that identifies the manufacturing number and board management number related to AA Corporation.

In other words, in the configuration example 2 shown in Figure 35, by printing the manufacturer's name and board management number, the printing space for each manufacturer's name and board management number on the surface of the main control board 71 can be saved. Therefore, compared to the configuration example 1 shown in Figure 35, its reusability can be improved.

<Configuration Example 3>
Configuration Example 3 shown in Figure 35, similar to Configuration Example 2 described above, shows that codes including the manufacturer's name and board management number are printed. In Configuration Example 3 shown in Figure 35, multiple codes (for example, four) are printed from the beginning. For example, two codes each for AA Corporation and BB Corporation are printed. Furthermore, on the surface of the main control board 71 (or on the corresponding main control board case), the areas corresponding to each code can be fixed in a state where they cannot be read by crimping them with, for example, a strip-shaped member. Conversely, the fixing can be released and the codes can be made readable by, for example, cutting the strip-shaped member.

In the configuration example 3 shown in Figure 35, assuming that machine A was initially manufactured by BB Corporation, only the first code from the right is readable, while the second to fourth codes from the right are unreadable. The first code from the right contains information that identifies the manufacturing number and circuit board management number related to BB Corporation. Subsequently, when machine A is removed from the arcade and, for example, AA Corporation attempts to manufacture machine B, only the second code from the right is readable, while the first, third, and fourth codes from the right are unreadable. The second code from the right contains information that identifies the manufacturing number and circuit board management number related to AA Corporation.

Subsequently, when machine B is removed from the amusement parlor, and for example BB Corporation attempts to manufacture machine C, only the third code from the right is made readable, while the first, second, and fourth codes from the right are made unreadable. The third code from the right contains information that identifies the manufacturing number and board management number related to BB Corporation. Later, when machine C is removed from the amusement parlor, and for example AA Corporation attempts to reuse the main control board 71 to manufacture a different pachislo machine 1, AA Corporation can reuse the main control board 71 in yet another pachislo machine 1 by making only the fourth code from the right readable and making the first to third codes from the right unreadable.

Furthermore, in the configuration example 3 shown in Figure 35, since it is sufficient to make at least one code readable and the other codes unreadable, further reuse is possible, and it is also possible to reuse the machine by a wider range of gaming machine manufacturers. Note that in the configuration example 3 shown in Figure 35, it is also possible to provide only crimping holes and print the codes at the locations corresponding to the crimping holes each time the machine is reused.

[Second Embodiment]
The first embodiment has been described above. The second embodiment will now be described. The basic configuration of the pachislo machine 1 according to the second embodiment is the same as that of the pachislo machine 1 according to the first embodiment. In the following description, components that are the same as those of the pachislo machine 1 according to the first embodiment will be denoted by the same reference numerals. Furthermore, the description of parts that apply to the second embodiment as described in the first embodiment will be omitted.

Furthermore, even if the above description includes phrases that limit it to the pachislo machine 1 according to the first embodiment, such as "In the first embodiment,..." or "In the pachislo machine 1 of the first embodiment,...", it can still be applied to the pachislo machine 1 according to the second embodiment, to the extent that it does not deviate from the spirit of the second embodiment. Therefore, it is possible to partially substitute or combine each configuration shown in the first embodiment (including each configuration shown in the modified examples and each configuration shown in the extended examples) with the configuration shown in the second embodiment.

Furthermore, even if the shape differs from that of the pachislo machine 1 according to the first embodiment, components with similar functions may be assigned the same reference numerals for convenience. Also, even if the shape and processing are the same as the pachislo machine 1 according to the first embodiment, different reference numerals or step numbers may be assigned for convenience.

<Rock Performance>
Figure 36 is a diagram showing an example of a lock effect. Figure 37 is a diagram showing a specific form of the lock effect corresponding to lock effect number "1". Figure 38 is a diagram showing a specific form of the lock effect corresponding to lock effect number "2". Figure 39 is a diagram showing a specific form of the lock effect corresponding to lock effect number "3". Figure 40 is a diagram showing a specific form of the lock effect corresponding to lock effect number "4". Figure 41 is a diagram showing a specific form of the lock effect corresponding to lock effect number "5". Figure 42 is a diagram showing a specific form of the lock effect corresponding to lock effect number "6".

As described in the first embodiment, the lock effect is an effect that halts the game's progress for a predetermined period (invalidating the player's game operations for a predetermined period). In this embodiment, similar to the first embodiment, the system is configured to allow the execution of reel effects or simulated gameplay while the lock effect is running.

As described in the first embodiment, the reel animation is performed by rotating or stopping (temporarily stopping) each reel 3L, 3C, and 3R without the player's input during a period when the player's game input is disabled. Furthermore, the simulated game is performed by simulating the player's input during a period when the player's game input is disabled, thereby rotating or stopping (temporarily stopping) each reel 3L, 3C, and 3R.

In lock animations (reel animations or simulated gameplay), while combinations of symbols may be displayed, no benefits are granted to the player based on the display of such symbol combinations. For example, even if the symbol combination displayed during a reel animation or simulated gameplay matches a symbol combination specified in the symbol combination table (see Figures 11-14), no medals corresponding to that symbol combination will be paid out.

Furthermore, in this embodiment, for example, when a specific combination of symbols (e.g., a set of "red 7" symbols) stops and is displayed during a reel animation or simulated gameplay, the system may transition to the AT (Automatic Trigger) state. However, this merely indicates (suggests) that the transition to the AT state has been decided via a specific combination of symbols (e.g., a set of "red 7" symbols) in a state where the transition to the AT state has already been decided. It does not mean that the decision to transition to the AT state is made solely in response to the display of a specific combination of symbols (e.g., a set of "red 7" symbols).

In this embodiment, the lock effects shown in Figure 36 (lock effects corresponding to lock effect numbers "1" to "6") are provided. Each lock effect corresponding to lock effect numbers "1" to "6" consists of one lock effect from the following (i) to (iv), or a combination of two of these lock effects.

(i) The "Red 7" symbol aligns during the reel animation. (ii) The "Red 7" symbol does not align during the reel animation. (iii) The "Red 7" symbol aligns during the simulated game. (iv) The "Red 7" symbol does not align during the simulated game.

For the lock animation corresponding to lock animation number "1", the animation described in (i) above will be performed. For the lock animation corresponding to lock animation number "2", the animation described in (ii) above will be performed. For the lock animation corresponding to lock animation number "3", the animation described in (iii) above will be performed. For the lock animation corresponding to lock animation number "4", the animation described in (iv) above will be performed. For the lock animation corresponding to lock animation number "5", the animation described in (iv) above will be performed, followed by the animation described in (i) above. For the lock animation corresponding to lock animation number "6", the animation described in (ii) above will be performed, followed by the animation described in (iii) above.

In this embodiment, the same symbol arrangement table as in the first embodiment (see Figure 9) is used, and "Red 7" is positioned at symbol position "0". Figures 37 to 42 also show the numbers indicating the symbol positions corresponding to the symbols that are displayed when stopped.

Specifically, as shown in Figure 37, in the lock animation corresponding to lock animation number "1," after the rotation of reels 3L, 3C, and 3R begins (see Figure 37(a)), the rotation of the right reel 3R stops automatically without any stop operation by the player, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 37(b)). Subsequently, the rotation of the middle reel 3C stops automatically without any stop operation by the player, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 37(c)). Then, the rotation of the left reel 3L stops automatically without any stop operation by the player, and a "red 7" is displayed in the middle area of the left reel 3L (see Figure 37(d)).

As shown in Figure 38, in the lock animation corresponding to lock animation number "2," after the rotation of reels 3L, 3C, and 3R begins (see Figure 38(a)), the rotation of the right reel 3R stops automatically without any stopping operation by the player, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 38(b)). Subsequently, the rotation of the middle reel 3C stops automatically without any stopping operation by the player, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 38(c)). Then, the rotation of the left reel 3L stops automatically without any stopping operation by the player, and a symbol other than the "red 7" (in this example, a "white blank 1") is displayed in the middle area of the left reel 3L (see Figure 38(d)).

As shown in Figure 39, in the lock animation corresponding to lock animation number "3", after the rotation of each reel 3L, 3C, and 3R begins (see Figure 39(a)), the rotation of the right reel 3R stops in response to a stop operation on the right reel 3R, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 39(b)). In this state, the right reel 3R is oscillating at a predetermined timing. Subsequently, the rotation of the middle reel 3C stops in response to a stop operation on the middle reel 3C, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 39(c)). In this state, the middle reel 3C is oscillating at a predetermined timing, and the oscillation of the right reel 3R continues. Then, the rotation of the left reel 3L stops in response to a stop operation on the left reel 3L, and a "red 7" is displayed in the middle area of the left reel 3L (see Figure 39(d)). In this state, the left reel 3L is oscillating at a predetermined timing, and the right reel 3R and the middle reel 3C are also continuing to oscillate.

As shown in Figure 40, in the lock animation corresponding to lock animation number "4", after the rotation of each reel 3L, 3C, and 3R begins (see Figure 40(a)), the rotation of the right reel 3R stops in response to a stop operation on the right reel 3R, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 40(b)). In this state, the right reel 3R is oscillating at a predetermined timing. Subsequently, the rotation of the middle reel 3C stops in response to a stop operation on the middle reel 3C, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 40(c)). In this state, the middle reel 3C is oscillating at a predetermined timing, and the oscillating of the right reel 3R continues. Then, the rotation of the left reel 3L stops in response to a stop operation on the left reel 3L, and a symbol other than the "red 7" (in this example, "white blank 1") is displayed in the middle area of the left reel 3L (see Figure 40(d)). In this state, the left reel 3L is oscillating at a predetermined timing, and the right reel 3R and middle reel 3C are also continuing to oscillate.

As shown in Figure 41, in the lock animation corresponding to lock animation number "5", after the rotation of each reel 3L, 3C, and 3R begins (see Figure 41(a)), the rotation of the right reel 3R stops in response to a stop operation on the right reel 3R, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 41(b)). In this state, the right reel 3R is oscillating at a predetermined timing. Subsequently, the rotation of the middle reel 3C stops in response to a stop operation on the middle reel 3C, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 41(c)). In this state, the middle reel 3C is oscillating at a predetermined timing, and the oscillating of the right reel 3R continues. Then, the rotation of the left reel 3L stops in response to a stop operation on the left reel 3L, and a symbol other than the "red 7" (in this example, "white blank 1") is displayed in the middle area of the left reel 3L (see Figure 41(d)). In this state, the left reel 3L is oscillating at a predetermined timing, and the right reel 3R and middle reel 3C are also continuing to oscillate. Subsequently, the left reel 3L rotates again (see Figure 41(e)), and without any stopping operation by the player, the rotation of the left reel 3L stops (automatically), and a "red 7" is displayed in the middle area of the left reel 3L (see Figure 41(f)). In this state, the left reel 3L is oscillating at a predetermined timing, and the right reel 3R and middle reel 3C are also continuing to oscillate.

As shown in Figure 42, in the lock animation corresponding to lock animation number "6", after the rotation of each reel 3L, 3C, and 3R begins (see Figure 42(a)), the rotation of the right reel 3R stops automatically without any stopping operation by the player, and a "red 7" is displayed in the middle area of the right reel 3R (see Figure 42(b)). Subsequently, the rotation of the middle reel 3C stops automatically without any stopping operation by the player, and a "red 7" is displayed in the middle area of the middle reel 3C (see Figure 42(c)). Then, the rotation of the left reel 3L stops automatically without any stopping operation by the player, and a symbol other than the "red 7" (in this example, a "white blank 1") is displayed in the middle area of the left reel 3L (see Figure 42(d)). Subsequently, the left reel 3L rotates again (see Figure 42(e)), and in response to the stop operation on the left reel 3L, its rotation stops, and a "red 7" is displayed in the middle section of the left reel 3L (see Figure 42(f)). In this state, the left reel 3L is oscillating at a predetermined timing, while the right reel 3R and the middle reel 3C are not oscillating. Alternatively, after the "red 7" is displayed in the middle section of the left reel 3L, the right reel 3R and the middle reel 3C may also be made to oscillate at a predetermined timing, similar to the left reel 3L.

<Lock effect determination process>
Figure 43 is a flowchart showing the lock effect determination process performed in the main control circuit.

The lock animation determination process shown in Figure 43 is performed in the main control circuit 100 after the process in step S6 (game start state control process) of Figure 23 (main process) has been executed.

In the lock animation determination process, the main CPU 101 first determines whether the current game section is an advantageous section (step S1001). As explained in the first embodiment, an advantageous section is a game period that can be controlled to a game state (AT state) in which information on advantageous stopping operations for the player is notified. The advantageous section includes an animation section (advantageous section - normal gameplay) and an increase section (advantageous section - pseudo-bonus) (see Figure 5). The animation section is a game state (non-AT state) in which information on advantageous stopping operations for the player is not notified. While it is similar to a non-advantageous section in that it is an unfavorable game state for the player, it differs in that a mode transition occurs. The increase section is an AT state (a game state advantageous to the player).

If the main CPU 101 determines that the current game section is not a favorable section, it terminates this subroutine. On the other hand, if the main CPU 101 determines that the current game section is a favorable section, it determines whether or not a pseudo-bonus is in progress (step S1002). As described in the first embodiment, a pseudo-bonus is a game state (AT state) in which information on advantageous stopping operations is reported to the player. The main CPU 101 can determine whether or not a pseudo-bonus is in progress by referring to the mode flag storage area of the main RAM 103 (see Figure 20).

If the system determines that a pseudo-bonus is in progress, the main CPU 101 determines whether the transition to the pseudo-bonus occurred during the current game (step S1003). As described in the first embodiment, once the internal winning combination is determined by the internal lottery process (see step S5 in Figure 23), a secondary information (sub-flag) corresponding to that internal winning combination, the advantageous section winning sub-flag (see Figure 7(a)), is determined. Then, during the performance section (advantageous section/normal gameplay), the pseudo-bonus transition lottery table (see Figure 7(c)) is referenced, and a lottery (pseudo-bonus transition lottery) is performed based on the random value and the advantageous section winning sub-flag. As a result of the pseudo-bonus transition lottery, "win" or "loss" is determined. "Win" includes "Win (current game)" and "Win (next game)".

If a "Winning Ticket (Current Game)" is determined, for example, in step S106 of the game start processing during the advantageous section (see Figure 28) for the current game (the game in which the pseudo-bonus transition lottery was held), the bit corresponding to "Pseudo-Bonus" in the mode flag storage area (see Figure 20) is set to "1". As a result, if a "Winning Ticket (Current Game)" is determined, the game transitions to a pseudo-bonus from the current game. Similarly, if a "Winning Ticket (Next Game)" is determined, for example, in step S106 of the game start processing during the advantageous section (see Figure 28) for the next game (the game following the game in which the pseudo-bonus transition lottery was held), the bit corresponding to "Pseudo-Bonus" in the mode flag storage area (see Figure 20) is set to "1". As a result, if a "Winning Ticket (Next Game)" is determined, the game transitions to a pseudo-bonus from the next game.

If the system determines that the transition to the pseudo-bonus was not during the current game, the main CPU 101 determines whether or not the 1G consecutive win lottery was won (step S1004). As explained in the first embodiment, in the pseudo-bonus, the 1G consecutive win lottery table (see Figure 7(d)) is referenced, and a lottery (1G consecutive win lottery) is performed based on random values and sub-flags for when the advantageous section is won, determining whether the result of the 1G consecutive win lottery is "win" or "loss". A "win" option is provided, namely "win (1G consecutive win + 1)".

If a "Winning Ticket (1G Consecutive Wins + 1)" is determined, for example, in step S103 of the processing at the start of gameplay during the advantageous section (see Figure 28), one right to generate a 1G consecutive win (1G consecutive win stock) is granted (the 1G consecutive win stock counter is increased by 1). When the pseudo-bonus ends, if the value of the 1G consecutive win stock counter is 1 or greater (i.e., if a 1G consecutive win stock is held), one 1G consecutive win stock is consumed (the 1G consecutive win stock counter is decreased by 1), and the pseudo-bonus will start again from the next game after the pseudo-bonus ends.

If the system determines in step S1003 that the game has transitioned to a pseudo-bonus, or if it determines in step S1004 that the 1G consecutive win lottery has been won, the main CPU 101 randomly selects either lock effect number "1" or "6" (see Figure 36) (step S1005). The main CPU 101 then sets the lock effect start flag to ON (step S1006) and terminates this subroutine. This triggers the lock effect corresponding to lock effect number "1" or "6". The lock effect corresponding to lock effect number "1" or "6" is equivalent to the "Red 7s Aligned" effect described in the first embodiment. Note that if the 1G consecutive win lottery is won, a different lock effect (for example, the special bonus effect described in the first embodiment) may be performed than the lock effect performed when transitioning to a pseudo-bonus ("Red 7s Aligned" effect).

If it is determined in step S1002 that a pseudo-bonus is not in progress, the main CPU 101 determines whether the conditions for the special lock effect have been met (step S1007). As explained in the first embodiment, the special lock effect is an effect that can be executed with a predetermined probability when a "confirmed role" (see Figure 7(a)) is determined as a sub-flag when a win occurs in the advantageous section, and when it is determined by the mode transition lottery (see Figure 8(f)) that the game will transition to Heaven C mode (see Figure 6). In other words, the conditions for the special lock effect to occur are that a "confirmed role" is determined as a sub-flag when a win occurs in the advantageous section, it is determined by the mode transition lottery that the game will transition to Heaven C mode, and the special lock effect occurrence lottery, which can be won with a predetermined probability, is won.

Furthermore, if a "confirmed role" is determined as a sub-flag when a winning combination is drawn in the advantageous section, the result of the pseudo-bonus transition lottery will always be "winning (next game)" (see Figure 7(c)), and the transition to the pseudo-bonus is confirmed. Also, Heaven C mode is a mode in which it is expected that pseudo-bonuses will occur in succession. When a pseudo-bonus starts, the ceiling reduction lottery table (see Figure 8(e)) is referenced, and a lottery based on random values (ceiling reduction lottery) is performed, determining whether it is a "winning" or "losing" result in the ceiling reduction lottery. If a "winning" result is determined, "0 games" will be set as the ceiling game count when the pseudo-bonus ends. As a result, the pseudo-bonus will start again from the next game after the pseudo-bonus ends. Heaven C mode is a mode in which it is possible to win the ceiling reduction lottery (Heaven mode), and it is also a mode in which Heaven mode is easily maintained (a mode that is advantageous to the player).

If it is determined in step S1004 that the 1G consecutive draw has not been won, or if it is determined in step S1007 that the conditions for the special lock effect have not been met, the main CPU 101 executes the lock effect draw (step S1008). In this process, the main CPU 101 determines "win" or "loss" by performing a draw based on random values. Subsequently, the main CPU 101 determines whether or not the lock effect draw has been won (step S1009). If it is determined that the lock effect draw has not been won, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that it has won the lock animation lottery, it selects either lock animation number "2" or "4" (see Figure 36) by lottery (step S1010). Then, the main CPU 101 sets the lock animation start flag to ON (step S1011) and terminates this subroutine. This results in the execution of the lock animation corresponding to lock animation number "2" or "4" (a so-called false animation).

If the conditions for triggering a special lock animation are met in step S1007, the main CPU 101 randomly selects either lock animation number "3" or "5" (see Figure 36) (step S1012). Then, the main CPU 101 sets the lock animation start flag to ON (step S1013) and terminates this subroutine. This triggers the lock animation corresponding to either lock animation number "3" or "5".

The lock animation corresponding to lock animation number "3" or "5" is equivalent to the special lock animation described in the first embodiment. Similar to the first embodiment, the special lock animation can be configured not to be executed if the progress of the game during the advantageous period (game history) meets predetermined conditions. Such game history can include the value of the advantageous period game counter, the control game counter, the advantageous period payout counter, the control payout counter, etc. (values referenced in limit processing). An upper limit (limiter) is set for the duration of the advantageous period, and limit processing is the process of ending the advantageous period when this limiter is reached (see Figure 16).

In the lock animation determination process shown in Figure 43, it was explained that when a pseudo-bonus transition lottery or 1G consecutive lottery is won, a lock animation corresponding to lock animation number "1" or "6" is performed (lock animations corresponding to lock animation numbers "3" and "5" are not performed). However, in this embodiment, when a pseudo-bonus transition lottery or 1G consecutive lottery is won, a lock animation corresponding to lock animation number "3" or "5" (special lock animation) may be performed. As explained in the first embodiment, when the quasi-limit processing (number of games) or quasi-limit processing (number of payouts) is activated, the 1G consecutive lottery is not executed (see Figure 16). Also, when the quasi-limit processing (number of games) or quasi-limit processing (number of payouts) is activated, the pseudo-bonus transition lottery may not be executed. When the pseudo-bonus transition lottery and the 1G consecutive win lottery are no longer executed, the judgment results in steps S1003, S1004, and S1007 of Figure 43 all become "NO," and the lock effect is no longer executed. In this embodiment, for example, it is possible to configure the system so that the lock effect (pseudo-game as a special lock effect) is not executed when a variable during the advantageous section (such as the value of the advantageous section game counter, the value of the control game counter, the value of the advantageous section payout counter, or the value of the control payout counter, or a value calculated based on these values and the value of the 1G consecutive win stock counter) exceeds a predetermined value.

<Lock effect execution process>
Figure 44 is a flowchart showing the lock animation execution process performed in the main control circuit. Figure 45 is a diagram showing an example of an image displayed on the main display device during simulated gameplay.

The lock animation execution process shown in Figure 44 is performed in the main control circuit 100 at step S8 (main animation control process at game start) of Figure 23 (main processing).

In the lock animation execution process, the main CPU 101 first determines whether the lock animation start flag (see steps S1006, S1011, and S1013 in Figure 43) is set to ON (step S1021). If it determines that the lock animation start flag is not set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the lock effect start flag is set to ON, the main CPU 101 executes the lock command generation and storage process (step S1022). In this process, the main CPU 101 generates lock command data and stores the generated lock command data in the communication data storage area of the main RAM 103. The lock command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 in the communication data transmission process (see step S204 in Figure 32). As a result, the sub-control circuit 200 can recognize that the reel lock has started and can determine the timing for executing various effects.

Specifically, upon receiving lock command data, the sub-control circuit 200 sets performance data corresponding to various lock effects. For example, if a lock effect corresponding to one of lock effect numbers "3" to "5" is selected during the lock effect determination process (see Figure 43), the "Aim for 7" effect image 1100 shown in Figure 45 is displayed on the main display device 210. The "Aim for 7" effect image 1100 suggests that the player should stop the reels in the order of "right reel 3R → middle reel 3C → left reel 3L," and at the timing when the "red 7" symbol can be displayed on each reel 3L, 3C, and 3R. By displaying the "Aim for 7" effect image 1100, it is possible to have the player operate the stop buttons 8L, 8C, and 8R in the suggested order, thereby allowing the player to participate in a simulated game.

Next, the main CPU 101 sets the lock effect start flag to OFF (step S1023). Subsequently, the main CPU 101 executes acceleration processing for the lock effect (step S1024). In this process, the main CPU 101 requests the start of rotation of reels 3L, 3C, and 3R. When the start of rotation of reels 3L, 3C, and 3R is requested, the drive of the stepping motor is controlled by the reel control processing (see step S203 in Figure 32), and the rotation of each reel 3L, 3C, and 3R begins. Then, each reel 3L, 3C, and 3R is accelerated until its rotation reaches a constant speed, and thereafter, it is controlled to maintain that constant speed. Note that the rotation mode of each reel 3L, 3C, and 3R until it reaches the constant speed is not limited to normal rotation (forward rotation), but may include reel actions such as slow rotation, high-speed rotation, reverse rotation, and combinations thereof. Furthermore, each reel (3L, 3C, 3R) may not maintain a constant rotation speed, but instead immediately decelerate after reaching a predetermined speed.

In the reel control process (see step S203 in Figure 32), the main CPU 101 controls each stepping motor 51L, 51C, 51R so that each reel 3L, 3C, 3R rotates and stops in the manner shown in Figures 37 to 42 by switching the excitation pattern of the excitation phase over time. When accelerating the rotation of reels 3L, 3C, 3R, the main CPU 101 outputs a pulse signal so that the excitation phase is excited based on the acceleration excitation pattern. When rotating reels 3L, 3C, 3R at a constant speed, the main CPU 101 outputs a pulse signal so that the excitation phase is excited based on the constant speed excitation pattern. When decelerating the rotation of reels 3L, 3C, 3R, the main CPU 101 outputs a pulse signal so that the excitation phase is excited based on the deceleration excitation pattern. When reels 3L, 3C, and 3R are kept in a stopped state, the main CPU 101 outputs pulse signals to energize the excitation phases based on the excitation pattern for stopping. When reels 3L, 3C, and 3R are oscillating, the main CPU 101 outputs pulse signals to energize the excitation phases based on the excitation pattern for oscillating. Each excitation pattern is held for a predetermined time. This time is managed by a timer update process (see step S206 in Figure 32). The excitation method is not particularly limited, and two-phase excitation or one-to-two-phase excitation can be used as appropriate. Furthermore, the stepping motors 51L, 51C, and 51R may be PM-type or HB-type stepping motors. The drive method may be bipolar or unipolar.

After executing the process in step S1024, the main CPU 101 determines whether the "simulated game in progress" flag is set to ON (step S1025). The "simulated game in progress" flag indicates that a simulated game is being played. Although not shown in the diagram, if a lock animation corresponding to any of lock animation numbers "3" to "5" is selected, the main CPU 101 also sets the "simulated game in progress" flag to ON during the process in step S1024. Furthermore, if a lock animation corresponding to lock animation number "6" is selected, the main CPU 101 sets the "simulated game in progress" flag to ON when it starts the control to maintain the left reel 3L in a stopped state during the reel animation (see Figure 42(d)) (after a predetermined time has elapsed since the rotation of each reel 3L, 3C, and 3R began).

If the main CPU 101 determines that the "simulated game" flag is set to "on," it executes the simulated game processing (step S1026). The simulated game processing will be explained later using Figure 46.

If the system determines in step S1025 that the simulated game flag is not set to ON, or after executing the process in step S1026, the main CPU 101 determines whether the lock effect completion flag is set to ON (step S1027). The lock effect completion flag is a flag that indicates that the lock effect has ended. Although not shown in the figures, if a lock effect corresponding to lock effect number "1" or "2" is selected, the main CPU 101 sets the lock effect completion flag to ON when it starts control to maintain the left reel 3L in a stopped state (see Figures 37(d) and 38(d)) (when a predetermined time has elapsed since the rotation of each reel 3L, 3C, and 3R began). Furthermore, if a lock animation corresponding to lock animation number "3" or "4" is selected, the main CPU 101 sets the lock animation termination flag to ON when it starts the control to swing the left reel 3L (see Figures 39(d) and 40(d)) (when all stop operations for each reel 3L, 3C, and 3R in the simulated game are completed) (see step S1073 in Figure 47). Also, if a lock animation corresponding to lock animation number "5" is selected, the main CPU 101 sets the lock animation termination flag to ON when it starts the control to swing the left reel 3L that has stopped after re-rotation (see Figure 41(f)) (when a predetermined time has elapsed since the re-rotation of the left reel 3L began) (see step S1084 in Figure 48). Furthermore, if the lock effect corresponding to lock effect number "6" is selected, the main CPU 101 sets the lock effect completion flag to ON when it starts the control to swing the left reel 3L that has stopped after the re-spin (see Figure 42(f)) (when the stopping operation for the left reel 3L in the simulated game after the re-spin is completed) (see step S1112 in Figure 49).

If the main CPU 101 determines that the lock animation end flag is not set to ON, it returns to step S1025. On the other hand, if the main CPU 101 determines that the lock animation end flag is set to ON, it sets the random delay flag to ON (step S1028) and terminates this subroutine. The random delay flag is used to perform random delay processing. As explained in the first embodiment, random delay processing is a process that, after the lock animation, randomly generates a delay period for each reel 3L, 3C, and 3R before starting rotation. This is done to prevent the player from easily performing "eye-timing" as a result of the lock animation. Details of the random delay processing will be explained later using Figure 51.

<Processing during simulated gameplay>
Figure 46 is a flowchart showing the processing performed in the main control circuit during simulated gameplay.

The simulated gameplay processing shown in Figure 46 is the process performed in step S1026 of Figure 44 (lock effect execution processing) in the main control circuit 100.

During the simulated gameplay processing, the main CPU 101 first determines whether the lock animation number selected in the lock animation determination process (see Figure 43) is lock animation number "6" (step S1041).

If the selected lock animation number is determined not to be lock animation number "6", the main CPU 101 executes the normal simulated game processing (step S1042). The normal simulated game processing will be explained later using Figure 47. After executing the process in step S1042, the main CPU 101 terminates this subroutine.

On the other hand, if the selected lock animation number is determined to be lock animation number "6", the main CPU 101 executes post-reel animation simulated game processing (step S1043). Post-reel animation simulated game processing will be explained later using Figure 49. After executing the process in step S1043, the main CPU 101 terminates this subroutine.

<Processing during normal simulated gameplay>
Figure 47 is a flowchart showing the normal processing performed in the main control circuit during simulated gameplay.

The normal simulated game processing shown in Figure 47 is the process performed in step S1042 of Figure 46 (simulated game processing) in the main control circuit 100.

During normal simulated gameplay processing, the main CPU 101 first executes steps S1061 to S1068. These steps are essentially the same as steps S111 to S120 in Figure 29 (reel stop control processing).

Here, in the normal simulated game processing shown in Figure 47, the processing corresponding to steps S116 and S117 in Figure 29 is not performed. That is, the number of sliding pieces (see step S117) is not determined, and in the processing of step S1066, the main CPU 101 determines and stores a predetermined position as the planned stopping position, which is the position where the symbols will ultimately stop, regardless of the stopping start position (see step S116). As a result, each reel 3L, 3C, and 3R stops in the manner shown in Figures 39(b) to (d), Figures 40(b) to (d), and Figures 41(b) to (d). In simulated gameplay, the symbols may be stopped and displayed in this manner, regardless of the stopping start position and the number of sliding pieces, or control may be performed to stop each reel 3L, 3C, and 3R based on the stopping start position and the number of sliding pieces, similar to the reel stopping control processing (in the main game) shown in Figure 29. In this case, for example, even if a lock animation corresponding to lock animation number "3" or "5" is selected, if the timing of the stopping operation is not appropriate, the "Red 7" symbols will not line up. Furthermore, when stopping reels 3L, 3C, and 3R based on the stopping start position and the number of sliding frames, the maximum number of sliding frames in the simulated game may be the same as, greater than, or less than the maximum number of sliding frames in the main game.

Furthermore, in step S111 of Figure 29, 80 revolutions/minute was given as an example of the constant rotation speed when each reel 3L, 3C, and 3R is rotating at a constant speed. The constant rotation speed in the simulated game may be the same as the constant rotation speed in the main game (for example, 80 revolutions/minute), or it may be faster than the constant rotation speed in the main game (for example, 90 to 180 revolutions/minute, or 120 to 160 revolutions/minute), or it may be slower than the constant rotation speed in the main game (for example, 10 to 60 revolutions/minute, or 30 to 45 revolutions/minute). Furthermore, in the normal simulated game processing shown in Figure 47, even in the simulated game, just like in the main game, the stop buttons 8L, 8C, and 8R are activated only after the rotation speed of each reel 3L, 3C, and 3R reaches the constant rotation speed (see step S1062). However, in the simulated game, the stop buttons 8L, 8C, and 8R may be activated before the rotation speed of each reel 3L, 3C, and 3R reaches the constant rotation speed.

After executing the process in step S1068, the main CPU 101 determines whether the controlled reel (see step S1065) has stopped (step S1069). In this process, the main CPU 101 determines whether the control to decelerate the rotation of the controlled reel has finished. The main CPU 101 can recognize that the control to decelerate the rotation of the controlled reel has finished (the controlled reel has stopped) when the holding time for the deceleration excitation pattern has expired (the time required to stop the rotation of the controlled reel has elapsed).

If the main CPU 101 determines that the controlled reel is not stopped, it executes the process in step S1069 again. On the other hand, if the main CPU 101 determines that the controlled reel has stopped, it executes control to oscillate the controlled reel (step S1070). In this process, the main CPU 101 sets data corresponding to the excitation pattern for oscillating the controlled reel. This drives the stepping motor 51 corresponding to the controlled reel, causing the controlled reel to oscillate in a predetermined manner. The excitation pattern for oscillating is not particularly limited, but a configuration can be adopted in which two-phase excitation is performed by repeating excitation pattern I and excitation pattern II as described below.

Although not shown in the diagram, each stepping motor 51L, 51C, and 51R has four excitation phases (A phase, B phase, C phase, and D phase) arranged sequentially in a clockwise direction, and eight excitation patterns (A phase - B phase, B phase, B phase - C phase, C phase, C phase - D phase, D phase - A phase, and A phase) are provided as 1-2 phase excitation patterns. For example, it is possible to adopt a configuration in which an excitation pattern with an offset value of 2 from a reference excitation pattern (e.g., B phase - C phase) is held for a time _T1 (e.g., 3 interrupt time) as excitation pattern I, and an excitation pattern with an offset value of 0 from a reference excitation pattern (e.g., A phase - B phase) is held for a time _T2 (e.g., 300 interrupt time) as excitation pattern II. It is desirable that _T2 be less than 500 ms, and that the total time of _T1 and _T2 be less than 500 ms. For example, _T1 can be set to a time of about 1 to 20 ms (or 2 to 10 ms), and _T2 can be set to a time of about 100 to 490 ms (or 200 to 450 ms). Furthermore, the current used by the stepping motor 51 when excitation control based on the oscillation excitation pattern is performed is configured to be greater than the current used by the stepping motor 51 when excitation control based on the stopping excitation pattern is performed, and may be about the same as the current used by the stepping motor 51 when excitation control based on the constant speed excitation pattern is performed. For example, the current used by the stepping motor 51 when excitation control based on the oscillation excitation pattern is performed may be about 60% (for example, about 40 to 80%, or 50 to 70%) of the current used by the stepping motor 51 when excitation control based on the acceleration excitation pattern or the deceleration excitation pattern is performed.

As described above, by driving and controlling the stepping motor 51, the reel 3 can be made to oscillate up and down (see Figures 39(b) to (d), 40(b) to (d), and 41(b) to (d)). The manner in which the reel 3 oscillates is not particularly limited, as long as the reel 3 moves to a degree that is recognizable to the player. However, since "oscillation" is a minute vibration and can also be called a "temporary stop," it is desirable that the amplitude of the vibration does not exceed the width of one symbol (or 1/2 symbol, 1/4 symbol, 1/8 symbol, or 1/16 symbol). Note that "oscillation" is a concept that includes not only cases where the reel 3 operates at a constant period, but also cases where the reel 3 operates aperiodically. Furthermore, periods in which the reel 3 is almost completely stopped are also included in "oscillation," but it is desirable that such periods be less than 500 ms (for example, 100 to 490 ms, or 200 to 450 ms). In other words, if reel 3 performs any action within a timeframe of less than 500 ms, it can be referred to as "oscillation."

After executing the process in step S1070, the main CPU 101 determines whether or not valid stop buttons 8L, 8C, and 8R exist (step S1071). This process is the same as the process in step S121 in Figure 29 (reel stop control process). The main CPU 101 can recognize the operation status of stop buttons 8L, 8C, and 8R by referring to the operating stop button storage area (see Figure 21).

If the main CPU 101 determines that valid stop buttons 8L, 8C, and 8R exist, it proceeds to step S1063. On the other hand, if the main CPU 101 determines that no valid stop buttons 8L, 8C, or 8R exist, it determines whether the lock effect number selected in the lock effect determination process (see Figure 43) is lock effect number "5" (step S1072).

If the main CPU 101 determines that the selected lock animation number is not "5", it sets the lock animation termination flag to ON (step S1073) and terminates this subroutine. On the other hand, if the main CPU 101 determines that the selected lock animation number is "5", it executes the post-simulated game reel animation process (step S1074). The post-simulated game reel animation process will be explained later using Figure 48. After executing the process in step S1074, the main CPU 101 terminates this subroutine.

<Reel animation processing after simulated gameplay>
Figure 48 is a flowchart showing the post-simulated game reel animation processing performed in the main control circuit.

The post-simulated game reel animation process shown in Figure 48 is performed in step S1074 of Figure 47 (processing during normal simulated game) in the main control circuit 100.

In the post-simulated game reel animation processing, the main CPU 101 first executes a re-acceleration process (step S1081). This process is the same as the process in step S1024 of Figure 44 (lock animation execution process). In step S1024, the main CPU 101 requests the start of rotation of reels 3L, 3C, and 3R, but in step S1081, the main CPU 101 requests the start of rotation of only the left reel 3L. All other points are as explained in step S1024. The execution of step S1081 controls the drive of the stepping motor 51L, and the rotation of the left reel 3L begins (see Figure 41(e)).

Next, the main CPU 101 determines whether or not the left reel 3L has stopped (step S1082). This process is the same as the process in step S1069 in Figure 47 (processing during normal simulated gameplay). The main CPU 101 can recognize that the left reel 3L has stopped when a predetermined time has elapsed since the re-rotation of the left reel 3L began.

If the main CPU 101 determines that the left reel 3L is not stopped, it executes the process in step S1082 again. On the other hand, if the main CPU 101 determines that the left reel 3L has stopped, it executes a control to swing the left reel 3L (step S1083). This process is the same as the process in step S1070 in Figure 47 (processing during normal simulated gameplay). This controls the drive of the stepping motor 51L, allowing the left reel 3L to swing up and down (see Figure 41(f)).

Subsequently, the main CPU 101 sets the lock animation completion flag to ON (step S1084) and terminates this subroutine.

<Processing during simulated gameplay after reel animation>
Figure 49 is a flowchart showing the processing performed in the main control circuit after the reel animation during simulated gameplay.

The post-reel animation pseudo-game processing shown in Figure 49 is performed in step S1043 of Figure 46 (pseudonym game processing) in the main control circuit 100. As described above, when the lock animation corresponding to lock animation number "6" is selected, the pseudo-game flag is set to ON after a predetermined time has elapsed since the rotation of each reel 3L, 3C, and 3R began (see step S1024 in Figure 44). This results in the judgment result of step S1025 in Figure 44 being "YES," and the post-reel animation pseudo-game processing shown in Figure 49 begins.

In the post-reel animation pseudo-game processing, first, the main CPU 101 executes the post-reel animation pseudo-game start command generation and storage process (step S1101). In this process, the main CPU 101 generates post-reel animation pseudo-game start command data and stores the generated post-reel animation pseudo-game start command data in the communication data storage area of the main RAM 103. The post-reel animation pseudo-game start command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 in the communication data transmission process (see step S204 in Figure 32). As a result, the sub-control circuit 200 can recognize that the reel animation described in (ii) above has ended and the pseudo-game described in (iii) above has started (see Figure 36), and can determine the timing for executing various animations. Specifically, upon receiving the post-reel animation pseudo-game start command data, the sub-control circuit 200 sets animation data corresponding to the end of the reel animation and the start of the pseudo-game. This allows, for example, a text image ("Hit the lever" image) with the message "Hit the lever" (not shown in the diagram) to be displayed on the main display device 210, prompting the player to operate the start lever 7.

Next, the main CPU 101 determines whether or not the start lever 7 has been operated (step S1102). In this process, the main CPU 101 determines whether or not the start switch 7S is in the ON state (see step S50 in Figure 25). If it is determined that the start lever 7 has not been operated, the main CPU 101 executes the process in step S1102 again. On the other hand, if it is determined that the start lever 7 has been operated, the main CPU 101 executes the re-acceleration process (step S1103). This process is the same as the process in step S1081 in Figure 48 (reel animation process after simulated gameplay). As a result, the drive of the stepping motor 51L is controlled and the rotation of the left reel 3L begins (see Figure 42(e)). Thus, in the simulated gameplay process after the reel animation shown in Figure 49, it is explained that the re-rotation of the left reel 3L occurs on the condition that the start lever 7 is operated after the reel animation ends. However, the re-rotation of the left reel 3L may be performed automatically after the reel animation ends (when a predetermined time has elapsed since all reels 3L, 3C, and 3R have stopped rotating during the reel animation).

Next, the main CPU 101 determines whether the rotation speed of the left reel 3L has reached the constant rotation speed (step S1104). As described above, the constant rotation speed in the simulated game may differ from the constant rotation speed in the main game (80 rotations/minute) (see step S1061 in Figure 47). If the main CPU 101 determines that the rotation speed of the left reel 3L has not reached the constant rotation speed, it executes the process in step S1104 again. On the other hand, if the main CPU 101 determines that the rotation speed of the left reel 3L has reached the constant rotation speed, it permits the left reel 3L to stop (step S1105). In this process, the main CPU 101 stores "1" in bit 4 of the operation stop button storage area (see Figure 21). This activates the left stop button 8L. As mentioned above, the left stop button 8L may be activated before the rotation speed of the left reel 3L reaches the constant rotation speed (see step S1062 in Figure 47).

Next, the main CPU 101 executes steps S1106 to S1111, which are basically the same as steps S1063 to S1070 in Figure 47. In the normal simulated gameplay process shown in Figure 47, reels 3L, 3C, and 3R corresponding to the operated stop buttons 8L, 8C, and 8R are determined as the controlled reels. However, in the simulated gameplay process after the reel animation shown in Figure 49, the left reel 3L is the controlled reel. The execution of step S1111 controls the drive of the stepping motor 51L, allowing the left reel 3L to swing up and down (see Figure 42(f)). Afterward, the main CPU 101 sets the lock animation completion flag to ON (step S1112) and terminates this subroutine.

<Reel rotation start process>
Figure 50 is a flowchart showing the reel rotation start process performed in the main control circuit.

The reel rotation start process shown in Figure 50 is performed in step S10 of Figure 23 (main process) in the main control circuit 100.

In the reel rotation start process, the main CPU 101 first determines whether the random delay flag (see step S1028 in Figure 44) is set to ON (step S1121).

If the main CPU 101 determines that the random delay flag is set to ON, it determines whether a predetermined time has elapsed since the random delay flag was set to ON (after the lock animation ended) (step S1122). If it determines that the predetermined time has not elapsed, the main CPU 101 executes the process in step S1122 again. On the other hand, if it determines that the predetermined time has elapsed, the main CPU 101 executes the random delay process (step S1123). As described above, the random delay process is a process that, after the lock animation, randomly generates a delay period for each reel 3L, 3C, and 3R before starting rotation. Details of the random delay process will be explained later using Figure 51. After executing the process in step S1123, the main CPU 101 sets the random delay flag to OFF (step S1124) and terminates this subroutine.

On the other hand, if the main CPU 101 determines in step S1121 that the random delay flag is not set to ON, it executes the normal acceleration process (step S1125). This process is as described in step S10 of Figure 23 (main process). In step S1125, unlike the random delay process, the main CPU 101 simultaneously requests the start of rotation for each reel 3L, 3C, and 3R. As a result, the rotation and acceleration of each reel 3L, 3C, and 3R occur simultaneously, reaching a constant speed at the same time. After executing the process in step S1125, the main CPU 101 terminates this subroutine.

In the reel rotation start process shown in Figure 50, it is explained that after the lock animation ends, the random delay process is automatically executed without requiring any action from the player. However, the random delay process may be executed only if the player performs an action (for example, operating the start lever 7) after the lock animation ends. In this case, for example, when the judgment result of step S1122 is "YES," the "Hit the lever" image (see step S1101 in Figure 49) can be displayed on the main display device 210. Subsequently, when the start lever 7 is operated, it is possible to configure the system to start the random delay process (processing in step S1123) at the timing of the start lever 7 operation. On the other hand, if the start lever 7 is not operated within a predetermined time after the "Hit the lever" image is displayed, the random delay process may be started at the time the predetermined time has elapsed.

<Random Delay Processing>
Figure 51 is a flowchart showing the random delay processing performed in the main control circuit.

The random delay processing shown in Figure 51 is a process performed in the main control circuit 100 at step S1123 of Figure 50 (reel rotation start processing).

In the random delay processing, the main CPU 101 first obtains random values for the left reel, the middle reel, and the right reel (step S1141). These random values are used to randomly determine the rotation start timing of each reel (3L, 3C, and 3R). In step S1141, the main CPU 101 obtains a random value between 0 and 20 for the left reel, a random value between 0 and 20 for the middle reel, and a random value between 0 and 20 for the right reel.

Next, the main CPU 101 sets the values corresponding to the random values for the left reel, the middle reel, and the right reel in the left reel acceleration timer, the middle reel acceleration timer, and the right reel acceleration timer, respectively (step S1142). In this process, the main CPU 101 sets the value obtained by multiplying the random value for the left reel by a predetermined number (for example, 32) in the left reel acceleration timer, sets the value obtained by multiplying the random value for the middle reel by a predetermined number (for example, 32) in the middle reel acceleration timer, and sets the value obtained by multiplying the random value for the right reel by a predetermined number (for example, 32) in the right reel acceleration timer. For example, if the random value for the left reel is 5, the left reel acceleration timer is set to "160". If the random value for the middle reel is 10, the left reel acceleration timer is set to "320". If the random value for the right reel is 15, the right reel acceleration timer is set to "480". The left reel acceleration timer, middle reel acceleration timer, and right reel acceleration timer are each updated by a timer update process (see step S206 in Figure 32). That is, the left reel acceleration timer, middle reel acceleration timer, and right reel acceleration timer each decrease by 1 each time a periodic interrupt process (see Figure 32) is performed.

Next, the main CPU 101 determines whether the left reel 3L has been accelerated or not (step S1143). The main CPU 101 can recognize that the left reel 3L has been accelerated if the left reel acceleration flag (see step S1146) is set to ON. If it determines that the left reel 3L has not been accelerated, the main CPU 101 determines whether the left reel acceleration timer is 0 (step S1144). If it determines that the left reel acceleration timer is 0, the main CPU 101 executes the left reel acceleration process (step S1145). In this process, the main CPU 101 controls the excitation phase so that it is excited based on the same excitation pattern used when accelerating the left reel 3L in the normal acceleration process (see step S1124 in Figure 50). Then, the main CPU 101 sets the left reel acceleration flag to ON (step S1146).

If the left reel 3L is determined to be accelerated in step S1143, if the left reel acceleration timer is determined to be not 0 in step S1144, or after the processing in step S1146, the main CPU 101 determines whether the middle reel 3C is accelerated or not (step S1147). The main CPU 101 can recognize that the middle reel 3C is accelerated if the middle reel acceleration flag (see step S1150) is set to ON. If the main CPU 101 determines that the middle reel 3C is not accelerated, the main CPU 101 determines whether the middle reel acceleration timer is 0 or not (step S1148). If the main CPU 101 determines that the middle reel acceleration timer is 0, the main CPU 101 executes the middle reel acceleration process (step S1149). In this process, the main CPU 101 controls the excitation phase to be excited based on the same excitation pattern used when accelerating the middle reel 3C during normal acceleration processing (see step S1124 in Figure 50). Then, the main CPU 101 sets the middle reel acceleration completed flag to ON (step S1150).

If the main CPU 101 determines in step S1147 that the middle reel 3C has been accelerated, if the main CPU 101 determines in step S1148 that the middle reel acceleration timer is not 0, or after executing the process in step S1150, the main CPU 101 determines whether or not the right reel 3R has been accelerated (step S1151). The main CPU 101 can recognize that the right reel 3R has been accelerated if the right reel acceleration flag (see step S1154) is set to ON. If the main CPU 101 determines that the right reel 3R has not been accelerated, the main CPU 101 determines whether or not the right reel acceleration timer is 0 (step S1152). If the main CPU 101 determines that the right reel acceleration timer is 0, the main CPU 101 executes the right reel acceleration process (step S1153). In this process, the main CPU 101 controls the excitation phase to be excited based on the same excitation pattern used when accelerating the right reel 3R during normal acceleration processing (see step S1124 in Figure 50). Then, the main CPU 101 sets the right reel acceleration completed flag to ON (step S1154).

If the right reel 3R is determined to be accelerated in step S1151, if the right reel acceleration timer is determined to be non-zero in step S1152, or after executing the process in step S1154, the main CPU 101 determines whether all reels 3L, 3C, and 3R are accelerated (step S1155). The main CPU 101 can recognize that all reels 3L, 3C, and 3R are accelerated if the left reel acceleration flag, the middle reel acceleration flag, and the right reel acceleration flag are all set to ON. If at least one reel 3 is determined to be not accelerated, the main CPU 101 returns to step S1143. On the other hand, if all reels 3L, 3C, and 3R are determined to be accelerated, the main CPU 101 terminates this subroutine.

Based on the above, the rotation start timing of each reel (3L, 3C, 3R) is determined randomly. In this respect, the random delay processing (acceleration processing of reels 3L, 3C, 3R when a lock effect occurs) differs from the normal acceleration processing (acceleration processing of reels 3L, 3C, 3R when a lock effect does not occur). However, the behavior of each reel (3L, 3C, 3R) after rotation (the time from when each reel starts rotating until it reaches a constant speed) is the same whether or not a lock effect occurs.

<Reel control state in simulated gameplay>
Figures 52 to 54 show an example of the temporal change in the reel control state when a simulated game is played.

Figures 52 and 53 show the relationship between player operation and reel control state when the lock effect corresponding to lock effect number "3" (see Figure 36) is performed. Figure 54 shows the relationship between player operation and reel control state when the lock effect corresponding to lock effect number "6" (see Figure 36) is performed. In the figures, "Acceleration" indicates that the reel control state is acceleration control state, "Constant Speed" indicates that the reel control state is constant speed control state, "Deceleration" indicates that the reel control state is deceleration control state, "Stop" indicates that the reel control state is stop control state, and "Oscillating" indicates that the reel control state is oscillating control state.

The acceleration control state is a state in which the excitation phase is excited based on an acceleration excitation pattern; the constant speed control state is a state in which the excitation phase is excited based on a constant speed excitation pattern; the deceleration control state is a state in which the excitation phase is excited based on a deceleration excitation pattern; the stop control state is a state in which the excitation phase is excited based on a stop excitation pattern; and the oscillation control state is a state in which the excitation phase is excited based on an oscillation excitation pattern. Information indicating the reel control state (reel control state flag) is stored in the reel control state flag storage area (not shown) of the main RAM 103. The main CPU 101 recognizes the current reel control state by referring to the reel control state flag storage area and controls each stepping motor 51L, 51C, and 51R in the reel control processing (see step S203 in Figure 32) so that the excitation phase is excited based on the excitation pattern corresponding to the reel control state.

In the example shown in Figure 52, when the start lever 7 is operated, the reel control state for each reel 3L, 3C, and 3R becomes an acceleration control state, and after a predetermined time has elapsed, the reel control state for each reel 3L, 3C, and 3R becomes a constant speed control state. Subsequently, when any of the stop buttons 8 are operated as a first stop operation, the reel control state for the reel 3 targeted by the stop operation (first stop reel) becomes a deceleration control state, and when the rotation of the first stop reel stops, the reel control state of the first stop reel becomes an oscillating control state. Similarly, when any of the stop buttons 8 are operated as a second stop operation, the reel control state for the reel 3 targeted by the stop operation (second stop reel) becomes a deceleration control state, and when the rotation of the second stop reel stops, the reel control state of the second stop reel becomes an oscillating control state. Similarly, when any stop button 8 is operated as a third stop operation, the reel control state for the reel 3 (third stop reel) targeted by the stop operation becomes a deceleration control state. Once the rotation of the third stop reel stops, its reel control state becomes an oscillation control state. After all reels 3L, 3C, and 3R are in the oscillation control state, a random delay process is performed. At random timings, the reel control state for each reel 3L, 3C, and 3R becomes an acceleration control state, and then the reel control state for each reel 3L, 3C, and 3R becomes a constant speed control state.

In the example shown in Figure 53, when the start lever 7 is operated, the reel control state for each reel 3L, 3C, and 3R becomes an acceleration control state, and after a predetermined time has elapsed, the reel control state for each reel 3L, 3C, and 3R becomes a constant speed control state. Subsequently, when any of the stop buttons 8 are operated as a first stop operation, the reel control state for the reel 3 targeted by the stop operation (first stop reel) becomes a deceleration control state, and when the rotation of the first stop reel stops, the reel control state of the first stop reel becomes an oscillating control state. Similarly, when any of the stop buttons 8 are operated as a second stop operation, the reel control state for the reel 3 targeted by the stop operation (second stop reel) becomes a deceleration control state, and when the rotation of the second stop reel stops, the reel control state of the second stop reel becomes an oscillating control state. Similarly, when any stop button 8 is operated as a third stop operation, the reel control state for the reel 3 (third stop reel) targeted by the stop operation becomes a deceleration control state. Once the rotation of the third stop reel stops, its reel control state becomes an oscillating control state. Then, after a predetermined time has elapsed since all reels 3L, 3C, and 3R have entered the oscillating control state, the reel control state for each reel 3L, 3C, and 3R becomes a stop control state. Subsequently, after a random delay process is performed, the reel control state for each reel 3L, 3C, and 3R becomes an acceleration control state at a random timing, and then the reel control state for each reel 3L, 3C, and 3R becomes a constant speed control state.

As described above, when random delay processing is performed, in the example shown in Figure 52, the system is directly transitioned from the oscillation control state to the acceleration control state, whereas in the example shown in Figure 53, the system is first transitioned from the oscillation control state to the stop control state, and then from the stop control state to the acceleration control state. In this embodiment, the stop control state may or may not be interposed between the oscillation control state and the acceleration control state. When the stop control state is interposed, the timing of the transition from the oscillation control state to the stop control state is not particularly limited. For example, when the judgment result of step S1122 in Figure 50 is "YES", the reel control state for all reels 3L, 3C, and 3R may be transitioned from the oscillation control state to the stop control state. Furthermore, when transitioning from simulated gameplay to main gameplay (for example, when the judgment result in step S1122 in Figure 50 is "YES"), the aforementioned "Hit the lever" image (see step S1101 in Figure 49) may be displayed on the main display device 210, and when the start lever 7 is operated, the reel control state for all reels 3L, 3C, and 3R may be transitioned from the oscillation control state to the stop control state. In these cases, the oscillation of each reel 3L, 3C, and 3R will end simultaneously at the timing of the transition to the stop control state. This timing may be before the random delay processing (see step S1123 in Figure 50) starts, or after the random delay processing starts. On the other hand, in this embodiment, the oscillation may be terminated at different timings for each reel 3 (in the order in which the stop operation is performed). For example, for each reel 3, the oscillation may be transitioned from the oscillation control state to the stop control state when a predetermined time has elapsed since the reel control state transitioned to the oscillation control state (since the rotation stopped).

In the example shown in Figure 54, when the start lever 7 is operated, the reel control state for each reel 3L, 3C, and 3R becomes an acceleration control state, and after a predetermined time has elapsed, the reel control state for each reel 3L, 3C, and 3R becomes a constant speed control state. After that predetermined time has elapsed, without any stopping operation by the player (automatically), the reel control state for the first stop reel (for example, the right reel 3R) goes through a deceleration control state and then to a stop control state. Similarly, without any stopping operation by the player (automatically), the reel control state for the second stop reel (for example, the middle reel 3C) goes through a deceleration control state and then to a stop control state. Similarly, without any stopping operation by the player (automatically), the reel control state for the third stop reel (for example, the left reel 3L) goes through a deceleration control state and then to a stop control state. Subsequently, the "Hit the lever" image (see step S1101 in Figure 49) is displayed on the main display device 210. When the start lever 7 is operated, the reel control state for the third stop reel (e.g., left reel 3L) changes from an acceleration control state to a constant speed control state. Then, when the stop button 8 corresponding to the third stop reel (e.g., left stop button 8L) is operated, the reel control state for the reel 3 (third stop reel) targeted by the stop operation changes to a deceleration control state. When the rotation of the third stop reel stops, the reel control state for the third stop reel changes to an oscillation control state. After a random delay process is performed, at random timings, the reel control state for each reel 3L, 3C, and 3R changes to an acceleration control state, and then to a constant speed control state.

As described above, in the example shown in Figure 54, the rotation of the first stop reel (e.g., the right reel 3R) and the second stop reel (e.g., the middle reel 3C) is automatically stopped, and these reels are configured not to enter a swing control state after stopping. Thus, in this embodiment, when a reel 3 stops without a stop operation by the player, it is possible to configure the reel 3 not to swing. For example, after the rotation of the first stop reel (e.g., the right reel 3R) and the second stop reel (e.g., the middle reel 3C) is automatically stopped, if the rotation of the third stop reel (e.g., the left reel 3L) is stopped in response to a stop operation by the player, the reels 3 may not swing when the first stop reel (e.g., the right reel 3R) and the second stop reel (e.g., the middle reel 3C) stop, while the reel 3 may swing when the third stop reel (e.g., the left reel 3L) stops. In this case, as shown in the example in Figure 54, the third stop reel (for example, the left reel 3L) may be automatically stopped once, and then stopped again in response to a stop operation performed after it has restarted. Alternatively, the third stop reel (for example, the left reel 3L) may be stopped in response to a stop operation (from the beginning without going through restarting) without being automatically stopped once. Similarly, if the rotation of the first stop reel (for example, the right reel 3R) is automatically stopped, and then the rotation of the second stop reel (for example, the middle reel 3C) and the third stop reel (for example, the left reel 3L) is stopped in response to a stop operation by the player, the first stop reel (for example, the right reel 3R) may not be allowed to swing when it stops, while the second stop reel (for example, the middle reel 3C) and the third stop reel (for example, the left reel 3L) may be allowed to swing when they stop. In the above explanation, it was assumed that the reel 3 to be stopped first stops automatically, and the reel 3 to be stopped later stops in response to the player's stop command. However, conversely, the reel 3 to be stopped first may stop in response to the player's stop command, and the reel 3 to be stopped later may stop automatically.

Furthermore, in this embodiment, it is also possible to configure the system to swing even when one reel 3 stops without a stop operation by the player. For example, if the rotation of the first stop reel (e.g., right reel 3R) to the third stop reel (e.g., left reel 3L) stops automatically in the manner shown in Figure 54, the first stop reel (e.g., right reel 3R) may be swung when it stops, the second stop reel (e.g., middle reel 3C) may be swung when it stops, and the third stop reel (e.g., left reel 3L) may be swung when it stops.

Figures 52 to 54 illustrate the case where a player operates a stop button 8, and after the stop button 8 changes from an operated state to an unoperated state (the stop switch 8S changes from an on state to an off state, i.e., becomes off-edge), the reel control state for the reel 3 corresponding to the stop button 8 becomes a swing control state. In this embodiment, the swing of the reel 3 corresponding to the stop button 8 may start when the stop button 8 changes from an operated state to an unoperated state (becomes off-edge), or the swing of the reel 3 corresponding to the stop button 8 may start when the stop button 8 changes from an unoperated state to an operated state (the stop switch 8S changes from an off state to an on state, i.e., becomes on-edge). For example, the system may be configured such that the first stop operation occurs on the edge (no oscillation of the first stop reel) → the first stop operation occurs off the edge (oscillation of the first stop reel begins) → the second stop operation occurs on the edge (no oscillation of the second stop reel) → the second stop operation occurs off the edge (oscillation of the second stop reel begins) → the third stop operation occurs on the edge (no oscillation of the third stop reel) → the third stop operation occurs off the edge (oscillation of the third stop reel begins).

Furthermore, in this embodiment, when the rotation of the first stop reel (e.g., right reel 3R) to the third stop reel (e.g., left reel 3L) is stopped in response to the player's stop operation (see Figures 52 and 53), the reels 3 may not be swung when the first stop reel (e.g., right reel 3R) and the second stop reel (e.g., middle reel 3C) are stopped, but all reels 3 may be swung when the third stop reel (e.g., left reel 3L) is stopped. For example, all reels 3 may be swung when the off-edge of the stop switch 8S corresponding to the third stop reel (e.g., left reel 3L) is detected. Alternatively, in this case, the first stop reel (e.g., right reel 3R) and the second stop reel (e.g., middle reel 3C) may not be swung, and only the third stop reel (e.g., left reel 3L) may be swung. For example, the system may be configured such that the first stop operation occurs on the edge (no oscillation of the first stop reel) → the first stop operation occurs off the edge (no oscillation of the first stop reel) → the second stop operation occurs on the edge (no oscillation of the second stop reel) → the second stop operation occurs off the edge (no oscillation of the second stop reel) → the third stop operation occurs on the edge (no oscillation of the third stop reel) → the third stop operation occurs off the edge (oscillation of all reels begins).

The above describes a pachislo machine 1 according to the second embodiment as one embodiment of the present invention.

[Third Embodiment]
The first and second embodiments have been described above. The third embodiment will now be described. The basic configuration of the pachislo machine 1 according to the third embodiment is the same as that of the pachislo machine 1 according to the first and second embodiments. In the following description, components that are the same as those of the pachislo machine 1 according to the first and second embodiments will be denoted by the same reference numerals. Furthermore, explanations of parts that apply to the third embodiment as described in the first and second embodiments will be omitted.

Furthermore, even if the above description includes phrases that limit the description to the pachislo machine 1 according to the first embodiment, such as "In the first embodiment,..." or "In the pachislo machine 1 of the first embodiment,...", these descriptions can also be applied to the pachislo machine 1 according to the third embodiment, to the extent that they do not depart from the spirit of the third embodiment. Similarly, any descriptions in the above description that limit the description to the pachislo machine 1 according to the second embodiment can also be applied to the pachislo machine 1 according to the third embodiment, to the extent that they do not depart from the spirit of the third embodiment. Therefore, it is possible to partially substitute or combine the configurations shown in the first and second embodiments (including the configurations shown in the modified examples and the configurations shown in the extended examples) with the configurations shown in the third embodiment.

Furthermore, even if the shape differs from that of the pachislo machine 1 according to the first and second embodiments, components with similar functions may be assigned the same reference numerals for convenience. Also, even if the shape and processing are the same as that of the pachislo machine 1 according to the first and second embodiments, different reference numerals or step numbers may be assigned for convenience.

<Lock effect execution process>
Figure 55 is a flowchart showing the lock animation execution process performed in the main control circuit. Figure 56 is a flowchart showing the simulated game start process performed in the main control circuit.

The lock animation execution process shown in Figure 55 is a process performed in the main control circuit 100 at step S8 (main animation control process at game start) of Figure 23 (main processing). In the third embodiment, the process performed at step S8 (main animation control process at game start) of Figure 23 (main processing) was described as the lock animation execution process shown in Figure 44. In this embodiment, the process performed at step S8 (main animation control process at game start) of Figure 23 (main processing) may be either the lock animation execution process shown in Figure 44 or the lock animation execution process shown in Figure 55.

In the lock animation execution process, the main CPU 101 first determines whether the lock animation start flag (see steps S1006, S1011, and S1013 in Figure 43) is set to ON (step S1201). If it determines that the lock animation start flag is not set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the lock animation start flag is set to ON, it executes the process for starting a simulated game (step S1202). Here, the process for starting a simulated game will be explained using Figure 56.

In the process for starting a simulated game, the main CPU 101 first determines whether the lock animation number selected in the lock animation determination process (see Figure 43) is one of the lock animation numbers "3", "4", or "5" (step S1221). If it determines that the selected lock animation number is not one of the lock animation numbers "3", "4", or "5", the main CPU 101 terminates this subroutine.

On the other hand, if the selected lock animation number is determined to be one of lock animation numbers "3," "4," or "5," the main CPU 101 sets a value corresponding to a predetermined time (for example, 5 seconds) in the simulated game start lock timer (step S1222). The simulated game start lock timer is updated by the timer update process (see step S206 in Figure 32). That is, the simulated game start lock timer decreases by 1 each time the periodic interrupt process (see Figure 32) is performed.

Next, the main CPU 101 determines whether the simulated game start lock timer is 0 or not (step S1223). If it determines that the simulated game start lock timer is not 0, the main CPU 101 executes the process in step S1223 again. This results in the simulated game start lock being performed for a predetermined time (for example, 5 seconds). The simulated game start lock may be a lock effect (freeze) without reel effects or simulated gameplay, or it may be a lock effect accompanied by reel effects (reel actions such as slow rotation, high-speed rotation, reverse rotation, etc.). While the simulated game start lock is in effect, reels 3L, 3C, and 3R remain stopped, and any operation performed by the player will be invalid.

On the other hand, if the lock timer at the start of the simulated game is determined to be 0, the main CPU 101 executes the simulated game start command generation and storage process (step S1224). In this process, the main CPU 101 generates simulated game start command data and stores the generated simulated game start command data in the communication data storage area of the main RAM 103. The simulated game start command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 in the communication data transmission process (see step S204 in Figure 32). As a result, the sub-control circuit 200 can recognize that it is time to start the simulated game and can determine the timing for executing various effects, etc.

Specifically, upon receiving the simulated game start command data, the sub-control circuit 200 sets the corresponding animation data for the start of the simulated game. This allows, for example, a text image ("Pull the lever" image) with the message "Pull the lever" (not shown in the diagram) to be displayed on the main display device 210, prompting the player to operate the start lever 7.

Next, the main CPU 101 determines whether the start lever 7 has been operated (step S1225). In this process, the main CPU 101 determines whether the start switch 7S is in the ON state (see step S50 in Figure 25). If it determines that the start lever 7 has been operated, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the start lever 7 has not been operated, it determines whether a predetermined time has elapsed since the execution of the simulated game start command generation and storage process (since the "Hit the lever" image was displayed) (step S1226). If it determines that the predetermined time has not elapsed, the main CPU 101 returns to step S1225. On the other hand, if it determines that the predetermined time has elapsed, the main CPU 101 sets the simulated game cancel flag to ON (step S1227). The simulated game cancel flag is a flag used to cancel the simulated game. After that, the main CPU 101 sets the lock effect start flag to OFF (step S1228) and terminates this subroutine.

The above explanation of the simulated game initiation process performed in step S1202 of Figure 55 was given using Figure 56. Returning to the explanation of Figure 55,

After executing the process in step S1202, the main CPU 101 determines whether the pseudo-game cancellation flag is set to ON (step S1203). If it determines that the pseudo-game cancellation flag is set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the pseudo-game cancellation flag is not set to ON, it executes the processes in steps S1204 to S1210. These processes are similar to those in steps S1022 to S1028 of Figure 44, so their explanation is omitted here. Afterward, the main CPU 101 terminates this subroutine.

Based on the above, if a lock animation corresponding to any of lock animation numbers "3" to "5" is selected during the lock animation determination process (see Figure 43), a lock is performed at the start of the simulated game. Subsequently, if the start lever 7 is operated, the rotation of reels 3L, 3C, and 3R begins for the simulated game (see steps S1206 and S1208 in Figure 55). After a random delay process (see step S1123 in Figure 50), the rotation of reels 3L, 3C, and 3R returns to the constant speed rotation for the main game. On the other hand, if the start lever 7 is not operated within a predetermined time after the "Hit the lever" image is displayed, the simulated game (rotation of reels 3L, 3C, and 3R for the simulated game) does not occur. Instead, after a normal acceleration process (see step S1125 in Figure 50), the rotation of reels 3L, 3C, and 3R returns to the constant speed rotation for the main game.

As described above, in the lock animation execution process shown in Figure 55, the simulated game was explained as starting when the start lever 7 is operated. However, as explained in the second embodiment, the condition for starting the simulated game is not limited to the operation of the start lever 7, and any operation of any control unit (for example, the start lever 7, MAX bet button 6a, 1 bet button 6b, payout button 9, etc.) can be appropriately adopted. Furthermore, the condition for canceling the simulated game (setting the simulated game cancellation flag to ON) is not limited to the elapsed time, and any operation of any control unit (for example, the start lever 7, MAX bet button 6a, 1 bet button 6b, payout button 9, etc.) can be appropriately adopted.

<Processing during normal simulated gameplay>
Figure 57 is a flowchart showing the processing performed in the main control circuit during normal simulated gameplay. Figure 58 is a flowchart showing the stop button operation reception processing performed in the main control circuit. Figure 59 is a flowchart showing the oscillation control processing performed in the main control circuit. Figure 60 is a flowchart showing the processing for ending the simulated gameplay performed in the main control circuit.

The normal simulated game processing shown in Figure 57 is the processing performed in step S1042 of Figure 46 (simulated game processing) in the main control circuit 100. In the second embodiment, the processing performed in step S1042 of Figure 46 (simulated game processing) was described as the normal simulated game processing shown in Figure 47. In this embodiment, the processing performed in step S1042 of Figure 46 (simulated game processing) may be either the normal simulated game processing shown in Figure 47 or the normal simulated game processing shown in Figure 57.

During normal simulated gameplay processing, the main CPU 101 first executes steps S1241 and S1242. However, since these processes are similar to steps S1061 and S1062 in Figure 47, their explanation is omitted here.

After executing the process in step S1242, the main CPU 101 executes the stop button operation reception process (step S1243). Here, the stop button operation reception process will be explained using Figure 58.

In the stop button operation reception process, the main CPU 101 first determines whether the stop button operation cancellation flag is set to ON (step S1261). The stop button operation cancellation flag is set when the MAX bet button 6a is operated during simulated gameplay (see step S1264). If the main CPU 101 determines that the stop button operation cancellation flag is set to ON, it terminates this subroutine.

On the other hand, if the main CPU 101 determines that the stop button operation cancellation flag is not set to ON, it determines whether or not a valid stop button 8L, 8C, or 8R has been operated (step S1262). This process is the same as the process in step S1063 in Figure 47. The main CPU 101 can recognize a valid stop button 8L, 8C, or 8R by referring to the operation stop button storage area (see Figure 21).

If the main CPU 101 determines that a valid stop button 8L, 8C, or 8R has been operated, it terminates this subroutine. On the other hand, if the main CPU 101 determines that no valid stop buttons 8L, 8C, or 8R have been operated, it determines whether the MAX bet button 6a has been operated (step S1263). In this process, the main CPU 101 determines whether the bet switch 6S has been turned ON.

If the main CPU 101 determines that the MAX bet button 6a has been operated, it sets the stop button operation cancel flag to ON (step S1264). The stop button operation cancel flag indicates that all remaining stop button operations will be skipped. After executing the process in step S1264, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the MAX bet button 6a has not been operated, it determines whether a predetermined time has elapsed since the start of the stop button operation reception process shown in Figure 58 (step S1265). If it determines that the predetermined time has not elapsed, the main CPU 101 returns to step S1262. On the other hand, if it determines that the predetermined time has elapsed, the main CPU 101 sets the stop button operation omission flag to ON (step S1266). The stop button operation omission flag indicates that the stop button operation will be omitted this time. After executing the process in step S1266, the main CPU 101 terminates this subroutine.

The stop button operation reception process performed in step S1243 of Figure 57 has been explained using Figure 58. Returning to the explanation of Figure 57,

After executing the process in step S1243, the main CPU 101 updates the operation stop button storage area and the press order storage area (step S1244) and determines the control target reel (step S1245). In these processes, if neither the stop button operation cancellation flag nor the stop button operation omission flag is set to "on", the main CPU 101 performs the same processing as in steps S1064 and S1065 of Figure 47. On the other hand, if either the stop button operation cancellation flag or the stop button operation omission flag is set to "on", the main CPU 101 assumes that the leftmost stop button 8 among the valid stop buttons 8L, 8C, and 8R has been operated, updates the operation stop button storage area, and determines the control target reel.

For example, if all stop buttons 8L, 8C, and 8R are enabled, the main CPU 101 stores "1" in bit 0 of the activated stop button storage area, updates bit 4 to "0", and determines the left reel 3L as the controlled reel, similar to when the left stop button 8L is operated. Also, if the middle stop button 8C and the right stop button 8R are enabled, the main CPU 101 stores "1" in bit 1 of the activated stop button storage area, updates bit 5 to "0", and determines the middle reel 3C as the controlled reel, similar to when the middle stop button 8C is operated. Also, if the left stop button 8L and the middle stop button 8C are enabled, the main CPU 101 stores "1" in bit 0 of the activated stop button storage area, updates bit 4 to "0", and determines the left reel 3L as the controlled reel, similar to when the left stop button 8L is operated. Furthermore, if only the right stop button 8R is active, the main CPU 101 stores "1" in bit 2 of the activated stop button storage area, updates bit 6 to "0", and determines the right reel 3R as the target reel for control, just as it would when the right stop button 8R is operated.

Next, the main CPU 101 executes the processes in steps S1246 to S1249, which are basically the same as the processes in steps S1066 to S1069 in Figure 47. In step S1246, similar to step S1066, the main CPU 101 determines and stores a predetermined position as the planned stop position, regardless of the stop start position (see step S116), where the symbols will ultimately stop. As a result, regardless of whether the stop button operation cancellation flag or stop button operation omission flag is set to ON or not, each reel 3L, 3C, and 3R stops in the manner shown in Figures 39(b) to (d), Figures 40(b) to (d), and Figures 41(b) to (d).

Here, if the stop button operation cancellation flag or the stop button operation omission flag is set to ON, the rotation pattern of the controlled reel until it stops may be different compared to when neither the stop button operation cancellation flag nor the stop button operation omission flag is set to ON. For example, when the stop button operation cancellation flag is set to ON (when the MAX bet button 6a is operated), the time from when the button is operated until the controlled reel stops may be longer compared to when neither the stop button operation cancellation flag nor the stop button operation omission flag is set to ON (when the stop button 8 is operated) (for example, the controlled reel may be rotated one extra time before stopping). However, even if there is a difference in the rotation pattern, the symbols that are ultimately displayed when the reel stops will be the same regardless of whether the stop button operation cancellation flag or the stop button operation omission flag is set to ON or not.

If the main CPU 101 determines that the controlled reel has stopped in step S1249, it executes the oscillation control process (step S1250). The oscillation control process will now be explained using Figure 59.

In the oscillation control process, first, the main CPU 101 determines whether the stop button operation cancellation flag is set to ON (step S1281). If it determines that the stop button operation cancellation flag is not set to ON, the main CPU 101 determines whether the stop button operation omission flag is set to ON (step S1282). If it determines that the stop button operation omission flag is set to ON, the main CPU 101 sets the stop button operation omission flag to OFF (step S1283).

If the system determines in step S1281 that the stop button operation cancellation flag is set to ON, or after executing the process in step S1283, the main CPU 101 executes control to stop the controlled reel (step S1284). In this process, the main CPU 101 sets data corresponding to the excitation pattern for stopping the controlled reel. As a result, the controlled reel remains stopped in the manner shown in Figures 39(b) to (d), Figures 40(b) to (d), and Figures 41(b) to (d) (unlike the illustrations, no oscillation occurs).

If the main CPU 101 determines in step S1282 that the stop button operation omission flag is not set to ON, it executes a control to swing the controlled reel (step S1285). This process is the same as the process in step S1070 in Figure 47. As a result, the controlled reel swings in the manner shown in Figures 39(b) to (d), Figures 40(b) to (d), and Figures 41(b) to (d).

After executing the process in step S1284 or step S1285, the main CPU 101 terminates this subroutine.

The oscillation control process performed in step S1250 of Figure 57 has been explained using Figure 59. Now, let's return to the explanation of Figure 57.

After executing the process in step S1250, the main CPU 101 determines whether or not there are valid stop buttons 8L, 8C, and 8R (step S1251). This process is the same as the process in step S1071 in Figure 47. If it is determined that there are no valid stop buttons 8L, 8C, and 8R, the main CPU 101 executes the process for terminating the simulated game (step S1252). Here, the process for terminating the simulated game will be explained using Figure 60.

In the processing for terminating the simulated game, the main CPU 101 first determines whether the lock animation number selected in the lock animation determination process (see Figure 43) is lock animation number "3" (step S1301). If it determines that the selected lock animation number is lock animation number "3", the main CPU 101 outputs an AT equivalent signal via the external centralized terminal board 55 (step S1302). As described in the first embodiment, the external centralized terminal board 55 is connected to an external data display or hall computer of the pachislo machine 1, and these devices can also recognize the status of medal insertion and the transition status of the game state in the pachislo machine 1.

The AT equivalent signal is an external signal that is turned ON when the AT state begins and OFF when the AT state ends. In step S1302, the main CPU 101 turns this external signal ON. Similarly, although not shown in the diagram, the main CPU 101 also turns this external signal ON after executing the process in step S1083 of Figure 48. This causes the data display and hall computer to recognize that the AT state has begun.

As described above, in this embodiment, the AT equivalent signal is configured to be turned ON when the lock effect corresponding to lock effect number "3" or "5" ends (when the "Red 7" symbols are displayed as a stop). Furthermore, as described in the first embodiment, multiple AT states (a predetermined AT state and a specific AT state) may be provided, and each AT state may have a different degree of advantage for the player. As such AT states, for example, the pseudo BB (Big Bonus) and pseudo RB (Regular Bonus) described in the first embodiment can be adopted. In both cases, when it is decided to transition to pseudo BB and when it is decided to transition to pseudo RB, the same symbol combination (for example, the "Red 7" symbols are displayed as a stop) may be set in the simulated game. Furthermore, the same AT equivalent signal may be turned ON when it is decided to transition to a pseudo-BB and a specific symbol combination (for example, matching "red 7" symbols) is displayed during the pseudo-game, and when it is decided to transition to a pseudo-RB and a specific symbol combination (for example, matching "red 7" symbols) is displayed during the pseudo-game. This makes it possible to conceal from the player which of the pseudo-BB or pseudo-RB pseudo-bonus has been decided to transition to at the time a specific symbol combination (for example, matching "red 7" symbols) is displayed during the pseudo-game, thus creating a sense of anticipation. The timing at which the pseudo-BB or pseudo-RB actually starts is not particularly limited, but it can be after a specific symbol combination (for example, matching "red 7" symbols) is displayed during the pseudo-game (the unit game in which the pseudo-game was played, or a unit game played a predetermined number of times after that unit game). For example, a pseudo-Big Bonus (BB) could be initiated when the "Red 7" symbol aligns along the winning line during the main game, and a pseudo-Regular Bonus (RB) could be initiated when the "BAR" symbol aligns along the winning line during the main game.

In the above description, the AT equivalent signal is turned on when a specific combination of symbols (for example, a "red 7" symbol combination) is displayed during the simulated game (before the random delay processing begins). However, similarly, the AT equivalent signal may be turned on when a specific combination of symbols (for example, a "red 7" symbol combination) is displayed during the reel animation (before the random delay processing begins). Alternatively, the AT equivalent signal may be turned on at the timing when the simulated bonus actually begins (for example, step S106 in Figure 28). Furthermore, there are no particular limitations on the timing when the AT equivalent signal is turned off, but it is possible to turn off the AT equivalent signal at the timing when the simulated bonus actually ends (for example, step S155 in Figure 31). As described in the first embodiment, external signal 1 (the AT equivalent signal mentioned above) may be turned on based on the start of the first set of AT states, and external signal 2 may be turned on each time a set starts for the second set and beyond. From this perspective, the simulated game may be performed only when it is decided to transition to the first set of AT (for example, not performed when a 1G consecutive win lottery is won). Furthermore, when the AT equivalent signal is turned ON, the section lamp described in the first embodiment is lit.

If, in step S1301, the system determines that the lock animation number is not "3", the main CPU 101 determines whether the lock animation number selected in the lock animation determination process (see Figure 43) is "5" (step S1303). After executing the process in step S1302, or if, in step S1303, the system determines that the lock animation number is not "5" (i.e., "4"), the main CPU 101 outputs a medal insertion signal via the external centralized terminal board 55 (step S1304).

As described in the first embodiment, the medal insertion signal is a signal output from the external centralized terminal board 55 when a medal is inserted (see steps S42 and S46 in Figure 25). That is, the medal insertion signal is output each time a main game is played, and the number of games played on the pachislo machine 1 can be recognized via the medal insertion signal in the data display and hall computer. In this embodiment, the medal insertion signal is also output during simulated games, so the number of games played includes both the main game and the simulated game. This ensures that the game count is incremented even when a simulated game is played. Although not shown, the main CPU 101 also outputs the medal insertion signal after executing the process in step S1083 in Figure 48.

The medal insertion signal can be output at the timing when the simulated game starts or ends. Examples of the timing when the simulated game starts include when the start lever 7 is operated (for example, when the judgment result of step S1225 in Figure 56 is "YES") or when the rotation of the reels 3L, 3C, and 3R for the simulated game starts (for example, when the processing of step S1206 in Figure 55 is performed). Examples of the timing when the simulated game ends include when the rotation of the reels 3L, 3C, and 3R for the simulated game stops (for example, when the processing of Figure 60 is performed) or when the rotation of the reels 3L, 3C, and 3R for the main game starts (for example, when the judgment result of step S1122 in Figure 50 is "YES" or when the first reel starts rotating due to random delay processing). Furthermore, if a medal insertion signal is output during a simulated game, the system may be configured so that the medal insertion signal is not output when a medal is inserted during the unit game in which the simulated game is performed.

After executing the process in step S1304, the main CPU 101 sets the lock animation completion flag to ON (step S1305) and terminates this subroutine. On the other hand, if the lock animation number is determined to be "5" in step S1303, the main CPU 101 executes the post-simulated game reel animation process (step S1306). The post-simulated game reel animation process is explained using Figure 48, so its explanation is omitted here. After executing the process in step S1306, the main CPU 101 terminates this subroutine.

The above explanation of the pseudo-game termination process performed in step S1252 of Figure 57 was given using Figure 60. Returning to Figure 57, after executing the process in step S1252, the main CPU 101 terminates this subroutine.

<Processing of receiving operation for simulated game challenge>
Figure 61 is a flowchart showing the simulated game challenge operation reception process performed in the main control circuit.

The simulated game challenge operation reception process shown in Figure 61 is a process performed in step S1243 of Figure 57 (processing during normal simulated game) in the main control circuit 100. In the above explanation, the stop button operation reception process shown in Figure 58 was performed as the process performed in step S1243 of Figure 57 (processing during normal simulated game). However, in this embodiment, the simulated game challenge operation reception process shown in Figure 61 may also be performed as the process performed in step S1243 of Figure 57 (processing during normal simulated game).

Specifically, if all stop buttons 8 are active (i.e., none of the stop buttons 8 have been operated yet), that is, if the current stop operation is the first stop operation, the simulated game challenge operation acceptance process shown in Figure 61 will be performed. If there are invalid stop buttons 8 (i.e., at least one stop button 8 has been operated), that is, if the current stop operation is the second or third stop operation, the stop button operation acceptance process shown in Figure 58 may be performed. The main CPU 101 can recognize active stop buttons 8L, 8C, 8R and invalid stop buttons 8L, 8C, 8R by referring to the operating stop button storage area (see Figure 21).

In the simulated game challenge operation reception process, the main CPU 101 first determines the stop button for the simulated game (step S1321). In this process, the main CPU 101 determines one of the stop buttons 8 (left stop button 8L, middle stop button 8C, and right stop button 8R) as the stop button for the simulated game by performing a random number draw.

Next, the main CPU 101 executes the pseudo-game start command generation and storage process (step S1322). In this process, the main CPU 101 generates pseudo-game start command data and stores the generated pseudo-game start command data in the communication data storage area of the main RAM 103. The pseudo-game start command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that it is time to start the pseudo-game and to determine the timing for executing various effects.

Specifically, upon receiving the simulated game start command data, the sub-control circuit 200 sets the corresponding animation data for the start of the simulated game. This allows, for example (not shown in the diagram), a text image with a message such as "Simulated game starts with the correct choice of the stop button" to be displayed on the main display device 210, prompting the player to operate the stop button 8.

Next, the main CPU 101 determines whether a valid stop button 8L, 8C, or 8R has been operated (step S1323). This process is the same as the process in step S1063 in Figure 47. If it determines that a valid stop button 8L, 8C, or 8R has been operated, the main CPU 101 determines whether the operated stop button 8 matches the stop button for simulated game progression determined in step S1321 (step S1324).

If the main CPU 101 determines that the operated stop button 8 matches the stop button for simulated game progression, it terminates this subroutine and proceeds to step S1244 in Figure 57. On the other hand, if the main CPU 101 determines that the operated stop button 8 does not match the stop button for simulated game progression, it sets the simulated game cancellation flag to ON (step S1325) and terminates this subroutine.

Although not shown in the diagram, if the simulated game cancellation flag is set to ON, the main CPU 101, after completing the simulated game challenge operation acceptance process shown in Figure 61, terminates the normal simulated game processing shown in Figure 57 without performing steps S1244 to S1252 in Figure 57. Furthermore, it terminates the lock effect execution process shown in Figure 55 without performing steps S1209 and S1210 in Figure 55.

If the main CPU 101 determines in step S1323 that no valid stop buttons 8L, 8C, or 8R have been pressed, it executes the processes in steps S1326 to S1329. These processes are similar to those in steps S1263 to S1266 in Figure 58, so their explanation is omitted here. Afterward, the main CPU 101 terminates this subroutine.

Therefore, if the first stop operation is the stop button for the simulated game (for example, the left stop button 8L) (i.e., the correct choice is made in the three stop button selections), the simulated game continues, and after a random delay process (see step S1123 in Figure 50), the rotation of reels 3L, 3C, and 3R becomes the constant speed rotation for the main game. On the other hand, if the first stop operation is the stop button 8 other than the stop button for the simulated game (for example, the middle stop button 8C or the right stop button 8R) (i.e., the failure to make the correct choice in the three stop button selections), the simulated game ends at that point, and after a normal acceleration process (see step S1125 in Figure 50), the rotation of reels 3L, 3C, and 3R becomes the constant speed rotation for the main game.

Thus, in this embodiment, it is possible to configure the system so that the simulated game proceeds only after the rotation of the simulated game reels 3L, 3C, and 3R has started, and the appropriate stop button 8 has been operated. Alternatively, the operation of such an appropriate stop button 8 may be adopted as a condition for the start of the simulated game. For example, in Figure 56, the simulated game is described as starting only when the start lever 7 is operated. However, instead of operating the start lever 7, the simulated game (rotation of the simulated game reels 3L, 3C, and 3R) may be started only when an appropriate stop button 8 (e.g., the left stop button 8L) is operated. Furthermore, if an inappropriate stop button 8 (e.g., the middle stop button 8C or the right stop button 8R) is operated, the simulated game may be canceled (and the rotation of the simulated game reels 3L, 3C, and 3R may not occur at all).

<Determining the type of freeze>
Figure 62 shows an example of an image displayed on the main display device.

Figure 62 shows the freeze type determination screen displayed on the main display device 210. In this embodiment, multiple types of freezes (Freeze A, Freeze B, and Freeze C) are provided. Freeze A is a lock effect without reel animation or simulated gameplay. Freeze B is a lock effect accompanied by forward-rotating reel animation. Freeze C is a lock effect accompanied by reverse-rotating reel animation. The freeze type determination screen is used to determine one freeze from among Freeze A, Freeze B, and Freeze C. The determined freeze will be executed, for example, as a simulated game start lock (see step S1223 in Figure 56).

Specifically, Figure 62 shows the freeze type selection screen, displaying freeze image A 1201, freeze image B 1202, freeze image C 1203, and arrow image 1204. Arrow image 1204 indicates which of the three images (freeze image A 1201, freeze image B 1202, and freeze image C 1203) is selected. In the example shown in Figure 62, arrow image 1204 is displayed adjacent to freeze image A 1201, indicating that freeze image A 1201 is selected.

Thus, when Freeze A image 1201 is selected (Freeze A selected state), arrow image 1204 is displayed next to Freeze A image 1201. Similarly, when Freeze B image 1202 is selected (Freeze B selected state), arrow image 1204 is displayed next to Freeze B image 1202. When Freeze C image 1203 is selected (Freeze C selected state), arrow image 1204 is displayed next to Freeze C image 1203.

The position of arrow image 1204 can be switched using one of the following methods (a) to (c). For example, one of these methods is set in the main menu.
(a) Operation of stop buttons 8L, 8C, and 8R (b) Operation of MAX bet button 6a (c) Timer management

When (a) above is set, the player can switch the position of the arrow image 1204 by operating the stop buttons 8L, 8C, and 8R while the freeze type determination screen is displayed on the main display device 210, and can determine the freeze type by operating the MAX bet button 6a. Specifically, if the MAX bet button 6a is operated when freeze A is selected, freeze A is determined; if the MAX bet button 6a is operated when freeze B is selected, freeze B is determined; and if the MAX bet button 6a is operated when freeze C is selected, freeze C is determined.

When (b) above is set, the player can switch the position of the arrow image 1204 by operating the MAX bet button 6a when the freeze type determination screen is displayed on the main display device 210, and can determine the type of freeze by operating the start lever 7. Specifically, if the start lever 7 is operated when freeze A is selected, freeze A is determined; if the start lever 7 is operated when freeze B is selected, freeze B is determined; and if the start lever 7 is operated when freeze C is selected, freeze C is determined.

When (c) above is set, the freeze type determination screen is displayed on the main display device 210, and the system switches between one of the following states (Freeze A, Freeze B, Freeze C, etc.) at predetermined intervals. At this time, the player can determine the freeze type by operating the MAX bet button 6a. Specifically, if the MAX bet button 6a is operated in the Freeze A selection state, Freeze A is determined; if the MAX bet button 6a is operated in the Freeze B selection state, Freeze B is determined; and if the MAX bet button 6a is operated in the Freeze C selection state, Freeze C is determined. If the MAX bet button 6a is not operated within a predetermined time, the freeze type corresponding to the state at the time of the end of that period is determined. Alternatively, the freeze type may be determined by a lottery.

The timing at which the freeze type determination screen is displayed on the main display device 210 is not particularly limited. For example, it is possible to configure the system so that the freeze type determination screen is displayed when a combination of symbols related to BB (Big Bonus) stops along the active line (i.e., a BB is won). For instance, the freeze type determination screen may be displayed when a BB is won in one unit of game and the start lever 7 is operated in the next unit of game. Alternatively, the freeze type determination screen may be displayed between the time a BB is won in one unit of game and the start lever 7 is operated in the next unit of game.

The above describes how the type of freeze is determined, but the type of lock animation performed when a pseudo-bonus transition lottery is won or a 1G consecutive win lottery is won may also be determined by a similar method. For example, in a screen similar to that in Figure 62, the system may be configured to determine one of the lock animations A (e.g., a lock animation without reel animation and pseudo-gameplay), lock animation B (e.g., a lock animation with reel animation), and lock animation C (e.g., a lock animation with pseudo-gameplay) by the methods described in (a) to (c) above. In steps S1005, S1010, and S1012 of Figure 43, the lock animation determined in this way may be selected. Furthermore, the system may be configured to determine the type of oscillation pattern (e.g., one of the oscillation patterns A, B, and C described in the second embodiment) by a similar method. Furthermore, the effects determined in this manner are not limited to those controlled by the main control circuit 100, but may also be those controlled by the sub-control circuit 200.

<Processing when a bonus is won>
Figure 63 is a flowchart showing the bonus winning process performed in the main control circuit.

The bonus win processing shown in Figure 63 is performed in the main control circuit 100 after the processing in step S70 of Figure 26 (internal lottery processing) has been executed. That is, the bonus win processing is performed in a bonus win game (a unit game in which a bonus role is determined as an internal win role, transitioning from a non-bonus state (a state that is neither a bonus state nor a carryover state) to a carryover state (between flags)) before the rotation of each reel 3L, 3C, and 3R begins.

During the bonus win processing, the main CPU 101 first determines whether BB (Big Bonus) is internally determined as the winning combination (i.e., whether the current game is a BB winning game) (step S1341). If it determines that BB is not internally determined as the winning combination, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that BB is the internal winning combination, it randomly selects one of the lock animation numbers "1", "3", "5", and "6" (see Figure 36) (step S1342). Then, the main CPU 101 sets the lock animation start flag to ON (step S1343) and terminates this subroutine. This results in the lock animation corresponding to lock animation number "1", "3", "5", or "6".

In the second embodiment, when a lock animation number corresponding to the simulated game is selected, the "Aim for 7" animation image 1100 (see Figure 45) is displayed on the main display device 210 (see step S1022 in Figure 44). This prompts the player to perform a stop operation at the timing when the "Red 7" symbol can be displayed on each reel 3L, 3C, and 3R during the simulated game. Similarly, in this embodiment, the "Aim for 7" animation image 1100 may also be displayed on the main display device 210; however, here, the "Aim for BAR" animation image (not shown) is displayed on the main display device 210. This prompts the player to perform a stop operation at the timing when the "BAR" symbol can be displayed on each reel 3L, 3C, and 3R during the simulated game.

Furthermore, here, after BB is determined as the internal winning combination, the BB state begins when the "Red 7" symbol aligns along the active line during the main game (i.e., the "Red 7" symbol aligns). Similarly, after MB is determined as the internal winning combination, the MB state begins when the "BAR" symbol aligns along the active line during the main game (i.e., the "BAR" symbol aligns). In this case, during the BB winning game (main game), the player should aim for the "Red 7" symbol when operating the stop buttons 8L, 8C, and 8R.

However, as mentioned above, if the "Aim for the BAR" animation is displayed during the simulated game, and if this animation continues to be displayed even after the simulated game ends and the main game begins, it would cause the player to aim for a different symbol (the "BAR" symbol) than the symbol they should be aiming for (the "Red 7" symbol). This would significantly increase the likelihood that the "Red 7" symbols will not stop and display along the winning line (resulting in no Big Bonus).

In particular, the probability is very high when the "Red 7" symbol and the "BAR" symbol are spaced apart on each reel 3L, 3C, and 3R. For example, as shown in Figure 9, if the symbol position corresponding to the "Red 7" symbol ("0") on at least one reel 3 (middle reel 3C) is not within the range of the maximum number of sliding frames (4 symbols) relative to the symbol position corresponding to the "BAR" symbol ("9"), then if the reel 3 (middle reel 3C) is stopped at the timing when the "BAR" symbol appears on the active payline, it becomes impossible to win a Big Bonus (BB). In this sense, the "Aim for the BAR" animation image serves as a suggestion to prevent the BB from being won.

In any case, it is desirable that the "Aim for the BAR" image displayed during the simulated game be terminated at a predetermined timing to prevent the player from misidentifying the symbol they should be aiming for (the internal winning combination). This timing may be before the random delay processing (see step S1123 in Figure 50) begins, or after the random delay processing begins. Specifically, the timing in question is, for example, the period between the time the second stop reel stops and the time the third stop reel stops in a simulated game (for example, when the judgment result of step S1262 in Figure 58 is "YES" and the operation of the stop button 8 is the third stop operation, or when the judgment result of step S1265 in Figure 58 is "YES" and the third stop operation is omitted), when all remaining stop button operations have been omitted (for example, when the judgment result of step S1263 in Figure 58 is "YES"), and the period between the time the third stop reel stops and the time the third stop reel begins to swing (for example, when the judgment result of step S1249 in Figure 57 is "YES") Examples of when the result is "S" and the controlled reel is the third stop reel include: the timing when all reels 3L, 3C, and 3R have stopped in the simulated game (for example, after the judgment result of step S1251 in Figure 57 is "YES" and before the processing of step S1252 is performed); when the rotation of the main game reels 3L, 3C, and 3R begins (for example, when the judgment result of step S1122 in Figure 50 is "YES" or when the first reel begins to rotate due to random delay processing); and the period after each reel 3L, 3C, and 3R has started rotating for the main game until all reels 3L, 3C, and 3R reach a constant rotation speed.

Furthermore, if other simulated gameplay effects (e.g., oscillation control) are running at the same time the "Aim for the BAR" effect image is finished, those effects should also end. Additionally, at that time, an effect corresponding to the determination of BB as the internal winning combination (BB suggestion effect) may be started (displaying an image suggesting that BB has been determined as the internal winning combination (e.g., the "Aim for the 7" effect image 1100)). This effectively prevents the player from misidentifying the symbol they should be aiming for (the internal winning combination) and provides a suggestion that they should aim for the "Red 7" symbol.

As explained in the second embodiment, in the simulated game, it is possible to configure the system so that predetermined symbols are displayed regardless of the stopping position and the number of sliding pieces. Therefore, in the simulated game, even if the player aims for the "BAR" symbol when operating the stop buttons 8L, 8C, and 8R (even if the stopping operation is performed at a timing when the "BAR" symbol could be displayed on each reel 3L, 3C, and 3R), the "Red 7" symbol combination may still occur. This allows for the indication that the Big Bonus (BB) has been determined as the internal winning combination through the "Red 7" symbol combination. If the "Red 7" symbol combination occurs in the simulated game, the BB indication effect described above may be omitted in the main game.

Alternatively, in the simulated game, the game may be configured so that a "BAR" symbol combination is achieved when the stopping operation is performed at a timing when the "BAR" symbol can be displayed on each reel (3L, 3C, 3R) (if the stopping operation is not performed at the appropriate timing, the "BAR" symbol combination will not be achieved). Furthermore, in the simulated game, the "BAR" symbol combination may be achieved regardless of the starting stopping position and the number of sliding pieces. Alternatively, in the simulated game, the "BAR" symbols may appear to be in a near-miss position, but the "BAR" symbol combination may not be achieved (the remaining "BAR" symbol is not displayed). If the "Red 7" symbol combination is not achieved in the simulated game, it is desirable to perform the above-mentioned BB suggestion effect in the main game.

Thus, each time the "Red 7" symbol or the "BAR" symbol stops and is displayed on each reel 3L, 3C, or 3R, oscillation control (see step S1285 in Figure 59) is performed on each reel 3L, 3C, or 3R. As described in the second embodiment, this oscillation control is performed so that the "Red 7" symbol or the "BAR" symbol is positioned on the active line when each reel 3L, 3C, or 3R is at the center of the oscillation or when each reel 3L, 3C, or 3R is almost completely stopped.

In the case where the bonus winning process shown in Figure 63 is performed, the lock animation determination process shown in Figure 43 may be omitted, or the lock animation determination process shown in Figure 43 may be performed in conjunction with the bonus winning process shown in Figure 63. Furthermore, although not shown, if BB is not determined as the internal winning combination, a lock animation corresponding to lock animation number "2" or "4" (a so-called false animation) may be performed.

<Game end lock animation determination process>
Figure 64 is a flowchart showing the process for determining the game end lock animation performed in the main control circuit.

The game end lock animation determination process shown in Figure 64 is performed in the main control circuit 100 after the process in step S156 of Figure 31 (game end process during advantageous period) has been executed.

In the process of determining the lock animation at the end of the game, the main CPU 101 first determines whether the current game section is a favorable section (step S1361). This process is the same as the process in step S1001 in Figure 43. If it is determined that the current game section is not a favorable section, the main CPU 101 terminates this subroutine.

On the other hand, if the current game section is determined to be an advantageous section, the main CPU 101 determines whether or not the pseudo-bonus transition lottery has been won (step S1362). As explained in the first embodiment, when the rotation of reels 3L, 3C, and 3R in the main game stops, a sub-flag for entering the advantageous section (see Figure 7(a)) is determined as secondary information (sub-flag) corresponding to the combination of symbols displayed at the stop. Then, in the performance section (advantageous section/normal gameplay), the pseudo-bonus transition lottery table (see Figure 7(c)) is referenced, and a lottery (pseudo-bonus transition lottery) is performed based on the random value and the sub-flag for entering the advantageous section, determining whether the result of the pseudo-bonus transition lottery is "win" or "loss". Note that "win" includes "win (current game)" and "win (next game)", but these will not be distinguished here.

If the main CPU 101 determines that it has not won the pseudo-bonus transition lottery, it terminates this subroutine. On the other hand, if it determines that it has won the pseudo-bonus transition lottery, the main CPU 101 randomly selects one of the lock effect numbers "1", "3", "5", and "6" (see Figure 36) (step S1363). Then, the main CPU 101 sets the lock effect start flag to ON (step S1364) and terminates this subroutine. As a result, the lock effect corresponding to lock effect number "1", "3", "5", or "6" is performed.

Although not shown in the diagram, even if the 1G consecutive draw (see Figure 7(d)) is won, one of the lock animation numbers "1," "3," "5," and "6" may be selected (the lock animation corresponding to lock animation number "1," "3," "5," or "6" will be performed). Furthermore, if the pseudo-bonus transition draw (and the 1G consecutive draw) is not won, one of the lock animation numbers "2" and "4" may be selected (the lock animation corresponding to lock animation number "2" or "4" will be performed).

<Execution of lock animation at the end of game>
Figure 65 is a flowchart showing the process for executing the game end lock effect in the main control circuit. Figure 66 is a flowchart showing the process for starting the game end lock effect in the main control circuit.

The game end lock animation execution process shown in Figure 65 is performed in the main control circuit 100 at step S16 (game end main animation control process) of Figure 23 (main processing).

In the process of executing the lock animation at the end of gameplay, the main CPU 101 first determines whether the lock animation start flag (see step S1364 in Figure 64) is set to ON (step S1381). If it determines that the lock animation start flag is not set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the lock animation start flag is set to ON, it executes the process for starting the lock animation at the end of the game (step S1382). Here, the process for starting the lock animation at the end of the game will be explained using Figure 66.

In the process for initiating the lock animation at the end of the game, the main CPU 101 first determines whether or not a replay has been awarded (step S1401). In this process, the main CPU 101 determines whether or not the combination of symbols displayed along the active lines is a combination of symbols related to a replay (see Figures 11 to 14).

If the main CPU 101 determines that a replay has been awarded, it executes a command generation and storage process for starting the lock animation upon replay award (step S1402). In this process, the main CPU 101 generates command data for starting the lock animation upon replay award and stores this data in the communication data storage area of the main RAM 103. The command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that a replay has been awarded and the lock animation is about to begin, enabling it to determine the timing for executing various animations.

Specifically, upon receiving the command data for starting the lock animation upon winning a replay, the sub-control circuit 200 sets animation data corresponding to the start of the lock animation when a replay is won. This allows, for example, a text image (bet request image) with a message such as "Please bet" (not shown in the diagram) to be displayed on the main display device 210, prompting the player to operate the bet button (MAX bet button 6a or 1 bet button 6b). While operating the bet button should not be necessary when a replay is won, the bet request image can surprise the player.

Next, the main CPU 101 determines whether a bet button (MAX bet button 6a or 1 bet button 6b) has been operated (step S1403). In this process, the main CPU 101 determines whether the bet switch 6S has been turned ON. If it determines that either the MAX bet button 6a or the 1 bet button 6b has been operated, the main CPU 101 terminates this subroutine.

On the other hand, if it is determined that neither the MAX bet button 6a nor the 1 bet button 6b has been operated, the main CPU 101 determines whether or not the start lever 7 has been operated (step S1404). In this process, the main CPU 101 determines whether or not the start switch 7S is in the ON state (see step S50 in Figure 25). If it is determined that the start lever 7 has not been operated, the main CPU 101 determines whether or not a predetermined time (for example, 30 seconds) has elapsed since the execution of the replay winning lock effect start command generation and storage process (since the bet request image has been displayed) (step S1405).

If the main CPU 101 determines that the predetermined time has not elapsed, it returns to step S1403. If it determines in step S1404 that the start lever 7 has been operated, or if it determines in step S1405 that the predetermined time has elapsed, the main CPU 101 sets the lock effect cancellation flag to ON (step S1406). The lock effect cancellation flag is used to cancel the lock effect. Afterward, the main CPU 101 sets the lock effect start flag to OFF (step S1407) and terminates this subroutine.

If the main CPU 101 determines in step S1401 that a replay has not been awarded, it executes a command generation and storage process for starting the lock animation when a non-replay combination is awarded (step S1408). In this process, the main CPU 101 generates command data for starting the lock animation when a non-replay combination is awarded and stores the generated command data in the communication data storage area of the main RAM 103. The command data for starting the lock animation when a non-replay combination is awarded, stored in the communication data storage area, is transmitted from the main control circuit 100 to the sub-control circuit 200 in the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that a combination other than a replay has been awarded and the lock animation will begin, and to determine the timing for executing various animations.

Specifically, upon receiving the command data for starting the lock animation when a non-replay combination is won, the sub-control circuit 200 sets animation data corresponding to the lock animation starting when a non-replay combination is won. This allows, for example, a text image ("Hit the Lever" image) with the message "Hit the Lever" (not shown in the diagram) to be displayed on the main display device 210, prompting the player to operate the start lever 7. While the player would normally need to operate the bet button before operating the start lever 7 when a non-replay combination is won, the "Hit the Lever" image can surprise the player.

Next, the main CPU 101 determines whether the start lever 7 has been operated (step S1409). In this process, the main CPU 101 determines whether the start switch 7S is in the ON state (see step S50 in Figure 25). If it determines that the start lever 7 has been operated, the main CPU 101 terminates this subroutine.

On the other hand, if the start lever 7 is not operated, the main CPU 101 determines whether a predetermined time (for example, 30 seconds) has elapsed since the execution of the command generation and storage process for starting the lock animation when a win occurs (i.e., after the "Hit the lever" image is displayed) (step S1410). If it determines that the predetermined time has not elapsed, the main CPU 101 returns to step S1409. On the other hand, if it determines that the predetermined time has elapsed, the main CPU 101 sets the lock animation cancel flag to ON (step S1411). The lock animation cancel flag is used to cancel the lock animation. After that, the main CPU 101 sets the lock animation start flag to OFF (step S1412) and terminates this subroutine.

The process for initiating the game-ending lock animation, performed in step S1382 of Figure 65, has been explained using Figure 66. Returning to the explanation of Figure 65,

After executing the process in step S1382, the main CPU 101 determines whether the lock effect cancellation flag is set to ON (step S1383). If it determines that the lock effect cancellation flag is set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the lock animation cancellation flag is not set to "on," it executes the processes in steps S1384 to S1390. These processes are similar to those in steps S1022 to S1028 of Figure 44, so their explanation is omitted here. Afterward, the main CPU 101 terminates this subroutine.

Based on the above, if it is determined that a lock animation will be performed in a unit game in which a replay is awarded, the bet button (MAX bet button 6a or 1 bet button 6b) is operated, causing reels 3L, 3C, and 3R to start rotating for the lock animation and the lock animation to be performed (see steps S1386 and S1388 in Figure 65). In the next unit game, after a random delay process (see step S1123 in Figure 50), reels 3L, 3C, and 3R rotate at the constant speed for the main game. On the other hand, while it was decided that a lock animation would be performed in a unit game where a replay was awarded, if the bet button (MAX bet button 6a or 1 bet button 6b) is not operated within a predetermined time after the bet request image is displayed, or if the start lever 7 is operated, the lock animation (rotation of reels 3L, 3C, and 3R for the lock animation) will not be performed. Instead, in the next unit game, after the normal acceleration process (see step S1125 in Figure 50), the rotation of reels 3L, 3C, and 3R will return to the constant speed rotation used for the main game.

Furthermore, in the process for initiating the lock animation at the end of a game as shown in Figure 66, if the start lever 7 is operated without the bet button (MAX bet button 6a or 1 bet button 6b) being operated, the game proceeds to the next unit game. In this case, the operation of the start lever 7 in the next unit game may be omitted. That is, if the judgment result of step S1404 in Figure 66 is "YES", the system may be configured so that the judgment result of step S50 in Figure 25 is "YES" without waiting for the start lever 7 to be operated in the next unit game. However, unlike the process for initiating the lock animation at the end of a game as shown in Figure 66, the system may be configured so that the game does not proceed to the next unit game unless the bet button (MAX bet button 6a or 1 bet button 6b) is operated. Furthermore, even if the game proceeds to the next unit round when the bet button (MAX bet button 6a or 1 bet button 6b) is not pressed, the system may be configured to only proceed to the next unit round after a considerably long period of time (for example, 1 minute) when the bet button (MAX bet button 6a or 1 bet button 6b) has not been pressed.

Furthermore, if it is determined that a lock animation will be performed in a unit game in which a role other than a replay is won, the start lever 7 will be operated to start the rotation of reels 3L, 3C, and 3R for the lock animation (see steps S1386 and S1388 in Figure 65), and in the next unit game, after a random delay process (see step S1123 in Figure 50), the rotation of reels 3L, 3C, and 3R will return to the constant speed rotation for the main game. On the other hand, if it is determined that a lock animation will be performed in a unit game in which a role other than a replay is won, but the start lever 7 is not operated within a predetermined time after the "Hit the lever" image is displayed, the lock animation (rotation of reels 3L, 3C, and 3R for the lock animation) will not be performed, and in the next unit game, after a normal acceleration process (see step S1125 in Figure 50), the rotation of reels 3L, 3C, and 3R will return to the constant speed rotation for the main game. Furthermore, the system may be configured so that the game does not proceed to the next unit of play unless the start lever 7 is operated, or it may be configured so that the game only proceeds to the next unit of play after a considerably long period of time (for example, 1 minute) has passed without the start lever 7 being operated.

<Stop button illumination control processing during simulated gameplay>
Although not shown in the diagram, the main control circuit 100 performs a stop button illumination control process during simulated gameplay. Specifically, the main CPU 101 performs the stop button illumination control process during simulated gameplay after executing the process in step S1243 of Figure 57. As a result, for example, the illumination patterns of each stop button 8L, 8C, and 8R change. This will be explained in detail below.

Each stop button 8L, 8C, and 8R has a similar configuration, comprising a stop button cover with a pressable portion accessible to the player, and a stop button LED positioned recessed beyond the stop button cover. The stop button LED is a full-color LED capable of emitting multiple colors, including red, blue, and green. The stop button cover is made of a translucent material, and the light emitted from the stop button LED passes through the cover and is emitted to the outside of the pachislo machine 1, making it visible to the player.

In this embodiment, the system is configured to illuminate the LEDs for the stop buttons 8L, 8C, and 8R during simulated gameplay. Specifically, in step S1242 of Figure 57, the main CPU 101 controls the system so that the LEDs for all stop buttons 8L, 8C, and 8R light up. Furthermore, in step S1244 of Figure 57, the main CPU 101 controls the system so that the LED for the stop button 8 that was operated (or the stop button 8 that was deemed to have been operated even though the operation was omitted) turns off. Alternatively, instead of step S1244, the system may control the system to turn off the LED for the stop button 8 that was operated (or the stop button 8 that was deemed to have been operated even though the operation was omitted) in step S1249 if it is determined that the controlled reel has stopped.

Furthermore, the main CPU 101 may control the illumination of the stop button LEDs for valid stop buttons 8L, 8C, and 8R so that the LEDs emit light in a specific color (for example, red). The main CPU 101 may also control the illumination of the stop button LED for the currently operated stop button 8 (or a stop button 8 that was deemed to have been operated even though the operation was omitted) so that it emits light in a specific color (for example, red).

In this case, if it has been decided that a bonus will be awarded to the player (for example, if the player wins the pseudo-bonus transition lottery (AT lottery)), the system may be controlled to illuminate the stop button LED with a higher probability than if it has not been decided that the bonus will be awarded (for example, if the player does not win the pseudo-bonus transition lottery (AT lottery)). Furthermore, if it has been decided that a bonus will be awarded to the player (for example, if the player wins the pseudo-bonus transition lottery (AT lottery)), the system may be controlled so that the probability of the stop button LED illuminating with a specific color (for example, red) is higher than the probability of it illuminating with a predetermined color (for example, blue).

This allows the player to sense the level of expectation for the simulated game through the color of the LED light emitted by the stop buttons. Such control can be performed individually for the three stop buttons 8L, 8C, and 8R. For example, if all three stop buttons 8 light up in a specific color (e.g., red), the player's expectation can be greatly heightened, while if only one stop button 8 lights up in a specific color (e.g., red), the player's expectation can be relatively reduced.

The above describes a presentation in which the lighting patterns of the stop buttons 8L, 8C, and 8R change. However, the lighting patterns of the start lever 7 and the bet buttons (MAX bet button 6a and 1 bet button 6b) may also be changed. For example, the start lever 7, and the MAX bet buttons 6a and 1 bet buttons 6b, may each be equipped with a translucent cover and LEDs, similar to the stop buttons 8. The cover of the start lever 7 can be a spherical portion that can be grasped by the player. For example, the LED of the start lever 7 may be lit when the "Pull the lever" image described above is displayed on the main display device 210, or the LEDs of the MAX bet buttons 6a to 1 bet buttons 6b may be lit when the bet request image described above is displayed on the main display device 210.

Furthermore, the expected outcome of the simulated game may be indicated to the player through the color of the LEDs on the start lever 7 to the bet button. For example, if it has been decided that the player will receive a reward (for example, if they win the simulated bonus transition lottery (AT lottery)), the LEDs on the start lever 7 to the bet button may be controlled to light up in a specific color (for example, red) with a higher probability compared to when it has not been decided that the player will receive a reward (for example, if they do not win the simulated bonus transition lottery (AT lottery)). Also, if it has been decided that the player will receive a reward (for example, if they win the simulated bonus transition lottery (AT lottery)), the LEDs on the start lever 7 to the bet button may be controlled to light up in a specific color (for example, red) with a higher probability than when they light up in a predetermined color (for example, blue).

The LEDs provided on the stop button 8, start lever 7, MAX bet button 6a, and 1 bet button 6b may be controlled by the main control circuit 100 or by the sub-control circuit 200. If the LEDs are controlled by the sub-control circuit 200, the main CPU 101 should generate command data corresponding to the change in the LED's illumination pattern and transmit the generated command data to the sub-control circuit 200. Furthermore, in the main game, a visual effect of changing the LED's illumination pattern may be implemented, similar to the simulated game.

<Backlight effect>
As described in the first embodiment, each reel 3L, 3C, and 3R is equipped with a light source (reel lamp) at a position where the pattern can be seen from the main display window 4, and at least when each reel 3L, 3C, and 3R is rotating, they are illuminated from the inside with a constant brightness to ensure the visibility of the pattern.

In this embodiment, a backlight effect is performed using such reel lamps (reel backlights). Although not shown in the diagram, each reel 3L, 3C, and 3R is equipped with multiple LEDs (reel illumination LEDs) as reel backlights. These reel illumination LEDs are positioned inside the reel bodies of each reel 3L, 3C, and 3R so that they can individually illuminate each of the nine symbols displayed within the frame of the main display window 4.

In the following, the LED for reel illumination that can illuminate the upper area of the left reel 3L will be called the upper left reel illumination LED, the LED for reel illumination that can illuminate the middle area of the left reel 3L will be called the left middle reel illumination LED, the LED for reel illumination that can illuminate the lower area of the left reel 3L will be called the lower left reel illumination LED, the LED for reel illumination that can illuminate the upper area of the middle reel 3C will be called the middle upper reel illumination LED, the LED for reel illumination that can illuminate the middle area of the middle reel 3C will be called the middle middle reel illumination LED, the LED for reel illumination that can illuminate the lower area of the middle reel 3C will be called the middle lower reel illumination LED, the LED for reel illumination that can illuminate the upper area of the right reel 3R will be called the upper right reel illumination LED, the LED for reel illumination that can illuminate the middle area of the right reel 3R will be called the right middle reel illumination LED, and the LED for reel illumination that can illuminate the lower area of the right reel 3R will be called the lower right reel illumination LED.

Multiple LEDs are provided for each of the following reel illuminations: the upper left reel illumination LED, the middle left reel illumination LED, the lower left reel illumination LED, the upper center reel illumination LED, the middle center reel illumination LED, the lower center reel illumination LED, the upper right reel illumination LED, the middle right reel illumination LED, and the lower right reel illumination LED. This allows for complex backlighting patterns on each reel (3L, 3C, 3R).

The backlight effect is achieved during simulated gameplay by turning off the LEDs for reel illumination as each reel (3L, 3C, 3R) stops. Specifically, when the main CPU 101 starts the rotation of each reel (3L, 3C, 3R) during simulated gameplay (see step S1206 in Figure 55 and step S1386 in Figure 65), it controls the LEDs for the upper left reel illumination, the middle left reel illumination, the lower left reel illumination, the upper middle reel illumination, the middle middle reel illumination, the lower middle reel illumination, the upper right reel illumination, the middle right reel illumination, and the lower right reel illumination.

Then, when the main CPU 101 determines that the controlled reel has stopped in step S1249 of Figure 57, it controls the reel illumination LEDs capable of illuminating areas not located on the active line, among the reel illumination LEDs capable of illuminating the upper area of the controlled reel, the reel illumination LEDs capable of illuminating the middle area of the controlled reel, and the reel illumination LEDs capable of illuminating the lower area of the controlled reel, to turn off. For example, suppose the active line is the center line and the controlled reel is the left reel 3L. In this case, the main CPU 101 controls the reel illumination LEDs to turn off the upper left reel illumination LED and the lower left reel illumination LED, while the left middle reel illumination LED remains lit. When turning off the reel illumination LEDs capable of illuminating areas not located on the active line, it is possible to turn off all of the multiple LEDs provided as such reel illumination LEDs, or to turn off some of the multiple LEDs.

As a result, the visibility of symbols that stop in areas not located on the active lines is reduced, but the visibility of symbols that stop in areas located on the active lines is ensured. For example, in the lock effect corresponding to lock effect number "3" (see Figure 36), in the state shown in Figure 39(b), with respect to the right reel 3R, the visibility of "BAR" and "Replay" is reduced, while the visibility of "Red 7" is ensured. In the state shown in Figure 39(c), the right reel 3R is the same as in Figure 39(b), and with respect to the middle reel 3C, the visibility of "Watermelon" and "Yellow Blank" is reduced, while the visibility of "Red 7" is ensured. In the state shown in Figure 39(d), the right reel 3R and middle reel 3C are the same as in Figure 39(c), and with respect to the left reel 3L, the visibility of "White Blank 1" and "Watermelon" is reduced, while the visibility of "Red 7" is ensured. Therefore, even if some of the LEDs used for reel illumination turn off, the player can still clearly recognize that the "Red 7" symbol has lined up.

Furthermore, when turning off the reel illumination LEDs that can illuminate areas not located on the active line, it is desirable to configure the system so that the visibility of the patterns in the areas located on the active line does not decrease as a result of turning off these LEDs. For example, it is advisable to use a structure that includes partitions or the like between adjacent areas so that the visibility of the patterns in each area is not interfered with by the lighting patterns of the reel illumination LEDs in other areas.

Furthermore, the reel illumination LEDs capable of illuminating areas not located on the active line may be turned off, and then turned on and off again. In this case, the LED lighting pattern may be used to suggest to the player the expected outcome of the simulated game. For example, if it has been decided that a reward will be given to the player (e.g., if the player wins the simulated bonus transition lottery (AT lottery)), the LEDs may be controlled to light up in a specific pattern with a higher probability compared to when it has not been decided that a reward will be given (e.g., if the player does not win the simulated bonus transition lottery (AT lottery)). Also, if it has been decided that a reward will be given to the player (e.g., if the player wins the simulated bonus transition lottery (AT lottery)), the LEDs may be controlled to light up in a specific pattern with a higher probability than the probability of them lighting up in a predetermined pattern.

The LEDs for reel illumination may be controlled by the main control circuit 100 or by the sub-control circuit 200. If the LEDs for reel illumination are controlled by the sub-control circuit 200, the main CPU 101 should generate command data corresponding to the change in the lighting pattern of the LEDs and transmit the generated command data to the sub-control circuit 200. Furthermore, in the main game, a visual effect of changing the lighting pattern of the LEDs for reel illumination may be implemented, similar to the simulated game.

<Internal configuration (memory map) of main ROM and main RAM>
Next, the internal configuration of the main ROM 102 and main RAM 103 included in the main control circuit 100 (hereinafter referred to as the "memory map") will be explained with reference to Figures 67A to 67C. Figure 67A shows the memory map of the entire memory, Figure 67B shows the memory map of the main ROM 102, and Figure 67C shows the memory map of the main RAM 103.

In the memory map of the entire memory of the main control circuit 100, as shown in Figure 67A, the memory area of the main ROM 102, the memory area of the main RAM 103, the built-in register area, and the XCS decode area are arranged at predetermined addresses in this order, with unused areas in between, starting from the beginning of the address range (0000H).

In the memory map of the main ROM 102, as shown in Figure 67B, the program area, data area, unspecified area, trademark record area, program management area, and security setting area are arranged in this order at predetermined addresses, starting from the beginning (0000H) of the main ROM 102's address range.

The program area stores control programs for various processes executed by the main CPU 101 in control processes related to the gameplay of the game performed by the player. The data area stores various data used by the main CPU 101 in control processes related to the gameplay of the game performed by the player (for example, data tables such as the internal lottery table, data for sending various control commands to the sub-control circuit 42, etc.). In other words, the game ROM area (game storage area), consisting of the program area and the data area, stores various programs and data necessary for control processes related to the gameplay of the game (processes related to gameplay) actually performed by the player in the arcade.

Furthermore, the non-specified area stores control programs and data for various processes that do not directly affect the gameplay of the game performed by the player (processes that do not affect gameplay). For example, programs and data used in the certification test (test firing test) of Pachislo 1, control programs and data used for checksum generation during power outages and checksum checks during power restoration, and anti-fraud programs and their necessary data are stored in the non-specified area.

In the memory map of the main RAM 103, as shown in Figure 67C, the game-use RAM area (predetermined storage area, game-use temporary storage area) and the non-specified RAM area (non-specified temporary storage area) are arranged in this order at predetermined addresses, starting from the beginning of the main RAM 103's address range (F000H).

The game's RAM area includes a work area and a stack area for temporarily storing various data, such as internal winning combinations, determined by the execution of control programs related to the game's gameplay performed by the player. Each of these data types is then stored in the work area at a predetermined address within the game's RAM area.

Furthermore, the non-standard RAM area includes a non-standard work area, which serves as a workspace for various processes performed by the player that do not directly affect the gameplay of the game, and a non-standard stack. In this embodiment, various processes performed by the player that do not directly affect the gameplay of the game, such as sum check processing, are executed using this non-standard RAM area.

As described above, in the pachislo machine 1 of this embodiment, various programs and data (tables) used for various processes that do not directly affect the gameplay of the game performed by the player are stored in an unspecified ROM area (unspecified storage area) located at an address different from the game ROM area within the main ROM 102. Furthermore, these various processes that do not directly affect the gameplay of the game performed by the player are performed using an unspecified RAM area located at an address different from the game RAM area within the main RAM 103.

In this configuration of the main ROM 102, programs and data unnecessary for the actual gameplay performed by the player can be placed in the ROM area (non-specified ROM area), which was previously prohibited under conventional regulations. Therefore, this embodiment avoids straining the capacity of the game ROM area.

<Test firing signal control processing (non-standard)>
Although not shown in the diagram, the main control circuit 100 performs test firing signal control processing (unspecified) in periodic interrupt processing (see Figure 32). After executing the process in step S208 of Figure 32, the main CPU 101 executes the test firing signal control processing (unspecified). In this process, the main CPU 101 performs control processing when outputting various test signals to the test machine via the first interface board 301 and the second interface board 302 for the test machine (see Figure 3).

Specifically, the main CPU 101 saves the address of the stack area in the main RAM 103, sets the address of the non-standard stack area in the stack pointer (SP), and saves the data of all registers. Then, the main CPU 101 processes signals output to the test machine via the first interface board 301 or the second interface board 302, including the rotation control signals (drive signals) for each reel, the ON/OFF signals (test signals) for the bonus (special prize), and control signals corresponding to the state of the condition device signal control flags. Finally, the main CPU 101 restores the data of all saved registers and sets the address of the saved stack area in the stack pointer (SP).

Such test firing signal control processing (non-standard) is performed using the non-standard work area of the main RAM 103 (see Figure 67C). Note that test firing signal control processing (non-standard) is also performed at times other than during test firing (after the pachislo machine 1 is installed in the amusement parlor), but in this case, since the main control board 71 is not connected to the test machine via the first interface board 301 or the second interface board 302 for the test machine, various test signals are generated but not output.

As described in the first embodiment, it is possible to configure the system to output a test signal (simulated game signal) during simulated gameplay so that the test machine can recognize that simulated gameplay is in progress. The control processing for outputting the simulated game signal may be performed in the test firing signal control processing (outside the specified area). In this case, the control processing for outputting the simulated game signal will be executed using the out-of-specified work area of the main RAM 103 (see Figure 67C).

Furthermore, as described in the first embodiment, the first interface board 301 for the test machine may, upon receiving a simulated game signal, output a signal for controlling the progress of the simulated game to the main control board 71, thereby allowing the simulated game to proceed on the main control board 71 side (i.e., the first interface board 301 for the test machine may be equipped with a simulated game progression function). In this case, the system may be configured so that the simulated game signal is input from the main control board 71 to the second interface board 302 for the test machine, and the simulated game signal is input from the second interface board 302 to the first interface board 301 for the test machine. Then, by transmitting a signal (stop signal) for controlling the progress of the simulated game (a stop signal) from the first interface board 301 to the main control board 71, it is possible to configure the system so that each reel 3L, 3C, and 3R stops (simulates stopping) during the simulated game. This allows for smooth progress of the test firing.

Furthermore, when a replay is awarded and a simulated game is played (see Figure 66), it is possible to configure the system to output a test signal (cancellation signal) so that the test machine can recognize that the replay has been awarded and cancel the game. In this case, the main control board 71 may output a cancellation signal (a signal prompting the operation of the bet button) to the test machine via the first interface board 301 (second interface board 302) for the test machine, or the main control board 71 may input a signal to the first interface board 301 (second interface board 302) for the test machine indicating that a replay has been awarded and a simulated game is being played, and then the first interface board 301 (second interface board 302) for the test machine may output a cancellation signal to the test machine. Subsequently, by outputting a signal corresponding to the bet being made (bet signal) to the test machine, the next game can be started, and the test firing test can proceed smoothly. The control processing for outputting such signals can also be configured to be performed in the test firing signal control processing (outside of the specified limits). Furthermore, a scenario where a replay is awarded and a simulated game is played can be adopted where the combination of symbols displayed on reels 3L, 3C, and 3R outside the active payline is "bell" - "bell" - "bell," but the winning combination is a replay.

The above describes a pachislo machine 1 according to the third embodiment as one embodiment of the present invention.

[A modified example of the first gaming machine]
Next, with reference to Figures 68 to 80, further modifications (extensions) of the first gaming machine described in the first embodiment will be explained. Note that some or all of the specifications and functions described as modifications of the first gaming machine in this embodiment can be applied to other gaming machines described in this embodiment, and some or all of the specifications and functions described as other gaming machines in this embodiment can be applied to modifications of the first gaming machine in this embodiment. In other words, the invention according to this embodiment can be formed by appropriately combining these.

In the first gaming machine described above, when a predetermined winning combination (e.g., a sequenced bell) is determined as a winning combination, the AT-related processing may be made favorable if a specific stopping operation (e.g., first left stop) is performed, and unfavorable if the stopping operation is not performed in that specific manner.

Furthermore, in the first gaming machine described above, as an example of applying the specifications, when a predetermined role is determined as a winning role, if a stop operation is performed in a specific manner, SR1 is set as SR information, while if the stop operation is not performed in the said specific manner, SR2 is set as SR information. When SR1 is set, the ceiling points are always reduced by 1, whereas when SR2 is set, the ceiling points may not be reduced by 1. This configuration allows for the AT-related processing to be made advantageous or disadvantageous.

SR information is configured to identify whether a player played using a specific method. Specifically, in games where a player wins a push-order bell, it identifies whether the stop operation was performed on the left reel as the first stop (i.e., whether the first stop operation was performed on the first reel). If the stop operation was performed on the left reel as the first stop in a game where a push-order bell was won, "SR1" is set as the SR information. On the other hand, if the stop operation was performed on a reel other than the left reel as the first stop in a game where a push-order bell was won, "SR2" is set as the SR information. Furthermore, in games where a win other than a push-order bell was won, "SR0" is set regardless of the order of the pushes.

However, these specifications can also be applied to gameplay different from that described above, and there is room for various further improvements beyond those explained in the section on the first gaming machine. Therefore, these modifications will be explained in this section.

Furthermore, in this specification, the expected value of the game value awarded is lower when a specific type of stop operation is performed, while it is higher when the specific type of stop operation is not performed. As a result, the overall characteristics of the game machine are such that awarding game value is disadvantageous when a specific type of stop operation is performed, while awarding game value is unilaterally advantageous when the specific type of stop operation is not performed.

Therefore, in this modified example, it is explained that, regardless of whether a predetermined role is determined as the winning role, when the predetermined control conditions are met, control is performed that prioritizes decisions related to AT (AT-related processing) when a stop operation is performed in a specific manner, and control that prioritizes decisions related to AT (AT-related processing) is not performed when a stop operation is not performed in a specific manner.

<Gameplay of the first gaming machine (modified version)>
First, the flow of gameplay in this modified example will be explained with reference to Figure 68. Figure 68 is a diagram showing an example of the transition flow of game states in the non-advantageous and advantageous sections in this modified example.

Similar to the first gaming machine described above, this modified version also includes both a non-advantageous period and an advantageous period as gameplay states (game intervals). Furthermore, while the first gaming machine included a "normal" (non-advantageous period) as a game state related to the gameplay characteristics of the non-advantageous period, this modification is also the same. The difference from the first gaming machine is that the advantageous period includes game states related to the gameplay characteristics of the CZ (Chance Zone), ST (Special Time), first bonus, and second bonus.

During the CZ (Chance Zone) and ST (Special Time) phases, the game is normally structured as a favorable period (performance phase). However, it is more advantageous than the normal phase (favorable period) because it is easier to transition to the AT (Attack Time) state (or, it is possible to decide whether or not to transition to the AT state under different conditions than the normal phase (favorable period)). Furthermore, during the first and second bonus phases, the game is structured as an increasing phase (AT state), and is basically the same as the pseudo-bonus phase in the first game machine described above. In this modified version, the ST phase and the second bonus phase constitute a continuous win zone in both game states. This will be explained later.

During normal gameplay (non-advantageous period), if it is determined that the game will transition to an advantageous period (winning the advantageous period transition lottery), the game will transition back to normal gameplay (advantageous period transition). In other words, the advantageous period begins. Furthermore, the advantageous period transition lottery may result in a decision to transition during a Challenge Zone (CZ) or the first bonus round, and if this decision occurs, the game may transition directly to the corresponding state.

During normal gameplay (advantageous period), if the conditions for transitioning to the CZ (Chance Zone) are met, the game transitions to the CZ (CZ transition conditions met). The CZ transition conditions may be configured such that, for example, a CZ transition lottery is held based on a set probability according to the winning combination, and the conditions are met when the lottery is successful. Alternatively, points may be awarded according to the winning combination (or the progress of the game period), and the conditions are met when the awarded points reach a predetermined value (a cycle is reached) (or when a CZ transition lottery is held upon reaching a cycle, and the conditions are met when the lottery is successful). In other words, it is sufficient to make it possible to decide whether or not to transition to the CZ for each predetermined trigger, and the above is merely an example.

Furthermore, if gameplay occurs during normal play (advantageous period) and the AT transition conditions are met, the game transitions to the first bonus round (AT transition conditions met). The AT transition conditions may be configured such that, for example, an AT transition lottery is held based on a set probability depending on the winning combination, and the conditions are met when the lottery is won; or an AT transition lottery is held when the aforementioned cycle is reached, and the conditions are met when the lottery is won (or an AT win is determined as a result of a part of the CZ transition lottery). Alternatively, the conditions may be configured such that the conditions are met when a set ceiling game count or CZ failure count reaches a predetermined value. In other words, it is sufficient to make it possible to decide whether or not to transition to the first bonus round for each predetermined trigger, and the above is merely an example.

In this modified version, the main gameplay route is to transition from normal mode (advantageous period) to the CZ (Challenge Zone), and then, if the AT (Attack Time) transition conditions are met during the CZ, transition to the first bonus round. Therefore, the probability of directly transitioning from normal mode (advantageous period) to the first bonus round is not necessarily high. Furthermore, if the AT transition conditions are met, the system may be configured so that in some cases, transition to the second bonus round is determined.

Furthermore, during normal gameplay (the advantageous period), decisions related to whether or not the conditions for transitioning to a Chance Zone (CZ) are met, or decisions related to whether or not the conditions for transitioning to an Attack Time (AT) are met, are configured such that the probability of these decisions differs depending on whether the current state is a favorable or unfavorable state. Specifically, if the current state is a favorable state, the aforementioned decisions are favored; if the current state is unfavorable, the aforementioned decisions are not favored.

For example, during normal gameplay (advantageous period), when the current state is a favorable state, the chances of winning the CZ transition lottery are increased compared to a non-favorable state. Conversely, when the current state is a non-favorable state, the chances of winning the CZ transition lottery are increased compared to a favorable state. Note that "increasing the chances of winning" includes cases where the lottery itself is not held (or, the lottery is held, but the winning value is set to "0," effectively making it impossible to win (or, the winning value is set to an extremely small value (e.g., "1"), making it practically impossible to win)).

Furthermore, for example, during normal play (advantageous period), when the current state is a favorable state, points are awarded more easily than in a non-favorable state, and when the current state is a non-favorable state, points are awarded less easily than in a favorable state. Note that "making it less likely to award points" includes cases where the awarding decision itself is not made (or the awarding decision is made, but the result is always "0," effectively resulting in no points being awarded (or the probability of the result being "1" or more is extremely low, practically making it almost impossible to award points)). Of course, it is also possible to create differences in ways such as, for example, when a "watermelon" is drawn, "5" points are awarded in a favorable state, but only "1" point is awarded in a non-favorable state. Also, for example, if 1 point is awarded per game, it is possible to create differences in ways such as the awarding process being performed in a favorable state, but not in a non-favorable state.

Furthermore, for example, during normal gameplay (advantageous period), when the current state is a favorable state, the chances of winning the AT transition lottery are increased compared to a non-favorable state. Conversely, when the current state is a non-favorable state, the chances of winning the AT transition lottery are increased compared to a favorable state. Note that "increasing the chances of winning" includes cases where the lottery itself is not held (or, while the lottery is held, the winning value is set to "0," effectively making it impossible to win (or, the winning value is set to an extremely small value (e.g., "1"), making it practically impossible to win)).

Furthermore, for example, during normal play (advantageous period), when the current state is a favorable state, decisions related to whether or not the CZ transition conditions are met are treated more favorably than in a non-favorable state, but decisions related to whether or not the AT transition conditions are met are treated the same as in a non-favorable state (i.e., no preferential treatment). Alternatively, during normal play (advantageous period), when the current state is a favorable state, decisions related to whether or not the AT transition conditions are met are treated more favorably than in a non-favorable state, but decisions related to whether or not the CZ transition conditions are met are treated the same as in a non-favorable state (i.e., no preferential treatment).

During the CZ (Challenge Zone), the game is designed to continue for a predetermined period (e.g., 16 games). If the conditions for transitioning to the AT (Attack Time) are met during this period, the game transitions to the first bonus round (CZ success/AT win). Conversely, if the conditions for transitioning to the AT are not met during this period, the game transitions back to normal mode (advantageous section) (CZ failure/AT non-win). The AT transition conditions during the CZ can be the same as those in normal mode (advantageous section), or they can be the same as those in the ST (Special Time) mode described later.

Furthermore, regarding the preferential control described later, for example, if the same AT transition conditions as in normal mode (advantageous period) are adopted during the CZ (Challenge Zone) (or at least different AT transition conditions than those in ST (Special Time) are adopted), the same preferential control as in normal mode (advantageous period) may be applied. Similarly, if the same AT transition conditions as in ST (or at least different AT transition conditions than those in normal mode (advantageous period) are adopted), the same preferential control as in ST may be applied.

Furthermore, the conditions for transitioning to the AT during the CZ (Challenge Zone) can be different from those described above. For example, during the CZ, in the first half (e.g., games 1-10), an expectation level lottery is held at predetermined triggers (e.g., each time a specific role is hit, or each game) to determine (or increase) the AT win expectation level. In the second half (e.g., games 11-15), an AT lottery is held at predetermined triggers (e.g., each time a specific role is hit, or each game) using the determined AT win expectation level. If a win is achieved, the AT win (CZ success) is announced in the final game (e.g., game 16), and the game transitions to the first bonus round from the next game. If a win is not achieved, the AT failure (CZ failure) is announced in the final game (e.g., game 16), and the game returns to normal mode (advantageous section) from the next game.

In this case, for example, during the first half of the period, if the current state is favorable, the probability of winning the expected value lottery should be increased compared to the unfavorable state. Conversely, if the current state is unfavorable, the probability of winning the expected value lottery should be decreased compared to the favorable state. Similarly, during the second half of the period, if the current state is favorable, the probability of winning the AT lottery should be increased compared to the unfavorable state. Conversely, if the current state is unfavorable, the probability of winning the AT lottery should be decreased compared to the favorable state. The manner of "decreasing the probability of winning" is the same as described above.

The specified period during the CZ is merely an example, and the period is not limited to those described above. For example, if game count management is used, the period may be a fixed period (e.g., 32 games) or a variable period (e.g., determined by lottery between 16 and 32 games). Furthermore, for example, the number of AT lotteries may be specified (or determined by lottery), and the CZ may continue until this specified number of AT lotteries (e.g., 3 times) have been completed. Alternatively, for example, a specified number of continuation lotteries (e.g., 3 times) may be held, and if a non-winning draw occurs in any of the continuation lotteries, the CZ may end in failure; if all continuation lotteries result in wins, the CZ may end in success.

Furthermore, during the CZ (Challenge Zone), the final decision on whether or not to transition to the first bonus round can be made based on one or more draws or determination results, and the manner of this decision is not limited to those described above. Also, the timing of the transition from the CZ to the first bonus round is not limited to those described above. For example, the transition to the first bonus round may be made from the game following the game in which the AT (Attack Time) transition conditions are met, without waiting for the final game.

Furthermore, while the CZ (Chance Zone) is generally structured as a normal advantageous period without an AT (Attack Time) state, it may be configured to be in an AT state (increased period) for at least a certain period (for example, from the start until the ordered bell symbol is hit three times), or the entire period may be structured as an increased period in an AT state.

During the first bonus, the game is in an AT (Action Time) state (increase section) that can continue for a predetermined period (e.g., 20 games). Once the predetermined period of play is completed, the game transitions to a continuous bonus zone (the condition for ending the first bonus is met). During the first bonus, a second bonus stock lottery is held at least every predetermined trigger (e.g., every time a specific role is won, or every game played). If a win occurs, the value of the second bonus counter is increased by 1. When the predetermined period of play is completed, if the value of the second bonus counter is 1 or greater, the value of the second bonus counter is decreased by 1 before transitioning to the second bonus. If the value of the second bonus counter is 0, the game transitions to the ST (Special Time) state.

The specified period during the first bonus is merely an example, and the period is not limited to those described above. For example, if the game count is used for management, the period may be a fixed period (e.g., 25 games) or a variable period (e.g., one of 20, 25, or 30 games determined by lottery). Furthermore, the period may be managed by the number of times navigation prompts appear when a push-order bell is won (e.g., ending when the navigation prompt count reaches "10") or by the difference in the number of tokens won (e.g., ending when the difference in tokens exceeds "100").

During the second bonus, the game is in an AT (Action Time) state (increase section) that can continue for a predetermined period (e.g., 10 games). Once the gameplay for the predetermined period is complete, one set ends. During the second bonus, a second bonus stock lottery is held at least every predetermined trigger (e.g., every time a specific role is won, or after each game). If this lottery is successful, the value of the second bonus counter is increased by 1. When the gameplay for the predetermined period is completed (when one set ends), if the value of the second bonus counter is 1 or greater (including values added during the first bonus or ST), the value of the second bonus counter is decreased by 1 before the next set of the second bonus begins. At this time (including the initial transition from the first bonus or from ST), a predetermined period may be determined by lottery (e.g., one game count from 10, 20, or 40 games), and the predetermined period may be set according to the lottery result.

Furthermore, during the second bonus, if the value of the second bonus counter is 0 when the prescribed period of gameplay is completed (when one set is finished), the game transitions to the ST (Special Time) mode (the condition for ending the second bonus is met). Note that, as described in the explanation for the first bonus, various management methods can be used for managing the prescribed period during the second bonus.

During the ST (Special Time) mode, the game is configured to continue for a predetermined period (e.g., 16 games). If the conditions for transitioning to the second bonus are met during this period, the game transitions to the second bonus mode (conditions for transitioning to the second bonus are met). Conversely, if the conditions for transitioning to the second bonus are not met during this period, the continuous bonus zone ends (i.e., the advantageous period ends). Initialization processing is performed at the end of the advantageous period, and the game transitions to normal mode (non-advantageous period) (continuous bonus zone ends).

During ST (Special Time), the game is basically structured as a normal advantageous period, which is not an AT (Automatic Trigger) state. At predetermined triggers (for example, each time a specific role is won, or each game), an AT transition lottery (second bonus transition lottery) is held based on a winning probability set according to the winning role and the type of lottery MAP described later. Additionally, a second bonus stock lottery is held at predetermined triggers (for example, each time a specific role is won, or each game). Furthermore, the probability of these lotteries (determinations) differs depending on whether the current state is a favorable or unfavorable state. Specifically, if the current state is a favorable state, the above determination is favorable; if the current state is unfavorable, the above determination is not favorable. This will be explained in detail later using Figure 70.

During ST mode, if the player wins the second bonus transition lottery, they will transition to the second bonus mode from the next game (or when the specified period of play is completed) (second bonus transition condition met). Furthermore, if the specified period of play is completed without winning the second bonus transition lottery, and the value of the second bonus counter is 1 or greater, the value of the second bonus counter is deducted by 1 before transitioning to the second bonus mode (second bonus transition condition met). On the other hand, if the specified period of play is completed without winning the second bonus transition lottery, and the value of the second bonus counter is also 0, the continuous bonus zone ends as described above, and the player transitions to normal mode (non-advantageous period) (continuous bonus zone ends). Note that various management methods can be used for managing the specified period during ST mode, similar to those described in the explanation for CZ mode.

Thus, in this modified version, after the end of the first bonus round, it is possible to move back and forth (loop) between the second bonus round and the ST (Special Time) round. While the ST round itself is not structured as an increasing period, it is configured to have a high probability of transitioning to the second bonus round (making consecutive bonuses more likely), thus creating a highly engaging consecutive bonus zone for the player. Furthermore, since consecutive bonuses (extensions) can occur during the second bonus round alone, this also enhances the overall enjoyment of the game.

Furthermore, it is possible to create multiple such consecutive win zones. For example, the aforementioned consecutive win zone could be designated as the first consecutive win zone, and if a specific transition condition is met in this first consecutive win zone, the player could transition to a more advantageous second consecutive win zone. In this case, the specific transition condition could be, for example, met when a specified number of second bonuses (e.g., a total of 5 sets) are executed in the first consecutive win zone. Alternatively, it could be met when a specified period (e.g., a total of 100 games) of second bonuses are executed in the first consecutive win zone. Of course, these are just examples, and various conditions that can be met depending on the player's gameplay results can be adopted.

Furthermore, regarding the configuration that makes the second bonus round more advantageous, for example, in the first bonus round, the probability of the second bonus round continuing (looping) is set to approximately 50-75% in total, while in the second bonus round, this probability is set to approximately 85% in total, making it relatively easier to transition into the second bonus round (making it harder for the bonus round to end). Alternatively, for example, in the first bonus round, the prescribed period of 40 games during the second bonus round is determined with a predetermined probability, while in the second bonus round, this is also made more likely to be determined. Or, in the first bonus round, the probability of winning the second bonus stock lottery is predetermined, while in the second bonus round, this is also made more likely to be won, thus making the duration of each second bonus round more advantageous. Of course, these are just examples, and any configuration that ultimately benefits the player can be adopted.

Although not shown in the diagram, various limit processes are activated in this modified version as well. For example, if the value of the advantageous section game counter reaches "1420" or higher, or if the value of the advantageous section payout counter reaches "2064" or higher, during the first bonus, second bonus, or ST (Special Time) state, the game transitions to the ending state. The ending state is configured such that navigation for the push-order bell can occur until the payout limiter or the game count limiter is activated. If either of these limiters is activated during the ending state, the advantageous section is forcibly terminated, and the game transitions to normal mode (non-advantageous section).

Furthermore, in either state, if the value of the advantageous section game count counter reaches "1500" or higher, the game count limiter will activate. Similarly, if the value of the advantageous section payout counter reaches "2400" or higher, the payout limiter will activate. In these cases, as described above, the advantageous section will be forcibly terminated, the initialization process for the end of the advantageous section will be performed, and the game will transition to normal mode (non-advantageous section).

Furthermore, since the game count limiter can only be activated by the consumption of games, there is a possibility that a player who starts playing just before the limiter is activated (and the limiter activates immediately) may lose interest. Also, depending on the contents of the advantageous section transition lottery, it may be more advantageous for the player to end the advantageous section and transition to the non-advantageous section. Therefore, frequently ending the advantageous section may not contribute to the proper management of gambling. For this reason, from this perspective, it may be acceptable to configure the system to only include a payout limiter and omit the game count limiter.

<Example of preferential control for the first gaming machine (modified version) (during normal play)>
Next, with reference to Figure 69, an example of preferential control during normal operation (favorable period) in this modified example will be explained. Note that Figure 69 shows a general flowchart illustrating an example of the process in order to explain the example of preferential control during normal operation (favorable period). Therefore, the specific control process in this preferential control is not necessarily limited to what is shown in Figure 69.

First, the main CPU 101 determines whether the preferential treatment counter is 1 or greater when the game starts (for example, when the start operation is performed) (S4001). The preferential treatment counter is used to manage whether the game is in a preferential or non-preferential state. At the start of the game, if the preferential treatment counter is 1 or greater, the game is controlled to be in a preferential state; if the preferential treatment counter is 0, the game is controlled to be in a non-preferential state.

If the main CPU 101 determines that the preferential treatment counter is 1 or greater (S4001 is YES), it sets the game state to the preferential treatment state (S4002). Next, it decrements the preferential treatment counter by 1 (S4003). After that, it moves the process to S4005.

On the other hand, if the main CPU 101 determines that the preferential treatment counter is not 1 or greater (i.e., it is 0) (S4001 is NO), it sets the state of the game to a non-preferential state (S4004). Then, the process moves to S4005.

Although not shown in Figure 69, when the game state is set to either a favorable or unfavorable state through the processing of S4001 to S4004, the main CPU 101 refers to the setting result and makes decisions related to the AT state (for example, during the first bonus), such as decisions related to whether the conditions for transitioning to the CZ (Chance Zone) are met or whether the conditions for transitioning to the AT (Attack Time) are met.

For example, if a favorable state is set, the main CPU 101 will perform processes such as conducting a CZ transition lottery or an AT transition lottery during the game. It will also perform processes such as awarding points or advancing the ceiling game count during the game. On the other hand, if a non-favorable state is set, the main CPU 101 will not perform processes such as conducting a CZ transition lottery or an AT transition lottery during the game. Furthermore, it will not perform processes such as awarding points or advancing the ceiling game count during the game. As stated above, the manner in which the favorable state is considered advantageous compared to the non-favorable state, or how the non-favorable state is considered disadvantageous compared to the favorable state, is not limited to these examples.

Next, the main CPU 101 determines whether the game stop operation was a left-first stop (S4005). That is, the main CPU 101 determines whether the game stop operation was performed in a specific manner. This determination may be performed when the first stop operation is performed, or after the third stop operation.

If the main CPU 101 determines that the game stop operation was a left-first stop (S4005 is YES), it performs a preferential counter addition lottery, and if the lottery is successful, it adds 1 to the preferential counter (S4006). After that, it terminates the process. On the other hand, if the main CPU 101 determines that the game stop operation was not a left-first stop (S4005 is NO), it terminates the process immediately.

In the preferential counter addition lottery, for example, a preferential counter addition lottery table is referenced, where the probability denominator is "65536," the lottery value that determines the "preferential counter addition by 1" result is assigned to "65535," and the lottery value that determines the "preferential counter not added" result is assigned to "1." The lottery is then performed based on the extracted random values. In this case, there is a "65535/65536" probability that the preferential counter will be added by 1, and a "1/65536" probability that the preferential counter will not be added. That is, in this modified example, even when a stop operation is performed at the left first stop during gameplay in a preferential state, there are cases where the value of the preferential counter is not added by 1.

The above configuration of the preferential counter addition lottery table is merely an example. For instance, the probability denominator could be set to "256," with "255" assigned to the lottery value determining the "preferential counter addition" result, and "1" assigned to the lottery value determining the "no preferential counter addition" result. In other words, the lottery could be conducted using a 1-byte random number instead of a 2-byte random number.

Furthermore, for example, the probability of determining "no preferential treatment counter added" may be increased beyond the above. For instance, using a single-byte random number as an example, the lottery value determining the "preferential treatment counter added by 1" result could be assigned "192" or "128," while the lottery value determining the "no preferential treatment counter added" result could be assigned "64" or "128." In other words, the probabilities should be set appropriately according to the degree of advantage of the preferential state (or the degree of disadvantage of the non-preferential state). This applies to other examples as well.

Furthermore, for example, the probability denominator could be set to "65536," with "65536" assigned to the draw value that determines the "preferential counter incremented by 1" result, and "0" assigned to the draw value that determines the "preferential counter not incremented" result. In other words, the draw process itself is performed, but if the game's stopping operation is a left-first stop, the preferential counter may be incremented by 1 in practice. Additionally, for example, in the S4005 process, if the main CPU 101 determines that the game's stopping operation is a left-first stop, the S4006 process may simply increment the preferential counter by 1, and no draw may be performed.

Furthermore, in the processing of S4005, if the main CPU 101 determines that the game stop operation was a left-first stop, processing in S4006 will set a preferential state for the next game. If the main CPU 101 determines that the game stop operation was anything other than a left-first stop, processing in the subsequent process (let's call it S4007) will set a non-preferential state for the next game. Such control may be performed without using a preferential counter.

Furthermore, for example, the probability denominator could be set to "65536," with "65534" assigned to the draw value determining the "preferential counter +1" result, "1" assigned to the draw value determining the "preferential counter +2" result, and "1" assigned to the draw value determining the "preferential counter not added" result. In other words, it may be possible to determine whether the preferential counter value increases by 2 or more in a single game, and whether the preferential state continues for multiple games depending on the result of a single game.

Thus, the main CPU 101, through processing S4005 and S4006, increments the preferential counter by 1 if the game's stopping operation is a left-first stop. This sets the preferential state for the next game (see S4001 and S4002). On the other hand, if the game's stopping operation is not a left-first stop, the preferential counter is not incremented. This sets the non-preferential state for the next game (see S4001, S4003, and S4004).

In other words, in this modified example, the preferential control described above ensures that if a player stops the reels with the left reel as the first stop, at least the next game will be in a preferential state. Therefore, if a player consistently stops the reels with the left reel as the first stop, they will essentially be playing in a preferential state throughout the game. On the other hand, if a player stops the reels with a reel other than the left reel as the first stop, at least the next game will be in a non-preferential state. Therefore, if a player consistently stops the reels with a reel other than the left reel as the first stop, they will essentially be playing in a non-preferential state throughout the game.

In the example described above, when a stop operation was performed in a specific manner, the preferential counter was updated in processing S4006 so that the next game would be in a preferential state. However, the control method for the preferential counter is not limited to this. For example, after processing S4003 or S4004 and before processing S4005, a process to increment the preferential counter by 1 may be performed. If S4005 is YES, the process ends as is. However, if S4005 is NO, a preferential counter subtraction lottery may be performed. If the lottery is successful, the preferential counter is subtracted by 1, and the process ends. In this case, for example, a preferential counter subtraction lottery table may be referenced, where "65535" is assigned to the lottery value that determines the lottery result of "subtracting 1 from the preferential counter" and "1" is assigned to the lottery value that determines the lottery result of "not subtracting from the preferential counter." The lottery may then be performed based on the extracted random value.

Furthermore, in this case, the preferential counter deduction lottery table may, for example, have a probability denominator of "65536," with "65534" assigned to the lottery value that determines the "preferential counter 1 deduction" result, "1" assigned to the lottery value that determines the "preferential counter 2 deduction" result, and "1" assigned to the lottery value that determines the "preferential counter no deduction" result. In other words, it may be possible to determine whether the non-preferential state continues for multiple games depending on the result of a single game, assuming that the preferential counter value may be effectively reduced by 2 or more in a single game.

In this modified version, the preferential control described above is configured to be performed regardless of which winning combination is determined, at least during normal play (the advantageous period). In other words, in this modified version, the preferential control described above is possible in all games played during normal play (the advantageous period). Furthermore, this also applies during the CZ (Chance Zone) if the system is configured to perform the same preferential control, and during the ST (Special Time) if the system is configured to perform the same preferential control. That is, in this modified version, the preferential control described above is possible at least when the system is not in AT (Attack Time) mode (during the first or second bonus).

However, it is also possible to implement the above-mentioned priority control even in AT mode. For example, if branching processing based on whether or not it is in AT mode could increase the control load, the above-mentioned priority control may be always executed. In this case, for example, when in AT mode, various decisions and draws can be performed without referring to the value of the preferential counter. Alternatively, in AT mode, a process that increments the preferential counter by 1 for each game may be performed as a unique process, so that the value of the preferential counter is always 1 or greater while in AT mode. In this case, when transitioning to ST mode, the initial value of the preferential counter should be set to "1".

Here, in the first gaming machine described above, there are push-order small wins, such as the "push-order bell," where the expected value of the game value awarded varies depending on the stopping operation pattern (swing order), and non-push-order wins (e.g., each replay win and other small wins) where the expected value of the game value awarded does not vary depending on the stopping operation pattern (swing order) other than the push-order small wins. In a game where a push-order small win is determined as the winning win, if the stopping operation is performed in a specific pattern (e.g., left first stop), the AT-related processing becomes advantageous, but the expected value of the game value awarded is lower, which is designated as an AT-favored swing order. If the stopping operation is performed in a pattern different from the specific pattern (e.g., anything other than left first stop), the AT-related processing becomes disadvantageous, but the expected value of the game value awarded is higher, which is designated as an acquisition-favored swing order (in other words, an AT-non-favored swing order). In this modified example, these swing orders are constructed in a different manner than described above.

Specifically, as described above, the overall characteristics of the gaming machine are such that if the stopping operation is performed in a specific manner, the granting of game value becomes unfavorable, while if the stopping operation is not performed in a specific manner, the granting of game value becomes unilaterally favorable. Therefore, regardless of the winning combination for each game, if the stopping operation is performed in a specific manner, it is treated as an AT-favored sequence (i.e., it can be controlled to a favorable state), and if the stopping operation is performed in a manner different from the specific manner, it is treated as an AT-non-favored sequence (i.e., it can be controlled to a non-favorable state). In other words, all combinations are subject to this preferential control.

However, since such preferential control is based on the premise that the game is played under the recommended playing conditions, bonus roles that, in principle, do not result in wins under the recommended playing conditions (for example, "F_BB") may be excluded.

Furthermore, so-called rare roles, such as "F_Cherry" or "F_Watermelon," which have a low probability of winning but offer a high expectation for the player, may be excluded. Regarding the exclusion of rare roles, for example, if a rare role is determined as a winning role while the current state is favorable, it may be excluded, while if a rare role is determined as a winning role while the current state is not favorable, it may not be excluded.

Furthermore, for example, if the current state is a favorable state and a rare role is determined as a winning role, it is possible to adopt a system where, if it is determined that the player will transition to a favorable state, for example by winning a CZ transition lottery or an AT transition lottery, the player is excluded from the calculation, while if it is not determined that the player will transition to a favorable state, the player is not excluded.

Furthermore, the system may be configured to only apply preferential control to regular roles. Note that "regular roles" here can be defined as all roles except bonus roles, as mentioned above, or as all roles except bonus roles and rare roles. Also, when the game progresses with a carryover of bonus roles (between flags), it can be defined as roles other than rare roles between flags. For example, overlapping roles such as push-order bells and bonus roles between flags, or overlapping roles such as replay roles and bonus roles between flags, may be treated collectively as "regular roles." It is also possible to define them in a different way. For example, it is possible to pre-determine which roles are subject to preferential control and which are not (regardless of role type), and define all roles subject to preferential control as regular roles. Note that roles subject to preferential control in this way are sometimes referred to as "penalty lottery" or similar terms.

Furthermore, for example, regarding the replay role, a button-press order replay could be introduced. This button-press order replay could be configured so that a specific symbol combination is displayed when the stop operation is performed in a specific manner, while the specific symbol combination is not displayed when the stop operation is not performed in a specific manner (however, in both cases, a re-spin is ultimately awarded). This button-press order replay and the button-press order minor role could be defined as normal roles, while other unassigned roles could be excluded.

<Example of preferential control for the first gaming machine (modified version) (during ST)>
Next, with reference to Figure 70, an example of preferential control during ST in this modified example will be explained. Figure 70 shows an overview of part of the game flow during ST in order to explain an example of preferential control during ST. Note that the method for controlling each game to either a preferential or non-preferential state can be the same as the method explained using Figure 69, or a different method can be adopted.

(Example of specifications during ST)
First, let's explain an example of the specifications during ST mode. As mentioned above, and as shown in Figure 70, ST mode is configured to continue for a predetermined period (for example, 16 games). This predetermined period is managed by the ST game counter, which is period management information. The value of the ST game counter is increased by 1 for each game, regardless of whether the stopping operation during the game is a standard stop (left first stop) or an irregular stop (other than left first stop) (in other words, regardless of whether it is controlled in a favorable state or a non-favorable state). That is, the game period (period management information) in ST mode progresses regardless of the order of plays. The ST game counter may also manage the corresponding information by subtraction updates.

Furthermore, for example, when the variable display unit is composed of three reels (left reel 3L, middle reel 3C, right reel 3R), more specifically, when the stopping operation is performed in the order of "left → middle → right", it is called "sequential pressing", and when the stopping operation is performed in the order of "left → right → middle", it is called "scissors pressing", etc. However, in the explanation of Figure 70 (and similarly when the left first stop is explained as "sequential pressing" elsewhere), the term "sequential pressing" is used to include both the left first stop (left → middle → right and left → right → middle). And, at least in this example, in the case of the left first stop, there is no particular difference between when the stopping operation is performed in the order of left → middle → right and when the stopping operation is performed in the order of left → right → middle (they are treated the same in terms of processing), and processing related to the preferential state is made possible at the time of the first stop. However, it is also possible to differentiate the processing of whether or not a preferential state is granted depending on whether the stopping operation is performed in the order of left → middle → right or left → right → middle. For example, if the stopping operation is performed in the order of left → middle → right, it may be treated as a recommended technique (a specific stopping operation) that grants a preferential state, while if the stopping operation is performed in the order of left → right → middle, at the second stop, it may be treated as a non-recommended technique (a stopping operation that does not result in a specific stopping operation), similar to an irregular press (middle as the first stop, right as the first stop).

Furthermore, a MAP game counter, which is lottery management information that manages the degree of advantage during ST (Special Time), is provided. The value of the MAP game counter is configured to increment by 1 if the stopping operation during the game is a standard press, and not increment if an irregular press is used. The value of the MAP game counter is used to set the lottery MAP, and generally, the larger the value, the higher the probability of winning the second bonus transition lottery. In other words, the degree of advantage during ST (lottery management information) changes (progresses) to a more advantageous state when using a standard press, and does not change (progress) to a more advantageous state when using an irregular press. The MAP game counter may also manage the corresponding information by subtraction updates.

Furthermore, although the probability is lower than in the case of irregular button presses, it may be possible to make it so that the MAP game counter value is not added even when pressing buttons in the normal order. In this case, for example, a MAP game counter addition lottery table could be referenced, where the probability denominator is "65536", the lottery value that determines the result of "MAP game counter incremented by 1" is assigned to "65535", and the lottery value that determines the result of "MAP game counter not incremented" is assigned to "1". The lottery would then be performed based on the extracted random value.

Furthermore, although the probability is lower than in the case of a normal press, the MAP game counter value may also be increased in the case of an irregular press. In this case, for example, a MAP game counter addition lottery table could be referenced, where "65535" is assigned to the lottery value that determines the result of "MAP game counter not added," and "1" is assigned to the lottery value that determines the result of "MAP game counter added by 1." The lottery would then be performed based on the extracted random value.

Furthermore, regarding the relationship between the MAP game count counter value and the randomly selected MAP, while the basic relationship that a larger MAP game count counter value results in a more favorable randomly selected MAP remains, it is also possible to, for example, have the MAP game count counter value and the randomly selected MAP uniquely correspond, with the randomly selected MAP being set according to the value of the MAP game count counter, or to have one randomly selected MAP be determined by lottery from among multiple randomly selected MAPs based on the lottery value corresponding to the MAP game count counter value.

Furthermore, regarding the lottery map, for example, the degree of advantage may be made more favorable by simply increasing the probability of winning the second bonus transition lottery as the game progresses (the lottery value at which a win is determined becomes larger), or by increasing the target role for the second bonus transition lottery as the game progresses (resulting in a higher probability of winning). Alternatively, a combination of these methods may be used to make the degree of advantage more favorable. Note that these are merely examples, and the degree of advantage may be made more favorable in other ways.

As illustrated in Figure 70, for example, when the draw map is "A", the draw targets are "Watermelon" and "Cherry", the probability denominator is "256", and the draw value that determines a winning ticket is assigned "1", while the draw value that determines a losing ticket is assigned "255". Also, when the draw map is "B", the draw targets are "Watermelon" and "Cherry", the probability denominator is "256", and the draw value that determines a winning ticket is assigned "2", while the draw value that determines a losing ticket is assigned "254". Furthermore, when the lottery MAP is "C", the target symbols for the lottery are "Watermelon" and "Cherry," the probability denominator is "256," and the lottery value that determines a winning combination is assigned "3," while the lottery value that determines a losing combination is assigned "253."

Furthermore, when the draw map is "D", the draw targets are "Watermelon", "Cherry", and "Special Role", the probability denominator is "256", and for each, the draw value that determines a win is assigned "1", and the draw value that determines a loss is assigned "255". Furthermore, when the draw map is "E", the draw targets are "Watermelon", "Cherry", and "Special Role", the probability denominator is "256", and for each, the draw value that determines a win is assigned "2", and the draw value that determines a loss is assigned "254". Furthermore, when the lottery map is "F," the target symbols for the lottery are "Watermelon," "Cherry," and "Special Symbol," with a probability denominator of "256." For each symbol, "3" is assigned to the winning value, and "253" is assigned to the losing value. For example, the system can be configured in this way to progressively increase the degree of advantage.

(Control example 1)
Next, we will explain control example 1, which describes the case where the game is played by pressing the buttons in order for all 1 to 6 games during ST (see Figure 70(a)).

In the first game, the ST game counter is incremented by 1. Since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "A," as well as a second bonus stock lottery.

In the second game, first, the ST game counter value is increased by 1. Also, since the game was played in the normal order, the MAP game counter value is increased by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is held according to the winning combination and the lottery MAP "B," as well as a second bonus stock lottery.

In the third game, the ST game counter is first incremented by 1. Also, since the game was played in the normal order, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "C," as well as a second bonus stock lottery.

In the fourth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "D," as well as a second bonus stock lottery.

In the fifth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "E," as well as a second bonus stock lottery.

In the sixth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "F," as well as a second bonus stock lottery.

(Control example 2)
Next, we will explain control example 2, which describes a case where, during the first to sixth games of the ST (Special Time), the first game is played using an irregular button press pattern, and the remaining games are played using a standard button press pattern (see Figure 70(b)).

In the first game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "A," as well as a second bonus stock lottery.

In the second game, the ST game counter value is first increased by 1. Also, since the game was played using the standard button sequence, the MAP game counter value is also increased by 1. Note that this game is controlled to a non-favorable state, therefore, neither the second bonus transition lottery nor the second bonus stock lottery is conducted.

In the third game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "B," as well as a second bonus stock lottery.

In the fourth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "C," as well as a second bonus stock lottery.

In the fifth game, the ST game counter is first incremented by 1. Also, since the game was played in the normal order, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "D," as well as a second bonus stock lottery.

In the sixth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "E," as well as a second bonus stock lottery.

Comparing this to Control Example 1, in Control Example 1, the lottery MAP progresses to "F" by the 6th game, whereas in Control Example 2, the lottery MAP only progresses to "E" by the 6th game. Furthermore, in Control Example 2, the 2nd game is controlled to a non-favorable state, meaning that neither the 2nd bonus transition lottery nor the 2nd bonus stock lottery takes place during that game (for example, no lottery is used). In other words, in Control Example 2, even if, for example, the player wins a "push-order bell" in the 1st game and happens to have the correct button sequence, resulting in significant game value, the AT-related processing is at least less favorable than in Control Example 1. Moreover, the game duration during ST is not extended, so overall, it can be less favorable to the player than Control Example 1.

(Control example 3)
Next, we will explain control example 3, which describes a case in which, during the ST (Special Time) period, the first 1 to 4 games are played using an irregular button press pattern, and the remaining games are played using a standard button press pattern (see Figure 70(c)).

In the first game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "A," as well as a second bonus stock lottery.

In the second game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the third game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the fourth game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the fifth game, the ST game counter value is first increased by 1. Also, since the game was played using the standard button sequence, the MAP game counter value is also increased by 1. Note that this game is controlled to a non-favorable state, therefore, neither the second bonus transition lottery nor the second bonus stock lottery is conducted.

In the sixth game, the ST game counter is first incremented by 1. Also, since the game was played using the standard button sequence, the MAP game counter is also incremented by 1. Furthermore, because this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "B," as well as a second bonus stock lottery.

Comparing this to Control Example 1, in Control Example 1, the lottery MAP progresses to "F" by the 6th game, whereas in Control Example 3, the lottery MAP only progresses to "B" by the 6th game. Furthermore, in Control Example 3, games 2-5 were controlled to a non-favorable state, meaning that neither the second bonus transition lottery nor the second bonus stock lottery took place during that game (for example, no lottery was held). In other words, in Control Example 3, even if, for example, a "push-order bell" was drawn in games 1-4, resulting in a significant amount of game value being awarded due to the correct button sequence, the AT-related processing is at least less favorable than in Control Example 1. Moreover, the game duration during ST is not extended, so overall, it can be less favorable to the player than Control Example 1.

(Control example 4)
Next, we will explain control example 4, which describes the case where the game is played using irregular button presses for all 1 to 6 games during ST (see Figure 70(d)).

In the first game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a favorable state, a second bonus transition lottery is conducted based on the winning combination and the lottery MAP "A," as well as a second bonus stock lottery.

In the second game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the third game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the fourth game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the fifth game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In the sixth game, the ST game counter is incremented by 1. However, because the game was played using an irregular button press pattern, the MAP game counter is not incremented by 1. Furthermore, since this game is controlled to a non-favorable state, neither the second bonus transition lottery nor the second bonus stock lottery takes place.

In this control example 4, if the game were played using irregular button presses throughout the entire ST period, the same control would be applied from the 7th to the 15th game. Then, in the 16th game, which is the final game where it could be determined whether or not a second bonus is awarded during ST, this game is also controlled to a non-favorable state. Therefore, neither the second bonus transition lottery nor the second bonus stock lottery is performed.

Then, in the next game (for example, even if the game transitions to the second bonus if the second bonus stock lottery was won in the first game), the decision of whether or not the second bonus will be granted is basically not made. Instead, the game is controlled to a state of preparation for the end of the ST (Special Time) for one game, which displays the results of the consecutive bonus zone (for example, how many sets of the second bonus were executed and how many coins were obtained during the consecutive bonus zone). The ST ends in that game, and the consecutive bonus zone also ends (i.e., the advantageous period ends).

<Example of controlling the anticipation-building effect in the first gaming machine (modified version)>
Next, with reference to Figures 71 to 78, an example of controlling the anticipation-building effect of this modified version will be explained. Figures 71 and 72 show an example of control when the effect data 1 is determined (Control Example 1), Figures 73 and 74 show an example of control when the effect data 2 is determined (Control Example 2), and Figures 75 to 78 show an example of control when the effect data 3 is determined (Control Example 3). Furthermore, in order to make the explanation easier to understand, this control example will be explained assuming that the variable display unit has three reels (left reel 3L, middle reel 3C, right reel 3R), as in this embodiment.

Furthermore, the term "anticipation-building effects" here refers to effects that can create a sense of anticipation in the player. For example, these include effects that can be executed during normal gameplay (the advantageous period) when a rare role is won (or even when a non-rare role is won), and effects that can be executed during a pre-announcement state where a transition to the CZ (or the first bonus) has been decided but has not yet occurred (even in so-called false pre-announcement states).

In other words, it can be defined as a type of presentation that informs the player that a favorable situation will occur (or will not occur), or suggests the possibility of such a situation occurring (for example, its likelihood or expected outcome). Furthermore, such notification or suggestion is achieved through changes in the presentation content (the progression of the presentation) as the game progresses.

The above-mentioned uses are merely examples, and of course, it can be used for other purposes. For example, it may be used to notify or suggest the expectation of transitioning to the AT state during the CZ or ST, or to notify or suggest the expectation of extending the AT state during the first or second bonus. Furthermore, in this example, as an example of expectation-building effects, notification or suggestion is provided by changes in the display content (progression of display content) on the main display unit 21, but this is not limited to this. For example, the effect may be advanced by the display mode of other performance execution means such as lamps or speakers, and such notification or suggestion may be provided through this mode.

(Control example 1)
First, with reference to Figures 71 and 72, we will explain an example of control when performance data 1 is determined as an example of an anticipation-building effect (control example 1). Figure 71 is a schematic diagram showing the progression of the display content when the game proceeds with a stop operation performed in the normal order (left first stop), and Figure 72 is a schematic diagram showing the progression of the display content when the game proceeds with a stop operation other than a normal order (other than left first stop).

In this example, at the start of the game, an introductory display showing the content and expected level of the presentation (the "Find the Treasure!" screen in Figures 71 and 72) is shown, after which the presentation begins (the "Where is it?" screen in Figures 71 and 72).

At this point, let's assume that the stop operation was performed at the left first stop, as shown in Figure 71. In this case, as the game progresses after the first stop operation, the animation continues to advance (the "Where is it? Where is it?" screen in Figure 71).

Next, if a second stop operation is performed on the remaining stop buttons, the animation will progress further as the game continues after the second stop operation (the "Where is it? Where is it? Where is it?" screen in Figure 71).

Next, if a third stop operation is performed on the remaining stop buttons, the game progresses further as the third stop operation is performed and the game continues. In this case, if the game indicates or suggests the occurrence of a favorable situation, a favorable result is displayed (the "GET! CHANCE!" display screen in Figure 71). On the other hand, if the game does not indicate or suggest the occurrence of a favorable situation, an unfavorable result is displayed (the "Too bad..." display screen in Figure 71). In this way, when the buttons are pressed in order, the final display content (or, in some cases, the content that can be predicted by the intermediate displays) conveys a predetermined sense of expectation to the player.

On the other hand, after the performance has started, suppose a stop operation other than the first left stop is performed, as shown in Figure 72. In this case, the performance will stop, and a waiting display corresponding to that performance will be shown (the "Waiting for Treasure Stage" display screen in Figure 72). This waiting display will continue even if a second or third stop operation is performed and the game progresses. In other words, if a stop operation other than the first left stop is performed, the performance will not progress thereafter, and the player will no longer be shown the predetermined sense of anticipation.

In gaming machines where stopping operations other than the left reel first can negatively impact AT (Automatic Trigger) processing, it would be beneficial to implement a situational explanation, such as audio or text display, when a stopping operation other than the left reel first is performed. This explanation would include messages like "You are using an irregular stopping method," "You are stopping the middle reel first," or "You are stopping the right reel first." Since such explanations do not occur when the reels are stopped with the left reel first, this can subtly create a sense of unease in the player who performed the irregular stopping method, encouraging them to stop the left reel first.

Such situational explanations may be displayed simultaneously with the appearance of the standby indicator. Furthermore, these explanations may be displayed only in games where irregular button presses result in unfavorable AT (Automatic Trigger) processing, or they may be displayed even in so-called normal games where irregular button presses do not result in unfavorable AT processing. The timing of the situational explanation can be when the stop button is pressed, when the stop button is released, or when the stopped reel comes to a complete stop.

Furthermore, the situational explanation may occur only at the first stop, or it may occur repeatedly at subsequent stops. For example, if the reels are stopped in the order of middle → right → left, the situational explanation may include voice messages such as "The middle reel has been stopped first" at the first stop, "The right reel has been stopped" at the second stop, and "The left reel has been stopped" at the third stop.

Furthermore, the situational explanation may involve, for example, setting decorative lamps such as the lower panel (waist panel 13), reel surrounding lamps, and reel backlight to a special state different from the normal illumination state, such as turning them off or flashing. For example, the lower panel could remain lit if the reels stop from the left, and turn off if they stop from the middle or right. Such a configuration would allow the player to infer that stopping the reels from the middle or right would result in some kind of disadvantage.

By using this kind of situational explanation, it's possible to encourage players who accidentally stop the middle or right reel due to an operational error to continue playing using recommended methods, such as stopping the left reel first, without causing discomfort through direct warnings.

(Control example 2)
First, with reference to Figures 73 and 74, we will explain an example of control when performance data 2 is determined as an example of an anticipation-building effect (control example 2). Figure 73 is a schematic diagram showing the progression of the display content when the game proceeds with a stop operation performed in the normal order (left first stop), and Figure 74 is a schematic diagram showing the progression of the display content when the game proceeds with a stop operation other than a normal order (left first stop) in the same way.

In this example, at the start of the game, an introductory display showing the content and expected level of the presentation (the "Escape from the Enemy!" screen in Figures 73 and 74) is shown, after which the presentation begins (the "Hurry!" screen in Figures 73 and 74).

At this point, let's assume that the stop operation was performed at the left first stop, as shown in Figure 73. In this case, as the game progresses after the first stop operation, the animation continues to advance (the "Hurry! Hurry!" display screen in Figure 73).

Next, if a second stop operation is performed on the remaining stop buttons, the animation will progress further as the game continues after the second stop operation (as shown in Figure 73, displaying "Hurry! Hurry! Hurry!").

Next, if a third stop operation is performed on the remaining stop buttons, the game progresses further as the third stop operation is performed and the game continues. In this case, if the occurrence of a favorable situation is announced or suggested, a favorable result is displayed (the "Success!" screen in Figure 73). On the other hand, if the occurrence of a favorable situation is not announced or suggested, an unfavorable result is displayed (the "Failure..." screen in Figure 73). In this way, when pressing the buttons in order, the final displayed content (or, in some cases, the content that can be predicted by the intermediate displayed content) gives the player a predetermined sense of expectation.

On the other hand, suppose that after the performance has started, a stop operation other than the first left stop is performed, as shown in Figure 74. In this case, the performance stops, and a standby display corresponding to that performance is then shown (the display screen shown by the diagonal lines in Figure 74. Note that this merely indicates that a different standby display is shown than in Control Example 1; for example, a display screen that is easily recognizable as corresponding to the performance, such as "Waiting for Escape Stage," may be displayed). This standby display continues even if a second or third stop operation is performed and the game progresses. In other words, if a stop operation other than the first left stop is performed, the performance will not progress thereafter, and the player will no longer be shown the predetermined sense of anticipation.

In control examples 1 and 2 described above, if the first stop operation was anything other than a left-first stop, the corresponding standby display was shown from that point onward. However, the timing of the start of the standby display is not limited to these. For example, it could be when the second stop operation is performed, or when the third stop operation is performed. Furthermore, the timing of the start of the standby display may differ in each case. This also applies to control example 3, which will be described later.

Furthermore, in the above-described control examples 1 and 2, we explained the existence of anticipation-building effects in both control example 1 and control example 2 to illustrate that there are multiple different types of anticipation-building effects. Of course, the types of such effects are not limited to just two. It is possible to configure the system to have at least two or more types with at least some differences in display content. In this case, a standby display corresponding to each effect should be provided. Also, in the control example 3 described later, we explained the existence of anticipation-building effects in control example 3 to illustrate that the above-described control example 1 is part of a continuous effect. Of course, the types of such effects are not limited to just one. It is possible to configure the system to have at least two or more types with at least some differences in display content. In this case, a standby display corresponding to each effect should be provided.

Furthermore, in control examples 1 and 2 described above, when displaying a standby indicator, a unique standby indicator corresponding to each indicator was used to minimize discrepancies with the content of each indicator. However, a common standby indicator may be used, for example, to reduce the amount of data. This also applies to control example 3, which will be described later.

Furthermore, in control examples 1 and 2 described above, a standby display was uniformly shown when the first stop operation was anything other than the left first stop. However, for example, if the executed animation ultimately results in a favorable outcome, the standby display may not be shown, and if it ultimately results in a disadvantageous outcome, the standby display may be shown. In other words, even if the game is played using a stop other than the left first stop and the game is controlled to a non-favorable state, if this does not affect (or is unlikely to affect) the game situation (for example, if the AT lottery has already been won and the game is scheduled to transition to the AT state from the next game), the standby display may not be shown. The same applies to control example 3 described later.

On the other hand, for example, if the execution of a performance ultimately results in an unfavorable outcome, the standby display may not be shown, but if it ultimately results in a favorable outcome, the standby display may be shown. In other words, if the performance is inherently a false alarm and not showing the final result does not necessarily result in a disadvantage for the player, the standby display may not be shown. This also applies to control example 3 described later.

Furthermore, the anticipation-building effects in the above-described control examples 1 and 2 may be configured as single effects or as part of a continuous effect. For example, if configured as a single effect, the same effect may be executed again in the next game after the effect has been performed and the standby display has appeared. Alternatively, in the next game after the effect has been performed and the standby display has appeared, the effect lottery may not be executed, resulting in no effect (excluding the basic display screen). Also, the standby display may end when the start operation for the next game is performed after its display has begun. In this case, when the standby display ends, the scheduled effect display may start or resume. Note that the standby display may end not when the start operation is performed, but when the bet operation for the next game is performed.

Alternatively, in the next game after the game in which the aforementioned effect was performed and the standby display was shown, the standby display shown in the first game may continue to be shown. In this case, if the stop operation is performed in the next game using the standard stop order, the same effect may be performed again in the next game (the game two games after the game in which the standby display was first shown), or the effect may be determined according to the normal rules without any special control. Furthermore, in the next game after the game in which the aforementioned effect was performed and the standby display was shown, the effect may be determined according to the normal rules without any special control.

Furthermore, for example, if the sequence is structured as a continuous performance, then in the next game after the performance and the display of a waiting screen, the same performance that was performed in the game where the waiting screen was displayed should be performed again. For example, suppose the continuous performance is a two-game structure where the first performance is performed in the first game and the second performance is performed in the second game. In this case, if all games are played in the normal order, the first performance will be performed in the first game and the second performance in the second game.

On the other hand, for example, if the first game is played using an irregular button press sequence, the game will display a standby indicator midway through the first animation sequence. In this case, the first animation sequence will be executed again in the second game. If the second game is played using a standard button press sequence, the first animation sequence will be executed to completion in that game, and the second animation sequence will be executed in the third game. Furthermore, if the second game is played using an irregular button press sequence, the game should be controlled in the same way as the first game. That is, the game should display a standby indicator midway through the first animation sequence in the second game, the first animation sequence will be executed again in the third game, and if the third game is played using a standard button press sequence, the first animation sequence will be executed to completion in that game, and the second animation sequence will be executed in the fourth game.

Furthermore, for example, if the first game is played using a standard button press sequence and the second game uses an irregular button press sequence, the game will display a standby indicator midway through the second animation sequence. In this case, the second animation sequence will be executed again in the third game. If the third game is played using a standard button press sequence, the second animation sequence will be executed to completion. Also, if the third game is played using an irregular button press sequence, the game should be controlled in the same way as the second game. That is, the standby indicator will be displayed midway through the second animation sequence in the third game, the second animation sequence will be executed again in the fourth game, and if the fourth game is played using a standard button press sequence, the second animation sequence will be executed to completion.

However, if the continuous use of irregular button presses causes problems with the same animation being repeated indefinitely, an upper limit (e.g., 10 games) may be set on the number of games for which such control can be applied. If the animation is not completed after the upper limit has been reached, control may be implemented to terminate the animation prematurely. An example of control when the animation is composed as a continuous sequence will be described in detail later using Control Example 3.

Furthermore, the control that displays a standby screen when the game is not played in the correct order may also be applied when an effect other than an anticipation-building effect is executed. In other words, the effects to which this control applies are not limited to anticipation-building effects. For example, this control may also be applied when a development effect is executed that can inform or suggest whether the effect will continue (develop further). Also, for example, during a CZ (Chance Zone) or ST (Special Time), when a battle effect is executed that can inform or suggest whether or not the game will transition to an AT (Attack Time) state, this control may also be applied when a general effect is executed that can inform or suggest the winning combination or state. In short, the effects to which this control applies can be any effect from among all the effects.

(Control example 3)
Next, with reference to Figures 75 to 78, we will explain an example of control when performance data 3 is determined as an example of an anticipation-building effect (control example 3). Figures 75 and 76 schematically show the progression of the display content when the game progresses with a normal stop operation (left first stop) in the first and second games, while Figures 77 and 78 schematically show the progression of the display content when the game progresses with a stop operation other than a normal stop (other than left first stop) in the first game, and the game progresses with a normal stop operation (left first stop) in the second game.

In this example, at the start of the first game, an introductory display showing the content and expected outcome (the "Find the Treasure!" screen in Figures 75 and 77) is shown, after which the presentation begins (the "Where is it?" screen in Figures 75 and 77).

At this point, let's assume that the stop operation was performed at the left first stop, as shown in Figure 75. In this case, as the game progresses after the first stop operation, the animation continues (the "Where is it? Where is it?" screen in Figure 75).

Next, if a second stop operation is performed on the remaining stop buttons, the animation will progress further as the game continues after the second stop operation (the "Where is it? Where is it? Where is it?" screen in Figure 75).

Next, if a third stop operation is performed on the remaining stop buttons, the animation will continue as the game progresses (as shown in Figure 75, the "NEXT..." screen). This indicates that the animation does not end in the first game but continues into the second game.

Next, if the second game is started, the animation will progress further as the game progresses (as shown in Figure 76, the "Where are you!?" screen).

At this point, let's assume that the stop operation was performed at the left first stop, as shown in Figure 76. In this case, as the game progresses after the first stop operation, the animation continues to advance (the "Where are you?! Where are you?!" display screen in Figure 76).

Next, if a second stop operation is performed on the remaining stop buttons, the animation will progress further as the game continues after the second stop operation (the "Where are you?! Where are you?! Where are you?!" screen is displayed in Figure 76).

Next, if a third stop operation is performed on the remaining stop buttons, the game progresses further as the third stop operation is performed and the game continues. In this case, if the game indicates or suggests the occurrence of a favorable situation, a favorable result is displayed (the "GET! CHANCE!" display screen in Figure 76). On the other hand, if the game does not indicate or suggest the occurrence of a favorable situation, an unfavorable result is displayed (the "Too bad..." display screen in Figure 76). In this way, if both the first and second games are played in the normal order, the final display content of the second game (or, in some cases, the content that can be predicted by the intermediate displays) indicates a predetermined level of expectation to the player.

On the other hand, suppose that after the animation sequence begins in the first game, a stop operation other than the left first stop is performed, as shown in Figure 77. In this case, the animation sequence stops, and a waiting display corresponding to that animation is then shown in the first game (the "Waiting for Treasure Stage" display screen in Figure 77). This waiting display continues even if the game progresses after the second or third stop operation. In other words, in games where a stop operation other than the left first stop is performed, the animation sequence will not progress thereafter.

However, when the second game begins, as shown in Figure 78, the animations from the first game are executed again in the second game. Specifically, when the operation to start the second game is performed, the animations begin (resume) as the game progresses (the "Where is it?" display screen in Figure 78). Note that in Figure 78, the introductory display is not shown, but it is also possible to configure the system so that the animations, including the introductory display, are executed again from the beginning.

At this point, let's assume that the stop operation was performed at the left first stop, as shown in Figure 78. In this case, as the game progresses after the first stop operation, the animation continues to advance (the "Where is it? Where is it?" screen in Figure 78).

Next, if a second stop operation is performed on the remaining stop buttons, the animation will progress further as the game continues after the second stop operation (the "Where is it? Where is it? Where is it?" screen in Figure 78).

Next, if a third stop operation is performed on the remaining stop buttons, the animation will continue as the game progresses (as shown in Figure 78, the "NEXT..." screen). This indicates that the animation will not end in the second game but will continue into the third game.

Subsequently, in the third game, if the stop operation is performed with the left reel as the first stop, the control will proceed with the animation in the same manner as shown in Figure 76. However, if the stop operation is performed with a stop other than the left reel as the first stop, the animation up to the start operation shown in Figure 76 will be executed again, and then the control will be put into a waiting state for the animation to proceed, as shown in Figure 77.

Furthermore, if a stopping operation other than the left first stop is performed during the second game, the same control as in the first game (see Figure 77) will be performed again, and in the third game, the same control as in the second game (see Figure 78) will be performed again.

(Example of control during power outage recovery)
When the power switch (not shown) of the power supply unit 34 is turned off (the power is turned off), or when the power supply to the pachislo machine 1 is interrupted due to a power outage or other factors, and then the power supply is restored and the machine recovers from the power outage, the game state and the performance state will basically return to the state before the power outage. Here, if the standby display described above was shown at the time of the power outage, the following are possible ways in which the machine recovers.

The first embodiment is one in which the standby display remains active (the system resumes) when power is restored after an outage. For example, if the standby display is active while the arcade closes and the power is turned off, and the power is turned back on the next day without any setting changes, and the standby display is canceled, the first player to play will be unaware that their first game is controlled to a non-favorable state, potentially causing them to suffer an unforeseen disadvantage. This first embodiment helps to prevent such problems.

The second embodiment is one in which, upon power restoration after an outage, a different display (for example, the initial screen) is shown instead of the standby display. For example, if the standby display is displayed while the arcade closes and the power is turned off, and the power is turned on again the next day without any setting changes, the standby display will resume. However, if the initial screen is displayed when a setting change is made, it would be easy to determine whether a setting change has been made based on whether the standby display is shown at opening time, which could lead to unforeseen disadvantages for the arcade. This second embodiment can prevent such problems from occurring. As with the first embodiment described above, it is desirable to control the display so that the display when power is restored after an outage and the display when a setting change is made (described later) are the same. In this way, the above-mentioned problems can be prevented in either embodiment. The initial screen referred to here is, for example, a screen that displays the current stage during normal play. Alternatively, a display screen specifically for non-advantageous periods may be provided and designated as the initial screen, or a stage display screen that can be displayed in both non-advantageous and advantageous periods may be provided and designated as the initial screen.

(Example of control when settings are changed)
When the setting value of the pachislo machine 1 is changed (when the setting is changed) by operating the setting key-type switch 52 or the like, if the above-mentioned standby display was shown during gameplay before the setting change, the following are possible ways in which it can be restored.

The first embodiment is one in which the standby display is intentionally kept on even after a setting change. As mentioned above, if the power is turned off and on without any setting change, the standby display will resume. However, if the initial screen is displayed when a setting change is made, it would become easy to determine whether a setting change has been made simply by whether or not the standby display is shown at opening time, which could result in unforeseen disadvantages for the amusement parlor. This first embodiment helps to prevent such problems from occurring.

The second configuration involves displaying a different screen (for example, the initial screen) instead of a standby display after a setting change. Even if an irregular button press was used to stop the game in the previous play session, the initialization process during the setting change ensures that the first game after the change will not be in a non-favored state (in this case, the favored counter can be incremented by 1 in a fixed process during the first game). Furthermore, since the presentation data is also initialized, there is no possibility of the first player suffering any disadvantage.

Furthermore, for example, the pachislo machine 1 can be configured to perform a special reset operation, which differs from the setting change procedure using a setting key-type switch 52, etc. This special reset operation involves, while the power is off, pressing a reset button (not shown) on the main control board 71 (i.e., performing a predetermined initialization operation on the initialization operation means) and then turning the power on (i.e., performing a predetermined power-on operation). This resets the advantageous section (i.e., the advantageous section ends, the initialization process at the end of the advantageous section is performed, and then the machine transitions to a non-advantageous section). In this case, if the standby display described above was shown before the special reset operation, after the special reset operation (after the advantageous section reset), instead of the standby display, an initial screen similar to the one described above should be displayed. Of course, to make it difficult to detect that such a special reset operation has been performed, the standby display may be intentionally kept on even after the special reset operation (after the advantageous section reset). Furthermore, when a special reset operation is performed, the state related to the advantageous period is initialized, and a non-advantageous period is set as the initial state. However, if the system is designed so that the carryover state of bonus roles becomes the recommended game state, then the information regarding the carried-over bonus roles (information in the carryover role storage area) should be maintained.

(Other control examples)
After the start operation is performed, an operation-based performance (for example, the operation-linked performance described above) may be performed with a predetermined performance operation. This is a performance in which a response performance, such as an indication of expectation level, occurs in response to an operation on a predetermined performance operation means, such as a chance button (for example, the performance buttons 10a, 10b described above) or a touch panel (for example, the sub-performance display unit 22 described above). In this case, if no operation is performed on the target performance operation means after the start of accepting performance operations, the system will enter an operation waiting state. However, if an irregular press is made even in this operation waiting state, the system will switch to a standby display, the operation waiting state for the performance operation will end, and it is desirable that the response performance planned for that operation performance will not occur even if the performance operation means is operated thereafter. By doing so, it is possible to suppress the occurrence of a situation that is difficult for the player to understand, such as when a response performance that has the role of indicating expectation level occurs while the standby display is active.

Furthermore, if the system allows for setting the performance state (e.g., volume adjustment, brightness adjustment, etc.) both while the reels are spinning and stopped, it may be possible to set the performance state at any time, even while the standby display for irregular button presses is shown. Similarly, if the system does not allow setting the performance state while the reels are spinning, but does allow it while the reels are stopped, it may be possible to set the performance state while the standby display for irregular button presses is shown, as long as the reels are stopped. The same applies to the display of user menu screens, which allow for the display of game history, mobile phone linked menus, some payout tables, and game flow; even while the standby display for irregular button presses is shown, if the system is capable of displaying these, they may be displayed according to the prescribed operation, just as in normal operation. Furthermore, performance state settings may be made at any time, for example, during the operation waiting state in the aforementioned operation performances, if the system is capable of setting them.

Furthermore, after the start operation is performed, a simulated game may be played during the period from the start of reel rotation to the point where it reaches a constant speed, where the reels rotate and are temporarily stopped based on the press of the stop button. In such simulated games, even if the stopping operation is performed with an irregular button press, it is not considered a discouraged playing method, so the standby display is not shown, and the AT-related processing should not be disadvantageous. Also, during the simulated game, as mentioned above, it is desirable to display a simulated game indicator such as "FREEPLAY" to clearly indicate that a simulated game is in progress. If a simulated game is played while the standby display is shown, the simulated game indicator should be displayed along with the standby display.

<Example of modified version of the button-press sequence bell and transmission information control for the first gaming machine (modified version)>
Next, with reference to Figures 79 and 80, the configuration of the modified version of the push-button bell and an example of controlling the transmission information sent to the sub-side will be described. The example of controlling the transmission information in this modified version can also be said to be the same as the example of controlling the transmission information of the first gaming machine. However, in this modified version, the one shown in Figure 79 is described as transmission information control example 1, and the one shown in Figure 80 is described as transmission information control example 2.

Furthermore, in this modified example, the variable display unit is described as having three reels (left reel 3L, middle reel 3C, right reel 3R). Also, in the modified example of the push-order bell, some of the payout configurations are changed from the first game machine in order to explain how other payouts are grouped similarly. This will be explained in detail later.

(The role configuration of the modified version of the button-pressing bell)
In the modified version shown in Figure 79, for example, the internal winning combinations include the replay combinations "F_Normal Replay" and "F_Cherry", and the minor combinations "F_Common Bell", "F_Ordered Bell A_123" to "F_Ordered Bell A_321"("Ordered Bell A" in the modified version), "F_Ordered Bell B_213" to "F_Ordered Bell B_321"("Ordered Bell B" in the modified version), "F_Two-Choice Single Coin Combination A", "F_Two-Choice Single Coin Combination B", "F_Common Single Coin Combination A", "F_Common Single Coin Combination B", and "F_Watermelon".

"F_Normal Replay" is a replay symbol; regardless of the order of play or button press position, the corresponding symbol combination will be displayed and a replay will be granted. Similarly, "F_Cherry" is a replay symbol; regardless of the order of play or button press position, the corresponding symbol combination will be displayed and a replay will be granted.

"F_Common Bell" is a minor win, where the corresponding symbol combination is displayed regardless of the order of play or button press position, resulting in a 13-coin payout.

The modified version, "Push Order Bell A," is a small win with six possible push order combinations. If the correct order is followed, the corresponding symbol combination is displayed, resulting in a 13-coin payout. If the incorrect order is followed, but the first stop was correct, the corresponding symbol combination is displayed regardless of the pressing position, resulting in a 1-coin payout. If the incorrect order is followed, and the first stop was also incorrect, if the pressing position on the designated reels is appropriate (a 1/2 chance of correct pressing), the corresponding symbol combination is displayed, resulting in a 1-coin payout. If the pressing position on the designated reels is incorrect (a 1/2 chance of incorrect pressing), a loss occurs, and no payout occurs (0 coins).

The modified version, "Push Order Bell B," is a four-choice push order mini-win where the first stop on the left is not designated as the correct order. If the stop operation is performed in the correct order, the corresponding symbol combination is displayed and 13 coins are awarded. If the stop operation is performed in an incorrect order, but the first stop operation is in the correct order, the corresponding symbol combination is displayed regardless of the pressing position and 1 coin is awarded. If the stop operation is performed in an incorrect order, and the first stop operation is also in an incorrect order, if the pressing position for the designated reels is appropriate (correct pressing position occurs 1/2 of the time), the corresponding symbol combination is displayed and 1 coin is awarded. If the pressing position for the designated reels is not appropriate (incorrect pressing position occurs in the remaining 1/2 of the time), a loss occurs and no award is given (0 coins).

Furthermore, the modified "Push Order Bell B" is designed so that stopping the left reel first never results in the correct sequence, but stopping other reels can result in the correct sequence. The left reel first stop is designated as a sequence that is disadvantageous in terms of granting game value, while sequences other than the left reel first are designated as sequences that are unilaterally advantageous in terms of granting game value. This constitutes a biased push order small win.

Furthermore, as shown in Figure 79, with the modified "Push Order Bell B" configured in this way, when considering the entire game machine, the expected value of winnings when the stop operation is assumed to be performed in the order "123" or "132" is "1.1612" coins, while the expected value of winnings when the stop operation is assumed to be performed in the order "213", "231", "312", or "321" is "2.716 coins". In other words, the expected value of the game awarded is lower when the stop operation is performed with the left reel as the first stop compared to when the stop operation is performed with a stop operation other than the left reel as the first stop.

However, the expected value of winnings mentioned above is the expected value per game in a non-AT state (i.e., a situation where advantageous stopping operations are not announced). Furthermore, since the number of bets required to play one game is 3, the system is designed so that in a non-AT state, the expected value of winnings will not exceed "3" regardless of the order of play (in other words, the payout rate will not exceed "1"). Therefore, for example, even if a player consistently performs stopping operations other than the left reel as the first stop in a non-AT state, the system is not designed to allow the player to continuously increase the value of their gameplay, at least statistically.

"F_2-Choice Single-Coin Win A" and "F_2-Choice Single-Coin Win B" are small wins where the button press position is chosen from two options, rather than the order of play. For example, if "F_2-Choice Single-Coin Win A" is determined as the winning combination, and the button press position on the designated reel is correct (the correct button press position occurs at 1/2 timing (first timing)), the corresponding symbol combination will be displayed and one coin will be awarded. If the button press position on the designated reel is incorrect (the incorrect button press position occurs at the remaining 1/2 timing (second timing)), the winning combination will be missed. If this occurs, no prize is awarded (0 coins). Also, if "F_2-choice 1-coin combination B" is determined as the winning combination, and the button press position on the designated reel is correct (correct button press position occurs at 1/2 timing (second timing)), the corresponding symbol combination will be displayed and 1 coin will be awarded. If the button press position on the designated reel is incorrect (incorrect button press position occurs at the remaining 1/2 timing (first timing)), a loss will occur and no prize will be awarded (0 coins).

"F_Common Single-Coin Win A" and "F_Common Single-Coin Win B" are minor wins, where the corresponding symbol combination is displayed regardless of the order of play or button press position, resulting in a single-coin win.

"F_Watermelon" is a minor win, and regardless of the order of play or button press position, the corresponding symbol combination is displayed, resulting in a 5-coin payout. Alternatively, for "F_Watermelon," a 5-coin payout may occur if the button press position on the designated reel is correct, while a 1-coin payout may occur if the button press position on the designated reel is incorrect.

(Example of transmission information control for modified versions of the button-press sequence bell (Part 1))
Next, referring to Figure 79, we will explain how to set internal winning information and instruction information using a modified version of the button-press sequence bell. This is referred to as transmission information control example (1) to distinguish it from transmission information control example (2), which will be explained later with reference to Figure 80.

Transmission Information Control Example (Part 1) is a control example configured to transmit some information regarding the internal winning combination to the sub-system for each game, even when the system is not in AT mode. In contrast, Transmission Information Control Example (Part 2) is a control example configured to not transmit information regarding the internal winning combination to the sub-system when the system is not in AT mode.

(Setting method 1 in non-AT state (advantageous period))
The embodiment 1 shown in Figure 79 illustrates an example of how internal winning information and instruction information are set in a non-AT state (normal advantageous period) of the advantageous period.

In this embodiment 1, when a win occurs with "F_Normal Replay," "F_Cherry," "F_Common Single-Coin Win A," "F_Common Single-Coin Win B," or "F_Watermelon," internal win information ("1," "2," "16," "17," or "18") is set, allowing the sub-system to identify each win.

Furthermore, when a win occurs on either "F_Common Bell" or the modified "Push-Order Bell A," the sub-system can identify that a win occurred on either of these, but it cannot identify which specific win occurred. An internal win information ("99") is set in this case. In other words, internal win information is set that groups "F_Common Bell" and the modified "Push-Order Bell A."

Furthermore, if the player wins one of the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," or "F_2-Choice Single-Coin Win B," the sub-system can identify that the player won one of these, but it cannot identify which specific win it was. This internal win information ("98") is then set. In other words, internal win information is set that groups the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," and "F_2-Choice Single-Coin Win B."

Furthermore, regardless of which hand is drawn, instruction information ("99") is set so that the batting order cannot be identified by the sub-system. In other words, instruction information is set that groups all hands together.

(Setting method 2 in non-AT state (advantageous period))
The embodiment 2 shown in Figure 79 illustrates another example of how internal winning information and instruction information are set in the non-AT state of the advantageous period (normal advantageous period).

In this embodiment 2, when a win occurs with "F_Normal Replay," "F_Cherry," "F_Common Bell," "F_Common Single-Coin Win A," "F_Common Single-Coin Win B," or "F_Watermelon," internal win information ("1," "2," "3," "16," "17," or "18") is set, allowing the sub-system to identify each win.

Furthermore, if the "Push-Order Bell A" in the modified version is selected, the sub-system can identify that one of these was selected, but it cannot identify which specific one was selected. Internal selection information ("80") is set in this way. In other words, internal selection information is set that groups the "Push-Order Bell A" in the modified version.

Furthermore, if the player wins one of the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," or "F_2-Choice Single-Coin Win B," the sub-system can identify that the player won one of these, but it cannot identify which specific win it was. This internal win information ("98") is then set. In other words, internal win information is set that groups the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," and "F_2-Choice Single-Coin Win B."

Furthermore, as with the first embodiment described above, regardless of which role is drawn, instruction information that does not allow the batting order to be identified on the sub-system (instruction information that says "no instruction") is set. However, in this second embodiment, if the player draws the modified "Push-Order Bell B," "F_2-Choice Single Role A," or "F_2-Choice Single Role B," the instruction information is set to "99," and if the player draws any other role, the instruction information is set to "0."

Furthermore, in this embodiment 2, when the modified "Push Order Bell A" is won, the internal winning information is set to "80," and the instruction information is set to "0" instead of "99." This allows, for example, the sub-system to perform a "Push Order Challenge" (for example, a display such as "?-?-?" on the screen, suggesting that at least one of the push order symbols has been won). This will be explained in detail later.

(Setting pattern 3 in non-AT state (advantageous period))
Embodiment 3 shown in Figure 79 illustrates another example of how internal winning information and instruction information are set in a non-AT state (normal advantageous period) of the advantageous period.

In this embodiment 3, when a win occurs with "F_Cherry," "F_Common Single Symbol B," or "F_Watermelon," internal win information ("2," "17," or "18") is set, allowing the sub-system to identify the respective win.

Furthermore, if you win with "F_Normal Replay," "F_Common Bell," the modified "Ordered Bell A," the modified "Ordered Bell B," "F_Two-Choice Single Coin Win A," "F_Two-Choice Single Coin Win B," or "F_Common Single Coin Win A," the sub-system will be able to identify that you won with one of these, but it will not be able to identify which one you won with. Internal win information ("97") will be set. In other words, internal win information will be set that groups "F_Normal Replay," "F_Common Bell," the modified "Ordered Bell A," the modified "Ordered Bell B," "F_Two-Choice Single Coin Win A," "F_Two-Choice Single Coin Win B," and "F_Common Single Coin Win A."

Furthermore, as with the first embodiment described above, regardless of which hand is drawn, instruction information that does not allow the batting order to be identified by the sub-system (instruction information that says "no instruction") is set. However, in this third embodiment, if "F_Cherry," "F_Common Single Hand B," or "F_Watermelon" is drawn, "0" is set as the instruction information, and if any other hand is drawn, "99" is set as the instruction information.

Furthermore, in all of the above embodiments 1 to 3, the objective is that, when a biased bell, such as the modified "Push Order Bell B," is included in the internal winning combination, the winning combination should not be made recognizable to the player, including through sub-displays, in the non-AT state.

For example, even if the correct button sequence isn't announced because the game isn't in AT mode, if a player can recognize that a biased bell combination, such as the modified "Push Order Bell B," has been drawn, then in games where the player has made such a recognition, they might intentionally perform a stop operation other than stopping the left reel first (even if the gameplay is designed to favor AT-related processing by stopping the left reel first). In this case, the payout rate is likely to deviate from the initially intended rate, potentially compromising the fairness of the game.

Furthermore, the fact that players can recognize when a biased bell, such as the modified "Push Order Bell B," has been drawn is essentially equivalent to being able to narrow down the batting order to one that is advantageous in terms of assigning game value. In other words, creating a state where this recognition is possible can be said to be one aspect of the AT state. Therefore, under current regulations, for example, the aforementioned instruction monitor would need to display corresponding instruction information, and the payout obtained in this state would need to be included in the aforementioned "Instruction-Inclusive Prize Ratio" (for example, prize ratio information that is included in the aggregation and calculation even during the AT state).

Furthermore, if such a need arises, designing the payout system becomes extremely difficult, and it becomes impossible to guarantee the gameplay aspect, such as the ability to dramatically increase payouts by transitioning from a non-AT state to an AT state. This would also significantly reduce the player's enjoyment.

Therefore, in this modified version, assuming the following requirements are met, the information is set as described in embodiments 1 to 3 above, thereby eliminating any possibility of it being interpreted as an AT state.

For example, the first requirement is that, regarding internal winning information, in games where internal winning information includes biased bells (grouped) such as the modified example "Push Order Bell B," the payout rate must be less than 1 (or 1 or less) regardless of the stopping order used (irregular pressing) other than the left first stop.

For example, in the above-described embodiments 1 and 2, the modified "Push-Order Bell B," "F_2-Choice Single-Coin Symbol A," and "F_2-Choice Single-Coin Symbol B" are grouped together, and the internal winning information "98" is set. In a game where the internal winning information "98" is set (in other words, a game in which the group of symbols is won), the expected value of winning is "0.500" coins if the stop operation is performed with the order "123" or "132," while the expected value of winning is "2.702" coins if the stop operation is performed with the order "213," "231," "312," or "321." That is, regardless of the stop operation order, the expected value of winning does not exceed "3" (in other words, the payout rate does not exceed "1").

Furthermore, for example, in the above-described embodiment 3, "F_Normal Replay," "F_Common Bell," modified "Ordered Bell A," modified "Ordered Bell B," "F_Two-Choice Single Coin Win A," "F_Two-Choice Single Coin Win B," and "F_Common Single Coin Win A" are grouped together, and the internal winning information "97" is set. In a game where the internal winning information "97" is set (in other words, a game in which the group of winning combinations is won), the expected value of winning is "1.601" coins if the stop operation is performed with the order "123" or "132," while the expected value of winning is "2.708" coins if the stop operation is performed with the order "213," "231," "312," or "321." That is, regardless of the stop operation order, the expected value of winning does not exceed "3" (in other words, the payout rate does not exceed "1").

By doing this, for example, even if a player is aware that the internal winning combination information "98" or "97" has been set, and plays using irregular button presses, there will be no room for exploitation that would allow the player to increase the value of the game. While it is possible that the expected value of winnings may exceed "3" depending on the grouping method, this is acceptable as long as fairness in the game is ensured. However, from the above perspective, it is still desirable to configure the system so that the expected value of winnings does not exceed "3".

For example, the second requirement is that in games where internal winning information is set that includes biased bells (grouped) such as the modified "Push Order Bell B," the sub-system must not perform any effects (batting order-related effects) that would allow the player to recognize that a winning combination has been achieved (or that the player might perceive as a batting order navigation), such as the aforementioned "Push Order Challenge effect."

Therefore, for example, in the above-described embodiment 1, the instruction information "99" is set for all roles. Also, for example, in the above-described embodiment 2, the instruction information "99" is set for games where the internal winning information "98" is set. Furthermore, for example, in the above-described embodiment 3, the instruction information "99" is set for games where the internal winning information "97" is set. In other words, the sub-system can control games that receive instruction information "0" to enable the above-described batting order-related effects, while controlling games that receive instruction information "99" to prevent the above-described batting order-related effects from occurring.

Furthermore, even in games where the sub-system receives instruction information "99," it is permissible to perform any effects that are not related to the batting order, such as using color navigation (white or yellow) to suggest a winning combination, or performing a chance notification when the reel stops with the left reel as the first stop. Also, for example, in the case of the above-described embodiment 1, the same effects may be performed for internal winning information "99," internal winning information "98," and internal winning information "0" (miss), or different effects may be performed.

This approach makes it easier for players to play in a specific manner (left reel first stop) that is advantageous for AT-related processing, without having to be conscious of biased bell wins. Furthermore, as described above, since internal win information and instruction information are set, even if grouping information including biased bells is transmitted to the sub-system, this does not allow for the narrowing down of advantageous batting orders. Therefore, payouts in such games do not fall under instruction-driven payouts, and it is considered that they do not need to be included in the "instruction-inclusive payout ratio" mentioned above. This makes it possible to accurately count payouts in the AT state and during payout operation when the payout is effectively advantageous, and it is considered that the arcade operator can more easily understand the behavior of the machine using the payout ratio monitor device 54 mentioned above.

Furthermore, it may be considered to add the following requirement (the third requirement). For example, the third requirement is that in games where instruction information "99" is set, this fact should be notified by a notification means controlled by the main system.

For example, the information display device 14 may be equipped with a special lamp, and in games where instruction information "99" is set, this special lamp may be illuminated (or a predetermined display mode may be shown). Alternatively, in games where instruction information "99" is set, the instruction monitor may display a "-" or other indication that the instruction has not occurred. These are merely examples; other notification means may be used as long as it is possible to indicate to the player that the instruction has not occurred through some form of display mode.

By doing this, for example, in games where a special lamp is lit (or a "-" is displayed on the instruction monitor), the player can be notified or suggested that no navigation will occur (no notification or instruction regarding the stopping operation will be given). This makes it easier for the player to play in a specific manner (left reel first stop) that is advantageous for AT-related processing, without being conscious of the biased bell winnings. Furthermore, it encourages players to play using this recommended method.

Furthermore, when using a special lamp, information regarding the illumination/deactivation of the special lamp may be transmitted to the sub-system. The sub-system may then refer to this information and, upon recognizing the illumination of the special lamp, execute control to prevent the aforementioned batting order-related animations. However, without transmitting such information, the system may also execute control to prevent the aforementioned batting order-related animations by comprehensively judging the internal winning information and instruction information (or by determining whether the instruction information "99" has been transmitted).

Furthermore, when using the instruction monitor, for example, if instruction information "0" is set, the instruction monitor may display "0," or it may display no information at all (be hidden). In either case, no instructions will be issued on the main side. However, in this case, the sub-side may perform the aforementioned batting order-related animations. On the other hand, if instruction information "99" is set, the instruction monitor should display "-" (or at least another form of identification information that is different from the aforementioned "0" or hidden, and also different from each instruction). Similarly, in this case, no instructions will be issued on the main side. However, in this case, the sub-side may not perform the aforementioned batting order-related animations.

If "0" is displayed (or hidden) on the instruction monitor, it becomes possible to have a sub-system display a batting order-related animation for showcasing the game's mechanics, such as a 7-alignment navigation (which doesn't affect the payout even if the navigation isn't followed) to indicate a bonus payout when a specific combination of symbols is hit (e.g., a button-press replay). Of course, it's also possible to display unrelated anticipation animations instead of these batting order-related animations.

Furthermore, when the instruction monitor displays "1" through "6", the corresponding batting order navigation should be performed on the sub-system. For example, if the instruction monitor displays "1", the batting order "123" (stopping the reels in the order left, middle, right) should be instructed; if the instruction monitor displays "2", the batting order "132" (stopping the reels in the order left, right, middle) should be instructed; if the instruction monitor displays "3", the batting order "213" (stopping the reels in the order middle, left, right) should be instructed; if the instruction monitor displays "4", the batting order "312" (stopping the reels in the order middle, right, left) should be instructed; if the instruction monitor displays "5", the batting order "231" (stopping the reels in the order right, left, middle) should be instructed; and if the instruction monitor displays "6", the batting order "321" (stopping the reels in the order right, middle, left) should be instructed. Also, when "-" is displayed on the instruction monitor, as described above, the batting order-related animations should not be performed on the sub-system.

Next, we will explain the settings for internal winning information and instruction information in the AT state, as well as the settings for internal winning information and instruction information in the non-advantageous section.

(Setting method 1 in AT state (advantageous period))
The embodiment 1 shown in Figure 79 illustrates an example of how internal winning information and instruction information are set during the AT state (increase period) of the advantageous section.

In this embodiment 1, when a win occurs with "F_Normal Replay," "F_Cherry," "F_Common Bell," "F_Common Single-Coin Win A," "F_Common Single-Coin Win B," or "F_Watermelon," internal win information ("1," "2," "3," "16," "17," or "18") is set, allowing the sub-system to identify each win.

Furthermore, if the modified "Push-Order Bell A" is selected, the sub-system can identify that one of these has been selected, but it cannot identify which one it was. Internal selection information ("80") is set in this way. In other words, internal selection information is set that groups the modified "Push-Order Bell A"s. However, since instruction information "1" to "6" are set that allows the sub-system to identify the correct button sequence for each, it is possible to notify the system of a favorable stopping operation even with this configuration.

Furthermore, if the modified "Push-Order Bell B" is selected, the sub-system can identify that one of these has been selected, but it cannot identify which one it was. Internal selection information ("81") is set in this way. In other words, internal selection information is set that groups the modified "Push-Order Bell B" combinations. However, since instruction information "3" to "6" are set that allows the sub-system to identify the correct button sequence for each combination, it is possible to provide notification of a favorable stopping operation even with this configuration.

Furthermore, if you win either "F_2-choice 1-coin win A" or "F_2-choice 1-coin win B," the sub-system can identify that you won one of these, but it cannot identify which one you won. An internal win information ("82") is set in this way. In other words, internal win information is set that groups "F_2-choice 1-coin win A" and "F_2-choice 1-coin win B." However, since these are not push-order wins, this configuration does not affect the AT state. It is also possible to set different instruction information for each, so that the correct button press position can be notified.

(Setting method 2 in AT state (advantageous period))
The embodiment 2 shown in Figure 79 illustrates another example of how internal winning information and instruction information are set during the AT state (increase period) of the advantageous section.

In this embodiment 2, when a win occurs with "F_Normal Replay," "F_Cherry," "F_Common Bell," "F_Common Single-Coin Win A," "F_Common Single-Coin Win B," or "F_Watermelon," internal win information ("1," "2," "3," "16," "17," or "18") is set, allowing the sub-system to identify each win.

Furthermore, if the modified "Push-Order Bell A" is selected, the sub-system can identify that one of these has been selected, but it cannot identify which one it was. Internal selection information ("80") is set in this way. In other words, internal selection information grouping the modified "Push-Order Bell A" is set. In this embodiment 2, if "F_Push-Order Bell A_123" or "F_Push-Order Bell A_132" is selected, instruction information "10" is set. This instruction information "10" is configured as instruction information that only notifies the correct button sequence for the first stop operation (left first stop), for example, "1-?-?". In other words, in this embodiment 2, if the modified "Push-Order Bell A" is selected, a two-choice challenge performance for the second stop operation is performed. This is merely an example.

Similarly, instruction information "20" is configured as instruction information that only reports the correct batting order for the first stop operation (first stop on the middle), for example, "?-1-?", and instruction information "30" is configured as instruction information that only reports the correct batting order for the first stop operation (first stop on the right), for example, "?-?-1".

Furthermore, if the modified "Push-Order Bell B" is selected, the sub-system can identify that one of these has been selected, but it cannot identify which one it was. Internal selection information ("81") is set in this way. In other words, internal selection information is set that groups the modified "Push-Order Bell B" combinations. However, since instruction information "3" to "6" are set that allows the sub-system to identify the correct button sequence for each combination, it is possible to provide notification of a favorable stopping operation even with this configuration.

Furthermore, if you win either "F_2-choice 1-coin win A" or "F_2-choice 1-coin win B," the sub-system can identify that you won one of these, but it cannot identify which one you won. An internal win information ("82") is set in this way. In other words, internal win information is set that groups "F_2-choice 1-coin win A" and "F_2-choice 1-coin win B." However, since these are not push-order wins, this configuration does not affect the AT state. It is also possible to set different instruction information for each, so that the correct button press position can be notified.

(Settings during non-advantageous periods)
The configuration shown in Figure 79 is an example of how internal winning information and instruction information are set during a non-advantageous period (non-AT state).

In this configuration, when a win occurs with "F_Normal Replay," "F_Cherry," "F_Common Bell," "F_Common Single-Coin Win A," "F_Common Single-Coin Win B," or "F_Watermelon," internal win information ("1," "2," "3," "16," "17," or "18") is set, allowing the sub-system to identify each win.

Furthermore, if the player wins the modified version "Push-Order Bell A," the sub-system can identify that one of these has been won, but it cannot identify which specific version was won. An internal winning information ("80") is then set.

Furthermore, if the player wins one of the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," or "F_2-Choice Single-Coin Win B," the sub-system can identify that the player won one of these, but it cannot identify which specific win it was. This internal win information ("98") is then set. In other words, internal win information is set that groups the modified versions of "Push-Order Bell B," "F_2-Choice Single-Coin Win A," and "F_2-Choice Single-Coin Win B."

Furthermore, in this embodiment, if the player wins the modified "Push-Order Bell B," "F_2-Choice Single-Coin Win A," or "F_2-Choice Single-Coin Win B," the instruction information is set to "99," and if the player wins any other combination, the instruction information is set to "0."

(Example of transmission information control for modified versions of the button-press sequence bell (Part 2))
Next, with reference to Figure 80, an example of transmission information control (part 2) using a modified version of the push-button bell will be explained. As mentioned above, this transmission information control example (part 2) is a control example configured so that, when in a non-AT state, information regarding the internal winning combination is not transmitted to the sub-side. Figure 80 also shows a schematic flowchart illustrating an example of this transmission information control example (part 2). Therefore, the specific control process in this transmission information control is not necessarily limited to what is shown in Figure 80.

First, the main CPU 101 determines whether or not the game is in AT mode when the game starts (for example, when the start operation is performed) (S4011). That is, the main CPU 101 determines whether or not the current state is in AT mode. If the main CPU 101 determines that the game is in AT mode (S4011 is YES), it moves the process to S4013.

On the other hand, if the main CPU 101 determines that it is not in AT mode (S4011 is NO), it determines whether or not a rare role has been won (S4012). If the main CPU 101 determines that a rare role has not been won (S4012 is NO), it terminates the process.

On the other hand, if the main CPU 101 determines that a rare role has been won (S4012 is YES), it moves the process to S4013. If S4011 is YES, or if S4012 is YES, the main CPU 101 performs the transmission information setting process (S4013). After that, it terminates the process.

Furthermore, during the transmission information setting process, if the system is in AT mode (S4011 is YES), internal winning information and instruction information are transmitted according to one of the AT mode setting configurations shown in Figure 79. Also, if the system is not in AT mode (S4011 is NO), but a rare role is won (S4012 is YES), internal winning information corresponding to the won rare role is exceptionally transmitted. In this case, if the instruction information corresponding to the won rare role is "0", the instruction information may also be transmitted.

On the other hand, if the system is not in AT mode (S4011 is NO) and has not hit a rare role (S4012 is also NO), then no information related to the internal winning role is set in the first place (processing of S4013 is not performed), and no information is sent to the sub-system. Note that "rare role" here refers to roles such as "F_Cherry" or "F_Watermelon".

In this way, even if a biased bell pattern, such as the modified "Push Order Bell B," is included, the sub-system will not be able to recognize this win outside of the AT state. Therefore, players will not need to be aware of biased bell wins, and will be more likely to play in a specific manner (left first stop) that is advantageous for AT-related processing. Furthermore, since there is no need to consider how to configure internal win information and instruction information in non-AT states, the control load and data volume can be reduced, and the ease of designing the gaming machine can be improved.

However, if no information related to the internal winning role were transmitted for any role, the sub-system would not perform any anticipation-building or other effects corresponding to the type of internal winning role, which could significantly reduce the enjoyment of the game. Therefore, in this example, when a rare role is won, the transmission information setting process is exceptionally performed even in a non-AT state.

Furthermore, in line with the above considerations, it may be possible to omit the processing in S4012 and instead proceed to the processing in S4013 if it is determined in S4011 that the player is in AT mode, but terminate the process if it is determined in S4011 that the player is not in AT mode (i.e., in a non-AT state), without making an exception for rare roles, and thus prevent the transmission information setting process from being performed.

Furthermore, with this configuration, for example, if a rare role, or at least a role other than the biased bell (or a group other than the group containing the biased bell), is drawn, a different type of lock animation may be executed. The type of lock animation may be transmitted to the sub-system via a lock command, ensuring that no batting order-related animations are performed for biased bells, while allowing animations related to the internally drawn role to be performed for roles unrelated to biased bells.

<Gaming machine using the specifications of the first gaming machine (modified version)>
According to the first gaming machine (modified version), by using its specifications, a gaming machine with the following configuration can be provided, for example.

For example, the gaming machine has a preferred state in which decisions related to the AT state are favored, and a non-preferred state in which the machine is not in the preferred state. It is possible to control the machine to either state when it is not controlled to the AT state. The machine is configured such that when a stop operation is performed in a specific manner (e.g., left first stop), the expected value of the game value granted is lower than when the stop operation is not performed in that specific manner. It is possible to perform a preferential control that allows the machine to control at least the next game to the preferred state when the stop operation is performed in that specific manner, and to control at least the next game to the non-preferred state when the stop operation is not performed in that specific manner. Furthermore, in a specific performance where the display content progresses according to the progress of the game (e.g., an anticipation performance), if the stop operation is not performed in that specific manner during a game in the preferred state, it is possible to display a specific standby display (e.g., a standby display) corresponding to the type of specific performance being executed.

Furthermore, the specific stopping operation is not limited to the configuration where the first stop is the left reel. For example, the system may be configured so that performing the first stop operation on any of the other reels constitutes the specific stopping operation. Also, for example, if the variable display unit consists of four reels, the system may be configured so that performing the stopping operation on two specific reels in a specific order constitutes the specific stopping operation. Additionally, the system may be configured so that performing the stopping operation on a specific reel (e.g., the left reel) at a specific pressing position constitutes the specific stopping operation.

Furthermore, while the stopping operation method that controls the game to a favorable state is configured such that the expected value of the gameplay is lower than that of the stopping operation method that controls the game to a non-favorable state, such favorable control may also be performed even if the expected value of the gameplay is the same. That is, even if the game configuration does not include biased bells, a specific stopping operation method that can control the game to a favorable state may be defined, and the game may be configured so that the game can be controlled to a favorable state when the stopping operation is performed in that specific manner, and to be controlled to a non-favorable state when the stopping operation is not performed in that specific manner.

Furthermore, the specific standby indicator can be used for various purposes. For example, it can be used to notify or suggest that the progress of a performance is on hold, or to notify or suggest that the game is being controlled to a non-preferential state. It can also be used to notify or suggest that a performance has ended prematurely. Furthermore, it can be used to notify or suggest that the player has been disadvantaged due to the failure to perform a stop operation in a specific manner. It can also be used to notify or suggest that the game should be played using the recommended method (e.g., performing a stop operation in a specific manner). In other words, it can be used to notify or suggest various information related to preferential control, or various information related to the progress of performances.

Furthermore, for example, preferential control is a feature that can be implemented in a gaming machine when a normal role is determined to be the winning role.

Furthermore, for example, preferential control is possible in a gaming machine regardless of which role is determined as the winning role.

The games in which preferential control may be applied can be arbitrarily set according to predetermined control conditions. For example, preferential control may be applied under different conditions during normal play (advantageous period), during the CZ (Chance Zone), and during the ST (Special Time) period. For example, in one of these states, the control may be executed regardless of which role is determined as the winning role, while in the other states, it may be executed only when a normal role is determined as the winning role. Furthermore, even within the same state, for example, the control may be executed regardless of which role is determined as the winning role during one play period, while during another play period, it may be executed only when a normal role is determined as the winning role.

Furthermore, for example, this is a gaming machine that allows control over whether the game is in a favorable or unfavorable state on a per-game basis. However, as mentioned above, such favorable control may be implemented across multiple game units, or even at the stop operation unit within a single game.

For example, in a game in a favorable state, it may be possible to decide to control the game to a favorable state if the first stop operation is performed in a specific manner. Furthermore, it may be possible to decide whether or not to control the game to a favorable state in the second stop operation, and if it is decided not to control the game to a favorable state, the game may be controlled to a non-favorable state. Alternatively, for example, in a game in a favorable state, it may be possible to decide to control the game to a non-favorable state if the first stop operation is not performed in a specific manner. However, in the second stop operation, if certain conditions are met, such as not achieving a favorable batting order, it may be possible to decide to control the game to a favorable state, and if it is decided to control the game to a favorable state, the game may be controlled to a favorable state.

Furthermore, for example, in a game under a preferential state, the value of the preferential counter is deducted by 1. If a specific type of stop operation is performed during that game, the value of the preferential counter is increased by 1. Conversely, if the specific type of stop operation is not performed, the value of the preferential counter is not increased by 1. This game machine controls games where the value of the preferential counter is 1 or greater to be under a preferential state.

Furthermore, for example, in a game where a game is in a favorable state, even if a stop operation is performed in a specific manner, the value of the favorable counter may not be increased by 1.

Alternatively, instead of a preferential counter, a non-preferential counter could be provided to manage the duration of non-preferential gameplay. The non-preferential counter value would be incremented by 1 during preferential gameplay, and decremented by 1 if a specific type of stop operation is performed during such gameplay. Conversely, if no specific type of stop operation is performed, the non-preferential counter value would not be decremented. The system could then be configured to control games where the non-preferential counter value is 1 or greater into a non-preferential state.

Furthermore, in this case, the system may be configured so that even if a stop operation is performed in a specific manner during a game in a favorable state, the value of the non-favorable counter is not deducted by 1.

Furthermore, for example, if a power outage occurs while a specific standby display is shown, the gaming machine is capable of continuing to display the specific standby display even after the power is restored.

Furthermore, for example, if a setting change is made while a specific standby display is being shown, the gaming machine can continue to display the specific standby display even after the setting change.

Furthermore, the methods for continuing the specific standby display when transitioning from one situation to another are not limited to those described above. For example, if a game ends and a predetermined time (e.g., 30 seconds) has elapsed, and it is determined that the player is in a non-game state, normally the demonstration screen would be displayed. However, if the specific standby display was being shown, the system may be configured to continue displaying the specific standby display instead of the demonstration screen. Also, in this case, for example, if another predetermined time (e.g., 2 hours) has elapsed since it was determined that the player is in a non-game state, the specific standby display may be terminated, and the normal demonstration screen may be displayed.

Furthermore, for example, a specific performance may include a continuous performance that runs across multiple games. If a specific stop operation is not performed while a continuous performance is running during a game in a favorable state, the game machine will display a specific standby indicator during that game, and then allow the performance displayed during that game to be executed again in the next game.

Furthermore, "re-executing" includes not only executing the entire sequence from the beginning, but also executing only a portion of it. If adjustments are needed during re-execution, the overall structure of the sequence can be kept the same, only the execution time can be changed, or parts of the sequence can be omitted or added. In other words, the sequence should be perceived by the player as a re-execution without causing any discomfort; it does not necessarily have to be exactly the same.

Furthermore, a continuous performance sequence only requires that related performances are executed across multiple games. This includes not only sequences where predetermined information is announced or suggested across multiple games as a set, but also sequences where predetermined information is announced or suggested for each individual game, and these sequences can be executed across multiple games. Moreover, the performances do not necessarily have to occur in consecutive games. For example, if a performance scenario (performance control state) for controlling performance tendencies is determined during a specific game period, such as a premonition state, and related performances can be executed between non-consecutive games, then a performance executed in one game can be executed again in a subsequent game, even if the games are not consecutive.

Furthermore, for example, when a stop operation is first detected, if that stop operation is directed to a specific display column (e.g., the left reel), it becomes a specific mode; if the stop operation is not directed to a specific display column, it does not become a specific mode. The specific effect is an anticipation-building effect that is executed from the start of gameplay. In a game where the specific effect is executed during a favorable state, if the first stop operation is not directed to a specific display column, the game machine displays a specific standby indicator from that point onward.

Furthermore, the initial detection of a stop operation may occur at the exact moment the first stop operation is performed (when the stop button is pressed and turns ON, or when it turns OFF after being pressed), or at any point after the first stop operation but before the second stop operation.

Furthermore, for example, the machine has a favored state in which decisions related to the AT state are given preferential treatment, and a non-favored state in which such preferential treatment does not occur. It is possible to control the machine to either state when it is not controlled to the AT state. When a stop operation is performed in a specific manner (e.g., left first stop), the expected value of the game value granted is lower than when the stop operation is not performed in that specific manner. During the ST (Special Time) period, which is a non-AT state, the game is more advantageous to the player than during normal play (advantageous section), and is configured to continue for a predetermined period (e.g., 16 games). It is possible to implement preferential control that allows the next game to be controlled to a favored state when a stop operation is performed in that specific manner, and to control the next game to a non-favored state when the stop operation is not performed in that specific manner. The predetermined period progresses according to each game played, regardless of whether the machine is in a favored state or not. The degree of advantage during ST may change to a more advantageous state when the game is played in a favored state, but it does not change to a more advantageous state when the game is played in a non-favored state.

Furthermore, the ST (Special Time) mode does not necessarily have to be more advantageous than the normal mode (advantageous period). Also, such control may be performed during the normal mode (advantageous period) or the CZ (Chance Zone). Of course, this gaming machine can also perform specific standby displays, similar to those described above, and various related controls can be implemented. For example, if the machine is configured to execute the same anticipation-building effects during both the normal mode (advantageous period) and the ST mode, the specific standby displays may be configured to have different content for the normal mode (advantageous period) and the ST mode.

[Fourth Embodiment]
The first to third embodiments have been described above. The fourth embodiment will now be described. The basic configuration of the pachislo machine 1 according to the fourth embodiment is the same as that of the pachislo machine 1 according to the first to third embodiments. In the following description, components that are the same as those of the pachislo machine 1 according to the first to third embodiments will be denoted by the same reference numerals. Furthermore, explanations of parts that apply to the fourth embodiment as described in the first to third embodiments will be omitted.

Furthermore, even if the above description includes phrases that limit the description to the pachislo machine 1 according to the first embodiment, such as "In the first embodiment,..." or "In the pachislo machine 1 of the first embodiment,...", these descriptions can also be applied to the pachislo machine 1 according to the fourth embodiment, to the extent that they do not depart from the spirit of the fourth embodiment. Similarly, any descriptions in the above description that limit the description to the pachislo machine 1 according to the second and third embodiments can also be applied to the pachislo machine 1 according to the fourth embodiment, to the extent that they do not depart from the spirit of the fourth embodiment. Therefore, it is possible to partially substitute or combine the configurations shown in the first to third embodiments (including the configurations shown in the modified examples and the configurations shown in the extended examples) with the configurations shown in the fourth embodiment.

Furthermore, even if the shape differs from that of the pachislo machine 1 according to the first to third embodiments, components with similar functions may be assigned the same reference numerals for convenience. Also, even if the shape and processing are the same as those of the pachislo machine 1 according to the first to third embodiments, different reference numerals or step numbers may be assigned for convenience.

<Flowchart of transitions between game states>
Figure 81(a) is a diagram showing the transitions between game states according to the fourth embodiment of the present invention. Figure 81(b) is a table summarizing the transition conditions for game states according to the fourth embodiment of the present invention.

As described in the first embodiment, the pachislo machine 1 allows for various game states to be provided in order to vary the player's advantage or to achieve the intended gameplay. In this embodiment, the game states shown in Figure 81(a) are managed by the main control circuit 100. These game states include a non-bonus winning state, a state between flags, and a bonus state.

The "Non-Bonus Winning State" is a state where a bonus has not been won and the bonus has not been activated (awarded). The "Flag Interval State" is a state where a bonus symbol is carried over as an internal winning symbol; that is, a bonus symbol has been won, but the bonus has not been activated. The "Bonus State" is a state where the bonus is activated. As explained in the first embodiment, the "Flag Interval State" is sometimes referred to as the "Carryover State," "(Bonus) Flag Interval," or "(Bonus) Internal Interval." When a bonus symbol is won and the combination of symbols related to that bonus symbol is displayed on an active payline, it is possible to transition to the bonus state (activate the bonus state).

In this embodiment, a 3BB game state is provided as a bonus state. The bonus role corresponding to the 3BB game state is "F_3BB" (see Figures 84A to 84E). Furthermore, a 3BB flag state is provided as a flag-interval state.

The state between the 3BB flags is configured as an RT state (RT1 game state). As explained in the first embodiment, the RT state is a state in which the drawing method of the replay role can be changed compared to the state in which the RT state is not active (non-RT state). The state in which a bonus is not won is configured as a non-RT state (RT0 game state).

Referring specifically to Figures 81(a) and 81(b), when "F_3BB" is determined as the internal winning combination in a non-bonus state (i.e., an internal win occurs), the main control circuit 100 transitions the game state from the non-bonus state to the 3BB flag state (see transition condition (1)).

"F_3BB" (3BB) is a carryover symbol (see Figure 18). When 3BB is an internal win, the state of 3BB being an internal win is carried over until the combination of symbols corresponding to 3BB (shown as "C_3BB" in Figure 83A) stops and is displayed along the active line (until 3BB is awarded). The 3BB flag state is the state where 3BB is an internal win and this state is carried over.

In the 3BB flag state, when a combination of symbols related to "C_3BB" stops and is displayed along the active line (i.e., a 3BB is won), the main control circuit 100 transitions the game state from the 3BB flag state to the 3BB game state (see transition condition (2)). If more than the specified number of medals (55) are paid out in the 3BB game state, the main control circuit 100 transitions the game state from the 3BB game state to the non-bonus winning state (see transition condition (3)).

<Pattern Placement Table>
Figure 82(a) shows a pattern arrangement table.

The symbol arrangement table shown in Figure 82(a) represents the arrangement of symbols on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbol arrangement table defines the correspondence between 20 symbol positions "0" to "19" and the symbols corresponding to each of these positions.

Symbol positions "0" through "19" indicate the positions of symbols arranged along the rotation direction on the left reel 3L, the middle reel 3C, and the right reel 3R. The symbols corresponding to symbol positions "0" through "19" can be identified by referring to the symbol arrangement table using the symbol counter value. The types of symbols include "V," "Seven," "Bar," "Watermelon," "Cherry," "Bell A," "Bell B," "Reel A," "Reel B," and "Blank."

<Pattern Code Chart>
Figure 82(b) is a diagram showing the pattern code table.

As shown in Figure 82(b), each pattern on each reel 3L, 3C, and 3R is identified by a pattern code table, and in this embodiment, is distinguished by 1 byte (8 bits) of data. The pattern code table shown in Figure 82(b) represents the pattern codes, which serve as data for identifying the patterns on the surfaces of the three reels 3L, 3C, and 3R.

For example, the symbol arrangement table shown in Figure 82(a) was explained as representing the arrangement of symbols placed on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R. However, the symbol arrangement table actually stored in the main ROM 102 represents the arrangement of symbol codes that identify the symbols placed on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R.

In this embodiment, the symbols used in the pachislo machine 1 are, as described above, 10 types: "V", "Seven", "Bar", "Watermelon", "Cherry", "Bell A", "Bell B", "Replay A", "Replay B", and "Blank". In the symbol code table, the symbols "V", "Seven", "Bar", "Watermelon", "Cherry", "Bell A", "Bell B", "Replay A", "Replay B", and "Blank" are assigned symbol codes from "1" to "10".

<Pattern combination table>
Figures 83A and 83B show pattern combination tables.

The symbol combination table defines the correspondence between symbol combinations that can be displayed on the active payline and the number of medals dispensed when that symbol combination is displayed on the active payline. The symbol combinations are shown from left to right, including the symbols on the left reel 3L, the middle reel 3C, and the right reel 3R. The names assigned to each combination are also shown.

The number of medals dispensed is shown for the following scenarios: the number of medals dispensed when playing with one medal, the number of medals dispensed when playing with two medals, and the number of medals dispensed when playing with three medals. In this specification, a unit game played with one medal inserted is sometimes referred to as a "one-medal game," a unit game played with two medals inserted is sometimes referred to as a "two-medal game," and a unit game played with three medals inserted is sometimes referred to as a "three-medal game." In this embodiment, the number of medals that can be inserted in each game state is set to three.

The active lines are defined as a pseudo-line (upper-middle-lower) connecting the upper area of the left reel 3L, the middle area of the middle reel 3C, and the lower area of the right reel 3R. As explained in the first embodiment, the active lines are activated when the required number of tokens (the number of tokens needed to start the game) are bet.

The pattern combination tables shown in Figures 83A and 83B associate pattern combinations ("combinations") identified by 13-byte storage area identification data with the number of medals dispensed for each combination when displayed on an active line during single-coin, double-coin, or triple-coin play.

In the diagram, some combinations are shown together. For example, "C_Removed Replay B_01-02" is composed of two combinations: "C_Removed Replay B_01" and "C_Removed Replay B_02". The combination called "C_Removed Replay B_01" corresponds to the symbol combination "V-Replay A-Bar", and the combination called "C_Removed Replay B_02" corresponds to the symbol combination "V-Replay A-Cherry". When these combinations appear along the active payline, no medals are paid out, but the re-play function is activated.

Similarly, "C_321 Bell B_01-06" is composed of six combinations: "C_321 Bell B_01" through "C_321 Bell B_06". In the diagram, for "C_321 Bell B_01-06", three symbols ("Seven," "V," and "Cherry") are specified for the left reel 3L, two symbols ("Bell B" and "Bell A") are specified for the middle reel 3C, and one symbol ("Bell A") is specified for the right reel 3R. Therefore, "C_321 Bell B_01-06" contains 3 x 2 x 1 = 6 combinations. When these combinations appear along the paylines, 15 medals are paid out.

Furthermore, if the combination "V-Rep B-V," known as "C_3BB," appears along the active payline, no medals will be paid out, but the game state will transition to the 3BB game state.

In the diagrams, "REP" indicates a combination that activates a replay (re-play) upon winning, "FRU" indicates a combination that dispenses medals upon winning, and "BB" indicates a combination that activates the BB game state (3BB game state) upon winning (see Figures 11-14).

<Flag-based Combination Table>
Figures 84A to 84E show combination tables by flag.

The flag-based combination table defines the correspondence between various internal winning combinations and the symbol combinations that can be displayed on the active payline. Therefore, once the internal winning combination is determined, the type of symbol combination that can be displayed on the active payline (the type of winning combination that can be displayed) is uniquely determined.

Specifically, the flag-specific combination tables shown in Figures 84A to 84E indicate combinations that are permitted to be displayed on the active lines in accordance with the internal winning combinations. In this embodiment, the internal winning combinations are "F_3BB", "F_Replay A", "F_Replay B", "F_213Bell A", "F_213Bell B", "F_213Bell C", "F_213Bell D", "F_231Bell A", "F_231Bell B", "F_231Bell C", "F_231Bell D", "F_312Bell A", "F_312Bell B", "F_312Bell C", "F_312Bell D", and "F_321Bell The following symbols are included: "Lu A", "F_321 Bell B", "F_321 Bell C", "F_321 Bell D", "F_Common Bell A", "F_Common Bell B", "F_Single Coin A", "F_Single Coin B", "F_Cherry", "F_Parallel Watermelon", "F_Diagonal Watermelon", "F_Winning Combination A", "F_Winning Combination B", "F_Winning Combination C", "F_BB Guaranteed Combination A", "F_BB Guaranteed Combination B", "F_Common Single Coin", and "F_Common 15 Coin".

For example, if the internal winning combination is "F_3BB", then displaying "C_3BB" on the active line is permitted. That is, if the internal winning combination is "F_3BB", it indicates that the internal winning combination is BB (3BB).

Furthermore, if the internal winning combination is "F_Replay B," then "C_Missed Replay B_01-02," "C_Missed Replay A_01-02," "C_Middle Replay A_01-04," "C_Lower Replay A_01-06," "C_CU Replay_01-03," "C_Upper Replay B_01-06," "C_Upper Replay A_01-03," and "C_CD Replay_01-04" are permitted to be displayed on the active lines.

Furthermore, if the internal winning combination is "F_213 Bell A", then "C_One-Single Combination C6_01-02", "C_One-Single Combination C2_01-02", "C_One-Single Combination C1_01-02", "C_Middle Right One-Single Combination B_01-04", "C_Middle Right One-Single Combination A_01-04", "C_Control Combination E1_01-02", "C_Control Combination D6_01-02", "C_Control Combination D5_01-02", "C_Control Combination D1_01-02", "C_Control Combination B3_01-02", "C_Control Combination B2_01-02", "C_Control Combination B1_01-02", "C_Control Combination A4_01-02", "C_Control Combination A2_01-02", "C_Control Combination A1_01-02", and "C_213 Bell A_01-03" are permitted to be displayed on the active lines.

<Internal Lottery Table>
The internal lottery tables in this embodiment include an internal lottery table referenced in the non-bonus winning state (RT0 game state) (see Figure 85), an internal lottery table referenced in the 3BB flag state (RT1 game state) (see Figure 86(a)), and an internal lottery table referenced in the BB game state (3BB game state) (see Figure 86(b)).

Figure 85 shows the internal lottery table for the RT0 game state. Figure 86(a) shows the internal lottery table for the RT1 game state. Figure 86(b) shows the internal lottery table for the BB game state.

The multiple internal lottery tables shown in Figures 85 and 86 are stored in the main ROM 102, corresponding to each game state and each number of tokens inserted. For each setting from 1 to 6, they show the probability of winning each flag with a denominator of 65536. For example, in Figure 85, the lottery value "4308" is assigned to "F_213 Bell A". Therefore, the probability of "F_213 Bell A" winning internally is "4308/65536".

The cases in which "F_3BB" wins internally are defined as two: when "F_3BB" wins internally on its own, and when "F_3BB" wins internally in conjunction with other internal winning combinations. In Figures 85 and 86, the case where "F_3BB" wins internally on its own is denoted as "F_3BB," and the case where "F_3BB" wins internally in conjunction with other internal winning combinations is denoted as "F_3BB + (other internal winning combinations)."

As shown in Figure 85, in RT0 gameplay, "F_Common Bell B," "F_Single Coin A," "F_Single Coin B," "F_Cherry," "F_Parallel Watermelon," "F_Diagonal Watermelon," "F_Winning Combination A," "F_Winning Combination B," "F_Winning Combination C," "F_BB Guaranteed Combination A," and "F_BB Guaranteed Combination B" can all be internally awarded in conjunction with "F_3BB." Furthermore, if "F_Common Bell B," "F_Single Coin A," "F_Single Coin B," "F_Cherry," "F_Parallel Watermelon," "F_Diagonal Watermelon," "F_Winning Combination A," "F_Winning Combination B," "F_Winning Combination C," "F_BB Guaranteed Combination A," and "F_BB Guaranteed Combination B" are internally awarded, then "F_3BB" is always internally awarded.

As mentioned above, in RT1 gameplay, "F_3BB" is already an internal win. Therefore, as shown in Figure 86(a), in RT1 gameplay, internal win symbols other than "F_Common Bell B," "F_Single Coin A," "F_Single Coin B," "F_Cherry," "F_Parallel Watermelon," "F_Diagonal Watermelon," "F_Reach Symbol A," "F_Reach Symbol B," "F_Reach Symbol C," "F_BB Guaranteed Symbol A," and "F_BB Guaranteed Symbol B" are also internal wins, overlapping with "F_3BB." Note that in RT1 gameplay, "Miss" is not the only win, so a draw value of "0" is assigned to "Miss."

Note that the draw values for each winning combination shown in Figures 85 and 86 are the same across all settings; however, it is permissible to introduce setting differences for some or all winning combinations.

<Correspondence between internal winning symbols, stopping operation methods, and display symbols, etc.>
Figure 87 is a diagram showing an example of the correspondence between internal winning symbols, stop operation modes, and display symbols.

In the first embodiment, we explained which combination of symbols (which can also be referred to as display symbol, winning symbol, stop display mode, display result, etc.) is displayed depending on the stop operation mode when a winning combination of internal symbols is achieved (see Figure 15). In this embodiment, the correspondence between internal winning symbols, stop operation modes, and display symbols, etc., is configured as shown in Figure 87.

In the diagram, "1→2→3" indicates the case where the first stop operation is performed on the left reel 3L, the second stop operation is performed on the middle reel 3C, and the third stop operation is performed on the right reel 3R (batting order 1). "1→3→2" indicates the case where the first stop operation is performed on the left reel 3L, the second stop operation is performed on the right reel 3R, and the third stop operation is performed on the middle reel 3C (batting order 2).

"2→1→3" indicates the case where the first stop operation is performed on the middle reel 3C, the second stop operation is performed on the left reel 3L, and the third stop operation is performed on the right reel 3R (batting order 3). "2→3→1" indicates the case where the first stop operation is performed on the middle reel 3C, the second stop operation is performed on the right reel 3R, and the third stop operation is performed on the left reel 3L (batting order 4).

"3→1→2" indicates the case where the first stop operation is performed on the right reel 3R, the second stop operation is performed on the left reel 3L, and the third stop operation is performed on the middle reel 3C (batting order 5). "3→2→1" indicates the case where the first stop operation is performed on the right reel 3R, the second stop operation is performed on the middle reel 3C, and the third stop operation is performed on the left reel 3L (batting order 6).

Specifically, if "F_Replay A" is determined as the internal winning combination, when the machine is stopped according to turn order 1 or 2, "Normal Replay" will be displayed along the active line. When the machine is stopped according to turn order 3 through 6, if the timing is successful, "Missed Replay" will be displayed along the active line, and if the timing is unsuccessful, "Normal Replay" will be displayed along the active line. Similarly, if "F_Replay B" is determined as the internal winning combination, when the machine is stopped according to turn order 1 or 2, "Normal Replay" will be displayed along the active line. When the machine is stopped according to turn order 3 through 6, if the timing is successful, "Missed Replay" will be displayed along the active line, and if the timing is unsuccessful, "Normal Replay" will be displayed along the active line.

"Normal Replay" is a general term for "C_Middle Replay A_01-04", "C_Lower Replay A_01-06", "C_CU Replay_01-03", "C_Upper Replay B_01-06", "C_Upper Replay A_01-03", and "C_CD Replay_01-04" (see Figure 83A). "Missed Replay" is a general term for "C_Missed Replay B_01-02" and "C_Missed Replay A_01-02" (see Figure 83A).

As shown in Figure 84E, the content of the "missed replays" that are permitted to be displayed on the active payline differs depending on whether the internal winning combination is "F_Replay A" or "F_Replay B". Specifically, as mentioned above, when the internal winning combination is "F_Replay B", "C_missed replay B_01-02" and "C_missed replay A_01-02" are permitted to be displayed on the active payline as "missed replays". In contrast, when the internal winning combination is "F_Replay A", "C_missed replay A_01-02" is permitted to be displayed on the active payline as "missed replays", but "C_missed replay B_01-02" is not permitted to be displayed on the active payline. This is related to the gameplay of the pseudo-BIG (see Figure 88). Details will be discussed later.

Furthermore, if any of "F_213 Bell A," "F_213 Bell B," "F_213 Bell C," or "F_213 Bell D" is determined as the internal winning combination, when the stop operation is performed in turn 3, a combination that dispenses 15 medals if the stop is successful will be displayed along the active line, and a combination that dispenses 1 medal if the stop is unsuccessful will be displayed along the active line. When the stop operation is performed in any turn other than turn 3, a combination that dispenses 1 medal regardless of the stop will be displayed along the active line.

Furthermore, if any of "F_231 Bell A," "F_231 Bell B," "F_231 Bell C," or "F_231 Bell D" is determined as the internal winning combination, when the stop operation is performed in turn 4, a combination that dispenses 15 medals if the timing is successful will be displayed along the active line, and a combination that dispenses 1 medal if the timing is unsuccessful will be displayed along the active line. When the stop operation is performed in any turn other than turn 4, a combination that dispenses 1 medal regardless of timing will be displayed along the active line.

Furthermore, if any of "F_312 Bell A," "F_312 Bell B," "F_312 Bell C," or "F_312 Bell D" is determined as the internal winning combination, when the stop operation is performed in turn 5, a combination that dispenses 15 medals if the timing is successful will be displayed along the active line, and a combination that dispenses 1 medal if the timing is unsuccessful will be displayed along the active line. When the stop operation is performed in any turn other than turn 5, a combination that dispenses 1 medal regardless of timing will be displayed along the active line.

Furthermore, if any of "F_321 Bell A," "F_321 Bell B," "F_321 Bell C," or "F_321 Bell D" is determined as the internal winning combination, when the stop operation is performed in turn 6, a combination that dispenses 15 medals if the timing is successful will be displayed along the active line, and a combination that dispenses 1 medal if the timing is unsuccessful will be displayed along the active line. When the stop operation is performed in any turn other than turn 6, a combination that dispenses 1 medal regardless of timing will be displayed along the active line.

Thus, "F_213 Bell A," "F_213 Bell B," "F_213 Bell C," "F_213 Bell D," "F_231 Bell A," "F_231 Bell B," "F_231 Bell C," "F_231 Bell D," "F_312 Bell A," "F_312 Bell B," "F_312 Bell C," "F_312 Bell D," "F_321 Bell A," "F_321 Bell B," "F_321 Bell C," and "F_321 Bell D" are internal winning combinations (press-order bells) whose stopping combinations (symbol combinations) along the active lines differ depending on the stopping order (press order) for each reel 3L, 3C, and 3R. If a press-order bell is determined to be an internal winning combination, and the pressing order is correct and the timing of stopping is successful, 15 medals will be paid out.

Furthermore, if any of the following are determined as the internal winning combination: "F_Parallel Watermelon," "F_Diagonal Watermelon," "F_Cherry," "F_Winning Combination A," "F_Winning Combination B," "F_Winning Combination C," "F_BB Guaranteed Combination A," and "F_BB Guaranteed Combination B," the combination displayed along the active lines will differ depending on whether the stop operation is performed using turn order 1 or 2, or using any of turn orders 3 through 6.

For example, if any of "F_Reach Symbol A," "F_Reach Symbol B," and "F_Reach Symbol C" is determined as the internal winning combination, then when the stop operation is performed in turn 1 or turn 2, "One Reach Symbol" will be displayed along the active line. If the stop operation is performed in turn 3 through turn 6, "One Normal Symbol" will be displayed along the active line. "One Reach Symbol" is a general term for the symbol combinations shown in Figures 83A and 83B that include the word "Reach Symbol." "One Reach Symbol" is a symbol combination that can only be displayed along the active line if any of "F_Reach Symbol A," "F_Reach Symbol B," and "F_Reach Symbol C" is determined as the internal winning combination.

Furthermore, if either "F_BB Guaranteed Win A" or "F_BB Guaranteed Win B" is determined as the internal winning combination, when the reel stops according to turn order 1 or 2, "BB Guaranteed Reach" will be displayed along the active line. When the reel stops according to turn order 3 through 6, "Normal Winning Combination" will be displayed along the active line. "BB Guaranteed Reach" is a general term for the symbol combinations shown in Figures 83A and 83B that include the words "BB Guaranteed Win." "BB Guaranteed Reach" is a symbol combination that can only be displayed along the active line if either "F_BB Guaranteed Win A" or "F_BB Guaranteed Win B" is determined as the internal winning combination.

<Gameplay>
Figure 88 is a diagram showing an example of the transition flow of game states in the non-advantageous and advantageous sections according to the fourth embodiment of the present invention. Figure 89 is a diagram showing the transition of payout states according to the fourth embodiment of the present invention. Figure 90 is a table summarizing the payout state transition conditions according to the fourth embodiment of the present invention.

In the pachislo machine 1 according to the fourth embodiment, the main control circuit 100 manages the game state (payout state) shown in Figure 88, separately from the game state shown in Figure 81. As shown in Figure 88, the payout state is broadly divided into a non-advantageous period and an advantageous period.

As explained in the first embodiment, the advantageous period is a game period that can be controlled to a game state (AT state) in which information on advantageous stopping operations for the player is notified (see Figure 5). The advantageous period includes a performance period (advantageous period - normal gameplay) and an increase period (advantageous period - AT state). The performance period is basically a game state (non-AT state) in which information on advantageous stopping operations for the player is not notified. It is similar to the non-advantageous period in that it is a game state that is disadvantageous to the player compared to the AT state, but it differs from the non-advantageous period in that a transition in the payout state occurs. The increase period is the AT state (a game state that is advantageous to the player).

During the performance section, the payout state can be controlled to one of the following: Normal Stage, Chance Stage A, Chance Stage B, Consecutive Win Preparation, Consecutive Win Challenge, or Upgrade Chance. The Normal Stage, Chance Stage A, and Chance Stage B are collectively referred to as the Normal Payout State. Furthermore, during the increase section, the payout state can be controlled to one of the following: Pseudo-BIG or Pseudo-REG. The characteristics of each payout state are described in detail below.

As shown in Figures 89 and 90, if, during a non-advantageous period, the advantageous period transition lottery (see step S4001 in Figure 93) is successful, and the advantageous period transition lottery (see step S4003 in Figure 93) determines that the game should transition to the continuous win preparation state, the main control circuit 100 transitions the payout state from the non-advantageous period to the continuous win preparation state (see transition condition (A)). Furthermore, if, during a non-advantageous period, the advantageous period transition lottery (see step S4001 in Figure 93) is successful, and the advantageous period transition lottery (see step S4003 in Figure 93) determines that the game should transition to the continuous win challenge, the main control circuit 100 transitions the payout state from the non-advantageous period to the continuous win challenge state (see transition condition (B)).

If the consecutive win preparation mode results in a consecutive win preparation drop lottery (see step S4031 in Figure 95), the main control circuit 100 transitions the payout state from consecutive win preparation to the normal stage (see transition condition (C)). If the consecutive win preparation mode results in a consecutive win challenge transition lottery (see step S4027 in Figure 95), the main control circuit 100 transitions the payout state from consecutive win preparation to consecutive win challenge (see transition condition (D)).

In the normal stage, if the result of the normal stage transition flag/winning flag lottery (see step S4082 in Figure 103) determines that the player should transition to Chance Stage A, the main control circuit 100 transitions the payout state from the normal stage to Chance Stage A via a pre-announcement state (see transition condition (E)). In Chance Stage A, once the number of unit games determined by the Chance Stage start-up guarantee game count lottery (see step S4303 in Figure 126) has been played, the main control circuit 100 transitions the payout state from Chance Stage A to the normal stage (see transition condition (F)).

In the normal stage, if the result of the normal stage transition flag/winning flag lottery (see step S4082 in Figure 103) determines that the player should transition to Chance Stage B, the main control circuit 100 transitions the payout state from the normal stage to Chance Stage B via a pre-announcement state (see transition condition (G)). In Chance Stage B, once the number of unit games determined by the Chance Stage start-up guarantee game count lottery (see step S4303 in Figure 126) has been played, the main control circuit 100 transitions the payout state from Chance Stage B back to the normal stage (see transition condition (H)).

In the normal stage, if the result of the normal stage transition flag/winning flag lottery (see step S4082 in Figure 103) determines that the player should transition to the promotion chance, the main control circuit 100 transitions the payout state from the normal stage to the promotion chance via a pre-announcement state (see transition condition (I)). Also, in chance stage A, if the result of the chance stage pseudo-BIG/promotion chance lottery (see step S4306 in Figure 126) determines that the player should transition to the promotion chance, the main control circuit 100 transitions the payout state from chance stage A to the promotion chance via a pre-announcement state (see transition condition (I)). Also, in chance stage B, if the result of the chance stage pseudo-BIG/promotion chance lottery (see step S4306 in Figure 126) determines that the player should transition to the promotion chance, the main control circuit 100 transitions the payout state from chance stage B to the promotion chance via a pre-announcement state (see transition condition (I)).

Furthermore, in the normal stage, if the result of the normal stage transition flag/winning flag lottery (see step S4082 in Figure 103) determines that the game should transition to a pseudo-BIG, the main control circuit 100 transitions the payout state from the normal stage to the pseudo-BIG via a pre-announcement state (see transition condition (J)). Also, in the chance stage A, if the result of the chance stage pseudo-BIG/upgrade chance lottery (see step S4306 in Figure 126) determines that the game should transition to a pseudo-BIG, the main control circuit 100 transitions the payout state from the chance stage A to the pseudo-BIG via a pre-announcement state (see transition condition (J)). Furthermore, in Chance Stage B, if the result of the Pseudo-BIG/Upgrade Chance Lottery during Chance Stage (see step S4306 in Figure 126) determines that the game will transition to Pseudo-BIG, the main control circuit 100 transitions the payout state from Chance Stage B to Pseudo-BIG via a pre-announcement state (see transition condition (J)).

During the promotion chance, if the result of the promotion chance lottery (see step S4366 in Figure 133) determines that the game will transition to a pseudo-BIG, the main control circuit 100 transitions the payout state from the promotion chance to the pseudo-BIG (see transition condition (K)). If, during the promotion chance, the game does not determine that the game will transition to a pseudo-BIG, and the unit game is played a predetermined number of times (4 times), the main control circuit 100 transitions the payout state from the promotion chance to the pseudo-REG (see transition condition (L)).

In a pseudo-BIG bonus, if the consecutive win challenge lottery (see step S4408 in Figure 144) is won, and the termination conditions for the pseudo-BIG bonus are met, the main control circuit 100 transitions the payout state from the pseudo-BIG bonus to the consecutive win challenge bonus (see transition condition (M)). In a pseudo-REG bonus, if the consecutive win challenge lottery (see step S4483 in Figure 152) is won, and the termination conditions for the pseudo-REG bonus are met, the main control circuit 100 transitions the payout state from the pseudo-REG bonus to the consecutive win challenge bonus (see transition condition (M)). The termination conditions for the pseudo-BIG bonus and the pseudo-REG bonus will be explained later using Figure 91.

In a pseudo-REG (Regular Bonus), if the 1G consecutive draw (see step S4484 in Figure 152) is won, and the termination condition for the pseudo-REG is met, the main control circuit 100 transitions the payout state from pseudo-REG to pseudo-BIG (see transition condition (N)). Furthermore, in a pseudo-BIG (Big Bonus), if the 1G consecutive draw (see step S4384 in Figure 143) is won, and the termination condition for the pseudo-BIG is met, the main control circuit 100 controls the payout state back to pseudo-BIG.

In the Consecutive Win Challenge, if the result of the Consecutive Win Challenge lottery (see step S4525 in Figure 156) determines that the game should transition to the Upgrade Chance, the main control circuit 100 will transition the payout state from the Consecutive Win Challenge to the Upgrade Chance when the number of unit games determined by the Consecutive Win Challenge Start Lottery (see step S4523 in Figure 156) are played (see transition condition (O)). Similarly, if the result of the Consecutive Win Challenge lottery (see step S4525 in Figure 156) determines that the game should transition to the Pseudo-BIG, the main control circuit 100 will transition the payout state from the Consecutive Win Challenge to the Pseudo-BIG when the number of unit games determined by the Consecutive Win Challenge Start Lottery (see step S4523 in Figure 156) are played (see transition condition (P)).

In the Consecutive Win Challenge, if the result of the normal transition lottery at the end of the Consecutive Win Challenge (see step S4528 in Figure 156) determines that the game should transition to a non-advantageous zone, the main control circuit 100 transitions the payout state from the Consecutive Win Challenge to the non-advantageous zone (see transition condition (Q)). In the Consecutive Win Challenge, if the result of the normal transition lottery at the end of the Consecutive Win Challenge (see step S4528 in Figure 156) determines that the game should transition to the Consecutive Win Preparation zone, the main control circuit 100 transitions the payout state from the Consecutive Win Challenge to the Consecutive Win Preparation zone (see transition condition (R)).

The above describes typical transition routes for each payout state. In this embodiment, conditions other than those described above (A) to (R) are also provided as conditions for transitioning payout states. When any of these conditions are met, the payout state transitions from one to another. A more detailed explanation follows.

Furthermore, while the performance section can be designed to be disadvantageous to the player (a state where the value of the game, such as medals, decreases), it may also be possible to provide some information that would be advantageous to the player (for example, the correct order of batting for a specific winning combination or the combination of bonus symbols to be matched).

<AT state (pseudo-BIG and pseudo-REG)>
Figure 91(a) shows the numerical values displayed on the instruction monitor during pseudo-BIG and pseudo-REG. Figure 91(b) shows the content corresponding to the numerical values displayed on the instruction monitor.

As described in the first embodiment, in situations where the player is notified of a stop operation (AT state), the stop operation information is not only notified by the sub-side notification means (e.g., the main performance display unit 21) controlled by the sub-control circuit 200, but also by the instruction monitor, which is the main-side notification means controlled by the main control circuit 100. Similar to the first embodiment, the instruction monitor includes a notification lamp (stop operation display unit). The notification lamp displays the stop operation information by lighting up in a manner that uniquely corresponds to the stop operation information being notified in situations where the player is notified of a stop operation (AT state).

As shown in Figure 91(a), in pseudo-BIG and pseudo-REG, if "F_213 Bell A" is determined as the internal winning combination, the number "1" is displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_213 Bell B" is determined as the internal winning combination, the number "5" is displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_213 Bell C" is determined as the internal winning combination, the number "1" is displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_213 Bell D" is determined as the internal winning combination, the number "5" is displayed on the indicator monitor.

Furthermore, in pseudo-BIG and pseudo-REG, if "F_231 Bell A" is determined as the internal winning combination, the number "2" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_231 Bell B" is determined as the internal winning combination, the number "6" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_231 Bell C" is determined as the internal winning combination, the number "2" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_231 Bell D" is determined as the internal winning combination, the number "6" will be displayed on the indicator monitor.

Furthermore, in pseudo-BIG and pseudo-REG, if "F_312 Bell A" is determined as the internal winning combination, the number "3" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_312 Bell B" is determined as the internal winning combination, the number "7" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_312 Bell C" is determined as the internal winning combination, the number "3" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_312 Bell D" is determined as the internal winning combination, the number "7" will be displayed on the indicator monitor.

Furthermore, in pseudo-BIG and pseudo-REG, if "F_321 Bell A" is determined as the internal winning combination, the number "4" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_321 Bell B" is determined as the internal winning combination, the number "8" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_321 Bell C" is determined as the internal winning combination, the number "4" will be displayed on the indicator monitor. In pseudo-BIG and pseudo-REG, if "F_321 Bell D" is determined as the internal winning combination, the number "8" will be displayed on the indicator monitor.

As shown in Figure 91(b), a value of "1" on the indicator monitor indicates that the first stop operation is to stop the middle reel 3C by aiming for the "seven" symbol, the second stop operation is to stop the left reel 3L, and the third stop operation is to stop the right reel 3R. A value of "2" on the indicator monitor indicates that the first stop operation is to stop the middle reel 3C by aiming for the "seven" symbol, the second stop operation is to stop the right reel 3R, and the third stop operation is to stop the left reel 3L.

The indicator monitor shows a value of "3," which signals that the first stop operation should be performed on the right reel 3R, aiming for the "Seven" symbol; the second stop operation should be performed on the left reel 3L; and the third stop operation should be performed on the middle reel 3C. The indicator monitor shows a value of "4," which signals that the first stop operation should be performed on the right reel 3R, aiming for the "Seven" symbol; the second stop operation should be performed on the middle reel 3C; and the third stop operation should be performed on the left reel 3L.

The indicator monitor shows a value of "5," which signals that the first stop operation should be performed by aiming for the "V" symbol on the middle reel 3C, the second stop operation should be performed on the left reel 3L, and the third stop operation should be performed on the right reel 3R. The indicator monitor shows a value of "6," which signals that the first stop operation should be performed by aiming for the "V" symbol on the middle reel 3C, the second stop operation should be performed on the right reel 3R, and the third stop operation should be performed on the left reel 3L.

The indicator monitor shows a value of "7," which signals that the first stop operation should be performed by aiming for the "V" symbol on the right reel 3R, the second stop operation should be performed on the left reel 3L, and the third stop operation should be performed on the middle reel 3C. The indicator monitor shows a value of "8," which signals that the first stop operation should be performed by aiming for the "V" symbol on the right reel 3R, the second stop operation should be performed on the middle reel 3C, and the third stop operation should be performed on the left reel 3L.

As described above, in pseudo-BIG and pseudo-REG, when a push-order bell is determined as the internal winning combination, one of the numbers from "1" to "8" will be displayed on the instruction monitor. The display of one of the numbers from "1" to "8" on the instruction monitor (indicating information on the stop operation required to win the push-order bell) is also called "bell navigation." By performing the stop operation according to the notification (bell navigation), the player can win 15 medals (see Figure 87). This makes pseudo-BIG and pseudo-REG a favorable game state for the player (AT state). Furthermore, as explained below, pseudo-BIG has a higher frequency of bell navigation compared to pseudo-REG, making it a more favorable game state than pseudo-REG.

Here, two types of pseudo-BIG are provided: the first pseudo-BIG and the second pseudo-BIG. When a pseudo-BIG starts, it is controlled to the first pseudo-BIG. In the first pseudo-BIG, if any of the following (normal replays) appear along the active lines: "C_Middle Replay A_01-04", "C_Lower Replay A_01-06", "C_CU Replay_01-03", "C_Upper Replay B_01-06", "C_Upper Replay A_01-03", and "C_CD Replay_01-04", the game transitions from the first pseudo-BIG to the second pseudo-BIG.

There is a limit to the number of times a player can transition from the first to the second pseudo-BIG in a single pseudo-BIG round. This limit is three times. If the number of transitions from the first to the second pseudo-BIG (based on the number of normal replay wins) is two or less, the second pseudo-BIG will transition back to the first pseudo-BIG after a predetermined number of bell navigations (9 times). On the other hand, if the number of transitions from the first to the second pseudo-BIG (based on the number of normal replay wins) is three, the second pseudo-BIG will end without transitioning back to the first after a predetermined number of bell navigations (9 times).

Furthermore, if a predetermined number of bell navigations (30 times) occur during the first pseudo-BIG, the pseudo-BIG ends regardless of the number of transitions from the first to the second pseudo-BIG (the number of normal replay wins). Also, if a predetermined number of bell navigations (5 times) occur during the pseudo-REG, the pseudo-REG ends.

The remaining number of bell navigations that can be performed during the first pseudo-BIG is managed by the first bell navigation counter. The remaining number of bell navigations that can be performed during the second pseudo-BIG and the pseudo-REG are managed by the second bell navigation counter. Furthermore, the remaining number of transitions from the first pseudo-BIG to the second pseudo-BIG is managed by the normal replay remaining win counter.

When a pseudo-BIG bonus begins, the first bell navigation counter is set to "30," and the remaining normal replay payout counter is set to "3." The value of the first bell navigation counter decreases by 1 each time a bell navigation occurs during the first pseudo-BIG bonus. The value of the remaining normal replay payout counter decreases by 1 each time the game transitions from the first pseudo-BIG bonus to the second pseudo-BIG bonus (when a normal replay payout occurs during the first pseudo-BIG bonus).

When transitioning from the first pseudo-BIG to the second pseudo-BIG, the second bell navigation counter is set to "9". The value of the second bell navigation counter is deducted by 1 for each bell navigation that occurs during the second pseudo-BIG. Also, when a pseudo-REG starts, the second bell navigation counter is set to "5". The value of the second bell navigation counter is deducted by 1 for each bell navigation that occurs during the pseudo-REG.

Therefore, the termination condition for pseudo-BIG is that either (i) or (ii) below is met, and the termination condition for pseudo-REG is that (iii) below is met.
(i) The value of the first bell navigation count counter is 0. (ii) The value of the remaining normal replay winning count counter is 0, AND the value of the second bell navigation count counter is 0. (iii) The value of the second bell navigation count counter is 0.

Therefore, if there are many remaining bell navigation attempts (value of the first bell navigation count counter) in the first pseudo-BIG, and the number of times it is possible to transition from the first pseudo-BIG to the second pseudo-BIG reaches its limit, the pseudo-BIG will end without being able to fully enjoy the benefits of the bell navigation in the first pseudo-BIG. In order to maximize the number of medals paid out in the pseudo-BIG, it is necessary to transition to the final (third) second pseudo-BIG only after the number of remaining bell navigation attempts (value of the first bell navigation count counter) in the first pseudo-BIG has been reduced as much as possible. From this perspective, in a situation where there are many remaining bell navigation attempts (value of the first bell navigation counter) in the first pseudo-BIG, and only one remaining attempt to transition from the first pseudo-BIG to the second pseudo-BIG (value of the remaining normal replay win counter), it is desirable to avoid the transition from the first pseudo-BIG to the second pseudo-BIG (winning a normal replay).

In this embodiment, even if "F_Replay A" or "F_Replay B" is determined as the internal winning combination in the first pseudo-BIG, if either "C_Missed Replay B_01-02" or "C_Missed Replay A_01-02" (Missed Replay) is displayed along the active line, the game will not transition from the first pseudo-BIG to the second pseudo-BIG, and the value of the remaining normal replay winning count counter will not be reduced. In other words, by winning a Missed Replay, it is possible to avoid the transition from the first pseudo-BIG to the second pseudo-BIG (winning a normal replay).

As shown in Figure 91(a), in a pseudo-BIG bonus, if "F_Replay A" or "F_Replay B" is determined as the internal winning combination, the number "9" or "10" will be displayed on the indicator monitor. Specifically, when "F_Replay A" is determined as the internal winning combination in a pseudo-BIG bonus, if the value of the remaining normal replay payout counter is 2 or more, or if the value of the first bell navigation counter is 6 or less, the number "9" will be displayed on the indicator monitor. Similarly, when "F_Replay B" is determined as the internal winning combination in a pseudo-BIG bonus, if the value of the remaining normal replay payout counter is 2 or more, or if the value of the first bell navigation counter is 6 or less, the number "9" will be displayed on the indicator monitor.

In contrast, when "F_Replay A" is determined as the internal winning combination in a pseudo-BIG bonus, if the value of the remaining normal replay payout counter is 1 and the value of the first bell navigation counter is 7 or greater, the number "10" will be displayed on the instruction monitor. Similarly, when "F_Replay B" is determined as the internal winning combination in a pseudo-BIG bonus, if the value of the remaining normal replay payout counter is 1 and the value of the first bell navigation counter is 7 or greater, the number "10" will be displayed on the instruction monitor.

As shown in Figure 91(b), a value of "9" on the indicator monitor signals that a stop operation should be performed to award a normal replay, and a value of "10" on the indicator monitor signals that a stop operation should be performed to award a non-replay. When the value of the remaining normal replay award counter is 1 and the value of the first bell navigation counter is 7 or more, and "F_Replay A" or "F_Replay B" is determined as the internal winning combination, the player can avoid transitioning from the first pseudo-BIG to the second pseudo-BIG (winning a normal replay) by performing the stop operation to award a non-replay according to the notification. This prevents the pseudo-BIG from ending while there are many (7 or more) remaining bell navigations (value of the first bell navigation counter) that can be performed in the first pseudo-BIG, allowing the player to continue the pseudo-BIG while enjoying the benefits of the bell navigations in the first pseudo-BIG.

As mentioned above, if the internal winning combination is "F_Replay A," then "C_Replay A_01-02" is permitted to be displayed on the active line as a "missed replay." If the internal winning combination is "F_Replay B," then in addition to "C_Replay A_01-02," "C_Replay B_01-02" is permitted to be displayed on the active line as a "missed replay" (see Figure 84E).

In order to display "C_Replay A_01-02" on the active payline, the stop operation on the left reel 3L must be performed at the timing when the symbol at position "6" ("Bar") is displayed in the middle area (the "Bar" at position "6" must be stopped precisely). Whether the internal winning combination is "F_Replay A" or "F_Replay B," displaying "C_Replay A_01-02" on the active payline is permitted. Therefore, by successfully stopping the "Bar" precisely, it is possible to win "C_Replay A_01-02" (avoiding a normal replay win).

In contrast, in order to display "C_Replay B_01-02" on the active line, the stop operation on the left reel 3L must be performed at the timing when one of the symbols (all "V") between symbol positions "13" and "15" is displayed in the middle area (the "V" at symbol positions "13" to "15" must be stopped). If the internal winning combination is "F_Replay B", it is permitted to display "C_Replay B_01-02" on the active line, so by successfully stopping the "V", it is possible to win "C_Replay B_01-02" (avoiding the normal replay win). On the other hand, if the internal winning combination is "F_Replay A," then displaying "C_Removal Replay B_01-02" on the active line is not permitted. Therefore, even if you time your button press to hit the "V," you cannot win with "C_Removal Replay B_01-02," and in this case, a regular replay will be awarded.

When the number "10" is displayed on the instruction monitor, the player can recognize that either "F_Replay A" or "F_Replay B" has been determined as the internal winning combination. However, the number displayed on the instruction monitor is the same ("10") whether the internal winning combination is "F_Replay A" or "F_Replay B," and the content of the effects displayed on the main effect display unit 21 is also the same (for example, displaying a text image such as "Miss Challenge"). Therefore, the player cannot recognize whether the internal winning combination is "F_Replay A" or "F_Replay B."

If you can successfully time your press on the "Bar" button, you can win a miss replay regardless of whether the internal winning combination is "F_Replay A" or "F_Replay B." Therefore, the specific internal winning combination ("F_Replay A" or "F_Replay B") is irrelevant. However, generally speaking, timing your press requires advanced skill and is difficult to achieve.

The timing for stopping the reels to successfully hit the "V" symbol (the range of symbols to aim for) is wider than the timing for stopping the reels to successfully hit the "BAR" symbol (the range of symbols to aim for). Therefore, hitting the "V" symbol is easier than hitting the "BAR" symbol. However, when attempting to hit the "V" symbol in a situation where it is not possible to determine whether the internal winning combination is "F_Replay A" or "F_Replay B," if the internal winning combination is "F_Replay B," a missed replay can be awarded. However, if the internal winning combination is "F_Replay A," a missed replay cannot be awarded.

The ratio of the probability that "F_Replay A" is determined as the internal winning combination to the probability that "F_Replay B" is determined as the internal winning combination is approximately 1:3 (see Figures 85 and 86). Therefore, when attempting to stop the "V" symbol in a situation where it is impossible to determine whether the internal winning combination is "F_Replay A" or "F_Replay B," the probability of winning a missed replay (assuming accurate timing) is approximately 75%. In contrast, when performing a precise stop on the "BAR" symbol, the probability of winning a missed replay (assuming accurate timing) is 100%. Therefore, the player will play the first pseudo-BIG game by choosing between the "BAR" precise stop, which is more difficult but guarantees a missed replay if successful, and the "V" symbol, which is less difficult but may not result in a missed replay even with accurate operation.

As shown in Figures 91(a) and (b), if any of the following are determined as the internal winning combination during a pseudo-BIG or pseudo-REG bonus: "F_Common Bell A," "F_Common Bell B" (collectively referred to as "F_Common Bell" in the figure), "F_Parallel Watermelon," or "F_Diagonal Watermelon," the number "11" will be displayed on the indicator monitor. The display of "11" on the indicator monitor signals that the first stop operation should be performed on a reel other than the left reel 3L (either the middle reel 3C or the right reel 3R). The configuration of the indicator monitor can be designed as appropriate; for example, the numbers "1" to "8" on the indicator monitor may be displayed only during the 3BB flag state, while the numbers "9" to "11" may be displayed regardless of whether the 3BB flag state is active or not.

<Correspondence between internal winning combinations, sub-flags, and payout flags>
Figure 92 shows the correspondence between the internal winning combination, the sub-flag, and the payout flag.

As described in the first embodiment, the sub-flags are information used to identify groups of internal winning roles that play similar roles (such as whether or not they are target roles for the draw and their winning probability) in various draws related to gameplay (various processes related to the advantageous period) by the main control circuit 100, by grouping them and assigning the same information to each group.

Figure 92 shows the correspondence between internal winning combinations and sub-flags. Specifically, for the internal winning combinations "F_213 Bell A", "F_213 Bell B", "F_213 Bell C", "F_213 Bell D", "F_231 Bell A", "F_231 Bell B", "F_231 Bell C", "F_231 Bell D", "F_312 Bell A", "F_312 Bell B", "F_312 Bell C", "F_312 Bell D", "F_321 Bell A", "F_321 Bell B", "F_321 Bell C", "F_321 Bell D", "F_1-Coin Combination B", "F_Common 1-Coin Combination", and "F_Common 15-Coin Combination", sub-flag number "0" ("miss") is set.

For the internal winning combinations "F_Replay A" and "F_Replay B," sub-flag number "1" ("Replay") is set. For the internal winning combinations "F_Common Bell A" and "F_Common Bell B," sub-flag number "2" ("Common Bell") is set. For the internal winning combination "F_Parallel Watermelon," sub-flag number "3" ("Parallel Watermelon") is set. For the internal winning combination "F_Diagonal Watermelon," sub-flag number "4" ("Diagonal Watermelon") is set.

For the internal winning combination "F_Cherry," sub-flag number "5" ("Cherry") is set. For the internal winning combinations "F_Reach Symbol A," "F_Reach Symbol B," and "F_Reach Symbol C," sub-flag number "6" ("Reach Symbol") is set. For the internal winning combination "F_BB Confirmed Symbol A," sub-flag number "7" ("BB Confirmed Symbol A") is set. For the internal winning combination "F_BB Confirmed Symbol B," sub-flag number "8" ("BB Confirmed Symbol B") is set. For the internal winning combination "F_Single Coin Symbol A," sub-flag number "9" ("Single Coin Symbol") is set. For the internal winning combination "Miss," sub-flag number "10" ("Miss (Single BB)") is set.

As a result, if the internal winning combination is any of the following: "F_213 Bell A", "F_213 Bell B", "F_213 Bell C", "F_213 Bell D", "F_231 Bell A", "F_231 Bell B", "F_231 Bell C", "F_231 Bell D", "F_312 Bell A", "F_312 Bell B", "F_312 Bell C", "F_312 Bell D", "F_321 Bell A", "F_321 Bell B", "F_321 Bell C", "F_321 Bell D", "F_1-coin combination B", "F_Common 1-coin combination", or "F_Common 15-coin combination", the sub-flag "Miss" is determined.

If the internal winning combination is either "F_Replay A" or "F_Replay B", the sub-flag "Replay" is determined. If the internal winning combination is either "F_Common Bell A" or "F_Common Bell B", the sub-flag "Common Bell" is determined. If the internal winning combination is "F_Parallel Watermelon", the sub-flag "Parallel Watermelon" is determined. If the internal winning combination is "F_Diagonal Watermelon", the sub-flag "Diagonal Watermelon" is determined.

If the internal winning combination is "F_Cherry," the sub-flag "Cherry" is determined. If the internal winning combination is any of "F_Reach Symbol A," "F_Reach Symbol B," or "F_Reach Symbol C," the sub-flag "Reach Symbol" is determined. If the internal winning combination is "F_BB Confirmed Symbol A," the sub-flag "BB Confirmed Symbol A" is determined. If the internal winning combination is "F_BB Confirmed Symbol B," the sub-flag "BB Confirmed Symbol B" is determined. If the internal winning combination is "F_Single Coin Symbol A," the sub-flag "Single Coin Symbol" is determined. If the internal winning combination is "Miss," the sub-flag "Miss (Single BB)" is determined.

The sub-flags described above are determined in the main control circuit 100 during the sub-flag setting process described in the first embodiment (see step S73 in Figure 26). The information indicating the determined sub-flags is then basically included in the start command data (see step S7 in Figure 23) and transmitted to the sub-control circuit 200. This allows the sub-control circuit 200 to recognize the determined sub-flags and perform actions corresponding to those sub-flags.

However, in this embodiment, when the system is in a non-AT state and no stop operation information is reported on the instruction monitor, if the internal winning combination is any of the following (push-order bells): "F_213 Bell A", "F_213 Bell B", "F_213 Bell C", "F_213 Bell D", "F_231 Bell A", "F_231 Bell B", "F_231 Bell C", "F_231 Bell D", "F_312 Bell A", "F_312 Bell B", "F_312 Bell C", "F_312 Bell D", "F_321 Bell A", "F_321 Bell B", "F_321 Bell C", and "F_321 Bell D", then information indicating the sub-flag is not transmitted to the sub-control circuit 200.

These push-order bells are designed to be biased bells, where stopping the left reel 3L as the first stop operation results in an incorrect order, while stopping the middle reel 3C or the right reel 3R as the first stop operation results in a correct order. By preventing the transmission of information indicating a sub-flag to the sub-control circuit 200 when such a biased bell is determined as an internal winning combination, it is possible to prevent intentional stop operations (irregular pressing) aimed at winning biased bells in non-AT states. However, the system may also be configured to transmit information indicating a sub-flag to the sub-control circuit 200 even when a biased bell is determined as an internal winning combination.

Furthermore, the configuration of the biased bell is not particularly limited. It is not necessary to have an internal winning combination where the correct button sequence is determined when the first stop operation is performed on the left reel 3L (see Figures 85 and 86). Alternatively, an internal winning combination where the correct button sequence is determined when the first stop operation is performed on the left reel 3L may be provided, but the probability of determining this internal winning combination is lower than the probability of determining an internal winning combination where the correct button sequence is determined when the first stop operation is performed on the middle reel 3C or the right reel 3R.

Furthermore, Figure 92 shows the correspondence between internal winning combinations and payout flags. There are six types of correspondences between internal winning combinations and payout flags (payout flag group 1, payout flag group 2, payout flag group 3, payout flag group 4, payout flag group 5, and payout flag group 6). Depending on the game situation, the payout flag in one of these payout flag groups is determined.

Specifically, if the internal winning combination is a "miss," then the following combinations are determined: "Excluded Combination" as the payout flag in payout flag group 1, "Reach-Bonus Big Bonus" as the payout flag in payout flag group 2, "Reach-Bonus Big Bonus" as the payout flag in payout flag group 3, "Non-Declining Combination" as the payout flag in payout flag group 4, "Other" as the payout flag in payout flag group 5, and "Reach-Bonus Big Bonus" as the payout flag in payout flag group 6.

If the internal winning combination is either "F_Replay A" or "F_Replay B", then the payout flag for payout flag group 1 is determined to be "Excluded Combination", the payout flag for payout flag group 2 is determined to be "Other", the payout flag for payout flag group 3 is determined to be "Replay Bell", the payout flag for payout flag group 4 is determined to be "Non-Declining Combination", the payout flag for payout flag group 5 is determined to be "Other", and the payout flag for payout flag group 6 is determined to be "Other".

If the internal winning combination is any of the following: "F_213 Bell A", "F_213 Bell B", "F_213 Bell C", "F_213 Bell D", "F_231 Bell A", "F_231 Bell B", "F_231 Bell C", "F_231 Bell D", "F_312 Bell A", "F_312 Bell B", "F_312 Bell C", "F_312 Bell D", "F_321 Bell A", "F_321 Bell B", "F_321 Bell C", and "F_321 Bell D", In payout flag group 1, "Transition Role" is determined as the payout flag; in payout flag group 2, "Other" is determined as the payout flag; in payout flag group 3, "Other" is determined as the payout flag; in payout flag group 4, "Other" is determined as the payout flag; in payout flag group 5, "Other" is determined as the payout flag; and in payout flag group 6, "Other" is determined as the payout flag.

If the internal winning combination is either "F_Common Bell A" or "F_Common Bell B", then the payout flag for payout flag group 1 is determined to be "Transition Combination", the payout flag for payout flag group 2 is determined to be "Other", the payout flag for payout flag group 3 is determined to be "Replay Bell", the payout flag for payout flag group 4 is determined to be "Non-Declining Combination", the payout flag for payout flag group 5 is determined to be "Other", and the payout flag for payout flag group 6 is determined to be "Other".

If the internal winning combination is "F_Parallel Watermelon," then the payout flag for payout flag group 1 is determined to be "Transition Combination," the payout flag for payout flag group 2 is determined to be "Weak Rare Combination," the payout flag for payout flag group 3 is determined to be "Weak Rare Combination," the payout flag for payout flag group 4 is determined to be "Non-Declining Combination," the payout flag for payout flag group 5 is determined to be "Parallel Watermelon," and the payout flag for payout flag group 6 is determined to be "Other."

If the internal winning combination is "F_Diagonal Watermelon," then "Transition Combination" is determined as the payout flag in payout flag group 1, "Diagonal Watermelon" is determined as the payout flag in payout flag group 2, "Diagonal Watermelon" is determined as the payout flag in payout flag group 3, "Non-Declining Combination" is determined as the payout flag in payout flag group 4, "Diagonal Watermelon" is determined as the payout flag in payout flag group 5, and "Other" is determined as the payout flag in payout flag group 6.

If the internal winning combination is "F_Cherry," then the payout flag for payout flag group 1 is determined to be "Transition Combination," the payout flag for payout flag group 2 is determined to be "Weak Rare Combination," the payout flag for payout flag group 3 is determined to be "Weak Rare Combination," the payout flag for payout flag group 4 is determined to be "Non-Declining Combination," the payout flag for payout flag group 5 is determined to be "Cherry," and the payout flag for payout flag group 6 is determined to be "Other."

If the internal winning combination is one of "F_Reach Eye Combination A", "F_Reach Eye Combination B", or "F_Reach Eye Combination C", then the payout flag for payout flag group 1 will be "Transition Combination", the payout flag for payout flag group 2 will be "Reach Eye", the payout flag for payout flag group 3 will be "Reach Eye" or "Reach Eye BB", the payout flag for payout flag group 4 will be "Non-Declining Combination", the payout flag for payout flag group 5 will be "Other", and the payout flag for payout flag group 6 will be "Reach Eye".

If the internal winning combination is either "F_BB Guaranteed Combination A" or "F_BB Guaranteed Combination B," then the payout flag for payout flag group 1 is determined to be "Transition Combination," the payout flag for payout flag group 2 is determined to be "Reach Eye BB," the payout flag for payout flag group 3 is determined to be either "Reach Eye" or "Reach Eye BB," the payout flag for payout flag group 4 is determined to be "Non-Declining Combination," the payout flag for payout flag group 5 is determined to be "Other," and the payout flag for payout flag group 6 is determined to be "Reach Eye BB."

If the internal winning combination is either "F_1-coin combination A" or "F_1-coin combination B", then "Transition combination" is determined as the payout flag in payout flag group 1, "Other" is determined as the payout flag in payout flag group 2, "Other" is determined as the payout flag in payout flag group 3, "Other" is determined as the payout flag in payout flag group 4, "Other" is determined as the payout flag in payout flag group 5, and "1-coin combination" is determined as the payout flag in payout flag group 6.

If the internal winning combination is either "F_Common 1-coin combination" or "F_Common 15-coin combination," then "Excluded Combination" is determined as the payout flag in payout flag group 1, "Other" is determined as the payout flag in payout flag group 2, "Other" is determined as the payout flag in payout flag group 3, "Other" is determined as the payout flag in payout flag group 4, "Other" is determined as the payout flag in payout flag group 5, and "Other" is determined as the payout flag in payout flag group 6.

The payout flag determined in the manner described above will be used in the various lotteries explained below.

<Processing at the start of gameplay during non-advantageous periods>
Figure 93 is a flowchart showing the processing performed in the main control circuit at the start of a game in a non-advantageous section. Figure 94(a) is a diagram showing the advantageous section transition lottery table. Figure 94(b) is a diagram showing the advantageous section transition lottery table.

The game start processing for non-advantageous periods shown in Figure 93 is performed in the main control circuit 100 when the current game period is a non-advantageous period (see Figure 88), specifically in step S6 of Figure 23 (main processing) (for example, when the judgment result of step S85 in Figure 27 is "YES"). The main CPU 101 can recognize that the current game period is a non-advantageous period by referring to the payout status flag storage area of the main RAM 103 (see Figure 20).

In the processing at the start of a game in the non-advantageous section, the main CPU 101 first executes the advantageous section transition lottery process (step S4001). In this process, the main CPU 101 refers to the advantageous section transition lottery table (see Figure 94(a)) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 1, thereby determining whether the result of the advantageous section transition lottery is "non-winner" or "winner."

In the advantageous section transition lottery table shown in Figure 94(a), a lottery value corresponding to the result of the advantageous section transition lottery ("non-winner" and "winner") is defined for each payout flag ("excluded role" and "transition role") in payout flag group 1. The probability of each result of the advantageous section transition lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". Therefore, if the payout flag in payout flag group 1 is an "excluded role," there is a 0/256 probability of winning the advantageous section transition lottery, and if the payout flag in payout flag group 1 is a "transition role," there is a 256/256 probability of winning the advantageous section transition lottery.

After executing the process in step S4001, the main CPU 101 determines whether or not it has won the advantageous period transition lottery (step S4002). If it determines that it has not won the advantageous period transition lottery, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that it has won the advantageous section transition lottery, it executes the advantageous section transition lottery process (step S4003). In this process, the main CPU 101 refers to the advantageous section transition lottery table (see Figure 94(b)) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 2, thereby determining one of the following as the result of the advantageous section transition lottery: "Consecutive Win Preparation," "Consecutive Win Challenge," or "Guaranteed Consecutive Win Challenge."

In the advantageous section transition lottery table shown in Figure 94(b), a lottery value corresponding to the result of the advantageous section transition lottery ("Consecutive Win Preparation," "Consecutive Win Challenge," and "Guaranteed Consecutive Win Challenge") is defined for each payout flag in payout flag group 2 ("Other," "Weak Rare Role," "Diagonal Watermelon," "Winning Combination," and "Winning Combination BB"). The probability of each result of the advantageous section transition lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the payout flag in payout flag group 2 is "Other," the result of the lottery at the time of transitioning to the advantageous section will determine "Continuous Win Preparation" with a probability of 256/256. If the payout flag in payout flag group 2 is "Diagonal Watermelon," the result of the lottery at the time of transitioning to the advantageous section will determine "Continuous Win Challenge" with a probability of 128/256, and "Guaranteed Continuous Win Challenge" with a probability of 128/256.

If "Continuous Win Preparation" is determined as a result of the lottery at the start of the advantageous period, the main CPU 101 sets the Continuous Win Preparation transition flag to ON. The Continuous Win Preparation transition flag indicates that it is time to start Continuous Win Preparation. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the Continuous Win Preparation transition flag was set ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to Continuous Win Preparation (see transition conditions (A) in Figures 89 and 90).

Furthermore, if the lottery at the time of transitioning to the advantageous section determines "Consecutive Win Challenge" or "Guaranteed Consecutive Win Challenge" (i.e., the Consecutive Win Challenge is won), the main CPU 101 sets the Consecutive Win Challenge transition flag to ON. The Consecutive Win Challenge transition flag indicates that it is time to start the Consecutive Win Challenge. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the Consecutive Win Challenge transition flag was set to ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to the Consecutive Win Challenge (see transition conditions (B) in Figures 89 and 90). Also, if the lottery at the time of transitioning to the advantageous section determines "Guaranteed Consecutive Win Challenge," the main CPU 101 sets the Guaranteed Consecutive Win Challenge flag to ON. The Guaranteed Consecutive Win Challenge flag is referenced during the Consecutive Win Challenge, and the Consecutive Win Challenge is controlled to be more favorable.

After executing the process in step S4003, the main CPU 101 terminates this subroutine.

In this embodiment, when the payout flag in payout flag group 1 is a "transition role" (when a transition role is established), the advantageous section transition lottery is always a win. However, the coefficient for non-wins may be set to 1 or greater, so that it is not always a win. Furthermore, it may be possible to generate effects that suggest the establishment of a transition role or an excluded role in the non-advantageous section, thereby increasing the expectation of whether a transition to the advantageous section will occur. It may also be possible to generate effects that suggest or notify the establishment of a winning role with a high probability of transitioning to a highly advantageous state such as a continuous win challenge or a guaranteed continuous win challenge (for example, winning roles corresponding to payout flags other than "Other" shown in Figure 94(b) (weak rare role, diagonal watermelon, winning combination, winning combination BB)).

<Processing at the start of game to prepare for consecutive wins>
Figure 95 is a flowchart showing the processing performed in the main control circuit at the start of a game to prepare for consecutive wins. Figure 96(a) shows the consecutive win preparation mode lottery table (1). Figure 96(b) shows the consecutive win preparation mode lottery table (2). Figure 97 shows the consecutive win challenge transition lottery table. Figure 98(a) shows the consecutive win challenge transition confirmation lottery table. Figure 98(b) shows the consecutive win preparation fallout lottery table.

The game start processing for preparing for consecutive wins, shown in Figure 95, is performed in the main control circuit 100 when the current payout state is in the consecutive win preparation state (see Figure 88). This processing occurs in step S6 of Figure 23 (main processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the game start processing for continuous win preparation, the main CPU 101 first determines whether it is the start of continuous win preparation (step S4021). As described above, the transition to continuous win preparation occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the continuous win preparation transition flag (see step S4003 in Figure 93) is set to ON. In the game start state control processing of the unit game transitioning to continuous win preparation, the transition to continuous win preparation is initiated by updating the payout state flag storage area (see Figure 20), and then the continuous win preparation game start processing shown in Figure 95 is performed. In the processing of step S4021, the main CPU 101 determines that it is the start of continuous win preparation if the current unit game transitions to continuous win preparation (i.e., if the current unit game is the first game of continuous win preparation).

If the main CPU 101 determines that it is time to prepare for a winning streak, it determines whether the current game state is the 3BB flag state (see Figure 81) (step S4022). The main CPU 101 can recognize that the current game state is the 3BB flag state by referring to the carryover role storage area of the main RAM 103 (see Figure 18).

If the main CPU 101 determines that the current game state is the 3BB flag state, it sets the continuous win preparation guarantee game count counter to "5" (step S4023). The value of the continuous win preparation guarantee game count counter indicates the remaining number of unit games for which staying in the continuous win preparation state is guaranteed, and is stored in the main RAM 103. If the value of the continuous win preparation guarantee game count counter is greater than 0, it is deducted by 1 each time a unit game is played in the continuous win preparation state. Although not shown in the figure, this deduction is performed in step S15 (game end state control processing) of Figure 23 (main processing).

Next, the main CPU 101 executes the consecutive win preparation mode lottery process (1) (step S4024). In this process, the main CPU 101 refers to the consecutive win preparation mode lottery table (1) (see Figure 96(a)) and performs a lottery based on random values to determine either "Mode 1" or "Mode 2" as the result of the consecutive win preparation mode lottery (1) (consecutive win preparation mode).

In the consecutive win preparation mode lottery table (1) shown in Figure 96(a), a lottery value corresponding to the result of the consecutive win preparation mode lottery (1) ("Mode 1" and "Mode 2") is defined for each setting value ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the consecutive win preparation mode lottery (1) being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". Therefore, regardless of the setting value, "Mode 2" is determined as the result of the consecutive win preparation mode lottery (1) (consecutive win preparation mode) with a probability of 256/256.

If, in step S4022, the main CPU 101 determines that the current game state is not the 3BB flag state, it sets the consecutive win preparation guarantee game count counter to "0" (step S4025). Next, the main CPU 101 executes the consecutive win preparation mode lottery process (2) (step S4026). In this process, the main CPU 101 refers to the consecutive win preparation mode lottery table (2) (see Figure 96(b)) and performs a lottery based on random values to determine either "Mode 1" or "Mode 2" as the result of the consecutive win preparation mode lottery (2) (consecutive win preparation mode).

In the consecutive win preparation mode lottery table (2) shown in Figure 96(b), a lottery value corresponding to the result of the consecutive win preparation mode lottery (2) ("Mode 1" and "Mode 2") is defined for each setting value ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the consecutive win preparation mode lottery (2) being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". Therefore, regardless of the setting value, "Mode 1" is determined as the result of the consecutive win preparation mode lottery (2) (consecutive win preparation mode) with a probability of 256/256.

If it is determined in step S4021 that it is not time to start preparing for a winning streak, or after executing the processes in step S4024 or step S4026, the main CPU 101 executes the winning streak challenge transition lottery process (step S4027). In this process, the main CPU 101 refers to the winning streak challenge transition lottery table (see Figure 97) and performs a lottery based on the payout flags (see Figure 92) and random values in payout flag group 3 to determine whether the result of the winning streak challenge transition lottery is "not a winner" or "a winner."

The consecutive win challenge transition lottery table shown in Figure 97 is provided for each of the payout flags in payout flag group 3 ("Other", "Replay Bell", "Weak Rare Role", "Diagonal Watermelon", and "Reach Symbol or Reach Symbol BB"). If the payout flag in payout flag group 3 is "Other," the consecutive win challenge transition lottery table shown in Figure 97(a) is referred. If the payout flag in payout flag group 3 is "Reply Bell," the consecutive win challenge transition lottery table shown in Figure 97(b) is referred. If the payout flag in payout flag group 3 is "Weak Rare Role," the consecutive win challenge transition lottery table shown in Figure 97(c) is referred. If the payout flag in payout flag group 3 is "Diagonal Watermelon," the consecutive win challenge transition lottery table shown in Figure 97(d) is referred. If the payout flag in payout flag group 3 is "Reach Symbol" or "Reach Symbol BB," the consecutive win challenge transition lottery table shown in Figure 97(e) is referred.

In each consecutive win challenge transition lottery table, a lottery value corresponding to the result of the consecutive win challenge transition lottery ("Non-Winning" and "Winning") is defined for each consecutive win preparation mode ("Mode 1" and "Mode 2"). The probability of each result of the consecutive win challenge transition lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, if the payout flag in payout flag group 3 is "Reply Bell," and the continuous win preparation mode determined by continuous win preparation mode lottery process (1) (see step S4024) or continuous win preparation mode lottery process (2) (see step S4026) is "Mode 2," then there is a 32/256 probability of winning the continuous win challenge transition lottery. Furthermore, if the continuous win preparation mode determined by continuous win preparation mode lottery process (1) (see step S4024) or continuous win preparation mode lottery process (2) (see step S4026) is "Mode 1," then regardless of the payout flag in payout flag group 3, the continuous win challenge transition lottery will not be won.

If the player wins the Consecutive Win Challenge transition lottery (wins the Consecutive Win Challenge), the main CPU 101 sets the Consecutive Win Challenge transition flag to ON. As mentioned above, the Consecutive Win Challenge transition flag indicates that it is time to start the Consecutive Win Challenge. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the Consecutive Win Challenge transition flag was set ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to the Consecutive Win Challenge (see transition conditions (D) in Figures 89 and 90). As will be described later, the Consecutive Win Challenge is a payout state in which it is possible to transition to a pseudo-BIG or upgrade chance with a relatively high probability, and the Consecutive Win Preparation is a payout state in which it is possible to transition to such a Consecutive Win Challenge.

After executing the process in step S4027, the main CPU 101 determines whether or not it has won the lottery for transitioning to the Consecutive Win Challenge (step S4028). If it determines that it has won the lottery for transitioning to the Consecutive Win Challenge, the main CPU 101 executes the lottery process for confirming the transition to the Consecutive Win Challenge (step S4029). In this process, the main CPU 101 refers to the lottery table for confirming the transition to the Consecutive Win Challenge (see Figure 98(a)) and performs a lottery based on the payout flags in payout flag group 3 (see Figure 92) and random values to determine whether the result of the lottery for confirming the transition to the Consecutive Win Challenge is "not a winner" or "winner".

In the confirmed lottery table for transitioning to the Consecutive Win Challenge shown in Figure 98(a), a lottery value corresponding to the result of the confirmed lottery for transitioning to the Consecutive Win Challenge ("Non-Win" and "Win") is defined for each payout flag in payout flag group 3 ("Other," "Reel Bell," "Weak Rare Role," "Diagonal Watermelon," and "Reach Eye or Reach Eye BB"). The probability of each result of the confirmed lottery for transitioning to the Consecutive Win Challenge can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the payout flag in payout flag group 3 is "Diagonal Watermelon," there is a 128/256 probability of winning the guaranteed draw when transitioning to the Consecutive Win Challenge. If the payout flag in payout flag group 3 is "Reach Symbol" or "Reach Symbol BB," the guaranteed draw when transitioning to the Consecutive Win Challenge will always result in a loss. If the guaranteed draw when transitioning to the Consecutive Win Challenge results in a win, the main CPU 101 sets the guaranteed Consecutive Win Challenge flag to ON. As described above, the guaranteed Consecutive Win Challenge flag is referenced during the Consecutive Win Challenge, and the Consecutive Win Challenge is controlled to be more favorable. Furthermore, if the value of the Consecutive Win Challenge win counter (see Figure 162) is greater than or equal to a predetermined value (for example, 3), the system may be configured to always result in a win in the guaranteed draw when transitioning to the Consecutive Win Challenge.

If, in step S4028, it is determined that the consecutive win challenge transition lottery has not been won, or after executing the process in step S4029, the main CPU 101 determines whether the value of the consecutive win preparation guarantee game counter (see steps S4023 and S4025) is "0" (step S4030). If it is determined that the value of the consecutive win preparation guarantee game counter is "0", the main CPU 101 executes the consecutive win preparation fall lottery process (step S4031). In this process, the main CPU 101 refers to the consecutive win preparation fall lottery table (see Figure 98(b)) and performs a lottery based on the payout flags (see Figure 92) and random values in payout flag group 4 to determine whether the result of the consecutive win preparation fall lottery is "not won" or "won".

In the consecutive win preparation/decrease lottery table shown in Figure 98(b), a lottery value corresponding to the result of the consecutive win preparation/decrease lottery ("Non-Winning" and "Winning") is defined for each payout flag ("Other" and "Non-Declining Role") in payout flag group 4. The probability of each result of the consecutive win preparation/decrease lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". Therefore, if the payout flag in payout flag group 4 is "Other," there is a 192/256 probability of winning the consecutive win preparation/decrease lottery, and if the payout flag in payout flag group 4 is "Non-Declining Role," there is always a non-winning result in the consecutive win preparation/decrease lottery.

If the winning draw for the consecutive win preparation phase ends, the main CPU 101 sets the normal stage transition flag to ON. The normal stage transition flag indicates that it is time to start the normal stage. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the normal stage transition flag was set ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This causes the game to transition to the normal stage (see transition conditions (C) in Figures 89 and 90).

If, in step S4030, the value of the game count counter guaranteeing consecutive wins is determined to be other than "0", or after executing the process in step S4031, the main CPU 101 terminates this subroutine.

<Processing at the start of gameplay in normal stages>
Figure 99 is a flowchart showing the processing performed in the main control circuit at the start of a normal game stage.

The game start processing for the normal stage shown in Figure 99 is performed in the main control circuit 100 when the current payout state is the normal stage (see Figure 88), specifically in step S6 of Figure 23 (main processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the normal stage game start processing, the main CPU 101 first determines whether it is the start of the normal stage (step S4041). As described above, the transition to the normal stage occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the normal stage transition flag (see step S4031 in Figure 95) is set to ON. In the game start state control processing of the unit game that transitions to the normal stage, the transition to the normal stage is initiated by updating the payout state flag storage area (see Figure 20), and then the normal stage game start processing shown in Figure 99 is performed. In the processing of step S4041, the main CPU 101 determines that it is the start of the normal stage if it has transitioned to the normal stage in the current unit game (if the current unit game is the first game of the normal stage).

If the system determines that it is the start of a normal stage, the main CPU 101 executes the normal stage start processing (step S4042). The normal stage start processing will be explained later using Figure 100.

If it is determined in step S4041 that it is not the start of a normal stage, or after executing the process in step S4042, the main CPU 101 executes the common processing for normal payout states (step S4043). The common processing for normal payout states will be explained later using Figure 108.

After executing the process in step S4043, the main CPU 101 executes the normal stage-specific processing (step S4044). The normal stage-specific processing will be explained later using Figure 103.

After executing the process in step S4044, the main CPU 101 terminates this subroutine.

<Processing at the start of a normal stage>
Figure 100 is a flowchart showing the normal stage start processing performed in the main control circuit. Figure 101(a) is a diagram showing the normal transition mode lottery table. Figure 101(b) is a diagram showing the normal transition ceiling lottery table. Figure 102 is a diagram showing the point mode lottery table.

The normal stage start processing shown in Figure 100 is the process performed in step S4042 of Figure 99 (normal stage game start processing) in the main control circuit 100.

In the normal stage initiation process, the main CPU 101 first executes a normal transition mode lottery process (step S4061). In this process, the main CPU 101 refers to the normal transition mode lottery table (see Figure 101(a)) and performs a lottery based on random values to determine one of the following as the result of the normal transition mode lottery (normal mode): "Mode 1," "Mode 2," "Mode 3," "Mode 4," "Mode 5," "Mode 6," "Mode 7," and "Mode 8."

In the normal transition mode selection table shown in Figure 101(a), a selection value corresponding to the result of the normal transition mode selection ("Mode 1," "Mode 2," "Mode 3," "Mode 4," "Mode 5," "Mode 6," "Mode 7," and "Mode 8") is defined for each setting value ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each result of the normal transition mode selection being determined can be expressed as "the selection value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the setting is 1, the result of the normal mode selection during transition (normal mode) will be as follows: Mode 1 will be determined with a probability of 98/256, Mode 2 with a probability of 98/256, Mode 3 with a probability of 24/256, Mode 4 with a probability of 12/256, Mode 5 with a probability of 12/256, Mode 6 with a probability of 1/256, Mode 7 with a probability of 3/256, and Mode 8 with a probability of 8/256.

After executing the process in step S4061, the main CPU 101 performs the normal transition ceiling lottery process (step S4062). In this process, the main CPU 101 refers to the normal transition ceiling lottery table (see Figure 101(b)) and performs a lottery based on random values to determine one of the following results (ceiling game count): "1", "51", "101", "151", "201", "251", "301", "351", "401", "451", "501", "551", "601", "651", "701", "801", and "901".

In the normal transition ceiling lottery table shown in Figure 101(b), a lottery value corresponding to the result of the normal transition mode lottery ("1", "51", "101", "151", "201", "251", "301", "351", "401", "451", "501", "551", "601", "651", "701", "801", and "901") is defined for each normal mode ("Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5", "Mode 6", "Mode 7", and "Mode 8"). The probability of each result of the normal transition ceiling lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, if the normal mode determined in the normal transition mode lottery process (see step S4061) is "Mode 1", then the result of the normal transition ceiling lottery (ceiling game count) will be "201" with a probability of 16/256, "301" with a probability of 16/256, "401" with a probability of 48/256, "501" with a probability of 16/256, "601" with a probability of 48/256, "701" with a probability of 16/256, "801" with a probability of 40/256, and "901" with a probability of 56/256.

After executing the process in step S4062, the main CPU 101 performs a point mode lottery process (step S4063). In this process, the main CPU 101 refers to the point mode lottery table (see Figure 102) and performs a lottery based on random values to determine one of the following point modes as the result of the point mode lottery: "Point Mode 1," "Point Mode 2," or "Point Mode 3."

The point mode lottery table shown in Figure 102 is provided for each value of the point arrival count counter ("0-2", "3-5", "6-8", and "9 or more"). The value of the point arrival count counter indicates the number of times the normal point value (see Figure 114) has reached a predetermined value (100). If the value of the point arrival count counter is any of "0" to "2", the point mode lottery table shown in Figure 102(a) is referred; if the value of the point arrival count counter is any of "3" to "5", the point mode lottery table shown in Figure 102(b) is referred; if the value of the point arrival count counter is any of "6" to "8", the point mode lottery table shown in Figure 102(c) is referred; and if the value of the point arrival count counter is "9 or more", the point mode lottery table shown in Figure 102(d) is referred.

In each point mode lottery table, a lottery value corresponding to the point mode lottery result ("Point Mode 1," "Point Mode 2," and "Point Mode 3") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each point mode lottery result being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the point reach counter value is between "0" and "2" and the setting value is setting 6, then "Point Mode 1" is determined with a probability of 253/256, "Point Mode 2" is determined with a probability of 2/256, and "Point Mode 3" is determined with a probability of 1/256. Note that if the point mode value determined in this point mode lottery (any of 1-3) is smaller than an already determined point mode value, the point mode value determined in this lottery is discarded.

<Processing specific to normal stages>
Figure 103 is a flowchart showing the processing specific to the normal stage performed in the main control circuit. Figure 104 is a diagram showing the freeze lottery table during the normal stage. Figures 105 to 107 are diagrams showing the transition flag and winning flag lottery tables during the normal stage.

The processing specific to the normal stage shown in Figure 103 is the process performed in step S4044 of Figure 99 (processing at the start of gameplay for the normal stage) in the main control circuit 100.

In the processing specific to the normal stage, the main CPU 101 first executes the normal stage freeze lottery process (step S4081). In this process, the main CPU 101 refers to the normal stage freeze lottery table (see Figure 104) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 6. As a result of the normal stage freeze lottery, it determines one of the following: "Non-Winning," "Upgrade Chance," or "Pseudo-BIG."

The freeze lottery table shown in Figure 104 is provided for each of the payout flags in payout flag group 6 ("Other," "Winning Combination," "Winning Combination BB," and "Single Coin Win"). If the payout flag in payout flag group 6 is "Other," the freeze lottery table shown in Figure 104(a) is referenced. If the payout flag in payout flag group 6 is "Winning Combination," the freeze lottery table shown in Figure 104(b) is referenced. If the payout flag in payout flag group 6 is "Winning Combination BB," the freeze lottery table shown in Figure 104(c) is referenced. If the payout flag in payout flag group 6 is "Single Coin Win," the freeze lottery table shown in Figure 104(d) is referenced.

In each normal stage freeze lottery table, a lottery value corresponding to the result of the normal stage freeze lottery ("Non-Winning," "Chance for Upgrade," and "Pseudo-BIG") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each result of the normal stage freeze lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the payout flag in payout flag group 6 is "Reach Eye" and the setting value is setting 1, the result of the freeze lottery during the normal stage will be "Non-Win" with a probability of 254/256 and "Upgrade Chance" with a probability of 2/256. Also, if the payout flag in payout flag group 6 is "Reach Eye BB," regardless of the setting value, the result of the freeze lottery during the normal stage will be "Non-Win" with a probability of 255/256 and "Pseudo-BIG" with a probability of 1/256.

If a "Promotion Chance" is determined as a result of the freeze lottery during a normal stage (i.e., a promotion chance is won), the main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next game unit after the one in which the freeze lottery occurred. This transitions to a promotion chance. Similarly, if a "Pseudo-BIG" is determined as a result of the freeze lottery during a normal stage (i.e., a pseudo-BIG is won), the main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next game unit after the one in which the freeze lottery occurred. This transitions to a pseudo-BIG.

Furthermore, if a "promotion chance" or "pseudo-BIG" is determined as a result of the freeze lottery during the normal stage (i.e., the player wins a promotion chance or pseudo-BIG), a freeze occurs when the unit game in which the freeze lottery took place ends. As explained in the first embodiment, a freeze is an effect that halts the progress of the game for a predetermined period (invalidating the player's game operations for a predetermined period). The main CPU 101 controls the execution of the freeze in the main-side effect control processing at the end of the game in the unit game (see step S16 in Figure 23). As a result, after the third stop operation in the unit game is performed, game operations are invalidated for a predetermined period. Subsequently, the game transitions to a promotion chance or pseudo-BIG when the start lever 7 is operated to start the next unit game.

During the freeze, the system will display visuals, sounds, lights, etc., to indicate or announce a chance of promotion or a pseudo-BIG win. Furthermore, since the main reels (reels 3L, 3C, 3R) often have winning combinations (symbols indicating a pseudo-bonus or other win) stopped on them during the freeze, the system may use effects such as lighting, flashing, or turning off the reel backlight (for example, LEDs for reel illumination placed inside the reel body of each reel 3L, 3C, 3R so that each of the nine symbols displayed within the frame of the main display window 4 can be individually illuminated) to draw attention to the winning combinations. As will be described later, in this embodiment, "one winning combination" and "one BB confirmed winning combination" (see Figure 87) serve as winning combinations. Such winning combinations may always stop when a predetermined stopping sequence (for example, left first stop) is performed during the freeze, or they may not stop depending on the timing of the stopping operation.

Furthermore, if, during a single unit of gameplay in the pre-announcement state, a "promotion chance" or "pseudo-BIG" is determined as a result of the freeze lottery in the normal stage (i.e., a promotion chance or pseudo-BIG is won), the main CPU 101 clears the value of the pre-announcement game counter (see step S4084). This ends the pre-announcement state. Note that if a promotion chance or pseudo-BIG has already been won at the time step S4081 is executed (i.e., the promotion chance winning flag or pseudo-BIG winning flag is set to ON), the main CPU 101 does not perform the freeze lottery in the normal stage and proceeds to step S4082.

After executing the process in step S4081, the main CPU 101 performs a normal stage transition flag/winning flag lottery process (step S4082). In this process, the main CPU 101 refers to the normal stage transition flag/winning flag lottery table (see Figures 105-107) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 5. As a result of the normal stage transition flag/winning flag lottery, it determines one of the following: "No Win," "Chance Stage A," "Chance Stage B," "Promotion Chance," or "Pseudo BIG."

The normal stage transition flag and winning flag lottery tables include a normal stage transition flag and winning flag lottery table referenced in non-high probability states (see Figure 105), a normal stage transition flag and winning flag lottery table referenced in high probability 1 to high probability 2 states (see Figure 106), and a normal stage transition flag and winning flag lottery table referenced in high probability 3 states (see Figure 107). In the normal payout state, the probability mode is controlled to one of the following: non-high probability, high probability 1, high probability 2, and high probability 3 (see step S4085). In the normal stage transition flag and winning flag lottery, the normal stage transition flag and winning flag lottery table corresponding to the current probability mode is referenced from the normal stage transition flag and winning flag lottery tables in Figures 105 to 107.

The normal stage transition flag and winning flag lottery tables shown in Figures 105 to 107 are provided for each of the payout flags ("Other", "Parallel Watermelon", "Diagonal Watermelon", and "Cherry") in payout flag group 5. If the payout flag in payout flag group 5 is "Other", the normal stage transition flag/winning flag lottery table shown in Figure 105(a), Figure 106(a), or Figure 107(a) is referenced. If the payout flag in payout flag group 5 is "Parallel Watermelon", the normal stage transition flag/winning flag lottery table shown in Figure 105(b), Figure 106(b), or Figure 107(b) is referenced. If the payout flag in payout flag group 5 is "Diagonal Watermelon", the normal stage transition flag/winning flag lottery table shown in Figure 105(c), Figure 106(c), or Figure 107(c) is referenced. If the payout flag in payout flag group 5 is "Cherry", the normal stage transition flag/winning flag lottery table shown in Figure 105(d), Figure 106(d), or Figure 107(d) is referenced.

In each normal stage transition flag and winning flag lottery table, a lottery value corresponding to the result of the normal stage transition flag and winning flag lottery ("Non-Winning," "Chance Stage A," "Chance Stage B," "Promotion Chance," and "Pseudo-BIG") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each result of the normal stage transition flag and winning flag lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the current probability mode is High Probability 1 or High Probability 2, and the payout flag in payout flag group 5 is "Diagonal Watermelon," then regardless of the setting value, the result of the normal stage transition flag and winning flag lottery will determine "Chance Stage A" with a probability of 1/256 and "Chance Stage B" with a probability of 255/256. Also, if the current probability mode is High Probability 3, and the payout flag in payout flag group 5 is "Parallel Watermelon," then regardless of the setting value, the result of the normal stage transition flag and winning flag lottery will determine "Non-Winning" with a probability of 128/256, "Promotion Chance" with a probability of 112/256, and "Pseudo-BIG" with a probability of 16/256.

In Non-High Probability, High Probability 1, and High Probability 2 modes, the probability of determining "Promotion Chance" or "Pseudo-BIG" as a result of the normal stage transition flag/winning flag lottery is 0. "Promotion Chance" or "Pseudo-BIG" can only be determined in High Probability 3 mode. Therefore, High Probability 3 is the most advantageous probability mode. In High Probability 1 through High Probability 2 modes, the probability of determining "Chance Stage A" or "Chance Stage B" as a result of the normal stage transition flag/winning flag lottery is higher than in Non-High Probability modes. Therefore, High Probability 1 and High Probability 2 are more advantageous probability modes than Non-High Probability modes.

If "Chance Stage A" is determined as a result of the transition flag/winning flag lottery during the normal stage (i.e., a win in Chance Stage A), the main CPU 101 adds 1 to the value of the Chance Stage A win count counter. A value of 1 or greater in the Chance Stage A win count counter indicates that a win in Chance Stage A has occurred. As will be explained in detail later, a win in Chance Stage A leads to a transition to Chance Stage A via a pre-stage (see transition conditions (E) in Figures 89 and 90). The value of the Chance Stage A win count counter indicates the number of times a win in Chance Stage A has occurred. Wins in Chance Stage A can be stockpiled, allowing transitions from the normal stage to Chance Stage A a number of times corresponding to the value of the Chance Stage A win count counter. When transitioning from the normal stage to Chance Stage A, the value of the Chance Stage A win count counter is deducted by 1.

Furthermore, if "Chance Stage B" is determined as a result of the transition flag/winning flag lottery during the normal stage (i.e., a win in Chance Stage B), the main CPU 101 adds 1 to the value of the Chance Stage B win count counter. A value of 1 or greater in the Chance Stage B win count counter indicates that a win in Chance Stage B has occurred. As will be explained in detail later, a win in Chance Stage B leads to a transition to Chance Stage B via a pre-stage (see transition conditions (G) in Figures 89 and 90). The value of the Chance Stage B win count counter indicates the number of times a win in Chance Stage B has occurred. Wins in Chance Stage B can be stockpiled, allowing transitions from the normal stage to Chance Stage B a number of times corresponding to the value of the Chance Stage B win count counter. When transitioning from the normal stage to Chance Stage B, the value of the Chance Stage B win count counter is deducted by 1.

Furthermore, if a "promotion chance" is determined (a promotion chance is won) as a result of the transition flag/winning flag lottery during the normal stage, the main CPU 101 sets the promotion chance winning flag to ON. The promotion chance winning flag indicates that a promotion chance has been won. As will be explained in detail later, winning a promotion chance leads to a transition to the promotion chance via a pre-promotion state (see transition conditions (I) in Figures 89 and 90).

Furthermore, if "Pseudo-BIG" is determined (a Pseudo-BIG is won) as a result of the normal stage transition flag/winning flag lottery, the main CPU 101 sets the Pseudo-BIG winning flag to ON. The Pseudo-BIG winning flag indicates that a Pseudo-BIG has been won. As will be explained in detail later, when a Pseudo-BIG is won, the game transitions to the Pseudo-BIG via a pre-announcement state (see transition conditions (J) in Figures 89 and 90). Note that if "Pseudo-BIG" is determined (a Pseudo-BIG is won) as a result of the normal stage transition flag/winning flag lottery while the promotion chance winning flag is set to ON, the main CPU 101 discards the promotion chance winning flag (sets it to OFF).

After executing the process in step S4082, the main CPU 101 executes point-related processing (step S4083). The point-related processing will be explained later using Figure 114.

After executing the process in step S4083, the main CPU 101 executes the process of drawing the number of pre-announcement games when a flag is drawn during the normal stage (step S4084). The process of drawing the number of pre-announcement games when a flag is drawn during the normal stage will be explained later using Figure 117.

After executing the process in step S4084, the main CPU 101 executes the probability mode-related processing (step S4085). The probability mode-related processing will be explained later using Figure 122.

After executing the process in step S4085, the main CPU 101 terminates this subroutine.

Further details will be provided later, but in the normal payout state (Normal Stage, Chance Stage A, and Chance Stage B), the game is controlled to one of the following probability modes: Non-High Probability, High Probability 1, High Probability 2, and High Probability 3. High Probability 1-3 are basically modes based on the Normal Stage. High Probability 1 is a high probability state that is entered through a lottery (see step S4123 in Figure 109, and Figures 110A and 110B) that occurs when the number of unit games played in the normal payout state reaches a predetermined value (one of "251", "351", "451", "551", "651", and "751") (when the prescribed number of games without a win from the start of the advantageous section is reached). This lottery is conducted according to Normal Modes 1-8.

High Probability 2 is a high probability state that is entered when the value of normal points (see step S4163 in Figure 114) reaches 100 points (see step S4167 in Figure 114, Figure 116, step S4265 in Figure 122, and Figure 123(b)) or when a cherry is won (see step S4262 in Figure 122 and Figure 123(a)). The degree of advantage in the lottery state (probability mode) is the same for High Probability 1 and High Probability 2. High Probability 3 is a high probability state (so-called super high probability) that is entered when High Probability 2 is won during High Probability 1 or High Probability 1 is won during High Probability 2, and it is an even more advantageous state than High Probability 1 and High Probability 2.

The relationship between High Probability Stages 1-3 is as follows. In this game machine, the main routes to winning from the so-called normal state (normal stage in Figure 88) to states recognized as winning by the player ("Promotion Chance" and "Pseudo-BIG") are: when the number of unit games reaches the ceiling game count (see Figure 101(b)); winning through a lottery using winning combinations such as "Reach Combination" (for example, winning combinations corresponding to "Reach Combination" or "Reach Combination BB" shown in Figure 104); and winning through a lottery every time 100 normal points are reached. In the lottery using winning combinations, winning "Promotion Chance" or "Pseudo-BIG" is more likely in Chance Stage A or Chance Stage B than in the normal stage.

Therefore, in the normal stages, the gameplay involves first transitioning from a non-high probability state to high probability states 1 or 2, and then transitioning from high probability states 1 or 2 to a chance stage (chance stage A or chance stage B) to aim for a win. In other words, high probability states 1 and 2 function as states that favor transitioning to chance stages. As mentioned above, high probability state 1 can be entered based on the number of games played, so even if you don't draw so-called rare roles (watermelon or cherry) (don't win), you can still expect to enter a high probability state. High probability state 2 is entered based on a lottery held when reaching a certain point or when a cherry is won, so the transition can be expected depending on the winning role.

Furthermore, High Probability 3 is a state transitioned to through the overlap of High Probability states: a win in High Probability 2 while in High Probability 1, and a win in High Probability 1 while in High Probability 2. As shown in Figure 107 (described later), there is no transition to the Chance Stage, and it functions as a state where wins of "Promotion Chance" and "Pseudo BIG" can be expected. Since High Probability 3 is more advantageous than the Chance Stage, the system is designed to suppress transitions to the Chance Stage. This ensures that High Probability 3 does not end due to a transition to a state with a lower degree of advantage when there are remaining games in High Probability 3.

Furthermore, instead of having a special high-probability state that transitions through the overlap of high-probability states like High Probability 3, if multiple high-probability states overlap (when both the remaining number of games in High Probability 1 and High Probability 2 are 1 or more), it may be possible to implement a specification where, for example, after the number of games in High Probability 1 is used up, the number of games in High Probability 2 is used up (transitioning to High Probability 2 after High Probability 1 ends). Also, in this embodiment, High Probability 1 and 2 are assumed to have the same degree of advantage, but High Probability 2 may have a higher degree of advantage than High Probability 1, or vice versa.

In terms of presentation, it would be good to use visual cues to indicate the current state, such as primarily representing the daytime stage for non-high probability states, the evening stage for high probability states 1 and 2, and the night stage for high probability state 3. Furthermore, it might be possible to implement visual cues that definitively indicate the current state, such as confirming a transition to high probability state 3 when a specific visual cue (such as a transition to the night stage or red text dialogue) occurs. Additionally, it would be beneficial to include visual cues that occur in both high probability states 1 and 2, or those that occur in high probability state 1 but not in high probability state 2, to allow players to anticipate the triggers for transitioning to high probability states.

<Common processing for normal payout conditions>
Figure 108 is a flowchart showing the common processing for normal payout states performed in the main control circuit.

The common processing for normal payout states shown in Figure 108 is the process performed in step S4043 of Figure 99 (processing at the start of gameplay for the normal stage) in the main control circuit 100.

In the normal payout state common processing, the main CPU 101 first determines whether "F_BB confirmed role A" (see Figures 85 and 86) has been determined as the internal winning role through the internal winning role determination process (see step S64 in Figure 26) (step S4101).

If the main CPU 101 determines that "F_BB confirmed role A" has been determined as the internal winning role, it executes the normal long freeze lottery process (step S4102). In this process, the main CPU 101 refers to the normal long freeze lottery table (not shown) and performs a lottery based on random values to determine whether the result of the normal long freeze lottery (1) is "not a win" or "win". If the result of the normal long freeze lottery (1) is "win", it determines whether the result of the normal long freeze lottery (2) is "not a win" or "win". As a result, there is a 1/256 probability of winning the normal long freeze lottery (1) and a 64/256 probability of winning the normal long freeze lottery (2).

If both the normal long freeze lottery (1) and the normal long freeze lottery (2) are won, a long freeze occurs. A long freeze is a type of freeze, and compared to the freeze described above (see step S4081 in Figure 103), the period during which game operations are disabled is longer. If both the normal long freeze lottery (1) and the normal long freeze lottery (2) are won, the main CPU 101 controls the execution of the long freeze in the main-side performance control processing at the start of the game in the unit game in which the normal long freeze lottery (1) and normal long freeze lottery (2) were performed (see step S8 in Figure 23).

Furthermore, if both the normal long freeze lottery (1) and the normal long freeze lottery (2) are won, the main CPU 101 controls the execution of a simulated game in the main-side performance control processing at the start of the next unit game after the unit game in which the normal long freeze lottery (1) and normal long freeze lottery (2) occurred (see step S8 in Figure 23). Also, the main CPU 101 updates the payout state flag storage area (see Figure 20) in the state control processing at the start of the next unit game after the unit game in which the normal long freeze lottery (1) and normal long freeze lottery (2) occurred (see step S6 in Figure 23). As a result, the unit game in which the long freeze occurred is completed, and a simulated game is performed triggered by the operation of the start lever 7 to start the next unit game, leading to a transition to a simulated BIG.

Furthermore, if both the normal long freeze lottery (1) and the normal long freeze lottery (2) are won, the main CPU 101 sets the pseudo-BIG (ED) flag to ON. When the pseudo-BIG (ED) flag is set to ON, the system controls the game to enter pseudo-BIG again when the termination conditions for pseudo-BIG are met, and this causes the pseudo-BIG to continue until the advantageous section ends. As described in the first embodiment, when limit processing (see Figure 16) is performed in the advantageous section (i.e., when predetermined values updated with the progress of gameplay in the advantageous section (e.g., the value of the advantageous section game counter or the advantageous section payout counter) reach a predetermined value (e.g., 3000 games or 1999 coins)), the game transitions from the advantageous section to the non-advantageous section. At this time, the pseudo-BIG also ends. Note that such limit processing may be omitted.

Furthermore, if both the normal long freeze lottery (1) and the normal long freeze lottery (2) are successful, the main CPU 101 clears the values of the Chance Stage A win count counter, the Chance Stage B win count counter, the promotion chance win flag, the pseudo-BIG win flag, and the pre-announcement game count counter (see steps S4082 and S4084 in Figure 103).

If, in step S4101, it is determined that "F_BB confirmed role A" has not been determined as the internal winning role, or after executing the process in step S4102, the main CPU 101 executes the normal prescribed game count counter update process (step S4103). The normal prescribed game count counter update process will be explained later using Figure 109.

After executing the process in step S4103, the main CPU 101 executes ceiling-related processing (step S4104). Ceiling-related processing will be explained later using Figure 112.

After executing the process in step S4104, the main CPU 101 performs the pre-promotion chance processing (step S4105). The pre-promotion chance processing will be explained later using Figure 124.

After executing the process in step S4105, the main CPU 101 terminates this subroutine.

<Normal game count counter update process>
Figure 109 is a flowchart showing the normal prescribed number of games counter update process performed in the main control circuit. Figures 110A and 110B show the normal prescribed number of games high probability 1 transition lottery table. Figure 111 shows the ceiling fake preparation lottery table.

The normal game count counter update process shown in Figure 109 is performed in step S4103 of Figure 108 (normal payout state common processing) in the main control circuit 100.

In the normal game count counter update process, the main CPU 101 first adds 1 to the value of the normal game count counter (step S4121). The value of the normal game count counter indicates the number of unit games played in the normal payout state and is stored in the main RAM 103. The value of the normal game count counter is added only in the normal payout state (normal stage, chance stage A, and chance stage B) and is cleared when transitioning to a payout state other than the normal payout state.

Next, the main CPU 101 determines whether the value of the normal game count counter is a predetermined value (one of "251", "351", "451", "551", "651", and "751") (step S4122).

If the main CPU 101 determines that the value of the normal number of games played counter is one of "251", "351", "451", "551", "651", or "751", it executes the normal number of games played high probability 1 transition lottery process (step S4123). In this process, the main CPU 101 refers to the normal number of games played high probability 1 transition lottery table (see Figures 110A and 110B) and performs a lottery based on random values to determine whether the result of the normal number of games played high probability 1 transition lottery is "not a win" or "high probability 1".

The normal prescribed number of games high probability 1 transition lottery tables shown in Figures 110A and 110B are provided for each of the normal modes ("Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5", "Mode 6", "Mode 7", and "Mode 8") determined by the normal transition mode lottery process (see step S4061 in Figure 100). When the normal mode is "Mode 1", the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110A(a) is referenced; when the normal mode is "Mode 2", the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110A(b) is referenced; when the normal mode is "Mode 3", the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110A(c) is referenced; and when the normal mode is "Mode 4", the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110A(d) is referenced. If the normal mode is "Mode 5," the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110B(e) is referred to; if the normal mode is "Mode 6," the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110B(f) is referred to; if the normal mode is "Mode 7," the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110B(g) is referred to; and if the normal mode is "Mode 8," the normal prescribed number of games high probability 1 transition lottery table shown in Figure 110B(h) is referred to.

In each normal game count transition lottery table, a lottery value corresponding to the result of the normal game count transition lottery ("Negative" and "High Probability 1") is defined for each value of the normal game count counter ("251", "351", "451", "551", "651", and "751"). The probability of each result of the normal game count transition lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". For example, if the normal mode is "Mode 1" and the normal game count counter value is "251", then the result of the normal game count transition lottery is "Negative" with a probability of 240/256 and "High Probability 1" with a probability of 16/256.

If "High Probability 1" is determined as a result of the normal prescribed number of games played transition lottery (i.e., High Probability 1 is selected), the main CPU 101 sets High Probability 1 as the probability mode described above (see step S4082 in Figure 103) and sets the High Probability 1 game counter to "50". The value of the High Probability 1 game counter indicates the remaining number of unit games that can be played in High Probability 1 and is stored in the main RAM 103. If the value of the High Probability 1 game counter is greater than 0, it is deducted by 1 each time a unit game is played. When the value of the High Probability 1 game counter becomes 0, the game transitions from High Probability 1 to non-High Probability. Although not shown in the figure, this deduction is performed in step S15 (game end state control processing) of Figure 23 (main processing).

Furthermore, when High Probability 2 is set as the probability mode (see step S4085 in Figure 103), if "High Probability 1" is determined as the result of the normal prescribed number of games played to transition to High Probability 1 (high probability 1 is won), the main CPU 101 sets High Probability 3 as the probability mode, sets the High Probability 3 game counter to "20", and clears the value of the High Probability 1 game counter and the High Probability 2 guaranteed game counter (described later). The value of the High Probability 3 game counter indicates the remaining number of unit games that can be played in High Probability 3 and is stored in the main RAM 103. If the value of the High Probability 3 game counter is greater than 0, it is deducted by 1 each time a unit game is played. When the value of the High Probability 3 game counter becomes 0, the system transitions from High Probability 3 to High Probability 2. Although not shown in the figure, this deduction is performed in step S15 (game end state control processing) of Figure 23 (main processing).

After executing the process in step S4123, the main CPU 101 terminates this subroutine. However, if the probability mode is set to High Probability 3 at the time of execution of step S4123, the main CPU 101 terminates this subroutine without performing the normal prescribed number of games to determine transition to High Probability 1.

If, in step S4122, the main CPU 101 determines that the value of the normal prescribed number of games counter is not any of "251", "351", "451", "551", "651", or "751", then the main CPU 101 determines whether the value of the normal prescribed number of games counter is the ceiling game count (the value determined by the normal transition ceiling lottery (see step S4062 in Figure 100)) (step S4124).

If the main CPU 101 determines that the value of the normal game count counter is the ceiling game count, it sets the "Ceiling Preparation" state (step S4125). The Ceiling Preparation state is a state controlled in the normal payout state and serves as a preparation period for transitioning to a pre-announcement state (a state in which pre-announcement effects are performed that suggest a transition to either Chance Stage A, Chance Stage B, Upgrade Chance, or Pseudo-BIG). After executing the process in step S4125, the main CPU 101 terminates this subroutine.

Furthermore, if a promotion chance or pseudo-BIG is won at the time step S4125 is executed (if the promotion chance win flag or pseudo-BIG win flag is set to ON), the main CPU 101 terminates this subroutine without setting the ceiling preparation state. Also, if a promotion chance or pseudo-BIG is won while the ceiling preparation state is set, the main CPU 101 clears the ceiling preparation state.

If, in step S4124, the main CPU 101 determines that the value of the normal game count counter is not the maximum number of games, it determines whether the value of the normal game count counter is a specific value (one of "51", "151", "201", "301", "401", "501", "601", "701", and "801") (step S4126).

If the main CPU 101 determines that the value of the normal game count counter is one of "51", "151", "201", "301", "401", "501", "601", "701", or "801", it executes the ceiling fake preparation lottery process (step S4127). In this process, the main CPU 101 refers to the ceiling fake preparation lottery table (see Figure 111) and performs a lottery based on random values to determine whether the result of the ceiling fake preparation lottery is "not a win" or "ceiling fake preparation".

The ceiling fake preparation lottery table shown in Figure 111 is provided for each of the normal modes ("Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5", "Mode 6", "Mode 7", and "Mode 8") determined in the normal transition mode lottery process (see step S4061 in Figure 100). When the normal mode is "Mode 1", the ceiling fake preparation lottery table shown in Figure 111(a) is referenced; when the normal mode is "Mode 2", the ceiling fake preparation lottery table shown in Figure 111(b) is referenced; when the normal mode is "Mode 3", the ceiling fake preparation lottery table shown in Figure 111(c) is referenced; and when the normal mode is "Mode 4", the ceiling fake preparation lottery table shown in Figure 111(d) is referenced. When the normal mode is "Mode 5," the ceiling fake preparation lottery table shown in Figure 111(e) is referenced. When the normal mode is "Mode 6," the ceiling fake preparation lottery table shown in Figure 111(f) is referenced. When the normal mode is "Mode 7," the ceiling fake preparation lottery table shown in Figure 111(g) is referenced. When the normal mode is "Mode 8," the ceiling fake preparation lottery table shown in Figure 111(h) is referenced.

In each ceiling fake preparation lottery table, a lottery value corresponding to the result of the ceiling fake preparation lottery ("Negative Win" and "Ceiling Fake Preparation") is defined for each value of the normal prescribed number of games counter ("51", "151", "201", "301", "401", "501", "601", "701", and "801"). The probability of each result of the ceiling fake preparation lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". For example, if the normal mode is "Mode 1" and the value of the normal prescribed number of games counter is "51", then the result of the ceiling fake preparation lottery will be "Negative Win" with a probability of 192/256 and "Ceiling Fake Preparation" with a probability of 64/256.

If the result of the ceiling fake preparation lottery is determined to be "ceiling fake preparation" (i.e., a win occurs during ceiling fake preparation), the main CPU 101 sets the ceiling fake preparation state. Ceiling fake preparation is a state controlled during normal payout states and serves as a preparation period for transitioning to a false premonition state (a state where premonition effects occur even though a win has not occurred in Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo BIG).

If, in step S4126, it is determined that the value of the normal game count counter is not any of "51", "151", "201", "301", "401", "501", "601", "701", or "801", or after executing the process in step S4127, the main CPU 101 terminates this subroutine.

Furthermore, if, at the time of execution of step S4127, the probability mode is set to High Probability 3, or if a promotion chance or pseudo-BIG is won (if the promotion chance win flag or pseudo-BIG win flag is set to ON), the main CPU 101 will not perform the ceiling fake preparation lottery and will terminate this subroutine. Also, if a promotion chance or pseudo-BIG is won while ceiling fake preparation is set, the main CPU 101 will clear ceiling fake preparation. Additionally, even if the value of the normal prescribed game count counter is any of "51", "151", "201", "301", "401", "501", "601", "701", or "801", if that value is the ceiling game count, the judgment result of step S4124 will be "YES", and therefore the ceiling fake preparation lottery will not be performed.

In this embodiment, the proportion of games that trigger a false premonition (the number of games in which the false premonition occurs) differs depending on the current normal mode (modes 1 to 8). (The value of the normal prescribed number of games counter, which is more likely to result in a win during the ceiling fake preparation lottery, differs for each normal mode.) This prevents the player from being disappointed even if the premonition ends up being a false premonition that doesn't lead to a reward (chance stage, promotion chance, or transition to pseudo-BIG). Instead, the number of games in which the false premonition occurs can serve as a clue to inferring the current mode. Therefore, it provides players with the enjoyment of inferring the mode and further inferring the setting value from the mode.

<Ceiling-related processing>
Figure 112 is a flowchart showing the ceiling-related processing performed in the main control circuit. Figures 113A and 113B show the lottery table for the winning lottery type when the ceiling is reached.

The ceiling-related processing shown in Figure 112 is the process performed in step S4104 of Figure 108 (common processing for normal payout state) in the main control circuit 100.

In the ceiling-related processing, the main CPU 101 first determines whether or not "Ceiling Preparation in Progress" (see step S4125 in Figure 109) is set (step S4141).

If the main CPU 101 determines that the "Preparing for Ceiling" flag is set, it executes the "Preparing for Ceiling" flag set lottery process (step S4142). In this process, the main CPU 101 refers to the "Preparing for Ceiling" flag set lottery table (not shown) and performs a lottery based on random values to determine whether the result of the "Preparing for Ceiling" flag set lottery is "Not a Winner" or "Winner." This results in a 16/256 probability of winning the "Preparing for Ceiling" flag set lottery.

Furthermore, if the value of the game count counter during ceiling preparation exceeds a predetermined value (17), the main CPU 101 will always determine a "win" as the result of the ceiling preparation flag set lottery. The value of the game count counter during ceiling preparation indicates the number of unit games played since ceiling preparation was set and is stored in the main RAM 103. Also, if a promotion chance or pseudo-BIG has been won at the time the processing in step S4142 is executed (if the promotion chance win flag or pseudo-BIG win flag is set to ON), the main CPU 101 will not perform the ceiling preparation flag set lottery and will proceed to step S4143.

After executing the process in step S4142, the main CPU 101 determines whether or not it has won the ceiling preparation flag set lottery (step S4143). If it determines that it has won the ceiling preparation flag set lottery, the main CPU 101 executes the ceiling reach win type lottery process (step S4144). In this process, the main CPU 101 refers to the ceiling reach win type lottery table (see Figures 113A and 113B) and performs a lottery based on random values to determine whether the result of the ceiling reach win type lottery is "No Win," "Chance for Promotion," or "Pseudo BIG."

The lottery tables for determining the winning type upon reaching the ceiling, shown in Figures 113A and 113B, are provided for each of the normal modes ("Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5", "Mode 6", "Mode 7", and "Mode 8") determined in the normal transition mode lottery process (see step S4061 in Figure 100). When the normal mode is "Mode 1", the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113A(a) is referenced; when the normal mode is "Mode 2", the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113A(b) is referenced; when the normal mode is "Mode 3", the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113A(c) is referenced; and when the normal mode is "Mode 4", the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113A(d) is referenced. If the normal mode is "Mode 5," the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113B(e) is referenced. If the normal mode is "Mode 6," the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113B(f) is referenced. If the normal mode is "Mode 7," the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113B(g) is referenced. If the normal mode is "Mode 8," the lottery table for determining the winning type upon reaching the ceiling shown in Figure 113B(h) is referenced.

In each ceiling-reach winning type lottery table, a lottery value corresponding to the result of the ceiling-reach winning type lottery ("Non-Winning," "Upgrade Chance," and "Pseudo-BIG") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each result being determined in the ceiling-reach winning type lottery can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)." For example, if the normal mode is "Mode 1" and the setting is Setting 1, the result of the ceiling-reach winning type lottery will be "Upgrade Chance" with a probability of 255/256 and "Pseudo-BIG" with a probability of 1/256.

If the "Promotion Chance" is determined as a result of the "Winning Type Draw at Ceiling Reached" (i.e., the player has won the Promotion Chance), the main CPU 101 sets the Promotion Chance Winning Flag to ON. As mentioned above, the Promotion Chance Winning Flag is a flag indicating that the player has won the Promotion Chance. Details will be described later, but when the player wins the Promotion Chance, they transition to the Promotion Chance via a pre-probation state (see step S4084 in Figure 103). Furthermore, if the "Promotion Chance" is determined as a result of the "Winning Type Draw at Ceiling Reached" (i.e., the player has won the Promotion Chance), the main CPU 101 sets the "Winning Promotion Chance at Ceiling Reached" Flag to ON. The "Winning Promotion Chance at Ceiling Reached" Flag is a flag indicating that the player has won the Promotion Chance through the "Winning Type Draw at Ceiling Reached".

Furthermore, if "Pseudo-BIG" is determined as the result of the draw for the type of winning ticket when the ceiling is reached (i.e., a Pseudo-BIG is won), the main CPU 101 sets the Pseudo-BIG winning flag to ON. As mentioned above, the Pseudo-BIG winning flag is a flag that indicates that a Pseudo-BIG has been won. As will be explained in detail later, when a Pseudo-BIG is won, the game transitions to a Pseudo-BIG via a premonition state (see step S4084 in Figure 103). Furthermore, if "Pseudo-BIG" is determined as the result of the draw for the type of winning ticket when the ceiling is reached (i.e., a Pseudo-BIG is won), the main CPU 101 sets the Pseudo-BIG winning flag for reaching the ceiling to ON. The "Pseudo-BIG Win Flag at Ceiling Reached" indicates that a pseudo-BIG win was achieved through the ceiling-reach-type win draw.

If the main CPU 101 determines in step S4143 that it has not won the ceiling preparation flag set lottery, or after executing the process in step S4144, the main CPU 101 terminates this subroutine. If the process in step S4144 is executed, the main CPU 101 clears the ceiling preparation status.

If it is determined in step S4141 that the ceiling preparation is not set, the main CPU 101 determines whether the ceiling fake preparation (see step S4127 in Figure 109) is set (step S4145).

If the main CPU 101 determines that "Ceiling Fake Preparation" is set, it executes the Ceiling Fake Preparation Flag Set Lottery process (step S4146). In this process, the main CPU 101 refers to the Ceiling Fake Preparation Flag Set Lottery Table (not shown) and performs a lottery based on random values to determine whether the result of the Ceiling Fake Preparation Flag Set Lottery is "Not a Winner" or "Winner". This results in a 20/256 probability of winning the Ceiling Fake Preparation Flag Set Lottery. If the value of the Ceiling Fake Preparation Game Count Counter exceeds a predetermined value (17), the main CPU 101 always determines "Winner" as the result of the Ceiling Fake Preparation Flag Set Lottery. The value of the Ceiling Fake Preparation Game Count Counter indicates the number of unit games played since "Ceiling Fake Preparation" was set and is stored in the main RAM 103.

If the main CPU 101 wins the Ceiling Fake Preparation Flag Set Lottery, it sets the Ceiling Fake Win Flag to ON. The Ceiling Fake Win Flag indicates that the Ceiling Fake has been won. As will be explained in detail later, winning the Ceiling Fake transitions to a pre-announcement state. However, unless the player wins one of the following: Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo BIG, the player will not transition to any of these payout states even after the pre-announcement state ends. In other words, this pre-announcement state is a state where a false pre-announcement effect is performed (false pre-announcement state). Furthermore, if the Ceiling Fake Preparation Flag Set Lottery is won, the main CPU 101 clears the Ceiling Fake Preparation state.

If the main CPU 101 determines in step S4145 that the "Ceiling Fake Preparation" flag is not set, or after executing the process in step S4146, the main CPU 101 terminates this subroutine. However, if a promotion chance or pseudo-BIG win has been achieved at the time of execution of step S4146 (i.e., the promotion chance win flag or pseudo-BIG win flag is set to ON), the main CPU 101 does not perform the ceiling fake preparation flag set lottery and terminates this subroutine.

<Point-related processing>
Figure 114 is a flowchart showing the point-related processing performed in the main control circuit. Figure 115 is a diagram showing the point acquisition lottery table. Figure 116 is a diagram showing the point reach lottery table.

The point-related processing shown in Figure 114 is the process performed in step S4083 of Figure 103 (processing specific to the normal stage) in the main control circuit 100.

In point-related processing, the main CPU 101 first determines whether "F_Cherry" (see Figures 85 and 86) has been determined as the internal winning combination through internal winning combination determination processing (see step S64 in Figure 26) (step S4161). If it determines that "F_Cherry" has been determined as the internal winning combination, the main CPU 101 adds 1 to the value of the cherry counter (step S4162). The value of the cherry counter indicates the number of times "F_Cherry" has been determined as the internal winning combination and is stored in the main RAM 103. The value of the cherry counter is only added during normal stages, and its upper limit is 4.

If, in step S4161, it is determined that "F_Cherry" has not been determined as an internal winning combination, or after executing the process in step S4162, the main CPU 101 executes the point acquisition lottery process (step S4163). In this process, the main CPU 101 refers to the point acquisition lottery table (see Figure 115) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 3 to determine one of the following as the result of the point acquisition lottery: "Not a Winner," "5," "10," "20," "30," "40," "50," and "100."

The point acquisition lottery table shown in Figure 115 is provided for each of the payout flags in payout flag group 3 ("Other", "Replay Bell", "Weak Rare Role", "Diagonal Watermelon", and "Reach Symbol or Reach Symbol BB"). If the payout flag in payout flag group 3 is "Other," the point acquisition lottery table shown in Figure 115(a) is referred. If the payout flag in payout flag group 3 is "Reply Bell," the point acquisition lottery table shown in Figure 115(b) is referred. If the payout flag in payout flag group 3 is "Weak Rare Role," the point acquisition lottery table shown in Figure 115(c) is referred. If the payout flag in payout flag group 3 is "Diagonal Watermelon," the point acquisition lottery table shown in Figure 115(d) is referred. If the payout flag in payout flag group 3 is "Reach Symbol" or "Reach Symbol BB," the point acquisition lottery table shown in Figure 115(e) is referred.

In each point acquisition lottery table, a lottery value corresponding to the point acquisition lottery result ("Non-winning," "5," "10," "20," "30," "40," "50," and "100") is defined for each cherry counter value ("0," "1," "2," "3," and "4"). The probability of each point acquisition lottery result being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)." For example, if the payout flag in payout flag group 3 is "Reply Bell" and the cherry counter value is "4," then the point acquisition lottery result will be "30" with a probability of 192/256, "50" with a probability of 32/256, and "100" with a probability of 32/256.

If the result of the point acquisition lottery is greater than "0" (i.e., the player wins the point acquisition lottery), the main CPU 101 adds that value to the normal point value. The normal point value is used in the point achievement lottery (see step S4165) and is stored in the main RAM 103. The sub-display unit 22 (see Figure 1) displays an image corresponding to the normal point value (e.g., a meter), allowing the player to see how many normal points have been accumulated. When this meter is full, the point achievement lottery is performed.

Furthermore, when the normal point value is added (when points are acquired), an animation indicating point acquisition may be displayed. In this embodiment, normal points are added according to the internal winning combination (replay or common bell) corresponding to the "RepBell" shown in Figure 115(b). For example, after all reels have stopped and a replay or common bell is awarded, an effect (such as light flowing from the screen or reel backlight towards an image (meter, etc.) corresponding to the normal point value) may be displayed to make the game's mechanics—that the meter value increases upon winning a replay or common bell—easier for the player to understand. Additionally, it may be possible to display an animation suggesting point acquisition or a point acquisition confirmation animation between the start lever operation and before all reels have stopped. Such a configuration enhances the excitement, especially when the player is close to reaching 100 points.

Furthermore, if the value of normal points after addition is 100 or more, the main CPU 101 sets the point arrival flag to ON. The point arrival flag indicates that the value of normal points has reached 100. If the point arrival flag is set to ON in one unit game, when point-related processing begins in the next unit game following that unit game, the main CPU 101 sets the point arrival flag to OFF and sets the point arrival lottery flag to ON. The point arrival lottery flag indicates that a point arrival lottery will be held.

After executing the process in step S4163, the main CPU 101 determines whether the value of normal points reached 100 in the previous unit game (step S4164). The main CPU 101 can recognize that the value of normal points reached 100 in the previous unit game by referring to the point-reaching lottery flag.

If the main CPU 101 determines that the normal point value reached 100 in the previous unit game, it adds 1 to the value of the point reach count counter (step S4165). As described above, the value of the point reach count counter indicates the number of times the normal point value has reached 100 and is stored in the main RAM 103. The value of the point reach count counter is added only in the normal stage and is cleared when transitioning to a payout state other than the normal payout state (normal stage, chance stage A, and chance stage B).

Then, the main CPU 101 executes the point mode lottery process (step S4166). In this process, the main CPU 101 refers to the point mode lottery table (see Figure 102) and performs a lottery based on random values to determine one of "Point Mode 1," "Point Mode 2," or "Point Mode 3" as the result of the point mode lottery (point mode). This process is the same as the process in step S4063 of Figure 100, so its explanation is omitted here.

Next, the main CPU 101 executes a point-reaching lottery process (step S4167). In this process, the main CPU 101 refers to the point-reaching lottery table (see Figure 116) and performs a lottery based on random values to determine one of the following results: "High Probability 2," "Chance Stage A," "Chance Stage B," "Promotion Chance," or "Pseudo-BIG."

The point-reaching lottery table shown in Figure 116 is provided for each of the following: "Point-reaching count counter '0'", "Point-reaching count counters '1, 3, 5, 7'", "Point-reaching count counters '2, 4, 6, 8'", and "Point-reaching count counter '9 or higher' or 'Point Mode 3'". If the value of the point arrival count counter is "0", the point arrival lottery table shown in Figure 116(a) is referenced. If the value of the point arrival count counter is any of "1", "3", "5", or "7" (an odd number), the point arrival lottery table shown in Figure 116(b) is referenced. If the value of the point arrival count counter is any of "2", "4", "6", or "8" (an even number), the point arrival lottery table shown in Figure 116(c) is referenced. If the value of the point arrival count counter is "9" or greater, or if the point mode (see step S4166) is "Point Mode 3", the point arrival lottery table shown in Figure 116(d) is referenced.

In each point-reaching lottery table, a lottery value corresponding to the point-reaching lottery result ("High Probability 2," "Chance Stage A," "Chance Stage B," "Promotion Chance," and "Pseudo-BIG") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each point-reaching lottery result being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the point arrival counter value is one of the odd numbers "1", "3", "5", or "7", and the setting value is setting 6, then the result of the point arrival lottery will be: "High Probability 2" with a probability of 170/256, "Chance Stage A" with a probability of 76/256, "Chance Stage B" with a probability of 2/256, and "Promotion Chance" with a probability of 8/256. Furthermore, if the point arrival counter value is "9" or higher, or if the point mode is "Point Mode 3", then regardless of the setting value, "Pseudo BIG" will be determined with a probability of 256/256.

If "High Probability 2" is determined as the result of the point-reaching lottery, the main CPU 101 sets the "High Probability 2" flag to ON. The "High Probability 2" flag indicates that "High Probability 2" was determined as the result of the point-reaching lottery. As will be explained in detail later, when the "High Probability 2" flag is set to ON, the probability mode may transition from non-high probability or high probability 1 to high probability 2 or high probability 3 (see step S4085 in Figure 103).

Furthermore, if "Chance Stage A" is determined as a result of the point-reaching lottery (i.e., the player has won Chance Stage A), the main CPU 101 adds 1 to the value of the Chance Stage A winning count counter. As mentioned above, a value of 1 or more in the Chance Stage A winning count counter indicates that the player has won Chance Stage A. Details will be described later, but when a player wins Chance Stage A, they transition to Chance Stage A via a pre-stage (see step S4084 in Figure 103). Also, if "Chance Stage A" is determined as a result of the point-reaching lottery (i.e., the player has won Chance Stage A), the main CPU 101 adds 1 to the value of the point-reaching Chance Stage A winning count counter. A value of 1 or more in the point-reaching Chance Stage A winning count counter indicates that the player has won Chance Stage A through the point-reaching lottery.

Furthermore, if "Chance Stage B" is determined as a result of the point-reaching lottery (i.e., the player has been selected for Chance Stage B), the main CPU 101 adds 1 to the value of the Chance Stage B winning count counter. As mentioned above, a value of 1 or more in the Chance Stage B winning count counter indicates that the player has been selected for Chance Stage B. As will be explained in detail later, when the player is selected for Chance Stage B, they transition to Chance Stage B via a pre-stage (see step S4084 in Figure 103). Also, if "Chance Stage B" is determined as a result of the point-reaching lottery (i.e., the player has been selected for Chance Stage B), the main CPU 101 adds 1 to the value of the point-reaching Chance Stage B winning count counter. A value of 1 or more in the point-reaching Chance Stage B winning count counter indicates that the player has been selected for Chance Stage B through the point-reaching lottery.

Furthermore, if a "promotion chance" is determined as a result of the point-reaching lottery (i.e., the player has won the promotion chance), the main CPU 101 sets the promotion chance winning flag to ON. As mentioned above, the promotion chance winning flag is a flag indicating that the player has won the promotion chance. Details will be described later, but when a player wins the promotion chance, they transition to the promotion chance via a pre-promotion state (see step S4084 in Figure 103). Also, if a "promotion chance" is determined as a result of the point-reaching lottery (i.e., the player has won the promotion chance), the main CPU 101 sets the point-reaching promotion chance winning flag to ON. The point-reaching promotion chance winning flag is a flag indicating that the player has won the promotion chance through the point-reaching lottery.

Furthermore, if a "pseudo-BIG" is determined as a result of the point-reaching lottery (i.e., a pseudo-BIG is won), the main CPU 101 sets the pseudo-BIG win flag to ON. As mentioned above, the pseudo-BIG win flag is a flag indicating that a pseudo-BIG has been won. As will be explained in detail later, when a pseudo-BIG is won, the game transitions to a pseudo-BIG via a pre-announcement state (see step S4084 in Figure 103). Also, if a "pseudo-BIG" is determined as a result of the point-reaching lottery (i.e., a pseudo-BIG is won), the main CPU 101 sets the point-reaching pseudo-BIG win flag to ON. The point-reaching pseudo-BIG win flag is a flag indicating that a pseudo-BIG has been won through the point-reaching lottery.

Therefore, if the value of the point arrival counter is "9" or greater, or if point mode 3 is set as the point mode, and a point arrival lottery is performed, it is confirmed that the game will transition to a pseudo-BIG. The image corresponding to the normal point value (e.g., meter) is colored according to the current point mode. For example, if point mode 3 is set as the point mode, the color of the meter will be a predetermined color (e.g., gold). When the process in step S4167 is executed, the main CPU 101 subtracts 100 from the normal point value.

If, in step S4164, it is determined that the value of normal points in the previous unit game did not reach 100, or after executing the process in step S4167, the main CPU 101 terminates this subroutine.

Furthermore, even if step S4164 determines that the value of normal points reached 100 in the previous unit game, if the player has won Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo-BIG (if the value of the Chance Stage A win counter or Chance Stage B win counter is 1 or greater, or if the Promotion Chance win flag or Pseudo-BIG win flag is set to ON), if the probability mode is set to High Probability 3, or if the player is in a pre-announcement state, the main CPU 101 will terminate this subroutine without executing the processes in steps S4165 to S4167. However, even in these cases, if Point Mode 3 is set as the point mode, the processes in steps S4165 to S4167 may be executed.

Here, the premonition state includes false premonition states, and even in the case of a false premonition state, the processing in steps S4165 to S4167 (point arrival lottery) is not executed. As mentioned above, when a point arrival lottery is performed, 100 is subtracted from the normal point value, and by looking at the meter displayed on the sub-performance display unit 22, the player can recognize that a point arrival lottery has been performed. If, for example, a point arrival lottery were not performed during a genuine premonition state, but were performed during a false premonition state, the player might be able to see through the meter that the premonition performance currently being performed is a false premonition performance. In this embodiment, since the false premonition state is managed by the main control circuit 100, just like the genuine premonition state (see step S4146 in Figure 112), it is possible to configure the system so that the point-reach lottery is not performed during the false premonition state. This makes it difficult to distinguish between genuine and false premonition effects, thereby ensuring the player's anticipation for the premonition effects.

Furthermore, when the normal point value reaches a predetermined value (100 points), a special animation indicating the 100-point milestone may be displayed. While this animation simply indicates the availability of a point-based lottery (point-reaching lottery), it may also incorporate elements that suggest the likelihood of winning a prize or the type of prize that is more likely to be won, based on the current point mode, settings, and the value of the point-reaching counter. For example, the default animation could be a flashing meter upon reaching 100 points, with a lightning strike effect on the meter indicating a high probability of winning a prize (e.g., an upgrade chance or a pseudo-BIG). Alternatively, the animation could display images unrelated to the meter or other elements corresponding to the normal point value. For example, the type of mini-character appearing on the screen could indicate the likelihood of winning.

Furthermore, in this embodiment, since the point-reaching lottery process is executed in the unit game following the one in which 100 points are reached, it is possible to configure the system to display effects that suggest the expected probability of winning the aforementioned prizes or the type of prize that is more likely to be won during the unit game following the unit game in which the aforementioned replay or common bell winning effect occurred. For example, the effects may be displayed according to the result of the point-reaching lottery before the result of the lottery is announced (for example, after the start lever is operated in the unit game in which the point-reaching lottery was performed, but before all reels stop). In this case, the result of the point-reaching lottery may be announced when all reels stop in the unit game in which the lottery was performed.

Furthermore, the following configurations can be adopted for point-related processing during the pre-announcement state. For example, the meter may be hidden during the pre-announcement state, regardless of whether it is a false pre-announcement or a genuine pre-announcement, allowing the player to concentrate on the pre-announcement animation (Specification Example 1). Also, even if the normal point value reaches 100 points during a false pre-announcement and a point-reach lottery is held, the result may not be immediately announced. Instead, after the pre-announcement ends, animations indicating the point reach, animations indicating that a point-reach lottery was held, and the lottery result may be announced (Specification Example 2). Furthermore, Specification Example 1 and Specification Example 2 may be combined.

Here, if a point-reaching lottery is held during a non-premonition state, the result of that point-reaching lottery can be configured to be announced when all reels stop in the unit game in which the point-reaching lottery was held. Specification Example 2, while generally announcing the result after the premonition ends when a point-reaching lottery is held during a premonition state, it is desirable that the result be announced during the premonition if the lottery result is a promotion chance or a pseudo-BIG win. In this case, it is best to perform the announcement animation so as to correspond to the animation state during the false premonition, without causing any sense of incongruity. Furthermore, as mentioned above, if a false premonition occurs, it is possible to estimate the setting value. However, if the announcement of a promotion chance or pseudo-BIG win through a point-reaching lottery during a false premonition is made unclear as to whether the premonition was false or not, it can increase the difficulty of setting estimation.

Furthermore, if the normal point value reaches 100 points during a false premonition, the execution of the point-reach lottery may be postponed until the end of the false premonition, or 1 to 3 games after the end of the false premonition (Example 3). In this case, the animation indicating the point reach, the animation indicating that the point-reach lottery has been held, and the notification of the lottery result will also be postponed. This makes it easier for players to understand whether the transition to the premonition was triggered by winning a promotion chance or pseudo-BIG, or whether the promotion chance or pseudo-BIG was won through a point-reach lottery conducted during the premonition.

<During normal stages, when a flag is won, the number of pre-game moves is drawn.>
Figure 117 is a flowchart showing the pre-announcement game count lottery process performed in the main control circuit when a flag is won during the normal stage. Figure 118 is a flowchart showing the pre-announcement game count lottery process performed in the main control circuit when a pseudo-BIG or upgrade chance is won during the normal stage. Figure 119 is a flowchart showing the pre-announcement game count lottery process performed in the main control circuit when a chance stage is won during the normal stage. Figure 120A(a) shows the pre-announcement game count lottery table for pseudo-BIG or upgrade chance wins during the normal stage (when a point is reached). Figure 120A(b) shows the pre-announcement game count lottery table for pseudo-BIG or upgrade chance wins during the normal stage (when the ceiling is reached). Figure 120A(c) shows the pre-announcement game count lottery table for pseudo-BIG or upgrade chance wins during the normal stage (basic). Figure 120B(d) shows the lottery table for the number of pre-announcement games played when a chance stage is won during the normal stage (when a point is reached). Figure 120B(e) shows the lottery table for the number of pre-announcement games played when a chance stage is won during the normal stage (basic). Figure 120B(f) shows the lottery table for the number of pre-announcement games played when a ceiling fake win occurs during the normal stage.

The process of drawing the number of pre-announcement games when a flag is drawn during the normal stage, as shown in Figure 117, is performed in step S4084 of Figure 103 (processing specific to the normal stage) in the main control circuit 100.

During the normal stage, in the process of drawing the number of pre-announcement games when a flag is won, the main CPU 101 first determines whether the value of the pre-announcement game counter is 0 or not (step S4181). The value of the pre-announcement game counter indicates the remaining number of unit games controlled to the pre-announcement state and is stored in the main RAM 103. In the pre-announcement state during the normal stage, pre-announcement effects are performed that suggest a transition to one of the following: Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo BIG. If the value of the pre-announcement game counter is not 0 (it is 1 or more), it indicates that the pre-announcement state is in progress.

If the main CPU 101 determines that the value of the pre-bonus game counter is not zero, it terminates this subroutine. On the other hand, if the main CPU 101 determines that the value of the pre-bonus game counter is zero, it determines whether the pseudo-BIG win flag is set to ON (step S4182). As described above, the pseudo-BIG win flag indicates that a pseudo-BIG win has been achieved (see steps S4082 in Figure 103, S4144 in Figure 112, and S4167 in Figure 114).

If the main CPU 101 determines that the pseudo-BIG win flag is not set to ON, it determines whether the promotion chance win flag is set to ON (step S4183). As described above, the promotion chance win flag is a flag indicating that a promotion chance has been won (see step S4082 in Figure 103, step S4144 in Figure 112, and step S4167 in Figure 114).

If the system determines in step S4182 that the pseudo-BIG win flag is set to ON, or if it determines in step S4183 that the promotion chance win flag is set to ON, the main CPU 101 executes the pre-bonus game count lottery process for pseudo-BIG/promotion chance wins during the normal stage (step S4184). Here, the pre-bonus game count lottery process for pseudo-BIG/promotion chance wins during the normal stage will be explained using Figure 118.

During the normal stage, in the pre-bonus game count lottery process for pseudo-BIG and promotion chance wins, the main CPU 101 first determines whether the point-reaching pseudo-BIG win flag or the point-reaching promotion chance win flag is set to ON (step S4201). As described above, the point-reaching pseudo-BIG win flag indicates that a pseudo-BIG win has been achieved through the point-reaching lottery, and the point-reaching promotion chance win flag indicates that a promotion chance has been achieved through the point-reaching lottery (see step S4167 in Figure 114).

If the main CPU 101 determines that the flag for pseudo-BIG win upon reaching a point or the flag for promotion chance win upon reaching a point is set to ON, the main CPU 101 executes a lottery for the number of pre-bonus games for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached) (step S4202). In this process, the main CPU 101 refers to the lottery table for the number of pre-bonus games for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached) (see Figure 120A(a)) and performs a lottery based on random values to determine one of the following results (candidates for the number of pre-bonus games) for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

In the pre-bonus game count lottery table for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached), shown in Figure 120A(a), lottery values corresponding to the results of the pre-bonus game count lottery for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached) are defined ("0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32"). The probability of each result of the pre-bonus game count lottery for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached) can be expressed as "the lottery value defined for that result / the total number of random values that can be extracted (random denominator: 256)".

As a result, during the normal stage (when a point is reached), the number of pre-bonus games drawn when a pseudo-BIG or promotion chance is won will be determined as follows: 0 with a probability of 64/256, 1-4 with a probability of 32/256, 5-8 with a probability of 128/256, 9-12 with a probability of 16/256, and 13-16 with a probability of 16/256. The determined number of pre-bonus games may include multiple values. In this case, the main CPU 101 further draws based on a random value to determine one of these multiple values. The main CPU 101 then determines this single value as the number of pre-bonus games. Note that if Point Mode 3 is set as the Point Mode, the number of pre-bonus games may be determined as 0.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4202 plus 1 to the pre-game sequence counter (step S4203), and terminates this subroutine.

If, in step S4201, the main CPU 101 determines that neither the "Pseudo-BIG Win Flag at Point Reached" nor the "Upgrade Chance Win Flag at Point Reached" is set to "on," then the main CPU 101 determines whether the "Pseudo-BIG Win Flag at Ceiling Reached" or the "Upgrade Chance Win Flag at Ceiling Reached" is set to "on" (step S4204). As described above, the "Pseudo-BIG Win Flag at Ceiling Reached" indicates that a pseudo-BIG win was achieved through the ceiling-reached win type lottery, and the "Upgrade Chance Win Flag at Ceiling Reached" indicates that an upgrade chance was achieved through the ceiling-reached win type lottery (see step S4144 in Figure 112).

If the main CPU 101 determines that the flag for pseudo-BIG win upon reaching the ceiling or the flag for promotion chance win upon reaching the ceiling is set to ON, the main CPU 101 executes a lottery for the number of pre-bonus games for pseudo-BIG/promotion chance wins during the normal stage (when reaching the ceiling) (step S4205). In this process, the main CPU 101 refers to the lottery table for the number of pre-bonus games for pseudo-BIG/promotion chance wins during the normal stage (see Figure 120A(b)) and performs a lottery based on random values to determine one of the following results (candidates for the number of pre-bonus games) for pseudo-BIG/promotion chance wins during the normal stage (when reaching the ceiling): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

The basic structure of the pre-bonus game count lottery table for pseudo-BIG/upgrade chance wins during normal stages (when the ceiling is reached), as shown in Figure 120A(b), is the same as the pre-bonus game count lottery table for pseudo-BIG/upgrade chance wins during normal stages (when a point is reached), as shown in Figure 120A(a). Based on this, the main CPU 101 determines a value of 1 as the pre-bonus game count.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4205 plus 1 to the pre-game sequence counter (step S4206), and terminates this subroutine.

If, in step S4204, it is determined that neither the pseudo-BIG win flag upon reaching the ceiling nor the promotion chance win flag upon reaching the ceiling is set to ON, the main CPU 101 executes a lottery for the number of pre-bonus games for pseudo-BIG and promotion chance wins during the normal stage (basic) (step S4207). In this process, the main CPU 101 refers to the pre-bonus game count lottery table for pseudo-BIG/promotion chance wins during normal stages (see Figure 120A(c)) and performs a lottery based on random values to determine one of the following results (candidate pre-bonus game counts) for the pre-bonus game count lottery during pseudo-BIG/promotion chance wins during normal stages (basic): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

The basic structure of the pre-bonus game count lottery table for pseudo-BIG/promotion chance wins during the normal stage (basic), shown in Figure 120A(c), is the same as the pre-bonus game count lottery table for pseudo-BIG/promotion chance wins during the normal stage (when a point is reached), shown in Figure 120A(a). As a result, the main CPU 101 determines a value of 1 as the pre-bonus game count.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4207 plus 1 to the pre-game sequence counter (step S4208), and terminates this subroutine.

The above explains the pre-bonus game count lottery process performed in step S4184 of Figure 117 during the normal stage when a pseudo-BIG/promotion chance is won, using Figure 118. Returning to Figure 117, after executing the process in step S4184, the main CPU 101 terminates this subroutine.

If the main CPU 101 determines in step S4183 that the promotion chance winning flag is not set to ON, it determines whether the value of the Chance Stage B winning count counter is 1 or greater (step S4185). As described above, a value of 1 or greater for the Chance Stage B winning count counter indicates that the player has won Chance Stage B (see step S4082 in Figure 103 and step S4167 in Figure 114).

If the main CPU 101 determines that the value of the Chance Stage B win count counter is less than 1 (0), it determines whether the value of the Chance Stage A win count counter is 1 or greater (step S4186). As described above, a value of 1 or greater for the Chance Stage A win count counter indicates that the player has won Chance Stage A (see step S4082 in Figure 103 and step S4167 in Figure 114).

If, in step S4185, the value of the Chance Stage B win count counter is determined to be 1 or greater, or if, in step S4186, the value of the Chance Stage A win count counter is determined to be 1 or greater, the main CPU 101 executes the pre-win game count lottery process during the normal stage (step S4187). Here, the pre-win game count lottery process during the normal stage will be explained using Figure 119.

During the normal stage, in the pre-trigger game count lottery process for winning a chance stage, the main CPU 101 first determines whether the value of the "Chance Stage A Win Count Counter" or the "Chance Stage B Win Count Counter" is 1 or greater (step S4221). As described above, a value of 1 or greater for the "Chance Stage A Win Count Counter" indicates that the player has won a chance stage A through the point-reaching lottery, and a value of 1 or greater for the "Chance Stage B Win Count Counter" indicates that the player has won a chance stage B through the point-reaching lottery (see step S4167 in Figure 114).

If the main CPU 101 determines that the value of the Chance Stage A win count counter or the Chance Stage B win count counter is 1 or greater when a point is reached, it executes a lottery for the number of pre-trigger games when a Chance Stage is won during the normal stage (when a point is reached) (step S4222). In this process, the main CPU 101 refers to the lottery table for the number of pre-trigger games when a Chance Stage is won during the normal stage (see Figure 120B(d)) and performs a lottery based on random values to determine one of the following results (candidates for the number of pre-trigger games when a Chance Stage is won during the normal stage (when a point is reached)): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

The basic structure of the pre-bonus game count lottery table for the Chance Stage win during the normal stage (when a point is reached), as shown in Figure 120B(d), is the same as the pre-bonus game count lottery table for the pseudo-BIG/upgrade chance win during the normal stage (when a point is reached), as shown in Figure 120A(a). Based on this, the main CPU 101 determines a value of 1 as the pre-bonus game count.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4222 plus 1 to the pre-game sequence counter (step S4223), and terminates this subroutine.

In step S4221, if the value of the Chance Stage A win counter and the Chance Stage B win counter are both less than 1 (0), the main CPU 101 executes a lottery for the number of pre-trigger games during a normal stage (basic) chance stage win (step S4224). In this process, the main CPU 101 refers to the normal stage (basic) chance stage win pre-trigger game count lottery table (see Figure 120B(e)) and performs a lottery based on random values to determine one of the following results (candidate pre-trigger game counts): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

The basic structure of the pre-bonus game count lottery table for the normal stage (basic) chance stage win, shown in Figure 120B(e), is the same as the pre-bonus game count lottery table for the normal stage (point reach) pseudo-BIG/upgrade chance win, shown in Figure 120A(a). As a result, the main CPU 101 determines a value of 1 as the pre-bonus game count.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4224 plus 1 to the pre-game sequence counter (step S4225), and terminates this subroutine.

The above explains the pre-win game count lottery process performed in step S4187 of Figure 117, which occurs during a normal stage win in a chance stage, using Figure 119. Returning to Figure 117, after executing step S4187, the main CPU 101 terminates this subroutine. Note that if wins in chance stage A and chance stage B are stocked, step S4187 will be executed in the first unit game (the first game of the normal stage) after transitioning from chance stage A or chance stage B to the normal stage.

If, in step S4186, the value of the Chance Stage A win counter is determined to be less than 1 (0), the main CPU 101 determines whether the ceiling fake win flag is set to ON (step S4188). As described above, the ceiling fake win flag is a flag indicating that a ceiling fake win has occurred (see step S4146 in Figure 112).

If the main CPU 101 determines that the ceiling fake win flag is not set to ON, it terminates this subroutine. On the other hand, if the main CPU 101 determines that the ceiling fake win flag is set to ON, it executes a lottery for the number of pre-win games during a normal stage ceiling fake win (step S4189). In this process, the main CPU 101 refers to the lottery table for the number of pre-win games during a normal stage ceiling fake win (see Figure 120B(f)) and performs a lottery based on random values to determine one of the following results (candidate pre-win games): "0", "1-4", "5-8", "9-12", "13-16", "17-20", "21-24", "25-28", and "29-32".

The basic structure of the pre-bonus game count lottery table for fake wins during normal stages, shown in Figure 120B(f), is the same as the pre-bonus game count lottery table for pseudo-BIG/promotion chance wins during normal stages (when a point is reached), shown in Figure 120A(a). As a result, the main CPU 101 determines a value of 1 as the pre-bonus game count.

Then, the main CPU 101 sets the number of pre-game sequences determined in step S4189 plus 1 to the pre-game sequence counter (step S4190), and terminates this subroutine.

As described above, in steps S4203, S4206, or S4208 in Figure 118, steps S4223 or S4225 in Figure 119, or step S4190 in Figure 117, if an initial value is set in the pre-announcement game counter, the main CPU 101 generates pre-announcement effect start command data and stores the generated pre-announcement effect start command data in the communication data storage area of the main RAM 103. The pre-announcement effect start command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that it is time to start the pre-announcement effect, and processes are initiated to display images, output sound, output light, etc., for the pre-announcement effect. As a result, the pre-announcement effect is performed (controlled to a pre-announcement state) for a number of unit games corresponding to the value set in the pre-announcement game counter.

<Pre-game count management processing for normal stages>
Figure 121 is a flowchart showing the pre-game counter management process for the normal stage performed in the main control circuit.

The pre-game count management process for the normal stage, shown in Figure 121, is performed in the main control circuit 100 during step S15 of Figure 23 (main processing) (game end state control processing) when the current payout state is the normal stage (see Figure 88). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area (see Figure 20) in the main RAM 103.

In the normal stage pre-game count counter management process, the main CPU 101 first determines whether the value of the pre-game count counter (see steps S4203, S4206, and S4208 in Figure 118, steps S4223 and S4225 in Figure 119, and step S4190 in Figure 117) is greater than 0 (step S4241). If it determines that the value of the pre-game count counter is 0, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the value of the pre-game count counter is greater than 0, it subtracts 1 from the value of the pre-game count counter (step S4242). Then, the main CPU 101 determines whether the value of the pre-game count counter is 0 or not (step S4243). If it determines that the value of the pre-game count counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the value of the pre-announcement game counter is determined to be 0, the main CPU 101 terminates the pre-announcement sequence (step S4244). In this process, the main CPU 101 generates a pre-announcement sequence termination command data and stores the generated command data in the communication data storage area of the main RAM 103. The pre-announcement sequence termination command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that it is time to terminate the pre-announcement sequence, and it then terminates the image display, sound output, light output, etc., that are being performed for the pre-announcement sequence.

Next, the main CPU 101 determines whether the pseudo-BIG win flag is set to ON (step S4245). As described above, the pseudo-BIG win flag is a flag indicating that a pseudo-BIG win has been achieved (see steps S4082 in Figure 103, S4144 in Figure 112, and S4167 in Figure 114).

If the main CPU 101 determines that the pseudo-BIG win flag is set to ON, it sets the pseudo-BIG transition flag to ON (step S4246). Although not shown in the diagram, the main CPU 101 also sets the pseudo-BIG win flag to OFF. If the pseudo-BIG win flag upon reaching a point or the pseudo-BIG win flag upon reaching the ceiling is set to ON, the main CPU 101 also sets these flags to OFF. Afterward, the main CPU 101 terminates this subroutine.

The pseudo-BIG transition flag indicates the timing to initiate a pseudo-BIG bonus. The main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next game in which the pseudo-BIG transition flag is set to ON. This triggers a transition to a pseudo-BIG bonus.

If the main CPU 101 determines in step S4245 that the pseudo-BIG win flag is not set to ON, it then determines whether the promotion chance win flag is set to ON (step S4247). As described above, the promotion chance win flag indicates that a promotion chance has been won (see steps S4082 in Figure 103, S4144 in Figure 112, and S4167 in Figure 114).

If the main CPU 101 determines that the promotion chance winning flag is set to ON, it sets the promotion chance transition flag to ON (step S4248). Although not shown in the diagram, the main CPU 101 also sets the promotion chance winning flag to OFF. If the promotion chance winning flag upon reaching a certain point or the promotion chance winning flag upon reaching the ceiling is set to ON, the main CPU 101 also sets these flags to OFF. Afterward, the main CPU 101 terminates this subroutine.

The promotion chance transition flag indicates that it is time to initiate the promotion chance. The main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next unit game after the promotion chance transition flag was set to ON. This triggers the transition to the promotion chance.

If the main CPU 101 determines in step S4247 that the promotion chance winning flag is not set to ON, it determines whether the value of the Chance Stage B winning count counter is 1 or greater (step S4249). As described above, a value of 1 or greater for the Chance Stage B winning count counter indicates that the player has won Chance Stage B (see step S4082 in Figure 103 and step S4167 in Figure 114).

If the main CPU 101 determines that the value of the Chance Stage B win count counter is 1 or greater, it sets the Chance Stage B transition flag to ON (step S4250). Although not shown in the diagram, the main CPU 101 also subtracts 1 from the value of the Chance Stage B win count counter. Furthermore, if the pre-announcement state ending this time was initiated by a Chance Stage win pre-announcement game count lottery (see step S4222 in Figure 119) during the normal stage (when a point is reached), the main CPU 101 subtracts 1 from the value of the Chance Stage B win count counter at point reach. After that, the main CPU 101 terminates this subroutine.

The Chance Stage B transition flag indicates that it is time to start Chance Stage B. In the game start state control processing (see step S6 in Figure 23) for the next game in which the Chance Stage B transition flag is set to ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to Chance Stage B.

If, in step S4249, the main CPU 101 determines that the value of the Chance Stage B win counter is less than 1 (0), it determines whether the value of the Chance Stage A win counter is 1 or greater (step S4251). As described above, a value of 1 or greater for the Chance Stage A win counter indicates that the player has won Chance Stage A (see step S4082 in Figure 103 and step S4167 in Figure 114). If the main CPU 101 determines that the value of the Chance Stage A win counter is less than 1 (0), it terminates this subroutine.

On the other hand, if the main CPU 101 determines that the value of the Chance Stage A win count counter is 1 or greater, it sets the Chance Stage A transition flag to ON (step S4252). Although not shown in the diagram, the main CPU 101 also subtracts 1 from the value of the Chance Stage A win count counter. Furthermore, if the pre-announcement state ending this time was initiated by a Chance Stage win count lottery (see step S4222 in Figure 119) during the normal stage (when a point is reached), the main CPU 101 subtracts 1 from the value of the Chance Stage A win count counter at point arrival. After that, the main CPU 101 terminates this subroutine.

The Chance Stage A transition flag indicates that it is time to start Chance Stage A. In the game start state control processing (see step S6 in Figure 23) for the next game in which the Chance Stage A transition flag is set to ON, the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to Chance Stage A.

Based on the above, if you win on Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo-BIG, you will transition to Chance Stage A, Chance Stage B, Promotion Chance, or Pseudo-BIG via a premonition state. On the other hand, if you win on Ceiling Fake, there will be no transition in the payout state. Furthermore, if you win on multiple payout states from Chance Stage A, Chance Stage B, Promotion Chance, and Pseudo-BIG, the transition to Pseudo-BIG will be the highest priority, followed by the transition to Promotion Chance, then to Chance Stage B, and finally to Chance Stage A.

Furthermore, if the game transitions to a pre-announcement state by winning a ceiling fake, and a promotion chance or pseudo-BIG is won during the pre-announcement state, the game may transition to a promotion chance or pseudo-BIG when the pre-announcement state ends. Also, if the game transitions to a pre-announcement state by winning a chance stage A or chance stage B, and a promotion chance or pseudo-BIG is won during the pre-announcement state, the game may transition to a promotion chance or pseudo-BIG when the pre-announcement state ends, or it may transition to chance stage A or chance stage B.

<Probability Mode Related Processing>
Figure 122 is a flowchart showing the probability mode-related processing performed in the main control circuit. Figure 123(a) shows the high probability 2 transition lottery table (1). Figure 123(b) shows the high probability 2 transition lottery table (2). Figure 123(c) shows the high probability 2 transition lottery table (3). Figure 123(d) shows the high probability 2 fall lottery table.

The probability mode-related processing shown in Figure 122 is the process performed in step S4085 of Figure 103 (processing specific to the normal stage) in the main control circuit 100.

In the probability mode-related processing, the main CPU 101 first determines whether "F_Cherry" (see Figures 85 and 86) has been determined as the internal winning combination through the internal winning combination determination process (see step S64 in Figure 26) (step S4261).

If the main CPU 101 determines that "F_Cherry" is the internal winning combination, it executes the high probability 2 transition lottery process (1) (step S4262). In this process, the main CPU 101 refers to the high probability 2 transition lottery table (1) (see Figure 123(a)) and performs a lottery based on random values to determine one of the following as the result of the high probability 2 transition lottery (1): "0", "10", "20", "30", "40", and "50".

In the high probability 2 transition lottery table (1) shown in Figure 123(a), a lottery value corresponding to the result of the high probability 2 transition lottery (1) ("0", "10", "20", "30", "40", and "50") is defined for each setting value ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the high probability 2 transition lottery (1) being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". For example, if setting value 1 is setting 1, the result of the high probability 2 transition lottery (1) is determined as "0" with a probability of 170/256, "10" with a probability of 58/256, and "20" with a probability of 28/256.

As described above, in the normal payout state, the probability mode is controlled to one of the following: non-high probability, high probability 1, high probability 2, and high probability 3. If the current probability mode is non-high probability, and a value greater than "0" is determined as a result of the high probability 2 transition lottery (1) (i.e., the high probability 2 transition lottery (1) is won), the main CPU 101 sets high probability 2 as the probability mode and sets the value determined as a result of the high probability 2 transition lottery (1) in the high probability 2 guaranteed game counter (step S4263). The value of the high probability 2 guaranteed game counter indicates the remaining number of unit games for which staying in high probability 2 is guaranteed, and is stored in the main RAM 103. If the value of the high probability 2 guaranteed game counter is greater than 0, it is deducted by 1 each time a unit game is played in high probability 2. Although not shown in the diagram, this subtraction is performed in step S15 (game end state control processing) of Figure 23 (main processing).

Furthermore, if the current probability mode is High Probability 2, and the result of the High Probability 2 Transition Lottery (1) is a value greater than "0" (i.e., the High Probability 2 Transition Lottery (1) is won), the main CPU 101 will set the value determined by the High Probability 2 Transition Lottery (1) to the High Probability 2 Guaranteed Games Counter if the value determined by the High Probability 2 Transition Lottery (1) is greater than the current value of the High Probability 2 Guaranteed Games Counter. However, if the value determined by the High Probability 2 Transition Lottery (1) is less than or equal to the current value of the High Probability 2 Guaranteed Games Counter, the value determined by the High Probability 2 Transition Lottery (1) will be discarded.

Furthermore, if the current probability mode is High Probability 1, and the result of the High Probability 2 transition lottery (1) is a value greater than "0" (i.e., the High Probability 2 transition lottery (1) is won), the main CPU 101 sets the probability mode to High Probability 3, sets the High Probability 3 game counter to "20", clears the value of the High Probability 1 game counter, and discards the value determined as the result of the High Probability 2 transition lottery (1). Note that if the current probability mode is High Probability 3, the main CPU 101 does not execute the High Probability 2 transition lottery (1) even if the judgment result of step S4261 is "YES".

If, in step S4261, it is determined that "F_Cherry" has not been determined as the internal winning combination, or after executing the process in step S4263, the main CPU 101 determines whether the "High Probability 2 Winning Flag at Point Reached" is set to ON (step S4264). As described above, the "High Probability 2 Winning Flag at Point Reached" is a flag indicating that "High Probability 2" was determined as a result of the point reach lottery (see step S4167 in Figure 114).

If the main CPU 101 determines that the high probability 2 win flag is set to ON upon reaching a certain point, it executes the high probability 2 transition lottery process (2) (step S4265). In this process, the main CPU 101 refers to the high probability 2 transition lottery table (2) (see Figure 123(b)) and performs a lottery based on random values to determine the result of the high probability 2 transition lottery (2) to be one of "0", "10", "20", "30", "40", or "50". The basic configuration of the high probability 2 transition lottery table (2) shown in Figure 123(b) is the same as that of the high probability 2 transition lottery table (1) shown in Figure 123(a).

Similar to the process in step S4263, if the current probability mode is not high probability, and the result of the high probability 2 transition lottery (2) is a value greater than "0" (i.e., the high probability 2 transition lottery (2) was won), the main CPU 101 sets the probability mode to high probability 2 and sets the value determined as the result of the high probability 2 transition lottery (2) in the high probability 2 guaranteed game counter (step S4266).

Furthermore, if the current probability mode is High Probability 2, and the result of the High Probability 2 transition lottery (2) is a value greater than "0" (i.e., the High Probability 2 transition lottery (2) is won), the main CPU 101 will set the value determined by the High Probability 2 transition lottery (2) to the High Probability 2 guaranteed game counter if the value determined by the High Probability 2 transition lottery (2) is greater than the current value of the High Probability 2 guaranteed game counter. On the other hand, if the value determined by the High Probability 2 transition lottery (2) is less than or equal to the current value of the High Probability 2 guaranteed game counter, the value determined by the High Probability 2 transition lottery (2) will be discarded.

Furthermore, if the current probability mode is High Probability 1, and the result of the High Probability 2 transition lottery (2) is a value greater than "0" (i.e., the High Probability 2 transition lottery (2) is won), the main CPU 101 sets the probability mode to High Probability 3, sets the High Probability 3 game counter to "20", clears the value of the High Probability 1 game counter, and discards the value determined as a result of the High Probability 2 transition lottery (2). Note that if the current probability mode is High Probability 3, the main CPU 101 does not execute the High Probability 2 transition lottery (2) even if the judgment result of step S4264 is "YES".

If, in step S4264, it is determined that the high probability 2 win flag upon reaching a point is not set to ON, or after executing the process in step S4266, the main CPU 101 determines whether or not it is time to transition from Chance Stage A or Chance Stage B to the Normal Stage (step S4267). As described above, the transition to the Normal Stage occurs in the game start state control process (see step S6 in Figure 23) of the unit game following the unit game in which the Normal Stage transition flag is set to ON. In the game start state control process of the unit game that transitions to the Normal Stage, the transition to the Normal Stage is initiated by updating the payout state flag storage area (see Figure 20), and then the game start process for the Normal Stage shown in Figure 99 is performed. In step S4267, the main CPU 101 determines that if the game transitions to the normal stage during the current unit game (i.e., if the current unit game is the first game of the normal stage), and the payout state from the starting point was Chance Stage A or Chance Stage B, then the transition occurs from Chance Stage A or Chance Stage B to the normal stage.

If the main CPU 101 determines that the game is transitioning from Chance Stage A or Chance Stage B to the Normal Stage, it executes the High Probability Stage 2 transition lottery process (3) (step S4268). In this process, the main CPU 101 refers to the High Probability Stage 2 transition lottery table (3) (see Figure 123(c)) and performs a lottery based on random values to determine the result of the High Probability Stage 2 transition lottery (3) to be one of "0", "10", "20", "30", "40", or "50". The basic configuration of the High Probability Stage 2 transition lottery table (3) shown in Figure 123(c) is the same as that of the High Probability Stage 2 transition lottery table (1) shown in Figure 123(a).

Similar to the process in step S4263, if the current probability mode is not high probability, and the result of the high probability 2 transition lottery (3) is a value greater than "0" (i.e., the high probability 2 transition lottery (3) was won), the main CPU 101 sets the probability mode to high probability 2 and sets the value determined as a result of the high probability 2 transition lottery (3) in the high probability 2 guaranteed game counter (step S4269).

Furthermore, if the current probability mode is High Probability 2, and the result of the High Probability 2 transition lottery (3) is a value greater than "0" (i.e., the High Probability 2 transition lottery (3) is won), the main CPU 101 will set the value determined by the High Probability 2 transition lottery (3) to the High Probability 2 guaranteed game counter if the value determined by the High Probability 2 transition lottery (3) is greater than the current value of the High Probability 2 guaranteed game counter. On the other hand, if the value determined by the High Probability 2 transition lottery (3) is less than or equal to the current value of the High Probability 2 guaranteed game counter, the value determined by the High Probability 2 transition lottery (3) will be discarded.

Furthermore, if the current probability mode is High Probability 1, and the result of the High Probability 2 transition lottery (3) is a value greater than "0" (i.e., the High Probability 2 transition lottery (3) is won), the main CPU 101 sets the probability mode to High Probability 3, sets the High Probability 3 game counter to "20", clears the value of the High Probability 1 game counter, and discards the value determined as a result of the High Probability 2 transition lottery (3). Note that if the current probability mode is High Probability 3, the main CPU 101 does not execute the High Probability 2 transition lottery (3) even if the judgment result in step S4267 is "YES".

If, in step S4267, it is determined that the transition from Chance Stage A or Chance Stage B to the Normal Stage is not occurring, or after executing the process in step S4269, the main CPU 101 determines whether the current probability mode is either High Probability 2 or High Probability 3 (step S4270). If it is determined that the current probability mode is either High Probability 2 or High Probability 3, the main CPU 101 determines whether the value of the High Probability 2 guaranteed game counter is "0" (step S4271).

If the value of the High Probability 2 guaranteed game counter is determined to be "0", the main CPU 101 executes the High Probability 2 fall-out lottery process (step S4272). In this process, the main CPU 101 refers to the High Probability 2 fall-out lottery table (see Figure 123(d)) and performs a lottery based on the payout flags in the payout flag group 4 (see Figure 92) and random values to determine whether the result of the High Probability 2 fall-out lottery is "not a win" or "a win".

In the high probability 2 fall lottery table shown in Figure 123(d), a lottery value corresponding to the result of the high probability 2 fall lottery ("non-winner" and "winner") is defined for each payout flag ("other" and "non-faller") in payout flag group 4. The probability of each result of the high probability 2 fall lottery being determined can be expressed as "the lottery value defined for that result / the total number of random values that can be extracted (random denominator: 256)". As a result, if the payout flag in payout flag group 4 is "other", there is a 192/256 probability of winning the high probability 2 fall lottery, and if the payout flag in payout flag group 4 is "non-faller", there is always a non-winner in the high probability 2 fall lottery. If the player wins the lottery for dropping to High Probability 2, the main CPU 101 will transition the probability mode from High Probability 2 or High Probability 3 to a non-High Probability mode.

If, in step S4270, it is determined that the current probability mode is neither High Probability 2 nor High Probability 3; if, in step S4271, it is determined that the value of the High Probability 2 guaranteed game counter is not "0"; or after executing the process in step S4272, the main CPU 101 terminates this subroutine.

<Pre-promotion opportunity processing>
Figure 124 is a flowchart showing the pre-processing for promotion chances performed in the main control circuit. Figure 125 is a diagram showing the lottery table when transitioning to a promotion chance.

The pre-promotion chance processing shown in Figure 124 is a process performed in step S4105 of Figure 108 (common processing for normal payout state) in the main control circuit 100.

In the pre-processing for the promotion chance, the main CPU 101 first determines whether the value of the pre-announcement game counter (see steps S4203, S4206, and S4208 in Figure 118, steps S4223 and S4225 in Figure 119, and step S4190 in Figure 117) is 1 (step S4281). If it determines that the value of the pre-announcement game counter is not 1, the main CPU 101 terminates this subroutine.

On the other hand, if the pre-announcement game count counter is determined to be 1, the main CPU 101 determines whether the promotion chance winning flag is set to ON (step S4282). As described above, the promotion chance winning flag is a flag indicating that a promotion chance has been won (see step S4082 in Figure 103, step S4144 in Figure 112, and step S4167 in Figure 114).

Furthermore, if a pseudo-BIG win occurs while the promotion chance win flag is set to "on," the promotion chance win flag is set to "off." Therefore, if the promotion chance win flag is set to "on," it means that a pseudo-BIG win has not been achieved. Consequently, the judgment result in step S4282 is "YES" only when a transition to a promotion chance is planned for the next unit of play.

If the main CPU 101 determines that the promotion chance winning flag is not set to ON, it terminates this subroutine. On the other hand, if the main CPU 101 determines that the promotion chance winning flag is set to ON, it executes the point mode lottery process (step S4283). In this process, the main CPU 101 refers to the point mode lottery table (see Figure 102) and performs a lottery based on random values to determine one of "Point Mode 1," "Point Mode 2," or "Point Mode 3" as the result of the point mode lottery (point mode).

This process is the same as the process in step S4063 of Figure 100, so its explanation is omitted here. Note that when the main CPU 101 executes the process in step S4283, if the value of the normal points (see Figure 114) is 100 or more, it adds the quotient obtained by dividing the normal points value by 100 to the value of the point arrival count counter. For example, if the normal points value is 250, then 250 ÷ 100 = 2 remainder 50. In this case, 2 is added to the value of the point arrival count counter, and the remainder of 50 points is discarded.

After executing the process in step S4283, the main CPU 101 executes the promotion chance transition lottery process (step S4284). In this process, the main CPU 101 refers to the promotion chance transition lottery table (see Figure 125) and performs a lottery based on random values to determine whether the result of the promotion chance transition lottery is "Not a Winner," "Pseudo-BIG," or "Pseudo-BIG (ED)."

In the promotion chance transition lottery table shown in Figure 125, lottery values corresponding to the results of the promotion chance transition lottery ("Non-Winning," "Pseudo-BIG," and "Pseudo-BIG (ED)") are defined for each of "Point Mode 1," "Point Mode 2," and "Point Mode 3, Normal Mode 7, or Normal Mode 8." The probability of each result of the promotion chance transition lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

As a result, if Point Mode 1 is set as the point mode, the result of the lottery when transitioning to the promotion chance will be "Non-Winning" with a probability of 256/256. If Point Mode 2 is set as the point mode, the result of the lottery when transitioning to the promotion chance will be "Non-Winning" with a probability of 256/256. Furthermore, if Point Mode 3 is set as the point mode, or if the normal mode is Mode 7 or Mode 8, the result of the lottery when transitioning to the promotion chance will be "Pseudo-BIG" with a probability of 256/256.

If the "Pseudo-BIG" is determined as a result of the lottery during the transition to the promotion chance (i.e., a pseudo-BIG is won), the main CPU 101 sets the promotion chance winning flag to OFF. Then, in the game start state control processing (see step S6 in Figure 23) of the next game after the one in which the promotion chance transition lottery took place, the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to a pseudo-BIG.

After executing the process in step S4284, the main CPU 101 terminates this subroutine.

The above explains the various lottery processes performed in the normal stage (normal long freeze lottery process, normal prescribed number of games played high probability 1 transition lottery process, ceiling fake preparation lottery process, ceiling preparation flag set lottery process, ceiling reach winning type lottery process, ceiling fake preparation flag set lottery process, promotion chance transition lottery process, normal stage freeze lottery process, normal stage transition flag/winning flag lottery process, point acquisition lottery process, point mode lottery process, point reach lottery process, normal stage flag win pre-announcement game count lottery process, high probability 2 transition lottery process (1) to (3), and high probability 2 fall lottery process) using Figures 99 to 125.

The order in which these processes are performed is not particularly limited. For example, they may be configured to be executed in the following order: normal long freeze lottery process, normal prescribed number of games high probability 1 transition lottery process, normal stage freeze lottery process, ceiling fake preparation lottery process, ceiling preparation flag set lottery process, ceiling fake preparation flag set lottery process, ceiling reach winning type lottery process, normal stage transition flag/winning flag lottery process, point acquisition lottery process, point mode lottery process, point reach lottery process, normal stage flag win pre-announcement game count lottery process, high probability 2 transition lottery process (1) to (3), high probability 2 fall lottery process, and promotion chance transition lottery process.

In this case, if the player wins the normal long freeze lottery (winning both the normal long freeze lottery (1) and the normal long freeze lottery (2)), the subsequent processing may be omitted. Also, if the player wins the normal stage freeze lottery (if the normal stage freeze lottery results in a "promotion chance" or "pseudo-BIG"), the subsequent processing may be omitted.

<Game Start Processing for Chance Stage>
Figure 126 is a flowchart showing the processing performed in the main control circuit at the start of a game for the chance stage. Figure 127 is a diagram showing the lottery table for the guaranteed number of games in the chance stage at the start of the chance stage. Figure 128 is a diagram showing the lottery table for pseudo-BIG and upgrade chances during the chance stage. Figure 129 is a diagram showing the lottery table for adding more games during the chance stage.

The game start processing for the chance stage shown in Figure 126 is performed in the main control circuit 100 when the current payout state is either chance stage A or chance stage B (see Figure 88), specifically in step S6 of Figure 23 (main processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the game start processing for the Chance Stage, the main CPU 101 first determines whether it is the start of Chance Stage A or Chance Stage B (step S4301). As described above, the transition to Chance Stage A occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the Chance Stage A transition flag (see step S4252 in Figure 121) is set to ON. In the game start state control processing of the unit game that transitions to Chance Stage A, the transition to Chance Stage A is initiated by updating the payout state flag storage area (see Figure 20), and then the game start processing for the Chance Stage shown in Figure 126 is performed. Similarly, the transition to Chance Stage B occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the Chance Stage B transition flag (see step S4250 in Figure 121) is set to ON. In the game start state control processing for a unit game transitioning to Chance Stage B, the game transitions to Chance Stage B by updating the payout state flag storage area (see Figure 20). Following this, the game start processing for Chance Stage, as shown in Figure 126, is performed. In step S4301, the main CPU 101 determines that it is the start of Chance Stage A or Chance Stage B if the current unit game transitions to Chance Stage A or Chance Stage B (i.e., if the current unit game is the first game of Chance Stage A or Chance Stage B).

If the main CPU 101 determines that it is the start of Chance Stage A or Chance Stage B, it clears High Probability 2 (step S4302). In this process, if High Probability 2 is set as the probability mode, the main CPU 101 clears the value of the High Probability 2 guaranteed game counter and transitions the probability mode from High Probability 2 to Non-High Probability.

Next, the main CPU 101 executes the process of drawing the guaranteed number of games for the chance stage at the start of the chance stage (step S4303). In this process, the main CPU 101 refers to the chance stage guaranteed number of games drawing table (see Figure 127) and performs a drawing based on random values to determine one of the following as the result of the chance stage guaranteed number of games drawing (guaranteed number of games for the chance stage): "20", "40", "60", "80", and "100".

In the Chance Stage Start Guaranteed Game Count Lottery Table shown in Figure 127, for both "Chance Stage A" and "Chance Stage B," lottery values corresponding to the results of the Chance Stage Start Guaranteed Game Count Lottery ("20", "40", "60", "80", and "100") are defined. The probability of each result being determined in the Chance Stage Start Guaranteed Game Count Lottery can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

As a result, in Chance Stage A, the guaranteed number of games at the start of the Chance Stage is determined as follows: 40 with a probability of 250/256, 60 with a probability of 5/256, and 100 with a probability of 1/256. In Chance Stage B, the guaranteed number of games at the start of the Chance Stage is determined as follows: 20 with a probability of 250/256, 40 with a probability of 5/256, and 100 with a probability of 1/256. In Chance Stage B, compared to Chance Stage A, a smaller value is more likely to be determined as the guaranteed number of games.

After executing the process in step S4303, the main CPU 101 sets the number of guaranteed chance stage games determined in step S4303 into the guaranteed chance stage game counter (step S4304). The value of the guaranteed chance stage game counter indicates the remaining number of unit games for which a stay in chance stage A or chance stage B is guaranteed, and is stored in the main RAM 103. As will be described later, the value of the guaranteed chance stage game counter is deducted by 1 each time a unit game is played in chance stage A or chance stage B.

If, in step S4301, it is determined that it is not the start of Chance Stage A or Chance Stage B, or after executing the process in step S4304, the main CPU 101 executes the common processing for normal payout states (step S4305). This process is the same as the process in step S4043 in Figure 99, so its explanation is omitted here. Note that in Chance Stage A or Chance Stage B, even if "Ceiling Fake Preparation" is determined as a result of the ceiling fake preparation lottery (see step S4127 in Figure 109) (i.e., a win occurs during ceiling fake preparation), the ceiling fake preparation state is not set, and the lottery result is discarded.

After executing the process in step S4305, the main CPU 101 executes the pseudo-BIG/promotion chance lottery process during the chance stage (step S4306). In this process, the main CPU 101 refers to the pseudo-BIG/promotion chance lottery table during the chance stage (see Figure 128) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 6. The result of the pseudo-BIG/promotion chance lottery during the chance stage is determined to be either "Non-Winning," "Promotion Chance," or "Pseudo-BIG."

The pseudo-BIG/promotion chance lottery table during the chance stage shown in Figure 128 is provided for each of the payout flags ("Other", "Reach Eye", "Reach Eye BB", and "Single Coin Payout") in payout flag group 6. If the payout flag in payout flag group 6 is "Other," the pseudo-BIG/upgrade chance lottery table shown in Figure 128(a) is referenced. If the payout flag in payout flag group 6 is "Reach Symbol," the pseudo-BIG/upgrade chance lottery table shown in Figure 128(b) is referenced. If the payout flag in payout flag group 6 is "Reach Symbol BB," the pseudo-BIG/upgrade chance lottery table shown in Figure 128(c) is referenced. If the payout flag in payout flag group 6 is "Single Coin Win," the pseudo-BIG/upgrade chance lottery table shown in Figure 128(d) is referenced.

In the pseudo-BIG/promotion chance lottery tables for each chance stage, lottery values corresponding to the results of the pseudo-BIG/promotion chance lottery ("Non-Winning," "Promotion Chance," and "Pseudo-BIG") are defined for both "Chance Stage A" and "Chance Stage B." The probability of each result being determined in the pseudo-BIG/promotion chance lottery during a chance stage can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

As a result, in Chance Stage A, if the payout flag in Payout Flag Group 6 is "Other" as a result of the pseudo-BIG/promotion chance lottery during the Chance Stage, there is a 256/256 probability of "Non-Winning" being determined. If the payout flag in Payout Flag Group 6 is "Reaching Symbol," there is a 256/256 probability of "Promotion Chance" being determined. If the payout flag in Payout Flag Group 6 is "Reaching Symbol BB," there is a 256/256 probability of "Pseudo-BIG" being determined. If the payout flag in Payout Flag Group 6 is "Single Coin Win," there is a 256/256 probability of "Non-Winning" being determined.

Furthermore, in Chance Stage B, as a result of the pseudo-BIG/promotion chance lottery during the Chance Stage, if the payout flag in payout flag group 6 is "Other," there is a 256/256 probability of "Non-Winning." If the payout flag in payout flag group 6 is "Reaching Symbol," there is a 256/256 probability of "Promotion Chance." If the payout flag in payout flag group 6 is "Reaching Symbol BB," there is a 256/256 probability of "Pseudo-BIG." If the payout flag in payout flag group 6 is "Single Coin Win," there is a 192/256 probability of "Non-Winning," a 58/256 probability of "Promotion Chance," and a 6/256 probability of "Pseudo-BIG."

Thus, when the payout flag in payout flag group 6 is "Other," "Winning Combination," or "Winning Combination BB," the probability of determining the outcome of the pseudo-BIG and promotion chance lottery during the chance stage is the same in both chance stage A and chance stage B. On the other hand, when the payout flag in payout flag group 6 is "Single Coin Win," in chance stage A, "Promotion Chance" or "Pseudo-BIG" cannot be determined as a result of the pseudo-BIG and promotion chance lottery during the chance stage, whereas in chance stage B, "Promotion Chance" or "Pseudo-BIG" can be determined as a result of the pseudo-BIG and promotion chance lottery during the chance stage. As a result, chance stage B has a more favorable payout state than chance stage A.

Furthermore, as mentioned above, in the normal stages (non-high probability, high probability 1, and high probability 2), the probability of determining a "promotion chance" or "pseudo-BIG" as a result of the normal stage transition flag/winning flag lottery (see step S4082 in Figure 103) is 0 (see Figures 105 and 106). In contrast, in chance stages A and B, the probability of determining a "promotion chance" or "pseudo-BIG" as a result of the chance stage pseudo-BIG/promotion chance lottery is relatively higher. As a result, chance stages A and B offer a more favorable payout state than the normal stages.

If a "Promotion Chance" is determined as a result of the pseudo-BIG/Promotion Chance lottery during the Chance Stage (i.e., the player wins the Promotion Chance), the main CPU 101 sets the Promotion Chance Winning Flag to ON. The Promotion Chance Winning Flag indicates that the player has won the Promotion Chance. As will be explained in detail later, winning the Promotion Chance leads to a transition to the Promotion Chance via a pre-probationary state (see transition conditions (I) in Figures 89 and 90).

Furthermore, if a "Pseudo-BIG" is determined (a Pseudo-BIG is won) as a result of the Pseudo-BIG/Promotion Chance lottery during the Chance Stage, the main CPU 101 sets the Pseudo-BIG win flag to ON. The Pseudo-BIG win flag indicates that a Pseudo-BIG has been won. As will be explained in detail later, winning a Pseudo-BIG transitions to a Pseudo-BIG via a pre-announcement state (see transition conditions (J) in Figures 89 and 90). Note that if a "Pseudo-BIG" is determined (a Pseudo-BIG is won) as a result of the Pseudo-BIG/Promotion Chance lottery during the Chance Stage while the Promotion Chance win flag is set to ON, the main CPU 101 discards the Promotion Chance win flag (sets it to OFF).

Furthermore, in Chance Stage A or Chance Stage B, if the payout flag in Payout Flag Group 6 is a "reach combination," that is, if any of "F_Reach Combination A," "F_Reach Combination B," and "F_Reach Combination C" is determined as the internal winning combination (see Figure 92), a promotion chance is guaranteed. Also, in Chance Stage A or Chance Stage B, if the payout flag in Payout Flag Group 6 is a "reach combination BB," that is, if any of "F_BB Confirmed Combination A" and "F_BB Confirmed Combination B" is determined as the internal winning combination (see Figure 92), a pseudo-BIG is guaranteed.

As mentioned above, if any of "F_Reach Symbol A," "F_Reach Symbol B," or "F_Reach Symbol C" is determined as the internal winning combination, and the first stop operation is performed on the left reel 3L, then "One Reach Symbol" will be displayed along the active line (see Figure 87). "One Reach Symbol" is a combination that can only be awarded if any of "F_Reach Symbol A," "F_Reach Symbol B," or "F_Reach Symbol C" is determined as the internal winning combination. Therefore, the display of "One Reach Symbol" along the active line means that any of "F_Reach Symbol A," "F_Reach Symbol B," or "F_Reach Symbol C" has been determined as the internal winning combination, and the player can understand that they have won a chance to upgrade by visually seeing "One Reach Symbol."

Furthermore, as mentioned above, if either "F_BB Guaranteed Combination A" or "F_BB Guaranteed Combination B" is determined as the internal winning combination, and the first stop operation is performed on the left reel 3L, then "BB Guaranteed Reach One" will be displayed along the active line (see Figure 87). "BB Guaranteed Reach One" is a combination that can only be awarded if either "F_BB Guaranteed Combination A" or "F_BB Guaranteed Combination B" is determined as the internal winning combination. Therefore, the display of "BB Guaranteed Reach One" along the active line means that either "F_BB Guaranteed Combination A" or "F_BB Guaranteed Combination B" has been determined as the internal winning combination, and the player can understand that they have won a pseudo-BIG by visually confirming "BB Guaranteed Reach One".

Thus, the "one winning combination" and the "one BB confirmed winning combination" serve to inform the player that they have won a promotion chance or a pseudo-BIG (that the transition to the AT state is confirmed). As will be described later, in this embodiment, a penalty occurs if the first stopping operation is performed on the middle reel 3C or the right reel 3R (irregular pressing). Therefore, in payout states other than the AT state (pseudo-BIG and pseudo-REG), the player basically plays by performing the first stopping operation on the left reel 3L.

In contrast, in the normal stage, when any of "F_Reach Symbol A," "F_Reach Symbol B," "F_Reach Symbol C," "F_BB Confirmed Symbol A," and "F_BB Confirmed Symbol B" is determined as the internal winning symbol, that is, when the payout flag in payout flag group 5 is "Other" (see Figure 92), the probability of winning an upgrade chance or a pseudo-BIG is very low (see Figures 105-107). Considering the above roles of "One Reach Symbol" and "One BB Confirmed Reach," it is not appropriate to show "One Reach Symbol" or "One BB Confirmed Reach" to the player when neither an upgrade chance nor a pseudo-BIG has been won.

Therefore, in the normal stage, if any of "F_Reach Symbol A", "F_Reach Symbol B", "F_Reach Symbol C", "F_BB Confirmed Symbol A", and "F_BB Confirmed Symbol B" is determined as the internal winning symbol, and neither the promotion chance nor the pseudo-BIG has been won, the player is notified to perform an irregular stop operation (irregular press) on the middle reel 3C or the right reel 3R as the first stop operation. This notification (irregular press navigation) is made by displaying an image on the main display device 210 that suggests performing an irregular stop operation (irregular press) on the middle reel 3C or the right reel 3R as the first stop operation. By performing the stop operation according to the irregular press navigation, "one normal outcome" is stopped and displayed along the active line, and "one reach symbol" or "one BB confirmed reach symbol" does not appear. In this case, no notification will be displayed on the instruction monitor, but regardless of which of "F_Reach Symbol A," "F_Reach Symbol B," "F_Reach Symbol C," "F_BB Confirmed Symbol A," or "F_BB Confirmed Symbol B" is determined as the internal winning combination, the number of medals dispensed will not differ depending on the manner of the stopping operation (see Figure 87), so there is no particular problem.

Thus, in Chance Stage A and Chance Stage B, the transition to the AT state is easily indicated through "one winning combination" or "one BB-confirming winning combination." In contrast, in the Normal Stage, the expectation of transitioning to the AT state is suggested more through the effects controlled by the sub-control circuit 200 than through "one winning combination" or "one BB-confirming winning combination." In the Normal Stage, multiple effect modes are provided according to the probability mode, point mode, etc., and the background image displayed on the main display device 210 is different in each effect mode. As a result, the expectation is indicated by which effect mode (background image) the player is in.

In the normal stage, if any of "F_Reach Symbol A", "F_Reach Symbol B", "F_Reach Symbol C", "F_BB Confirmed Symbol A", and "F_BB Confirmed Symbol B" is determined as the internal winning symbol, there is a possibility of winning an upgrade chance or a pseudo-BIG in the freeze lottery during the normal stage (see step S4081 in Figure 103 and Figure 104) or the long freeze lottery during the normal stage (see step S4102 in Figure 108). If an upgrade chance or a pseudo-BIG is won in the freeze lottery during the normal stage or the long freeze lottery during the normal stage, and the first stop operation is performed on the left reel 3L, "One Reach Symbol" or "One BB Confirmed Reach Symbol" will be displayed along the active line. On the other hand, if a freeze lottery or long freeze lottery during a normal stage does not result in a promotion chance or pseudo-BIG, the above-mentioned irregular button press navigation will be performed, and by performing the stop operation according to the irregular button press navigation, the "one winning combination" or "one BB confirmed winning combination" will not appear.

After executing the process in step S4306, the main CPU 101 executes the process of drawing the number of pre-announcement games when a flag is drawn during the chance stage (step S4307). The process of drawing the number of pre-announcement games when a flag is drawn during the chance stage will be explained later using Figure 130.

After executing the process in step S4307, the main CPU 101 executes the lottery process for increasing the number of games played during the chance stage (step S4308). In this process, the main CPU 101 refers to the lottery table for increasing the number of games played during the chance stage (see Figure 129) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 5. The result of the lottery for increasing the number of games played during the chance stage is determined to be one of the following: "0", "20", "40", "60", "80", and "100".

The Chance Stage game count increase lottery table shown in Figure 129 is provided for each of the payout flags in Payout Flag Group 5 ("Other," "Parallel Watermelon," "Diagonal Watermelon," and "Cherry"). If the payout flag in Payout Flag Group 5 is "Other," the Chance Stage game count increase lottery table shown in Figure 129(a) is referenced. If the payout flag in Payout Flag Group 5 is "Parallel Watermelon," the Chance Stage game count increase lottery table shown in Figure 129(b) is referenced. If the payout flag in Payout Flag Group 5 is "Diagonal Watermelon," the Chance Stage game count increase lottery table shown in Figure 129(c) is referenced. If the payout flag in Payout Flag Group 5 is "Cherry," the Chance Stage game count increase lottery table shown in Figure 129(d) is referenced.

In each chance stage's game count increase lottery table, a lottery value corresponding to the result of the chance stage game count increase lottery ("0", "20", "40", "60", "80", and "100") is defined for each setting ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the chance stage game count increase lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, if the payout flag in payout flag group 5 is "diagonal watermelon" and the setting value is setting 6, then the result of the chance stage game count increase lottery will be "0" with a probability of 126/256, "20" with a probability of 128/256, "40" with a probability of 1/256, and "60" with a probability of 1/256. The main CPU 101 adds the value determined as a result of the chance stage game count increase lottery to the value of the chance stage guaranteed game count counter.

After executing the process in step S4308, the main CPU 101 terminates this subroutine.

<During the chance stage, when a flag is won, the number of pre-game moves is drawn.>
Figure 130 is a flowchart showing the process of drawing the number of pre-announcement games when a flag is won during the chance stage, which is performed in the main control circuit. Figure 131 is a diagram showing the table for drawing the number of pre-announcement games when a flag is won during the chance stage.

The process of drawing the number of pre-bonus games when a flag is drawn during the chance stage, as shown in Figure 130, is performed in step S4307 of Figure 126 (processing at the start of the game for the chance stage) in the main control circuit 100.

During the pre-announcement game count lottery process when a flag is won in the Chance Stage, the main CPU 101 first determines whether the value of the pre-announcement game count counter is 0 or not (step S4321). The value of the pre-announcement game count counter indicates the remaining number of unit games controlled to the pre-announcement state and is stored in the main RAM 103. In the pre-announcement state during Chance Stage A or Chance Stage B, a pre-announcement effect is performed that suggests a transition to either an upgrade chance or a pseudo-BIG. A value of the pre-announcement game count counter that is not 0 (1 or more) indicates that the game is in a pre-announcement state.

If the main CPU 101 determines that the value of the pre-bonus game counter is not zero, it terminates this subroutine. On the other hand, if the main CPU 101 determines that the value of the pre-bonus game counter is zero, it determines whether the pseudo-BIG win flag is set to ON (step S4322). As described above, the pseudo-BIG win flag indicates that a pseudo-BIG win has been achieved (see step S4306 in Figure 126 and step S4144 in Figure 112).

If the main CPU 101 determines that the pseudo-BIG win flag is not set to ON, it determines whether the promotion chance win flag is set to ON (step S4323). As described above, the promotion chance win flag indicates that a promotion chance has been won (see step S4306 in Figure 126 and step S4144 in Figure 112). If the main CPU 101 determines that the promotion chance win flag is not set to ON, it terminates this subroutine.

If the system determines in step S4322 that the pseudo-BIG win flag is set to ON, or if it determines in step S4323 that the promotion chance win flag is set to ON, the main CPU 101 executes a lottery for the number of pre-bonus games played when a flag is won during the chance stage (step S4324). In this process, the main CPU 101 refers to the lottery table for the number of pre-bonus games played when a flag is won during the chance stage (see Figure 131) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 6, thereby determining one of the following results for the lottery for the number of pre-bonus games played when a flag is won during the chance stage: "0", "1", "2", "3", "4", "5", "6", "7", and "8".

The pre-announcement game count lottery table for winning a flag during the chance stage, shown in Figure 131, is provided for each of the payout flags ("Other", "Reach Eye", "Reach Eye BB", and "Single Coin Payout") in payout flag group 6. If the payout flag in payout flag group 6 is "Other," the pre-bonus game count lottery table for flag wins during the chance stage shown in Figure 131(a) is referenced. If the payout flag in payout flag group 6 is "Reach Symbol," the pre-bonus game count lottery table for flag wins during the chance stage shown in Figure 131(b) is referenced. If the payout flag in payout flag group 6 is "Reach Symbol BB," the pre-bonus game count lottery table for flag wins during the chance stage shown in Figure 131(c) is referenced. If the payout flag in payout flag group 6 is "Single Coin Win," the pre-bonus game count lottery table for flag wins during the chance stage shown in Figure 131(d) is referenced.

In the pre-game number lottery table for each chance stage, for both "Chance Stage A" and "Chance Stage B," a lottery value corresponding to the result of the pre-game number lottery for each chance stage flag win ("0", "1", "2", "3", "4", "5", "6", "7", and "8") is defined. The probability of each result being determined in the pre-game number lottery for each chance stage flag win can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, in Chance Stage A, if the payout flag in payout flag group 6 is "Other," the result of the pre-bonus game count lottery during the Chance Stage flag win will be "0" with a probability of 64/256 and "1" with a probability of 192/256. Similarly, in Chance Stage B, if the payout flag in payout flag group 6 is "Single Coin," the result of the pre-bonus game count lottery during the Chance Stage flag win will be "1" with a probability of 8/256, "2" with a probability of 192/256, and "3" with a probability of 56/256.

After executing the process in step S4325, the main CPU 101 sets the pre-trigger game count counter to the value determined as a result of the pre-trigger game count lottery when the flag is won during the chance stage, plus 1 (step S4325), and then terminates this subroutine.

As described above, when an initial value is set in the pre-announcement game count counter, the main CPU 101 generates pre-announcement effect start command data and stores the generated pre-announcement effect start command data in the communication data storage area of the main RAM 103. The pre-announcement effect start command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that it is time to start the pre-announcement effect, and processes are initiated to display images, output sound, output light, etc., for the pre-announcement effect. As a result, the pre-announcement effect is performed (controlled to a pre-announcement state) for a number of unit games corresponding to the value set in the pre-announcement game count counter.

<Counter management processing for the chance stage>
Figure 132 is a flowchart showing the counter management process for the chance stage performed in the main control circuit.

The counter management process for the chance stage shown in Figure 132 is performed in the main control circuit 100 at step S15 (game end state control process) of Figure 23 (main processing) when the current payout state is either Chance Stage A or Chance Stage B (see Figure 88). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area (see Figure 20) in the main RAM 103.

In the counter management process for the chance stage, the main CPU 101 first determines whether the value of the pre-announcement game counter (see step S4325 in Figure 130) is greater than 0 (step S4341). If it determines that the value of the pre-announcement game counter is 0, the main CPU 101 subtracts 1 from the value of the chance stage guaranteed game counter (step S4342). Then, the main CPU 101 determines whether the value of the chance stage guaranteed game counter is 0 (step S4343). If it determines that the value of the chance stage guaranteed game counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the Chance Stage Guaranteed Game Count Counter determines that the value is 0, the main CPU 101 sets the Normal Stage Transition Flag to ON (step S4344) and terminates this subroutine. As described above, the Normal Stage Transition Flag is a flag that indicates the timing to start the Normal Stage. In the game start state control processing for the unit game following the unit game in which the Normal Stage Transition Flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to the Normal Stage (see transition conditions (F) and (H) in Figures 89 and 90).

If, in step S4341, the main CPU 101 determines that the value of the pre-announcement game counter is greater than 0, it determines whether the value of the chance stage guaranteed game counter is greater than 0 (step S4345). If it determines that the value of the chance stage guaranteed game counter is greater than 0, the main CPU 101 subtracts 1 from the value of the chance stage guaranteed game counter (step S4346).

If, in step S4345, the value of the Chance Stage Guaranteed Game Count Counter is determined to be 0, or after executing the process in step S4346, the main CPU 101 subtracts 1 from the value of the Pre-Sequence Game Count Counter (step S4347). Then, the main CPU 101 determines whether the value of the Pre-Sequence Game Count Counter is 0 or not (step S4348). If it determines that the value of the Pre-Sequence Game Count Counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the pre-announcement game counter determines that the value is 0, the main CPU 101 terminates the pre-announcement sequence (step S4349). In this process, the main CPU 101 generates a pre-announcement sequence termination command data and stores the generated command data in the communication data storage area of the main RAM 103. The pre-announcement sequence termination command data stored in the communication data storage area is transmitted from the main control circuit 100 to the sub-control circuit 200 during the communication data transmission process (see step S204 in Figure 32). This allows the sub-control circuit 200 to recognize that it is time to terminate the pre-announcement sequence, and it then terminates the image display, sound output, light output, etc., that are being performed for the pre-announcement sequence.

Next, the main CPU 101 determines whether the pseudo-BIG winning flag is set to ON (step S4350). As described above, the pseudo-BIG winning flag is a flag indicating that a pseudo-BIG win has been achieved (see step S4306 in Figure 126 and step S4144 in Figure 112).

If the main CPU 101 determines that the pseudo-BIG win flag is set to ON, it sets the pseudo-BIG transition flag to ON (step S4351). Although not shown in the diagram, the main CPU 101 also sets the pseudo-BIG win flag to OFF, and if the pseudo-BIG win flag upon reaching the ceiling is set to ON, it also sets that flag to OFF. Afterward, the main CPU 101 terminates this subroutine.

As mentioned above, the pseudo-BIG transition flag indicates the timing to start a pseudo-BIG. The main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next game in which the pseudo-BIG transition flag was set to ON. This triggers a transition to a pseudo-BIG.

In Chance Stage A and Chance Stage B, the game transitions to a premonition state only if a pseudo-BIG or upgrade chance is won. Therefore, if the result of step S4350 is "NO," the upgrade chance win flag is set to ON. If step S4350 determines that the pseudo-BIG win flag is not set to ON, the main CPU 101 sets the upgrade chance transition flag to ON (step S4352). Although not shown in the diagram, the main CPU 101 also sets the upgrade chance win flag to OFF, and if the ceiling-reach upgrade chance win flag is set to ON, it also sets that flag to OFF. Afterward, the main CPU 101 terminates this subroutine.

As described above, the promotion chance transition flag indicates that it is time to initiate the promotion chance. The main CPU 101 updates the payout status flag storage area (see Figure 20) during the game start state control processing (see step S6 in Figure 23) for the next unit game after the promotion chance transition flag was set to ON. This initiates the promotion chance.

Based on the above, in Chance Stage A or Chance Stage B, if either a promotion chance or a pseudo-BIG is won, the game transitions to either a promotion chance or a pseudo-BIG via a pre-announcement state. Furthermore, as mentioned above, in the normal stage, if a pre-announcement state is entered by winning Chance Stage A or Chance Stage B, and a promotion chance or pseudo-BIG is won during that pre-announcement state, it is possible to configure the game to transition to Chance Stage A or Chance Stage B when the pre-announcement state ends. In this case, at the start of Chance Stage A or Chance Stage B (the first game of Chance Stage A or Chance Stage B), the pre-announcement game count lottery process (see Figure 130) during the chance stage flag win results in an initial value being set in the pre-announcement game count counter, causing a transition to the pre-announcement state. When this pre-announcement state ends, the game transitions to either a promotion chance or a pseudo-BIG.

<Processing at the start of the game for promotion chances>
Figure 133 is a flowchart showing the processing performed in the main control circuit at the start of a game for the chance of promotion. Figures 134A and 134B show the promotion chance mode lottery table. Figure 135 shows the lottery table during the promotion chance. Figure 136 shows the next pseudo-game lottery table. Figure 137 shows the pseudo-BIG promotion lottery table when the prescribed number of games have been played. Figure 138 shows the current pseudo-game lottery table. Figure 139 shows the contents of the pseudo-game.

The game start processing for the promotion chance shown in Figure 133 is performed in the main control circuit 100 when the current payout state is a promotion chance (see Figure 88), specifically in step S6 of Figure 23 (main processing) (game start state control processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the game start processing for the promotion chance, the main CPU 101 first determines whether or not it is the start of the promotion chance (step S4361). As described above, the transition to the promotion chance occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the promotion chance transition flag (see step S4248 in Figure 121 and step S4352 in Figure 132) is set to ON. In the game start state control processing of the unit game that transitions to the promotion chance, the transition to the promotion chance is initiated by updating the payout state flag storage area (see Figure 20), and then the game start processing for the promotion chance shown in Figure 133 is performed. In the processing of step S4361, the main CPU 101 determines that it is the start of the promotion chance if it has transitioned to the promotion chance in the current unit game (if the current unit game is the first game of the promotion chance).

If the main CPU 101 determines that a promotion chance has begun, it sets a predetermined value in the promotion chance game counter (step S4362). In this process, the main CPU 101 generally sets the promotion chance game counter to "3," but if point mode 2 is set (see step S4283 in Figure 124), it sets the promotion chance game counter to "5." Although not shown, the main CPU 101 also clears various information (counters, etc.) set in the normal payout state. The value of the promotion chance game counter indicates the remaining number of unit games that can be played during a promotion chance and is stored in the main RAM 103. The value of the promotion chance game counter is deducted by 1 each time a unit game is played. Although not shown, this deduction is performed in step S15 (game end state control processing) of Figure 23 (main processing).

Next, the main CPU 101 executes the entry-time long freeze lottery process (step S4363). In this process, the main CPU 101 refers to the entry-time long freeze lottery table (not shown) and performs a lottery based on random values to determine whether the result of the entry-time long freeze lottery (1) is "not a winner" or "winner." If the result of the entry-time long freeze lottery (1) is "winner," then the result of the entry-time long freeze lottery (2) is also determined to be either "not a winner" or "winner." As a result, there is a 1/256 probability of winning the entry-time long freeze lottery (1) and a 1/256 probability of winning the entry-time long freeze lottery (2).

If both the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) are won, a long freeze will occur. The duration of the long freeze that occurs when both the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) are won is the same as the duration of the long freeze that occurs when both the normal-time long freeze lottery (1) and the normal-time long freeze lottery (2) (see step S4102 in Figure 108) are won. If both the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) are won, the main CPU 101 controls the execution of the long freeze in the main-side performance control processing at the start of the game in the unit game in which the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) were performed (see step S8 in Figure 23).

Furthermore, if both the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) are successful, the main CPU 101 controls the execution of a simulated game after the long freeze ends in the main-side performance control processing at the start of the game (see step S8 in Figure 23) for the unit game in which the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) were performed. This ensures that a simulated game follows the long freeze.

Furthermore, if both the entry-time long freeze lottery (1) and the entry-time long freeze lottery (2) are successful, the payout status flag storage area (see Figure 20) is updated. This triggers a transition to a pseudo-BIG. The main CPU 101 also sets the pseudo-BIG (ED) flag to ON. As described above, when the pseudo-BIG (ED) flag is set to ON, the game is controlled to enter pseudo-BIG again when the termination conditions for pseudo-BIG are met, and this causes the pseudo-BIG to continue until the advantageous period ends.

In this embodiment, "continuing until the advantageous period ends" essentially means that the advantageous period ends due to the net payout limiter (payout limiter: for example, reaching 2400 coins). As described later, when the pseudo-BIG (ED) flag is set to ON (transitioning to pseudo-BIG (ED)), 2 is added to the value of the pseudo-BIG stock counter. This guarantees that the game will be controlled to pseudo-BIG at least three times, and in this case, it is possible to configure the game to activate the net payout limiter before the three pseudo-BIG rounds are completed.

However, the benefits of a long freeze may be other than the transition to a pseudo-BIG (ED) as described above. For example, when a long freeze occurs, at least a pseudo-BIG or a benefit of pseudo-BIG or higher may be guaranteed. Benefits of pseudo-BIG or higher could include, for example, a guaranteed number of transitions to pseudo-BIG (guaranteed pseudo-BIG consecutive wins), or a separate advantageous game (pseudo-bonus or AT) of greater value than pseudo-BIG. Furthermore, in machines without limits on the number of coins won or the number of games played, a special pseudo-bonus corresponding to the long freeze may be provided that continues until a predetermined period (for example, winning 1000 coins or continuing for 500 games) has elapsed.

Furthermore, in this embodiment, a long freeze lottery is not performed during the bonus state. However, in models equipped with a real bonus that increases medals (special feature or continuous feature activation device), a long freeze may be triggered when a real bonus role is drawn during the promotion chance start game or promotion chance (for example, when 3BB is internally won), and the period during which the bonus is activated may be turned into a special zone for increasing bonuses (for example, a state where it is easier to win a pseudo-BIG, i.e., a state where the value of the pseudo-BIG stock counter is easily increased).

Furthermore, if the pseudo-BIG mode is controlled again after the termination conditions for the pseudo-BIG mode are met, the pseudo-BIG mode termination screen may be displayed to indicate the end, and then a pseudo-game corresponding to the pseudo-BIG mode (such as matching "V" symbols) may be generated on the next start lever operation to create a continuous-win-like effect. Alternatively, the pseudo-BIG mode may be continued without generating a pseudo-game, simply by displaying an effect indicating continuation (such as displaying an image or sound indicating continuation, like "Not yet!").

After executing the process in step S4363, the main CPU 101 executes the promotion chance mode lottery process (step S4364). In this process, the main CPU 101 refers to the promotion chance mode lottery table (see Figures 134A and 134B) and performs a lottery based on random values to determine one of the following promotion chance mode results (promotion chance mode): "Mode 1," "Mode 2," "Mode 3," and "Mode 4."

The promotion chance mode lottery tables shown in Figures 134A and 134B are provided for each of the normal modes ("Mode 1", "Mode 2", "Mode 3", "Mode 4", "Mode 5", "Mode 6", "Mode 7", and "Mode 8") determined by the normal transition mode lottery process (see step S4061 in Figure 100), as well as for the "Consecutive Win Challenge → Promotion Chance Transition" phase.

If the payout state from which the transition to the promotion chance occurs is the normal payout state (normal stage, chance stage A, or chance stage B), then one of the promotion chance mode lottery tables shown in Figures 134A and 134B(a) to (h) is referenced. Specifically, if the normal mode is "Mode 1", the promotion chance mode lottery table shown in Figure 134A(a) is referenced; if the normal mode is "Mode 2", the promotion chance mode lottery table shown in Figure 134A(b) is referenced; if the normal mode is "Mode 3", the promotion chance mode lottery table shown in Figure 134A(c) is referenced; and if the normal mode is "Mode 4", the promotion chance mode lottery table shown in Figure 134A(d) is referenced. If the normal mode is "Mode 5," the promotion chance mode lottery table shown in Figure 134A(e) is referenced. If the normal mode is "Mode 6," the promotion chance mode lottery table shown in Figure 134B(f) is referenced. If the normal mode is "Mode 7," the promotion chance mode lottery table shown in Figure 134B(g) is referenced. If the normal mode is "Mode 8," the promotion chance mode lottery table shown in Figure 134B(h) is referenced. Furthermore, if the payout state from which the transition to the promotion chance occurs is a consecutive win challenge, the promotion chance mode lottery table shown in Figure 134B(i) is referenced.

In each promotion chance mode lottery table, a lottery value corresponding to the promotion chance mode lottery result ("Mode 1," "Mode 2," "Mode 3," and "Mode 4") is defined for each setting ("Setting 1," "Setting 2," "Setting 3," "Setting 4," "Setting 5," and "Setting 6"). The probability of each promotion chance mode lottery result being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the payout state from which the transition to the promotion chance occurs is the normal payout state, and the normal mode is "Mode 3," then regardless of the setting value, the result of the promotion chance mode lottery (promotion chance mode) will be "Mode 3" with a probability of 256/256. Also, if the payout state from which the transition to the promotion chance occurs is the normal payout state, and the normal mode is "Mode 6," then regardless of the setting value, the result of the promotion chance mode lottery (promotion chance mode) will be "Mode 3" with a probability of 192/256, and "Mode 4" with a probability of 64/256. Furthermore, if the payout state from which the transition to the promotion chance occurs is the consecutive win challenge, then regardless of the setting value, the result of the promotion chance mode lottery (promotion chance mode) will be "Mode 2" with a probability of 256/256.

If, in step S4361, it is determined that it is not the start of a promotion chance, or after executing the process in step S4364, the main CPU 101 determines whether the value of the promotion chance game counter (see step S4362) is 1 or greater (step S4365).

If the main CPU 101 determines that the value of the promotion chance game counter is 1 or greater, it executes the promotion chance lottery process (step S4366). In this process, the main CPU 101 refers to the promotion chance lottery table (see Figure 135) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 2, thereby determining one of the following as the result of the promotion chance lottery: "fake pseudo-game," "pseudo-BIG," or "pseudo-BIG (ED)."

The promotion chance lottery table shown in Figure 135 is provided for each of the payout flags in payout flag group 2 ("Other", "Weak Rare Role", "Diagonal Watermelon", "Winning Combination", and "Winning Combination BB"). If the payout flag in payout flag group 2 is "Other," the promotion chance lottery table shown in Figure 135(a) is referenced. If the payout flag in payout flag group 2 is "Weak Rare Role," the promotion chance lottery table shown in Figure 135(b) is referenced. If the payout flag in payout flag group 2 is "Diagonal Watermelon," the promotion chance lottery table shown in Figure 135(c) is referenced. If the payout flag in payout flag group 2 is "Reach Symbol," the promotion chance lottery table shown in Figure 135(d) is referenced. If the payout flag in payout flag group 2 is "Reach Symbol BB," the promotion chance lottery table shown in Figure 135(e) is referenced.

In each promotion chance lottery table, a lottery value corresponding to the promotion chance lottery result ("Fake Simulated Game," "Simulated BIG," and "Simulated BIG (ED)") is defined for each promotion chance mode ("Mode 1," "Mode 2," "Mode 3," and "Mode 4") determined in step S4364. The probability of each promotion chance lottery result being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the payout flag in payout flag group 2 is "Other" and the promotion chance mode is "Mode 4," the result of the promotion chance lottery will determine "Fake Pseudo Game" with a probability of 204/256 and "Pseudo BIG (ED)" with a probability of 52/256. Also, if the payout flag in payout flag group 2 is "Reach Eye BB" and the promotion chance mode is "Mode 1," the result of the promotion chance lottery will determine "Pseudo BIG" with a probability of 255/256 and "Pseudo BIG (ED)" with a probability of 1/256.

If the result of the promotion chance lottery is determined to be "Pseudo-BIG" or "Pseudo-BIG (ED)" (i.e., a Pseudo-BIG win), the main CPU 101 sets the Pseudo-BIG win flag to ON. As described above, the Pseudo-BIG win flag indicates that a Pseudo-BIG win has been achieved.

After executing the process in step S4366, the main CPU 101 executes the next pseudo-game lottery process (step S4367). In this process, the main CPU 101 refers to the next pseudo-game lottery table (see Figure 136) and performs a lottery based on random values to determine one of the following pseudo-games as the result of the lottery: "Pseudo-Game 1," "Pseudo-Game 2," "Pseudo-Game 3," "Pseudo-Game 4," "Pseudo-Game 5," "Pseudo-Game 6," "Pseudo-Game 7," and "Pseudo-Game 8."

The next pseudo-game lottery table shown in Figure 136 is provided for each of the results of the lottery during the promotion chance ("fake pseudo-game," "pseudo-BIG," and "pseudo-BIG (ED)"). If "fake pseudo-game" is determined in step S4366, the next pseudo-game lottery table shown in Figure 136(a) is referenced. If "pseudo-BIG" is determined in step S4366, the next pseudo-game lottery table shown in Figure 136(b) is referenced. If "pseudo-BIG (ED)" is determined in step S4366, the next pseudo-game lottery table shown in Figure 136(c) is referenced.

In each next pseudo-game lottery table, for each promotion chance mode determined in step S4364 ("Mode 1", "Mode 2", "Mode 3", and "Mode 4"), a lottery value corresponding to the result of the next pseudo-game lottery ("Pseudo-Game 1", "Pseudo-Game 2", "Pseudo-Game 3", "Pseudo-Game 4", "Pseudo-Game 5", "Pseudo-Game 6", "Pseudo-Game 7", and "Pseudo-Game 8") is defined. The probability of each result of the next pseudo-game lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, if the promotion chance mode is "Mode 1" and "Fake Pseudo-Game" is determined in step S4366, then in the next pseudo-game lottery, there is an 86/256 probability that "Pseudo-Game 1" will be determined, and a 170/256 probability that "Pseudo-Game 2" will be determined. Also, if the promotion chance mode is "Mode 1" and "Pseudo-BIG" is determined in step S4366, then in the next pseudo-game lottery, there is a 112/256 probability that "Pseudo-Game 3" will be determined, a 112/256 probability that "Pseudo-Game 4" will be determined, and a 32/256 probability that "Pseudo-Game 5" will be determined. Furthermore, if the promotion chance mode is "Mode 1" and "Pseudo BIG (ED)" is determined in step S4366, then the result of the next pseudo-game lottery will be "Pseudo-Game 3" with a probability of 32/256, "Pseudo-Game 4" with a probability of 32/256, "Pseudo-Game 5" with a probability of 32/256, and "Pseudo-Game 6" with a probability of 160/256.

The main CPU 101 sets the pseudo-game determined by the next pseudo-game lottery. This allows the main CPU 101 to control the execution of the pseudo-game in the main-side performance control processing at the start of the next unit game following the unit game in which the next pseudo-game lottery was conducted (see step S8 in Figure 23). Furthermore, if "Pseudo-BIG" or "Pseudo-BIG (ED)" is determined as a result of the promotion chance lottery (the pseudo-BIG winning flag is set to ON), the main CPU 101 updates the payout state flag storage area (see Figure 20) in the state control processing at the start of the next unit game following the unit game in which the promotion chance lottery was conducted (see step S6 in Figure 23). This transitions to pseudo-BIG (see transition conditions (K) in Figures 89 and 90).

Furthermore, if a "Pseudo-BIG (ED)" is determined as a result of the promotion chance lottery (i.e., a Pseudo-BIG (ED) is won), the main CPU 101 sets the Pseudo-BIG (ED) flag to ON. As described above, when the Pseudo-BIG (ED) flag is set to ON, the game is controlled to enter Pseudo-BIG again when the termination conditions for Pseudo-BIG are met, and this causes Pseudo-BIG to continue until the advantageous period ends.

After executing the process in step S4367, the main CPU 101 terminates this subroutine.

If, in step S4365, the main CPU 101 determines that the value of the promotion chance game counter is less than 1 (0), it determines whether the pseudo-BIG win flag is set to ON (step S4368). If it determines that the pseudo-BIG win flag is set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the pseudo-BIG win flag is not set to ON, it executes the pseudo-BIG upgrade lottery process upon completion of the prescribed number of games (step S4369). In this process, the main CPU 101 refers to the pseudo-BIG upgrade lottery table upon completion of the prescribed number of games (see Figure 137) and performs a lottery based on random values to determine whether the result of the pseudo-BIG upgrade lottery upon completion of the prescribed number of games is "fake pseudo-game," "pseudo-BIG," or "pseudo-BIG (ED)."

In the pseudo-BIG upgrade lottery table shown in Figure 137, a lottery value corresponding to the result of the pseudo-BIG upgrade lottery ("Fake Pseudo-Game", "Pseudo-BIG", and "Pseudo-BIG (ED)") is defined for each upgrade chance mode ("Mode 1", "Mode 2", "Mode 3", and "Mode 4") determined in step S4364. The probability of each result of the pseudo-BIG upgrade lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

For example, if the promotion chance mode is "Mode 1," after playing the prescribed number of games, the pseudo-BIG promotion lottery will result in a "fake pseudo-game" with a probability of 232/256 and a "pseudo-BIG" with a probability of 24/256. If the promotion chance mode is "Mode 4," after playing the prescribed number of games, the pseudo-BIG promotion lottery will result in a "pseudo-BIG" with a probability of 224/256 and a "pseudo-BIG (ED)" with a probability of 32/256.

After executing the process in step S4369, the main CPU 101 executes the current pseudo-game lottery process (step S4370). In this process, the main CPU 101 refers to the current pseudo-game lottery table (see Figure 138) and performs a lottery based on random values to determine one of the following pseudo-games as the result of the current pseudo-game lottery: "Pseudo-Game 1," "Pseudo-Game 2," "Pseudo-Game 3," "Pseudo-Game 4," "Pseudo-Game 5," "Pseudo-Game 6," "Pseudo-Game 7," and "Pseudo-Game 8."

The simulated game lottery table shown in Figure 138 is provided for each of the results of the simulated BIG upgrade lottery ("Simulated BIG" and "Simulated BIG (ED)") when a predetermined number of games are played. If "Simulated BIG" is determined in step S4369, the simulated game lottery table shown in Figure 138(a) is referenced. If "Simulated BIG (ED)" is determined in step S4369, the simulated game lottery table shown in Figure 138(b) is referenced.

In each simulated game lottery table, a lottery value corresponding to the result of the simulated game lottery ("Simulated Game 1," "Simulated Game 2," "Simulated Game 3," "Simulated Game 4," "Simulated Game 5," "Simulated Game 6," "Simulated Game 7," and "Simulated Game 8") is defined for each promotion chance mode ("Mode 1," "Mode 2," "Mode 3," and "Mode 4") determined in step S4364. The probability of each result of the simulated game lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the promotion chance mode is "Mode 1" and "Pseudo BIG" is determined in step S4369, then the result of the pseudo game lottery will be "Pseudo Game 7" with a probability of 128/256 and "Pseudo Game 8" with a probability of 128/256. Also, if the promotion chance mode is "Mode 1" and "Pseudo BIG (ED)" is determined in step S4369, then the result of the pseudo game lottery will be "Pseudo Game 6" with a probability of 256/256. Furthermore, if "Fake Pseudo Game" is determined in step S4369, then "Pseudo Game 7" will be determined.

The main CPU 101 sets the simulated game determined by the simulated game lottery. As a result, the main CPU 101 controls the execution of the simulated game in the main-side performance control processing at the start of the game (see step S8 in Figure 23) for the unit game in which the simulated game lottery was conducted. Consequently, the simulated game determined in step S4367 is executed, followed by the simulated game determined in step S4369.

Furthermore, if the pseudo-BIG upgrade lottery after the prescribed number of games has been played results in a "pseudo-BIG" or "pseudo-BIG (ED)" (a pseudo-BIG is won), the main CPU 101 updates the payout status flag storage area (see Figure 20), thereby transitioning to a pseudo-BIG. Also, if the pseudo-BIG upgrade lottery after the prescribed number of games has been played results in a "fake pseudo-game" (a pseudo-BIG is not won), the main CPU 101 updates the payout status flag storage area (see Figure 20), thereby transitioning to a pseudo-REG (see transition conditions (L) in Figures 89 and 90).

Furthermore, if the "Pseudo-BIG (ED)" is determined as a result of the pseudo-BIG upgrade lottery after the prescribed number of games have been played (i.e., a pseudo-BIG (ED) is won), the main CPU 101 sets the pseudo-BIG (ED) flag to ON. As described above, when the pseudo-BIG (ED) flag is set to ON, the game is controlled to enter pseudo-BIG again when the termination conditions for pseudo-BIG are met, and this causes the pseudo-BIG to continue until the advantageous period ends.

After executing the process in step S4370, the main CPU 101 terminates this subroutine.

The above explanation assumes that eight types of simulated games (Simulated Game 1, Simulated Game 2, Simulated Game 3, Simulated Game 4, Simulated Game 5, Simulated Game 6, Simulated Game 7, and Simulated Game 8) are provided. As explained in the first embodiment, the simulated games are configured to be playable during the execution of a lock effect. The lock effect (lock) is an effect that halts the progress of the game for a predetermined period (invalidates the player's game operations for a predetermined period).

As shown in Figure 139, in simulated game 1, a "V," "Seven," or "Bar" is in a winning position on the top line, but the "V," "Seven," and "Bar" do not line up on any of the lines: the center line, top line, bottom line, cross-up line, and cross-down line. Simulated game 1 is a simulated game that can be executed when a "fake simulated game" is determined in step S4366. In simulated game 2, a "V," "Seven," or "Bar" is in a winning position on the bottom line, but the "V," "Seven," and "Bar" do not line up on any of the lines: the center line, top line, bottom line, cross-up line, and cross-down line. Simulated game 2 is a simulated game that can be executed when a "fake simulated game" is determined in step S4366.

In simulated game 3, either a "V" aligns on one of the lines (center line, top line, bottom line, cross-up line, and cross-down line) (or the top line if the first stop operation on the left reel 3L is performed), or a "Seven" aligns on the center line. Simulated game 3 is a simulated game that can be executed when "Simulated BIG" or "Simulated BIG (ED)" is determined in step S4366. In simulated game 4, either a "V" aligns on one of the lines (center line, top line, bottom line, cross-up line, and cross-down line) (or the bottom line if the first stop operation on the left reel 3L is performed), or a "Seven" aligns on the center line. Simulated game 4 is a simulated game that can be executed when "Simulated BIG" or "Simulated BIG (ED)" is determined in step S4366.

In simulated game 5, either a "V" aligns on one of the lines (center line, top line, bottom line, cross-up line, and cross-down line) (or the cross-up line if the first stop operation is performed on the left reel 3L), or a "Seven" aligns on the center line. Simulated game 5 is a simulated game that can be executed when "Simulated BIG" or "Simulated BIG (ED)" is determined in step S4366. In simulated game 6, "V" symbols are in a ready position on the center line, cross-up line, and cross-down line, and either a "V" aligns on the center line, or a "Seven" aligns on the center line, while "Bar" symbols do not align on any line. Simulated game 6 is a simulated game that can be executed when "Simulated BIG (ED)" is determined in step S4366 or step S4369.

Furthermore, pseudo-game 6 is a pseudo-game that can only be executed when a "pseudo-BIG (ED)" is determined. That is, when pseudo-game 6 is executed, a pseudo-BIG (ED) (where the pseudo-BIG continues until the advantageous period ends) is confirmed. For example, the pseudo-games performed when a win occurs in the normal long freeze lottery (1) and normal long freeze lottery (2) (see step S4102 in Figure 108), as well as the pseudo-games performed when a win occurs in the entry long freeze lottery (1) and entry long freeze lottery (2) (see step S4363 in Figure 133), are also pseudo-game 6.

In Pseudo-Game 7, neither "V" nor "Seven" appear on any of the lines (center line, top line, bottom line, cross-up line, and cross-down line), and only "Bar" appears on the center line. Pseudo-Game 7 is a pseudo-game that can be executed when "Pseudo-BIG" or "Fake Pseudo-Game" is determined in step S4369. If "Pseudo-BIG" is determined and Pseudo-Game 7 is executed, a reel animation (reel respin) will occur after Pseudo-Game 7 ends, and either "V" or "Seven" will appear on one of the lines. On the other hand, if "Fake Pseudo-Game" is determined and Pseudo-Game 7 is executed, the reels will not respin.

In Pseudo-Game 8, a "BAR" symbol will appear on one of the lines (center line, top line, bottom line, cross-up line, or cross-down line), but "V," "Seven," and "BAR" symbols will not line up on any of the lines. Pseudo-Game 8 is a pseudo-game that can be executed when "Pseudo-BIG" is determined in step S4369. If Pseudo-Game 8 is executed when "Pseudo-BIG" is determined, a reel animation (reel respin) will occur after Pseudo-Game 8 ends, and either "V" or "Seven" symbols will line up on one of the lines.

<Gameplay flow during promotion opportunities>
Figure 140 shows the flow of the game during the promotion opportunity.

As shown in Figure 140, a long freeze (see step S4363 in Figure 133) may occur during the first game of the promotion chance (value of promotion chance game counter: 3). If this freeze occurs, a pseudo-game aiming for a Big Bonus (pseudo-game 6) will occur following the freeze, and a pseudo-Big Bonus (pseudo-BIG) will begin. On the other hand, if no freeze occurs, the first game of the promotion chance will be completed, and the game will transition to the second game of the promotion chance, triggered by the operation of the start lever 7.

In the second game of the promotion chance (promotion chance game counter value: 2), a simulated game (see step S4367 in Figure 133) occurs, determined based on the result of the promotion chance lottery conducted in the first game (see step S4366 in Figure 133). If the simulated BIG transition symbols ("V" or "Seven") are aligned during this simulated game (first simulated game aiming for BB), a simulated BB (simulated BIG) begins. On the other hand, if the simulated BIG transition symbols ("V" or "Seven") are not aligned during this simulated game (first simulated game aiming for BB), the second game of the promotion chance is completed, and the game transitions to the third game of the promotion chance upon operation of the start lever 7.

In the third game of the promotion chance (promotion chance game counter value: 1), a simulated game (see step S4367 in Figure 133) occurs, determined based on the result of the promotion chance lottery conducted in the second game (see step S4366 in Figure 133). If the simulated BIG transition symbols ("V" or "Seven") are aligned during this simulated game (second simulated game aiming for BB), a simulated BB (simulated BIG) begins. On the other hand, if the simulated BIG transition symbols ("V" or "Seven") are not aligned during this simulated game (second simulated game aiming for BB), the third game of the promotion chance is completed, and the game transitions to the fourth game of the promotion chance upon operation of the start lever 7.

In the fourth game of the promotion chance (promotion chance game counter value: 0), a simulated game (see step S4367 in Figure 133) occurs, determined based on the result of the promotion chance lottery held in the third game (see step S4366 in Figure 133). If the simulated BIG transition symbols ("V" or "Seven") are aligned during this simulated game (third simulated game aiming for BB), a simulated BB (simulated BIG) begins. On the other hand, if the pseudo-BIG transition symbols ("V" or "Seven") do not line up during the pseudo-game (the third pseudo-game aiming for BB), a pseudo-BIG promotion lottery (see step S4369 in Figure 133) will occur when the specified number of games are played, and unless a pseudo-BIG is won, a pseudo-game aiming for RB (pseudo-game 7) will begin, and a pseudo-RB (pseudo-REG) will start.

Furthermore, in the above explanation, if a "fake simulated game" is determined as a result of the lottery during the third game of the promotion chance (see step S4366 in Figure 133), a fake simulated game (simulated game 1 or simulated game 2) will be determined based on that result (see step S4367 in Figure 133). In the fourth game of the promotion chance, regardless of the result of the simulated BIG promotion lottery upon completion of the prescribed number of games (see step S4369 in Figure 133), the fake simulated game will be played as the third simulated game aiming for a Big Bonus. However, if a "fake simulated game" is determined as a result of the promotion chance lottery held in the third game of the promotion chance (see step S4366 in Figure 133), and a simulated BIG is won in the simulated BIG promotion lottery held after the prescribed number of games have been played in the fourth game of the promotion chance (see step S4369 in Figure 133), then the fake simulated game may be discarded, and the simulated game determined based on the result of the simulated BIG promotion lottery held after the prescribed number of games has been played (see step S4370 in Figure 133) may be performed as the third simulated game aiming for a Big Bonus.

Furthermore, Figure 140 shows that a simulated game (a simulated game aiming for a Big Bonus or a simulated game aiming for a Regular Bonus) is performed before a simulated BIG or simulated REG bonus begins. The player can recognize that a simulated BIG or simulated REG bonus has begun when the simulated BIG transition symbol ("V" or "Seven") or the simulated REG transition symbol ("Bar") is aligned during the simulated game (a simulated game aiming for a Big Bonus or a simulated game aiming for a Regular Bonus). However, the actual timing of the start of a pseudo-BIG or pseudo-REG (the timing of updating the payout status flag storage area (see Figure 20)) may be after the pseudo-game (BB-targeting pseudo-game or RB-targeting pseudo-game) has been played (for example, during the main-side performance control processing at the start of the game (see step S8 in Figure 23)), or before the pseudo-game (BB-targeting pseudo-game or RB-targeting pseudo-game) has been played (for example, during the state control processing at the start of the game (see step S6 in Figure 23)).

<Example of a promotion chance animation (when a pseudo-BIG win occurs in the first game)>
Figure 141 shows an example of the presentation when a pseudo-BIG is won in the first game of the promotion chance.

As an example of the presentation shown in Figure 141, Figure 141(a) shows the image corresponding to the word "WIN" being displayed on the main display device 210 during the unit game immediately preceding the unit game that transitions to the promotion chance (in the case of transitioning from the normal payout state to the promotion chance, the final game of the normal payout state: the winning notification game).

Figure 141(b) shows that, following the state shown in Figure 141(a), during the first game of the promotion chance (promotion chance game counter value: 3), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Here, it is assumed that "Pseudo BIG" was determined as the result of the promotion chance lottery. Note that the long freeze (see step S4363 in Figure 133) was not a win.

Figure 141(c) shows that, after the state shown in Figure 141(b), in the second game of the promotion chance (promotion chance game counter value: 2), when the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery conducted in the first game (see step S4366 in Figure 133) begins, an image corresponding to the words "Aim for V!" is displayed on the main display device 210. This image suggests that the player should perform a stop operation at the timing when the "V" symbol, which is the symbol for the simulated BIG transition, can be displayed on each reel 3L, 3C, and 3R. This encourages the player to perform a stop operation aiming for the "V".

Figure 141(d) shows that, following the state shown in Figure 141(c), during the second game of the promotion chance (promotion chance game counter value: 2), when all reels 3L, 3C, and 3R stop spinning, an image corresponding to the words "V・V・V" and "BIG BONUS!" is displayed on the main display device 210. This informs the player that the "V" symbol, which is the pseudo-BIG transition symbol, has lined up, and that the game is transitioning to a Big Bonus (pseudo-BIG). When the pseudo-BIG transition symbol lines up (when the pseudo-BIG starts), the external signal 1 described in the first embodiment is turned ON.

After the state shown in Figure 141(d), in the second game of the promotion chance (promotion chance game counter value: 2), following the simulated game (with the rotation of reels 3L, 3C, and 3R stopped), a lock occurs, and the game progress is further halted for a predetermined period. Figure 141(e) shows the screen displayed on the main display device 210 for selecting the performance (BB performance) to be performed in the simulated BIG during the period when the lock is in effect. The player can select one of the performances A, B, or C as the BB performance by operating the performance button.

Figure 141(f) shows that, after the state shown in Figure 141(e), in the second game of the promotion chance (value of promotion chance game counter: 2), when one of the BB effects (in this case, effect B) is determined, images corresponding to the text "The game will proceed with the lever," "0 coins earned," and "30 navigations remaining" are displayed on the main display device 210. This makes it possible to prompt the player to operate the start lever 7, and the lock ends when the start lever 7 is operated. In addition, even if the start lever 7 is not operated, the lock ends when a predetermined time (for example, 50 seconds) has elapsed after all reels 3L, 3C, and 3R have stopped rotating in the simulated game. "0 Coins Acquired" indicates the number of coins acquired by the player during the pseudo-BIG bonus (the difference between the number of coins paid out and the number of coins inserted). "30 Remaining Navigations" indicates the remaining number of bell navigations that can be performed during the first pseudo-BIG bonus (see Figure 91) (the value of the first bell navigation counter).

After the state shown in Figure 141(f), when the start lever 7 is operated, the rotation of each reel 3L, 3C, and 3R begins for actual gameplay (main gameplay) (random delay processing is performed and the game progresses). Figure 141(g) shows the push-order navigation image displayed on the main display device 210 at this time. The push-order navigation image is an image that notifies the correct push order for the push-order bell (bell navigation). Here, since "F_321 Bell D" has been determined as the internal winning combination, the first stop operation is to stop the right reel 3R by aiming for the "V", the second stop operation is to stop the middle reel 3C, and the third stop operation is to stop the left reel 3L (see Figure 91). Also, since one bell navigation has been performed, the number of "remaining navigations" decreases by one to "29".

Figure 141(h) shows the main display device 210 displaying an image corresponding to the text "GET 15 coins" after all reels 3L, 3C, and 3R have stopped rotating following the state shown in Figure 141(g). Here, 15 coins have been dispensed as a result of the stop operation performed according to the notification (bell navigation), indicating that a bell combination was won (see Figure 87). Furthermore, the "acquired" coin count has been updated to the difference between the dispensed coins (15) and the inserted coins (3) (12 coins).

Note that in the states shown in Figures 141(e) to (h), the game has already transitioned from a promotion chance to a pseudo-BIG bonus. While these figures represent the first game of the pseudo-BIG bonus, for convenience, they are explained as the second game of the promotion chance.

<Example of presentation during promotion chance (when pseudo-BIG is not won)>
Figure 142 shows an example of the presentation when all pseudo-BIG bonuses are not won in the first to fourth games of the promotion chance.

As an example of the presentation shown in Figure 142, Figure 142(a) shows the image corresponding to the word "WIN" being displayed on the main display device 210 during the unit game immediately preceding the unit game that transitions to the promotion chance (in the case of transitioning from the normal payout state to the promotion chance, the final game of the normal payout state: the winning notification game).

Figure 142(b) shows that, following the state shown in Figure 142(a), during the first game of the promotion chance (promotion chance game counter value: 3), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Here, it is assumed that "fake simulated game" was determined as the result of the promotion chance lottery. Note that the long freeze (see step S4363 in Figure 133) is not a winning result.

Figure 142(c) shows that, after the state shown in Figure 142(b), in the second game of the promotion chance (promotion chance game counter value: 2), when the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery conducted in the first game (see step S4366 in Figure 133) begins, an image corresponding to the words "Aim for V!" is displayed on the main display device 210. This image suggests that the player should perform a stop operation at the timing when the "V" symbol, which is the symbol for the simulated BIG transition, can be displayed on each reel 3L, 3C, and 3R. This encourages the player to perform a stop operation aiming for the "V".

Figure 142(d) shows that, after the state shown in Figure 142(c), during the second game of the promotion chance (promotion chance game counter value: 2), when all reels 3L, 3C, and 3R stop spinning, an image corresponding to the words "Too bad" and "Pull the lever to continue the game" is displayed on the main display device 210. This informs the player that the "V" symbol, which is the symbol for transitioning to a pseudo-BIG, did not line up (i.e., the player did not win a pseudo-BIG), and prompts the player to operate the start lever 7.

After the state shown in Figure 142(d), when the start lever 7 is operated, the rotation of reels 3L, 3C, and 3R begins for actual gameplay (main gameplay) (random delay processing is performed and the game progresses). Figure 142(e) shows that in the second game of the promotion chance (value of promotion chance game counter: 2), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Here, it is assumed that "fake simulated game" was determined as the result of the promotion chance lottery.

Figure 142(f) shows that, after the state shown in Figure 142(e), in the third game of the promotion chance (promotion chance game counter value: 1), when the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery conducted in the second game (see step S4366 in Figure 133) begins, an image corresponding to the words "Aim for V!" is displayed on the main display device 210. This image suggests that the player should perform a stop operation at the timing when the "V" symbol, which is the symbol for the simulated BIG transition, can be displayed on each reel 3L, 3C, and 3R. This encourages the player to perform a stop operation aiming for the "V".

Figure 142(g) shows that, after the state shown in Figure 142(f), during the simulated game played in the third game of the promotion chance (promotion chance game counter value: 1), when all reels 3L, 3C, and 3R stop spinning, an image corresponding to the words "Too bad" and "Pull the lever to continue the game" is displayed on the main display device 210. This informs the player that the "V" symbol, which is the symbol for transitioning to a simulated BIG win, did not line up (i.e., the player did not win a simulated BIG win), and prompts the player to operate the start lever 7.

After the state shown in Figure 142(g), when the start lever 7 is operated, the rotation of reels 3L, 3C, and 3R begins for actual gameplay (main gameplay) (random delay processing is performed and the game progresses). Figure 142(h) shows that in the third game of the promotion chance (value of promotion chance game counter: 1), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Here, it is assumed that "fake simulated game" was determined as the result of the promotion chance lottery.

Figure 142(i) shows that, after the state shown in Figure 142(h), in the fourth game of the promotion chance (value of promotion chance game counter: 0), when the pseudo-game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery held in the third game (see step S4366 in Figure 133) begins, an image corresponding to the words "Aim for V!" is displayed on the main display device 210. This image suggests that the player should perform a stop operation at the timing when the "V" symbol, as a pseudo-BIG transition symbol, can be displayed on each reel 3L, 3C, and 3R. This encourages the player to perform a stop operation aiming for the "V". Here, it is assumed that a "fake pseudo-game" was determined as a result of the pseudo-BIG promotion lottery at the time of consuming the prescribed number of games (see step S4369 in Figure 133). Furthermore, in the fourth game of the promotion chance (promotion chance game counter value: 0), two simulated games are played. The simulated game determined based on the result of the promotion chance lottery played in the third game (see step S4366 in Figure 133) (see step S4367 in Figure 133) will be referred to as the first simulated game.

Figure 142(j) shows the state shown in Figure 142(i), and in the first simulated game played during the fourth game of the promotion chance (promotion chance game counter value: 0), when all reels 3L, 3C, and 3R stop spinning, images corresponding to the words "Too bad" and "Pull the lever to continue the game" are displayed on the main display device 210. This informs the player that the "V" symbol, which is the symbol for transitioning to a simulated BIG, did not line up (i.e., the player did not win a simulated BIG), and prompts the player to operate the start lever 7.

After the state shown in Figure 142(j), when the start lever 7 is operated, a simulated game (see step S4370 in Figure 133) determined based on the result of the simulated BIG upgrade lottery (see step S4369 in Figure 133) begins. This simulated game will be referred to as the second simulated game. Figure 142(k) shows the main display device 210 displaying an image corresponding to the words "Aim for the BAR!" when the second simulated game, which takes place on the fourth game of the upgrade chance (value of the upgrade chance game counter: 0), begins. This image suggests that the player should perform a stop operation at the timing when the "BAR" symbol, as a simulated REG transition symbol, can be displayed on each reel 3L, 3C, and 3R. This prompts the player to perform a stop operation aiming for the "BAR".

Figure 142(l) shows that, after the state shown in Figure 142(k), in the second simulated game played during the fourth game of the promotion chance (promotion chance game counter value: 0), when all reels 3L, 3C, and 3R stop spinning, an image corresponding to the words "Regular Bonus!" and "Pull the lever to proceed" is displayed on the main display device 210. This notifies the player that the game is transitioning to a regular bonus (simulated REG) and prompts the player to operate the start lever 7. Furthermore, when the simulated REG transition symbols align (when the simulated REG begins), the external signal 2 described in the first embodiment is turned ON.

After the state shown in Figure 142(l), when the start lever 7 is operated, the rotation of each reel 3L, 3C, and 3R begins for actual gameplay (main gameplay) (random delay processing is performed and the game proceeds). Figure 142(m) shows the push order navigation image displayed on the main display device 210 at this time. The push order navigation image is an image for notifying the correct push order for the push order bell (bell navigation). Here, it is notified that "F_231 Bell A" to "F_231 Bell C" has been determined as the internal winning combination, and that the first stop operation is to stop the middle reel 3C by aiming for "Seven", the second stop operation is to stop the right reel 3R, and the third stop operation is to stop the left reel 3L (see Figure 91). Also, "4 remaining navigations" indicates the remaining number of bell navigations that can be performed in pseudo-REG (value of the second bell navigation count counter). The initial value for "Remaining Navigation" is 5, but after one Bell Navigation was performed, the number of remaining navigations decreased by 1 and was updated to "4".

Figure 142(n) shows the state shown in Figure 142(m), where, after all reels 3L, 3C, and 3R have stopped rotating, an image corresponding to the text "GET 15 coins" is displayed on the main display device 210. Here, 15 coins are dispensed because the stop operation was performed according to the notification (bell navigation), resulting in a successful bell combination (see Figure 87).

Note that in the states shown in Figures 142(m) and (n), the game has already transitioned from a promotion chance to a pseudo-REG, and although this shows the first game of the pseudo-REG, for convenience, it is explained as the fourth game of the promotion chance.

As explained above, when you enter a promotion chance state, you will inevitably transition to either a pseudo-BIG or pseudo-REG AT state. In other words, a promotion chance state is a payout state where a transition to an AT state is guaranteed. During a promotion chance, the choice of AT state is determined, and a notification of the destination AT state is displayed through the simulated gameplay. If the pseudo-BIG transition symbol ("V" or "Seven") aligns during the simulated gameplay from the first to the final game, you will transition to a pseudo-BIG state. If the pseudo-BIG transition symbol ("V" or "Seven") does not align during the first simulated gameplay in the final game, the pseudo-REG transition symbol ("Bar") will align during the second simulated gameplay, and you will transition to a pseudo-REG state. Transition to a pseudo-REG state is only possible in the final game; it is not possible to transition to a pseudo-REG state in any other game.

Up to this point, we have described a specification in which the display of symbols at the start of a pseudo-bonus, etc., is performed using a simulated game that the player can stop. However, instead of the simulated game, or in combination with the simulated game, the display of symbols at the start of a pseudo-bonus, etc., may also be performed using a reel animation that automatically stops the reels without requiring any stopping operation from the player. While the visual effect of using a reel animation is inferior to that of the simulated game, it allows for a reduction in the main program's capacity compared to the simulated game.

Furthermore, in simulated gameplay, the reels automatically stop after a predetermined time (e.g., 30 seconds) has elapsed since the start or stop operation of the simulated game reels became effective, and the symbols displayed at the start of the simulated bonus are shown. Therefore, in a broad sense, simulated gameplay can also be considered a type of reel performance. In the case of automatic stopping due to time elapsed, the system may be controlled to stop at a predetermined symbol combination (e.g., V symbols, sevens, bars), or a stop signal may be input to each reel at the point when the time elapsed to stop them. In the latter case, while the predetermined symbol combination may appear if the timing happens to be right, there may be instances where the symbol combination does not appear.

For the reel stop control of the simulated game, the embodiments described above can be appropriately adopted. For example, the number of sliding frames can be set to a maximum of four frames, similar to or identical to that of the normal game (main game), and the simulated stop outcome can change depending on the pressing position (stopping operation timing). Alternatively, the symbols can be slid to a predetermined position depending on the type of simulated game (simulated game 1 to 8), regardless of the pressing position, and then stopped. Furthermore, even in the type where the outcome changes depending on the pressing position, the stop control can be limited to two or three possible stopping positions (for example, in simulated game 3, the symbols may be slid four or more frames depending on the pressing position so that either a V or a Seven is formed), so that the symbols stop on an outcome that is easy for the player to understand. Furthermore, in the case of a type where the outcome changes depending on the button press position, even if, for example, neither a V-symbol alignment nor a Seven-symbol alignment stops at the start of a pseudo-BIG bonus, it is desirable that the pseudo-BIG bonus start animation (for example, the V-symbol alignment animation shown in Figure 141(d)) be performed in the same manner as when a V-symbol alignment occurs, so that the player can understand the situation.

In this embodiment, the maximum number of games played during the promotion chance is 4 (or 6) games, and no additional games are added. However, the game count may be extended if certain conditions are met. For example, the remaining games may be extended if a rare role is won but a pseudo-BIG is not won. Furthermore, when extending the promotion chance, the number of games may be increased by +1 game, +5 games, etc., or a state of infinite promotion chance that continues until a pseudo-BIG is won may be introduced and the player transitions to this state.

<Processing at the start of gameplay for pseudo-BIG>
Figure 143 is a flowchart showing the processing performed in the main control circuit when a pseudo-BIG game starts. Figure 144 is a flowchart showing the processing performed in the main control circuit when a pseudo-BIG game starts. Figure 145 is a diagram showing the lottery table for the consecutive win challenge at the start of a pseudo-BIG game. Figure 146 is a diagram showing the lottery table for the 1G consecutive win during a pseudo-BIG game.

The pseudo-BIG game start processing shown in Figure 143 is performed in the main control circuit 100 when the current payout state is pseudo-BIG (see Figure 88), specifically in step S6 of Figure 23 (main processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the processing for starting a pseudo-BIG game, the main CPU 101 first determines whether or not it is the start of a pseudo-BIG game (step S4381). As described above, the transition to a pseudo-BIG game occurs in the game start state control processing (see step S6 in Figure 23) of a unit game in which the pseudo-BIG transition flag (see step S4246 in Figure 121 and step S4351 in Figure 132) is set to ON, or in the unit game in which a pseudo-BIG is won in the promotion chance lottery (see step S4366 in Figure 133), or in the game start state control processing (see step S6 in Figure 23) of a unit game in which a pseudo-BIG is won in the pseudo-BIG promotion lottery when a specified number of games have been played (see step S4369 in Figure 133). In the game start state control processing for a unit game transitioning to a pseudo-BIG, the game transitions to a pseudo-BIG by updating the payout state flag storage area (see Figure 20). Following this, the pseudo-BIG game start processing shown in Figure 143 is performed. In step S4381, the main CPU 101 determines that it is the start of a pseudo-BIG if the current unit game transitions to a pseudo-BIG (i.e., if the current unit game is the first game of a pseudo-BIG).

If the main CPU 101 determines that it is time for a pseudo-BIG bonus to begin, it executes the pseudo-BIG bonus start processing (step S4382). Here, the pseudo-BIG bonus start processing will be explained using Figure 144.

In the processing at the start of a pseudo-BIG bonus, the main CPU 101 first determines whether or not it is a transition from a promotion chance (step S4401). This process is performed when a pseudo-BIG bonus is triggered in the current unit of play (when the current unit of play is the first game of a pseudo-BIG bonus). The main CPU 101 determines that it is a transition from a promotion chance if the payout state from the source of the transition was a promotion chance.

If the main CPU 101 determines that it is not a transition from a promotion chance, it sets up a simulated game (step S4402). In this process, if the simulated BIG (ED) flag (see step S4102 in Figure 108, and steps S4363, S4366, and S4369 in Figure 133) is set to ON, the main CPU 101 sets up simulated game 6 (see Figure 139). If the simulated BIG (ED) flag is not set to ON, it sets up simulated game 5 (see Figure 139). As a result, the main CPU 101 controls the execution of the set simulated game in the main-side performance control processing at the start of the game in that unit game (see step S8 in Figure 23). Although not shown, the main CPU 101 also clears various information (counters, etc.) that was set in the normal payout state.

If the system determines in step S4401 that it is time to transition from a promotion chance, or after executing the process in step S4402, the main CPU 101 sets the first pseudo-BIG (step S4403). As described above, there are two types of pseudo-BIG: the first pseudo-BIG and the second pseudo-BIG. At the start of a pseudo-BIG, the system is controlled to use the first pseudo-BIG.

Next, the main CPU 101 sets the first bell navigation count counter to "30" (step S4404). As described above, the value of the first bell navigation count counter indicates the remaining number of bell navigations that can be performed in the first pseudo-BIG and is stored in the main RAM 103. The value of the first bell navigation count counter is decremented by 1 each time a bell navigation is performed in the first pseudo-BIG.

Next, the main CPU 101 sets the remaining normal replay payout counter to "3" (step S4405). As described above, the value of the remaining normal replay payout counter indicates the number of times it is possible to transition from the first pseudo-BIG to the second pseudo-BIG, and is stored in the main RAM 103. The value of the remaining normal replay payout counter is deducted by 1 each time a transition from the first pseudo-BIG to the second pseudo-BIG occurs (when a normal replay is awarded in the first pseudo-BIG).

Next, the main CPU 101 determines whether the pseudo-BIG (ED) flag (see step S4102 in Figure 108, and steps S4363, S4366, and S4369 in Figure 133) is set to ON (step S4406). If it determines that the pseudo-BIG (ED) flag is set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that the pseudo-BIG (ED) flag is not set to ON, it adds 2 to the value of the pseudo-BIG stock counter (step S4407). The value of the pseudo-BIG stock counter indicates the remaining number of times the pseudo-BIG can be controlled again when the termination conditions for the pseudo-BIG are met, and is stored in the main RAM 103.

Next, the main CPU 101 executes the pseudo-BIG start-time consecutive win challenge lottery process (step S4408). In this process, the main CPU 101 refers to the pseudo-BIG start-time consecutive win challenge lottery table (see Figure 145) and performs a lottery based on random values to determine whether the result of the pseudo-BIG start-time consecutive win challenge lottery is "not a winner" or "a winner."

In the pseudo-BIG start-time consecutive win challenge lottery table shown in Figure 145, a lottery value corresponding to the result of the pseudo-BIG start-time consecutive win challenge lottery ("Non-Winning" and "Winning") is defined for each setting ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the pseudo-BIG start-time consecutive win challenge lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)". Therefore, regardless of the setting, there is a 1/256 probability of winning the pseudo-BIG start-time consecutive win challenge lottery.

If the player wins the consecutive win challenge lottery at the start of the pseudo-BIG, the main CPU 101 sets the consecutive win challenge win flag to ON. The consecutive win challenge win flag indicates that the player has won the consecutive win challenge. As will be explained in detail later, when the player wins the consecutive win challenge, the game transitions to the consecutive win challenge when the termination conditions for the pseudo-BIG are met (see transition conditions (M) in Figures 89 and 90).

After executing the process in step S4408, the main CPU 101 executes the entry-time long freeze lottery process (step S4409). This process is the same as the process in step S4363 in Figure 133, so its explanation is omitted here. After executing the process in step S4409, the main CPU 101 terminates this subroutine.

The above explains the pseudo-BIG start processing performed in step S4382 of Figure 143, using Figure 144. Returning to the explanation of Figure 143,

If it is determined in step S4381 that it is not the start of a pseudo-BIG bonus, or after executing the process in step S4382, the main CPU 101 determines whether the value of the pseudo-BIG stock counter is 2 or greater (step S4383). If it is determined that the value of the pseudo-BIG stock counter is 2 or greater, the main CPU 101 terminates this subroutine.

If the main CPU 101 determines that the value of the pseudo-BIG stock counter is less than 2, it executes the pseudo-BIG 1G consecutive win lottery process (step S4384). In this process, the main CPU 101 refers to the pseudo-BIG 1G consecutive win lottery table (see Figure 146) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 6, thereby determining the result of the pseudo-BIG 1G consecutive win lottery to be either "Not a Winner," "Pseudo-BIG," or "Pseudo-BIG (ED)."

The pseudo-BIG 1G consecutive win lottery table shown in Figure 146 is provided for each of the payout flags in payout flag group 6 ("Other," "Winning Combination," "Winning Combination BB," and "Single Coin Win"). If the payout flag in payout flag group 6 is "Other," the pseudo-BIG 1G consecutive win lottery table shown in Figure 146(a) is referenced. If the payout flag in payout flag group 6 is "Winning Combination," the pseudo-BIG 1G consecutive win lottery table shown in Figure 146(b) is referenced. If the payout flag in payout flag group 6 is "Winning Combination BB," the pseudo-BIG 1G consecutive win lottery table shown in Figure 146(c) is referenced. If the payout flag in payout flag group 6 is "Single Coin Win," the pseudo-BIG 1G consecutive win lottery table shown in Figure 146(d) is referenced.

In each pseudo-BIG 1G consecutive lottery table, for both the "First Pseudo-BIG" and the "Second Pseudo-BIG," lottery values corresponding to the results of the pseudo-BIG 1G consecutive lottery ("Non-Winning," "Pseudo-BIG," and "Pseudo-BIG (ED)") are defined. The probability of each result being determined in the pseudo-BIG 1G consecutive lottery can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

As a result, in the first pseudo-BIG, regardless of the payout flag in payout flag group 6, a "non-win" result is determined with a probability of 256/256 as a result of the 1G consecutive lottery during the pseudo-BIG. Furthermore, in the second pseudo-BIG, if the payout flag in payout flag group 6 is "other" or "single payout" as a result of the 1G consecutive lottery during the pseudo-BIG, a "non-win" result is determined with a probability of 256/256. If the payout flag in payout flag group 6 is "reach" or "reach BB", a "non-win" result is determined with a probability of 255/256, and a "pseudo-BIG" result is determined with a probability of 1/256. If a "Pseudo-BIG" is determined as a result of the 1G consecutive draw during a pseudo-BIG (i.e., the 1G consecutive draw is successful), the main CPU 101 adds 1 to the value of the pseudo-BIG stock counter.

After executing the process in step S4384, the main CPU 101 terminates this subroutine.

<Counter management processing for pseudo-BIG>
Figure 147 is a flowchart showing the pseudo-BIG counter management process performed in the main control circuit.

The pseudo-BIG counter management process shown in Figure 147 is performed in the main control circuit 100 during step S15 of Figure 23 (main processing) (game end state control processing) when the current payout state is pseudo-BIG (see Figure 88). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area (see Figure 20) in the main RAM 103.

In the pseudo-BIG counter management process, the main CPU 101 first determines whether or not it is controlled for the first pseudo-BIG (step S4421). If it determines that it is controlled for the first pseudo-BIG, the main CPU 101 determines whether or not a replay ("F_Replay A" or "F_Replay B" (see Figures 85 and 86)) has been determined as the internal winning combination through the internal winning combination determination process (see step S64 in Figure 26) (step S4422).

If the main CPU 101 determines that a replay has been determined as an internal winning combination, it adds 1 to the value of the replay counter established during the first pseudo-BIG (step S4423). The value of the replay counter established during the first pseudo-BIG indicates the number of times a replay ("F_Replay A" or "F_Replay B") was determined as an internal winning combination during the first pseudo-BIG, and is stored in the main RAM 103.

Next, the main CPU 101 determines whether a normal replay has been awarded (step S4424). In this process, the main CPU 101 determines whether the combination of symbols displayed along the active lines is a "normal replay" (any of the following: "C_Middle Replay A_01-04", "C_Lower Replay A_01-06", "C_CU Replay_01-03", "C_Upper Replay B_01-06", "C_Upper Replay A_01-03", and "C_CD Replay_01-04" (see Figure 83A)).

If the main CPU 101 determines that a regular replay has resulted in a win, it subtracts 1 from the remaining regular replay win counter (see step S4405 in Figure 144) (step S4425). Then, the main CPU 101 sets the second pseudo-BIG (step S4426). This transitions from the first pseudo-BIG to the second pseudo-BIG.

Next, the main CPU 101 sets the second bell navigation count counter to "9" (step S4427). As described above, the value of the second bell navigation count counter indicates the remaining number of bell navigations that can be performed in the second pseudo-BIG and is stored in the main RAM 103. The value of the second bell navigation count counter is decremented by 1 each time a bell navigation is performed in the second pseudo-BIG.

If the main CPU 101 determines in step S4424 that the normal replay has not resulted in a win, or after executing the process in step S4427, the main CPU 101 terminates this subroutine.

If the main CPU 101 determines in step S4422 that a replay has not been determined as the internal winning combination, it determines whether or not a bell navigation has occurred (step S4428). In this process, the main CPU 101 determines whether or not a push-order bell (any of "F_213 Bell A", "F_213 Bell B", "F_213 Bell C", "F_213 Bell D", "F_231 Bell A", "F_231 Bell B", "F_231 Bell C", "F_231 Bell D", "F_312 Bell A", "F_312 Bell B", "F_312 Bell C", "F_312 Bell D", "F_321 Bell A", "F_321 Bell B", "F_321 Bell C", and "F_321 Bell D" (see Figures 83A and 83B)) has been determined as the internal winning combination. As mentioned above, in a pseudo-BIG bonus, when a specific sequence of bell symbols is determined to be the internal winning combination, information on how to stop the reels to trigger the bell symbol is provided (bell navigation is performed).

If the main CPU 101 determines that a bell navigation has occurred, it subtracts 1 from the value of the first bell navigation count counter (see step S4404 in Figure 144) (step S4429). Then, the main CPU 101 determines whether the value of the first bell navigation count counter is 0 or not (step S4430). If it determines that the value of the first bell navigation count counter is 0, the main CPU 101 executes the pseudo-BIG end-of-game processing (1) (step S4431). The pseudo-BIG end-of-game processing (1) will be explained later using Figure 148.

If it is determined in step S4428 that no bell navigation has occurred, if it is determined in step S4430 that the value of the first bell navigation count counter is not 0, or after the processing in step S4431 has been completed, the main CPU 101 terminates this subroutine.

If, in step S4421, it is determined that the system is not controlled by the first pseudo-BIG (i.e., controlled by the second pseudo-BIG), the main CPU 101 determines whether or not a bell navigation has occurred (step S4432). This process is the same as the process in step S4428. If it is determined that no bell navigation has occurred, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that a bell navigation has occurred, it subtracts 1 from the value of the second bell navigation count counter (see step S4427) (step S4433). Then, the main CPU 101 determines whether the value of the second bell navigation count counter is 0 or not (step S4434). If it determines that the value of the second bell navigation count counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the value of the second bell navigation counter is determined to be 0, the main CPU 101 determines whether the value of the remaining normal replay winning count counter (see step S4425) is 0 or not (step S4435). If the value of the remaining normal replay winning count counter is determined to be 0, the main CPU 101 executes the pseudo-BIG end processing (2) (step S4436). The pseudo-BIG end processing (2) will be explained later using Figure 150.

On the other hand, if the main CPU 101 determines that the value of the remaining number of normal replay wins counter is not zero, it sets the first pseudo-BIG (step S4437). This transitions from the second pseudo-BIG to the first pseudo-BIG.

After executing the process in step S4436 or step S4437, the main CPU 101 terminates this subroutine.

<Processing at the end of a pseudo-BIG bonus (1)>
Figure 148 is a flowchart showing the pseudo-BIG termination processing (1) performed in the main control circuit. Figure 149 is a diagram showing the lottery table when the number of successful replies is insufficient.

The pseudo-BIG termination process (1) shown in Figure 148 is the process performed in step S4431 of Figure 147 (pseudo-BIG counter management process) in the main control circuit 100. This process is performed when the condition for the termination of the pseudo-BIG, specifically "(i) the value of the first bell navigation count counter is 0," is met.

In the pseudo-BIG termination processing (1), the main CPU 101 first determines whether the value of the pseudo-BIG stock counter (see step S4407 in Figure 144) is 2 or greater (step S4441).

If the main CPU 101 determines that the value of the pseudo-BIG stock counter is less than 2, it determines whether the value of the first pseudo-BIG winning replay counter (see step S4423 in Figure 147) is 2 or less (step S4442).

If the main CPU 101 determines that the value of the established replay counter during the first pseudo-BIG is 2 or less, it executes the insufficient number of established replays lottery process (step S4443). In this process, the main CPU 101 refers to the insufficient number of established replays lottery table (see Figure 149) and performs a lottery based on random values to determine one of the following results from the insufficient number of established replays lottery: "Not a Winner," "Pseudo-BIG," or "Pseudo-BIG (ED)."

In the lottery table for insufficient winning replays shown in Figure 149, a lottery value corresponding to the result of the insufficient winning replay lottery ("Non-Winning," "Pseudo-BIG," and "Pseudo-BIG (ED)") is defined for each number of times a replay was determined as an internal winning combination during the first pseudo-BIG ("0 times," "1 time," and "2 times"). The probability of each result of the insufficient winning replay lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

For example, if the value of the established replay counter during the first pseudo-BIG is "1", the result of the draw when the number of established replays is insufficient will be "Non-Winning" with a probability of 224/256 and "Pseudo-BIG" with a probability of 32/256. If "Pseudo-BIG" is determined as the result of the draw when the number of established replays is insufficient (i.e., the draw was successful), the main CPU 101 adds 1 to the value of the pseudo-BIG stock counter.

If, in step S4442, it is determined that the value of the first pseudo-BIG established replay counter is 3 or greater, or after executing the process in step S4443, the main CPU 101 determines whether the value of the pseudo-BIG stock counter is 1 or greater (step S4444).

If the system determines in step S4441 that the value of the pseudo-BIG stock counter is 2 or greater, or if it determines in step S4444 that the value of the pseudo-BIG stock counter is 1 or greater, the main CPU 101 sets the pseudo-BIG continuation flag to ON (step S4445). The pseudo-BIG continuation flag indicates that the pseudo-BIG will continue. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the pseudo-BIG continuation flag was set to ON, the main CPU 101 executes the pseudo-BIG start processing (see Figure 144). This ensures that the pseudo-BIG continues.

Furthermore, when the main CPU 101 executes the process in step S4445, it deducts 1 from the value of the pseudo-BIG stock counter. However, if it is determined that the number of times the game is controlled by pseudo-BIG (the pseudo-BIG start process is executed) during a single advantageous period will be three or more, the value of the pseudo-BIG stock counter may not be deducted. In this case, pseudo-BIG (ED) (the pseudo-BIG continues until the advantageous period ends) is confirmed.

If, in step S4444, the value of the pseudo-BIG stock counter is determined to be less than 1 (0), the main CPU 101 determines whether the consecutive win challenge flag is set to ON (step S4446). As described above, the consecutive win challenge flag indicates that the consecutive win challenge has been won (see step S4408 in Figure 144).

If the main CPU 101 determines that the Consecutive Win Challenge flag is set to ON, it sets the Consecutive Win Challenge transition flag to ON (step S4447). As described above, the Consecutive Win Challenge transition flag indicates that it is time to start the Consecutive Win Challenge. In the game start state control processing for the next unit game after the unit game in which the Consecutive Win Challenge transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This initiates the Consecutive Win Challenge.

On the other hand, if the main CPU 101 determines that the consecutive win challenge flag is not set to ON, it sets the non-advantageous section transition flag to ON (step S4448). The non-advantageous section transition flag indicates that it is time to begin the non-advantageous section. In the game start state control processing for the unit game following the unit game in which the non-advantageous section transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to the non-advantageous section.

After executing steps S4445, S4447, or S4448, the main CPU 101, if the consecutive win challenge flag is set to ON, sets the flag to OFF and terminates this subroutine. If the pseudo-BIG continues, the consecutive win challenge flag is carried over, and in this case, the consecutive win challenge lottery process at the start of the pseudo-BIG (see step S4408 in Figure 144) may be omitted.

<Processing at the end of pseudo-BIG (2)>
Figure 150 is a flowchart showing the pseudo-BIG end processing (2) performed in the main control circuit. Figure 151 is a diagram showing the continuous win challenge lottery table at the end of the final second pseudo-BIG.

The pseudo-BIG termination process (2) shown in Figure 150 is the process performed in step S4436 of Figure 147 (pseudo-BIG counter management process) in the main control circuit 100. This process is performed when the above-mentioned condition for the termination of the pseudo-BIG is met: "(ii) The value of the remaining normal replay winning count counter is 0, AND the value of the second bell navigation count counter is 0."

In the pseudo-BIG termination processing (2), the main CPU 101 first determines whether the value of the pseudo-BIG stock counter (see step S4407 in Figure 144) is 1 or greater (step S4461).

If the main CPU 101 determines that the value of the pseudo-BIG stock counter is 1 or greater, it sets the pseudo-BIG continuation flag to ON (step S4462). As described above, the pseudo-BIG continuation flag is a flag that indicates the continuation of the pseudo-BIG. In the game start state control processing (see step S6 in Figure 23) for the unit game following the unit game in which the pseudo-BIG continuation flag was set to ON, the main CPU 101 executes the pseudo-BIG start processing (see Figure 144). This causes the pseudo-BIG to continue.

Furthermore, when the main CPU 101 executes the process in step S4462, it deducts 1 from the value of the pseudo-BIG stock counter. However, if it is determined that the number of times the game is controlled by pseudo-BIG (the pseudo-BIG start process is executed) during a single advantageous period will be three or more, the value of the pseudo-BIG stock counter may not be deducted. In this case, pseudo-BIG (ED) (the pseudo-BIG continues until the advantageous period ends) is confirmed.

On the other hand, if the value of the pseudo-BIG stock counter is determined to be less than 1 (0), the main CPU 101 determines whether the consecutive win challenge flag is set to ON (step S4463). As described above, the consecutive win challenge flag is a flag indicating that the consecutive win challenge has been won (see step S4408 in Figure 144).

If the main CPU 101 determines that the Consecutive Win Challenge flag is not set to ON, it executes the Consecutive Win Challenge lottery process at the end of the final second pseudo-BIG (step S4464). In this process, the main CPU 101 refers to the Consecutive Win Challenge lottery table at the end of the final second pseudo-BIG (see Figure 151) and performs a lottery based on random values to determine whether the result of the Consecutive Win Challenge lottery at the end of the final second pseudo-BIG is either "Not a Win" or "A Win".

The consecutive win challenge lottery table at the end of the final second pseudo-BIG, shown in Figure 151, is provided for each of the values of the first bell navigation count counter at the time of entering the final second pseudo-BIG ("less than 6" and "6 or more"). The value of the first bell navigation count counter at the time of entering the final second pseudo-BIG is the value of the first bell navigation count counter (see step S4429 in Figure 147) when transitioning to the final (third) second pseudo-BIG (when the value of the normal replay remaining win count counter becomes 0 due to the processing of step S4425, and then the processing of step S4426 is performed). If the value of the first bell navigation count counter at the time of entering the final second pseudo-BIG is less than "6", the consecutive win challenge lottery table at the end of the final second pseudo-BIG shown in Figure 151(a) is referred to. If the value of the first bell navigation count counter at the time of entering the final second pseudo-BIG is "6" or greater, the consecutive win challenge lottery table at the end of the final second pseudo-BIG shown in Figure 151(b) is referred to.

In each final second pseudo-BIG end-of-game consecutive win challenge lottery table, a lottery value corresponding to the result of the final second pseudo-BIG end-of-game consecutive win challenge lottery ("Non-Winning" and "Winning") is defined for each setting ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the final second pseudo-BIG end-of-game consecutive win challenge lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

As a result, if the value of the first bell navigation count counter at the time of entering the final second pseudo-BIG is less than "6", regardless of the setting value, there is a 256/256 probability of not winning the consecutive win challenge lottery at the end of the final second pseudo-BIG. Furthermore, if the value of the first bell navigation count counter at the time of entering the final second pseudo-BIG is "6" or greater, regardless of the setting value, there is a 2/256 probability of winning the consecutive win challenge lottery at the end of the final second pseudo-BIG. After executing the process in step S4464, the main CPU 101 determines whether or not it won the consecutive win challenge lottery at the end of the final second pseudo-BIG (step S4465).

If, in step S4463, the system determines that the Consecutive Win Challenge flag is set to ON, or if, in step S4465, the system determines that the Consecutive Win Challenge lottery at the end of the final second pseudo-BIG has been won, the main CPU 101 sets the Consecutive Win Challenge transition flag to ON (step S4466). As described above, the Consecutive Win Challenge transition flag indicates that it is time to start the Consecutive Win Challenge. In the game start state control processing for the unit game following the unit game in which the Consecutive Win Challenge transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This initiates the transition to the Consecutive Win Challenge.

If, in step S4465, the main CPU 101 determines that the consecutive win challenge lottery at the end of the final second pseudo-BIG has not been won, it sets the non-advantageous section transition flag to ON (step S4467). As described above, the non-advantageous section transition flag indicates that it is time to start the non-advantageous section. In the game start state control processing for the unit game following the unit game in which the non-advantageous section transition flag was set ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This causes the system to transition to the non-advantageous section.

Furthermore, the section lamp (also called the status indicator or advantageous section lamp), which was lit during the advantageous section, changes from lit to unlit after all reels of the game have stopped, when the transition to the non-advantageous section is determined. As explained in the first embodiment, the section lamp indicates that the current state is within the advantageous section when it is lit.

After executing steps S4462, S4466, or S4467, the main CPU 101, if the consecutive win challenge flag is set to ON, sets the flag to OFF and terminates this subroutine. If the pseudo-BIG continues, the consecutive win challenge flag is carried over, and in this case, the consecutive win challenge lottery process at the start of the pseudo-BIG (see step S4408 in Figure 144) may be omitted.

<Processing at the start of gameplay for pseudo-REG>
Figure 152 is a flowchart showing the processing performed in the main control circuit at the start of a pseudo-REG game. Figure 153 is a diagram showing the consecutive win challenge lottery table at the start of a pseudo-REG game. Figure 154 is a diagram showing the 1G consecutive win lottery table during a pseudo-REG game.

The pseudo-REG game start processing shown in Figure 152 is performed in the main control circuit 100 when the current payout state is pseudo-REG (see Figure 88), specifically in step S6 of Figure 23 (main processing) (game start state control processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the pseudo-REG game start processing, the main CPU 101 first determines whether it is the start of a pseudo-REG game (step S4481). As described above, the transition to a pseudo-REG occurs during the game start state control processing (see step S6 in Figure 23) in the final game of the promotion chance (value of the promotion chance game counter: 0). In the game start state control processing for a unit game that transitions to a pseudo-REG, the game transitions to a pseudo-REG by updating the payout state flag storage area (see Figure 20), and then the pseudo-REG game start processing shown in Figure 152 is performed. In the processing of step S4481, the main CPU 101 determines that it is the start of a pseudo-REG game if it transitions to a pseudo-REG in the current unit game (if the current unit game is the first game of a pseudo-REG).

If the main CPU 101 determines that it is time to start a pseudo-REG, it sets the second bell navigation count counter to "5" (step S4482). As described above, the value of the second bell navigation count counter indicates the remaining number of bell navigations that can be performed in the pseudo-REG and is stored in the main RAM 103. The value of the second bell navigation count counter is decremented by 1 each time a bell navigation is performed in the pseudo-REG.

Next, the main CPU 101 executes the pseudo-REG start-time consecutive win challenge lottery process (step S4483). In this process, the main CPU 101 refers to the pseudo-REG start-time consecutive win challenge lottery table (see Figure 153) and performs a lottery based on random values to determine whether the result of the pseudo-REG start-time consecutive win challenge lottery is "not a winner" or "a winner."

The pseudo-REG start-time consecutive win challenge lottery table shown in Figure 153 is provided for each value of the payout-advantage section game count counter ("199 or less" and "200 or more"). The payout-advantage section game count counter is the advantageous section game count counter mentioned above. Its value indicates the number of unit games played within the advantageous section and is stored in the main RAM 103. Although not shown, the payout-advantage section game count counter is incremented only within the advantageous section and is cleared when transitioning to a non-advantage section. If the payout-advantage section game count counter value is "199" or less, the pseudo-REG start-time consecutive win challenge lottery table shown in Figure 153(a) is referenced. If the payout-advantage section game count counter value is "200" or more, the pseudo-REG start-time consecutive win challenge lottery table shown in Figure 153(b) is referenced.

In each pseudo-REG start-time consecutive win challenge lottery table, a lottery value corresponding to the result of the pseudo-REG start-time consecutive win challenge lottery ("non-win" and "win") is defined for each setting value ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6"). The probability of each result of the pseudo-REG start-time consecutive win challenge lottery being determined can be expressed as "the lottery value defined for that result / the total number of random values that can be extracted (random denominator: 256)". As a result, if the value of the payout advantageous section game count counter is "199" or less, regardless of the setting value, there is a 1/256 probability of winning the pseudo-REG start-time consecutive win challenge lottery. Furthermore, for example, if the value of the payout-specific advantageous period game count counter is "200" or higher, and the setting value is setting 6, there is a 40/256 probability of winning the pseudo-REG start consecutive win challenge lottery.

If the consecutive win challenge lottery is won at the start of the pseudo-REG, the main CPU 101 sets the consecutive win challenge win flag to ON. As mentioned above, the consecutive win challenge win flag indicates that the consecutive win challenge has been won. As will be explained in detail later, when the consecutive win challenge is won, the game transitions to the consecutive win challenge when the termination conditions of the pseudo-REG are met (see transition conditions (M) in Figures 89 and 90).

If it is determined in step S4481 that it is not the start of a pseudo-REG, or after executing the process in step S4483, the main CPU 101 executes the pseudo-REG 1G consecutive win lottery process (step S4484). In this process, the main CPU 101 refers to the pseudo-REG 1G consecutive win lottery table (see Figure 154) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 6, thereby determining one of the following results from the pseudo-REG 1G consecutive win lottery: "Not a Winner," "Pseudo-BIG," or "Pseudo-BIG (ED)."

The pseudo-REG 1G consecutive win lottery table shown in Figure 154 is provided for each of the payout flags in payout flag group 6 ("Other," "Winning Combination," "Winning Combination BB," and "Single Coin Win"). If the payout flag in payout flag group 6 is "Other," the pseudo-REG 1G consecutive win lottery table shown in Figure 154(a) is referenced. If the payout flag in payout flag group 6 is "Winning Combination," the pseudo-REG 1G consecutive win lottery table shown in Figure 154(b) is referenced. If the payout flag in payout flag group 6 is "Winning Combination BB," the pseudo-REG 1G consecutive win lottery table shown in Figure 154(c) is referenced. If the payout flag in payout flag group 6 is "Single Coin Win," the pseudo-REG 1G consecutive win lottery table shown in Figure 154(d) is referenced.

In each pseudo-REG 1G consecutive draw table, a draw value corresponding to the result of the pseudo-REG 1G consecutive draw ("Non-Winning," "Pseudo-BIG," and "Pseudo-BIG (ED)") is defined. The probability of each result being determined in the pseudo-REG 1G consecutive draw can be expressed as "the defined draw value for that result / the total number of possible random values that can be extracted (random denominator: 256)." For example, if the payout flag in payout flag group 6 is "Reach Eye BB," then the result of the pseudo-REG 1G consecutive draw will be "Non-Winning" with a probability of 240/256, "Pseudo-BIG" with a probability of 15/256, and "Pseudo-BIG (ED)" with a probability of 1/256.

If a "Pseudo-BIG" or "Pseudo-BIG (ED)" is determined as a result of the 1G consecutive lottery during a pseudo-REG (meaning the 1G consecutive lottery is won), the main CPU 101 sets the pseudo-BIG win flag to ON. As described above, the pseudo-BIG win flag indicates that a pseudo-BIG has been won. Furthermore, if a "Pseudo-BIG (ED)" is determined as a result of the 1G consecutive lottery during a pseudo-REG (meaning a pseudo-BIG (ED) has been won), the main CPU 101 sets the pseudo-BIG (ED) flag to ON. As described above, when the pseudo-BIG (ED) flag is set to ON, the system will be controlled to enter pseudo-BIG again when the termination conditions for pseudo-BIG are met, and this will cause the pseudo-BIG to continue until the advantageous period ends.

After executing the process in step S4484, the main CPU 101 terminates this subroutine.

<Counter management processing for pseudo-REG>
Figure 155 is a flowchart showing the pseudo-REG counter management process performed in the main control circuit.

The pseudo-REG counter management process shown in Figure 155 is performed in the main control circuit 100 during step S15 of Figure 23 (main processing) (game end state control processing) when the current payout state is pseudo-REG (see Figure 88). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area (see Figure 20) in the main RAM 103.

In the pseudo-REG counter management process, the main CPU 101 first determines whether or not a bell navigation has occurred (step S4501). This process is the same as step S4428 in Figure 147, so its explanation is omitted here. If it determines that no bell navigation has occurred, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that a bell navigation has occurred, it subtracts 1 from the value of the second bell navigation counter (see step S4482 in Figure 152) (step S4502). Then, the main CPU 101 determines whether the value of the second bell navigation counter is 0 or not (step S4503). If it determines that the value of the second bell navigation counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the value of the second bell navigation counter is determined to be 0, the main CPU 101 determines whether the pseudo-BIG win flag is set to ON (step S4504). As described above, the pseudo-BIG win flag is a flag indicating that a pseudo-BIG win has been achieved (see step S4484 in Figure 152).

If the main CPU 101 determines that the pseudo-BIG win flag is set to ON, it sets the pseudo-BIG transition flag to ON (step S4505). As described above, the pseudo-BIG transition flag indicates that it is time to start a pseudo-BIG. In the game start state control processing for the next game after the pseudo-BIG transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to a pseudo-BIG (see transition condition (N) in Figures 89 and 90).

On the other hand, if the main CPU 101 determines that the pseudo-BIG win flag is not set to ON, it determines whether the consecutive win challenge win flag is set to ON or not (step S4506). As described above, the consecutive win challenge win flag is a flag indicating that the consecutive win challenge has been won (see step S4483 in Figure 152).

If the main CPU 101 determines that the Consecutive Win Challenge flag is set to ON, it sets the Consecutive Win Challenge transition flag to ON (step S4507). As described above, the Consecutive Win Challenge transition flag indicates that it is time to start the Consecutive Win Challenge. In the game start state control processing for the next unit game after the unit game in which the Consecutive Win Challenge transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This initiates the Consecutive Win Challenge.

On the other hand, if the main CPU 101 determines that the consecutive win challenge flag is not set to ON, it sets the non-advantageous section transition flag to ON (step S4508). The non-advantageous section transition flag indicates that it is time to begin the non-advantageous section. In the game start state control processing for the unit game following the unit game in which the non-advantageous section transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to the non-advantageous section.

After executing steps S4505, S4507, or S4508, the main CPU 101, if the pseudo-BIG win flag or the consecutive win challenge flag is set to ON, sets these flags to OFF and terminates this subroutine. Note that if transitioning to a pseudo-BIG is initiated, the consecutive win challenge flag is carried over, and in this case, the consecutive win challenge lottery process at the start of the pseudo-BIG (see step S4408 in Figure 144) may be omitted.

Up to this point, we have explained the processing related to pseudo-REGs. As mentioned above, pseudo-REGs offer less of an advantage in terms of payouts compared to pseudo-BIGs. Therefore, it is desirable to minimize the decrease in player interest by enabling setting-indicating effects that do not occur during pseudo-BIGs, either during or at the end of a pseudo-REG. The setting-indicating effects can be appropriately adopted from the embodiments described above.

<Processing at the start of gameplay for the consecutive win challenge>
Figure 156 is a flowchart showing the processing performed in the main control circuit at the start of a game for the consecutive win challenge. Figure 157 is a diagram showing the pseudo-bonus lottery table at the start of the consecutive win challenge. Figure 158 is a diagram showing the number of games lottery at the start of the consecutive win challenge. Figure 159 is a diagram showing the lottery table during the consecutive win challenge. Figure 160 is a diagram showing the normal transition lottery table at the end of the consecutive win challenge.

The game start processing for the continuous win challenge, shown in Figure 156, is performed in the main control circuit 100 when the current payout state is in the continuous win challenge state (see Figure 88). This processing occurs in step S6 of Figure 23 (main processing) (for example, when the judgment result in step S85 of Figure 27 is "NO"). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area of the main RAM 103 (see Figure 20).

In the game start processing for the Consecutive Win Challenge, the main CPU 101 first determines whether or not it is the start of the Consecutive Win Challenge (step S4521). As described above, the transition to the Consecutive Win Challenge occurs in the game start state control processing (see step S6 in Figure 23) of the unit game following the unit game in which the Consecutive Win Challenge transition flag (see step S4003 in Figure 93, step S4027 in Figure 95, step S4447 in Figure 148, step S4466 in Figure 150, and step S4507 in Figure 155) is set to ON. In the game start state control processing of the unit game that transitions to the Consecutive Win Challenge, the game transitions to the Consecutive Win Challenge by updating the payout state flag storage area (see Figure 20), and then the game start processing for the Consecutive Win Challenge shown in Figure 156 is performed. In step S4521, the main CPU 101 determines that the continuous win challenge has begun if the current unit game transitions to a continuous win challenge (i.e., if this unit game is the first game of the continuous win challenge).

If the system determines that a Consecutive Win Challenge has begun, the main CPU 101 executes a pseudo-bonus lottery process at the start of the Consecutive Win Challenge (step S4522). In this process, the main CPU 101 refers to the pseudo-bonus lottery table at the start of the Consecutive Win Challenge (see Figure 157) and performs a lottery based on random values to determine the result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge to be one of the following: "No Win," "Promotion Chance," "Pseudo-BIG," or "Pseudo-BIG (ED)."

In the pseudo-bonus lottery table at the start of the Consecutive Win Challenge shown in Figure 157, for each setting ("Setting 1", "Setting 2", "Setting 3", "Setting 4", "Setting 5", and "Setting 6") and each "Guaranteed Consecutive Win Challenge", a lottery value corresponding to the result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge ("Non-Winning", "Upgrade Chance", "Pseudo-BIG", and "Pseudo-BIG (ED)") is defined. "Guaranteed Consecutive Win Challenge" indicates that the Guaranteed Consecutive Win Challenge flag (see step S4003 in Figure 93 and step S4029 in Figure 95) is set to ON. The probability of each result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

As a result, if the "Confirmed Consecutive Win Challenge" flag is not set to "On," the result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge will be "Non-Winning" with a probability of 178/256, "Promotion Chance" with a probability of 77/256, and "Pseudo-BIG" with a probability of 1/256, regardless of the setting value. Furthermore, if the "Confirmed Consecutive Win Challenge" flag is set to "On," the result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge will be "Promotion Chance" with a probability of 224/256, "Pseudo-BIG" with a probability of 31/256, and "Pseudo-BIG (ED)" with a probability of 1/256, regardless of the setting value. In other words, if the "Confirmed Consecutive Win Challenge" flag is set to "On," it is guaranteed that the game will transition to either Pseudo-BIG or Promotion Chance.

If the pseudo-bonus draw at the start of the Consecutive Win Challenge results in a "Promotion Chance" (winning the Promotion Chance), the main CPU 101 sets the Promotion Chance Win flag to ON. As mentioned above, the Promotion Chance Win flag is a flag indicating that the Promotion Chance has been won. Also, if the pseudo-bonus draw at the start of the Consecutive Win Challenge results in a "Pseudo-BIG" or "Pseudo-BIG (ED)" (winning the Pseudo-BIG), the main CPU 101 sets the Pseudo-BIG Win flag to ON. As mentioned above, the Pseudo-BIG Win flag is a flag indicating that the Pseudo-BIG has been won. Furthermore, if the pseudo-bonus lottery at the start of the consecutive win challenge results in a "pseudo-BIG (ED)" (i.e., a pseudo-BIG (ED) is won), the main CPU 101 sets the pseudo-BIG (ED) flag to ON. As described above, when the pseudo-BIG (ED) flag is set to ON, the game is controlled to enter pseudo-BIG again when the termination conditions for pseudo-BIG are met, and this causes the pseudo-BIG to continue until the advantageous period ends.

After executing the process in step S4522, the main CPU 101 executes the process of drawing the number of games played at the start of the consecutive win challenge (step S4523). In this process, the main CPU 101 refers to the consecutive win challenge start number of games drawing table (see Figure 158) and performs a drawing based on random values to determine one of "1", "2", "3", or "4" as the result of the consecutive win challenge start number of games drawing (number of consecutive win challenge games).

In the game count lottery table at the start of the Consecutive Win Challenge shown in Figure 158, for each result of the pseudo-bonus lottery at the start of the Consecutive Win Challenge (see step S4522) ("Non-Winning," "Promotion Chance," "Pseudo-BIG," and "Pseudo-BIG (ED)"), a lottery value corresponding to the result of the game count lottery at the start of the Consecutive Win Challenge ("1," "2," "3," and "4") is defined. The probability of each result of the game count lottery at the start of the Consecutive Win Challenge being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

As a result, if the pseudo-bonus lottery at the start of the Consecutive Win Challenge is "Not a Winner," the result of the game count lottery at the start of the Consecutive Win Challenge (Number of Consecutive Win Challenge Games) will be "3" with a probability of 256/256. Furthermore, if the pseudo-bonus lottery at the start of the Consecutive Win Challenge is "Promotion Chance," "Pseudo-BIG," or "Pseudo-BIG (ED)," the result of the game count lottery at the start of the Consecutive Win Challenge (Number of Consecutive Win Challenge Games) will be "3" with a probability of 192/256, and "4" with a probability of 64/256.

After executing the process in step S4523, the main CPU 101 sets the number of consecutive challenge games determined in step S4523 into the consecutive challenge game counter (step S4524). The value of the consecutive challenge game counter indicates the remaining number of unit games that can be played in the consecutive challenge and is stored in the main RAM 103. As described later, the value of the consecutive challenge game counter is decremented by 1 each time a unit game is played.

If it is determined in step S4521 that it is not the start of the consecutive win challenge, or after the processing in step S4524, the main CPU 101 executes the consecutive win challenge lottery process (step S4525). In this process, the main CPU 101 refers to the consecutive win challenge lottery table (see Figure 159) and performs a lottery based on the payout flags (see Figure 92) and random values in the payout flag group 2, thereby determining one of the following results from the consecutive win challenge lottery: "No Win," "Chance for Upgrade," "Pseudo-BIG," and "Pseudo-BIG (ED)."

In the lottery table during the Consecutive Win Challenge shown in Figure 159, for each payout flag in Payout Flag Group 2 ("Other," "Weak Rare Role," "Diagonal Watermelon," "Winning Combination," and "Winning Combination BB"), a lottery value corresponding to the result of the Consecutive Win Challenge lottery ("Non-Winning," "Upgrade Chance," "Pseudo-BIG," and "Pseudo-BIG (ED)") is defined. The probability of each result of the Consecutive Win Challenge lottery being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)."

As a result, if the payout flag in payout flag group 2 is "Other," the result of the lottery during the consecutive win challenge will be "Non-Winning" with a probability of 256/256. Also, if the payout flag in payout flag group 2 is "Weak Rare Role," the result of the lottery during the consecutive win challenge will be "Promotion Chance" with a probability of 256/256. Furthermore, if the payout flag in payout flag group 2 is "Diagonal Watermelon" or "Reach Symbol," the result of the lottery during the consecutive win challenge will be "Pseudo-BIG" with a probability of 256/256. Also, if the payout flag in payout flag group 2 is "Reach Symbol BB," the result of the lottery during the consecutive win challenge will be "Pseudo-BIG" with a probability of 255/256, and "Pseudo-BIG (ED)" with a probability of 1/256.

If the result of the lottery during the Consecutive Win Challenge is "Promotion Chance" (winning the Promotion Chance), the main CPU 101 sets the Promotion Chance Win flag to ON. As mentioned above, the Promotion Chance Win flag is a flag that indicates that the Promotion Chance has been won. Also, if the result of the lottery during the Consecutive Win Challenge is "Pseudo BIG" or "Pseudo BIG (ED)" (winning the Pseudo BIG), the main CPU 101 sets the Pseudo BIG Win flag to ON. As mentioned above, the Pseudo BIG Win flag is a flag that indicates that the Pseudo BIG has been won. Also, if the result of the lottery during the Consecutive Win Challenge is "Pseudo BIG (ED)" (winning the Pseudo BIG (ED)), the main CPU 101 sets the Pseudo BIG (ED) flag to ON. As mentioned above, when the pseudo-BIG (ED) flag is set to ON, the system will re-enter pseudo-BIG mode when the termination conditions for pseudo-BIG are met, causing the pseudo-BIG to continue until the advantageous period ends.

Furthermore, if the promotion chance winning flag is set to ON, and the result of the lottery during the consecutive win challenge is determined to be "Pseudo BIG" or "Pseudo BIG (ED)" (a Pseudo BIG is won), the main CPU 101 discards the promotion chance winning flag (sets it to OFF). Also, if the result determined in the current lottery during the consecutive win challenge is less favorable than the results determined in previous lotteries during the consecutive win challenge or the pseudo bonus lottery at the start of the consecutive win challenge (see step S4522), the main CPU 101 discards the result determined in the current lottery during the consecutive win challenge.

After executing the process in step S4525, the main CPU 101 determines whether the value of the consecutive win challenge game counter (see step S4524) is 1 (step S4526). A value of 1 in the consecutive win challenge game counter means that the current game is the final game of the consecutive win challenge. If the main CPU 101 determines that the value of the consecutive win challenge game counter is not 1, it terminates this subroutine.

On the other hand, if the value of the consecutive win challenge game counter is determined to be 1, the main CPU 101 determines whether the promotion chance win flag or the pseudo-BIG win flag is set to ON (step S4527). If it determines that the promotion chance win flag or the pseudo-BIG win flag is set to ON, the main CPU 101 terminates this subroutine.

On the other hand, if the main CPU 101 determines that neither the promotion chance winning flag nor the pseudo-BIG winning flag is set to "on," it executes the normal transition lottery process at the end of the continuous win challenge (step S4528). In this process, the main CPU 101 refers to the normal transition lottery table at the end of the continuous win challenge (see Figure 160) and performs a lottery based on random values to determine either "non-advantageous section" or "continuous win preparation" as the result of the normal transition lottery at the end of the continuous win challenge.

In the normal transition lottery table at the end of the Consecutive Win Challenge shown in Figure 160, lottery values corresponding to the results of the normal transition lottery at the end of the Consecutive Win Challenge ("Non-Advantageous Section" and "Consecutive Win Preparation") are defined for both "Other" and "Pseudo Bonus → Consecutive Win Challenge". "Pseudo Bonus → Consecutive Win Challenge" indicates that the current state of the payout from which the transition to the Consecutive Win Challenge originated is a pseudo bonus (pseudo BIG or pseudo REG). "Other" indicates that the current state of the payout from which the transition to the Consecutive Win Challenge originated is a payout state other than a pseudo bonus (pseudo BIG or pseudo REG). The probability of each result of the normal transition lottery at the end of the Consecutive Win Challenge being determined can be expressed as "the lottery value defined for that result / the total number of possible random values that can be extracted (random denominator: 256)".

As a result, if the current payout state from which the game transitions to the Consecutive Win Challenge originates is a pseudo-bonus (pseudo-BIG or pseudo-REG), the "non-advantageous section" is determined with a probability of 256/256 as a result of the normal transition lottery at the end of the Consecutive Win Challenge. Furthermore, if the current payout state from which the game transitions to the Consecutive Win Challenge originates is a payout state other than a pseudo-bonus (pseudo-BIG or pseudo-REG), the "Consecutive Win Preparation" is determined with a probability of 256/256 as a result of the normal transition lottery at the end of the Consecutive Win Challenge.

In other words, when transitioning from a pseudo-BIG or pseudo-REG to a continuous win challenge (see step S4447 in Figure 148, step S4466 in Figure 150, and step S4507 in Figure 155), the result of the normal transition lottery at the end of the continuous win challenge, which takes place in the final game of the continuous win challenge, will always be determined as "non-advantageous section." Furthermore, when transitioning from a non-advantageous section or continuous win preparation to a continuous win challenge (see step S4003 in Figure 93 and step S4027 in Figure 95), the result of the normal transition lottery at the end of the continuous win challenge, which takes place in the final game of the continuous win challenge, will always be determined as "continuous win preparation."

If the result of the normal transition lottery at the end of the Consecutive Win Challenge is "Non-Advantageous Period," the main CPU 101 sets the Non-Advantageous Period Transition Reservation Flag to ON. This flag indicates that the start of the Non-Advantageous Period is reserved. Furthermore, if the result of the normal transition lottery at the end of the Consecutive Win Challenge is "Consecutive Win Preparation," the main CPU 101 sets the Consecutive Win Preparation Transition Reservation Flag to ON. This flag indicates that the start of Consecutive Win Preparation is reserved.

After executing the process in step S4528, the main CPU 101 terminates this subroutine.

<Counter management process for consecutive win challenge>
Figure 161 is a flowchart showing the counter management process for the consecutive win challenge performed in the main control circuit.

The counter management process for the continuous win challenge shown in Figure 161 is performed in the main control circuit 100 at step S15 (game end state control process) of Figure 23 (main processing) when the current payout state is a continuous win challenge (see Figure 88). The main CPU 101 can recognize the current payout state by referring to the payout state flag storage area (see Figure 20) in the main RAM 103.

In the counter management process for the consecutive win challenge, first, the main CPU 101 subtracts 1 from the value of the consecutive win challenge game count counter (see step S4524 in Figure 156) (step S4541). Then, the main CPU 101 determines whether the value of the consecutive win challenge game count counter is 0 or not (step S4542). If it determines that the value of the consecutive win challenge game count counter is not 0, the main CPU 101 terminates this subroutine.

On the other hand, if the value of the consecutive win challenge game counter is determined to be 0, the main CPU 101 determines whether the pseudo-BIG win flag is set to ON (step S4543). As described above, the pseudo-BIG win flag is a flag indicating that a pseudo-BIG win has been achieved (see steps S4522 and S4525 in Figure 156).

If the main CPU 101 determines that the pseudo-BIG win flag is set to ON, it sets the pseudo-BIG transition flag to ON (step S4544). As described above, the pseudo-BIG transition flag indicates that it is time to start a pseudo-BIG. In the game start state control processing for the next game after the pseudo-BIG transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This triggers a transition to a pseudo-BIG (see transition conditions (P) in Figures 89 and 90).

On the other hand, if the main CPU 101 determines that the pseudo-BIG win flag is not set to ON, it determines whether the promotion chance win flag is set to ON or not (step S4545). As described above, the promotion chance win flag is a flag indicating that a promotion chance has been won (see steps S4522 and S4525 in Figure 156).

If the main CPU 101 determines that the promotion chance winning flag is set to ON, it sets the promotion chance transition flag to ON (step S4546). As described above, the promotion chance transition flag indicates that it is time to start the promotion chance. In the game start state control processing for the unit game following the unit game in which the promotion chance transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to the promotion chance (see transition condition (O) in Figures 89 and 90).

On the other hand, if the main CPU 101 determines that the promotion chance winning flag is not set to ON, it determines whether the continuous win preparation transition reservation flag (see step S4528 in Figure 156) is set to ON (step S4547). If it determines that the continuous win preparation transition reservation flag is set to ON, the main CPU 101 sets the continuous win preparation transition flag to ON (step S4548). As described above, the continuous win preparation transition flag is a flag that indicates the timing to start continuous win preparation. In the game start state control processing for the unit game following the unit game in which the continuous win preparation transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This transitions to continuous win preparation (see transition conditions (R) in Figures 89 and 90).

If the result of step S4547 is "NO", it means that the non-advantageous section transition reservation flag (see step S4528 in Figure 156) is set to ON. If step S4547 determines that the continuous win preparation transition reservation flag is not set to ON, the main CPU 101 sets the non-advantageous section transition flag to ON (step S4549). As described above, the non-advantageous section transition flag is a flag that indicates the timing to start the non-advantageous section. In the game start state control processing for the unit game following the unit game in which the non-advantageous section transition flag was set to ON (see step S6 in Figure 23), the main CPU 101 updates the payout state flag storage area (see Figure 20). This causes a transition to the non-advantageous section (see transition condition (Q) in Figures 89 and 90).

After executing steps S4544, S4546, S4548, or S4549, the main CPU 101 terminates this subroutine.

As explained above, the Consecutive Win Challenge can be entered when a pseudo-BIG or pseudo-REG ends, while it offers a relatively high probability of winning a pseudo-BIG or upgrade chance. Therefore, if you transition from a pseudo-BIG or pseudo-REG to the Consecutive Win Challenge, you will continue playing with the goal of transitioning back to a pseudo-BIG or pseudo-REG (achieving a consecutive win).

Furthermore, the above explanation assumed that in the final game of the Consecutive Win Challenge, after the Consecutive Win Challenge In-Game Lottery (see step S4525 in Figure 156), the Consecutive Win Challenge End-of-Game Normal Transition Lottery (see step S4528 in Figure 156) is performed. However, as will be explained below, in the final game of the Consecutive Win Challenge, the Consecutive Win Challenge In-Game Lottery may be performed after the Consecutive Win Challenge End-of-Game Normal Transition Lottery is performed. In this case, after the Consecutive Win Challenge End-of-Game Normal Transition Lottery sets the Consecutive Win Preparation Transition Reservation Flag or the Non-Advantageous Section Transition Reservation Flag to ON, the Consecutive Win Challenge In-Game Lottery may set the Pseudo-BIG Win Flag or the Promotion Chance Win Flag to ON. In this case, the game will transition to a pseudo-BIG or promotion chance (see steps S4544 and S4546 in Figure 161). When step S4544 or step S4546 is executed, the continuous win preparation transition reservation flag or the non-advantageous section transition reservation flag may be set to OFF (discarded).

[Modification of the fourth embodiment (penalty)]
The above describes the gameplay of the pachislo machine 1 according to the fourth embodiment. This gameplay can be created by performing the processes described with reference to Figures 93 to 161, but the processes for realizing this gameplay are not limited to the above examples. In the modified examples described below, a penalty is incurred when a player plays using a specific gameplay method.

Regarding penalties, the first embodiment described a case where a specific type of payout is provided, where the number of medals awarded varies depending on the player's stopping operation (this may be the timing of the stopping operation, the order of pressing the buttons, or a combination thereof). (For example, if the stopping operation is appropriate (correct), eight medals are paid out; if it is inappropriate (incorrect), one medal is paid out or no medal is paid out.)

Furthermore, it was explained that if a specific winning combination is achieved in a particular game state, and eight coins are paid out, a decision is not made regarding whether or not to change the degree of advantage in transitioning to the AT state in the current game (this may include a decision on whether or not to directly transition to the AT state, or whether or not to directly extend the game period of the AT state; hereinafter referred to as "advantageous decision"). On the other hand, if eight coins are not paid out, it is possible to make the advantageous decision in the current game. In this specification, this restriction on making the advantageous decision is referred to as a "penalty."

As an example of such penalties, a modified version of the first gaming machine (see Figures 68 to 80) was described, which employs a specification where, when a predetermined role (e.g., a sequenced bell) is determined as a winning role, the AT-related processing is made favorable if a specific stopping operation (e.g., left first stop) is performed, and unfavorable if the stopping operation is not performed in that specific manner. The matters described as a modified version of the first gaming machine can also be applied to the pachislo machine 1 according to this embodiment, as long as the basic gameplay of the pachislo machine 1 according to this embodiment is not impaired.

In this embodiment, the push-order bell, similar to the push-order bell in the modified version of the first gaming machine, displays different combinations of symbols along the active line depending on the order of stopping operations (press order) for each reel 3L, 3C, and 3R. As a result, the number of medals dispensed also differs. Furthermore, this push-order bell constitutes the biased bell described above.

As a result, similar to the modified version of the first gaming machine, in a unit game where a push-order bell (biased bell) is determined as an internal winning combination, the expected number of medals paid out when a specific stopping operation (e.g., left first stop) is performed is smaller than the expected number of medals paid out when the stopping operation is not performed in that specific manner. Furthermore, regardless of whether a push-order bell (biased bell) is determined as an internal winning combination, in a single unit game, the expected number of medals paid out when a specific stopping operation (e.g., left first stop) is performed is smaller than the expected number of medals paid out when the stopping operation is not performed in that specific manner. Also, even in the non-AT state as a whole, the expected number of medals paid out when a specific stopping operation (e.g., left first stop) is performed in all unit games during the non-AT state is smaller than the expected number of medals paid out when the stopping operation is not performed in that specific manner in all unit games during the non-AT state.

The following describes a case where, similar to the modification of the first gaming machine, the AT-related processing is made favorable when a stop operation is performed in a specific manner (for example, the left first stop), and unfavorable when the stop operation is not performed in that specific manner.

Furthermore, "AT-related processing" includes not only the process of directly deciding to transition to the AT state (performing an AT transition lottery), but also the process of deciding to transition to the CZ state (performing a CZ transition lottery), the process of setting the period during which the CZ state can continue (performing a CZ period lottery), the process of deciding to transition to a relatively advantageous AT state among multiple types of AT states (performing an AT advantage lottery), and the model referenced in the AT transition lottery, CZ transition lottery, or AT advantage lottery. This concept includes processes for setting a reference mode (performing a reference mode lottery), shortening the period during which a relatively advantageous state (reference mode) can be maintained, determining the state (reference mode) to transition to after the relatively advantageous state (reference mode) ends (performing a lottery for the transition destination after a fall), processes related to the period until transitioning to the AT state or CZ state, processes related to the conditions for conducting the AT transition lottery or CZ transition lottery, and processes for performing an animation that notifies the transition to the AT state (AT confirmation animation).

AT states include pseudo-BIG (a relatively advantageous AT state) and pseudo-REG (a relatively disadvantageous AT state). The CZ state is a state where transitioning to an AT state is easier than during normal play (advantageous period). Normal play (advantageous period) includes the normal stage, while CZ states include Chance Stage A, Chance Stage B, and Consecutive Win Challenge. The Promotion Chance is a state where transitioning to an AT state is guaranteed, and this state may also be included in the CZ state.

Examples of the "AT transition lottery" mentioned above include the freeze lottery during the normal stage (see step S4081 in Figure 103), the long freeze lottery during the normal stage (see step S4102 in Figure 108), the lottery for the type of winning combination upon reaching the ceiling (see step S4144 in Figure 112), the pseudo-BIG/upgrade chance lottery during the chance stage (see step S4306 in Figure 126), the pseudo-bonus lottery at the start of the consecutive win challenge (see step S4522 in Figure 156), and the lottery during the consecutive win challenge (see step S4525 in Figure 156). In this example, fundamentally different AT transition lotteries are assumed to be performed during normal play (advantageous section) and the CZ state, but the same AT transition lottery may also be performed.

Examples of the "CZ transition lottery" mentioned above include the consecutive win challenge transition lottery (see step S4027 in Figure 95), the transition flag/winning flag lottery during the normal stage (see step S4082 in Figure 103), and the point arrival lottery (see step S4167 in Figure 114). The transition flag/winning flag lottery during the normal stage and the point arrival lottery have some results that determine the transition to the AT state, thus also serving as the AT transition lottery.

Examples of the "CZ period lottery" mentioned above include the lottery for the guaranteed number of games in the Chance Stage at the start of the Chance Stage (see step S4303 in Figure 126), the lottery for adding games during the Chance Stage (see step S4308 in Figure 126), and the lottery for the number of games at the start of the Consecutive Win Challenge (see step S4523 in Figure 156). The CZ period lottery includes a lottery for determining the initial value of the CZ period and a lottery for extending the CZ period.

Examples of the "AT Advantage Draw" mentioned above include the draw at the start of the upgrade chance (see step S4284 in Figure 124), the draw for the long freeze at the start of the upgrade (see step S4363 in Figure 133), the draw during the upgrade chance (see step S4366 in Figure 133), and the draw for the pseudo-BIG upgrade after a specified number of games have been played (see step S4369 in Figure 133). The AT Advantage Draw can be performed when it is confirmed that the player will transition to the AT state.

Examples of the "reference mode lottery" mentioned above include the consecutive win preparation mode lottery (see steps S4024 and S4026 in Figure 95), the consecutive win challenge transition confirmation lottery (see step S4029 in Figure 95), the normal transition mode lottery (see step S4061 in Figure 100), the point mode lottery (see steps S4063 in Figure 100, S4166 in Figure 114, and S4283 in Figure 124), the normal prescribed number of games high probability 1 transition lottery (see step S4123 in Figure 109), the high probability 2 transition lottery (see steps S4262, S4265, and S4268 in Figure 122), and the promotion chance mode lottery (see step S4364 in Figure 133). The reference mode lottery includes a lottery to determine the initial value of the reference mode, and a lottery to transition between reference modes.

The "processes for shortening the period during which a relatively advantageous state (reference mode) can be maintained" include processes for deciding to transition from a relatively advantageous state (reference mode) to an unfavorable state (reference mode) (performing a fall-out lottery), and processes for reducing the remaining period during which a relatively advantageous state (reference mode) can be maintained. Examples of fall-out lotteries include a fall-out lottery for continuous win preparation (see step S4031 in Figure 95), a fall-out lottery for high probability 2 (see step S4272 in Figure 122), and so on. Processes to reduce the remaining period during which a relatively favorable state (reference mode) can be maintained include subtracting values from the following: the consecutive win preparation guarantee game count counter (see step S4023 in Figure 95), the high probability 2 guarantee game count counter (see steps S4263, S4266, and S4269 in Figure 122), the chance stage guarantee game count counter (see step S4304 in Figure 126), the promotion chance game count counter (see step S4362 in Figure 133), and the consecutive win challenge game count counter (see step S4524 in Figure 156). An example of a post-downgrade transition lottery is the normal transition lottery at the end of the consecutive win challenge (see step S4528 in Figure 156).

The "processing related to the period until transitioning to AT state or CZ state" mentioned above includes processing to determine the period until transitioning to AT state or CZ state (performing a pre-announcement period lottery), and processing to reduce the remaining period until transitioning to AT state or CZ state. Examples of the pre-announcement period lottery include the lottery for the number of pre-announcement games when a pseudo-BIG or upgrade chance is won during the normal stage (see steps S4202, S4205, and S4207 in Figure 118), the lottery for the number of pre-announcement games when a chance stage is won during the normal stage (see steps S4222 and S4224 in Figure 119), and the lottery for the number of pre-announcement games when a flag is won during the chance stage (see step S4324 in Figure 130). Examples of processes to reduce the remaining time until transitioning to the AT state or CZ state include subtracting the value of the pre-announcement game counter (see steps S4203, S4206, and S4208 in Figure 118, steps S4223 and S4225 in Figure 119, and step S4325 in Figure 130).

The "processing related to the conditions for conducting the AT transition lottery or CZ transition lottery" described above includes, when the condition is to win a predetermined lottery, the processing for conducting the predetermined lottery; and when the condition is that a predetermined variable reaches a predetermined value, the processing for setting the predetermined value (conducting a condition setting lottery) and the processing for updating the predetermined variable. Examples of the predetermined lottery include the ceiling preparation flag set lottery (see step S4142 in Figure 112). Examples of the condition setting lottery include the normal transition ceiling lottery (see step S4062 in Figure 100). Examples of the processing for updating the predetermined variable include the processing for adding the value of the normal prescribed number of games counter (see step S4121 in Figure 109) and the processing for adding the value of normal points (see step S4163 in Figure 114).

The above AT confirmation animation is an animation that is performed only when it is decided that the player will transition to the AT state. It may announce the fact that the player will transition to the AT state, or, if there are multiple types of AT states, it may announce the type of AT state to transition to (the result of the above AT advantage lottery). The above-mentioned lock animation can be used as the AT confirmation animation. This lock animation may be a lock animation accompanied by a simulated game, a lock animation accompanied by a reel animation, or a lock animation (freeze) without a reel animation or simulated game. Examples of processes for performing a simulated game as an AT confirmation animation include the next simulated game lottery process (see step S4367 in Figure 133) and the current simulated game lottery process (see step S4370 in Figure 133). Examples of processes for triggering a freeze as an AT (Attack Time) confirmation effect include a freeze lottery process during the normal stage (see step S4081 in Figure 103), a long freeze lottery process during normal play (see step S4102 in Figure 108), and a long freeze lottery process upon entry (see step S4363 in Figure 133).

The above examples of AT-related processing show processes performed in states other than AT state. Of course, processes performed in AT state are also included in AT-related processing. Furthermore, processes performed in non-advantageous periods, as well as those performed in advantageous periods, can be considered AT-related processing, provided they fall under the categories described above.

Examples of AT-related processing performed in AT mode include the consecutive win challenge lottery process at the start of a pseudo-BIG (see step S4408 in Figure 144), the 1G consecutive win lottery process (see step S4384 in Figure 143 and step S4484 in Figure 152), the consecutive win challenge lottery process at the end of the final second pseudo-BIG (see step S4464 in Figure 150), and the lottery process when the number of established replays is insufficient (see step S4443 in Figure 148). Examples of AT-related processing performed in a non-advantageous section include the advantageous section transition lottery process (see, for example, step S4001 in Figure 93), and the advantageous section transition lottery process (see step S4003 in Figure 93).

<Counter List>
Figure 162 is a diagram showing a list of counters managed by the main control circuit.

Figure 162 shows the names, clear timings, addition/subtraction timings, numerical ranges, and whether or not data is transmitted to the sub-control circuit 200 for each counter managed by the main control circuit 100. In the figure, "LEV" refers to the time when the start lever 7 is operated (when the game start state control processing (see step S6 in Figure 23) is performed), "3OFF" refers to the time when all reels 3L, 3C, and 3R have stopped rotating (when the game end state control processing (see step S15 in Figure 23) is performed), and "Special Prize Activated" refers to the bonus state (the 3BB game state shown in Figure 81). In this example, AT-related processing is not performed in the bonus state, but AT-related processing may be performed in the bonus state as well.

The Consecutive Win Preparation Guaranteed Game Count Counter manages the remaining number of unit games that guarantee a stay in the Consecutive Win Preparation state (see steps S4023 and S4025 in Figure 95). The value of the Consecutive Win Preparation Guaranteed Game Count Counter is deducted by 1 for each unit game in the Consecutive Win Preparation state (except when a special prize is activated), and is reset when transitioning to a payout state other than Consecutive Win Preparation. Furthermore, a Consecutive Win Preparation fallout lottery (see step S4031 in Figure 95) will be held from the unit game following the unit game in which the Consecutive Win Preparation Guaranteed Game Count Counter value becomes 0.

The payout-based advantageous section game count counter is a counter that manages the number of unit games played within the advantageous section (see Figure 153). The value of the payout-based advantageous section game count counter is incremented by 1 for each unit game played within the advantageous section (excluding when a special prize is active), and is reset when transitioning to a non-advantageous section.

The standard game counter is a counter that manages the number of unit games played in the normal payout state (normal stage, chance stage A, and chance stage B) (see step S4121 in Figure 109). The value of the standard game counter is incremented by 1 in "LEV" (at the start of the game) for each unit game played in the normal payout state (excluding when a special prize is active), and is reset when transitioning to a payout state other than the normal payout state.

The pre-announcement game count counter is a counter that manages the remaining number of unit games controlled in the pre-announcement state (see steps S4203, S4206, and S4208 in Figure 118, steps S4223 and S4225 in Figure 119, and step S4325 in Figure 130). The value of the pre-announcement game count counter is deducted by 1 for each unit game in the pre-announcement state (excluding when a special prize is activated) ("3 OFF" at the end of the game), and is cleared when the payout state changes.

The normal point counter is a counter that manages the points acquired through the point acquisition lottery (see step S4163 in Figure 114). The point acquisition lottery is conducted during each unit of gameplay in the normal stage, excluding when a special prize is active. The value of the normal point counter is used in the point acquisition lottery (see step S4167 in Figure 114), and is deducted by 100 when the point acquisition lottery is conducted ("LEV" (start of game)). Furthermore, the value of the normal point counter is cleared when transitioning to a payout state other than the normal payout state (normal stage, chance stage A, and chance stage B).

The point count counter is a counter that manages the number of times the normal point value reaches 100 in the normal payout state (normal stage, chance stage A, and chance stage B) (see step S4165 in Figure 114). The value of the point count counter is incremented by 1 after the point acquisition lottery ("LEV" (at the start of the game)) if the normal point value is 100 or more at the time the point acquisition lottery (see step S4163 in Figure 114) is performed, in the normal stage (excluding when a special prize is activated), when high probability mode 3 is not set, and it is not a pre-announcement state. The value of the point count counter is also cleared when transitioning to a payout state other than the normal payout state.

The Cherry Counter is a counter that manages the number of times "F_Cherry" is determined as an internal winning combination during the normal stage (see step S4162 in Figure 114). The Cherry Counter value is incremented by 1 each time "F_Cherry" is determined as an internal winning combination during the normal stage (excluding when a special prize is active) ("LEV" (at the start of the game)). The Cherry Counter value is also cleared when transitioning to a payout state other than the normal payout state (Normal Stage, Chance Stage A, and Chance Stage B).

The Chance Stage A Win Count Counter is a counter that manages the number of times a win has occurred in Chance Stage A (see step S4082 in Figure 103 and step S4167 in Figure 114). The value of the Chance Stage A Win Count Counter is incremented by 1 when a win occurs in Chance Stage A during a normal stage transition flag/win flag draw (step S4082 in Figure 103) or a point reach draw (see step S4167 in Figure 114) ("LEV" (at the start of the game)). Furthermore, the value of the Chance Stage A Win Count Counter is decremented by 1 when transitioning to Chance Stage A, and cleared when transitioning to a payout state other than the normal payout state (normal stage, Chance Stage A, and Chance Stage B).

The "Point Reached Chance Stage A Win Count Counter" is a counter that manages the number of times a player has won Chance Stage A in the point reach lottery (see step S4167 in Figure 114). The value of the Point Reached Chance Stage A Win Count Counter is incremented by 1 when a player wins Chance Stage A in the point reach lottery conducted during a normal stage (excluding when a special prize is active) ("LEV" (at the start of the game)). Furthermore, the value of the Point Reached Chance Stage A Win Count Counter is decremented by 1 when transitioning to Chance Stage A, and cleared when transitioning to a payout state other than the normal payout state (normal stage, Chance Stage A, and Chance Stage B).

The Chance Stage B win counter is a counter that manages the number of times a win has occurred in Chance Stage B (see step S4082 in Figure 103 and step S4167 in Figure 114). The value of the Chance Stage B win counter is incremented by 1 when a win occurs in Chance Stage B during a normal stage transition flag/win flag draw (step S4082 in Figure 103) or a point reach draw (see step S4167 in Figure 114) ("LEV" (at the start of the game)). Furthermore, the value of the Chance Stage B win counter is decremented by 1 when transitioning to Chance Stage B, and is cleared when transitioning to a payout state other than the normal payout state (normal stage, Chance Stage A, and Chance Stage B).

The "Point Reached Chance Stage B Win Count Counter" is a counter that manages the number of times a player has won Chance Stage B in the point reach lottery (see step S4167 in Figure 114). The value of the Point Reached Chance Stage B Win Count Counter is incremented by 1 when a player wins Chance Stage B in the point reach lottery conducted during a normal stage (excluding when a special prize is active) ("LEV" (at the start of the game)). Furthermore, the value of the Point Reached Chance Stage B Win Count Counter is decremented by 1 when transitioning to Chance Stage B, and is cleared when transitioning to a payout state other than the normal payout state (normal stage, Chance Stage A, and Chance Stage B).

The Chance Stage Guaranteed Game Count Counter manages the remaining number of unit games in which a stay in Chance Stage A or Chance Stage B is guaranteed (see step S4304 in Figure 126). The value of the Chance Stage Guaranteed Game Count Counter is deducted by 1 for each unit game in Chance Stage A or Chance Stage B (except when a special prize is active), and is reset when transitioning to a payout state other than the normal payout state (normal stage, Chance Stage A, and Chance Stage B). Furthermore, the game transitions to the normal stage in the unit game following the unit game in which the Chance Stage Guaranteed Game Count Counter value becomes 0.

The High Probability 1 game count counter manages the remaining number of unit games that can be played while in High Probability 1 mode. It is set to "50" when High Probability 1 mode is selected in the normal prescribed number of game games transition lottery (see step S4123 in Figure 109). The value of the High Probability 1 game count counter is deducted by 1 ("3 OFF" at the end of the game) for each unit game played while High Probability 1 mode is set, except during special prize activation (Normal Stage, Chance Stage A, and Chance Stage B). It is reset when transitioning to a payout state other than the normal payout state (Normal Stage, Chance Stage A, and Chance Stage B).

The High Probability 2 Guaranteed Games Counter is a counter that manages the remaining number of unit games in which staying in High Probability 2 is guaranteed (see steps S4263, S4266, and S4269 in Figure 122). The value of the High Probability 2 Guaranteed Games Counter is deducted by 1 for each unit game played while High Probability 2 is set (except during special prize activation), and is reset when transitioning to a payout state other than the normal stage. Furthermore, a High Probability 2 fallout lottery (see step S4272 in Figure 122) will be held from the unit game following the unit game in which the High Probability 2 Guaranteed Games Counter value reaches 0.

The first bell navigation count counter manages the remaining number of bell navigations that can be performed in the first pseudo-BIG (see step S4404 in Figure 144). The value of the first bell navigation count counter is deducted by 1 for every 3 bell navigations performed in the first pseudo-BIG (at the end of the game), and is cleared when the pseudo-BIG ends.

The remaining normal replay payout counter is a counter that manages the remaining number of times a player can transition from the first pseudo-BIG to the second pseudo-BIG (see step S4405 in Figure 144). In the above explanation, the value of the remaining normal replay payout counter was deducted by 1 when transitioning from the first pseudo-BIG to the second pseudo-BIG (when a normal replay was awarded in the first pseudo-BIG) (see step S4425 in Figure 147). However, here, the value will be deducted by 1 when the second pseudo-BIG ends after transitioning from the first pseudo-BIG ("3 OFF" (end of game)), that is, when the judgment result in step S4434 in Figure 147 is "YES". Furthermore, the value of the remaining normal replay payout counter is cleared when the pseudo-BIG ends.

The second bell navigation count counter manages the remaining number of bell navigations that can be performed during the second pseudo-BIG or pseudo-REG. It is set to "9" when the second pseudo-BIG starts and to "5" when the pseudo-REG starts (see step S4427 in Figure 147 and step S4482 in Figure 152). The value of the second bell navigation count counter is deducted by 1 for every unit game in which bell navigation is performed during the second pseudo-BIG or pseudo-REG (at the end of the game), and is cleared when the pseudo-BIG or pseudo-REG ends.

The pseudo-BIG stock counter is a counter that manages the remaining number of times a pseudo-BIG can be controlled when the termination conditions for a pseudo-BIG or pseudo-REG are met (see steps S4441 and S4444 in Figure 148, and step S4461 in Figure 150). In the above explanation, whether or not to control to a pseudo-BIG when the termination conditions for a pseudo-REG are met is managed by the pseudo-BIG winning flag (see step S4504 in Figure 155), but here, in the case of pseudo-REG as well, it is managed by the pseudo-BIG stock counter, similar to pseudo-BIG. The value of the pseudo-BIG stock counter is increased by 1 when a pseudo-BIG is won during a 1G consecutive draw (see step S4384 in Figure 143 and step S4484 in Figure 152) ("LEV" (at the start of the game)), and decreased by 1 when a pseudo-BIG or pseudo-REG ends and a new pseudo-BIG is initiated. Furthermore, the value of the pseudo-BIG stock counter is cleared when transitioning to a pseudo-BIG (ED) (Ending BB).

In the above explanation, it was assumed that the continuation of the pseudo-BIG (ED) until the end of the advantageous period is controlled using the pseudo-BIG (ED) flag (see step S4406 in Figure 144). However, here, it is assumed that the pseudo-BIG (ED) is managed as a separate payout state from the pseudo-BIG, in the payout state flag storage area (see Figure 20). Therefore, if a pseudo-BIG (ED) is won in a 1G consecutive draw (see step S4384 in Figure 143 and step S4484 in Figure 152), the game will transition to the pseudo-BIG (ED) payout state. The pseudo-BIG (ED) may be a payout state in which the pseudo-BIG continues until the end of the advantageous period, or it may be the same payout state as a normal pseudo-BIG, except that 2 is added to the pseudo-BIG stock counter value at the start of the pseudo-BIG.

The first pseudo-BIG replay counter is a counter that manages the number of times a replay ("F_Replay A" or "F_Replay B") is determined as an internal winning combination during the first pseudo-BIG (see step S4423 in Figure 147). The value of the first pseudo-BIG replay counter is incremented by 1 for every 3 games in which a replay is determined as an internal winning combination during the first pseudo-BIG (at the end of the game). Furthermore, the value of the first pseudo-BIG replay counter is cleared when the pseudo-BIG or pseudo-REG ends, or when transitioning to the pseudo-BIG (ED).

The Normal Mode Counter is a counter that manages the Normal Mode. When the game transitions from a payout state other than the Normal Payout State (Normal Stage, Chance Stage A, and Chance Stage B) to the Normal Payout State ("LEV" (at the start of the game)), the value determined in the Normal Mode transition lottery (see step S4061 in Figure 100) is set. The value of the Normal Mode Counter is cleared when the game transitions to a payout state other than the Normal Payout State or a promotion chance state.

The Point Mode Counter is a counter that manages the Point Mode. It stores a value determined during the Point Mode lottery (see step S4063 in Figure 100, step S4166 in Figure 114, and step S4283 in Figure 124) which takes place during the normal payout state (Normal Stage, Chance Stage A, and Chance Stage B) ("LEV" (at the start of the game)). The value of the Point Mode Counter is cleared when transitioning to a payout state other than the normal payout state or the promotion chance state.

The Consecutive Win Count Counter is a counter that manages the number of times a Consecutive Win Challenge has been won during the non-advantageous section or the Consecutive Win Preparation section. The value of the Consecutive Win Count Counter is incremented by 1 when a Consecutive Win Challenge is won during the advantageous section transition lottery (see step S4003 in Figure 93) or the Consecutive Win Challenge transition lottery (see step S4027 in Figure 95) ("LEV" (at the start of the game)). Furthermore, the value of the Consecutive Win Count Counter is cleared when transitioning to the normal payout state (normal stage, chance stage A, and chance stage B), and when a pseudo-bonus (pseudo-BIG, pseudo-BIG (ED), or pseudo-REG) ends.

<AT-related processing when lever is pulled>
Figure 163 is a flowchart showing the AT-related processing performed in the main control circuit when the lever is turned on.

The AT-related processing shown in Figure 163 when the lever is pressed is the processing performed in step S6 (game start state control processing) of Figure 23 (main processing) in the main control circuit 100.

In the AT-related processing when the lever is pressed, the main CPU 101 first executes processing that is not affected by the penalty (step S4601). In this processing, the main CPU 101 executes some of the AT-related processing described above and updates various information (counters, flags, etc.) based on the results of said AT-related processing.

The processes performed in step S4601 include processes that are disadvantageous to the player, processes for performing AT confirmation sequences, processes performed when a payout state begins (when the current unit of play is the first game of that payout state), and processes performed when a payout state ends (when the current unit of play is the final game of that payout state). Furthermore, AT-related processes performed during the AT state or non-advantageous period are also included in the processes performed in step S4601.

Examples of the "processes unfavorable to the player" mentioned above include the lottery process for ending the continuous win preparation state (see step S4031 in Figure 95) and the lottery process for ending the high probability 2 state (see step S4272 in Figure 122). The continuous win preparation state ending state lottery and the high probability 2 state ending state lottery are processes that "decide whether to transition from a relatively advantageous state (reference mode) to an unfavorable state (reference mode) (by performing a draw to end the state)."

The "processing for performing the AT confirmation effect" mentioned above includes, for example, the normal long freeze lottery process (see step S4102 in Figure 108) and the entry long freeze lottery process (see step S4363 in Figure 133). The normal long freeze lottery process and the entry long freeze lottery process are the "processing for performing a freeze as an AT confirmation effect" as described above. As described above, if the normal long freeze lottery process or the entry long freeze lottery is won in a single unit of gameplay, the execution of the long freeze is controlled by the main side effect control process at the start of the game in that unit of gameplay (see step S8 in Figure 23). As a result, the long freeze occurs before the rotation of each reel 3L, 3C, and 3R begins (before the first stop operation is performed).

Examples of the "processing performed when a payout state begins (when the current unit game is the first game of that payout state)" include the following: the continuous win preparation mode lottery process (see steps S4024 and S4026 in Figure 95), the normal transition mode lottery process (see step S4061 in Figure 100), the normal transition ceiling lottery process (see step S4062 in Figure 100), the point mode lottery process (see step S4063 in Figure 100), the chance stage guaranteed game count lottery process at the start of the chance stage (see step S4303 in Figure 126), the promotion chance mode lottery process (see step S4364 in Figure 133), the pseudo-bonus lottery process at the start of the continuous win challenge (see step S4522 in Figure 156), and the game count lottery process at the start of the continuous win challenge (see step S4523 in Figure 156).

Of these processes, the continuous win preparation mode lottery process, the normal transition mode lottery process, the point mode lottery process, and the promotion chance mode lottery process are "processes for setting the mode (reference mode) referenced in the AT transition lottery, CZ transition lottery, or AT advantage lottery (performing a reference mode lottery)" as described above. Note that the point mode lottery process is performed when the normal stage starts (see step S4063 in Figure 100), when the normal point value reaches 100 (see step S4166 in Figure 114), and when transitioning from the normal payout state to the promotion chance (see step S4283 in Figure 124). Here, only the point mode lottery process performed when the normal stage starts is targeted for processing in step S4601.

Furthermore, the lottery process for the guaranteed number of games at the start of the Chance Stage, and the lottery process for the number of games at the start of the Consecutive Win Challenge, are the processes described above for "setting the period during which the CZ state can be continued (CZ period) (performing a CZ period lottery)." Also, the ceiling lottery process at the start of the normal transition is the process described above for "conditions related to the AT transition lottery or CZ transition lottery." Finally, the pseudo-bonus lottery process at the start of the Consecutive Win Challenge is the process described above for "directly deciding to transition to the AT state (performing an AT transition lottery)."

The "process performed when a payout state ends (when the current unit of play is the final game of that payout state)" mentioned above can be exemplified by the normal transition lottery at the end of the consecutive win challenge (see step S4528 in Figure 156). The normal transition lottery at the end of the consecutive win challenge is the "process for determining the state (reference mode) to transition to after the end of the relatively advantageous state (reference mode) (by performing a lottery for the transition destination after the decline)."

After executing the process in step S4601, the main CPU 101 performs a backup process (step S4602). In this process, the main CPU 101 stores AT-related parameters as backup data in a predetermined area of the main RAM 103. AT-related parameters are various types of information (counters, flags, etc.) that can be updated as a result of AT-related processing. For example, the counters and various winning flags shown in Figure 162 are included in the AT-related parameters. Winning flags are flags that indicate a win in the AT transition lottery or CZ transition lottery (for example, pseudo-BIG winning flag, promotion chance winning flag, consecutive win challenge winning flag, etc.).

As a result of the processing in step S4602, many AT-related parameters will be stored as backup data. However, some AT-related parameters are not stored as backup data (they are excluded from backup). Information that can be updated through "processing unaffected by penalties" (see step S4601 and step S4626 in Figure 164) can generally be excluded from backup.

For example, AT-related parameters that are not included in the backup include information that can be updated by the "processing to reduce the remaining period during which a relatively advantageous state (reference mode) can be maintained" as described above, information that can be updated by AT-related processing performed in the AT state, and information that can be updated by the "processing performed when a payout state begins (when the current unit of play is the first game of that payout state)" as described above.

Examples of the "information that can be updated by processing to reduce the remaining period during which the relatively advantageous state (reference mode) can be maintained" include the following: the game count counter guaranteeing consecutive wins (see step S4023 in Figure 95), the game count counter guaranteeing high probability 2 (see steps S4263, S4266, and S4269 in Figure 122), the game count counter guaranteeing chance stages (see step S4304 in Figure 126), the game count counter guaranteeing promotion chances (see step S4362 in Figure 133), the game count counter for consecutive win challenges (see step S4524 in Figure 156), and the game count counter for high probability 1 (see step S4123 in Figure 109).

The "information that can be updated by AT-related processing performed in AT state" mentioned above includes, for example, the first bell navigation count counter (see step S4404 in Figure 144), the remaining normal replay winning count counter (see step S4405 in Figure 144), the second bell navigation count counter (see step S4427 in Figure 147 and step S4482 in Figure 152), the first pseudo-BIG winning replay counter (see step S4423 in Figure 147), and the pseudo-bonus counter. Examples of flags that can be used include the consecutive win challenge winning flag after the bonus ends (see step S4408 in Figure 144 and step S4483 in Figure 152), the pseudo-BIG stock counter (see steps S4441 and S4444 in Figure 148, and step S4461 in Figure 150), and the flag set when a pseudo-BIG (ED) is won in the 1G consecutive draw (see step S4384 in Figure 143 and step S4484 in Figure 152). Here, the consecutive win challenge winning flag set to ON in AT state is distinguished from the consecutive win challenge winning flag set to ON in states other than AT state and is referred to as the consecutive win challenge winning flag after the pseudo-bonus ends. If a confirmed consecutive win challenge flag may be set in AT state, that flag (confirmed consecutive win challenge flag after the pseudo-bonus ends) can also be included in "information that can be updated by AT-related processing performed in AT state."

The above-mentioned "information that can be updated by the processing performed when a payout state begins (when the current unit of play is the first game of that payout state)" includes, for example, the continuous win preparation mode counter, the normal mode counter, and the promotion chance mode counter. The continuous win preparation mode counter, the normal mode counter, and the promotion chance mode counter are counters that manage the continuous win preparation mode, the normal mode, and the promotion chance mode, respectively. The continuous win preparation mode counter, the normal mode counter, and the promotion chance mode counter are information that can be updated by the continuous win preparation mode lottery processing, the normal mode transition lottery processing, and the promotion chance mode lottery processing, respectively. The continuous win preparation mode lottery processing, the normal mode transition lottery processing, and the promotion chance mode lottery processing are the above-mentioned "processes performed when a payout state begins (when the current unit of play is the first game of that payout state)." Furthermore, while the point mode lottery process is included in the "process performed when a payout state begins (when the current unit game is the first game of that payout state)," this process is also performed not only when the normal stage begins (see step S4063 in Figure 100), but also when the normal point value reaches 100 (see step S4166 in Figure 114) and when transitioning from the normal payout state to the upgrade chance (see step S4283 in Figure 124). Therefore, in this context, the point mode counter (the counter that manages the point mode) is the target of the backup.

Other AT-related parameters besides those excluded from backup as described above can be included in the backup. Here, information that can be updated through the processing in step S4603 to step S4621 in Figure 164 is included in the backup.

For example, AT-related parameters that are subject to backup include information that can be updated when the aforementioned "process for directly deciding to transition to the AT state (performing an AT transition lottery)" or "process for deciding to transition to the CZ state (CZ) (performing a CZ transition lottery)" is performed, as well as information indicating various states (reference modes).

The information that can be updated by the "process for directly deciding to transition to the AT state (performing an AT transition lottery)" or the "process for deciding to transition to the CZ state (CZ) (performing a CZ transition lottery)" mentioned above includes, for example, the Chance Stage A win count counter, the Chance Stage A win count counter upon reaching a point, the Chance Stage B win count counter, the Chance Stage B win count counter upon reaching a point, the promotion chance win flag, the promotion chance win flag upon reaching a point, the pseudo-BIG win flag, and the pseudo-BIG win flag upon reaching a point.

The "information indicating various states (reference modes)" mentioned above can include, for example, information indicating the payout state (non-advantageous section, normal stage, chance stage A, chance stage B, consecutive win preparation, consecutive win challenge, promotion chance, pseudo-BIG, and pseudo-REG) as shown in Figure 88, information indicating the probability mode (non-high probability, high probability 1, high probability 2, and high probability 3), and information that plays a supplementary role to the payout state. Information indicating the payout state can include information indicating the current payout state and information indicating the next payout state. The current payout state is managed in the payout state flag storage area (see Figure 20), and similarly, the next payout state is managed in the next payout state flag storage area (not shown).

The following are the possible next payout states: "None," "Next Non-Advantageous Period," "Next Normal Stage," "Next Chance Stage A," "Next Chance Stage B," "Next Consecutive Win Preparation," "Next Consecutive Win Challenge," "Next Upgrade Chance," "Next Pseudo BIG," and "Next Pseudo REG." When controlled to a pre-announcement state, a "1" will be stored in the bit corresponding to one of the next payout states in the next payout state flag storage area. For example, if the current payout state is "Normal Stage" and the next payout state is "Next Chance Stage A," this indicates that the pre-announcement state is being controlled due to winning Chance Stage A in the Normal Stage. If the next payout state is anything other than "None" when the pre-announcement game counter reaches 0, the game transitions to the payout state corresponding to that next payout state. On the other hand, if the next payout state is "None" when the pre-announcement game counter reaches 0, the current payout state continues.

Information that plays a supplementary role to the payout state includes information indicating that the system is preparing for the ceiling (see step S4125 in Figure 109) (ceiling reached state flag), information indicating that the system is preparing for a ceiling fake (see step S4127 in Figure 109) (ceiling fake state flag), a confirmed consecutive win challenge flag (see step S4003 in Figure 93 and step S4029 in Figure 95), and information indicating that the system is not in a 3BB flag state at the start of consecutive win preparation (see step S4022 in Figure 95) (non-internal state flag at the start of consecutive win preparation). Furthermore, pseudo-BIG and pseudo-REG can be managed using appropriate flags (pseudo-BIG operation state flag, pseudo-REG operation state flag, second pseudo-BIG start state flag, second pseudo-BIG operation state flag, etc.), and these flags can also be considered information that plays a supplementary role to the payout state.

Furthermore, while information indicating the current payout status, including the previous payout status, is also managed, this information is not included in the backup process. The previous payout status is the status the player was in during the previous unit of play. By comparing the previous payout status with the current payout status, it is possible to check for any changes in the payout status.

Furthermore, among the counters shown in Figure 162, those other than those mentioned above as being excluded from backup (such as the payout-advantage section game count counter, normal prescribed game count counter, pre-announcement game count counter, normal point counter, point reach count counter, cherry counter, point mode counter, consecutive win challenge win count counter, etc.) are included in the backup. Although not shown in Figure 162, the game count counter during ceiling preparation (see step S4142 in Figure 112) is also included in the backup.

After executing the process in step S4602, the main CPU 101 executes various AT-related processes when the lever is pulled (step S4603). In this process, the main CPU 101 executes AT-related processes other than those performed in step S4601, which are performed when the start lever 7 is operated (when the game start state control process (see step S6 in Figure 23) is performed). All processes described using Figures 93 to 161 as being performed in the game start state control process (see step S6 in Figure 23), but not performed in step S4601, are performed in steps S4603 through S4604.

Specifically, the processes performed in step S4603 include: a lottery for transitioning to the continuous win challenge (see step S4027 in Figure 95), a lottery for confirming the transition to the continuous win challenge (see step S4029 in Figure 95), a lottery for freezing during the normal stage (see step S4081 in Figure 103), a lottery for transitioning to the transition flag/winning flag during the normal stage (see step S4082 in Figure 103), a lottery for transitioning to the normal prescribed number of games high probability 1 (see step S4123 in Figure 109), and a flag during ceiling preparation. Set lottery processing (see step S4142 in Figure 112), winning type lottery processing when reaching the ceiling (see step S4144 in Figure 112), point mode lottery processing (see step S4166 in Figure 114), point reach lottery processing (see step S4167 in Figure 114), pre-announcement game count lottery processing when pseudo-BIG/upgrade chance is won during the normal stage (see steps S4202, S4205, and S4207 in Figure 118), chance stage during the normal stage Lottery-time pre-announcement game count lottery process (see steps S4222 and S4224 in Figure 119), high probability 2 transition lottery process (see steps S4262, S4265, and S4268 in Figure 122), promotion chance transition lottery process (see step S4284 in Figure 124), pseudo-BIG/promotion chance lottery process during chance stage (see step S4306 in Figure 126), game count increase lottery process during chance stage (see step S4308 in Figure 126), Examples of these processes include: the lottery process for the number of pre-announcement games when a flag is won during the bonus stage (see step S4324 in Figure 130), the lottery process during the promotion chance (see step S4366 in Figure 133), the lottery process for the next pseudo-game (see step S4367 in Figure 133), the lottery process for pseudo-BIG promotion when a predetermined number of games are played (see step S4369 in Figure 133), the lottery process for the current pseudo-game (see step S4370 in Figure 133), and the lottery process during the consecutive win challenge (see step S4525 in Figure 156).

These processes are essentially advantageous to the player and correspond to the "advantageous determination" described above. In this modified example, if the penalty conditions described later (see step S4623 in Figure 164) are met, such advantageous determinations are restricted (the result of the advantageous determination is canceled).

Furthermore, of the "processes for performing a freeze as an AT confirmation effect" mentioned above, the normal long freeze lottery process (see step S4102 in Figure 108) and the entry long freeze lottery process (see step S4363 in Figure 133) are performed in step S4601. In contrast, the normal stage freeze lottery process (see step S4081 in Figure 103) is performed in step S4603. As mentioned above, the long freeze controlled as a result of the normal long freeze lottery or the entry long freeze lottery occurs before the rotation of each reel 3L, 3C, 3R begins (before the first stop operation is performed). In contrast, the freeze controlled as a result of the normal stage freeze lottery occurs after the rotation of each reel 3L, 3C, 3R stops (after the third stop operation is performed). In this respect, the freeze lottery process during a normal stage differs from the long freeze lottery process during a normal stage and the long freeze lottery process at the start of a stage.

After executing the process in step S4603, the main CPU 101 updates various information (counters, flags, etc.) based on the results of the AT-related processing performed in step S4603 (step S4604). In this process, the main CPU 101 also updates the values of counters that are being backed up and for which addition or subtraction may be performed when the start lever 7 is operated (as shown in Figure 162, "LEV") (for example, the normal prescribed number of games counter, normal point counter, point reach count counter, cherry counter, point mode counter, consecutive win challenge win count counter, etc.) if it is the timing for addition or subtraction. After executing the process in step S4604, the main CPU 101 terminates this subroutine.

<AT-related processing during full shutdown>
Figure 164 is a flowchart showing the AT-related processing performed in the main control circuit when the entire system is stopped.

The AT-related processing during full shutdown shown in Figure 164 is the processing performed in step S15 (game end state control processing) of Figure 23 (main processing) in the main control circuit 100.

In the AT-related processing during a complete stop, the main CPU 101 first executes various AT-related processes during a complete stop (step S4621). In this process, the main CPU 101 executes AT-related processes that occur when all reels 3L, 3C, and 3R have stopped rotating (when the game end state control processing (see step S15 in Figure 23) is performed), excluding the processes performed in step S4626. Of the processes described using Figures 93 to 161 as being performed during the game end state control processing (see step S15 in Figure 23), all processes not performed in step S4626 are performed in steps S4621 to S4622.

Furthermore, while the above explanation assumed that the pre-promotion chance processing (see step S4105 in Figure 108) and the high probability 2 transition lottery processing (3) (see steps S4267 to S4269 in Figure 122) were performed during the game start state control processing (see step S6 in Figure 23), here we will assume that the pre-promotion chance processing (see step S4105 in Figure 108) and the high probability 2 transition lottery processing (3) (see steps S4267 to S4269 in Figure 122) are performed during the game end state control processing (see step S15 in Figure 23). Additionally, in step S4621, it may be determined whether the penalty condition (see step S4623) is met, and if it is determined that the penalty condition is met, the high probability 2 transition lottery processing (3) may not be executed.

After executing the process in step S4621, the main CPU 101 updates various information (counters, flags, etc.) based on the results of the AT-related processing performed in step S4621 (step S4622). Furthermore, in this process, the main CPU 101 updates the values of counters that are being backed up, specifically those for which addition or subtraction can be performed when all reels 3L, 3C, and 3R have stopped rotating (as shown in Figure 162, "3OFF") (for example, the payout-advantage section game count counter, the pre-announcement game count counter, etc.), if it is the timing for addition or subtraction.

After executing the process in step S4622, the main CPU 101 determines whether or not the penalty condition is met (step S4623). Here, the penalty condition is that all of the following (a) to (g) are met.
(a) Not in a non-advantageous period (including a unit game that transitions to an advantageous period) (b) The first stop operation is a stop operation (irregular press) on the middle reel 3C or the right reel 3R (c) Not in a pseudo BIG (d) Not in a pseudo REG (e) Not in a pseudo BIG (ED) (f) If in a normal stage or in the preparation for a winning streak, none of the following have been determined as internal winning combinations: "miss", "F_reach combination A", "F_reach combination B", "F_reach combination C", "F_BB confirmed combination A", "F_BB confirmed combination B", "F_1 coin combination A", and "F_1 coin combination B" (g) Not in a bonus state (3BB game state shown in Figure 81)

As described above, in the normal stage, if any of "F_Reach Symbol A," "F_Reach Symbol B," "F_Reach Symbol C," "F_BB Confirmed Symbol A," and "F_BB Confirmed Symbol B" are determined as the internal winning combination, and neither the promotion chance nor the pseudo-BIG is won, the player is notified (irregular stop navigation) to perform a stop operation on the middle reel 3C or the right reel 3R as the first stop operation. In this case, it is not reasonable to incur a penalty even if the stop operation is performed according to the irregular stop navigation. Therefore, in the normal stage, if any of "F_Reach Symbol A," "F_Reach Symbol B," "F_Reach Symbol C," "F_BB Confirmed Symbol A," and "F_BB Confirmed Symbol B" are determined as the internal winning combination, the penalty condition is not met (see (f) above).

Furthermore, even when a "miss" is determined as the internal winning combination in a normal stage, if the first stop operation is performed on the left reel 3L, there is a possibility that a combination of symbols that the player may perceive as a "winning combination" (for example, a combination where three "V" symbols are displayed on the left reel 3L) may appear, so the irregular push navigation will be performed in the same way. Also, if the situations in which the irregular push navigation occurs are limited, there is a possibility that the player may be able to predict the result of the AT-related processing based on the occurrence of the irregular push navigation. Therefore, in a normal stage, if either "F_1-coin combination A" or "F_1-coin combination B" is determined as the internal winning combination, the irregular push navigation will be performed in the same way. As a result, in the normal stage, if any of the following are determined as internal winning combinations in addition to "F_Reach Symbol A", "F_Reach Symbol B", "F_Reach Symbol C", "F_BB Guaranteed Symbol A", and "F_BB Guaranteed Symbol B", then the penalty conditions will not be met. Similarly, in the preparation for consecutive wins, if any of these combinations are determined as internal winning combinations, the penalty conditions will not be met (see (f) above).

If the system determines in step S4623 that the penalty condition is met, the main CPU 101 assigns the backup information to the various counters/flags (step S4624). In this process, the main CPU 101 overwrites the information (counters, flags, etc.) updated in steps S4604 to S4622 of Figure 163 with the information (counters, flags, etc.) stored as backup data in step S4602 of Figure 163. As a result, the AT-related parameters are changed from the updated information to the information stored as backup data. In other words, the AT-related parameters revert to the information stored at the time of the previous unit game, and the results of the AT-related processing performed in the current unit game are canceled.

Then, if the main CPU 101 has determined that a simulated game will be played in the next unit game, it discards the simulated game information (step S4625). In this process, if the main CPU 101 has stored information indicating that a simulated game will be played in the next unit game (simulated game information) as a result of the processing in steps S4604 in Figure 163 to S4622 in Figure 164, it erases the simulated game information. For example, if the current payout state is a chance for promotion, and the simulated game determined by the next simulated game lottery (see step S4367 in Figure 133) is set, the main CPU 101 erases the information indicating that simulated game. This cancels the simulated game that was scheduled to be played in the unit game following the unit game in which the next simulated game lottery was performed.

Here, the pseudo-game information discarded in step S4625 is updated based on the results of the AT-related processing performed in steps S4603 in Figure 163 to S4621 in Figure 164. In this regard, as mentioned above, the next pseudo-game lottery process (see step S4367 in Figure 133) is performed in step S4603 in Figure 163, while the normal long freeze lottery process (see step S4102 in Figure 108) is performed in step S4601 in Figure 163. Even if the normal long freeze lottery is won, it is decided that a pseudo-game will be played in the next unit game; however, in this case, it is not subject to processing in step S4625, and the pseudo-game is not canceled.

If it is determined in step S4623 that the penalty conditions are not met, or after executing the process in step S4625, the main CPU 101 executes a process that is not affected by the penalty (step S4626). In this process, the main CPU 101 executes some of the AT-related processes described above and updates various information (counters, flags, etc.) based on the results of the AT-related processes. Examples of processes performed in step S4626 include processes that are disadvantageous to the player and AT-related processes performed in the AT state.

In step S4626, the main CPU 101 updates (deducts 1 from) the values of the following counters as "processing unfavorable to the player": for example, the counter guaranteeing consecutive wins (see step S4023 in Figure 95), the counter guaranteeing high probability 2 (see steps S4263, S4266, and S4269 in Figure 122), the counter guaranteeing chance stages (see step S4304 in Figure 126), the counter guaranteeing promotion chances (see step S4362 in Figure 133), the counter guaranteeing consecutive win challenges (see step S4524 in Figure 156), and the counter guaranteeing high probability 1 (see step S4123 in Figure 109). Furthermore, if the value of the chance stage guarantee counter is 0, the main CPU 101 transitions to the normal stage (see step S4344 in Figure 132).

Examples of the "AT-related processing performed in AT state" include the continuous win challenge lottery process at the end of the final second pseudo-BIG (see step S4464 in Figure 150) and the lottery process when the number of successful replays is insufficient (see step S4443 in Figure 148). Furthermore, the main CPU 101 updates the information indicating the previous payout state as described above.

Furthermore, in step S4626, the main CPU 101 executes supplemental exception processing for the continuous win preparation fallout lottery process (see step S4031 in Figure 95). This process is performed when the continuous win preparation fallout lottery performed in step S4601 in Figure 163 is won, and the continuous win challenge transition lottery performed in step S4603 in Figure 163 (see step S4027 in Figure 95) is also won, and the continuous win challenge transition flag is set to ON, then the result of the continuous win preparation fallout lottery is discarded. As a result of executing this supplemental exception processing, the game will transition to the continuous win challenge in the next unit game. On the other hand, if the continuous win preparation fallout lottery is won and the continuous win challenge transition lottery is also won, but the penalty conditions are met, the continuous win challenge transition flag is set to OFF in step S4624. Therefore, in this case, the supplemental exception handling will not be executed, and the game will proceed to the normal stage in the next unit of gameplay.

Furthermore, in the processing of step S4626, the main CPU 101 executes a supplemental exception processing for the normal transition lottery process at the end of the continuous win challenge (see step S4528 in Figure 156). This process is performed when, as a result of the normal transition lottery at the end of the continuous win challenge performed in step S4601 in Figure 163, it is reserved to transition to a non-advantageous section or continuous win preparation, and when the lottery process during the continuous win challenge performed in step S4603 in Figure 163 (see step S4525 in Figure 156) results in a promotion chance or pseudo-BIG, and the promotion chance winning flag or pseudo-BIG winning flag is set to ON, the result of the normal transition lottery at the end of the continuous win challenge is discarded. As a result of executing this supplemental exception processing, the next unit game will transition to a promotion chance or pseudo-BIG. On the other hand, if a transition to a non-advantageous section or a continuous win preparation section is reserved by a normal transition lottery at the end of the continuous win challenge, and a promotion chance or pseudo-BIG is won in the lottery during the continuous win challenge, but a penalty condition is met, the promotion chance winning flag or pseudo-BIG winning flag is set to off in step S4624. Therefore, in this case, the supplementary exception processing is not executed, and the game transitions to a non-advantageous section or a continuous win preparation section in the next unit game. Also, although Figure 156 explains that the normal transition lottery process at the end of the continuous win challenge is executed when the judgment result in step S4527 is "NO", it is also possible to execute the normal transition lottery process at the end of the continuous win challenge without performing the process in step S4527 (regardless of whether the promotion chance winning flag or pseudo-BIG winning flag is set to on or not). In this case, the supplementary exception processing should also be executed if a promotion chance or pseudo-BIG is won in the pseudo-bonus lottery at the start of the consecutive win challenge (see step S4522 in Figure 156). Since the pseudo-bonus lottery at the start of the consecutive win challenge is performed in step S4601 in Figure 163, if a promotion chance or pseudo-BIG is won in the pseudo-bonus lottery at the start of the consecutive win challenge, even if the penalty conditions are met, the promotion chance winning flag or pseudo-BIG winning flag will not be set to off in step S4624.

Furthermore, in step S4626, the main CPU 101 executes supplemental exception handling for the consecutive win preparation drop lottery process (see step S4031 in Figure 95). This process occurs when the consecutive win preparation drop lottery (performed in step S4601 in Figure 163) is successful, and the consecutive win challenge transition lottery (performed in step S4603 in Figure 163, see step S4027 in Figure 95) is also successful, and the consecutive win challenge transition flag is set to ON. In such cases, the result of the consecutive win preparation drop lottery is discarded.

After executing the process in step S4626, the main CPU 101 terminates this subroutine.

Therefore, for example, in the normal stage, in step S4602 of Figure 163, the current value of the Chance Stage A win counter is stored as backup data. Subsequently, in the normal stage transition flag/win flag lottery performed in step S4603 (see step S4082 of Figure 103), if the player wins Chance Stage A, 1 is added to the value of the Chance Stage A win counter in step S4604. Subsequently, if a penalty condition is met in that unit of gameplay, in step S4624 of Figure 164, the value of the Chance Stage A win counter after the addition in step S4604 is overwritten with the value of the Chance Stage A win counter stored as backup data in step S4602. As a result, the value of the Chance Stage A win counter returns to the value it had before the normal stage transition flag and win flag draw took place, effectively canceling the result of that normal stage transition flag and win flag draw.

Furthermore, for example, in Chance Stage A, in step S4602 of Figure 163, information indicating the current pseudo-BIG winning flag (here, "OFF") is stored as backup data. Subsequently, if a pseudo-BIG is won in the pseudo-BIG/promotion chance lottery during Chance Stage (see step S4306 of Figure 126) performed in step S4603, the pseudo-BIG winning flag is set to ON in step S4604. Subsequently, if a penalty condition is met in that unit of gameplay, in step S4624 of Figure 164, the information indicating the pseudo-BIG winning flag after processing in step S4604 ("ON") is overwritten with the information indicating the pseudo-BIG winning flag ("OFF") stored as backup data in step S4602. As a result, the pseudo-BIG win flag returns to its off state, and the result of the pseudo-BIG/promotion chance lottery during that chance stage is canceled. Note that while the above describes an example of managing information indicating a pseudo-BIG win using a flag, information indicating a pseudo-BIG win may also be managed using a counter, similar to the information indicating a win in chance stage A.

Furthermore, for example, during the continuous win preparation phase, if the continuous win preparation phase termination lottery (see step S4031 in Figure 95), which takes place in step S4601 in Figure 163, is won, the normal stage transition flag is set to ON. Since the information that can be updated by step S4601 is not subject to backup, the information indicating this flag is not stored as backup data in step S4602. The AT-related parameters processed in step S4624 in Figure 164 are information updated based on the results of the AT-related processing performed in steps S4603 to S4621. Since the continuous win preparation phase termination lottery takes place in step S4601, the normal stage transition flag is not subject to processing in step S4624. Therefore, even if a penalty condition is met in that unit of gameplay, the information indicating the normal stage transition flag ("ON") after processing in step S4601 is maintained, and the game transitions to the normal stage in the next unit of gameplay.

Furthermore, for example, the following are excluded from backup: the game count counter for guaranteeing consecutive wins (see step S4023 in Figure 95), the game count counter for guaranteeing high probability 2 (see steps S4263, S4266, and S4269 in Figure 122), the game count counter for guaranteeing chance stages (see step S4304 in Figure 126), the game count counter for promotion chances (see step S4362 in Figure 133), the game count counter for consecutive win challenges (see step S4524 in Figure 156), and the game count counter for high probability 1 (see step S4123 in Figure 109). Therefore, in step S4602 in Figure 163, the values of these counters are not stored as backup data. And, AT-related parameters that are excluded from backup are not processed in step S4624 in Figure 164. Therefore, regardless of whether the penalty condition is met or not, if the value is 1 or greater, that value is deducted by 1 in step S4626 for each unit game.

Furthermore, for example, the pre-announcement game count counter (see steps S4203, S4206, and S4208 in Figure 118, steps S4223 and S4225 in Figure 119, and step S4325 in Figure 130) is subject to backup. Also, AT-related parameters that are subject to backup are processed in step S4624 of Figure 164. Therefore, if the system is controlled to a pre-announcement state, in step S4602, the current value of the pre-announcement game count counter is stored as backup data. Then, in step S4622, 1 is subtracted from the value of the pre-announcement game count counter. Subsequently, if a penalty condition is met, in step S4624, the value of the pre-announcement game count counter after the subtraction in step S4622 is overwritten with the value of the pre-announcement game count counter stored as backup data in step S4602. As a result, the value of the pre-game count counter returns to the value it had when the corresponding game started, effectively canceling the deduction.

As explained above, in order to realize the gameplay of the pachislo machine 1 according to the fourth embodiment, it is necessary to execute numerous AT-related processes. However, in the flowchart, the penalty function can be introduced through a relatively simple process without creating complex branching for processes that are not affected by penalties and processes that are affected by penalties. This allows for the appropriate implementation of penalties while saving the capacity required for penalty-related processing. In this case, if the AT-related processes were to be executed only after determining whether the penalty conditions were met, the timing of the AT-related processes would have to be after the first stop operation, making it difficult to reflect the results of the AT-related processes (such as the AT transition lottery) in the visual effects. In this respect, according to the above example, it is possible to execute the AT-related processes before determining whether the penalty conditions were met (when the start lever 7 is operated), so the results of the AT-related processes (such as the AT transition lottery) can be immediately reflected in the visual effects. To perform visual effects based on the results of the AT-related processes, information indicating the results of the AT-related processes should be included in the start command data (see step S7 in Figure 23).

Furthermore, although not explained above, in step S4601 in Figure 163 or step S4626 in Figure 164, the main CPU 101 clears each counter when it is the clear timing for that counter (see Figure 162). Also, in step S4601 in Figure 163, if the current payout state is a promotion chance and the value of the promotion chance game counter is 1, the main CPU 101 tentatively sets the destination payout state (pseudo-REG or pseudo-BIG) after the promotion chance ends. In this process, the main CPU 101 sets the destination payout state to pseudo-REG if the promotion chance mode is one of "mode 1" to "mode 3," and to pseudo-BIG if the promotion chance mode is "mode 4." This tentative setting of the destination payout state is referred to as "forced setting."

Here, in the final game of the promotion chance (value of promotion chance game counter: 0), when the pseudo-BIG promotion lottery process for consuming the prescribed number of games is performed (see step S4369 in Figure 133), if the pseudo-BIG winning flag is set to ON, the main CPU 101 can transition to pseudo-BIG based on that pseudo-BIG winning flag. However, if the pseudo-BIG winning flag is not set to ON at that time, the main CPU 101 cannot transition to pseudo-BIG based on the pseudo-BIG winning flag, and (in this case, the pseudo-REG winning flag is also not set to ON) it cannot transition to pseudo-REG based on the pseudo-REG winning flag either. In this case, the main CPU 101 refers to the payout state that was forcibly set above and transitions to that payout state. This situation can occur because, as a result of the promotion chance lottery (see step S4366 in Figure 133) and the pseudo-BIG promotion lottery upon completion of the prescribed number of games (see step S4369 in Figure 133), a "pseudo-REG" is not provided (the pseudo-REG winning flag is not set to ON), and the pseudo-BIG winning flag may be set to OFF due to the fulfillment of penalty conditions.

For example, if the value of the promotion chance game counter is 1, and a pseudo-BIG is won in the promotion chance lottery performed in step S4603 of Figure 163 (see step S4366 of Figure 133), and the pseudo-BIG win flag is set to ON, but a penalty condition is met, the pseudo-BIG win flag is set to OFF in step S4624 of Figure 164. Subsequently, in the next unit game (value of promotion chance game counter: 0), if a pseudo-BIG is not won in the pseudo-BIG promotion lottery at the time of consuming the prescribed number of games (see step S4369 of Figure 133), then neither the pseudo-BIG win flag nor the pseudo-REG win flag will be set to ON. In this case, the main CPU 101 refers to the payout state that was forcibly set above and transitions to that payout state.

Furthermore, if the value of the promotion chance game counter is 1, and the player does not win a pseudo-BIG in the promotion chance lottery performed in step S4603 of Figure 163 (see step S4366 of Figure 133), and also does not win a pseudo-BIG in the pseudo-BIG promotion lottery at the end of the prescribed number of games (see step S4369 of Figure 133) in the next unit game (value of promotion chance game counter: 0), then neither the pseudo-BIG win flag nor the pseudo-REG win flag will be set to ON. In this case, the main CPU 101 will refer to the payout state that was forcibly set above and transition to that payout state.

<Example of a promotion opportunity animation (when a penalty occurs)>
Figure 165 shows an example of a presentation that occurs when a penalty is awarded during a promotion opportunity.

As an example of the presentation shown in Figure 165, Figure 165(a) shows the image corresponding to the word "WIN" being displayed on the main display device 210 during the unit game immediately preceding the unit game that transitions to the promotion chance (in the case of transitioning from the normal payout state to the promotion chance, the final game of the normal payout state: the winning notification game).

Figure 165(b) shows that, following the state shown in Figure 165(a), during the first game of the promotion chance (promotion chance game counter value: 3), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Note that the long freeze (see step S4363 in Figure 133) indicates a non-winning outcome.

Figure 165(c) shows the state shown in Figure 165(b), and in the first game of the promotion chance (promotion chance game counter value: 3), after the rotation of reels 3L, 3C, and 3R begins, when a stop operation (irregular press) is performed on the middle reel 3C or the right reel 3R as the first stop operation, an image corresponding to the text "Irregular press in progress" is displayed on the main display device 210. An image corresponding to the text "Bonus promotion lottery in progress" is also displayed.

Figure 165(d) shows that, following the state shown in Figure 165(c), in the second game of the promotion chance (promotion chance game counter value: 2), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Due to the irregular button press in the first game, a penalty condition was met, and the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery (see step S4366 in Figure 133) performed in the first game was canceled (see step S4625 in Figure 164).

Figure 165(e) shows the state shown in Figure 165(d), and in the second game of the promotion chance (promotion chance game counter value: 2), after the rotation of reels 3L, 3C, and 3R begins, when a stop operation (irregular press) is performed on the middle reel 3C or the right reel 3R as the first stop operation, an image corresponding to the text "Irregular press in progress" is displayed on the main display device 210. An image corresponding to the text "Bonus promotion lottery in progress" is also displayed.

Figure 165(f) shows that, following the state shown in Figure 165(e), in the third game of the promotion chance (promotion chance game counter value: 1), an image corresponding to the words "Bonus promotion lottery in progress" is displayed on the main display device 210 in response to the promotion chance lottery (see step S4366 in Figure 133). Due to the irregular button press in the second game, a penalty condition was met, and the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery (see step S4366 in Figure 133) performed in the second game was canceled (see step S4625 in Figure 164).

Figure 165(g) shows that, after the state shown in Figure 165(f), in the third game of the promotion chance (promotion chance game counter value: 1), after the rotation of reels 3L, 3C, and 3R begins, when a stop operation (irregular press) is performed on the middle reel 3C or the right reel 3R as the first stop operation, an image corresponding to the text "Irregular press in progress" is displayed on the main display device 210. An image corresponding to the text "Bonus promotion lottery in progress" is also displayed.

Figure 165(h) shows that, after the state shown in Figure 165(g), in the fourth game of the promotion chance (value of promotion chance game counter: 0), when the pseudo-game (see step S4370 in Figure 133) determined based on the result of the pseudo-BIG promotion lottery when the prescribed number of games are consumed (see step S4369 in Figure 133) starts, an image corresponding to the words "Aim for BAR!" is displayed on the main display device 210. This image suggests that the player should perform a stop operation at the timing when the "BAR" symbol, as a pseudo-REG transition symbol, can be displayed on each reel 3L, 3C, and 3R. This prompts the player to perform a stop operation aiming for "BAR". Due to an irregular button press during the third game, the penalty condition was met, and the simulated game (see step S4367 in Figure 133) determined based on the result of the promotion chance lottery (see step S4366 in Figure 133) conducted during that third game was canceled (see step S4625 in Figure 164). In contrast, the simulated game determined based on the result of the simulated BIG promotion lottery upon completion of the prescribed number of games (see step S4369 in Figure 133) proceeded without being affected by the penalty.

Figure 165(i) shows that, after the state shown in Figure 165(h), during the simulated game played in the fourth game of the promotion chance (promotion chance game counter value: 0), when all reels 3L, 3C, and 3R stop spinning, an image corresponding to the words "Regular Bonus!" and "Pull the lever to proceed" is displayed on the main display device 210. This notifies the player that the game is transitioning to a regular bonus (simulated REG) and prompts the player to operate the start lever 7.

After the state shown in Figure 165(i), when the start lever 7 is operated, the rotation of each reel 3L, 3C, and 3R begins for actual gameplay (main gameplay) (random delay processing is performed and the game proceeds). Figure 165(j) shows the push order navigation image displayed on the main display device 210 at this time. The push order navigation image is an image for notifying the correct push order for the push order bell (bell navigation). Here, it is notified that "F_231 Bell A" to "F_231 Bell C" has been determined as the internal winning combination, and that the first stop operation is to stop the middle reel 3C by aiming for "Seven", the second stop operation is to stop the right reel 3R, and the third stop operation is to stop the left reel 3L (see Figure 91). Also, "4 remaining navigations" indicates the remaining number of bell navigations that can be performed in pseudo REG (value of the second bell navigation count counter). The initial value for "Remaining Navigation" is 5, but after one Bell Navigation was performed, the number of remaining navigations decreased by 1 and was updated to "4".

The above explains the case where a "fake pseudo-game" is determined as a result of the pseudo-BIG upgrade lottery after the prescribed number of games have been played (see step S4369 in Figure 133). This results in a pseudo-game aiming for "BAR" (see Figure 165(h)), and a transition to a pseudo-REG (see Figures 165(i) and (j)). In contrast, if a "pseudo-BIG" or "pseudo-BIG (ED)" is determined as a result of the pseudo-BIG upgrade lottery after the prescribed number of games have been played (see step S4369 in Figure 133), instead of the effects shown in Figures 165(h) to (j), effects such as those shown in Figures 141(c) to (h) are performed, and the game transitions to a pseudo-BIG.

As explained above, in this embodiment, even if a pseudo-BIG is won in an AT-related process (e.g., a lottery during a promotion chance) performed in a single unit of game, and the pseudo-BIG win flag is set to ON, if a penalty condition is met in that unit of game, the pseudo-BIG win flag will revert to the OFF state (see step S4624 in Figure 164). This effectively invalidates the result of the AT-related process (e.g., a lottery during a promotion chance). On the other hand, AT-related parameters that are not subject to backup (e.g., the promotion chance game counter) are updated even if a penalty condition is met (see step S4626 in Figure 164). Therefore, each time a penalty condition is met in a promotion chance, the opportunity to be promoted to a pseudo-BIG is lost by one. Furthermore, if it has been determined that the game will transition to a promotion chance via a pre-promotion state, and a penalty condition is met during the winning notification game (see Figure 165(a)), the value of the pre-promotion game counter will not be updated (see step S4624 in Figure 164). Therefore, as long as the penalty condition is met, the game will not transition to a promotion chance.

Furthermore, in this embodiment, if a penalty condition is met in one unit game, and it is decided to perform a simulated game as a result of AT-related processing (e.g., a lottery during a promotion chance) performed in that unit game, the simulated game is discarded. On the other hand, if a penalty condition is met in one unit game, and it is decided to perform a simulated game as a result of AT-related processing (e.g., a simulated BIG promotion lottery when a specified number of games have been played) performed in a unit game other than the one in question (e.g., the next unit game), the simulated game is not discarded based on the fact that the penalty condition has been met. However, even in such cases, the simulated game may be discarded. Note that here, assuming that a simulated game is performed at the start of the game (in the game start state control processing (see step S6 in Figure 23)), the explanation assumes that the simulated game scheduled to be performed in the unit game following the unit game in which the penalty condition was met is discarded. However, the simulated game may also be performed at the end of the game (during the game end state control processing (see step S15 in Figure 23)). In this case, the simulated game scheduled to be performed in the unit game where the penalty condition was met may be discarded.

Furthermore, the penalty condition may be met if the first stop operation is an irregular stop operation on the middle reel 3C or the right reel 3R. This stop operation is, of course, a stop operation in actual gameplay (main gameplay), not a stop operation in simulated gameplay. Therefore, even if the first stop operation in the simulated game occurring in the fourth game of the promotion chance (promotion chance game counter value: 0) is an operation on the middle reel 3C or the right reel 3R, a simulated BIG or simulated REG will start in that unit of gameplay.

Furthermore, in Figure 165, it was explained that when an irregular button press occurs, an image corresponding to the text "Irregular button press is being performed" is displayed on the main display device 210. As explained in the modified example of the first gaming machine, if a stopping operation is performed in a manner that may result in a penalty condition being met, it is possible to configure the system to provide a situation explanation such as "Irregular button press is being performed" through text display or audio.

Furthermore, if a stop operation is performed in a manner that could trigger a penalty, the performance content may be changed (the currently running performance may be terminated). For example, as mentioned above, in the normal stage, multiple performance modes are provided. If an irregular press is performed while in a performance mode with a relatively high expectation (special performance mode), the screen may be switched to the performance mode with the lowest expectation (basic performance mode) at the time the first stop operation is performed. Similarly, when in Chance Stage A, Chance Stage B, or Consecutive Win Preparation, the performance mode is different from the normal stage. If an irregular press is performed in these payout states, the screen may be switched to the basic performance mode. On the other hand, when in Consecutive Win Challenge or Promotion Chance, the performance mode is also different from the normal stage. If an irregular press is performed in these payout states, the performance mode may not be switched (the currently displayed background image may be maintained).

[Fifth Embodiment]
The first to fourth embodiments have been described above. The fifth embodiment will now be described. The basic configuration of the pachislo machine 2001 according to the fifth embodiment is the same as that of the pachislo machine 1 according to the first to fourth embodiments. In the following description, components that are the same as those of the pachislo machine 1 according to the first to fourth embodiments will be denoted by the same reference numerals. Furthermore, the description of parts that apply to the fifth embodiment as described in the first to fourth embodiments will be omitted.

Furthermore, even if the above description includes phrases that limit the description to the pachislo machine 1 according to the first embodiment, such as "In the first embodiment,..." or "In the pachislo machine 1 of the first embodiment,...", these descriptions can also be applied to the pachislo machine 1 according to the fifth embodiment, to the extent that they do not depart from the spirit of the fifth embodiment. Similarly, any descriptions in the above description that limit the description to the pachislo machine 1 according to the second to fourth embodiments can also be applied to the pachislo machine 1 according to the fifth embodiment, to the extent that they do not depart from the spirit of the fifth embodiment. Therefore, it is possible to partially substitute or combine the configurations shown in the first to fourth embodiments (including the configurations shown in the modified examples and the configurations shown in the extended examples) with the configurations shown in the fifth embodiment.

Furthermore, even if the shape differs from that of the pachislo machine 1 according to the first to fourth embodiments, components with similar functions may be assigned the same reference numerals for convenience. Also, even if the shape and processing are the same as those of the pachislo machine 1 according to the first to fourth embodiments, different reference numerals or step numbers may be assigned for convenience.

(Microprocessor)
The pachislo machine 2001 of this embodiment has the same configuration as the pachislo machine 1 of the first embodiment described above, and the main control board 2071 is similar in configuration to the main control board 71 of the first embodiment (see Figure 1). Furthermore, the microprocessor (main control circuit) 2100 included in the main control board 2071 is shown in detail, for example, as shown in Figure 166. Here, the microprocessor 2100 shown in Figure 166 corresponds to the main control circuit 100 of the first embodiment shown in Figure 1, and the main CPU 2101, main ROM 2102, and main RAM 2103 shown in Figure 166 correspond to the main CPU 101, main ROM 102, and main RAM 103 of the first embodiment shown in Figure 1, respectively. Although not shown in Figure 1, in this embodiment, in addition to the microprocessor 2100 described above, a random number circuit 2150, a clock pulse generation circuit 2160, and a power management circuit 2170 are included in the main control board 2071.

The random number circuit 2150 generates random values for the internal lottery process (random values corresponding to the internal lottery random values in the first embodiment), and the clock pulse generation circuit 2160 generates a clock pulse signal for the operation of the main CPU and outputs the generated clock pulse signal to the clock circuit 2105 (EX) in the microprocessor 2100, which will be described later. The microprocessor 2100 executes a control program based on the input clock pulse signal.

The power management circuit 2170 manages fluctuations in the 12V DC power supply voltage supplied from the power supply board and supplies 5V DC (VCC) power to the microprocessor 2100. Furthermore, the power management circuit 2170 outputs a reset signal to the reset controller 2106 (XSRST) in the microprocessor 2100 (described later) when the power is turned on (when the power supply voltage rises from 0V to the startup voltage value (10V)), and outputs a power outage detection signal to the parallel input port 2111 (XINT) in the microprocessor 2100 (described later) when a power outage occurs (when the power supply voltage falls from 12V to the power failure voltage value (10.5V)). In other words, the power management circuit 2170 functions as a means (startup means) to output a reset signal (startup signal) to the microprocessor 2100 when the power is turned on, and further functions as a means (power failure means) to output a power outage detection signal (power failure signal) to the microprocessor 2100 when a power outage occurs.

Furthermore, when the microprocessor 2100 receives a reset signal at the XSRST terminal, the reset controller 2106 generates a reset interrupt, and the main CPU 2101 starts operating from address "0000"H. Address "0000"H is the starting address where the power-on processing (Figure 171), described later, is stored. The process of receiving a reset signal at the XSRST terminal and starting operation from address "0000"H is also referred to as a "power-on reset."

Next, with reference to Figure 166, an example configuration of the microprocessor 2100 of this embodiment will be described. The microprocessor 2100 is a microprocessor with security functions for a gaming machine.

The microprocessor 2100 includes a main CPU 2101, main ROM 2102, main RAM 2103, external bus interface 2104 (signal bus 2116 (local bus)), clock circuit 2105, reset controller 2106, arithmetic circuit 2107, verification block 2108, unique information 2109, random number circuit 2110 (random number generation circuit), parallel input port 2111, interrupt controller 2112, timer circuit 2113, serial communication circuit 2114, and parallel output port 2115. All parts of the microprocessor 2100, except for the signal bus 2116, are connected to each other via the signal bus 2116.

The main CPU 2101 executes various control programs based on the clock pulses generated by the clock circuit 2105 to perform various controls. The main CPU 2101 executes these control programs to control game operations, as well as the counting of game media (game value) during payouts and settlements.

The main ROM 2102 stores various control programs executed by the main CPU 2101, various data tables, etc. The storage capacity of the main ROM 2102 is, for example, 12 kilobytes. In the microprocessor 2100, the main ROM 2102 stores various control programs executed by the main CPU 2101, various data tables, and data for sending various control commands to the sub-control board 72.

The main RAM 2103 is provided with various storage areas for storing various data (parameters, flags, etc.) used when the main CPU 2101 executes various control programs. The storage capacity of the main RAM 2103 is, for example, 1 kilobyte. In the microprocessor 2100, the main RAM 2103 is provided with storage areas for various data such as internal winning combinations determined by the execution of control programs, as well as storage areas for various counters (e.g., medal counter, insertion counter, etc.) and various flags used when executing payout control, etc.

The external bus interface 2104 is an interface circuit for electrically connecting the microprocessor 2100 to an external signal bus to which various components located outside the microprocessor 2100 are connected.

The clock circuit 2105, which includes, for example, a frequency divider (not shown), converts the clock pulse signal input from the clock pulse generation circuit into clock pulse signals of multiple frequencies used for the operation of the main CPU and other components (for example, the timer circuit 2113). The clock pulse signals of multiple frequencies generated by the clock circuit 2105 are output to all circuits within the microprocessor 2100 except the clock circuit 2105 (main CPU 2101 to external bus interface 2104, and reset controller 2106 to parallel output port 2115) at frequencies corresponding to the operation of each circuit.

The reset controller 2106 resets the IAT (Illegal Address Trap) 2106a and WDT (watchdog timer) 2106b based on the reset signal input from the power management circuit. The arithmetic circuit 2107 includes a multiplication circuit 2107a, a division circuit 2107b, and a CRC circuit (Cyclic Redundancy Check (CRC16) circuit) 2107c. The verification block 2108 verifies, at its signal level, whether the connected test device is legitimate when the test device is connected.

The unique information 2109 stores the unique information (identification information) of the microprocessor 2100. The individual chip number of the microprocessor 2100 consists of 4 bytes of data and is set during chip manufacturing. Furthermore, the individual chip number of the microprocessor MP is assigned a different number to each chip.

Furthermore, in the microprocessor 2100, the unique information (identification information) of the microprocessor 2100 is stored in unique information 2109. Also, the ROM code of the main ROM 2102 and the individual chip number of the microprocessor 2100 are stored in unique information 2109. The ROM code of the main ROM 2102 consists of 4 bytes x 4 data, i.e., 16 bytes of data. Each 4-byte data that makes up the ROM code of the main ROM 2102 is generated from data stored in the address range "0000h" to "2FBFh" of the built-in ROM (main ROM 2102), and the method of generating each 4-byte data differs for each 4-byte data.

The random number circuit 2110 generates random numbers within a predetermined range (for example, 0 to 65535 or 0 to 255). The random number circuit 2110 is composed of multiple random number registers. For example, it can consist of random number register 0 for obtaining a 2-byte hard latch random number, random number registers 1 to 3 for obtaining a 2-byte soft latch random number, and random number registers 4 to 7 for obtaining a 1-byte soft latch random number. In this embodiment of the microprocessor 2100, the main CPU 2101 obtains one value from a predetermined range of random numbers generated by an external random number circuit 2150, separate from the random number circuit 2110, as, for example, a random number value for the role draw (a random number value for internal drawing). However, instead of the random number circuit 2150, the random number register 0 for obtaining a 2-byte hard latch random number may be used to obtain the random number value for internal drawing.

The parallel input port 2111 is an input port (memory-mapped I/O) for signals input to the microprocessor 2100 from various circuits located outside the microprocessor 2100 (e.g., power management circuits). The parallel input port 2111 is also connected to the random number circuit 2110 and the interrupt controller 2112. In the microprocessor 2100, a start switch (e.g., a start switch corresponding to the start switch 7S in the first embodiment) is connected to the parallel input port 2111. When the start switch turns ON in response to the operation of the start lever (e.g., the start lever 7S in the first embodiment) (on-edge), a latch signal is output from the parallel input port 2111 to a predetermined random number register (e.g., random number register 0) of the random number circuit 2110. Upon receiving the latch signal, the predetermined random number register is latched in the random number circuit 2110, and a 2-byte hard-latch random number is obtained.

The interrupt controller 2112 controls the timing of interrupt processing by the main CPU 2101 based on a reset signal, a power outage detection signal, or a timeout signal input at predetermined intervals from the timer circuit 2113 via the parallel input port 2111. Furthermore, when the interrupt controller 2112 receives a reset signal or power outage detection signal from the power management circuit, or a timeout signal from the timer circuit 2113, it outputs an interrupt request signal indicating an interrupt processing start command to the main CPU 2101. The main CPU 2101 then performs various interrupt processing based on the interrupt request signal received from the interrupt controller 2112.

Specifically, in the microprocessor 2100, the interrupt controller 2112 controls the execution timing of interrupt processing by the main CPU 2101 (for example, in the case of a timeout signal, the periodic interrupt processing shown in Figure 32) based on a reset signal, a power outage detection signal input from the power management circuit via the parallel input port 2111, or a timeout signal input from the timer circuit 2113 at a period of 1.1172 msec. The main CPU 2101 then performs various processes within the periodic interrupt processing (for example, see Figure 32) based on the interrupt request signal input from the interrupt controller 2112 in response to the timeout signal from the timer circuit 2113. The interrupt processing performed by the main CPU 2101 based on the reset signal corresponds to the main processing shown in Figure 23. In other words, for all processes executed by the main CPU 2101, the interrupt request signal issued by the interrupt controller 2112 serves as the starting point for each process.

The timer circuit 2113 (PTC) operates using a clock pulse signal generated by the clock circuit 2105 (a clock pulse signal with a frequency divided by a frequency divider (not shown) from the clock pulse signal used for CPU operation) (counting elapsed time). The timer circuit 2113 then outputs a timeout signal (trigger signal) to the interrupt controller 2112 at a predetermined period (1.1172 msec in the case of the microprocessor 2100).

The serial communication circuit 2114 is a communication circuit that controls the serial communication of various data between the control board on which the communication circuit is mounted and various boards provided outside the control board. In the microprocessor 2100, the serial communication circuit 2114 serially communicates data (various control commands, various data, etc.) with various boards (e.g., the sub-control board 2072, etc.) provided outside the main control board 2071. Furthermore, the serial communication circuit 2114 is composed of, for example, five communication circuits: SCU0 (the "asynchronous serial transmission/reception 0" described above), SCU1 (the "asynchronous serial transmission/reception 1" described above), and STU2 to STU4. Communication circuits SCU0 and SCU1 are bidirectional serial communication circuits, while communication circuits STU2 to STU4 are transmission-only serial communication circuits.

For example, in this embodiment, the test firing signal control processing (transmission processing) uses a dedicated serial communication circuit, communication circuit STU2 (for transmission to interface 2 (I/F2)). Furthermore, when connecting the main control board 2071 and the sub-control board 2072 via serial communication, a dedicated serial communication circuit, communication circuit STU3, is used. This communication specification is a method of using serial communication circuits established from the perspective of preventing cheating (fraudulent activity). The aforementioned interface 2 (I/F2) is the second interface board 302 for the test machine shown in Figure 3.

The parallel output port 2115 is an output port (memory-mapped I/O) for signals output from the microprocessor 2100 to various external circuits. In this example, data output is performed using a FIFO (First In First Out) method.

(Registers owned by the main CPU)
Now, with reference to Figure 167, we will explain the various registers that the main CPU 2101 has. Figure 167 is a schematic diagram of the various registers included in the main CPU 2101.

As shown in Figure 167(A), the main CPU 2101 has the following main registers: extended registers (Q register, U register), general-purpose registers (A register, B register, C register, D register, E register, H register, L register), flag register (F register), index registers (IX register, IY register), and a stack pointer (stack pointer SP).

Furthermore, the main CPU 2101 has sub-registers including an extended register (Q' register), general-purpose registers (A' register, B' register, C' register, D' register, E' register, H' register, L' register), a flag register (F' register), and index registers (IX' register, IY' register). Each of the main registers and sub-registers mentioned above consists of a single-byte register.

Furthermore, in this embodiment, the B register and the C register are used as a pair register (BC register), and the D register and the E register are used as a pair register (DE register). Additionally, in this embodiment, the H register and the L register are used as a pair register (HL register).

Furthermore, in this embodiment, the system can be controlled to switch between two banks (bank 0 and bank 1) for processing. Regarding the main registers and sub-registers mentioned above, both main registers and sub-registers are provided for bank 0 and bank 1. By switching banks, the registers used and referenced by program instructions are switched between the registers of bank 0 and bank 1.

In this embodiment, the higher-order address data (address value) of an address is stored in the Q register. For example, when the main CPU 2101 is reset, the starting address (higher-order) "F0"H of the main RAM 2103 used in bank 0 is set in the Q register. When switching banks to use bank 1, the program may be controlled (processed) so that the starting address (higher-order) "F2"H of the main RAM 2103 used in bank 1 is set in the Q register.
In addition to using the Q register as the higher-order address data, the system may also be controlled (processed) to set the starting address (higher-order) of the main RAM 2103, "F0"H, in a register other than the Q register (for example, the H register), and to set the starting address (higher-order) of the main RAM 2103, "F2"H, in a register other than the Q register (for example, the D register).
In particular, when referencing the game area (the RAM area within the usage area described later) and the area outside the usage area (the RAM area outside the usage area described later) of the main RAM 2103, it is possible to control the system so that when referencing the higher-order address of the game area, an instruction using the Q register (a specific register) is used, and when referencing the higher-order address of the area outside the usage area, an instruction using a register other than the Q register is used. In this case, it is also possible to control (process) the system so that the starting address (higher-order) "F2"H is set in a register other than the Q register before or after switching to bank 1.
In the program of this embodiment, depending on the amount of control (processing) that references and writes to the game area and the area outside the game area of the main RAM 2103, it is desirable to set the starting address (higher side) of the main RAM 2103 to "F0"H or "F2"H in the Q register.
For example, if the main RAM 2103 frequently references and writes to the area "F0"H at its upper address, the Q register is set to "F0"H. Similarly, if the main RAM 2103 frequently references and writes to the area "F2"H at its upper address, the Q register is set to "F2"H.

Furthermore, in this embodiment, the system includes control registers consisting of a 1-byte register each: an interrupt page address register (I register), a memory refresh register (R register), a program counter (PC), an interrupt enable register 1, and an interrupt enable register 2.

Furthermore, as shown in Figure 167(B), the F register and F' register of the flag register each have predetermined flag information set in each bit, indicating the result of the arithmetic operation. For example, bit 6 (D6) is set with data (zero flag) indicating whether the arithmetic result is "0" or not during the arithmetic result determination process. Specifically, if the arithmetic result is "0", the data "1" is set in bit 6, and if the arithmetic result is not "0", the data "0" is set in bit 6. Then, during the arithmetic result determination process, the main CPU 2101 determines the arithmetic result by referring to the data "0" or "1" in bit 6.

Furthermore, bit 2 (D2) of the flag register is set to either the parity flag or the overflow flag. For example, when used as the parity flag, when a logical operation is performed, the number of "1" bits in the destination where the operation result is stored is counted. If the sum is odd, "0" is set; if even, "1" is set. When used as the overflow flag, when an overflow occurs during a signed arithmetic operation, the overflow flag is set.

Furthermore, it is possible to control the flag register by using a predetermined instruction to set the values of other registers to each bit (for example, bit 2).

(Internal configuration of main ROM and main RAM (memory map))
Next, the internal configuration (hereinafter referred to as "memory map") of the main ROM 2102 and main RAM 2103 included in the microprocessor 2100 will be described with reference to Figure 168. Figure 168(A) shows the memory map of the entire memory, Figure 168(B) shows the configuration of the built-in ROM of the entire memory, and Figure 168(C) shows the configuration of the built-in RAM of the entire memory. The built-in ROM in Figure 168(A) corresponds to, for example, the main ROM 2102 in Figure 166, and the built-in RAM in Figure 168(A) corresponds to the main RAM 2103 in Figure 166.

In the overall memory map of the microprocessor 2100, as shown in Figure 168(A), the memory area of the main ROM 2102, the memory area of the main RAM 2103, and the area of the function registers are arranged in this order, with unused areas in between, starting from the beginning of the address (for example, "0000"H). Here, the function registers include two types of built-in registers: a first register used for setting the operation of each peripheral function, and a second register for monitoring and control.

In the memory map of the main ROM 2102, as shown in Figure 168(B), the following areas are arranged at predetermined addresses in this order, starting from the beginning of the main ROM 2102's address range ("0000"H): the program area within the used area 2102a, the data area within the used area 2102b, the unused area, the program area outside the used area 2102c, the data area outside the used area 2102d, the unused area, the trademark record area 2102e, and the program management area (e.g., an area for program management and security settings) 2102f. Furthermore, the program area within the used area 2102a and the data area within the used area 2102b are combined into the ROM area within the used area 2202a, and the program area outside the used area 2102c and the data area outside the used area 2102d are combined into the ROM area outside the used area 2202b.

In this embodiment, as described above, unused areas of a predetermined size (e.g., 16 bytes) are provided between the ROM area 2202a within the usage area and the ROM area 2202b outside the usage area, and between the ROM area 2202b outside the usage area and the trademark recording area 2102e.

In the example shown in Figure 168(B), the ROM area 2202a within the used area is the region from address "0000"H to address "1FF0"H, and the ROM area 2202b outside the used area is the region from address "2000"H to address "3DF0"H.

Furthermore, the program area 2102a within the usage area stores control programs for various processes executed by the main CPU 2101 in control processes related to the progress and gameplay of the game. The data area 2102b within the usage area stores various data used by the main CPU 2101 in control processes related to the progress and gameplay of the game (for example, data tables such as the internal lottery table (see Figure 10), data for sending various control commands to the sub-control circuit 2200 (corresponding to the sub-control circuit 200 in the first embodiment)).

In other words, the ROM area 2202a within the usage area, which consists of a program area 2102a and a data area 2102b within the usage area, stores various programs and data necessary for control processing (processing related to gameplay) that players actually perform in a game parlor.

Furthermore, the out-of-use ROM area 2202b, which consists of the out-of-use program area 2102c and the out-of-use data area 2102d, stores control programs and data for various processes that do not directly involve the game (progress and gameplay) performed by the player (processes that do not affect gameplay). For example, it stores programs and data used in the certification test (test firing test) of the gaming machine, control programs and data used in checksum generation processing during power outages and checksum checking processing during power restoration, as well as anti-fraud programs and their necessary data.

In the memory map of the main RAM 2103, as shown in Figure 168(C), the working area within the used area 2103a, the stack area within the used area 2103b, the unused area, the working area outside the used area 2103c, and the stack area outside the used area 2103d are arranged in this order at predetermined addresses, starting from the beginning of the address of the main RAM 2103 ("F000" H). Furthermore, the working area within the used area 2103a and the stack area within the used area 2103b are collectively designated as the RAM area within the used area 2203a, and the working area outside the used area 2103c and the stack area outside the used area 2103d are collectively designated as the RAM area outside the used area 2203b.

In this embodiment, as described above, an unused area of a predetermined size (for example, 16 bytes) is provided between the RAM area 2203a within the used area and the RAM area 2203b outside the used area.

The work area 2103a and the stack area 2103b within the usage area temporarily store various data (various random values, internal winning combinations, etc.) determined by the execution of control programs related to the game (progress and gameplay) performed by the player.

Furthermore, the non-used work area 2103c and the non-used stack area 2103d are work areas for various processes that do not directly involve the game (game progression and gameplay) performed by the player. In this embodiment, various processes that do not directly involve the game, such as sum check processing, performed by the player are executed using this non-used RAM area 2203b.

As described above, in the pachislo machine 2001 of this embodiment, various programs and data (tables) used for various processes that do not directly involve the game performed by the player are stored in the main ROM 2102 in the non-used ROM area 2202b, which is located at an address different from the used ROM area 2202a. Furthermore, these various processes that do not directly involve the game performed by the player are carried out in the main RAM 2103 using the non-used RAM area 2203b, which is located at an address different from the used RAM area 2203a.

In this configuration of the main ROM 2102, programs and data unnecessary for the actual gameplay performed by the player can be placed in another area (out-of-use ROM area 2202b), thereby avoiding pressure on the capacity of the in-use ROM area 2202a, which is set up as the game area.

Furthermore, in this embodiment, as described above, the processing related to bank 0 and the processing related to bank 1 can be switched by switching banks. Here, the processing related to bank 0 uses the program and data stored in the ROM area 2202a within the usage area of the main ROM 2102, and performs calculation processing to control the game operations performed by the player, while temporarily utilizing the RAM area 2203a within the usage area of the main RAM 2103. In other words, the processing related to bank 0 can also be said to be the processing related to the game area (ROM area 2202a and RAM area 2203a within the usage area). The main register and sub-register used at this time are the bank 0 registers explained in Figure 167.

On the other hand, the processing related to Bank 1 uses the program and data stored in the ROM area 2202b outside the main ROM 2102's usage area, and temporarily utilizes the RAM area 2203b outside the main RAM 2103's usage area to perform processing that is not directly related to the game performed by the player (arithmetic processing for processing other than the game). In other words, the processing related to Bank 1 can also be described as processing related to the areas outside the usage area (the ROM area 2202b and the RAM area 2203b outside the usage area). Furthermore, the main register and sub-register used at this time are the Bank 1 registers explained in Figure 167.

Furthermore, the processing related to Bank 0 (processing related to the game area) is initiated by a program stored in the program area 2102a within the usage area of the main ROM 2102. This processing references data stored in the data area 2102b within the usage area of the main ROM 2102, and further uses the work area 2103a within the usage area of the main RAM 2103 to reference and update data. However, it may also reference data stored in the work area 2103c or other areas outside the usage area of the main RAM 2103.

Similarly, processing related to Bank 1 (processing related to areas outside the main memory area) is initiated by a program stored in the program area 2102c outside the main ROM 2102's usage area. This processing references data stored in the data area 2102d outside the main ROM 2102's usage area, and further uses the work area 2103c outside the main RAM 2103's usage area to reference and update data. However, it may also reference data stored in the work area 2103a, etc., within the main RAM 2103's usage area.

Switching from processing on bank 0 to processing on bank 1 is done, for example, by executing a specific call instruction (e.g., "CALLEX") on a predetermined subprogram (also called a "subroutine"). Returning from processing on bank 1 to processing on bank 0 is done, for example, by executing a specific return instruction (e.g., "RETEX") in the predetermined subprogram called by the aforementioned specific call instruction.

Furthermore, Figure 168 schematically illustrates the memory regions, and the configuration of the present invention is not limited to the exemplified addresses or the apparent size (capacity) of each region.

(Interrupt enable register)
Next, we will explain in more detail the interrupt enable register 1 and interrupt enable register 2 shown in Figure 167.

Interrupt enable register 1 determines whether to enable or disable maskable interrupts, which can be controlled to prevent interrupt processing for specific interrupt sources, based on its value and the interrupt source mask. Interrupt enable register 2 is used to reset the value of interrupt enable register 1 after non-maskable interrupt processing, which cannot be controlled to prevent interrupt processing for specific interrupt sources.

Furthermore, regarding the interrupt enable register 2, in addition to the return from non-maskable interrupt processing as described above, if a call instruction for processing in an area outside the usage area (for example, the ROM area 2202b or RAM area 2203b outside the usage area) (hereinafter referred to as the "outside usage area processing call instruction") is executed, and then an instruction to return from processing in the usage area (for example, the ROM area 2202a or RAM area 2203a inside the usage area) (hereinafter referred to as the "in-usage area processing return instruction") is issued, the value previously stored in the interrupt enable register 2 is copied to the interrupt enable register 1 (the value of the interrupt enable register 2 is restored to the interrupt enable register 1).

Furthermore, when a non-maskable interrupt is received, or when an out-of-use area processing call instruction is executed, the value of interrupt enable register 1 is cleared (the value becomes "0"), and as a result, maskable interrupts are disabled while that value is maintained.

Furthermore, the value of interrupt enable register 2 is stored in the parity/overflow flag of the flag register (F register) by a predetermined instruction, allowing the value of interrupt enable register 2 to be referenced or temporarily saved.

Furthermore, when an interrupt enable instruction is executed, the value of interrupt enable register 1 becomes "1," representing interrupt enablement, and simultaneously, the value of interrupt enable register 2 also becomes "1," representing interrupt enablement. In this way, when an interrupt enable instruction is executed, maskable interrupts are enabled. Conversely, when an interrupt disable instruction is executed, the value of interrupt enable register 1 becomes "0," representing interrupt disablement, and simultaneously, the value of interrupt enable register 2 also becomes "0," representing interrupt disablement.

(Interrupt handling)
Next, an overview of the external maskable interrupt processing when a power outage is detected in this embodiment will be described with reference to Figure 169.

The main CPU 2101, upon receiving an interrupt request signal from an external terminal (XINT terminal) via the parallel input port 2111, starts a program using the entry address of the configuration area associated with this external terminal as the starting address. This program is an external maskable interrupt handler. This configuration area also contains data indicating the priority of the interrupt handler. For example, the entry address is stored in the upper bits of the configuration area, the priority data is stored in the lower bits, and at least one "0" is placed between the entry address and the priority data.

Furthermore, in this embodiment, when a timer interrupt signal is received from the timer counter (e.g., timer counter PTC2) of the timer circuit 2113, a program is started using the entry address of the setting area associated with this timer counter as the start address. This program is the system timer interrupt handler. This setting area also contains data indicating the priority of the interrupt handlers. For example, the entry address is stored in the upper bits of the setting area, the priority data is stored in the lower bits, and at least one "0" is placed between the entry address and the priority data.

Thus, for each interrupt source, such as external interrupts from an external terminal (XINT terminal) or timer interrupts from a timer counter, the aforementioned setting area is provided. The data stored in the corresponding setting area defines the entry address of the processing program executed in response to the interrupt, as well as the interrupt priority.

When the external maskable interrupt processing described above is initiated, the main CPU 2101 checks a predetermined address of the parallel input port 2111 to determine whether or not a power outage signal has been received. This process determines whether or not the interrupt cause is a power outage. If a power outage signal is received, the interrupt mask register is updated with an interrupt cause mask as shown in Figure 169(A), and the predetermined interrupt cause is masked.

Here, the interrupt mask register, according to the interrupt source mask shown in Figure 169(A), is initially configured after power-on to accept interrupts caused by, for example, the timer counter (timer counter interrupt) and interrupts caused by power outages (power outage interrupt). The corresponding bits (for example, bit positions 2 and 3 in bits 0-7) are set to "0". Then, in the external maskable interrupt processing described above, when a power outage occurs, bit positions 2 and 3 of the interrupt mask register are set to "1".

By setting bit positions 2 and 3 of the interrupt mask register to "1" in this way, the main CPU 2101 is controlled to no longer accept timer counter interrupts or power-off interrupts (i.e., external maskable interrupt processing and system timer interrupt processing are prevented from starting anew).

Next, the external maskable interrupt handler sets the XINT detection flag, indicating that a power outage has occurred. Then, the contents of this XINT detection flag are referenced to determine whether a power outage has occurred. If a power outage has occurred, the power outage interrupt handler (see Figure 190) is executed.

Figure 169(B) shows the interrupt initialization data stored in the program management area, which stores the information necessary for the main CPU 2101 to execute a program. This data stores the interrupt priority settings.

Figure 169(C) shows the priority order for each interrupt source when the interrupt priority setting is "01". As shown in Figure 169(B), when the interrupt priority setting is bit "01", the timer counter interrupt (interrupt from the timer counter PTC2) is set to have a higher interrupt priority than the power interrupt (interrupt from a signal from the XINT terminal). This priority order changes accordingly when the setting value is changed. Furthermore, in this embodiment, it is not necessary to define the priority setting in the program.

Furthermore, in the interrupt mask register shown in Figure 169(A), each bit is associated with an interrupt source. Here, the interrupt sources shown in Figure 169(C) are associated in descending order of priority, from bit position 0 to bit position 5. Specifically, bit position 0 of the interrupt mask register is associated with the interrupt from timer counter PTC0, bit position 1 with the interrupt from timer counter PTC1, bit position 2 with the interrupt from timer counter PTC2, bit position 3 with the external interrupt from the external terminal (XINT terminal), bit position 4 with the interrupt from asynchronous serial transmission/reception 0, and bit position 5 with the interrupt from asynchronous serial transmission/reception 1. Bit positions 7 and 6 are unused.

As described above, this embodiment assumes the occurrence of timer counter interrupts and power-off interrupts. However, as described above, it can handle at least the factors related to interrupts from multiple timer counters, interrupts from multiple asynchronous serial transmissions and receptions, and external interrupts input via the XINT terminal.

This configuration, utilizing an interrupt mask, allows for the restriction of other interrupts occurring after a power outage. This eliminates the need to write branch instructions for handling those other interrupts, resulting in a simpler program structure and a smaller program size.

Furthermore, by using an interrupt source mask configuration, it is possible to restrict the occurrence of other interrupts after a power outage occurs. This allows for prompt execution of processes related to the power outage after detection, eliminating the need to consider the timing and order of execution in relation to other interrupt-related processes.

Thus, by adjusting the bit position where "1" is set in the interrupt mask register, it is possible to control whether or not to detect the occurrence of each interrupt cause. For example, after an external maskable interrupt process is executed due to power outage detection, it is possible to control the system to allow interrupt processing related to a specific interrupt cause.

(Processing by the main control circuit)
Next, referring to Figures 170 to 192, the contents of the various processes executed by the main CPU 2101 of the main control circuit 2100 using each program will be explained. In the explanation of the various processes described below, a specific example of the processing content will be explained using the specifications of the pachislo machine 2001, but the processing content of the various processes described below is not limited to this.

First, referring to Figure 170, the main processing (main operation processing) executed by the main CPU 2101 of the main control circuit 2100 will be described. Figure 170 is a flowchart showing an example of the main processing procedure, and generally corresponds to the flow shown in Figure 23 of the first embodiment described above. Similar processing will be omitted from explanation as appropriate. Figure 170 also shows the power-on processing that is executed prior to the start of the main processing.

First, when power is supplied to the pachislo machine 1 (when the power is turned on), the main CPU 2101 performs power-on processing (step S2001). This processing involves various operations necessary for power-on. Details of the power-on processing will be described later.

Next, the main CPU 2101 performs the initialization process at the end of one game (step S2002). During this process, the transmission standby & RAM initialization subprogram is called, where untransmitted data is retrieved and the specified storage area in the main RAM 2103 is cleared. Details of the processes executed by the transmission standby & RAM initialization subprogram will be described later.

Next, the main CPU 2101 performs a medal reception and start check process (step S2003). This process checks the input status of the medal sensor, bet switch, and start switch (for example, the components corresponding to the medal sensor 31S, bet switch 6S, and start switch 7S in the first embodiment), and performs various necessary processes at the start of gameplay. This medal reception and start check process is the same as the medal reception and start check process in the first embodiment (see step S3 in Figure 23 and Figure 25).

Next, the main CPU 2101 performs a random value acquisition process (step S2004). This process extracts random values for role draws (e.g., in the range of 0 to 65535) and random values for various draws related to gameplay (other random values for draws) (e.g., in the range of 0 to 65535 or 0 to 255), and stores the extracted random values in a random value storage area (not shown) provided in the main RAM 2103. Note that the methods for acquiring the various random values are not limited to those described above. The required number of random values can be acquired as needed from predetermined numerical ranges (e.g., the range of 0 to 65535, 0 to 32767, 0 to 255, or 0 to 127, etc.). This random value acquisition process will be described later.

Next, the main CPU 2101 performs internal lottery processing (step S2005). This process involves various operations necessary to determine the internal winning combination based on the internal lottery table and random values for winning combinations, depending on the current game state. Details of the internal lottery processing will be described later.

Next, the main CPU 2101 performs a game start state control process (step S2006). In this process, for various game states, if a transition condition is met at the start of the game (for example, based on a determined internal winning combination), the system performs various processes necessary to transition the game state according to the met transition condition, or to manage the game duration of the current game state. This game start state control process is the same as the game start state control process in the first embodiment (see step S6 in Figure 23 and Figure 27).

Next, the main CPU 2101 performs a start command generation and storage process (step S2007). This process generates data for the start command to be transmitted to the sub-control circuit 2200 and stores the generated data in a communication data storage area (not shown) provided in the main RAM 2103. The data stored in the communication data storage area is transmitted from the main control circuit 2100 to the sub-control circuit 2200 during the communication data transmission process executed by the periodic interrupt processing described later. The generation, storage, and transmission methods for other command data are basically the same. This start command generation and storage process is the same as the start command generation and storage process in the first embodiment (step S7 in Figure 23).

Next, the main CPU 2101 performs interface 2 output processing (step S2017). In this process, the interface output processing stored in the program area 2102c outside the used area is called. After generating the transmission data, the generated data is output to interface 2 (I/F2) via serial communication. Details of the interface 2 output processing will be described later.

Next, the main CPU 2101 performs the main-side performance control processing at the start of the game (step S2008). In this process, if various performances are to be performed by the main control circuit 2100 (main side) at the start of the game, the CPU performs the necessary processing to execute those performances. For example, if a predetermined performance (e.g., a "lock performance," "freeze performance," or "simulated game" using reels 3L, 3C, and 3R) is to be performed at the start of the game, the CPU controls the execution of that performance. Furthermore, if this includes a simulated game, the CPU controls the progress of the simulated game (or the notification related to the simulated game). Note that this main-side performance control processing at the start of the game is the same as the main-side performance control processing at the start of the game in the first embodiment (step S8 in Figure 23).

Next, the main CPU 2101 performs the initial reel stop setup process (step S2009). In this process, various information necessary for stop control, such as the type of stop table and the type of reel pull-in priority table to be used in the current game, is set based on the internal winning combination and game state. This initial reel stop setup process is the same as the initial reel stop setup process in the first embodiment (step S9 in Figure 23).

Next, the main CPU 2101 performs a reel rotation start process (step S2010). This process requests the rotation start of all reels. Once the rotation start of all reels is requested, the reel control process (see, for example, the process in step S203 in Figure 32 of the first embodiment) controls the drive of each stepping motor (for example, the stepping motors corresponding to 51L, 51C, and 51R in the first embodiment), and the rotation of each reel (for example, the reels corresponding to 3L, 3C, and 3R in the first embodiment) begins. Each reel that has started rotating is accelerated until its rotation speed reaches a constant speed, and then that constant speed is maintained. Although details are omitted, a reel rotation start command generation and storage process is also performed during this process. Note that this reel rotation start process is the same as the reel rotation start process in the first embodiment (step S10 in Figure 23).

Next, the main CPU 2101 performs a reel pull-in priority storage process (step S2011). In this process, for each symbol (symbol position) on the rotating reels (in this case, all reels), data indicating the reel pull-in priority is obtained by referring to the set internal winning combination and the set reel pull-in priority table, and stored in the reel pull-in priority data storage area (not shown). Although not shown, a symbol code storage process is performed prior to this process. This reel pull-in priority storage process is the same as the reel pull-in priority storage process in the first embodiment (step S11 in Figure 23).

Next, the main CPU 2101 performs reel stop control processing (step S2012). This processing involves performing various operations necessary to stop the rotation of the corresponding reel based on the determined internal winning combination (or the information related to various stop controls set accordingly) and the stop operation patterns of each stop button (for example, the stop buttons corresponding to 8L, 8C, and 8R in the first embodiment). This reel stop control processing is similar to the reel stop control processing in the first embodiment (see step S12 in Figure 23 and Figure 29).

Next, the main CPU 2101 performs a prize activation determination process (step S2013). This process determines whether the combination of symbols displayed on the active line is one of the combinations defined in the symbol combination table. For example, it determines whether there is a bit containing "1" in the prize activation flag storage area. Although details are omitted, this process also includes the generation and storage of a prize activation command. This prize activation determination process is the same as the prize activation determination process in the first embodiment (step S13 in Figure 23).

Next, the main CPU 2101 performs a medal count abnormality detection process (step S2018). In this process, the CPU calculates the difference (difference) between the number of medals detected inside the selector (for example, the selector corresponding to selector 31 in the first embodiment) and the number of medals counted at the selector's exit. It then determines whether this difference is within an acceptable range. Details of the medal count abnormality detection process will be described later.

Next, the main CPU 2101 performs the medal payout and re-play activation process (step S2014). In this process, if the combination of symbols determined in the aforementioned prize activation determination process is a combination of symbols related to a minor win, the corresponding number of medals are paid out. If the combination of symbols is related to a replay win, various processes necessary to activate re-play in the next game are performed. For example, if the combination of symbols determined in the aforementioned prize activation determination process is a combination of symbols related to a replay win, the system sets a value equal to the number of bets in the current game to the automatic medal counter described later. Furthermore, in this process, a medal payout signal corresponding to the number of medals to be paid out is output from the external centralized terminal board (for example, the external centralized terminal board corresponding to the external centralized terminal board 55 in the first embodiment). Details of the medal payout and re-play activation process will be described later.

Next, the main CPU 2101 performs the payout ratio monitor aggregation start process (step S2019). In this process, data for calculating various percentage information related to the game, displayed on the payout ratio monitor device (for example, the payout ratio monitor device corresponding to the payout ratio monitor device 54 in the first embodiment), is stored in the aggregation storage device. Details of the payout ratio monitor aggregation start process will be described later.

Next, the main CPU 2101 performs a game end state control process (step S2015). In this process, for various game states, when the game ends, if a transition condition is met (for example, based on the combination of displayed symbols), the system performs various processes necessary to transition the game state according to the met transition condition, or to manage the duration of the current game state. This game end state control process is the same as the game end state control process in the first embodiment (see step S15 in Figure 23 and Figure 30).

Next, the main CPU 2101 performs a BB (Special Prize) game count check process (step S2020). This process determines the end of the BB (Special Prize) operation and sets the "BB (Special Prize) end clear address" as the RAM initialization address. Here, the BB (Special Prize) game count is, for example, the number of games played in the BB state in the first embodiment. After that, in step S2020, the transmission standby & RAM initialization process and the specified RAM initialization process are executed. Details of the BB (Special Prize) game count check process, transmission standby & RAM initialization process, and specified RAM initialization process will be described later.

Next, the main CPU 2101 performs the main-side performance control processing at the end of the game (step S2016). In this process, if various performances are to be performed by the main control circuit 2100 (main side) when the game ends, the CPU performs the necessary processing to execute those performances. For example, if a predetermined performance is to be performed at the end of the game, the CPU controls the execution of that predetermined performance. Furthermore, if this includes a simulated game, the CPU controls the progress of the simulated game (or the notification related to the simulated game). Note that this main-side performance control processing at the end of the game is the same as the main-side performance control processing at the end of the game in the first embodiment (step S16 in Figure 23).

Thus, in the pachislo machine 2001, the processes described in steps S2002 to S2020 control one unit of gameplay, and the progress of the game is controlled by repeating these processes. It should be noted that other processes may be performed as needed, and some of these processes may be omitted. In other words, the various processes described above are merely examples.

(Power-on processing)
Next, with reference to Figure 171, the power-on processing performed by the main CPU 2101 will be described. Figure 171 is a flowchart showing the processing procedure for power-on processing. As explained in Figure 170, this power-on processing is called and executed immediately after power-on, before the main processing in the main CPU 2101 (step S2001 in Figure 170).

During power-on processing, the first step is to call the CRC check process (outside the used area) to perform a CRC check on the main RAM 2103 (step S2031). Note that in Figure 171, this process in step S2031 is labeled "CRC check process (outside the used area)," but the "outside the used area" in parentheses indicates that the "CRC check process" program is stored in the program area 2102c outside the used area of the main ROM 2102 (hereinafter, the notation (outside the used area) after "...process" will be used with the same meaning). Furthermore, if the subprogram executing this process is called from a program stored in the program area 2102a within the used area in step S2001 of Figure 170, for example, it is called by "CALLEX" and returns to the calling program by "RETEX."

Furthermore, the CRC inspection process targets the main RAM 2103, specifically the working area 2103a within the used area, the stack area 2103b within the used area, and the working area 2103c outside the used area.

The CRC inspection process stores data indicating one of three states (game recovery impossible state 1 (CRC abnormality), game recovery impossible state 2 (power outage abnormality), and game recovery possible state (normal)) in the game recovery state storage area, based on the inspection results. Details of the CRC inspection process will be described later.

Next, in step S2032, the RAM initialization address is set to the "RAM error clear address" related to the RAM area 2203a within the used area. Here, it is determined whether data indicating a game recovery impossible state (i.e., game recovery impossible state 1 or game recovery impossible state 2) is stored in the game recovery state storage area, and whether "recovery impossible" is set in the game recovery impossible error flag (step S2033). If data indicating a game recovery impossible state is not stored in the game recovery state storage area or the game recovery impossible error flag (No. in step S2033), in step S2034, the RAM initialization address is set to the "setting change clear address" related to the RAM area 2203a within the used area, and the process proceeds to step S2035.

If data indicating a game recovery impossible state is stored in the game recovery status storage area or the game recovery impossible error flag (Yes in step S2033), the process in step S2034 is skipped and the process proceeds to step S2035.

Next, in step S2035, it is determined whether the setting change condition is met, that is, whether the operation to change the setting has been performed. If the setting key-type switch (for example, the switch corresponding to the setting key-type switch 52 of the first embodiment) is turned ON by the manager of the amusement parlor (to perform the setting change process) by inserting the setting key into the keyhole and turning it to the left (from the initial position), and the door opening/closing monitoring switch (for example, the switch corresponding to the door opening/closing monitoring switch 56 of the first embodiment) is turned ON, and the lower door mechanism (for example, the lower door mechanism corresponding to the lower door mechanism DD of the first embodiment) is in the open state, and the power is turned on in a state where the main CPU 2101 can detect the ON state (Yes in step S2035), then in step S2036, the specified RAM initialization process is called to initialize the main RAM 2103.

On the other hand, if the Yes condition in step S2035 described above is not met, and data indicating a game recovery impossible state (i.e., game recovery impossible state 1 (CRC abnormality) or game recovery impossible state 2 (power outage abnormality)) is stored in the game recovery status storage area (No. 1 in step S2035), then the game recovery impossible error flag in the out-of-use area work area 2103c is set to data indicating "recovery impossible," and the game recovery impossible error processing is called. Details of the game recovery impossible error processing will be described later.

Furthermore, if the Yes condition in step S2035 described above is not met, and data indicating a play recovery possible state (i.e., a play recovery possible state (normal)) is stored in the game recovery state storage area (No. 2 in step S2035), the game recovery process is called. The game recovery process corresponds to, for example, the game recovery process in the first embodiment (step S29 in Figure 24), and performs a process to restore the game state to the state before the power outage detection.

If the "Yes" condition in step S2035 described above is met, the specified RAM initialization process is called in step S2036. In this case, the specified RAM initialization process is called with the "clear address when settings are changed" set as the RAM initialization address. This specified RAM initialization process initializes the main RAM 2103, including the working area within the used area 2103a and the working area outside the used area 2103c. Details of the specified RAM initialization process will be described later.

Next, in step S2037, a setting change process is executed. In this process, for example, the setting value of the pachislo machine 2001 (for example, one of six settings, from setting 1 to setting 6) is changed using the setting key-type switch described above. This setting change process is the same as the setting change described for pachislo machine 1 in the first embodiment.

Next, in step S2038, the "clear address when settings are changed" related to the RAM area 2203a within the used area is set as the RAM initialization address, and in step S2039, the transmit standby & RAM initialization process is called. Details of the transmit standby & RAM initialization process will be described later.

(CRC testing process (outside of usage area))
Next, with reference to Figure 172, the CRC check process (outside the used area) executed by the main CPU 2101 will be described. Figure 172 is a flowchart showing the processing procedure for the CRC check process (outside the used area). As mentioned above, this CRC check process (outside the used area) is the process called by "CALLEX" in the program at step S2031 in Figure 171.

In the CRC check process (outside the used area), first, in step S2051, the stack pointer is set to the out-of-used stack area, and the calling program counter is stored in that area. Specifically, the stack pointer (SP) provided in the register of bank 1 is set to the stack start address ("F400"H) of the out-of-used stack area 2103d. Furthermore, from the time of the call via "CALLEX" to the return to the caller via "RETEX," the stack pointer (SP) in the bank 1 register is used, and the stack area used is the out-of-used stack area 2103d.

Next, in step S2052, the CRC calculation process (outside the used area) is called, where the CRC calculation is performed on the working area 2103a within the used area and the working area 2103c outside the used area, etc. Although this process is labeled "CRC calculation process (outside the used area)," the "outside the used area" in parentheses indicates that the "CRC calculation process" program is stored in the program area 2102c outside the used area of the main ROM 2102. Furthermore, the subprogram that executes this process is called in step S2052 of Figure 172, for example, by "CALL" in the program, and returns to the calling program with "RET".

As described above, the CRC calculation process (outside the used memory area) is called using a normal "CALL" command, etc., and "CALLEX" is not used. This is because both the calling program (CRC check process (outside the used memory area)) and the program for this process are stored in the out-of-use program area 2102c of the main ROM 2102, and there is no bank switching.

Next, in step S2053, data indicating the game recovery impossible state 1 (data representing a CRC abnormality) is set in a predetermined area, and in step S2054, the CRC value at the time of the power outage is obtained. In this embodiment, when a power outage occurs, the same processing as the CRC calculation process (outside the usage area) described above is performed, and the CRC value for the main RAM 2103 immediately before the power is turned off is stored. This CRC value is obtained from the CRC value storage area 2103e of the out-of-usage work area 2103c, and the CRC calculation at the time of the power outage is performed with respect to the out-of-usage work area 2103c, excluding its CRC value storage area 2103e.

Next, in step S2055, the difference between the calculation result (CRC16 calculation result) obtained in the CRC calculation process (outside the used area) and the CRC value obtained in step S2054 is calculated, and in step S2056, it is determined whether the calculation result is 0 or not.

If the calculation result is 0, that is, if the calculation result obtained by the CRC calculation process (outside the used area) (CRC16 calculation result) matches the CRC value obtained in step S2054 (Yes in step S2056), then in step S2057, data indicating the game recovery impossible state 2 (data indicating an abnormal power outage) is set in the predetermined area. If they do not match (No in step S2056), the process proceeds to step S2060.

Next, in step S2058, it is determined whether the power outage flag is on or off. In this embodiment, when a power outage occurs, the power outage flag is set to on in step S2471 of the CRC generation process (outside the usage area) (step S2455 in Figure 190), which is called by the power outage interrupt process. If the power outage flag is on (Yes in step S2058), in step S2059, data indicating the game recovery possible state (data representing normal) is set in a predetermined area. If the power outage flag is not on (No in step S2058), that is, if the above-mentioned CRC generation process (outside the usage area) is not performed in the power outage interrupt process, the process proceeds to step S2060, and finally, the contents of the power outage abnormality (game recovery impossible state 2) are stored in the game recovery state storage area.

Finally, in step S2060, the data (state) set in the predetermined area is stored in the game recovery state storage area. At this point, the power outage flag is set to off. Then, using "RETEX," the program returns to the next address of the calling program counter saved in the stack area outside the used area, and the execution of the original program continues.

If the CRC calculation results from this CRC inspection process (outside the usage area) do not match between the time of power outage and power-on, the game will enter state 1 (CRC abnormality), even if the CRC calculation results match. If the power outage flag is not on, the game will enter state 2 (power outage abnormality), and under all other conditions, the game will enter state 4 (normal).

(CRC calculation processing (outside used area))
Next, with reference to Figure 173, the CRC calculation process (outside the used area) executed by the main CPU 2101 will be explained. Figure 173 is a flowchart showing the processing procedure for the CRC calculation process (outside the used area). As mentioned above, this CRC calculation process (outside the used area) is called in the program by "CALL" or the like at step S2052 of the CRC check process (outside the used area) in Figure 172. The program that executes this CRC calculation process (outside the used area) is a "normal subroutine" that is called from the "CRC check process (outside the used area)" stored in the out-of-used program area 2102c and always returns to the CRC check process (outside the used area). In addition, any program stored in the out-of-used program area 2102c that is called from another program also stored in the out-of-used program area 2102c and always returns to the calling program is also a "normal subroutine".

In the CRC calculation process (outside the usage area), first, in step S2081, the CRC register port (the address assigned to the "Function Register" in Figure 168(A)) is set. For example, the port number for outputting the CRC calculation target data to the CRC circuit 2107c is set, for example, in the C register. Next, in step S2082, the number of CRC calculation bytes in the usage area's work area 2103a is set, for example, in the B register, and then, in step S2083, the starting address of the usage area's work area 2103a is set, for example, in the HL register. Here, the number of CRC calculation bytes set in the B register is the data size subject to CRC calculation in the usage area's work area 2103a. Note that in the microprocessor 2100 used in this embodiment, all input/output ports to each circuit built into the microprocessor 2100 are assigned addresses to the "Function Register" in Figure 168(A).

Next, the main CPU 2101 outputs data identified by the number of CRC calculation bytes and the starting address to the CRC circuit 2107c (step S2084). This process is performed, for example, by the OTIR instruction. The OTIR instruction writes the contents of the area specified by the HL register to the input/output ports specified by the C register and the U register (addresses assigned to the "function registers" in Figure 168(A) on the main CPU 2101 side), then subtracts 1 from the contents of the B register, adds 1 to the contents of the HL register, and repeats this process until the B register becomes 0, outputting the CRC calculation target data to the CRC circuit 2107c. The CRC circuit 2107c then performs the CRC calculation on the received CRC calculation target data. When the output of the data subject to the CRC calculation is complete, the B register becomes 0, and the HL register becomes the starting address of the stack area 2103b within the usage area (for example, the address of the last address of the working area 2103a within the usage area + 1).

Next, in step S2085, the main CPU 2101 sets the number of CRC calculation bytes in the stack area 2103b within the usage area to the B register and outputs the data identified by the above-mentioned starting address to the CRC circuit 2107c (step S2086). This output process is the same as the process described above for outputting the CRC calculation target data in the working area 2103a within the usage area using the OTIR instruction. Through this process, the CRC target data in the stack area 2103b within the usage area is output to the CRC circuit 2107c, and a CRC calculation is performed on this data. At this time, the CRC calculation by the CRC circuit 2107c is performed continuously from the CRC calculation related to the CRC calculation target data in the working area 2103a within the usage area.

Subsequently, the CRC calculation is performed on the out-of-use work area 2103c in a similar manner. Specifically, in step S2087, the number of CRC calculation bytes for the out-of-use work area 2103c is set in the B register; in step S2088, the starting address of the out-of-use work area 2103c is set in the HL register; and in step S2089, the data identified by the above-mentioned number of CRC calculation bytes and starting address is output to the CRC circuit 2107c, for example, using the OTIR instruction described above. Afterward, the CRC calculation is performed on this data. At this time, the CRC calculation by the CRC circuit 2107c is performed continuously from the CRC calculation on the CRC target data in the stack area 2103b within the used area.

In this case, the CRC value storage area 2103e, where the CRC value obtained from the CRC calculation at the time of a power outage is stored, is excluded from the range of the out-of-use work area 2103c where the CRC calculation is performed. For example, the CRC value storage area 2103e is placed at the last address of the out-of-use work area 2103c, and the number of CRC calculation bytes is adjusted so that the data subject to the CRC calculation extends up to the address before that last address. The reason for this configuration is that, at the time of a power outage, the calculation result of the CRC calculation, including the out-of-use work area 2103c, is stored in the CRC value storage area 2103e of the out-of-use work area 2103c after the CRC calculation.

Subsequently, in step S2090, the system waits for the calculation to be completed by the CRC circuit 2107c (1 to 5 cycles). In step S2091, the CRC calculation result (the calculation result of CRC 16) is obtained from the CRC circuit 2107c, and the process ends. Here, the CRC calculation result is received, for example, from a predetermined parallel input port related to the CRC circuit 2107c and set, for example, in the HL register.

(Error handling for game recovery (out of used area))
Next, with reference to Figure 174, the game recovery impossible error processing (outside the used area) executed by the main CPU 2101 will be explained. Figure 174 is a flowchart showing the processing procedure for the game recovery impossible error processing (outside the used area). As mentioned above, this game recovery impossible error processing (outside the used area) is called (for example by CALLEX) when the determination in step S2035 of Figure 171 is No_1, that is, when no setting change operation is performed when the power is turned on, and data indicating game recovery impossible state 1 (CRC abnormality) or game recovery impossible state 2 (power outage abnormality) is stored in the game recovery state storage area.

In this embodiment, the game recovery impossible error processing (outside the usage area) is executed by a program stored in the program area 2102c outside the usage area of the main ROM 2102. However, it may also be configured to be executed by a program stored in the program area 2102a within the usage area.

Furthermore, the error handling for game recovery being impossible (outside the used area) is also called from the internal lottery process of the main process (step S2005), which will be described later (for example, by CALLEX).

The "Game Recovery Impossible" error is an error that cannot be resolved without turning off the power and changing the settings. If the power is turned on without changing the settings, the "Game Recovery Impossible" error processing (outside the usage area) will occur, and the transmission of communication data will be postponed, resulting in a standby state. This processing is the same as the power-on error processing shown in step S30 of Figure 24 of the first embodiment.

In the error handling for game recovery impossible (outside the usage area), first, in step S2111, interrupt disabling is set, thereby suppressing the occurrence of power-off interrupt processing, etc. Next, in step S2112, coin insertion (and betting operations) are prohibited. Note that in the case of coinless machines, only betting operations are prohibited.

Next, in step S2113, the system is configured to display the fact that a game recovery error has occurred on the information display device (for example, the display device using the 7-segment LED of the information display device 14 in the first embodiment).

Next, in step S2114, the WDT2106b of the reset controller 2106 is reset (cleared). This process returns the WDT2106b to its initial value and restarts counting. Since another reset is performed immediately afterward in step S2114, the process triggered by the WDT2106b reaching a predetermined count value (restart due to reset) is not initiated.

In step S2115, the remaining communication data transmission carryover control is performed. This carryover control is a process that, if communication data is stored in the communication data storage area at the time a game recovery impossible error is detected, causes the stored communication data to be transmitted to the sub-control circuit 2200 immediately after power is restored. Specifically, the process of decrementing the transmission interval timer value by 1 is repeated in an infinite loop until the transmission interval timer value immediately becomes 0 (however, it is never decremented to a negative value).

In this embodiment, in the communication data transmission process of the periodic interrupt processing described later, communication data is transmitted to the sub-control circuit 2200 at regular intervals (for example, approximately 8 msec). Therefore, a predetermined value is set in the transmission interval timer, and then the value of the transmission interval timer is decremented by 1 at each interval. When the value becomes 0, the unsent communication data is transmitted.

However, if a game recovery error is detected, as described above, interrupts are disabled in step S2111. Therefore, in the periodic interrupt processing, the transmission of communication data stored in the communication data storage area is stopped, and the transmission of the remaining communication data is postponed. Subsequently, the power is turned off and on, and when the setting change process is performed, the transmission interval timer value is set to 0. Therefore, the unsent communication data is immediately transmitted to the sub-control circuit 2200. Here, the communication data transmitted to the sub-control circuit 2200 includes, for example, various control commands related to game effects and data related to those commands.

Furthermore, even if the power is turned off during the infinite loop of the game recovery impossible error processing (outside the usage area) (the process of infinitely repeating steps S2114 and S2115), because interrupts are disabled in step S2111 of the game recovery impossible error processing (outside the usage area), the power-off interrupt processing does not occur. Therefore, even if the system is turned off (no setting change processing is performed) without operating the setting key, and then the power is turned on, the data indicating the game recovery impossible state (i.e., game recovery impossible state 1 (CRC abnormality) or game recovery impossible state 2 (power-off abnormality)) remains stored in the game recovery state storage area. Immediately after the power is turned on, the above infinite loop occurs again, and the system enters a standby state.

Therefore, if the setting change process is not performed, the machine cannot transition to normal operation. If the setting change process is performed, the communication data stored in the communication data storage area is cleared, and any untransmitted communication data stored in the communication data storage area before the game recovery error occurs is discarded. This game recovery error processing (outside the used area) enables effective restart management in the pachislo machine 2001 of this embodiment.

(BB (Special Prize) game count check process, transmission waiting & RAM initialization process, specified RAM initialization process)
Next, with reference to Figures 175 and 176, the three processes executed by the main CPU 2101 (namely, the BB (special prize) game count check process, the transmission waiting & RAM initialization process, and the specified RAM initialization process) will be explained.

Figures 175 and 176 are flowcharts illustrating the processing steps for the three processes described above, representing a single subprogram consisting of a series of consecutive program codes. These flowcharts include two termination symbols (rounded rectangles labeled "RET") and three start symbols (other rounded rectangles not labeled "RET," namely, "BB (Special Prize) Game Count Check Process," "Send Wait & RAM Initialization Process," and "Specified RAM Initialization Process"). The termination symbols indicate that the flow returns to the calling program upon reaching that symbol, while the start symbols indicate addresses (entry points) that other calling programs can access.

For convenience, step numbers will be assigned to both the termination symbol (return) and the start symbol (entry point) in this document.

The BB (Special Prize) game count check process is invoked by the calling program by specifying the address of entry point S2131 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. Specifically, this BB (Special Prize) game count check process is invoked from the main process shown in Figure 170 (step S2020).

In step S2132, as shown in Figure 175, the main CPU 2101 determines whether the BB (Special Prize) is active or not. If it is not active (No in step S2132), it proceeds to return S2133 and returns to the calling program. If it is active (Yes in step S2132), it proceeds to step S2134, where it determines whether the BB (Special Prize) has finished operating.

If the BB (Special Prize) operation has not finished (No. in step S2134), in step S2135, the number of RB games is deducted, and in step S2136, it is determined whether the RB has finished or not. If the RB has not finished (No. in step S2136), the program proceeds to return S2133 and returns to the calling program.

If the BB (Special Prize) operation has finished (Yes in step S2134), or if the RB has finished (Yes in step S2136), in step S2137, the RB differential signal is set to off (test signal), and in step S2138, the system waits for two cycles for an interrupt.

Next, in step S2139, it is determined whether the BB (Special Prize) operation has finished. If the BB (Special Prize) operation has not finished (No in step S2139), the program proceeds to return S2133 and returns to the calling program. On the other hand, if the BB (Special Prize) operation has finished (Yes in step S2139), in step S2140, the RAM initialization address is set to the "BB (Special Prize) completion clear address" related to the RAM area 2203a within the used area.

Next, the process proceeds to entry point S2141 shown in Figure 176, from which the transmit standby and RAM initialization process begins. This transmit standby and RAM initialization process is invoked by the calling program by specifying the address of entry point S2141 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. Specifically, this transmit standby and RAM initialization process is invoked from step S2039 shown in Figure 171, and the RAM initialization address when invoked from step S2039 is set to the address set in step S2038.

Next, in step S2142, the interrupt disable setting is configured. Then, in step S2143, the communication data stored in the communication data storage area is retrieved, and in step S2144, the interrupt enable setting is configured. During the period between interrupt disable and interrupt enable, interrupt processing such as periodic interrupt processing and power outage interrupt processing is suppressed. This prevents the malfunction where the communication data transmission processing of periodic interrupt processing (see Figure 186) is performed and the communication data stored in the communication data storage area is transmitted.

Next, in step S2145, it is determined whether or not there is any unsent communication data. If there is unsent communication data (Yes in step S2145), the processing in steps S2142 to S2144 is repeated. If there is no unsent communication data (No in step S2145), the process proceeds to entry point S2146, from which the specified RAM initialization process begins.

Furthermore, the specified RAM initialization process is invoked by the calling program by specifying the address of entry point S2146 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. Specifically, this specified RAM initialization process is invoked from step S2036 shown in Figure 171, and when invoked from step S2036, the RAM initialization address is set to the address set in step S2032 or step S2034.

Next, in step S2147, the return address is protected (the program counter is stored in the stack area), the RAM initialization address is set, and the number of initializations (the number of bytes to initialize) is set. Then, in step S2148, interrupts are disabled, and in step S2149, the contents of the RAM initialization address, which contains the clear address related to the RAM area 2203a within the used area, are saved to the start address storage area. Specifically, setting the RAM initialization address involves setting the address set in the DE register to the HL register. The number of initializations is the number of bytes calculated from the address set in the HL register to the address where the protected stack area of the return address is not cleared, and this value is set in the BC register.

Next, in step S2150, the out-of-use RAM initialization process (out-of-use area) is called (by CALLEX) to initialize the out-of-use RAM area 2203b. Details of the out-of-use RAM initialization process (out-of-use area) will be described later.

Subsequently, in step S2151, the RAM in the used area is initialized, that is, the RAM area 2203a in the used area is initialized, and in step S2152, the interrupt enable setting is configured. During the period from interrupt disable to interrupt enable, the occurrence of interrupt processing such as periodic interrupt processing and power-off interrupt processing is suppressed. Specifically, for the RAM area 2203a in the used area, the initialization count (= number of bytes to be initialized) from the RAM initialization address set in step S2147 is overwritten with 0. Although not shown here, for example, the initialization in step S2151 is performed by executing the "CLRIR" instruction.

In this RAM initialization process within the used area, the initialization start address for the used RAM area 2203a is originally stored in the RAM initialization address; therefore, that address is used directly as the initialization start address. Furthermore, in this embodiment, the initialization end address for the used RAM area 2203a is fixed, but it may be set to a different address depending on the initialization start address.

The process then proceeds to return S2153, returning to the calling program.

(Out-of-use RAM initialization process (out of use))
Next, with reference to Figure 177, the RAM initialization process outside the used area (outside the used area) performed by the main CPU 2101 will be explained.

Figure 177 is a flowchart showing the processing procedure for the RAM initialization process outside the used area (outside the used area) described above. Figure 177 shows two processes: the RAM initialization process outside the used area (outside the used area) and the RAM initialization process outside the used area (continuation). However, because the RAM initialization process outside the used area (outside the used area) is followed by the execution of the RAM initialization process (continuation) by, for example, executing a jump instruction, these will be described as a single program.

For convenience, step numbers will be assigned to each of the two start symbols (rounded rectangles with notations other than "RETEX," namely "Out-of-Use RAM Initialization Process (Out of Use)" and "Out-of-Use RAM Initialization Process (Continued)").

The out-of-use RAM initialization process (outside the used area) is invoked by the calling program by specifying the address of entry point S2171 (the address of the program stored in the program area 2102a within the used area) and the label corresponding to that address. Specifically, this out-of-use RAM initialization process (outside the used area) is invoked (by CALLEX) from step S2150 in Figure 176.

In step S2172, shown in Figure 177, the main CPU 2101 moves (jumps) by specifying, for example, the address of entry point S2173 (the address of the program stored in the program area outside the used area 2102c) and the label corresponding to that address, using a jump instruction, thereby transferring control of the RAM initialization process outside the used area (outside the used area). For convenience, the process after the move is referred to as the RAM initialization process outside the used area (continuation). Furthermore, the movement (jump) process shown in step S2172 is represented by a trapezoidal symbol for convenience. Note that such movement (jump) processes can be implemented in various ways, including using jump instructions.

When the out-of-use RAM initialization process (continued) begins, in step S2174, the lower address (e.g., 1 byte) of the start address storage area is obtained and stored, for example, in a predetermined area (storage determination area) of the out-of-use work area 2103c. Here, the start address storage area stores, for example, a 2-byte clear address related to the out-of-use RAM area 2203a, which is set as the RAM initialization address (step S2149 in Figure 176). Depending on the situation, one of the following is stored: for example, the clear address when a RAM error occurs, the clear address when a setting is changed, the clear address when a BB (special prize) ends, and the clear address when a game ends. These clear addresses are addresses related to the out-of-use RAM area 2203a. The clear address at the end of a game is set as the RAM initialization address in the main-side performance control process at the end of a game (step S2016), as shown in Figure 170.

Next, in step S2175, the initialization start address used for initializing the RAM outside the usage area (step S2183) is temporarily set to the address used to clear the RAM outside the usage area in the event of a RAM error. If the address of the memory determination area is not the address used to clear the RAM in the event of a RAM error (No. in step S2176), then the initialization start address is set to the address used to clear the RAM outside the usage area during a setting change (step S2177).

Next, if the address of the memory determination area is not the clear address when the settings are changed (No. in step S2178), the initialization start address is set to the clear address outside the used area at the end of BB (Special Prize) as the next candidate (step S2179).

Furthermore, if the address of the memory judgment area is not the clear address at the end of the BB (Special Prize) (No. in step S2180), the initialization start address is ultimately set to the clear address outside the used area at the end of one game (step S2181), and then the process proceeds to step S2182.

If the result in steps S2176, S2178, and S2180 is "Yes," the process proceeds to step S2182 without changing the contents of the initialization start address.

Through the above process, by referring only to the lower address (the address of the memory determination area) of the start address storage area where the RAM initialization address for the RAM area 2203a within the used area is stored, it is possible to specify the initialization start address of the RAM area 2203b outside the used area that corresponds to that lower address.

Next, in step S2182, the number of initializations (the number of bytes to be initialized) is calculated and set in a predetermined area. Then, using the initialization start address set in the above process, the out-of-use RAM area 2203b is initialized (step S2183). Specifically, by subtracting the initialization start address set in the HL register from the initialization end address of the out-of-use RAM area 2203b, the number of initializations is set in the BC register. Executing the "CLRIR" instruction described above initializes the specified range of the out-of-use RAM area 2203b. In this embodiment, the initialization end address of the out-of-use RAM area 2203b is fixed regardless of the lower address of the start address storage area; however, similar to the initialization start address, it may be set to a different address depending on the lower address of the start address storage area. Afterward, the program returns to the calling program via "RETEX".

The program that executes the out-of-use RAM initialization process (continuation) is a "specific subroutine" stored in the out-of-use program area 2102c and also in the in-use program area 2102a, which is called from step S2150 of the process shown in Figures 175 and 176, and returns to that process.

(Random value acquisition process, internal lottery process)
Next, with reference to Figures 178 and 179, the random value acquisition process and internal lottery process performed by the main CPU 2101 will be explained.

Figure 178 is a flowchart showing the processing procedure for the random value acquisition process described above. Figure 179 is a flowchart showing the processing procedure for the internal lottery process described above. These two processes constitute a single subprogram consisting of a series of consecutive program codes. This flowchart also includes one termination symbol (a rounded rectangle labeled "RET") and two start symbols (other rounded rectangles labeled not "RET," i.e., "random value acquisition process" and "internal lottery process"). The termination symbol indicates that when the flow reaches that symbol, it returns to the calling program. The start symbols indicate addresses (entry points) that other calling programs can access.

For convenience, step numbers will be assigned to each of the two starting symbols ("Random Value Acquisition Process" and "Internal Draw Process").

The random value acquisition process is invoked by the calling program by specifying the address of entry point S2201 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. Specifically, this random value acquisition process is invoked from step S2004 in Figure 170.

As can be seen from Figures 178 and 179, when the random value acquisition process described above is called, the process automatically proceeds to the entry point S2205 of the internal lottery process; therefore, it is not necessary to call it from the calling program. In Figure 170, for the sake of clarity, the internal lottery process is shown as being called in step S2005 after step S2004. However, in reality, when the random value acquisition process is called in step S2004, the internal lottery process is executed automatically after the random value acquisition process is completed.

First, when the random value acquisition process begins, the main CPU 2101, in step S2202 as shown in Figure 178, sets the interrupt disable setting. Next, in step S2203, it acquires the random value for the role draw and stores the acquired random value in the role draw random value storage area. In this embodiment, the random value for the role draw is generated by a random number circuit 2150 connected to the microprocessor 2100.

Next, in step S2204, the interrupt enable setting is configured. During the period between interrupt disable and interrupt enable, interrupt processing such as periodic interrupt processing and power outage interrupt processing is suppressed.

Next, when the internal lottery process begins, the main CPU 2101 executes a medal count check process in step S2206, as shown in Figure 179. In this process, during the period when medals can be accepted, the number of medals stored in the medal counter and credit counter is updated based on the detection results of the medal sensor (for example, the medal sensor corresponding to the medal sensor 31S in the first embodiment) and the bet switch (for example, the bet switch corresponding to the bet switch 6S in the first embodiment).

Next, in step S2207, the set content is obtained from the game recovery impossible error flag. For example, if the game recovery impossible state (abnormal) is determined by the setting value check process (outside the usage area) or random number check process (outside the usage area) described later, as shown in Figure 189, data indicating "recovery impossible" (for example, a value other than "0") is set in the game recovery impossible error flag. If the game recovery possible state (normal) is determined, the state in which the game recovery impossible error flag is set to data indicating "recovery possible" (for example, a value of "0") is maintained.

Here, a determination is made as to whether the set value of the "Game Recovery Impossible Error Flag" is "Recovery Impossible" (step S2208). If the set value of the "Game Recovery Impossible Error Flag" is "Recovery Impossible" (Yes in step S2208), the "Game Recovery Impossible Error Processing" (see Figure 174) is called. Note that in this embodiment, it is referred to as "Game Recovery Impossible State," but more accurately, it may also be expressed as "Game Continuation Impossible State."

If the setting of the "Game Recovery Impossible Error Flag" is not "Recovery Impossible" (No. in step S2208), that is, if the game recovery is possible (normal), then in step S2209, the internal lottery table (or its address) used for the internal lottery process is set.

The subsequent internal lottery process (steps S2210 to S2220) is the same as steps S62 to S73 shown in Figure 26 of the first embodiment, so its explanation is omitted.

(Interface 2 output processing (outside the area used))
Next, referring to Figure 180, the interface 2 output processing (outside the usage area) executed by the main CPU 2101 will be described. This processing is a subprogram for outputting using the communication circuit STU2, which is a serial communication circuit dedicated to transmission to the second interface board 302 for the test machine shown in Figure 3.

Figure 180 is a flowchart showing the processing procedure for the Interface 2 output processing (outside the used area) described above. Although Figure 180 shows two processes, Interface 2 output processing (outside the used area) and Interface 2 output processing (continuation), the execution of a jump instruction in Interface 2 output processing (outside the used area) immediately follows, so these will be described as a single program.

For convenience, step numbers will be assigned to each of the two start symbols (rounded rectangles with notations other than "RETEX," namely "Interface 2 Output Processing (Out of Use Area)" and "Interface 2 Output Processing (Continued)").

The Interface 2 output processing (outside the used area) is invoked by the calling program by specifying the address of entry point S2241 (the address of the program stored in the program area 2102a within the used area) and the label corresponding to that address. Specifically, this Interface 2 output processing (outside the used area) is invoked (by CALLEX) from step S2017 in Figure 170.

In step S2242 shown in Figure 180, the main CPU 2101 moves (jumps) by specifying, for example, the address of entry point S2243 (the address of the program stored in the program area outside the used area 2102c) and the label corresponding to that address, using a jump instruction, thereby transferring control of the interface 2 output processing (outside the used area). For convenience, the processing after the move is referred to as interface 2 output processing (continuation). Furthermore, the move (jump) process shown in step S2242 is represented by a trapezoidal symbol for convenience. Note that this move (jump) process can be implemented in various ways, as described above.

When the Interface 2 output processing (continuation) begins, step S2244 determines whether or not data is currently being transmitted to Interface 2 (I/F2). Interface 2 represents the interface connecting the main control board 2071 and the sub-control board 2072 via serial communication. For example, STU3, a dedicated transmission serial communication circuit among the aforementioned serial communication circuits 2114, controls the communication between the main control board 2071 and the sub-control board 2072.

If it is determined that transmission to interface 2 is not currently in progress (No. in step S2244), in step S2245, the transmission parameter table (address) used for transmitting the transmission data is set. Then, in step S2246, the transmission data is generated using the set transmission parameter table.

Subsequently, in step S2247, the generated transmission data is sent to interface 2 (sub-control board 2072, sub-control circuit 2200), and then the program returns to the calling program via "RETEX".

Furthermore, if it is determined that transmission to interface 2 is in progress (Yes in step S2244), the program returns to the calling program via "RETEX" without performing any further processing.

The program that executes the Interface 2 output processing (continuation) is a "specific subroutine" stored in the program area 2102c outside the used area and also stored in the program area 2102a within the used area. It is called by "CALLEX" from step S2017 of the main processing shown in Figure 170, and returns to the main processing.

(Medal currency count anomaly detection process (outside usage area))
Next, with reference to Figure 181, the medal currency count anomaly detection process (outside the usage area) executed by the main CPU 2101 will be explained. Figure 181 is a flowchart showing the processing procedure of the medal currency count anomaly detection process (outside the usage area). As mentioned above, this medal currency count anomaly detection process (outside the usage area) is called in the program by "CALLEX" in step S2018 of Figure 170.

In the medal currency count anomaly detection process (outside the usage area), first, in step S2261, the medal insertion counter is set, and in step S2262, the guide rail medal currency count is set. Here, the medal insertion counter counts the number of medals that have passed through the medal discharge guide connected to the exit of the selector (for example, the selector corresponding to selector 31 in the first embodiment), and the guide rail medal currency count is the number of medals detected (by the medal detection sensor) as having passed through the guide rail provided inside the selector.

Next, in step S2263, the difference between the number of medals inserted by the medal counter and the number of medals in the guide rail is calculated, and in step S2264, it is determined whether or not that difference is within an acceptable range.

If it is determined that the difference in the number of tokens is outside the acceptable range (No. in step S2264), data indicating an error in the number of tokens is set to the out-of-use area error flag (step S2265). After step S2265, or if it is determined that the difference in the number of tokens is within the acceptable range (Yes in step S2264), the program returns to the calling program via "RETEX".

(Medal payout/re-play activation processing, settlement execution processing, medal payout processing)
Next, with reference to Figures 182 and 183, the three processes executed by the main CPU 2101 (i.e., medal payout/re-play activation process, settlement execution process, and medal payout process) will be explained.

Figures 182 and 183 are flowcharts illustrating the processing steps for the three processes described above, representing a single subprogram consisting of a series of consecutive program codes. These flowcharts include two termination symbols (rounded rectangles labeled "RET") and three start symbols (other rounded rectangles labeled "RET," namely "Medal Dispensing/Re-play Activation Process," "Settlement Execution Process," and "Medal Dispensing Process"). The termination symbols indicate that the flow returns to the calling program upon reaching that symbol, while the start symbols indicate addresses (entry points) that other calling programs can access.

For convenience, step numbers will be assigned to both the end symbol (return) and the start symbol (entry point) in this document.

The medal payout and re-play activation process is invoked by the calling program by specifying the address of entry point S2281 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. Specifically, this medal payout and re-play activation process is invoked from the main process shown in Figure 170 (step S2014). In the first embodiment, this process corresponds to the medal payout and re-play activation process shown in Figure 23 (step S14).

In step S2282, as shown in Figure 182, the main CPU 2101 determines whether the winning result is a re-play or not. If it is not a re-play (No. in step S2282), it proceeds to step S2284. If it is a re-play (Yes in step S2282), it proceeds to step S2283, where it sets the value of the coin insertion counter, which represents the number of coins inserted, in the automatic coin insertion counter.

Next, in step S2284, the prize-winning activation command is stored in the communication data storage area, and in step S2285, it is determined whether the prize-winning counter is 0 or not. If the prize-winning counter is 0 (Yes in step S2285), the program proceeds to return S2292 and returns to the calling program.

If the winning token counter is not 0 (No. in step S2285), in step S2286, the address of the payout token counter storage area is set in a predetermined register. Next, in step S2287, it is determined whether the number of credit tokens has reached the upper limit (for example, 50 tokens).

If the number of medals in the credits is not at the maximum limit (No. in step S2287), in step S2288, 1 is added to the credit counter, and as a result, each medal paid out through winnings is added to the credits one by one.

In step S2289, a medal payout count check process is executed. This medal payout count check process involves deducting 1 from the payout counter, adding 1 to the counter for the medal payout signal (medal out counter) output to the external centralized terminal board (for example, the external centralized terminal board corresponding to the external centralized terminal board 55 in the first embodiment), and updating the medal insertion counter.

Next, in step S2291, it is determined whether the payout has ended, that is, whether the number of medals dispensed has become 0. If it is determined that the payout has ended (Yes in step S2291), the program proceeds to return S2292 and returns to the calling program. If it is determined that the payout has not ended (No in step S2291), the program returns to step S2287 and determines whether the number of credit medals has reached the maximum limit.

If the number of credit medals is determined to be at the maximum limit (Yes in step S2287), the process proceeds to step S2298 in Figure 183, where the medal payout process related to the payout counter begins. The medal payout process is executed when the number of credit medals is determined to be at the maximum limit, as shown in the flowchart in Figure 182. Furthermore, as will be described later, it is called when the settlement execution process (step S2293) shown in Figure 183 begins (step S2295).

In the medal payout process, the number of medals to be dispensed is received as an input parameter, and the payout process is performed based on the number of medals to be dispensed. In this embodiment, when this process is called, one of the following is received as an input parameter: the payout counter, the credit counter, or the medal insertion counter. The number of counters received is used as the number of medals to be dispensed. Furthermore, the input parameter is the lower address (for example, the lower 8 bits) of the address where each counter is stored (in the working area 2103a within the usage area).

When the medal dispensing process begins, in step S2299, the hopper drive is turned on to operate the hopper device for dispensing medals (for example, a device with the same configuration as the hopper device 32 in the first embodiment). In step S2300, it is determined whether or not the medals have passed through the hopper count switch. If it is determined that the medals have not passed through the hopper count switch (No. in step S2300), a hopper error check is performed in step S2301.

The hopper error check process detects hopper jam errors and hopper empty errors. For hopper jam errors, the system determines that an error has been detected when the hopper count switch remains ON for a certain period of time. For hopper empty errors, the system determines that an error has been detected when the hopper count switch remains OFF for a certain period of time. When these errors are detected, the type of error detected is displayed on a predetermined 7-segment LED of an information display device (for example, a display device corresponding to the information display device 14 of the first embodiment).

Subsequently, the process proceeds to step S2300, where it is repeatedly determined whether or not the medal has passed through the hopper count switch. If it is determined that the medal has passed through the hopper count switch (Yes in step S2300), the process proceeds to step S2302, where the medal payout count check is performed. This medal payout count check is the same process as the medal payout count check in step S2289 shown in Figure 182.

Next, in step S2303, it is determined whether the payout is complete, that is, whether the number of medals dispensed has become zero. If it is determined that the payout is complete (Yes in step S2303), the program proceeds to return S2305 and returns to the calling program. If it is determined that the payout is not complete (No in step S2303), the program proceeds to step S2300, and the determination of whether the medals have passed through the hopper count switch is repeated.

If it is determined that the payout is complete (Yes in step S2303), the process proceeds to step S2304, where the hopper drive is turned off, and then the process proceeds to return to S2305, returning to the calling program.

The flowchart in Figure 183 shows another entry point S2293 related to the settlement execution process.

This settlement execution process is performed when a player presses the settlement button (for example, the button corresponding to settlement button 9 in the first embodiment) during the medal reception/start check process (step S2003) in the main process shown in Figure 170. A predetermined program is then activated, and this program is called by specifying the address of entry point S2293 (the address of the program stored in the program area 2102a within the usage area) and the label corresponding to that address. In the first embodiment, this process corresponds to the process executed when the settlement button is pressed during the medal reception/start check process (step S3) shown in Figure 23.

When the settlement execution process begins, the main CPU 2101, in step S2294 shown in Figure 183, sets the address of the credit counter storage area in a predetermined register, and in step S2295, executes (calls) the medal payout process related to the credit counter. This medal payout process is the process described above, from steps S2298 to S2305 in Figure 183.

Once this medal payout process is complete, the program proceeds to step S2296, where it is determined whether or not the game is in progress. If the game is in progress (Yes in step S2296), the program proceeds to return S2305 and returns to the calling program. If the game is not in progress (No in step S2296), the main CPU 2101 sets the address of the medal insertion counter storage area in a predetermined register in step S2297 and proceeds to the next step, where it executes the medal payout process related to the medal insertion counter. This medal payout process is the process from steps S2298 to S2305 in Figure 183 described above. In the flowchart of Figure 183, after the settlement execution process (steps S2293 to S2297) is completed, the program proceeds to the next disbursement process without returning. The program also uses this continuous description, eliminating the need for a CALL instruction for the disbursement process and reducing the number of RET instructions by one. This saves the program area 2102a within the main ROM 2102's usage area.

Once this medal payout process is complete, the program returns to the calling program via Return S2305.

(Counting the number of medals passed (outside the usage area))
Next, with reference to Figure 184, the medal counting process (outside the usage area) executed by the main CPU 2101 will be explained. Figure 184 is a flowchart showing the processing procedure for the medal counting process (outside the usage area). This medal counting process (outside the usage area) is the medal payout check process (steps S2289 and S2302) shown in Figures 182 and 183. Its program is stored in the out-of-usage program area 2102c and is called by the calling program using "CALLEX".

In the medal count processing (outside the used area), the medal insertion counter is updated in step S2321. Afterward, the program returns to its original state via "RETEX".

(Percentage ratio monitoring aggregation start process (outside the used area))
Next, with reference to Figure 185, the role ratio monitor aggregation start process (outside the used area) executed by the main CPU 2101 will be described. Figure 185 is a flowchart showing the processing procedure of the role ratio monitor aggregation start process (outside the used area). This role ratio monitor aggregation start process (outside the used area) is called by the calling program by specifying the address of the entry point (the address of the program stored in the program area outside the used area 2102c) and the label corresponding to that address. Specifically, from step S2019 in Figure 170, this role ratio monitor aggregation start process (outside the used area) is called (by CALLEX).

The payout ratio monitor aggregation start process (outside the usage area) is an aggregation start process for displaying various ratio information related to the game on the payout ratio monitor device (for example, the payout ratio monitor device corresponding to the payout ratio monitor device 54 of the first embodiment). The aggregation, calculation, and display control processing of the information to be displayed on the payout ratio monitor device is performed, for example, in step S2364 of the periodic interrupt processing.

When the payout ratio monitoring and calculation start process (outside the used area) begins, the main CPU 2101 sets the payout ratio calculation start flag in step S2341, and stores the special prize signal (a signal indicating that the bonus (special prize) state is active) in the payout ratio calculation storage area in step S2342.

Next, in step S2343, the number of payouts is stored in the aggregation storage area, and in step S2344, the navigation data is stored in the aggregation storage area. Afterward, the program returns to its original state via "RETEX".

(Periodic interrupt processing)
Next, with reference to Figure 186, we will explain the periodic interrupt processing performed by the main CPU 2101. Figure 186 is a flowchart showing the processing procedure for periodic interrupt processing.

In this embodiment, the periodic interrupt processing cycle (1 interrupt time) is set to "1.1172 ms," but the periodic interrupt processing cycle is not limited to this. Furthermore, the periodic interrupt processing in this embodiment is the same as the periodic interrupt processing in the first embodiment shown in Figure 32, except for the test firing signal control processing (outside the usage area) in step S2364 and the error detection processing (outside the usage area) in step S2368. Therefore, only the test firing signal control processing (outside the usage area) and the error detection processing (outside the usage area) will be explained here.

In step S2364, test firing signal control processing (outside the usage area) is performed. This test firing signal control processing (outside the usage area) performs aggregation, calculation, and display control processing for displaying various ratio information related to the game on the payout ratio monitor device (for example, the payout ratio monitor device corresponding to the payout ratio monitor device 54 of the first embodiment). Details of the test firing signal control processing (outside the usage area) will be described later.

In step S2368, error detection processing (outside the usage area) is performed. This error detection processing (outside the usage area) corresponds to the error detection processing in the first embodiment (step S207 in Figure 32), and detects whether various error conditions have occurred based on the input state checked in step S2362. In this embodiment, a setting value check process and a random number check process are also performed using a distinctive configuration. Details of the error detection processing (outside the usage area) will be described later.

(Test firing signal control processing (outside the operating area))
Next, with reference to Figure 187, the test firing signal control process (outside the usage area) executed by the main CPU 2101 will be described. Figure 187 is a flowchart showing the processing procedure for the test firing signal control process (outside the usage area). As mentioned above, this test firing signal control process (outside the usage area) is the process called by "CALLEX" in step S2364 of Figure 186.

In the test firing signal control processing (outside the operating area), first, in step S2391, the test signal generation process is performed. Next, in step S2392, the reel stop signal output process is performed.

Next, in step S2393, special prize signal control processing is performed; in step S2394, simulated game signal control processing is performed; and in step S2395, condition device signal control processing is performed.

Next, in step S2396, the payout ratio monitor aggregation process is performed; in step S2397, the payout ratio monitor display management process is performed; and in step S2398, the test signal output process is performed. Afterward, the program returns to the calling program via "RETEX". The main functions are: the payout ratio monitor display management process, which includes display control to the payout ratio monitor device 54; and the test signal output process, which is the test signal output process to the first interface board 301 for the test machine.

(Error detection process (outside the usage area))
Next, with reference to Figure 188, the error detection process (outside the used area) executed by the main CPU 2101 will be described. Figure 188 is a flowchart showing the processing procedure for the error detection process (outside the used area). As mentioned above, this error detection process (outside the used area) is the process called by "CALLEX" in step S2368 of Figure 186.

The error detection process (outside the usage area) corresponds to the error detection process (step S207 in Figure 32) executed in the periodic interrupt processing of the first embodiment. First, in step S2411, the setting value check process (outside the usage area) is called. This setting value check process (outside the usage area) determines whether the setting value is normal or not; details will be described later.

Next, in step S2412, a medal passage check is performed, and in step S2413, a hopper check is performed. Note that these processes are unnecessary for medal-less machines.

Next, in step S2414, the random number check process (outside the usage area) is called. This random number check process (outside the usage area) determines whether the random number circuit is functioning correctly; details will be described later. Afterward, the program returns to the calling program via "RETEX".

(Setting value check process (outside the usage area), random number check process (outside the usage area))
Next, with reference to Figure 189, we will explain the two processes executed by the main CPU 2101 (namely, the setting value check process (outside the used area) and the random number check process (outside the used area)).

Figure 189 is a flowchart illustrating the processing steps for the two processes described above, representing a single subprogram consisting of a series of consecutive program codes. This flowchart includes three termination symbols (one rounded rectangle representing "Return" and two rounded rectangles representing "RET") and two start symbols (other rounded rectangles representing things other than "RET," namely "Setting Value Check Process (Out of Use)" and "Random Number Check Process (Out of Use)"). The termination symbols indicate that when the flow reaches that point, it returns to the calling program. The start symbols indicate addresses (entry points) that other calling programs can access.

For convenience, step numbers will be assigned to both the end symbol (return) and the start symbol (entry point) in this document.

The setting value check process (outside the used area) is invoked by the calling program by specifying the address of entry point S2431 (the address of the program stored in the program area outside the used area 2102c) and the label corresponding to that address. Specifically, this setting value check process (outside the used area) is invoked from the error detection process (outside the used area) shown in Figure 188 (step S2411).

When the setting value check process (outside the used area) is initiated, the main CPU 2101 determines in step S2432 whether the setting value is a normal value or not. If it is not a normal value (No. in step S2432), it proceeds to step S2434, where it sets data indicating that recovery is impossible in the game recovery impossible error flag, and returns to the calling program in step S2435 with "RET".

On the other hand, if the set value is determined to be a normal value (Yes in step S2432), the program returns to the calling program (step S2433). Note that, since the processes in steps S2432 and S2433 are executed by a single instruction, the termination symbol for returning to the calling program is "Return" rather than "RET". In this embodiment, a normal set value is defined as a value between 0 and 5 (settings 1 to 6) stored in the set value storage area allocated to the working area 2103a within the usage area; any value other than a normal value is considered an abnormal value.

The single instruction described above is, for example, an instruction like "opcode1 C, (Addr1), 6", where opcode1 is a description representing a predetermined instruction, the first operand "C" represents the C (carry) bit of flag register F (see Figure 167(B)), the second operand "(Addr1)" represents the value stored at address Addr1, and the third operand "6" is the value to be compared to the value stored at address Addr1. When this single instruction is executed, the calculation of the value stored at address Addr1 minus 6 is performed. If the result of this calculation is "1" in the C bit of flag register F, the program returns to the caller; otherwise, it proceeds to the next step.

In this case, address Addr1 represents the location within the working area 2103a of the usage area where the setting value is stored. If the stored setting value is 6 or greater, this instruction sets the C bit of flag register F to "0," and the process proceeds to step S2434 described above. If the setting value is 5 or less, the C bit of flag register F becomes "1," the setting value is determined to be normal, and the process returns to the caller. In this embodiment, the setting value is changed within the range of "0" to "5" during the setting change process.

The random number check process (outside the used area) is invoked by the calling program by specifying the address of entry point S2436 (the address of the program stored in the program area outside the used area 2102c) and the label corresponding to that address. Specifically, this random number check process (outside the used area) is invoked from the error detection process (outside the used area) shown in Figure 188 (step S2414).

When the random number check process (outside the used area) begins, the main CPU 2101 determines in step S2437 whether the random number circuit for the role draw (random number circuit 2150 connected to the microprocessor 2100) is functioning correctly. This determination is made, for example, by reading the status of the random number circuit 2150. Alternatively, if multiple random values are obtained from the random number circuit 2150 and all of the obtained random values match, it can be determined that the random number circuit 2150 has not updated its random numbers and that an abnormality has occurred.

If the random number generation circuit for the role draw is functioning correctly (Yes in step S437), the program proceeds to step S2438 to check another random number generation circuit. If it is not functioning correctly (No in step S437), the program proceeds to step S2434, where data indicating that recovery is impossible is set in the game recovery impossible error flag, and then returns to the calling program with "RET" in step S2435.

Next, in step S2438, the random number circuit 2110 located inside the microprocessor 2100 is inspected. In this embodiment, the random number circuit 2110 generates random values related to the presentation and random values for transitioning to the AT state. Here, it is determined whether the random number status of the internal information register is normal or not.

The microprocessor 2100 has an internal information register (CIF) that contains areas for notifying abnormalities in random number updates and random number update clock frequencies. Here, the value of these areas is checked to determine whether the random number circuit 2110 is functioning correctly. If the random number status in the internal information register is normal (i.e., the random number circuit 2110 is functioning correctly) (Yes in step S2438), the program returns to the calling program in step S2439 with "RET".

If the random number status in the internal information register is not normal (i.e., the random number circuit 2110 is not functioning correctly) (No. in step S2438), the process proceeds to step S2434, similar to the case of the random number circuit 2150. There, data indicating that recovery is impossible is set in the game recovery impossible error flag, and the program returns to the calling program with "RET" in step S2435.

(Power interruption handling)
Next, with reference to Figure 190, the power interrupt processing performed by the main CPU 2101 will be described. Figure 190 is a flowchart showing the processing procedure for power interrupt processing. In this embodiment, as described above, when a power interruption occurs, the power interruption is detected by a power interruption detection signal output to the parallel input port 2111 (XINT), and in that case, power interrupt processing is executed.

In the power-off interrupt handling process, the main CPU 2101 first saves all registers to the stack area (step S2451). In this embodiment, the main registers of bank 0 (general-purpose registers A, B, C, E, D, H, L, flag register F, index registers IX, IY), and the sub-registers corresponding to these main registers are saved. However, the registers of bank 1 are not saved.

Next, in step S2452, medal acceptance is prohibited, and in step S2453, the hopper motor is turned off. Then, in step S2454, the current stack pointer SP is stored in a predetermined storage area. The reason for saving the current stack pointer SP is that, in the game recovery process shown in the power-on process in Figure 171, the process is restored to the state immediately before the power outage based on the stored stack pointer SP.

Next, in step S2455, the CRC generation process (outside the used area) is called, and in step S2456, access to the RAM (for example, RAM area 2203a within the used area and RAM area 2203b outside the used area) is set to be prohibited.

(CRC generation process (outside use area))
Next, with reference to Figure 191, the CRC generation process (outside the used area) executed by the main CPU 2101 will be described. Figure 191 is a flowchart showing the processing procedure for the CRC generation process (outside the used area). As mentioned above, this CRC generation process (outside the used area) is the process called by "CALLEX" in step S2456 of Figure 190.

The CRC generation process (outside the usage area) first sets the power outage flag to ON in step S2471. Next, in step S2472, the CRC calculation process (outside the usage area) is called, where CRC calculations are performed for the usage area work area 2103a and the non-usage area work area 2103c, etc. Note that the CRC calculation process (outside the usage area) is the same as the process described with reference to Figure 173.

Next, in step S2473, the result (CRC value) of the CRC calculation process (outside the used area) called in step S2472 is stored in a predetermined storage area. The CRC value stored in this way at the time of the power interrupt is acquired by the CRC check process (outside the used area) at power-on (step S2032 in Figure 171) and compared with the CRC value at power-on (steps S2054 and S2055 in Figure 172).

The CRC generation process (outside the usage area) then returns to the calling program via "RETEX".

(Error clearing process for out-of-use area (out of use area))
Next, with reference to Figure 192, the error clearing process for out-of-use areas (out of use area) performed by the main CPU 2101 will be described. Figure 192 is a flowchart showing the processing procedure for the error clearing process for out-of-use areas (out of use area).

The "Out-of-Use Area Error Cause Clearing Process (Out of Use Area)" is a process for clearing errors such as the difference in the number of tokens that have been set in the "Out-of-Use Area Error Flag" during the "Token Count Abnormality Determination Process (Out of Use Area)" shown in Figure 181. This process is initiated, for example, when a game recovery error occurs, including a hopper jam error or a hopper empty error, by pressing the reset button provided on the main control board 2071 (a button similar to the reset button provided on the main control board 71 as described in relation to a modified example of the first gaming machine according to the first embodiment).

The process for clearing errors caused by "out-of-use area" (out of use area) first involves obtaining an error flag in step S2491, and then inverting the bits of that error flag in step S2492. Next, in step S2493, the logical AND of the "out-of-use area" error flag and the inverted data is calculated, and in step S2494, the result of the logical AND is set to the "out-of-use area" error flag.

The error clearing process for "out of used area" (out of used area) is followed by a return to the calling program via "RETEX".

Next, the characteristic configuration and functions of this embodiment will be described in detail with reference to Figures 170 to 192, which have been explained so far. Furthermore, Figures 193 to 209 will be referred to in this explanation.

[1. Specifying the Call Destination for CALLEX]
As described above, within the main ROM 2102, various programs and data (tables) used for various processes that are not directly involved in the game performed by the player are stored in the non-used ROM area 2202b, which is located at an address different from the used ROM area 2202a. This avoids putting pressure on the capacity of the used ROM area 2202a, which is set as the game area.

Furthermore, the processing related to Bank 0 uses the programs and data stored in the ROM area 2202a within the main ROM 2102's usage area, and temporarily utilizes the RAM area 2203a within the main RAM 2103's usage area to perform calculations to control the game actions performed by the player. In other words, the processing related to Bank 0 can be described as processing related to the game area (the ROM area 2202a and the RAM area 2203a within the usage area).

On the other hand, the processing related to Bank 1 uses the program and data stored in the ROM area 2202b outside the main ROM 2102's usage area, and temporarily utilizes the RAM area 2203b outside the main RAM 2103's usage area to perform processing that is not directly related to the game performed by the player (calculation processing for processing other than the game). In other words, the processing related to Bank 1 can be described as processing related to areas outside the usage area (the ROM area 2202b and the RAM area 2203b outside the usage area).

The ROM area 2202a within the main ROM 2102's usage area is a storage area for programs and data that control the game's actions performed by the player. However, due to the increasing diversification and complexity of gaming machine processing, the capacity of the designated ROM area 2202a within the usage area is becoming increasingly limited year by year. Therefore, a major challenge is how to reliably store programs and data related to processes not directly related to the game performed by the player in the ROM area 2202b outside the main ROM 2102's usage area, while simultaneously conserving the capacity of the ROM area 2202a within the main ROM 2102's usage area.

Furthermore, in the processing of bank 0, the instruction to call a subprogram that executes the processing of bank 1 is, for example, "CALLEX," and then "RETEX" returns to the calling program. Here, such a call instruction (for example, "CALLEX") is designed to take advantage of the characteristics of the main CPU 2101: if the subprogram is stored before a predetermined address (for example, "2100"H) in the out-of-use ROM area 2202b, i.e., in this embodiment, between "2000"H and "20FF"H, it becomes a 2-byte instruction; and if the subprogram is stored after that predetermined address (i.e., between "2100"H and "24BF"H), it becomes a 4-byte instruction.

As described above, the reason why the size of an instruction such as "CALLEX" differs depending on the memory location of the subprogram it calls is that when the instruction specifies the address of the subprogram to be called (hereinafter referred to as the "start point"), the CPU design allows the upper address "20" to be omitted for addresses between "2000"H and "20FF"H, and only one byte needs to be stored for the address. On the other hand, if the start point of the subprogram to be called is an address of "2100"H or later, it is necessary to secure two bytes of capacity for the upper and lower addresses. This is a measure taken by the designer of the main CPU 2101 to make it easier to secure as much capacity as possible in the ROM area within the usage area, taking into account the constraints of the amusement machine industry. Furthermore, given the circumstances regarding address storage as described above, it is also conceivable that the "CALLEX" instruction should be a three-byte instruction if the start point of the subprogram to be called is an address of "2100"H or later. Therefore, because the "CALLEX" instruction uses different machine code (the language the CPU understands) depending on the starting point, the programmer of a gaming machine needs to pay attention to the starting point of the subprogram specified by the "CALLEX" instruction.

In any case, by keeping the memory location of the subprogram called by an instruction such as "CALLEX" within the address range of "2000"H to "20FF"H, it is possible to save 2 bytes in the ROM area 2202a within the usage area for each such instruction. Note that if the starting point of the subprogram called by "CALLEX" is at an address of "2100"H or later, and it is a 3-byte instruction, the number of bytes that can be saved is 1 byte.

In light of the above circumstances, this embodiment is designed to minimize the capacity of the ROM area 2202a within the usage area when using an instruction (e.g., "CALLEX") to call a subprogram that executes the processing of Bank 1 during the processing of Bank 0. Furthermore, the program designer of the gaming machine no longer needs to pay attention to the start point when using the "CALLEX" instruction.

The main ROM 2102 shown in Figure 193(A) is a partial representation of the main ROM 2102 configuration shown in Figure 168(B), conceptually illustrating the conventional CALLEX-based subprogram calling.

Figure 193(A) shows that program PRG1 is stored in the program area 2102a within the main ROM 2102's usage area, and that PRG1 calls subprograms EX_Proc1 and EX_Proc2 using the call instruction "CALLEX". Here, EX_Proc1 and EX_Proc2 are stored in the program area 2102c outside the main ROM 2102's usage area, and their start point (the beginning address of their storage location) is before "2100"H. Therefore, the instruction size of the call instruction "CALLEX" used by PRG1 is 2 bytes for both. In Figure 193(A), the situation where EX_Proc1 is called from PRG1 using "CALLEX" is shown by a dotted line.

Furthermore, Figure 193(A) shows that program PRG2 is stored in the program area 2102a within the used area of the main ROM 2102, and PRG2 calls subprograms EX_Proc3, EX_Proc4, and EX_Proc5 using the call instruction "CALLEX". Here, EX_Proc3 is stored in the program area 2102c outside the used area of the main ROM 2102, and its start point (the beginning address of its storage location) is before "2100"H. Therefore, in PRG2, the instruction size of the instruction "CALLEX" that calls EX_Proc3 is 2 bytes. Also, EX_Proc4 and EX_Proc5 are stored in the program area 2102c outside the used area of the main ROM 2102, and their start points (the beginning address of their storage location) are after "2100"H. Therefore, in PRG2, the instruction size of the "CALLEX" instruction that calls EX_Proc4 and EX_Proc5 is 4 bytes each. Figure 193(A) shows, with a dotted line, the situation where EX_Proc4 is called from PRG2 by "CALLEX".

Thus, when using call instructions such as "CALLEX," if a subprogram whose start point is "2100"H or later is called, each call instruction consumes an extra 2 bytes of the program area 2102a within the used area.

The main ROM 2102 shown in Figure 193(B), like Figure 193(A), is a partial extraction of the configuration of the main ROM 2102 in Figure 168(B), and conceptually represents the subprogram calling by CALLEX in this embodiment.

Figure 193(B) shows that program PRG3 is stored in the program area 2102a within the main ROM 2102's usage area, and that PRG3 calls subprograms EX_Proc6 and EX_Proc7 using the call instruction "CALLEX". Here, EX_Proc6 and EX_Proc7 are stored in the program area 2102c outside the main ROM 2102's usage area, and their start point (the beginning address of their storage location) is before "2100"H. Therefore, the instruction size of the "CALLEX" call instruction used by PRG3 is 2 bytes for both. Such RPG3 has the same configuration as PRG1 shown in Figure 193(A). Figure 193(B) shows the situation where EX_Proc6 is called from PRG3 using "CALLEX" indicated by a dotted line.

Furthermore, Figure 193(B) shows that program PRG4 is stored in the program area 2102a within the used area of the main ROM 2102. PRG4 is shown making a call using the call instruction "CALLEX," specifying the subprogram EX_Proc8, address (label) EX_Proc9_JP, and address (label) EX_Proc10_JP. Here, EX_Proc8 is stored in the program area 2102c outside the used area of the main ROM 2102, and its start point (the beginning address of its storage location) is before "2100"H. Therefore, the instruction size of the "CALLEX" instruction in PRG4 to call EX_Proc8 is 2 bytes.

Furthermore, EX_Proc9_JR and EX_Proc10_JR are stored in the program area 2102c outside the main ROM 2102's usage area, and their starting point (the beginning address of the storage location) is before "2100"H. Therefore, in PRG4, the instruction size of the "CALLEX" instruction that calls EX_Proc9_JR and EX_Proc10_JR is 2 bytes each. Then, at the address before "2100"H indicated by EX_Proc9_JR and EX_Proc10_JR, a program such as a jump instruction "JR" is placed. This jump instruction "JR" then jumps to the subprograms EX_Proc9 and EX_Proc10, where these subprograms are executed.

The addresses of EX_Proc9 and EX_Proc10 are, as shown in Figure 193(B), 2100H and above. However, the size of the "CALLEX" instruction used by PRG4 to ultimately call EX_Proc9 and EX_Proc10 is 2 bytes, as described above. In Figure 193(B), the dotted line shows that EX_Proc9_JR is called by "CALLEX" from PRG4, and then EX_Proc9_JR jumps (calls) EX_Proc9. Similarly, EX_Proc10_JR is called by "CALLEX" from PRG4, and then EX_Proc10_JR jumps (calls) EX_Proc10. Furthermore, the relationships between EX_Proc9 and EX_Proc9_JR, and between EX_Proc10 and EX_Proc10_JR, as described later, correspond to the relationships between the out-of-use RAM initialization process (continued) and the out-of-use RAM initialization process (outside the used area) shown in Figure 177, and the relationships between the interface 2 output (continued) and the interface 2 output (outside the used area) shown in Figure 178.

The configuration shown in Figure 193(B) allows the "CALLEX" instruction size for calling subprograms located after address "2100"H to be effectively reduced to 2 bytes. However, this requires the instruction size for jump instructions (e.g., 2 or 3 bytes) in the area of the program area 2102c outside the used area, prior to address "2100"H, resulting in a total increase of +1 or +2 bytes. Nevertheless, even if this configuration wastes capacity in the program area 2102c outside the used area, which has relatively more capacity than the program area 2102a within the used area, the savings in the program area 2102a, which is more critically limited, are significant.

Furthermore, with the above configuration according to this embodiment, if the capacity of the program area 2102c outside the used area, specifically the addresses prior to "2100"H, becomes limited, the subprograms stored in that area (for example, EX_Proc6, EX_Proc7, and EX_Proc8 in Figure 193(B)) can also be moved to addresses after "2100"H, and jump instructions to jump to those subprograms can be placed at addresses prior to "2100"H.

In this embodiment, the jump instructions in the execution environment are broadly divided into JP-type instructions and JR-type instructions. JP-type instructions are 3-byte instructions consisting of an instruction code (command) = 1 byte + absolute address = 2 bytes, while JR-type instructions are 2-byte instructions consisting of an instruction code (command) = 1 byte + relative address = 1 byte. Therefore, if you wish to save capacity related to addresses before "2100"H in the program area 2102c outside the used area, it is preferable to use JR-type instructions. However, it should be noted that JR-type instructions use a 1-byte relative address as described above, so they can only jump to subprograms stored within 128 bytes (or less) of the relative position. Furthermore, the subprograms called by "CALLEX" are not limited to jump instructions. Any program (including instructions and other statements) is acceptable as long as it can ultimately call a subprogram located after "2100"H via "CALLEX".

This configuration of the embodiment is applied, for example, to a program that performs RAM initialization processing (outside the used area), as shown in Figure 177.

First, the program that executes the processes shown in Figures 175 and 176 is stored in the program area 2102a within the used area of the main ROM 2102. This program corresponds, for example, to PRG4 in Figure 193(B). Then, in step S2150 shown in Figures 175 and 176, this program calls the out-of-used RAM initialization process (out-of-used area) (steps S2171 and S2172) shown in Figure 177 using "CALLEX". This call corresponds, for example, to "CALLEX EX_Proc9_JR" in Figure 193(B).

The RAM initialization process outside the used area (outside the used area) shown in Figure 177 is a process that jumps to (calls) the RAM initialization process outside the used area (continued) shown in Figure 177. This program corresponds, for example, to "EX_Proc9_JR" in Figure 193(B). Finally, the RAM initialization process outside the used area (continued) shown in Figure 177 is executed, and this program corresponds, for example, to "EX_Proc9" in Figure 193(B).

Finally, the last "RETEX" command in the out-of-use RAM initialization process (continued) shown in Figure 177 returns to the calling program that initiated the call via "CALLEX," and the process proceeds to step S2151 in Figure 176.

Furthermore, this method is also applied to the program that executes the interface 2 output processing (outside the used area), as shown in Figure 180.

First, the program that executes the main process shown in Figure 170 is stored in the program area 2102a within the usage area of the main ROM 2102. This program corresponds, for example, to PRG4 in Figure 193(B). Then, in step S2017 shown in Figure 170, this program calls the interface 2 output processing (outside the usage area) (steps S2241 and S2242) shown in Figure 180 using "CALLEX". This call corresponds, for example, to "CALLEX EX_Proc9_JR" in Figure 193(B).

The Interface 2 output processing (outside the usage area) shown in Figure 180 is a process that jumps to (calls) the Interface 2 output processing (continuation) shown in Figure 180. This program corresponds, for example, to "EX_Proc9_JR" in Figure 193(B). Finally, the Interface 2 output processing (continuation) shown in Figure 180 is executed, and this program corresponds, for example, to "EX_Proc9" in Figure 193(B).

Finally, the last "RETEX" in the Interface 2 output processing (continuation) shown in Figure 177 returns to the calling program that initiated the call via "CALLEX," and the process proceeds to step S2008 in Figure 170.

Furthermore, as a rule restriction, writing to the RAM area 2203a within the used area can only be performed by programs stored in the program area 2102a within the used area, and writing to the RAM area 2203b outside the used area can only be performed by programs stored in the program area 2102c outside the used area. Therefore, if the flowchart in this embodiment states "...store," the storage area is determined by whether the flowchart refers to a program stored in the program area 2102a within the used area or a program stored in the program area 2102c outside the used area.

On the other hand, reading from the working area 2103a within the usage area and the working area 2103c outside the usage area can be performed using programs stored in the program area 2102a within the usage area, or programs stored in the program area 2102c outside the usage area.

[2. Check the CRC of the main RAM]
In this embodiment, the main RAM check obtains the CRC calculation result (CRC value) for the main RAM when a power outage occurs, and obtains the CRC calculation result (CRC value) for the main RAM when the power is turned on. These two CRC values are compared when the power is turned on, and if the difference is 0, it is considered normal (game recovery possible), and the game recovery process is then performed. On the other hand, if the difference is not 0, it is considered a CRC abnormality (game recovery impossible state 1), and then (unless an operation related to setting changes has been performed when the power is turned on) the game recovery impossible process is performed (see Figures 171 and 172).

Furthermore, in this embodiment, the main RAM check is performed using the CRC circuit 2107c included in the microprocessor 2100. Now, referring to Figure 194, the concept of the main RAM CRC check in this embodiment will be explained. Figure 194 shows the processing during power outage on the left and the processing during power-on on the right.

(Handling procedures in case of power outage)
When a power outage occurs, the power outage is detected by a power outage detection signal (the power outage detection signal is input to the parallel input port 3111 (XINT terminal)), and in that case, the interrupt controller 2112 (see Figures 166 and 169) executes the power outage interrupt processing shown in Figure 190. Then, in the power outage interrupt processing, in order to obtain the CRC value of the main RAM 2103, the CRC generation processing (outside the used area) is called in step S2455.

The flow of the CRC generation process (outside the usage area) is shown in Figure 191. In this process, the power outage flag is turned on (step S2471), and then the CRC calculation process (outside the usage area) is called (step S2472). The calculation result obtained from this CRC calculation process (outside the usage area) is then stored in the out-of-usage work area 2103c as the CRC value 2301 at the time of the power outage (step S2473).

The flow of this CRC calculation process (outside the used area) is shown in Figure 173. In this process, as shown in Figure 194, the starting address and the number of calculation bytes are set for each of the following areas of the main RAM 2103: the working area within the used area 2103a, the stack area within the used area 2103b, and the working area outside the used area 2103c. The data to be calculated is then output to the CRC circuit 2107c.

In the CRC calculation process (outside the used area), data related to the three areas within the main RAM 2103 are sequentially output to the CRC circuit 2107c. The CRC circuit 2107c then combines this data to obtain a single CRC calculation result. However, it is also possible to calculate the CRC calculation result for each area separately and obtain three separate CRC calculation results.

Furthermore, in this embodiment, the check of the main RAM 2103 using CRC calculation is performed on three areas: the working area 2103a within the usage area, the stack area 2103b within the usage area, and the working area 2103c outside the usage area. The reason for omitting the stack area 2103d outside the usage area is that it does not directly affect the progress of the game and is therefore of little importance. However, the check range of the main RAM 2103 may include the stack area 2103d outside the usage area, or it may be a different area or range than that of this embodiment.

Furthermore, the CRC calculation result (CRC value 2301) at the time of power outage is stored in the CRC value storage area 2103e of the non-usable work area 2103c of the main RAM 2103, as shown in Figure 194. Therefore, the CRC calculation in the CRC calculation process (outside the used area) is specified to exclude the CRC value storage area 2103e with respect to the non-usable work area 2103c. In this embodiment and other embodiments, the processing when a power outage occurs is performed by a power outage interrupt process, but this is not limited to this. For example, a subprogram that monitors the power outage detection signal may be provided in the periodic interrupt process (Figure 186), and when the power outage detection signal is detected, the power outage interrupt process shown in Figure 190 may be executed. In this case, it is desirable to execute the power interrupt processing shown in Figure 190 only after confirming that the power interrupt detection signal indicates a power interruption state (power interrupt detection signal = ON state) for 2 to 4 interrupt times (1 interrupt time = 1.1172 ms). This serves as a countermeasure against malfunctions caused by momentary power interruptions or noise affecting the power interrupt detection signal.

(Processing when power is turned on)
When power is turned on, the flow shown in Figure 170 begins, and first, the power-on processing shown in Figure 171 is executed. During this power-on processing, in step S2031, the CRC check process (outside the used area) is called to obtain the CRC value of the main RAM 2103. Before the power-on processing is executed, the main CPU 2101 sets security settings and interrupt initial setting data stored in the program management area 2102f. The process for making these settings is not stored in the program area 2102a within the used area, and therefore is not shown in the flow. This is a function of the microprocessor 2100 itself, and is also a function provided to the microprocessor 2100 to save capacity in the program area 2102a within the used area.

The flow of the CRC inspection process (outside the usage area) is shown in Figure 172. In this process, the CRC calculation process (outside the usage area) is called (step S2052). Then, the obtained CRC calculation result (CRC value 2302 at power-on) is compared with the CRC value 2301 at the time of power-out. If the difference is 0 and the power-out flag is on, the game recovery state is considered normal (game recovery possible), and the process proceeds to the game recovery process or setting change process (step S2035 in Figure 171). Note that the CRC value 2301 at the time of power-out is stored in the CRC value storage area 2103e of the out-of-usage work area 2103c of the main RAM 2103, as described above, and the CRC value 2301 is obtained from there.

The flow of the CRC calculation process (outside the usage area) called by the CRC inspection process (outside the usage area) is shown in Figure 173, and is the same as the CRC calculation process (outside the usage area) called by the CRC generation process (outside the usage area) during power outages. Note that when a power outage occurs, the CRC calculation in the CRC calculation process (outside the usage area) is specified to exclude the CRC value storage area 2103e with respect to the out-of-usage work area 2103c; however, (because it is necessary to compare the CRC values of both) the CRC calculation is also performed on the same range during power-on.

With the configuration of this embodiment described above, the main RAM check is performed by CRC calculation using the CRC circuit 2107c, both when the power is cut off and when the power is turned on. This process only requires passing the starting address and the number of bytes to the CRC circuit 2107c to specify the CRC calculation target, as described above with reference to Figure 173. On the other hand, when calculating a sum value, it is necessary to write the main program to read the calculation target area of the main RAM one byte (or two bytes) at a time into a register, accumulate and add that value to another register, and repeat this process for the size of the calculation target area. Furthermore, when calculating a sum value for multiple calculation target areas in the main RAM, such as areas within the used area and areas outside the used area, it is necessary to write a program to perform the above-described accumulation and addition for each of those calculation target areas.

In contrast, in this embodiment, it becomes unnecessary to describe such individual processing in the program executed by the main CPU 2101. Therefore, the program does not need to include logic related to sum calculation or sum comparison, thereby reducing the program size and ultimately saving program space in the main ROM 2102.

Furthermore, the program resources saved in this way can be used to implement gameplay related to the gaming machines, leading to the provision of more fulfilling and refined games for players.

Furthermore, since the main RAM check is performed by the CRC circuit 2107c, which is an independent circuit separate from the main CPU 2101, the load on the main CPU 2101 is reduced compared to check methods that calculate the sum value. Moreover, since the program executed by the main CPU 2101 does not need to implement logic related to sum value calculation or comparison, the program can be simplified, streamlined, and its processing time reduced. As a result, the efficiency of program development and maintainability are improved, and CRC checks can be performed in a short time.

[3. 4-bit data acquisition process]
Next, the 4-bit data acquisition process in this embodiment will be described with reference to Figures 195 to 199.

When storing data in a table stored in the data area 2102b within the used area of the main ROM 2102, the program is usually configured to store each data item in 1-byte or 2-byte units. However, if the data to be stored is, for example, within a range of 16 possibilities (e.g., 0 to 15) and only requires a maximum of 4 bits, it is conceivable to store two sets of data items (up to 4 bits each) in a 1-byte area. This effectively reduces the unused storage area, and as a result, saves capacity in the main ROM 2102.

Furthermore, if different types of data sets each consist of a maximum of 4 bits, storing all of them in a single table and using a common program to retrieve the target 4-bit data eliminates the need to create a separate program for each data type, thus saving capacity in the main ROM 2102. Even when different types of data sets are stored in a single table, knowing which entry (relative address location) corresponds to which type of data allows the common program to specify which data should be retrieved.

Figure 195 shows a common subprogram (4-bit data retrieval process) that retrieves data individually from a table, where two pieces of data (up to 4 bits each) are stored in a 1-byte area, according to a specified entry.

Figure 195 is a flowchart showing the processing procedure of the common subprogram (4-bit data acquisition process) described above.

In the 4-bit data acquisition process, first, in step S2511, the quotient obtained by dividing the selected value by 2 is used as the offset value, and the remainder is used as the odd/odd determination data. Here, the selected value is a value that indicates the position of the data stored in the table, and has the same meaning as the so-called "entry". Next, in step S2512, the target data in the table is acquired. Here, the data is 1-byte data stored in the table, and the target data contains two 4-bit data, one of which is the 4-bit data to be acquired. The target data is a 1-byte data located at the position of the table's starting address + offset value.

Next, in step S2513, the odd/odd determination data is used to determine whether the selected value is even or odd. If the odd/odd determination data is 0 (Yes in step S2513), the selected value is even, and in step S2514, the upper 4 bits and lower 4 bits of the acquired target data are swapped using a swap instruction, and the process proceeds to step S2515. If the odd/odd determination data is 1 (No in step S2513), the selected value is odd, and in this case, no swap is performed, and the process proceeds to step S2515.

In step S2515, 4-bit data is obtained. If the selected value is even, the upper 4 bits and lower 4 bits of the obtained target data are swapped. By performing a logical AND operation with "0F"H (i.e., "00001111" in bit sequence) on such data, the desired 4-bit data is obtained, and then the program returns to the calling program. The obtained 4-bit data is ultimately stored in a predetermined area within the main RAM 2103's used area (work area 2103a) or outside the used area (work area 2103c). The notation "(4-bit data)" to the right of the termination symbol (rounded rectangle) "RET" indicates that the 4-bit data obtained by the logical AND operation is stored (returned) in the A register, and the calling program can then access/obtain the 4-bit data from the A register.

Next, the 4-bit data acquisition process described in the flowchart of Figure 195 will be explained using a specific example shown in Figure 196.

As shown in Figure 196, the target table starts at address "1F00"H and contains 1-byte data (data1, data2, data3, ...). In this example, the upper 4 bits of data1 have a selected value (entry) of 0, with a value of 2, and the lower 4 bits have an entry of 1, with a value of 3. The upper 4 bits of data2 have an entry of 2, with a value of 12, and the lower 4 bits have an entry of 3, with a value of 8. The upper 4 bits of data3 have an entry of 4, with a value of 15, and the lower 4 bits have an entry of 5, with a value of 0.

Furthermore, the starting address of Data 1 is "1F00"H, the same as the starting address of the table; the starting address of Data 2 is "1F01"H; and the starting address of Data 3 is "1F02"H.

Here, as shown in (1), the selected value (entry) of the 4-bit data to be retrieved is set to "2". Then, as shown in (2), the quotient (offset value) = 1 and the remainder (odd/even determination data) = 0.

Next, in (3), the beginning of the target data is the table's starting address "1F00" + offset value "1", i.e., "1F01"H, which corresponds to data 2 in the target table. For data 2, the upper 4 bits are entry = 2 with a value of 12, and the lower 4 bits are entry = 3 with a value of 8.

Next, in (4), since the odd/even determination data is 0, i.e., even, the upper 4 bits and lower 4 bits of data 2 are swapped. That is, the upper 4 bits become the value 8 for entry = 3, and the lower bits become the value 12 for entry = 2. Then, taking the logical AND of the swapped data with "0F"H (i.e., the bit sequence "00001111"), we get the bit sequence "00001100". In the rightmost 4 bits corresponding to entry = 2, we obtain the bit sequence "1100" (value "8"), and this becomes the acquired 4-bit data.

When a large number of data points, each taking values between 0 and 15, exist across multiple entries due to this 4-bit data acquisition process, creating a table with the above data structure on the main ROM 2102 allows for effective storage of this data.

For example, the data for each entry shown in Figure 196 can be defined as a table (d4BITTBL) as shown in Figure 197(A). As described above, the data for each entry can take one of the values from 0 to 15. Note that "DB" is a pseudo-instruction that defines the content of 1 byte of data. Here, data 1 in Figure 196 is generated and defined by a calculation such as "DB 2 * 10H + 3" as shown in Figure 197(A). "* 10H" is a multiplication that shifts the value 2 for entry = 0 to the upper 4 bits. Data 2 in Figure 196 is generated and defined in Figure 197(A) as "DB 12 * 10H + 8", and data 3 in Figure 196 is generated and defined in Figure 197(A) as "DB 15 * 10H + 0". The calculation to obtain each of these one-byte data points is performed in advance, and the resulting table data, which is a collection of these one-byte data points, is stored, for example, in the data area 2102b within the usage area of the main ROM 2102.

Furthermore, the "pseudo-instructions" mentioned above refer not to instructions that execute processing on the CPU (such as the "CALLEX" instruction mentioned above), but rather to instructions used by conversion applications (commonly referred to as "assemblers," "compilers," etc.) that convert program source files into data for writing to ROM (for storage during the manufacturing process of the gaming machine).

Furthermore, for example, if the 4-bit data acquisition mechanism described above is applied to the symbol arrangement table in Figure 82(a) used in the 13th embodiment, the table can be defined as shown in Figure 197(B). The "dREEL_ZU1" table contains data related to the left reel of the symbol arrangement table, the "dREEL_ZU2" table contains data related to the middle reel of the symbol arrangement table, and the "dREEL_ZU3" table contains data related to the right reel of the symbol arrangement table.

Furthermore, each 1-bit data defined in "DB" has a comment at the right end indicating which symbol code corresponds to which symbol position. Of course, programs using this data know in advance which entry stores which symbol code for which symbol position. In each "DB" definition, data shifted to the upper 4 bits by multiplying by "10"H represents symbol codes with odd-numbered positions, while the lower 4 bits represent symbol codes with even-numbered positions.

The symbol codes are represented by variables in the definitions of each table, but the values (bit sequences) of each variable are shown below the table definitions. This corresponds to the symbol arrangement code table (main reel) in Figure 82(b) used in the 13th embodiment. There are a total of 10 patterns, and the maximum value is 10 ("1010" in bit sequence), and all can be represented as 4-bit data. For example, the symbol code for symbol "V" is 1 ("0001" in bit sequence), and the symbol code for symbol "Bell B" is 7 ("0111" in bit sequence).

In the example shown in Figure 197(B), three tables, "dREEL_ZU1," "dREEL_ZU2," and "dREEL_ZU3," are shown. These can be defined as a single table (with contiguous storage locations within the data area 2102b), and each 4-bit data can be retrieved using the aforementioned 4-bit data retrieval process (by specifying the table address and selected value) executed by a common program. Furthermore, these data can be combined with other types of 4-bit data and defined as a single table (the same applies to the tables described in Figures 198, 199, and 202).

Furthermore, for example, if the 4-bit data acquisition mechanism described above is applied to the pattern combination arrangement table in Figures 83A and 83B used in the 13th embodiment, the table can be defined as shown in Figure 198. The "dPayCnv" table represents the payout data (payout when 3 coins are bet) for each 13-byte storage area type data (each pattern combination) in the pattern combination table.

Furthermore, each 1-bit data defined in "DB" has a comment at the right end indicating which storage area identification data corresponds to each payout quantity. Of course, programs using this data know in advance which entry stores the payout quantity corresponding to which storage area identification data. In each "DB" definition, the data shifted to the upper 4 bits by multiplying by "10"H represents the payout quantity data corresponding to the pattern combination represented by the odd bits of the storage area identification data, while the lower 4 bits represent the payout quantity data corresponding to the pattern combination represented by the even bits of the storage area identification data. For example, in the 1-bit data defined in the first "DB," the upper bits contain the payout quantity corresponding to the pattern combination represented by bit "B1" of the first byte of the storage area type data, and the lower bits contain the payout quantity corresponding to the pattern combination represented by bit "B0" of the first byte of the storage area type data.

Furthermore, for example, in the 13th embodiment, when displaying numerical values on the instruction monitor during pseudo-BIG and pseudo-REG, it is conceivable to define the correspondence between the internal winning combination and the numerical value, as shown in Figure 91(a), as a new table (referred to as the instruction monitor determination table) by applying the 4-bit data acquisition mechanism of this embodiment. Here, the instruction monitor determination table can be defined as shown in Figure 199. The "dNaviTbl" table shows the correspondence between the internal winning combination and the numerical value displayed on the instruction monitor, as shown in Figure 91(a).

Each 1-bit data defined in "DB" has a comment at the right end indicating which internal winning combination it corresponds to. Of course, programs using this data know in advance which entry's data stores the numerical value corresponding to which internal winning combination. In each "DB" definition, the data shifted to the upper 4 bits by multiplying by "10"H is the numerical value displayed in pseudo-REG for the corresponding internal winning combination, while the lower 4 bits are the numerical value displayed in pseudo-BIG for the corresponding internal winning combination. In this embodiment, the upper 4 bits are defined as odd numbers in the odd/even determination data, and the lower 4 bits as even numbers. However, it is also possible to define the upper 4 bits as even numbers and the lower 4 bits as odd numbers. In that case, the judgment in step S2513 of the 4-bit data acquisition process would be reversed, and the arrangement of each data described above would need to be considered.

The above explains the 4-bit data acquisition process. Because this 4-bit data acquisition process has fewer possible patterns, it allows for a configuration where smaller data sizes are required, for example, by storing two instances of data in a 1-byte area. While this configuration is effective for data areas 2102b within the usage area where capacity is limited, it can also be applied to data stored in data areas outside the usage area 2102d for the purpose of improving development efficiency and maintainability through program commonality, and for saving space that may be required in the future.

[4.2-bit data acquisition process]
Next, the 2-bit data acquisition process in this embodiment will be described with reference to Figures 200 to 202.

When storing data in a table stored in the data area 2102b within the main ROM 2102's usage area, the program is usually configured to store each data item in 1-byte or 2-byte units. However, if the data to be stored is, for example, within a range of four values (0 to 3), and only a maximum of 2 bits are required, it is conceivable to store four pieces of data (maximum 2 bits each) in a 1-byte area. This effectively reduces the unused storage area, and as a result, saves capacity in the main ROM 2102.

Furthermore, if different types of data sets each consist of data up to two bits in length, storing all of them in a single table and using a common program to retrieve the target two-bit data eliminates the need to create a separate program for each data type, thus saving capacity in the main ROM 2102. Even when different types of data sets are stored in a single table, knowing which entry (relative address location) corresponds to which type of data allows the common program to specify which data should be retrieved.

Figure 200 shows a common subprogram (2-bit data retrieval process) that retrieves data individually from a table containing up to four 2-bit data entries in a 1-byte area, according to a specified entry.

Figure 200 is a flowchart showing the processing procedure of the common subprogram (2-bit data acquisition process) described above.

In the 2-bit data acquisition process, first, in step S2531, the quotient obtained by dividing the selected value by 4 is used as the offset value, and the remainder is used as the shift counter. Here, the selected value is a value that indicates the position of the data stored in the table, and is equivalent to the so-called "entry." Next, in step S2532, the target data is acquired. Here, the data is 1-byte data stored in the table, and the target data contains four 2-bit data, one of which is the 2-bit data to be acquired. The target data is a 1-byte data located at the position of the table's starting address + offset value.

Next, in step S2533, 1 is added to the shift counter. However, if the result of the addition is 4, it is set to 0. Next, in step S2534, it is determined whether the shift counter is 0 or not. If it is determined to be 0 (Yes in step S2534), the process proceeds to step S2537.

On the other hand, if the shift counter is determined to be non-zero (No. in step S2534), the target data is shifted two bits to the left in step S2535. This left shift operation returns the two bits that were at the leftmost position before the operation to the two bits at the rightmost position of the target data.

Next, in step S2536, the shift counter is decremented by 1, and then the process returns to step S2534, repeating the 2-bit left shift until the shift counter becomes 0. This flow ensures that for 2-bit data located at the rightmost end of the data, such as 3, 7, and 11, the process proceeds to step S2537 without performing a single left shift operation.

In step S2537, 2-bit data is obtained. The acquired target data has undergone a left shift operation as appropriate during the above process. By performing a logical AND operation with this data using "03"H (i.e., "00000011" in the bit sequence), the desired 2-bit data is obtained, and the program then returns to the calling program. The notation "(2-bit data)" to the right of the termination symbol (rounded rectangle) "RET" indicates that the obtained 2-bit data is stored (returned) in the A register, and the calling program can then access/retrieve the 2-bit data from the A register.

Next, the 2-bit data acquisition process described in the flowchart of Figure 200 will be explained using a specific example shown in Figure 201.

As shown in Figure 201, the target table starts at address "1F00"H and contains 1 byte of data (data1, data2, data3, ...). In this example, the first two bits of data1 have a selected value (entry) of 0 and a value of 1, the second two bits have an entry of 1 and a value of 1, the third two bits have an entry of 2 and a value of 0, and the fourth two bits have an entry of 3 and a value of 3.

Furthermore, in data 2, the first two bits have a selected value (entry) of 4 and a value of 2, the second two bits have an entry of 5 and a value of 1, the third two bits have an entry of 6 and a value of 2, and the fourth two bits have an entry of 7 and a value of 3. In data 3, the first two bits have a selected value (entry) of 8 and a value of 1, the second two bits have an entry of 9 and a value of 1, the third two bits have an entry of 10 and a value of 3, and the fourth two bits have an entry of 11 and a value of 0.

Furthermore, the starting address of Data 1 is "1F00"H, the same as the starting address of the table; the starting address of Data 2 is "1F01"H; and the starting address of Data 3 is "1F02"H.

Here, as shown in (1), the selected value (entry) of the 2-bit data to be acquired is set to "5". Then, as shown in (2), the quotient (offset value) = 1 and the remainder (shift counter) = 1.

Next, in (3), the beginning of the target data is the table's starting address "1F00" + offset value "1", i.e., "1F01"H, which corresponds to data 2 in the target table. Data 2 contains four 2-bit data entries = 4 to 7.

Next, in (4), the shift counter = 1 + 1 = 2, and a leftward 2-bit shift is repeated twice for data 2. This leftward shift operation shifts the value 1 of entry = 5, which was initially at the second 2-bit position in data 2, to the rightmost position, the fourth 2-bit position. Therefore, taking the logical AND of the shifted data with "03"H (i.e., the bit sequence "00000011") results in the bit sequence "00000001," and the bit sequence "01" (value "1") is obtained at the rightmost 2 bits corresponding to entry = 5, which becomes the acquired 2-bit data.

When a large number of data points, each taking values between 0 and 3, exist across multiple entries due to this 2-bit data acquisition process, creating a table with the above data structure on the main ROM 2102 allows for effective storage of this data.

For example, if the 2-bit data acquisition mechanism described above is applied to the pattern combination arrangement table in Figures 83A and 83B used in the 13th embodiment, the table can be defined as shown in Figure 202. The "dAttCnv" table represents the attribute data for each 13-byte storage area type data (each pattern combination) in the pattern combination table.

Furthermore, each 1-byte data entry defined in "DB" has a comment at its rightmost end, indicating which storage area identification data each attribute corresponds to. Of course, programs using this data already know which entry's data corresponds to which storage area identification data's attribute.

Furthermore, in each "DB", the data shifted to the first two bits (see Figure 201 for the first to fourth two bits) by multiplying by "40"H is attribute data corresponding to the pattern combination represented by bits "B7" and "B3" of the storage area identification data; the data shifted to the second two bits by multiplying by "10"H is attribute data corresponding to the pattern combination represented by bits "B6" and "B2" of the storage area identification data; the data shifted to the third two bits by multiplying by "4"H is attribute data corresponding to the pattern combination represented by bits "B5" and "B1" of the storage area identification data; and the lower two bits (fourth two bits) are attribute data corresponding to the pattern combination represented by bits "B4" and "B0" of the storage area identification data. Each of these one-byte data points can be obtained, for example, by adding the data obtained by multiplying "40"H, "10"H, and "4"H, along with the original data, as shown above. This calculation is performed in advance, and the resulting table data, which is a collection of these one-byte data points, is stored in the data area 2102b within the usage area of the main ROM 2102.

Note that Figure 202 is an example where one byte is represented in 8-bit units. When multiplying by "40"H, "10"H, and "4"H, for example, the second byte of the "dAttCnv" table in Figure 202, "DB 00000011B", becomes "DB 0*40H+0*10H+0*4H+3", and the third byte, "DB 01010101B", becomes "DB 1*40H+1*10H+1*4H+1".

For example, in the 1-bit data defined in the initial "DB," the first two bits represent the attribute corresponding to the pattern combination expressed by bit "B7" in the 0th byte of the storage area type data; the second two bits represent the attribute corresponding to the pattern combination expressed by bit "B6" in the 0th byte of the storage area type data; the third two bits represent the attribute corresponding to the pattern combination expressed by bit "B5" in the 0th byte of the storage area type data; and the fourth two bits represent the attribute corresponding to the pattern combination expressed by bit "B4" in the 0th byte of the storage area type data.

Note that here, four attribute patterns are set: "NON," "REP," "FRU," and "BB," which are represented as "00," "01," "10," and "11" in bit sequences, respectively.

In this embodiment, a method for acquiring 2-bit data by shifting 2 bits to the left was described. However, the same method of acquiring 2-bit data by shifting 2 bits to the right may also be used. In that case, since step S2535 of the 2-bit data acquisition process involves "shifting the data 2 bits to the right," it is necessary to consider the arrangement of each data as described above.

The above explains the 2-bit data acquisition process. Because this 2-bit data acquisition process has fewer possible patterns, it allows for a configuration where smaller data sizes are required, for example, by storing four pieces of data in a 1-byte area. While this configuration is effective for data areas 2102b within the usage area where capacity is limited, it can also be applied to data stored in data areas outside the usage area 2102d for the purpose of improving development efficiency and maintainability through program commonality, and for saving space that may be required in the future.

[5. Common processing using the lower address of the counter as an input parameter]
Figure 203 conceptually illustrates the flow of processes that commonly utilize the medal payout process in the three processes shown in Figures 182 and 183 (medal payout/re-play activation process, settlement execution process, and medal payout process).

In Figure 203, the start and end symbols (step S2292, RET) of the medal payout/re-play operation process (step S2281) are shown in a simplified form, omitting detailed processing. Furthermore, the start and end symbols (step 2305, RET) of the settlement execution process (step S2293) are also shown in a simplified form, omitting detailed processing. The settlement execution process also includes the start symbol for the medal payout process (step S2298), and if this medal payout process is called, the process proceeds to the aforementioned end symbol (step 2305, RET).

The medal payout and re-play operation process is called from the main process shown in Figure 170 (step S2014), as described above. More specifically, it is called when medals are paid out at the end of a unit of play. On the other hand, the settlement execution process is called when the player presses the settlement button (the state where medals can be accepted and the machine is waiting to start a unit of play) from a predetermined program (for example, the settlement button press detection process (a program that detects the settlement button being pressed) in the medal acceptance/start check process (step S2003) of the main process in Figure 170).

The medal payout process is called in three flows. In the first flow, it is called from the medal payout/re-play operation process when the credit counter reaches its limit, to pay out the medals overflowing from the credit. In the second flow, it is called from the settlement execution process when a settlement instruction is given to pay out medals related to the credit counter. In the third flow, similarly from the settlement execution process, it is called when paying out medals related to the medal insertion counter. As described above, in the settlement execution process, the medal payout process will be called twice under predetermined conditions.

Here, referring to Figure 203, the first to third flows described above will be explained in detail. The first flow is indicated by the thick solid arrow. First, the main process calls the medal payout/re-play activation process (step S2281), where it executes the processes related to medal payout and re-play activation, sets the address of the payout counter storage area in a predetermined register, calls the medal payout process (step S2298), where it executes the processes related to medal payout, and then returns to the calling main process upon termination (step 2305, RET).

Here, the medal payout process is called, for example, by a jump instruction (JP). With a jump instruction, the program counter is not saved to the stack area, and the program counter is continuously updated while the instruction is being executed. Therefore, even after the medal payout process finishes, the program does not return to the caller (the instruction following the jump instruction). Upon completion of the medal payout process (step S2305, RET), the program returns to the instruction that called the medal payout/re-play operation in the main process, and the next instruction is executed.

On the other hand, a call instruction (CALL) saves the program counter of the called instruction to the stack area. When the called process finishes, it returns to the caller, and the next instruction corresponding to the program counter saved in the stack area is executed.

The second flow is indicated by the dotted arrow. First, the settlement button press detection process in the medal reception/start check process of the main process, upon pressing the settlement button, calls the settlement execution process (step S2293) to execute the settlement-related processing. There, the address of the credit counter storage process is set in a predetermined register, and the medal payout process (step S2298) is called using a call command (CALL). There, the medal payout-related processing is executed, and the process returns to the caller upon termination (step 2305, RET).

The third flow is indicated by a dashed-dotted arrow. After returning to the caller in the second flow, the program proceeds to the next instruction, where the address of the medal insertion counter storage area is set in a predetermined register. The medal dispensing process (step S2298) is then executed again, where the medal dispensing process is performed. Finally, upon termination (step 2305, RET), the program returns to the settlement button press detection process of the caller of the settlement execution process.

As shown in Figure 203, immediately before the medal dispensing process is called, the storage areas for three types of medal counters are set in predetermined registers. This process allows the medal dispensing process to be used commonly to dispense medals equal to the number of medal counters, eliminating the need to write separate medal dispensing processes for each medal counter and thus saving capacity in the program area 2102a within the main ROM 2102's usage area.

Figure 204 illustrates how the storage areas for each medal counter are set up and how these storage areas are referenced when the medal payout process described in Figure 203 is called.

The common medal dispensing process, for example, receives the lower address of the storage area for each medal counter (in this embodiment, the lower byte of a 2-byte address) from the calling program into the DE register or HL register. It then sets a predetermined upper address in that register to identify the address of each medal counter's storage area. Finally, it retrieves the number of medals for each medal counter by referencing the working area 2103a within the main RAM 2103's usage area, and dispenses the retrieved number of medals (processing such as medal dispensing count check (step S2302)).

For example, when the calling side wants to perform a payout process related to the payout counter, it sets the lower address "20"H of the payout counter's storage area as an input parameter in the DE register and calls the medal payout process. The medal payout process then recognizes that it is a payout process related to the payout counter, and for example, sets "F0"H in the upper byte of the DE register to "F020"H, and uses this as an address to reference the payout counter in the working area 2103a within the usage area (for example, referenced with the code "(LD A, DE)"). In this example, the 1-byte payout counter stored at the address "F020"H contains the number of medals "15".

Here, the upper bit of the DE register is set to "F0"H. This is a predetermined setting between the calling program and the medal dispensing program being called. This setting eliminates the need to send the value of "F0"H as an input parameter to the medal dispensing program, thereby reducing the size of load instructions and other commands in the calling program, and ultimately saving capacity in the program area 2102a within the main ROM 2102's usage area. While a fixed value like "F0"H is set here, the upper address can be changed depending on the value of the lower address received as an input parameter. For example, if the lower address is less than "80"H, "F1"H can be used as the upper address; if the lower address is "80"H or greater, "F0"H can be used as the upper address.

The same applies to the credit counter. First, the lower address "40"H of the credit counter's storage area is set as an input parameter in the DE register, and the medal payout process is called. The medal payout process then recognizes that it is a payout process related to the credit counter. For example, the upper bit of the DE register is set to "F0"H to make "F040"H, and this is used as the address to reference the credit counter in the working area 2103a within the usage area (for example, the value is referenced with a code such as "(LD A, DE)"). In this example, the 1-byte credit counter stored at the address "F040"H contains the number of medals, "42".

The same applies to the medal insertion counter. First, the lower address "60"H of the storage area for the medal insertion counter is set as an input parameter in the DE register, and the medal dispensing process is called. The medal dispensing process then recognizes that it is a dispensing process related to the medal insertion counter. For example, the upper bit of the DE register is set to "F0"H to make "F060"H, and this is used as the address to reference the medal insertion counter in the working area 2103a within the usage area (for example, referenced with the code "(LD A, DE)"). In this example, the 1-byte medal insertion counter stored at the address "F060"H contains the number of medals "2".

As described above, the medal dispensing process receives the number of medals to be dispensed as an input parameter and performs the dispensing process based on the number of medals obtained. In this embodiment, when this process is called, one of the following is received as an input parameter: the dispensing counter, the credit counter, or the medal insertion counter. The number of counters received is used as the number of medals to be dispensed. Furthermore, since the input parameter uses the lower address of the address where each medal counter is stored (for example, the lower byte (8 bits) of an address represented by 2 bytes), the size of load instructions, etc., can be reduced compared to specifying the entire upper and lower part of the address. This leads to capacity savings in the program area 2102a within the main ROM 2102's usage area. Additionally, because the medal dispensing process is used as a common process through this parameter passing method, it is not necessary to write separate medal dispensing code for each medal counter, further saving capacity in the program area 2102a within the usage area.

[6. Method for determining the starting address for clearing the unused RAM area]
As can be seen by referring to Figure 172, when the power to the gaming machine is turned on and the CRC inspection process (outside the usage area) is performed, if a CRC abnormality is detected, "Game recovery impossible state 1 (CRC abnormality)" is set in the game recovery state storage area. If the power outage flag is not on (i.e., the power outage interrupt process is not performed normally), "Game recovery impossible state 2 (power outage abnormality)" is set in the game recovery state storage area. In all other cases, "Game recovery possible state (normal)" is set in the game recovery state storage area.

Then, referring to Figure 171, the main RAM 2103 is initialized only when an operation to change the settings has been performed (Yes in step S2035) (specified RAM initialization process (step S2036)). Furthermore, before this initialization is performed, if the aforementioned game recovery state storage area is in "Game Recovery Impossible State 1 (CRC Abnormal)" or "Game Recovery Impossible State 2 (Power Outage Abnormality)," or if the game recovery impossible error flag is set to data indicating "Recovery Impossible," then the RAM initialization address is set to the "RAM Abnormality Clear Address" related to the RAM area 2203a within the used area. If the game recovery state storage area is in "Game Recovery Possible State (Normal)," and the game recovery impossible error flag is set to data indicating "Recovery Possible," then the RAM initialization address is set to the "Setting Change Clear Address" related to the RAM area 2203a within the used area. Then, proceeding to the specified RAM initialization (step S2146) shown in Figure 176, the RAM initialization address is saved in the start address storage area, and based on this address, the out-of-used RAM initialization process (out-of-used area) (step S2150) is performed first.

Figure 177 shows the flow of the RAM initialization process outside the used area (outside the used area). In this case, the RAM initialization address is set to either the "RAM error clear address" related to the RAM area 2203a within the used area, or the "setting change clear address" related to the RAM area 2203a within the used area. Here, the RAM initialization process outside the used area (outside the used area) performs RAM initialization outside the used area if the lower address of the RAM initialization address stored in the start address storage area (for example, the lower byte of the total 2 bytes) is stored in the storage determination area, and the lower byte is a lower address of the "RAM error clear address" related to the RAM area 2203a within the used area. In other words, here, the clear address related to the RAM area 2203a within the used area is determined by the lower address, and the initialization start address is set to the clear address of the RAM area outside the used area 2203b.

Similarly, if the lower byte stored in the memory determination area is a lower address of the "setting change clear address" related to RAM area 2203a within the usage area, the setting change clear address is used as the initialization start address for RAM initialization outside the usage area. If the lower byte stored in the memory determination area is a lower address of the "BB (Special Prize) end clear address" related to RAM area 2203a within the usage area, the setting change clear address is used as the initialization start address for RAM initialization outside the usage area. In all other cases, the game end clear address is used as the initialization start address for RAM initialization outside the usage area.

Such a determination can be made, for example, by referring to correspondence data that associates the lower byte of the initialization address (RAM initialization address) related to the RAM area 2203a within the used area (i.e., the lower address stored in the memory determination area) with the initialization start address related to the RAM area 220b outside the used area. Furthermore, in this case, if the upper byte of the initialization start address related to the RAM area 2203b outside the used area is a fixed value such as "F2", then only the lower byte of this address needs to be stored. Also, in the example shown in Figure 177, the used area clear address at the end of a game is set only if no match was found previously; therefore, it is not necessary to maintain the correspondence relationship for the used area clear address at the end of a game as the correspondence data described above. The correspondence data is stored, for example, in the data area 2102b within the used area.

Subsequently, returning to Figure 176, the RAM initialization within the used area (step S2151) is performed. At this time, either the "RAM error clear address" related to the RAM area 2203a within the used area (which is the RAM initialization address) or the "setting change clear address" related to the RAM area 2203a within the used area is used as the initialization start address.

Afterward, returning to Figure 171, the setting change process (step S2037) is performed, and the "setting change clear address" related to the RAM area 2203a within the used area is set to the RAM initialization address (step S2038). Then, when the transmission standby & RAM initialization process (step S2039) is called, processing starts from the transmission standby & RAM initialization process (step S2141) in Figure 176, and after first acquiring unsent data (steps S2142 to S2145), processing starts again from the specified RAM initialization process (step S2146). In this case, the RAM initialization address is only set to the "setting change clear address" related to the RAM area 2203a within the used area. Therefore, in the RAM initialization process outside the used area (outside the used area) (step S2150), the setting change clear address is used as the initialization start address for the outside-used area, and for the used area (step S2151), the "setting change clear address" related to the RAM area 2203a within the used area is used.

Furthermore, from the main process shown in Figure 170, the BB (Special Prize) game count check process (step S2131) is called. If it is determined that the BB (Special Prize) operation has ended, the BB (Special Prize) end clear address is set in the RAM initialization address. Then, similarly to the above, the lower address of that address is stored in the memory determination area. Based on this lower byte, the BB (Special Prize) end-of-use area clear address is set, and the RAM initialization outside the use area is performed. Subsequently, the RAM initialization within the use area is performed using the BB (Special Prize) end clear address in the RAM initialization address.

Furthermore, in the main game-ending performance control process (step S2016) shown in Figure 170, the game-ending clear address is set as the RAM initialization address. Then, similarly to the above, the lower address of that address is stored in the memory determination area. Based on this lower byte, the game-ending out-of-use area clear address is set, and the out-of-use RAM initialization is performed. Subsequently, the game-ending clear address of the RAM initialization address is used to perform the in-use RAM initialization.

Figure 205 shows an overview of each of the clear addresses described above. Regarding the working area 2103a within the main RAM 2103's usage area, the address positions of the "RAM error clear address," "setting change clear address," "BB (special prize) end clear address," and "game end clear address," which are set as the RAM initialization address, are indicated by solid arrows. Furthermore, regarding the RAM area 2203a within the usage area, a clear end address is fixedly set, and the initialization range extends from each of the above clear addresses, including the stack area 2103b within the usage area, to this clear end address.

The clear-end address is set to not initialize the first address (the largest address value, 2 bytes) of the stack area 2103b within the used area. This is because the program counter of the calling program is stored here, and after RAM initialization, it is necessary to return from the currently executing program to the calling program.

Regarding the out-of-use working area 2103c of the main RAM 2103, as described above, the address positions of the "out-of-use area clear address when a RAM error occurs," "out-of-use area clear address when settings are changed," "out-of-use area clear address when BB (special prize) ends," and "out-of-use area clear address when one game ends" are indicated by dotted arrows, based on the lower addresses of the RAM initialization address. Note that the names of each clear address are substituted with the clear addresses within the used area and are omitted from display. Furthermore, the out-of-use RAM area 2203b also has a fixed clear end address, and the initialization range extends from each of the above clear addresses to this clear end address. Note that the out-of-use stack area 2103d is not included in the initialization here, but it may be included in the clearing target. This area does not store game-related data and is therefore excluded from the clearing target in this embodiment.

As shown in Figure 205, the clear addresses for the working area 2103a within the main RAM 2103 are set to different address locations. On the other hand, as shown in Figure 205, the clear addresses for the working area 2103c outside the main RAM 2103 are set to the same address locations in some cases, but they may all be set to different address locations. In this embodiment, the clear address for the working area 2103c outside the main RAM is determined according to the lower address of the clear address for the working area 2103a within the main RAM. Therefore, it is necessary to ensure that the clear addresses for the working area 2103a within the main RAM do not contain the same address or have the same lower address value.

Furthermore, a non-cleared area, which is never initialized under any circumstances, is set at the beginning of the working area 2103a within the main RAM 2103's usage area and at the beginning of the working area 2103c outside the usage area. This area stores data that should be retained even when the RAM is initialized.

With this configuration of the embodiment, the clear address (clear start address) for RAM initialization related to the RAM area 2203a within the usage area is used as the selection condition for the clear address (clear start address) for RAM initialization related to the RAM area 2203b outside the usage area. Therefore, it becomes unnecessary to create individual processing condition programs to select the clear address for RAM initialization related to the RAM area 2203b outside the usage area according to the state of the gaming machine, resulting in a reduction in the capacity of the main ROM 2102.

Furthermore, since the clearing process for the unused RAM area 2203b can be completely isolated, it becomes easier to create and maintain programs for other standards.

[7. Standardization of reel stop control processing in actual and simulated gameplay]
In this embodiment, similar to the first embodiment, a simulated game is performed. As described with respect to the first embodiment, a simulated game is performed during the execution of a performance when predetermined execution conditions are met. In addition, in the simulated game, stop operations using the stop buttons (for example, the stop buttons corresponding to the stop buttons 8L, 8C, and 8R in the first embodiment) are accepted in the same way as in a normal game, and in particular, the process of monitoring the operation of the stop buttons is the same as in a normal game.

Therefore, in this embodiment, the stop button input monitoring process in normal gameplay and the stop button input monitoring process in simulated gameplay are unified (i.e., processed in the same subroutine). This reduces the overall program size, and consequently, saves program space in the main ROM. Furthermore, by making the above common processing a subroutine, the program structure becomes simpler, resulting in improved program development efficiency and maintainability.

The stop button input monitoring process in this embodiment determines whether a valid stop button press has occurred. If a valid press has occurred, it provides data indicating a valid press to the calling program and updates the stop button status information, etc.

Furthermore, this stop button input monitoring process generally corresponds to the determination process in step S113 of the reel stop control process (Figure 29) called in the main process (Figure 23) of the first embodiment during normal gameplay. At this step, it is determined whether or not a valid stop button press has occurred. The stop button input monitoring process of this embodiment will be explained in detail later using a flowchart, but since this is an example of its application to this embodiment, it may not be directly incorporated as the determination process in the reel stop control process of the first embodiment described above. The stop button input monitoring process of this embodiment, described later, is provided as an example to illustrate the technical concept of the present application.

Furthermore, the stop button input monitoring process of this embodiment described above generally corresponds to, for example, the processes S1063 and S1064 of the normal simulated game processing (Figure 47) called in the simulated game processing (Figure 46) of the second embodiment, and the determination process in step S1106 of the simulated game processing after reel animation (Figure 49) called in the simulated game processing (Figure 46) of the second embodiment. It also generally corresponds to the determination process in step S1251 of the normal simulated game processing (Figure 57) of the third embodiment, and the determination process in step S1262 of the stop button operation reception processing (Figure 58), where it is determined whether or not a valid stop button has been pressed. The stop button input monitoring process of this embodiment will be explained in detail later using a flowchart. However, since this is an example of its application to this embodiment, it may not be directly incorporated into the normal simulated game processing and post-reel animation simulated game processing of the second embodiment, or the normal simulated game processing of the third embodiment, as described above. The stop button input monitoring process of this embodiment, described later, is provided as an example to illustrate the technical concept of this application.

Figure 206 shows a flowchart of the stop button input monitoring process in this embodiment. In this process, first, in step S2551, the address of the stop button input state storage area is set in a predetermined register. This sets the address of the input port storage area 1 (an area within the main RAM 2103) that stores the state of the stop button input port, which was input in the periodic interrupt processing input port processing (step S2362) in Figure 186, to (for example, the HL register).

Next, in step S2552, input port on-edge data is acquired. Here, the address of input port storage area 0 (an area within the main RAM 2103) that stores the input port edge state of the stop button, which was input during the periodic interrupt processing input port processing (step S2362) in Figure 186, is set (for example, in the DE register).

Next, in step S2553, a logical OR operation is performed on the data obtained in step S2551 and the data obtained in step S2552, and data for a valid stop button input is obtained from the result of the operation. A valid stop button input is defined as a non-chattering press, and the corresponding reel is rotating. If multiple stop buttons are pressed simultaneously, the leftmost stop button takes priority (for example, in the first embodiment, stop buttons 8L, 8C, and 8R are prioritized in that order). Also, if the first reel is stopped and the second reel is rotating, and stop buttons 8L and 8C are pressed simultaneously, stop button 8L takes priority, and stop button 8C is invalidated.

Next, in step S2554, it is determined whether the press input is valid or not. If it is not valid (No. in step S2554), the process ends, and data indicating the determination result "Invalid" is retained. If it is valid (Yes in step S2554), the following steps acquire information on the stop button corresponding to the acquired information on the validly pressed stop button, and information on the operation status of the stop button.

Specifically, in step S2555, the address of the first reel control data storage area is set in a predetermined register; in step S2556, the stop button activation bit is set in a predetermined register; in step S2557, the above address is updated for one reel; in step S2558, the stop button activation bit is updated for one stop button; and in step S2559, the enabled/disabled information is extracted from the acquired stop button input.

Next, in step S2560, it is determined whether the information is valid or not. If it is not valid (No in step S2560), the process returns to step S2557. If it is valid (Yes in step S2560), the status information of the stop button, etc., is updated.

Specifically, in step S2561, the stop button information in the stop button input state storage area is updated; in step S2562, the operation state is stored in the stop button operation state storage area; and in step S2563, the stop button operation counter is decremented by 1. Afterward, the process ends by retaining data indicating the determination result is "valid".

In this configuration, the stop button input monitoring process is called separately for normal gameplay and simulated gameplay. The stop button input state storage area, stop button activation state storage area, and stop button activation counter are used in both normal and simulated gameplay, allowing the processing to be shared.

[8. Common processes for backup generation and backup restoration]
The process related to the generation of the common information backup shown in Figure 207 generally corresponds to, for example, the backup process of the fourth embodiment described above (step S4602 in Figure 163). However, since the process related to the generation of the common information backup shown in Figure 207 is an example of the process implemented in this embodiment, it may not necessarily be directly incorporated as the backup generation process of the fourth embodiment described above. The common information backup generation process described here is provided as an example to illustrate the technical concept of the present invention.

The process for generating a common information backup, as shown in Figure 207, is executed, for example, in the process of this embodiment corresponding to the lever-on AT-related processing of the fourth embodiment shown in Figure 163. In the lever-on AT-related processing, a process unaffected by penalties is executed first. Next, a backup process is executed to store the original information of various data (AT-related parameter counters and flags) in order to cancel the update of various data (AT-related parameter counters and flags) if a penalty occurs. Subsequently, the lever-on AT-related processing performs various AT-related lotteries at the time of lever-on, and updates various data according to the results of the AT-related lotteries at the time of lever-on. Here, the various data corresponds to the data stored in the "common information storage area" of this embodiment, which will be described later, and the backup information corresponds to the data stored in the "common information backup storage area" of this embodiment, which will be described later.

Furthermore, the AT-related processing at the time of lever-on is a process executed in the game start state control processing of the main processing in the first embodiment (step S6 in Figure 23), and this process corresponds to the game start state control processing of the main processing in this embodiment (step S2006 in Figure 170). In the game start state control processing, when the start lever is operated, the "AT-related processing at the time of lever-on" as shown in Figure 163 (of the fourth embodiment) is performed. Also, as described above, in the AT state, a favorable stopping operation pattern is notified to the notification means (for example, a device corresponding to the notification monitor or main display device 210 in the first embodiment).

The common information backup and restoration process shown in Figure 207 and Figure 208 corresponds, for example, to the process related to the restoration of common information, which is the process of the fourth embodiment described above (step S4624 in Figure 164 (the process of assigning the backed-up information to various counters and flags, i.e., the process of returning the data from the common information backup storage area to the common information storage area)). Note that the common information backup restoration process shown in Figures 207 and 208 illustrates the process implemented in this embodiment and may not be directly incorporated as the backup and restoration process of the fourth embodiment described above. The common information restoration process described here is provided as an example to illustrate the technical concept of this application.

The common information recovery process shown in Figure 208 is called, for example, in the process of this embodiment corresponding to the AT-related processing during full stop in the fourth embodiment shown in Figure 164. In the AT-related processing during full stop, when all reels stop, various AT-related draws are performed during full stop, and then various information (counters, flags, etc.) is updated according to the results of the AT-related draws during full stop. If a predetermined penalty condition is met, the updated information is written back to the backup information data, and the updates of the various information (i.e., the updates according to the AT-related draw results at lever-on shown in Figure 163, and the updates according to the AT-related draw results during full stop) are canceled. Here, the various information corresponds to the data stored in the "common information storage area" of this embodiment, which will be described later, and the backup information corresponds to the data stored in the "common information backup storage area" of this embodiment, which will be described later.

Therefore, in this case, canceling the various information means that the content of the various information updated after the backup process (step S4602) as shown in Figure 163 (i.e., the various information updated in steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164) will be restored to the state of the data backed up in step S4602.

Furthermore, the AT-related processing during full shutdown in the fourth embodiment (Figure 164) is a process executed in the game end state control processing of the main processing in the fourth embodiment (step S15 in Figure 23), and this process corresponds to the game end state control processing of the main processing in this embodiment (step S2015 in Figure 170).

Figure 207 shows a flowchart illustrating the processing procedure for generating a common information backup. In this process, first, settings related to the generation of the common information backup are set in predetermined registers (step S2581). Then, in step S2584, the next pseudo-game selection animation number is cleared. In step S2585, the address of the common information backup storage area (i.e., the area where the data stored in the common information storage area is backed up) is set, for example, in the HL register. In step S2586, the address of the common information storage area is set, for example, in the DL register.

In this example, the common information storage area is the target of backup (data recovery), and, for example, similar to the fourth embodiment described above, it includes AT-related parameters (various information that can be updated as a result of AT-related processing, such as counters and flags). Some examples of these AT-related parameters are shown in Figure 162.

Next, in step S2587, the data length of the common information storage area is set in a predetermined register, and in step S2588, it is determined whether it is a backup restore or a backup. If it is not a backup restore (i.e., a backup creation) (No. in step S2588), in step S2589, the addresses of the common information backup storage area and the common information storage area are swapped.

If it is determined in step S2589, or in step S2588, that this is a backup restore (Yes in step S2588), then the process proceeds to step S2590, where the data from the storage area indicated by the source address is transferred to the storage area indicated by the destination address.

Here, as described above, since the common information backup generation process is called in the game start state control process of the main process (step S2006 in Figure 170), the determination of whether it is a backup restore or a backup in step S2588 is No, and the addresses are swapped in step S2589. Then, in the transfer process of step S2590, the source address becomes the address of the common information storage area, and the destination address becomes the address of the common information backup storage area. Through this process, a backup of the AT-related parameters is obtained.

Furthermore, when the common information backup recovery process is called from step S2617 of the common information recovery process shown in Figure 208 (described later) with the A register as an argument, the process in step S2582 of Figure 207 begins. This process determines whether recovery is possible or not (i.e., whether the backup judgment value (A register) = 0 or not). If recovery is determined to be possible (A register = 0) (Yes in step S2582), the process proceeds to step S2583 described above. If recovery is not determined to be possible (A register ≠ 0) (No in step S2582), the process terminates.

If the result in step S2582 is "Yes," the process proceeds to step S2583, as described above, and the same processing is performed. However, since this is a process starting from the common information recovery process, the determination of whether it is a backup recovery or a backup in step S2588 is "Yes," and no address swapping occurs in step S2589. Then, in the transfer process of step S2590, the source address becomes the address of the common information backup storage area, and the destination address becomes the address of the common information storage area. This process restores the backup of the AT-related parameters.

Figure 208 shows a flowchart illustrating the processing procedure for the common information recovery process. This process determines whether or not to perform the common information backup recovery process, that is, whether or not the penalty condition is met. This determination is similar to the condition described in relation to step S4623 in Figure 164 in the fourth embodiment described above.

First, in step S2611, if it is within the advantageous period (i.e., not within the non-advantageous period) (Yes in step S2611), this is one of the penalty conditions, and the process proceeds to step S2612. If it is not within the advantageous period (No in step S2611), the process ends. Next, in step S2612, it is determined whether the first spin is the first stop. If the first spin (for example, reel 3L) is not the first stop (i.e., a stop operation (irregular press) has been performed on the middle reel 3C or the right reel 3R as the first stop operation) (No in step S2612), this is one of the penalty conditions, and the process proceeds to step S2613. If the first spin results in the first stop (Yes in step S2612), the process proceeds to step S2617. In this case, the backup judgment value is the payout game status flag. Since the payout game status flag has not been acquired, a non-zero value is set in the A register. When the process proceeds to the common information backup recovery process in step S2617, the actual backup recovery process is not performed, and the process terminates.

In step S2613, the payout game state flag is acquired. The payout game state flag allows us to understand the current payout state. For example, in the fourth embodiment, we can understand states such as pseudo-BIG, pseudo-REG, pseudo-BIG (ED), and the 3BB game state shown in Figure 81. Here, in step S2614, it is determined whether the acquired payout game state flag corresponds to any bonus state. If it is a bonus state (Yes in step S2614), the process proceeds to the common information backup and recovery process in step S2617. Here, for example, whether or not the backup and recovery process is performed is determined based on the value of the payout game state flag. For example, if the value of the payout game state flag is set in register A and its content is set to 0, the penalty condition is met, and the backup and recovery process is performed.

If neither bonus state is present (No. in step S2614), the process proceeds to step S2615 to determine whether the internal winning combination is a target combination for evaluation. If it is not a target combination for evaluation (No. in step S2615), the process proceeds to step S2617. Here, if a non-zero value is set in register A and the common information backup/restore process is called in step S2617, the actual backup/restore process is not performed, and the process terminates.

If the target role is determined (Yes in step S2615), in step S2616, a backup judgment value is obtained according to the internally winning role. That is, whether or not the penalty condition is met is determined by the internally winning role. The backup judgment value stores data indicating whether a recovery occurred (A register = 0) or not (A register is not 0). Next, the process proceeds to step S2617, where the common information backup recovery process shown in Figure 207 is called with the A register as an argument, and the process ends. Furthermore, in the common information backup recovery process shown in Figure 207, the backup recovery process is performed if the A register is 0.

The determinations in steps S2611 to S2615 relate to penalty conditions. If these penalty conditions are met, a backup restoration process is performed, and the updates to various information are restored to their original state. As described above, the penalty conditions are determined according to whether or not the game is in a favorable period, the stopping pattern of the first spin, the bonus state, and the internal winning combination.

Here, with reference to Figure 209, the common information backup generation process and the common information backup restoration process in this embodiment will be outlined.

Figure 209(A) shows an overview of the backup and restore process (so-called restore process) in the common information backup and restore process. In the main RAM 2103 shown on the left, common information is stored from address "F020"H in the working area 2103a within the used area, extending over a length of L1. The area shaded with diagonal lines in the lower left direction is the common information storage area. Address "F020"H is stored in the DE register. On the other hand, common information backups, which are the common information from a previous version, are stored from address "F030"H in the working area 2103a, extending over a length of L1. The area shaded with diagonal lines in the lower right direction is the common information backup storage area. Address "F030"H is stored in the HL register.

When the transfer instruction shown in (1) is executed in this state of the main RAM 2103, a region of length L1, starting from the address stored in the HL register, is transferred to a region beginning with the address stored in the DE register. As a result, the state of the main RAM 2103 becomes as shown on the right. In other words, the common information data is overwritten with the common information backup data.

This transfer instruction corresponds, for example, to the process in step S2590 shown in Figure 207.

Figure 209(B) shows an overview of the backup generation process (so-called backup process) in the common information backup generation process. In the main RAM 2103 shown on the left, common information is stored from address "F020"H in the working area 2103a within the used area, extending over a length L1. The area shaded with diagonal lines in a grid pattern is the common information storage area, and this indicates that the data has been updated from the state shown in Figure 209(A).

On the other hand, within the working area 2103a of the usage area, from address "F030"H to length L1, the common information of the version used for backup restoration in Figure 209(A) is stored. The area shaded with diagonal lines in the lower right direction is the common information backup storage area.

When the exchange instruction shown in (1) is executed in this state of the main RAM 2103, the addresses stored in the HL register and the DE register are swapped. As a result, contrary to Figure 209(A), address "F020"H is stored in the HL register, and address "F030"H is stored in the DE register.

Furthermore, when the transfer instruction in (2) is executed, a region of length L1, starting from the address stored in the HL register, is transferred to a region beginning with the address stored in the DE register. As a result, the main RAM 2103 becomes as shown on the right. That is, the common information backup data is overwritten with the common information data.

This exchange instruction corresponds to, for example, the processing in step S2589 shown in Figure 207, and the transfer instruction corresponds to, for example, the processing in step S2590 shown in Figure 207. Although the data transfer direction is reversed in Figures 209(A) and 209(B), this is because the register values are swapped by the exchange instruction in Figure 209(B), and the code itself is the same.

As described above, in the game start state control process (step S2006), the common information backup generation process shown in Figure 207 is executed, and backups of various types of information are acquired. Then, in the game end state control process (step S2015), the common information restoration process shown in Figure 208 is executed, and the acquired backups are used to restore the various types of information to their state at the start of the game. However, if the aforementioned penalty conditions are met, the backup restoration process is performed to cancel the update of the various types of information at the end of the game.

Furthermore, the common information recovery process shares most of its operations with the common information backup generation process, except for the penalty condition determination. Clearing the next pseudo-game performance number, setting each storage area address, and setting the storage area length are all common to both processes. When transferring data, the common information recovery process and the common information backup generation process reverse the data transfer direction by swapping the storage area addresses.

This standardization of programs can alleviate the strain on the main ROM's program area capacity. Furthermore, by promoting program standardization in this way, the program's structure and description can be made more concise, improving the development efficiency and maintainability of the program.

[9. Detection of errors that prevent game recovery]
The game recovery impossible error processing (outside the usage area) shown in Figure 174, when called, sets the interrupt to disabled, prohibits the insertion of tokens, displays a message on the information display device (7-segment LED) indicating that a game recovery impossible error has occurred, and then starts an infinite loop. This process ensures that when a game recovery impossible error is detected and the game recovery impossible error processing (outside the usage area) is called, the pachislo machine 2001 enters a standby state in an infinite loop. At this time, the pachislo machine 2001 will not accept any operations other than turning off the power, or at least it will be impossible to start a game. Here, if the power of the pachislo machine 2001 is turned off and then turned on again, and the setting key is used to change the settings, the setting change operation becomes possible (see Figure 171). If the setting change operation is not performed when turning on the power, the machine will enter the same standby state again.

Furthermore, the causes of the game recovery failure error include: (1) when the CRC value calculated at power-on and the CRC value calculated at power-off and stored in the CRC value storage area 2103e are found to be inconsistent (see Figures 171 and 172); when the comparison of the CRC values as described above is correct, but the CRC value calculation was not performed (or was not performed correctly) during the power-off interrupt processing (see Figures 172, 190, and 191); and (3) when an abnormality in the set value or the random number circuit is detected during the error detection processing (outside the used area) in the periodic interrupt processing (see Figures 186, 188, and 189).

Here, for causes (1) and (2) above, the game recovery impossible error processing (out of used area) is executed immediately upon power-on when the game recovery impossible error is detected. However, for cause (3), the game recovery impossible error processing (out of used area) is not executed upon power-on; instead, the game recovery impossible error processing (out of used area) is executed during the internal lottery process (see Figure 179).

For this type of processing, in the case of cause (3), data indicating "recovery impossible" is set to the game recovery impossible error flag, and the content of this flag is determined in the internal lottery process. As shown in Figure 170, the internal lottery process is executed after the medal reception and start check process, and is performed when medals are inserted (or credits are available) and the start switch is turned on by operating the start lever (i.e., when the player instructs to start the game).

With this configuration of the embodiment, if an abnormality in the set value or the random number circuit is detected, the abnormality will not be displayed or a waiting process (infinite loop) will not occur at the time of detection. The abnormality will then be displayed and the system will enter a waiting state when the start lever is operated and gameplay begins.

The behavior of this pachislo machine 2001 is based on the assumption that fraudulent activity (so-called cheating) occurs after the amusement parlor closes, and that the person who committed the fraud (for example, a hired player) starts playing immediately after the parlor opens the next day, attempting to gain profit through fraud. With the mechanism described above in this embodiment, the person who committed the fraud will only see an abnormality displayed on the machine and enter a standby state after starting to play immediately after opening, allowing for immediate identification of the person who committed the fraud (even if they cannot be apprehended on the spot, video footage of the player operating the machine can be obtained). At this point, the person who committed the fraud will start playing under the mistaken belief that their fraudulent activity from the previous day was successful.

On the other hand, if an anomaly caused by fraudulent activity is detected, and the gaming machine displays that anomaly and enters a standby state, then, as described above, if the fraudulent activity occurred after closing time the previous day, the anomaly will be displayed and the machine will enter a standby state when the staff turns on the power to the gaming machine before the arcade opens. Therefore, the person who committed the fraud will not be present, and it will be impossible to identify the perpetrator.

The fifth embodiment of the present invention has been described above with reference to the drawings. However, these configurations and processes are merely illustrative, and the technical concept of the present invention can be realized in various other configurations and methods. Furthermore, while the above description primarily focuses on the application of the technical concept of this application to pachislo machines, it can also be applied to pachinko machines and the medalless gaming machine of the sixth embodiment described later.

[Sixth Embodiment]
(Coinless gaming machine)
In the pachislo machine 2501 of this embodiment, gameplay is started with the player making a bet (i.e., inserting tokens into the token slot 2505 to place a bet, or betting credited tokens by operating the MAX bet button 2506a or the 1 bet button 2506b) as one of the starting conditions. When the game ends and there are tokens to be paid out, the hopper device 2532 is driven to dispense tokens from the token payout port 2511, or the tokens are credited. However, the configuration of the pachislo machine 2501 is not limited to this.

For example, the invention according to this embodiment is applicable to all forms in which a player bets the game value necessary for the game, the game is played based on that bet, and a reward (e.g., game value is awarded) is given based on the result of the game. That is, it is applicable not only to forms in which medals are physically inserted (bet) and dispensed by the player's actions, but also to pachislo machines 2501 that electromagnetically manage the game value held by the player (or, even if not electromagnetically, manage it in a manner that prevents the player from directly touching the game value), enabling medalless gameplay. Here, such a pachislo machine 2501 is referred to as a "medalless game machine." Note that medalless game machines are sometimes referred to as "managed game machines" or "sealed game machines."

Furthermore, the electromagnetic management of the game value held by the player may be performed by the main control circuit 2600 (main control board 2571) itself, or by a game value management device attached to (connected to) the main control circuit 2600 (main control board 2571) (hereinafter, such a management device may be described as a "medal count control board"). An example of how this game value management device is provided will be described below.

The game value management device is a device installed in the pachislo machine 2501, comprising at least ROM and RWM (or RAM), and is connected to an external game value provisioning device (hereinafter, such a game value provisioning device may be described as a "communication-only unit") via a communication device (hereinafter, such a communication device may be described as a "connection terminal board") in a bidirectional manner. The game value management device can perform operations such as game value lending (i.e., operations that provide game value necessary for the player to bet game value), game value granting (i.e., operations that provide the granting game value to the player when a winning combination related to the granting of game value is achieved), and operations that electromagnetically record the game value provided by these operations. The game value provisioning device may be referred to as a "game value (game medium) handling device," a "game value (game medium) lending device," or a "sandbox," etc.

Furthermore, the external gaming value provision device is connected to an external payout management device (payout management server). The gaming value management device is configured to transmit payout management information to the external payout management device via a communication device and the external gaming value provision device. Here, the payout management information consists of various types of information necessary for the external payout management device to manage payouts. An example of payout management information will be described later. The connection between the external gaming value provision device and the external payout management device is, for example, via an internet connection.

Here, "payout" directly refers to the number of game tokens dispensed. However, in this embodiment, it also encompasses concepts such as the degree to which benefits are granted to the player (e.g., how much the player profited (how much the arcade lost), or how much the player lost (how much the arcade profited), the duration of advantageous states (e.g., bonus states, AT states, or a series of advantageous periods), and the degree of gambling potential expected from combinations of these factors.

Furthermore, for example, a display device (not shown) showing the number of game values held may be provided on the front side of the pachislo machine 2501, and the game value management device may manage the number of game values displayed on this display device based on the management results of the number of game values. That is, the game value management device may not only record the total number of game values that the player can use for playing by electromagnetic means, but may also be configured to control the display of the recorded results. In this case, it is desirable that the game value management device has the capability to allow the player to freely transmit a signal indicating the recorded number of game values to an external game value providing device, that the recorded number of game values cannot be reduced except by direct operation by the player, and that the signal indicating the recorded number of game values can only be transmitted via a communication device.

Furthermore, the game value management device may not only have the function of electromagnetically managing the player's game value using an external game value provisioning device, but may also have the function of managing the number of game values bet by the player's physical actions and the number of game values paid out by the physical actions of the pachislo machine 2501. In other words, it may also be capable of managing the actual insertion and payout of tokens in a conventional pachislo machine 2501. In this way, the pachislo machine 2501 can be controlled using conventional methods, or using methods such as those for the aforementioned tokenless game machine, thus allowing for a common configuration regardless of the specifications of the pachislo machine 2501. In this case, the game value management device may directly control the selector 2531 and hopper device 2532, or it may be indirectly controlled by the main control circuit 2600 (main control board 2571), with the control results being transmitted.

Furthermore, the pachislo machine 2501 should be equipped with various operating means necessary for the operation of a medalless gaming machine, such as lending and return (settlement) operating means that can be operated by the player. The gaming value provision device should also be equipped with various devices, including an insertion slot for valuable items such as banknotes, an insertion slot for recording media (e.g., IC cards), and a contactless communication antenna for depositing electronic money from mobile terminals, as well as various operating means necessary for the operation of a medalless gaming machine, such as lending and return operating means that can be operated by the player (none of which are shown). Note that the insertable recording media include not only non-member recording media issued by the gaming parlor on the day, but also member recording media held by members of the gaming parlor. The gaming value recorded on the non-member recording media is valid only on the day of issue (it becomes invalid from the following day onwards), but the gaming value recorded on the member recording media remains valid from the following day onwards.

An example of the game flow in this case is explained below. For example, first, the player deposits valuable value into the game value provision device using one of the methods. The game value provision device subtracts a predetermined number of valuable value in response to the player's operation of one of the lending operation means, and provides the pachislo machine 2501 with game value corresponding to the subtracted valuable value. The player then plays the game, and if more game value is needed, repeats the above operation. After that, when the player has acquired a predetermined number of game value as a result of the game and is ready to end the game, the player operates one of the return operation means. The game value management device transmits the number of game value to the game value provision device in response to the player's operation of one of the return operation means. The game value provision device ejects a recording medium that has recorded the transmitted number of game value. The game value management device clears the number of game value it has stored when it transmits the number of game value. Players can take the dispensed recording medium to a prize exchange center to exchange it for prizes, or they can insert the dispensed recording medium into another pachislo machine (2501) compatible with the game value provision device and continue playing. Furthermore, if the dispensed recording medium is a member recording medium, it remains valid for subsequent days, allowing players to stop playing at that point.

In the example above, the game value management device transmitted the total game value to the game value provision device in response to the player's return operation. However, depending on the nature of the player's return operation, the system may be configured to transmit only the game value desired by the player. In other words, the game value held by the player may be divided. Furthermore, while the game value provision device recorded the transmitted game value on a recording medium and discharged it, it may also transmit information of equivalent value to the player's mobile terminal using the aforementioned contactless communication antenna, or it may discharge, for example, cash or cash equivalents, as long as it provides the player with something of equivalent value.

Furthermore, if the pachislo machine 2501 is not properly connected to the game value provision device (communication-only unit), and information corresponding to the game value is transmitted to the communication-only unit in response to the player's return operation, there is a risk that this information may be lost. Therefore, the main control circuit 2600 (main control board 2571) may be configured to, for example, control the machine into an error state when the game is started if it is not properly connected to the communication-only unit. In this error state, the machine may be configured to prevent the game from progressing by making it impossible to play (for example, by making it impossible to accept bet operations, return operations, start operations, etc.). This makes it possible to prevent the loss of information corresponding to the game value.

Furthermore, the pachislo machine 2501 or the game value provisioning device may be provided with a lock operation means that can be operated by the player, and in response to the operation of this lock operation means, it may be possible to control the device to a state where communication between the game value management device and the game value provisioning device is impossible (locked state). In this case, the pachislo machine 2501 or the game value provisioning device may be configured to allow authentication processing such as setting a PIN (and inputting the set PIN), issuing a one-time password (and inputting the issued one-time password), or biometric authentication, and the lock state may be released when the result of the authentication processing is successful.

As described above, with the coinless gaming machine, compared to a machine where the gaming medium is physically used for gameplay, some external structures such as the coin slot 2505 and coin payout port 2511, or some internal structures such as the selector 2531 and hopper device 2532, are no longer necessary. This not only reduces the cost and manufacturing cost of the gaming machine, but also reduces its power consumption. Furthermore, since accessing the inside of the gaming machine becomes more difficult, fraudulent activities against the machine can be prevented. In addition, because players do not directly touch the gaming medium, the gaming environment is improved and noise is reduced. In short, it becomes possible to provide a gaming machine that improves various aspects of the environment surrounding the gaming machine.

(Example configuration of a coinless gaming machine)
Next, with reference to Figures 210 to 213, another example (another configuration example, modified example, or expansion example) of the main control board of a pachislo machine will be described. Note that some or all of the specifications and functions described as an alternative example of the main control board in this embodiment can be applied to other gaming machines (other configuration examples) described in this embodiment, and some or all of the specifications and functions described as other gaming machines (other configuration examples) in this embodiment can be applied to the alternative example of the main control board in this embodiment. In other words, the invention according to this embodiment can be formed by appropriately combining these.

[A pachislo machine equipped with a main control board related to a separate example]
First, with reference to Figures 210 and 211, a pachislo machine equipped with a main control board according to an alternative example (referred to as pachislo machine 3001 in this example) will be described. Figure 210 is a block diagram showing the electrical configuration of pachislo machine 3001 equipped with a main control board 3011, and Figure 211 is a diagram showing an example configuration of a game information display unit 3037, a medal count display unit 3041, and a medal dispensing display unit 3042 provided in pachislo machine 3001 equipped with a main control board 3011. In this example, pachislo machine 3001 equipped with a main control board 3011 according to an alternative example is configured as a medalless game machine, but this is merely one example, and the inventions described in this example that do not require this configuration are, of course, also applicable to game machines that use physical game value to play games (pachislo machine 1, pachislo machine 2001, etc.).

The pachislo machine 3001 is configured to perform games by having the various configurations shown in Figure 210. Furthermore, the pachislo machine 3001, together with the game medium dispensing device 3002 and peripheral devices such as the data display 3003, constitutes a game system capable of performing various operations related to the game. Although not shown in the illustration, the game medium dispensing device 3002 and peripheral devices such as the data display 3003 are connected to the game parlor's management computer (hall computer) by, for example, a LAN line, and are configured to transmit data to the management computer. The game medium dispensing device 3002 also has the same functions as the game value provision device (communication-only unit) described above.

The pachislo machine 3001 comprises a main control board 3011, a sub-control board 3012, a door relay board 3013, and a sub-relay board 3014. The main control board 3011 and the door relay board 3013, the door relay board 3013 and the sub-relay board 3014, and the sub-relay board 3014 and the sub-control board 3012 are electrically connected to each other. Furthermore, the main control board 3011 and the sub-control board 3012 are electrically connected via the door relay board 3013 and the sub-relay board 3014, enabling one-way serial communication from the main control board 3011 to the sub-control board 3012.

The main control board 3011 includes a main control unit 3011a, which acts as a game control means (game control unit) for controlling the progress of the game, and a medal count control unit 3011b, which acts as a game value control means (game value control unit) for controlling the management of game value. The main control unit 3011a has the same functions as the main control board 2571 described above, and the medal count control unit 3011b has the same functions as the game value management device (medal count control board) described above.

In Figure 210, the main control unit 3011a and the medal count control unit 3011b are mounted on the same main control board 3011. However, they may be mounted on separate boards (configured as separate boards), and the same functions may be achieved by electrically connecting them.

The sub-control board 3012 is a performance control board that performs control related to performance effects and is housed in a resin sub-control board case (not shown). The door relay board 3013 is mounted at a specific location within the cabinet G (for example, on the rear side of the lower door mechanism DD) and is an intermediate control board for relaying signals between various devices and the main control board 3011, and between the main control board 3011 and the sub-control board 3012. The sub-relay board 3014 is also mounted at a specific location within the cabinet G (for example, on the rear side of the lower door mechanism DD) and is an intermediate control board for relaying signals between various devices connected to the sub-relay board 3014 and the sub-control board 3012, etc.

Furthermore, the pachislo machine 3001 has a power supply unit 3015 including a power supply board 3015a and a power switch 3015b.

Furthermore, the pachislo machine 3001 includes a reel unit 3021, a reset switch 3022, a setting key-type switch 3023, and a payout switch 3024, all of which are electrically connected to the main control unit 3011a. These may also be connected to the main control unit 3011a via a door relay board 3013. Alternatively, they may be connected to the medal count control unit 3011b, as long as the control functions smoothly.

The reel unit 3021 has the same functions as the reels 3L, 3C, and 3R (and stepping motors 51L, 51C, and 51R) described above. The reset switch 3022 has the same functions as the reset switch 53 described above. The setting key-type switch 3023 has the same functions as the setting key-type switch 52 described above. The settlement switch 3024 has the same functions as the settlement switch 9S described above.

However, since the pachislo machine 3001 in this example is configured as a coinless gaming machine, when the settlement switch 3024 detects that the corresponding settlement button (not shown) has been pressed, the number of credited coins is transmitted to the gaming medium dispensing device 3002 (described later) via the gaming ball connection terminal board 3043 (described later) (credit settlement is performed).

Furthermore, the pachislo machine 3001 includes a start switch 3031, a return switch 3032, a 1BET switch 3033, a MAXBET switch 3034, a stop switch board 3035, a door opening/closing switch 3036, and a game information display unit 3037. These are electrically connected to the main control unit 3011a via a door relay board 3013. These may also be directly connected to the main control unit 3011a without going through the door relay board 3013. Alternatively, they may be connected to the medal count control unit 3011b, as long as the control operates smoothly.

The start switch 3031 has the same function as the start switch 7S described above. The 1BET switch 3033 has the same function as the bet switch 6S when the 1BET button 6b is pressed. The MAXBET switch 3034 has the same function as the bet switch 6S when the MAXBET button 6a is pressed. The stop switch board 3035 has the same function as the stop switch 8S described above. The door open/close switch 3036 has the same function as the door open/close monitoring switch 56 described above.

Here, the return switch 3032 and its corresponding return button (not shown) are configured as a return operation detection unit (means) capable of detecting the player's return operation. When the return switch 3032 detects that the corresponding return button has been pressed, the number of bet medals is returned to the credit (bet settlement is performed). The game information display unit 3037 will be explained later with reference to Figure 211.

Furthermore, the pachislo machine 3001 includes a medal count display unit 3041, a medal dispensing display unit 3042 (including a medal dispensing operation board 3042a, a dispensing switch 3042b, and a return switch 3042c), a game ball connection terminal board 3043, and a medal count clear switch 3044. These are electrically connected to the medal count control unit 3011b. Alternatively, they may be connected to the medal count control unit 3011b via a door relay board 3013. They may also be connected to the main control unit 3011a, as long as control is performed smoothly. The medal count display unit 3041 and the medal dispensing display unit 3042 will be explained later with reference to Figure 211.

The game ball connection terminal board 3043 has the same functions as the external centralized terminal board 55 described above, as well as the same functions as the communication device (connection terminal board) described above. The game ball connection terminal board 3043 is equipped with a connection mechanism (not shown) for connecting the game medium dispensing device 3002 and the medal count control unit 3011b, and for connecting peripheral devices such as the data display 3003 and the medal dispensing operation board 3042a. The connection mechanism 3045a is provided with a connector (for example, a 25-pin connector) consisting of multiple connection pins that connect to the game medium dispensing device 3002 via a harness.

The medal count clear switch 3044 is a switch capable of detecting the initialization operation (e.g., a press operation) when the administrator of the amusement parlor clears (initializes) the number of medals credited in the pachislo machine 3001. When the medal count clear switch 3044 is pressed, it outputs a detection signal (medal count clear signal) to the medal count control unit 3011b. In this case, the medal count control unit 3011b controls the medal count display unit 3041, described later, so that the display of the 5-digit 7-segment LED for credit display (see Figure 211(B)) on the medal count display unit 3041 becomes "00000" (credit count = 0).

Furthermore, the pachislo machine 3001 has a display device 3051, which is electrically connected to the sub-control board 3012. The display device 3051 may also be connected to the sub-control board 3012 via a sub-relay board 3014. Here, the display device 3051 has the same functions as the main display device 210 and sub-display device 220 described above.

Furthermore, the pachislo machine 3001 includes a speaker group 3052, an LED drive board 3053, a performance switch 3054, and an operation switch 3055. These are electrically connected to the sub-control board 3012 via a sub-relay board 3014. Alternatively, these components may be directly connected to the sub-control board 3012 without going through the sub-relay board 3014.

The speaker group 3052 has the same functions as the speaker groups 35a, 35b, etc. described above. The LED drive board 3053 is a board on which the drive circuits for each LED board 3056 are mounted, and each LED board 3056 has the same functions as the lamp/LED group 23, etc. described above. Furthermore, the effect switch 3054 and the operation switch 3055 have the same functions as the effect button groups 10a, 10b, etc. described above.

Next, with reference to Figure 211(A), an example of the configuration of the game information display unit 3037 will be described. The game information display unit 3037 is configured to display various game information, and its display operation is controlled by the main control microprocessor 3070 (main control circuit), described later, located within the main control unit 3011a. The game information display unit 3037 can be installed in any location where it can be easily seen by the player. For example, it can be installed on the base of the front door of the pachislo machine 1 (in Figure 1, at the location where the coin slot 5 and the performance buttons 10a are located, or in the vicinity thereof).

As shown in Figure 211(A), the game information display unit 3037 is equipped with a payout display unit for displaying information on the number of game tokens dispensed (the number of game values awarded). The payout display unit consists of a two-digit 7-segment LED (labeled "Payout Display" in Figure 211(A)) for digitally displaying (notifying) this information to the player.

Furthermore, the game information display unit 3037 is equipped with LEDs for displaying the number of bets (hereinafter referred to as "line LEDs"), labeled "START," "REPLAY," "1BET," "2BET," and "3BET" in Figure 211(A)A, as lamps to indicate game operation information.

For example, when the number of bets (inserted tokens) for the game tokens is 0 (all line LEDs are off), pressing the 1-bet button 6b will illuminate the "1BET" line LED. Then, pressing the 1-bet button 6b again will illuminate the "1BET" and "2BET" line LEDs. Finally, pressing the 1-bet button 6b again will illuminate all line LEDs from "1BET" to "3BET," as well as the "START" line LED. Each time the 1-bet button 6b is pressed, the value of the number of tokens stored (credits) displayed on the 5-digit 7-segment LED in the token count display unit 3041 (described later) is deducted by 1.

Furthermore, for example, when the number of bets (inserted tokens) for the game tokens is 0 (all line LEDs are off), pressing the MAX bet button 6a will cause all line LEDs from "1 BET" to "3 BET" to light up, as well as the "START" line LED. In this case, with a single bet operation, the value of the number of stored tokens (credits) displayed on the 5-digit 7-segment LED in the token count display unit 441 (described later) will be reduced by 3.

Furthermore, for example, if a replay combination is won in the previous game, the "START" and "REPLAY" line LEDs will light up. In this case, the value of the stored number of game tokens (credits) displayed on the 5-digit 7-segment LED in the medal count display unit 3041 (described later) will not be reduced.

Furthermore, the game information display unit 3037 is provided with an instruction display unit for displaying information about the stop operation to be announced to the player when the player is notified of the stop operation (for example, in AT mode). The instruction display unit consists of a three-digit seven-segment LED (labeled "Instruction Display" in Figure 211(A)) for digitally displaying (announcing) the information to the player. The instruction display unit may either display information that uniquely corresponds to the stop operation information to be announced (for example, displaying "1" when announcing the button press sequence "left → middle → right"), or it may directly display the stop operation information to be announced (for example, displaying "123" when announcing the button press sequence "left → middle → right").

Next, with reference to Figure 211(B), an example configuration of the medal count display unit 3041 will be described. The medal count display unit 3041 is configured to display information regarding the number of game tokens stored (the number of game values held) inside the pachislo machine 3001. Its display operation is controlled by the medal count control microprocessor 3080 (game value control circuit), described later, located within the medal count control unit 3011b. The medal count display unit 3041 can be installed in any location where it is easily visible to the player. For example, it can be installed on the base of the front door of the pachislo machine 1 (in Figure 1, at the location where the medal slot 5 and the performance buttons 10a are located, or in the vicinity thereof). Furthermore, the medal count display unit 3041 has the same functions as the game value display device described above.

As shown in Figure 211(B), the medal count display unit 3041 is equipped with a credit display unit for displaying information on the number of game tokens stored (the number of game tokens held). The credit display unit consists of a 5-digit 7-segment LED (labeled "Credit Display" in Figure 211(B)) for digitally displaying (notifying) this information to the player. For example, if a similar credit display is performed in the game token dispensing device 3002, the pachislo machine 3001 may not be equipped with a credit display unit, or, similar to conventional pachislo machines 1, a credit display with a predetermined limit (e.g., 50 tokens) may be performed.

Furthermore, the medal count display unit 3041 is equipped with an error display unit for displaying error information related to the control of the number of medals (credits) managed by the medal count control unit 3011b. The error display unit consists of a single-digit 7-segment LED (labeled "Error Display" in Figure 211(B)) for digitally displaying (notifying) the information to the player. When an error occurs related to the control of the number of medals (credits) managed by the medal count control unit 3011b, this single-digit 7-segment LED displays an error code (letters, numbers, etc.) corresponding to the type of error. Since the error display unit is a dedicated error display means for the management and control of the number of medals (game value), it eliminates confusion between errors related to the management and control of the number of medals and other errors, making it easier to recognize that an error related to the management and control of the number of medals has occurred.

Here, an example of an error related to the control of the number of medals (credits) managed by the medal count control unit 3011b is an upper limit exceeding error. An upper limit exceeding error occurs when an upper limit (for example, "16369") is set in the credit counter, which is used to count the number of stored game tokens, and the system determines that adding the payout to the credit counter will exceed that upper limit. Note that if an upper limit exceeding error occurs, it can be resolved (removed) by performing a credit settlement.

Next, with reference to Figure 211(C), an example configuration of the medal dispensing display unit 3042 will be described. The medal dispensing display unit 3042 is configured to display information regarding the number of game media (game value) remaining on the game card (not shown) inserted into the game media dispensing device 3002 (referred to as "frequency"). Its display operation is controlled by the medal count control microprocessor 3080 (game value control circuit), described later, within the medal count control unit 411b. The medal dispensing display unit 3042 can be installed in any location where it is easily visible to the player. For example, it can be installed on the base of the front door of the pachislo machine 1 (in Figure 1, at or near the location where the medal slot 5 and the performance buttons 10a are located). Furthermore, the frequency may include the number of game media (game value) available for dispensing according to the amount of money inserted into the game media dispensing device 3002.

As shown in Figure 211(C), the medal dispensing display unit 3042 is equipped with a frequency display unit for displaying information on the remaining frequency. The frequency display unit consists of a three-digit seven-segment LED (labeled "frequency display" in Figure 211(C)) for digitally displaying (notifying) this information to the player.

Furthermore, the medal dispensing display unit 3042 is equipped with a dispensing lamp, labeled "Dispensing" in Figure 211(C), which indicates whether or not the dispensing operation of the game medium is possible. The dispensing lamp lights up when the game medium is available for dispensing (before dispensing) and turns off when the game medium is unavailable (during dispensing, during settlement, during return, or during an error). The dispensing lamp is also configured to function as a pressable dispensing button, and this press (i.e., dispensing operation) is detected by the dispensing switch 3042b.

When a lending operation is detected, if the lending lamp is lit (i.e., lending is possible), a predetermined number of gaming media are added to the credit count managed by the pachislo machine 3001 from the count managed by the gaming media lending device 3002. Consequently, the count display unit will show the remaining count after subtracting the count corresponding to the predetermined number of gaming media. In this example, the lending lamp is configured to also function as a lending button, but a separate lending button may be provided, and the lending lamp may be configured to only serve a display function.

Furthermore, the medal dispensing display unit 3042 is equipped with a return lamp, labeled "Return" in Figure 211(C), which indicates whether the return operation of the game token is possible or not. The return lamp lights up when the game token can be returned (before the return operation) and turns off when the return operation is not possible (during lending, settlement, return, or an error has occurred). The return lamp is also configured to function as a pressable return button, and this press operation (i.e., the return operation) is detected by the return switch 3042c.

Then, when a return operation is detected, if the return lamp is lit (i.e., if a return operation is possible), the number of credits or bets managed by the pachislo machine 3001 is added to the number of credits managed by the game media dispensing device 3002. Afterward, a game card (including a configuration where the game card does not store the credits themselves, but rather information associated with them) with that number of credits stored on it is ejected from the game media dispensing device 3002. In this example, the return lamp is configured to also function as a return button, but a separate return button may be provided, and the return lamp may only serve as a display function.

In this example, dynamic lighting control is employed for the various 7-segment LEDs provided in the game information display unit 3037, the medal count display unit 3041, and the medal dispensing display unit 3042. However, a different control method (for example, static lighting control) may also be used.

[Example configuration of the main control unit and medal count control unit of the main control board in a separate example]
Next, with reference to Figure 212, an example of the configuration of the main control unit and medal count control unit of a main control board according to another example will be described. Figure 212 is a diagram showing an example of the configuration of the main control microprocessor 3070 and the medal count control microprocessor 3080 of the main control board 3011.

As described above, the main control board 3011 is equipped with a main control unit 3011a and a medal count control unit 3011b, as well as a medal count clear switch 3044. Details of the main control unit 3011a and the medal count control unit 3011b will be described later. The main control board 3011 is installed inside the pachislo machine 3001, housed in a transparent (or semi-transparent) resin board case (in this example, a main control board case 3060), similar to the main control board 71 described above.

Although not shown in the diagram, the main control board case 3060 has various sealing structures to prevent it from being easily opened, or to allow for the recognition of any evidence of opening, from the standpoint of preventing tampering. In other words, the main control board case 3060 is basically configured to ensure visibility of the main control board 3011 while making access to the main control board 3011 difficult.

In this example, since the medal count clear switch 3044 is mounted on the main control board 3011, it is necessary to allow access to (operation of) the medal count clear switch 3044 while ensuring safety (i.e., without opening the main control board case 3060).

Therefore, in this example, a small hole 3061a is formed in the main control board case 3060 at a position corresponding to the location of the medal count clear switch 3044, allowing the medal count clear switch 3044 to be pressed from outside the main control board case 3060.

Furthermore, to prevent the medal count clear switch 3044 from being easily operated by a person's finger, the size of the small hole 3061a should be, for example, approximately 2 mm in diameter or less. Then, the staff of the amusement parlor should, for example, use a dedicated tool to press it. As mentioned above, the medal count clear switch 3044 is used by the amusement parlor's administrator to clear (initialize) the number of medals credited into the pachislo machine 3001. Therefore, it is a switch that is not used under normal circumstances, and is provided for use in the event of an unexpected situation in the medal count control (payout control, etc.) related to the management of the number of stored game tokens (credits). Therefore, problems are unlikely to occur with this configuration, and accidental pressing of the medal count clear switch 3044 can be prevented.

Next, an example configuration of the main control unit 3011a will be described. The main control unit 3011a includes a main control microprocessor 3070 (game control circuit), a clock pulse generation circuit 3071 (not shown), and a power management circuit 3072 (not shown). Details of the main control microprocessor 3070 will be described later.

The clock pulse generation circuit 3071 generates a clock pulse signal for the operation of the main CPU and outputs the generated clock pulse signal to the clock circuit 3105 (EX) in the main control microprocessor 3070. The main control microprocessor 3070 executes the control program based on the input clock pulse signal.

The power management circuit 3072 manages fluctuations in the 12V DC power supply voltage supplied from the power supply board 3015a (see Figure 210) and supplies 5V DC (VCC) power to the main control microprocessor 3070. For example, when power is turned on (when the power supply voltage rises from 0V to the startup voltage value (10V)), the power management circuit 3072 outputs a reset signal to the reset controller 3106 (XSRST) in the main control microprocessor 3070 (described later), and when a power outage occurs (when the power supply voltage falls from 12V to the power failure voltage value (10.5V)), it outputs a power outage detection signal to the parallel input port 3111 (XINT) in the main control microprocessor 3070 (described later). In other words, the power management circuit 3072 also serves as a means (startup means) for outputting a reset signal (startup signal) to the main control microprocessor 3070 when the power is turned on, and as a means (power outage means) for outputting a power outage detection signal (power outage signal) to the main control microprocessor 3070 when a power outage occurs.

Next, an example configuration of the medal count control unit 3011b will be described. The medal count control unit 3011b includes a medal count control microprocessor 3080 (game value control circuit), a clock pulse generation circuit 3081 (not shown), a power management circuit 3082 (not shown), and a payout ratio monitor 3083 (not shown). Details of the medal count control microprocessor 3080 will be described later.

Furthermore, as is clear from the comparison between the main control unit 3011a and the medal count control unit 3011b, the medal count control unit 3011b has the same configuration as the main control unit 3011a with the addition of a payout ratio monitor 3083. The configuration and function of the clock pulse generation circuit 3081 and the power management circuit 3082 provided in the medal count control unit 3011b are the same as those of the clock pulse generation circuit 3071 and the power management circuit 3072 provided in the main control unit 3011a, respectively. Therefore, a description of the configuration and function of the clock pulse generation circuit 3081 and the power management circuit 3082 is omitted here.

In this example, the main control microprocessor 3070 and the medal count control microprocessor 3080 are dedicated gaming machine microprocessors designed and manufactured by the same semiconductor manufacturer. As described above, the configuration and function of the clock pulse generation circuits (3071, 3081) and power management circuits (3072, 3082) are identical. Therefore, in cases where the main control microprocessor 3070 and the medal count control microprocessor 3080 are mounted on the same control board (main control board 3011), as in this example, instead of providing separate clock pulse generation circuits and power management circuits for each, a single clock pulse generation circuit and power management circuit may be shared by both microprocessors.

In other words, the clock pulse generation circuit 3071 and the clock pulse generation circuit 3081 can be configured as a single, identical clock pulse generation circuit. Similarly, the power management circuit 3072 and the power management circuit 3082 can be configured as a single, identical power management circuit. Furthermore, the clock pulse generation circuit can be shared while the power management circuits are individually configured, or vice versa.

The payout ratio monitor 3083 is composed of a four-digit seven-segment LED and has the same functions as the payout ratio monitor device 54 described above. In this example, the payout ratio monitor 3083 is housed within the main control board case 3060, similar to the payout ratio monitor device 54 described above. However, it differs from the payout ratio monitor device 54 in that it is mounted on the main control board 3011 as part of the medal count control unit 3011b, and its display content (various ratio information) is controlled by the medal count control microprocessor 3080. Alternatively, it may be mounted on the main control board 3011 as part of the main control unit 3011a, and its display content (various ratio information) may be controlled by the main control microprocessor 3070.

Furthermore, although the display content (various ratio information) is controlled by the medal count control microprocessor 3080, which is housed within the main control board case 3060, it may also be configured to be mounted on another board (for example, a ratio display board) connected to the medal count control unit 3011b, or such a display unit may be provided separately and connected to the medal count control unit 3011b. Any configuration can be adopted as long as the visibility of the payout ratio monitor 3083 can be ensured when the main control board 3011 is housed in the main control board case 3060 and installed inside the pachislo machine 3001.

Next, referring to Figure 212, an example configuration of the main control microprocessor 3070 and the medal count control microprocessor 3080 will be described. Both the main control microprocessor 3070 and the medal count control microprocessor 3080 are microprocessors with security functions for amusement machines. In this example, the configuration of the main control microprocessor 3070 and the configuration of the medal count control microprocessor 3080 are the same (of course, different configurations are also possible).

Therefore, in this description, the main control microprocessor 3070 and the medal count control microprocessor 3080 will simply be referred to as "microprocessor MP." Furthermore, any differences in the functional components between the main control microprocessor 3070 and the medal count control microprocessor 3080 will be explained as appropriate.

The microprocessor MP comprises a CPU 3101, ROM 3102, RAM 3103, an external bus interface 3104 (signal bus 3116 (local bus)), a clock circuit 3105, a reset controller 3106, an arithmetic circuit 3107, a verification block 3108, unique information 3109, a random number circuit 3110 (random number generation circuit), a parallel input port 3111, an interrupt controller 3112, a timer circuit 3113, a serial communication circuit 3114, and a parallel output port 3115. All components of the microprocessor MP, except for the signal bus 3116, are connected to each other via the signal bus 3116. Note that the D0-D7 terminals of IC1 and IC2, described later, are terminals for the external bus interface 3104 (see Figure 213 below).

The CPU 3101 executes various control programs based on the clock pulses generated by the clock circuit 3105 to perform various controls. The main control microprocessor 3070, specifically the CPU 3101 (hereinafter also referred to as the "main CPU"), executes various control programs to control all aspects of game operation. On the other hand, the medal count control microprocessor 3080, specifically the CPU 3101 (hereinafter also referred to as the "medal count control CPU"), executes various control programs to primarily control the counting operation of game media (game value) during payout and settlement.

ROM 3102 stores various control programs and data tables executed by the CPU 3101. The storage capacity of ROM 3102 is 12 kilobytes. In the main control microprocessor 3070, ROM 3102 (hereinafter also referred to as "main ROM") stores various control programs executed by the main CPU 3101, various data tables, and data for sending various control commands to the sub-control board 3012. On the other hand, in the medal count control microprocessor 3080, ROM 3102 (hereinafter also referred to as "medal count control ROM") stores various control programs executed by the medal count control CPU 3101, and various data required for signal and data input/output operations between the main control unit 3011a and the game ball connection terminal board 3043 (game medium dispensing device 3002, data display and other peripheral devices 3003).

The RAM 3103 is provided with various storage areas for storing various data (parameters, flags, etc.) used when the CPU 3101 executes various control programs. The RAM 3103 has a storage capacity of 1 kilobyte. In the main control microprocessor 3070, the RAM 3103 (hereinafter also referred to as "main RAM") is provided with a storage area for storing various data, such as internal winning combinations determined by the execution of the control program. On the other hand, in the medal count control microprocessor 3080, the RAM 3103 (hereinafter also referred to as "medal count control RAM") is provided with a storage area for storing various counters (e.g., medal counter, insertion counter, etc.) and various flags used when executing payout control, etc.

The external bus interface 3104 is an interface circuit for electrically connecting the microprocessor MP to an external signal bus to which various components located outside the microprocessor MP are connected. Examples of connection configurations for the main control microprocessor 3070 and the medal count control microprocessor 3080 will be explained later with reference to Figure 213.

The clock circuit 3105, which includes, for example, a frequency divider (not shown), converts the clock pulse signals input from the clock pulse generation circuits 3071 and 3081 into clock pulse signals of multiple frequencies used for CPU operation and other components (for example, the timer circuit 3113). The clock pulse signals of multiple frequencies generated by the clock circuit 3105 are output to all circuits within the microprocessor MP except the clock circuit 3105 (CPU 3101 to the external bus interface 3104, and reset controller 3106 to the parallel output port 3115) at frequencies corresponding to the operation of each circuit.

The reset controller 3106 resets the IAT (Illegal Address Trap) and WDT (watchdog timer) based on reset signals input from the power management circuits 3072 and 3082. The arithmetic circuit 3107 includes a multiplication circuit and a division circuit. The verification block 3108 verifies, at its signal level, whether the connected test device is legitimate when the test device is connected.

The unique information 3109 stores the unique information (identification information) of the microprocessor MP. The individual chip number of the microprocessor MP consists of 4 bytes of data and is set during chip manufacturing. Furthermore, each microprocessor MP has a unique individual chip number.

Furthermore, in the main control microprocessor 3070, the unique information (identification information) of the main control microprocessor 3070 is stored in the unique information 3109. Also, the ROM code of ROM 3102 and the chip-specific number of the main control microprocessor 3070 are stored in the unique information 3109. The ROM code of ROM 3102 consists of 4 bytes x 4 data, i.e., 16 bytes of data. Each 4-byte data that makes up the ROM code of ROM 3102 is generated from data stored in the address range "0000h" to "2FBFh" of the built-in ROM (ROM 3102), and the method of generating each 4-byte data differs for each 4-byte data.

On the other hand, in the medal count control microprocessor 3080, the unique information (identification information) of the medal count control microprocessor 3080 is stored in the unique information 3109. Furthermore, the ROM code of the medal count control ROM 3102 and the individual chip number of the medal count control microprocessor 3080 are also stored in the unique information 3109. The ROM code of the medal count control ROM 3102 consists of 4 bytes x 4 data, i.e., 16 bytes of data. Each 4-byte data that constitutes the ROM code of the medal count control ROM 3102 is generated from data stored in the address range "0000h" to "0FBFh" of the built-in ROM (medal count control ROM 3102), and the method of generating each 4-byte data differs for each 4-byte data.

The random number circuit 3110 generates random numbers within a predetermined range (for example, 0 to 65535 or 0 to 255). The random number circuit 3110 is composed of multiple random number registers. For example, it can consist of random number register 0 for obtaining a 2-byte hard latch random number, random number registers 1 to 3 for obtaining a 2-byte soft latch random number, and random number registers 4 to 7 for obtaining a 1-byte soft latch random number. In the main control microprocessor 3070, the main CPU 3101 extracts one value from the random numbers within the predetermined range generated by the random number circuit 3110, for example, as a random value for internal drawing.

The parallel input port 3111 is an input port (memory-mapped I/O) for signals input to the microprocessor MP from various circuits located outside the microprocessor MP (e.g., power management circuits 3072, 3082, etc.). The parallel input port 3111 is also connected to the random number circuit 3110 and the interrupt controller 3112. In the main control microprocessor 3070, a start switch 3031 is connected to the parallel input port 3111. When the start switch 3031 is turned ON (on-edge), a latch signal is output from the parallel input port 3111 to a predetermined random number register (e.g., random number register 0) of the random number circuit 3110. Upon receiving the latch signal, the predetermined random number register is latched in the random number circuit 3110, and a 2-byte hard-latch random number is obtained.

The interrupt controller 3112 controls the timing of interrupt processing by the CPU 3101 based on reset signals, power outage detection signals input from power management circuits 3072 and 3082 via the parallel input port 3111, or timeout signals input at predetermined intervals from the timer circuit 3113. Furthermore, when the interrupt controller 3112 receives reset signals or power outage detection signals from power management circuits 3072 and 3082, or when it receives a timeout signal from the timer circuit 3113, it outputs an interrupt request signal indicating an interrupt processing start command to the CPU 3101. The CPU 3101 then performs various interrupt processing based on the interrupt request signal received from the interrupt controller 3112.

Specifically, in the main control microprocessor 3070, the interrupt controller 3112 controls the execution timing of interrupt processing by the main CPU 3101 (for example, in the case of a timeout signal, the periodic interrupt processing shown in Figure 32) based on a reset signal, a power outage detection signal input from the power management circuit 3072 via the parallel input port 3111, or a timeout signal input from the timer circuit 3113 at a period of 1.1172 msec. The main CPU 3101 then performs various processes within the periodic interrupt processing (for example, see Figure 32) based on the interrupt request signal input from the interrupt controller 3112 in response to the timeout signal from the timer circuit 3113. The interrupt processing performed by the main CPU 3101 based on the reset signal corresponds to the main processing shown in Figure 23. In other words, for all processes executed by the main CPU 3101, the interrupt request signal issued by the interrupt controller 3112 serves as the starting point for each process.

Meanwhile, in the medal count control microprocessor 3080, the interrupt controller 3112 controls the timing of interrupt processing by the medal count control CPU 3101 based on a reset signal, a power outage detection signal input from the power management circuit 3082 via the parallel input port 3111, or a timeout signal input at a 1 msec period from the timer circuit 3113. The medal count control CPU 3101 then performs various processes, such as port input processing, game information reception processing, data transmission processing to the main control unit 3011a, data transmission processing to peripheral devices, data reception processing from peripheral devices, and port output processing, based on the interrupt request signal input from the interrupt controller 3112 in response to the reset signal, power outage detection signal, or timeout signal. In other words, in all processes executed by the medal count control CPU 3101, the interrupt request signal issued by the interrupt controller 3112 serves as the starting point for each process.

The timer circuit 3113 (PTC) operates using a clock pulse signal generated by the clock circuit 3105 (a clock pulse signal with a frequency divided by a frequency divider (not shown) from the CPU operation clock pulse signal) (counting elapsed time). The timer circuit 3113 then outputs a timeout signal (trigger signal) to the interrupt controller 3112 at a predetermined period (1.1172 msec for the main control microprocessor 3070, and 1 msec for the medal count control microprocessor 3080).

The serial communication circuit 3114 is a communication circuit that controls the serial communication of various data between the control board on which the communication circuit is mounted and various boards provided outside the control board. In the main control microprocessor 3070, the serial communication circuit 3114 serially communicates data (various control commands, various data, etc.) between the main control unit 3011a and various boards provided outside the main control board 3011 (for example, the sub-control board 3012, etc.). The serial communication circuit 3114 is composed of four communication circuits SCU0, SCU1, and STU2 to STU4. Communication circuits SCU0 and SCU1 are bidirectional serial communication circuits, while communication circuits STU2 to STU4 are serial communication circuits dedicated to transmission. For example, when connecting the main control board 3011 (main control unit 3011a) and the sub-control board 3012 via serial communication, the communication circuit STU2, which is a serial communication circuit for transmission only, is used. When connecting the main control unit 3011a and the medal count control unit 3011b via serial communication, the communication circuit SCU0, which is a bidirectional serial communication circuit, is used. This is a method of using serial communication circuits established from the perspective of preventing cheating (fraudulent activity).

The parallel output port 3115 is an output port (memory-mapped I/O) for signals output from the microprocessor MP to various external circuits. In this example, data output is performed using a FIFO (First In First Out) method.

[Example of circuit configuration of main control board in a separate case]
Next, with reference to Figure 213, an example of the circuit configuration of a main control board according to another example will be described. Figure 213 is a schematic diagram of an example of the circuit configuration of the main control board 3011.

Control boards used in amusement machines are generally constructed as printed circuit boards (PCBs), and in this example, the main control board 3011 is also constructed as a PCB. For example, in the case of a double-sided PCB, a copper-clad laminate is made by processing glass fiber or resin to form an insulating substrate (insulating substrate), then attaching copper foil to both sides of the laminate. This laminate is cut to the required size, through-holes and VIA holes are formed to allow current flow, the copper foil in the areas to be left as the necessary wiring pattern (circuit pattern) is masked, and the copper foil outside the masked areas is removed to form the wiring pattern. The areas of the formed wiring pattern that do not need to be exposed (e.g., areas to be soldered later) are covered with an insulating solder resist made of ink or film material (an insulating layer is laminated for protection). Then, multiple necessary electronic components are mounted on the substrate manufactured in this way to form a control board that performs a specific function.

Here, the electronic components mounted on such control boards include surface-mount components (SMDs), which are mounted by soldering their terminals to the front side (one side) of the control board, and dip-in-place (DIP) components (hereinafter sometimes simply referred to as "DIP components"), which are mounted by inserting their terminals through through-holes from the front side (one side) of the control board and soldering them to the back side (the other side) (or to both the front and back sides).

Surface mount components offer several advantages over equivalent DIP-mount components. They are smaller in size and eliminate the need for through-holes, thus saving space on the mounting surface. Furthermore, their widespread adoption in recent years makes them more readily available and less expensive than equivalent DIP-mount components. However, their small size makes them more difficult to inspect using measuring instruments such as digital oscilloscopes, and they also have the disadvantage of being less durable after mounting compared to equivalent DIP-mount components.

On the other hand, DIP-mount components have disadvantages compared to equivalent surface-mount components, such as difficulty in securing mounting space and being harder to obtain and more expensive. However, they also have advantages over equivalent surface-mount components, including easier handling, easier inspection as described above, and superior strength after mounting.

Therefore, in this example, certain conditions are set after considering such advantages and disadvantages. If these conditions are met, surface-mount components are used for the target electronic component and mounted on the main control board 3011. If the conditions are not met, DIP-mount components are used for the target electronic component and mounted on the main control board 3011. Here, we will explain an example of the circuit configuration of the main control board 3011, focusing on this point.

(Outline of the circuit configuration example of the main control board 3011)
Referring to Figure 213, an overview of an example of the circuit configuration of the main control board 3011 will be described. Note that Figure 213 shows an overview of one example of a specific location (the connection path between the main control microprocessor 3070 and the medal count control microprocessor 3080) on the main control board 3011, and does not show the entire circuit configuration on the main control board 3011. In other words, if certain conditions are met, surface mount components can be used in locations other than those shown in Figure 213, and test patterns can be provided in the connection paths between these surface mount components.

In Figure 213, IC1 represents the main control microprocessor 3070 (see Figure 212), and IC2 represents the medal count control microprocessor 3080 (see Figure 40). IC3 to IC6 are, for example, 20-pin ICs configured as buffer ICs, and are surface-mount components.

As shown in Figure 213, IC1 and IC3 are connected by an external signal bus between the D0-D7 terminals (data bus) of IC1 and the Y1-Y8 terminals (signal output) of IC3. That is, IC3 is electrically connected to the external bus interface 3104 of the main control microprocessor 3070. Similarly, IC1 and IC4 are connected by an external signal bus between the D0-D7 terminals (data bus) of IC1 and the Y1-Y8 terminals (signal output) of IC4. That is, IC4 is electrically connected to the external bus interface 3104 of the main control microprocessor 3070. This allows data output from either IC3 or IC4 to the main control microprocessor 3070.

Furthermore, the Y1-Y8 terminals (signal outputs) of IC3 and IC4 may be configured, for example, as D0-D7 terminals (data buses), thereby enabling data input and output between the main control microprocessor 3070 and IC3 or IC4. Alternatively, the main control microprocessor 3070 may be configured to output data to IC3 or IC4.

Here, "data bus" refers to a signal bus that handles data (for data transfer). In other words, a "data bus" means a signal bus whose type of signal is "data." Although not used in this embodiment, there also exists a signal bus called an "address bus" that handles addresses (for address specification). That is, an "address bus" means a signal bus whose type of signal is "address." In contrast, a "local bus," as the name suggests, refers to a signal bus with a relatively slow transfer speed. Therefore, for example, a signal bus labeled "data bus" may correspond to a "local bus," and a signal bus labeled "local bus" may correspond to a "data bus," but there is no contradiction between these two interpretations.

Furthermore, IC1 and IC3 are connected by a signal line between IC1's XCS0 terminal (chip select) and IC3's G1 and G2 terminals (gate inputs). Similarly, IC1 and IC4 are connected by a signal line between IC1's XCS1 terminal (chip select) and IC4's G1 and G2 terminals (gate inputs). This allows IC1 to switch whether data is output from IC3 or IC4. Note that the XCS0 and XCS1 terminals are output terminals from the parallel output port 3115 (see Figure 212).

Furthermore, as shown in Figure 213, IC2 and IC5 are connected by an external signal bus between the D0-D7 terminals (data bus) of IC2 and the D0-D7 terminals (data bus) of IC5. That is, IC5 is electrically connected to the external bus interface 3104 of the medal count control microprocessor 3080. Similarly, IC2 and IC6 are connected by an external signal bus between the D0-D7 terminals (data bus) of IC2 and the D0-D7 terminals (data bus) of IC6. That is, IC6 is electrically connected to the external bus interface 3104 of the medal count control microprocessor 3080. This enables data input and output (or data output from the medal count control microprocessor 3080 to IC5 or IC6) between the medal count control microprocessor 3080 and IC5 or IC6.

Furthermore, the D0-D7 terminals (data bus) of IC5 and IC6 may be configured, for example, as Y1-Y8 terminals (signal output), so that data can be output from IC5 or IC6 to the medal count control microprocessor 3080.

Furthermore, the D0-D7 terminals (data bus) of IC2 are connected to the input terminals (or input/output terminals; not shown) of the payout ratio monitor 3083 via an external signal bus. In other words, the payout ratio monitor 3083 is electrically connected to the external bus interface 3104 of the medal count control microprocessor 3080.

Furthermore, IC2 and IC5 are connected by a signal line between IC2's XCS2 terminal (chip select) and IC5's CP terminal (clock input). Similarly, IC2 and IC6 are connected by a signal line between IC2's XCS3 terminal (chip select) and IC6's CP terminal (clock input). This allows IC2 to switch whether to output data to IC5 or IC6. Note that the XCS2 and XCS3 terminals are output terminals from the parallel output port 3115 (see Figure 212).

Furthermore, IC3 and IC5 are connected by signal lines between IC3's A1-A8 terminals (signal inputs) and IC5's Q0-Q7 terminals (signal outputs). This allows data output from IC5 to IC3. In other words, data output from IC2 is output to IC1 via IC5 (input → output) and IC3 (input → output). To put it another way, IC1 and IC2 are electrically connected in such a way that IC3 and IC5 are implemented in their connection path.

Furthermore, IC4 and IC6 are connected by signal lines between IC4's A1-A8 terminals (signal inputs) and IC6's Q0-Q7 terminals (signal outputs). This allows data output from IC6 to IC4. In other words, data output from IC2 is output to IC1 via IC6 (input → output) and IC4 (input → output). To put it another way, IC1 and IC2 are electrically connected in such a way that IC4 and IC6 are implemented in their connection path.

These are merely examples, and the connection configuration between IC1 and IC2 is not limited to those described above. For example, by swapping the positions of IC3 and IC5, in the connection path between IC1 and IC2 where IC3 and IC5 are implemented, the data output from IC1 may be configured to be output to IC2 via IC5 (input → output) and IC3 (input → output). Alternatively, for example, by swapping the positions of IC4 and IC6, in the connection path between IC1 and IC2 where IC4 and IC6 are implemented, the data output from IC1 may be configured to be output to IC2 via IC6 (input → output) and IC4 (input → output).

Furthermore, for example, the Y1-Y8 terminals (signal outputs) and A1-A8 terminals (signal inputs) of IC3, and the Q0-Q7 terminals (signal outputs) of IC5 may all be configured as input/output terminals (e.g., a data bus), and the connection path between IC1 and IC2, where IC3 and IC5 are implemented, may be configured to allow mutual data input and output. Alternatively, for example, the Y1-Y8 terminals (signal outputs) and A1-A8 terminals (signal inputs) of IC4, and the Q0-Q7 terminals (signal outputs) of IC6 may all be configured as input/output terminals (e.g., a data bus), and the connection path between IC1 and IC2, where IC4 and IC6 are implemented, may be configured to allow mutual data input and output.

Although the reference numerals are omitted in Figure 213, the connection path between IC3's A1-A8 terminals (signal inputs) and IC5's Q0-Q7 terminals (signal outputs) has eight test points (TP1-TP8, described later) connected to each signal line. Similarly, the connection path between IC4's A1-A8 terminals (signal inputs) and IC6's Q0-Q7 terminals (signal outputs) has eight test points (TP9-TP16, described later) connected to each signal line.

The configuration and effects of the gaming machine according to the present invention are described below.

<Note A-1>

Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows corresponding to each reel, which display some of the symbols on each reel so that the player can see them; a start switch that, when it detects a player operation (hereinafter referred to as "start operation") provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel; a stop switch that, when it detects a player operation (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and stop switch, thereby controlling the rotation and stopping of each reel. Typically, in such a pachislo machine, whether or not a win has occurred is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

In such gaming machines, a programming technique is disclosed that uses the CALLEX instruction when calling a program in control area 2 (game medium count limiting ROM area) from a program in control area 1 (main control ROM area) (for example, Japanese Patent Application Publication No. 2022-001223).

In the case of the gaming machine described above, when a program stored in the ROM area within the usage area calls a program stored in the ROM area outside the usage area using the "CALLEX" instruction, if the called program exists in the first address range of the ROM area outside the usage area ("2000"H to "20FF"H), the "CALLEX" instruction becomes a 2-byte instruction. However, if it exists in the second address range ("2100"H and above), the "CALLEX" instruction becomes a 4-byte instruction. In such a situation, each use of the "CALLEX" instruction puts pressure on the capacity of the ROM area within the usage area.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that can effectively save the usage capacity of a specific program storage area of the main ROM.

Furthermore, the present invention aims to provide a gaming machine with a simple and easy-to-understand program code that is easy to develop and maintain.

To achieve the above objective, the present invention provides the following gaming machine.
(A-1-1) The invention according to the first embodiment of the present invention has the following configuration.
A gaming machine (e.g., a pachislo machine 2001) that controls the progress of a game by implementing a microprocessor (e.g., a microprocessor 2100) including an arithmetic circuit (e.g., a main CPU 2101), a read memory (e.g., a main ROM 2102), and a read/write memory (e.g., a main RAM 2103),
The read memory comprises a first storage means (for example, an in-use ROM area 2202a) in which programs and data directly involved in the progress of the game are stored, and a second storage means (for example, an out-of-use ROM area 2202b) in which programs and data not directly involved in the progress of the game are stored.
The program stored in the second storage means includes specific subroutines that, after being called by a program stored in the first storage means and executing a process, always return to the calling program in the first storage means (for example, a subprogram that executes the out-of-use RAM initialization process (continued) shown in Figure 177, or a subprogram that executes the interface 2 output process (continued) shown in Figure 180), and normal subroutines that, after being called by a program stored in the second storage means and executing a process, always return to the calling program in the second storage means (for example, the CRC calculation process (out-of-use area) shown in Figure 173).
The arithmetic circuit calls the specific subroutine by executing a specific call instruction (for example, "CALLEX") used when calling the specific subroutine.
The specified call instruction has different instruction capacity stored in the first storage means depending on whether the specified subroutine being called calls a program stored before a specific address (e.g., "2100"H) in the second storage means or a program stored at an address after the specific address (for example, a 2-byte instruction when calling a program before the specific address, and a 4-byte instruction when calling a program after the specific address).
The instruction capacity required is greater when calling a program stored at an address after the specified address than when calling a program stored at an address before the specified address.
A gaming machine characterized in that, when the program body of the specified subroutine is stored at an address after the specified address, the specified call instruction executes the program body of the specified subroutine via a call to a program stored at an address before the specified address (for example, the "JR" or "JP" instruction) in order to reduce the instruction capacity.

According to this configuration of the present invention, in a program stored in the program area within the main ROM's usage area, by setting the effective storage location of the called subprogram before a predetermined address, an instruction that is originally 4 bytes long can be reduced to a 2-byte instruction, thereby effectively saving the usage capacity of the program area within the main ROM's usage area.

(A-1-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
If the program body of the specified subroutine is stored at an address after the specified address, the address before the specified address stores processing code for executing the program body of the specified subroutine (for example, code that can be interpreted by the main CPU 2101).
The aforementioned specific call instruction is configured to execute the program body of the aforementioned specific subroutine by executing the processing code.

According to this configuration of the present invention, in a program stored in the program area within the main ROM's usage area, by setting the effective storage location of the called subprogram before a predetermined address, an instruction that is originally 4 bytes long can be reduced to a 2-byte instruction, thereby effectively saving the usage capacity of the program area within the main ROM's usage area.

(A-1-3) The invention according to the third embodiment of the present invention has the following configuration in the second embodiment.
The processing code is configured to be a jump instruction (for example, a "JR" or "JP" instruction) for jumping to the program body of the specific subroutine.

According to this configuration of the present invention, in a program stored in the program area within the main ROM's usage area, by setting the effective storage location of the called subprogram before a predetermined address, an instruction that is originally 4 bytes long can be reduced to a 2-byte instruction, thereby effectively saving the usage capacity of the program area within the main ROM's usage area.

(A-1-4) The invention according to the fourth embodiment of the present invention has the following configuration in the third embodiment.
The jump instruction is configured to be an instruction (for example, a "JR" instruction) that identifies the program body of the specific subroutine by a relative address.

According to this configuration of the present invention, in a program stored in the program area within the main ROM's usage area, by setting the effective storage location of the called subprogram before a predetermined address, an instruction that is originally 4 bytes long can be reduced to a 2-byte instruction. Furthermore, by setting jump instructions using relative addresses, the instruction size can also be reduced, and as a result, the usage capacity of the program area within the main ROM's usage area can be effectively saved.

(A-1-5) The invention according to the fifth embodiment of the present invention has the following configuration in the first embodiment.
When the specified call instruction calls a program stored before a specific address in the second storage means, the system is configured to identify the program using a lower address of the address where the program is stored.

According to this configuration of the present invention, in a program stored in the program area within the main ROM's usage area, by setting the effective storage location of the called subprogram before a predetermined address, an instruction that is originally 4 bytes long can be reduced to a 2-byte instruction, thereby effectively saving the usage capacity of the program area within the main ROM's usage area.

(A-1-6) The invention according to the sixth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The aforementioned game medium and game value input means (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or a process to detect the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
The system is configured such that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process, depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-1-7) The invention according to the seventh embodiment of the present invention has the following configuration in the sixth embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) in which a value based on the number of game media dispensed according to the winning combination is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-1-8) The invention according to the eighth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
A start operation detection means (for example, a start lever) that detects the start operation performed by the player,
Based on the detection of a start operation by the start operation detection means, an internal winning combination determination means (main CPU 2101 that executes the internal lottery process called in the main process shown in Figure 170) determines the internal winning combination with a predetermined probability,
A variable display means that includes multiple display columns and displays a variable pattern in each display column (a main CPU 2101 that executes the reel rotation start process called in the main process shown in Figure 170),
A stop operation detection means (main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that detects a stop operation performed by the player (for example, the operation of pressing the stop button),
The system includes a stop control means (a main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that stops the display of the changing symbols based on the determination result of the internal winning combination determination means and the detection of a stop operation by the stop operation detection means,
The fluctuation display of the aforementioned fluctuation display means includes game fluctuations (normal gameplay) that assign game value and pseudo-fluctuations (pseudo-gameplay) that do not assign game value.
The stop control means executes a control process to stop the display of the changing symbols for the sake of the game variation.
The aforementioned game control means is
A pseudo-stop control means that performs a control process to stop the display of the pattern fluctuations in the pseudo-fluctuation,
The system further includes a stop operation detection input monitoring means (for example, a main CPU 2101 that performs the stop button input monitoring process shown in Figure 206) for determining whether the detection of a stop operation by the stop operation detection means is effective,
The stop control means and the pseudo-stop control means are configured to execute the stop operation detection input monitoring means to determine whether the stop operation is valid or not (executing a common process in both normal and simulated gameplay (i.e., for example, the stop button input monitoring process shown in Figure 206)).

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

(A-1-9) The invention according to the ninth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
The read/write memory has a first storage area (common information storage area) for storing a group of information related to the game, and a second storage area (common information backup storage area) located in a different location from the first storage area.
The aforementioned game control means is
When predetermined conditions are met, a backup means (for example, the main CPU 2101 that executes the common information backup generation process shown in Figure 207) saves all the information stored in the first storage area to the second storage area,
The system includes a recovery means (for example, a main CPU 2101 that executes the common information recovery process shown in Figure 208) that restores information saved in the second storage area to the first storage area when the predetermined conditions mentioned above and specific conditions (for example, penalty conditions) are met,
The aforementioned retraction means and the aforementioned return means share a common program, except for some processing.
The saving means and the restoring means set the starting address of the first storage area in a first register (e.g., DE register, HL register) capable of setting two bytes of data, and set the starting address of the second storage area in a second register (e.g., HL register, DE register) capable of setting two bytes of data.
A transfer command transfers the information stored at the source address from the source address set in the first register to the destination address set in the second register.
When the processing by the recovery means is executed, the system is configured to swap the source address set in the first register with the destination address set in the second register before executing the transfer instruction.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-1-10) The invention according to the tenth embodiment of the present invention has the following configuration in the ninth embodiment.
A means for instructing the player to start the game (for example, a start lever),
A variable display means (for example, each reel) capable of displaying multiple pieces of identification information in response to the operation of the game start instruction means,
A means for determining the winning combination (for example, the main CPU 2101 that performs the internal lottery process shown in Figure 179),
A stop operation detection means (for example, a stop button and a stop switch) capable of detecting a stop operation that stops the variable display of the variable display means,
A stop control means (for example, a main CPU 2101 that executes the reel stop control process shown in Figure 170) capable of stopping the variable display of the variable display means and deriving a stop display based on the winning combination determined by the combination determination means and the stop operation mode detected by the stop operation detection means,
A prize-winning means capable of generating a prize in accordance with the stop display (for example, a main CPU 2101 that executes a process such as step S2013 in Figure 170),
The system further includes a notification means (e.g., an instruction monitor or a main display device) capable of notifying a favorable stopping operation method,
When the player operates the game start instruction means,
The saving means saves information stored in the first storage area, which is information relating to an advantageous state (e.g., AT state) that enables notification by the notification means (e.g., various information), to the second storage area (for example, the process corresponding to step S4602 in Figure 163),
The game state-related processing means for updating the information related to the advantageous state updates the information stored in the first storage area (for example, the processing corresponding to steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164, etc.),
When the game start instruction means is operated by the player and a predetermined penalty condition is met, the recovery means is configured to restore the information stored in the second storage area to the first storage area (for example, the process corresponding to step S4624 in Figure 164).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-1-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 9th embodiment.
The aforementioned specific conditions are penalty conditions that cancel a predetermined advantageous game state,
The aforementioned penalty conditions are configured to be conditions based on the game state and predetermined operations performed by the player.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

According to the present invention, by reducing the size of the program stored in a specific area (the program area within the usage area) of the main ROM, the capacity used in that specific area can be effectively saved. Furthermore, according to the present invention, by configuring the program stored in the specific area of the main ROM to set the actual storage location of the called subprogram before a predetermined address, concise and easy-to-read program code can be realized, resulting in improved development efficiency and maintainability.

Furthermore, according to the present invention, since some of the processing for normal gameplay and simulated gameplay is common, the pressure on the program area capacity of the main ROM can be reduced. Also, according to the present invention, by partially commonizing the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, the backup restoration process, which restores predetermined information to the information before gameplay, and the backup process, which backs up said predetermined information, can be partially shared, thereby reducing the pressure on the program area capacity of the main ROM. Moreover, by promoting program commonality in this way, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

<Note A-2>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

Regarding such gaming machines, a gaming machine has been disclosed in which the main program calculates and stores a sum value of the main RAM when a power outage occurs, and when power is restored, the main program compares the stored sum value at the time of the power outage with the sum value of the main RAM calculated at the time of power restoration to check whether or not there is an abnormality in the main RAM (for example, Japanese Patent Publication No. 2018-027107). The sum value is, for example, the remainder obtained by treating the data sequence of the area to be inspected as a sequence of integer values, calculating the sum, and dividing it by a predetermined constant.

While this main RAM check process is one of the most crucial operations in a gaming machine, the calculation of the sum value and the process of determining whether the main RAM is abnormal using the calculated sum value must all be performed by the main program. This puts a strain on the program area of the main ROM where the main program is stored. Furthermore, executing such processes makes the structure and description of the main program more complex, and places a heavy load on the main CPU that executes it.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine configured to reduce the size of the processing program related to checking the main RAM and to avoid putting pressure on the program area of the main ROM.

Furthermore, this invention aims to simplify the structure and description of the main program by performing the calculation process related to checking the main RAM on a CPU other than the main CPU, thereby improving the development efficiency and maintainability of the program, and further reducing the load on the main CPU and shortening processing time.

Furthermore, this invention aims to manage effective restarts based on CRC values calculated without using calculations performed by the main CPU.

To achieve the above objective, the present invention provides the following gaming machine.
(A-2-1) The invention according to the first embodiment of the present invention has the following configuration.
A gaming machine (e.g., a pachislo machine 2001) that controls the progress of a game by implementing a microprocessor (e.g., microprocessor 2100) which includes an arithmetic circuit (e.g., main CPU 2101), read memory (e.g., main ROM 2102), read/write memory (e.g., main RAM 2103), and a cyclic redundancy check circuit (e.g., CRC circuit 2017c),
The aforementioned microprocessor is
A power interruption means (for example, the main CPU 2101 that executes the power interrupt process shown in Figure 190) that detects a drop in the power supply voltage and performs a power interruption process,
It includes a power-on means (for example, a main CPU 2101 that performs the power-on processing shown in Figure 171) that executes power-on processing when the power is turned on,
The power interruption means uses the cyclic redundancy check circuit to perform calculations within a specific address range of the read/write memory (for example, a part of the main RAM 2103), and stores the calculation result (for example, a CRC value) in a calculation result storage area of the read/write memory outside the specific address range (for example, a CRC value storage area 2103e).
The power-on means is characterized by performing calculations within the specific address range of the read/write memory using the cyclic redundancy check circuit and comparing the calculation result with the calculation result stored in the calculation result storage area.

According to this configuration of the present invention, by using a CRC circuit provided within the microprocessor to perform the main RAM check calculation that was previously done in the main program, the calculation of the sum value becomes unnecessary, eliminating the need to write this calculation process in the main program and freeing up the program area in the main ROM. Furthermore, by eliminating the sum value calculation process, the structure and description of the main program can be made more concise. Moreover, by not performing the calculation process related to the main RAM check, including the sum value calculation, in the main program, the load on the main CPU executing the main program can also be reduced.

(A-2-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
The microprocessor is configured to transmit data within the specified address range to the cyclic redundancy check circuit in order to have the cyclic redundancy check circuit perform calculations within the specified address range, and to receive the calculation results of the calculations from the cyclic redundancy check circuit.

According to this configuration of the present invention, by using a CRC circuit provided within the microprocessor to perform the main RAM check calculation that was previously done in the main program, the calculation of the sum value becomes unnecessary, eliminating the need to write this calculation process in the main program and freeing up the program area in the main ROM. Furthermore, by eliminating the sum value calculation process, the structure and description of the main program can be made more concise. Moreover, by not performing the calculation process related to the main RAM check, including the sum value calculation, in the main program, the load on the main CPU executing the main program can also be reduced.

(A-2-3) The invention according to the third embodiment of the present invention has the following configuration in the second embodiment.
The data within the specified address range transmitted to the cyclic redundancy check circuit includes data from multiple non-contiguous areas in the read/write memory.
The calculation result received from the cyclic redundancy check circuit is configured to be a single data point.

According to this configuration of the present invention, by using a CRC circuit provided within the microprocessor to perform the main RAM check calculation that was previously done in the main program, the calculation of the sum value becomes unnecessary, eliminating the need to write this calculation process in the main program and freeing up the program area in the main ROM. Furthermore, by eliminating the sum value calculation process, the structure and description of the main program can be made more concise. Moreover, by not performing the calculation process related to the main RAM check, including the sum value calculation, in the main program, the load on the main CPU executing the main program can also be reduced.

(A-2-4) The invention according to the fourth embodiment of the present invention has the following configuration in the first embodiment.
If the calculation result of the calculation performed by the power-on means does not match the calculation result stored in the calculation result storage area (for example, if the matching results do not match, a CRC abnormality (game recovery impossible state 1) is set in Figure 172 (step S2053), and if the game recovery impossible state is in Figure 171 and predetermined conditions are met, game recovery impossible error processing is performed (N0_1 in step S2035), interrupt prohibition is set and then the loop continues), the system is configured to perform a waiting process until the power of the gaming machine is turned off.

According to this configuration of the present invention, by using a CRC circuit provided within the microprocessor to perform the main RAM check calculation that was previously done in the main program, the calculation of the sum value becomes unnecessary, eliminating the need to write this calculation process in the main program and freeing up the program area in the main ROM. Furthermore, by eliminating the sum value calculation process, the structure and description of the main program can be made more concise. Moreover, by not performing the calculation process related to the main RAM check, including the sum value calculation, in the main program, the load on the main CPU executing the main program can also be reduced.

(A-2-5) The invention according to the fifth embodiment of the present invention has the following configuration in the first embodiment.
If the power interruption means determines that no calculations are being performed within the specified address range, the system is configured to execute a waiting process until the power to the gaming machine is turned off.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-6) The invention according to the sixth embodiment of the present invention has the following configuration in the fourth or fifth embodiment.
The system is configured to prevent the power-off process from being executed while the standby process is running.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-7) The invention according to the seventh embodiment of the present invention has the following configuration in the fourth or fifth embodiment.
The aforementioned power-on means is
Even if the calculation result of the calculation performed by the power-on means does not match the calculation result stored in the calculation result storage area, the system is configured to prevent the standby process from being executed by performing a predetermined operation when the power to the gaming machine is turned on.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-8) The invention according to the eighth embodiment of the present invention has the following configuration in the fourth or fifth embodiment.
When the aforementioned waiting process is being executed,
A message indicating that the game cannot be resumed is displayed.
If the power to the gaming machine is turned off and then turned on again, the standby process is executed again and the "cannot be restored" display is shown.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-9) The invention according to the ninth embodiment of the present invention has the following configuration in the eighth embodiment.
Even if the power to the gaming machine is turned off while the standby process is being executed, the system is configured to prevent the standby process from being executed again by performing a predetermined operation when the power to the gaming machine is subsequently turned on.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-10) The invention according to the tenth embodiment of the present invention has the following configuration in the fourth or fifth embodiment.
The control unit connected to the microprocessor, which controls the game's presentation, further comprises a communication control means that performs a communication data transmission process that transmits communication data at regular intervals.
The system is configured to stop the communication data transmission process while the aforementioned waiting process is being executed.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

(A-2-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 10th embodiment.
The aforementioned communication control means is
In order to transmit the aforementioned communication data to the control unit at regular intervals, a transmission interval timer is provided.
When the value of the transmission interval timer reaches a predetermined value, the system controls the transmission of the communication data to the control unit.
While the aforementioned waiting process is being executed, the timer value of the transmission interval timer is repeatedly updated so that the timer value becomes the predetermined value.
The communication control means is configured to transmit the communication data to the control unit as soon as the power to the gaming machine is turned on again and the communication data transmission process starts, if there is any untransmitted communication data remaining due to the cessation of the communication data transmission process.

According to this configuration of the present invention, the main RAM check, which was previously calculated by the main program, is performed using a CRC circuit provided within the microprocessor. This eliminates the need to calculate the sum value, thus freeing up the program area of the main ROM. Furthermore, based on the CRC value calculated without using calculations by the main CPU, abnormalities in the main RAM can be appropriately detected, enabling effective restart management.

According to this invention, it is no longer necessary to write the calculation process for the sum value in the main program, thereby freeing up the program area in the main ROM. As a result, this freed-up program area can be used for logic to enhance gameplay. Furthermore, by eliminating the calculation process for the sum value, the structure and description of the main program can be made simpler, improving the development efficiency and maintainability of the program. Moreover, by not performing the calculation process related to the main RAM check, including the calculation of the sum value, in the main program, the load on the main CPU executing the main program can be reduced, and CRC checks can be performed in a shorter time.

Furthermore, according to the present invention, abnormalities in the main RAM can be appropriately detected based on the CRC value calculated without using calculations by the main CPU, and effective restart management can be achieved.

<Note A-3>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, when it detects an operation by the player (hereinafter referred to as "start operation") provided that a medal has been inserted, outputs a signal requesting the start of rotation of each reel; a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win has occurred is determined based on the combination of symbols displayed in the multiple display windows, and if a win has occurred, medals are dispensed from the hopper and stored in the medal receiving section.

In such gaming machines, a technique has been disclosed in which multiple tables are stored in the main ROM, and the control processing program retrieves data from these tables (for example, Japanese Patent Publication No. 2021-079129).

However, when each control processing program in the main control unit retrieves data from its corresponding table, it is common practice to have separate data retrieval processes for each. However, as the number of control processes and tables increases, so does the amount of data retrieval processing, which puts pressure on the capacity of the main ROM that stores the control processing programs.

Furthermore, while it's common practice to store data in tables in 1-byte units, there are many cases where the data patterns are few and a 1-byte capacity isn't actually required for table storage. In such cases, a large amount of unused space remains, which puts pressure on the main ROM capacity.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that does not require a separate data acquisition process for each type of data, but instead uses a common data acquisition process to efficiently utilize the program storage area of the main ROM, thereby reducing the strain on the main ROM's capacity.

Furthermore, the present invention aims to provide a gaming machine that can reduce unused space and alleviate pressure on the main ROM capacity by storing multiple data items in the data storage unit of the table. Additionally, the common data acquisition process described above can expand these data items when multiple data items are stored in the data storage unit of the table.

Furthermore, the present invention aims to provide a gaming machine equipped with a smaller program size that eliminates the need to determine the RAM initialization range for each region, and allows for the initialization of the main RAM for both the working area within the used area and the working area outside the used area.

Furthermore, this invention aims to simplify the structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

Furthermore, the present invention aims to make the RAM clearing process for the work area outside the usage area completely independent of the RAM clearing process for the work area within the usage area, thereby facilitating the creation and modification of programs in accordance with other standards.

To achieve the above objective, the present invention provides the following gaming machine.
(A-3-1) The invention according to the first embodiment of the present invention has the following configuration.
Game control means (for example, main CPU 2101) that controls the progress of the game,
A first storage means (for example, a main ROM 2102) in which the program and table data are stored,
The system includes a second storage means (for example, a main RAM 2103) for storing data in conjunction with the execution of the program,
The aforementioned table data includes multiple table data,
A predetermined table data among the aforementioned plurality of table data is a data group consisting of multiple bytes of single-byte data.
The one-byte data in the aforementioned data group is a 4-bit data table consisting of the upper 4 bits and the lower 4 bits of data.
The game control means includes a 4-bit data acquisition means that acquires 4-bit data consisting of only the upper 4 bits or the lower 4 bits from the 1-byte data of the 4-bit data table, and stores the 4-bit data in a predetermined area of the second storage means.
The aforementioned 4-bit data acquisition means is
A gaming machine characterized by obtaining the 1-byte data from the 4-bit data table, and then, according to predetermined conditions, swapping the upper 4 bits of the data with the lower 4 bits of the data contained in the 1-byte data to obtain the 4-bit data.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 4 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since two 4-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, this common 4-bit data acquisition process allows for easy acquisition of the desired 4-bit data even in special situations where two 4-bit data points are stored in a single byte.

(A-3-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
The process of executing the 4-bit data acquisition means sets the position of the predetermined table data (for example, the starting address of the table data) and the selected value (for example, an entry indicating the relative position of the data to be acquired).
The 4-bit data acquisition means is configured to determine, based on the result of dividing the selected value by a specific number, the location where the 1-byte data to be acquired from the predetermined table data is stored, and whether or not to swap the upper 4 bits of data with the lower 4 bits of data (for example, by dividing the selected value by 2 and making a decision based on the quotient and remainder).

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 4 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since two 4-bit data points can be stored in each 1-byte data point of the table data, unused space is reduced, saving the main ROM's capacity. Moreover, this common 4-bit data acquisition process allows for easy acquisition of the desired 4-bit data even in the special situation where two 4-bit data points are stored in one byte of data, by specifying a selection value indicating the relative position of the table data to be acquired.

(A-3-3) The invention according to the third embodiment of the present invention has the following configuration in the second embodiment.
The 4-bit data acquisition means is configured to calculate the quotient and remainder by dividing the selected value by 2, and to determine the position of the 1-byte data to be acquired by adding the relative position based on the quotient to the position of the predetermined table data, and to determine whether or not to swap the upper 4 bits of data with the lower 4 bits of data depending on whether the remainder is odd or even.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 4 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since two 4-bit data points can be stored in each 1-byte data point of the table data, unused space is reduced, saving the main ROM's capacity. Moreover, this common 4-bit data acquisition process allows for easy acquisition of the desired 4-bit data even in the special situation where two 4-bit data points are stored in one byte of data, by specifying a selection value indicating the relative position of the table data to be acquired.

(A-3-4) The invention according to the fourth embodiment of the present invention has the following configuration in the first embodiment.
The one-byte data in the aforementioned four-bit data table is generated by multiplying the four-bit data to be stored in the upper four bits by "10"H, shifting it by four bits, and then adding it to the four-bit data to be stored in the lower four bits.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 4 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since two 4-bit data points can be stored in each 1-byte data point of the table data, unused space is reduced, saving the main ROM's capacity. Moreover, this common 4-bit data acquisition process allows for easy acquisition of the desired 4-bit data even in the special situation where two 4-bit data points are stored in one byte of data, by specifying a selection value indicating the relative position of the table data to be acquired.

(A-3-5) The invention according to the fifth embodiment of the present invention has the following configuration in the first embodiment.
The one-byte data in the aforementioned data group is a two-bit data table composed of two-bit units of data.
The game control means includes a two-bit data acquisition means that acquires two-bit data from the one-byte data of the two-bit data table and stores the two-bit data in a predetermined area of the second storage means.
The aforementioned 2-bit data acquisition means is
The system is configured to obtain 1-byte data from the 2-bit data table, and then, according to predetermined conditions, perform a 2-bit shift on the obtained data to obtain the 2-bit data.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-3-6) The invention according to the sixth embodiment of the present invention has the following configuration in the fifth embodiment.
The process of executing the 2-bit data acquisition means sets the position and selected value of the predetermined table data.
The two-bit data acquisition means is configured to determine the location where the one-byte data to be acquired from the predetermined table data is stored, and the number of two-bit unit shifts, based on the result of dividing the selected value by a specific number.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-3-7) The invention according to the seventh embodiment of the present invention has the following configuration in the sixth embodiment.
The 2-bit data acquisition means is configured to calculate the quotient and remainder by dividing the selected value by 4, and to determine the position of the 1-byte data to be acquired by adding the relative position based on the quotient to the position of the predetermined table data, and to determine the number of 2-bit unit shifts based on the remainder.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-3-8) The invention according to the eighth embodiment of the present invention has the following configuration in the fifth embodiment.
The 1-byte data in the aforementioned 2-bit data table is generated by multiplying the 2-bit data to be stored in the first 2 bits by "40"H, the 2-bit data to be stored in the second 2 bits by "10"H, and the 2-bit data to be stored in the third 2 bits by "4"H to shift each of the 2-bit data, and then adding the shifted 2-bit data to the 2-bit data to be stored in the fourth 2 bits.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-3-9) The invention according to the ninth embodiment of the present invention has the following configuration in the first embodiment.
The system further includes a setting switch (e.g., a key-type setting switch) for changing or checking the setting value.
The second storage means comprises a third storage means (for example, a RAM area 2203a within the usage area) for storing data directly related to the progress of the game, and a fourth storage means (for example, a RAM area 2203b outside the usage area) for storing data not directly related to the progress of the game.
The aforementioned game control means is
A range calculation means that performs calculations within a specific address range of the second storage means and stores the calculation results in a calculation result storage area (for example, a CRC circuit 2107c that performs CRC calculations in a CRC generation process (outside the usage area) called by the power interrupt processing shown in Figure 190, and a main CPU 2101 that stores the calculated CRC value in a CRC value storage area 2103e),
A range matching means (for example, the main CPU 2101 that performs a comparison of CRC values in the CRC check process (outside the used area) shown in Figure 172) performs calculations within a specific address range of the second storage means and compares the calculation result with the calculation result stored in the calculation result storage area,
The system includes an initialization means for initializing the second storage means (for example, a main CPU 2101 that performs initialization processing such as the specified RAM initialization process shown in Figure 176),
The aforementioned game control means is
The starting position of the third storage means is determined according to the state of the setting switch when the power is turned on and the matching result of the range matching means.
Based on the starting position of the third storage means determined above, the starting position of the fourth storage means is determined.
The initialization means is configured to initialize the third storage means based on the determined starting position of the third storage means, and to initialize the fourth storage means based on the determined starting position of the fourth storage means.

According to the configuration of this invention, when determining the RAM initialization range of the working area outside the usage area, the state of the gaming machine is not determined. Therefore, the program size can be reduced, and the pressure on the main ROM's program area capacity can be mitigated. Furthermore, this configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

(A-3-10) The invention according to the tenth embodiment of the present invention has the following configuration in the ninth embodiment.
The final initialization position (for example, the clear-end address shown in Figure 205) is configured to be set once for each of the third and fourth storage means, regardless of the starting position of the third and fourth storage means.

According to the configuration of this invention, when determining the RAM initialization range of the working area outside the usage area, the state of the gaming machine is not determined. Therefore, the program size can be reduced, and the pressure on the main ROM's program area capacity can be mitigated. Furthermore, this configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

(A-3-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 9th embodiment.
The initialization means is configured to determine the starting position of the fourth storage means using correspondence data that shows the correspondence between a lower address relating to the starting position of the third storage means and an address relating to the starting position of the fourth storage means.

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

According to this invention, even if the data sets are of different types, if the maximum size of the data is the same (for example, 4-bit units or 2-bit units), a common data acquisition process (data decompression process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, and the program storage area of the main ROM can be used efficiently, reducing the pressure on the main ROM's capacity.

Furthermore, according to the present invention, since multiple data can be stored in the data storage unit of a table, unused area is reduced, and the capacity of the main ROM can be saved. Moreover, this common data retrieval process allows for easy retrieval of desired data even in special situations where multiple data are stored in the data storage unit of a table (e.g., 1-byte data).

Furthermore, according to the present invention, since the RAM initialization range of the work area outside the used area is determined based on the RAM initialization range of the work area within the used area, it is not necessary to determine the RAM initialization range for each area, thereby reducing the program size and mitigating the pressure on the program area capacity of the main ROM. Also, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the used area is determined based on a portion of the RAM initialization start address of the work area within the used area, the RAM clearing process for the work area outside the used area can be completely isolated, making it easy to create and modify programs according to other standards.

<Note A-4>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, when it detects an operation by the player (hereinafter referred to as "start operation") provided that a medal has been inserted, outputs a signal requesting the start of rotation of each reel; a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win has occurred is determined based on the combination of symbols displayed in the multiple display windows, and if a win has occurred, medals are dispensed from the hopper and stored in the medal receiving section.

In such gaming machines, a technique has been disclosed in which multiple tables are stored in the main ROM, and the control processing program retrieves data from these tables (for example, Japanese Patent Publication No. 2021-079129).

However, when each control processing program in the main control unit retrieves data from its corresponding table, it is common practice to have separate data retrieval processes for each. However, as the number of control processes and tables increases, so does the amount of data retrieval processing, which puts pressure on the capacity of the main ROM that stores the control processing programs.

Furthermore, while it's common practice to store data in tables in 1-byte units, there are many cases where the data patterns are few and a 1-byte capacity isn't actually required for table storage. In such cases, a large amount of unused space remains, which puts pressure on the main ROM capacity.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that does not require a separate data acquisition process for each type of data, but instead uses a common data acquisition process to efficiently utilize the program storage area of the main ROM, thereby reducing the strain on the main ROM's capacity.

Furthermore, the present invention aims to provide a gaming machine that can reduce unused space and alleviate pressure on the main ROM capacity by storing multiple data items in the data storage unit of the table. Additionally, the common data acquisition process described above can expand these data items when multiple data items are stored in the data storage unit of the table.

To achieve the above objective, the present invention provides the following gaming machine.
(A-4-1) The invention according to the first embodiment of the present invention has the following configuration.
A game control means (for example, a main CPU 2101) that controls the progress of the game,
A first storage means (for example, a main ROM 2102) in which the program and table data are stored,
The system includes a second storage means (for example, a main RAM 2103) for storing data in conjunction with the execution of the program,
The aforementioned table data includes multiple table data,
A predetermined table data among the aforementioned plurality of table data is a data group consisting of multiple bytes of single-byte data.
The one-byte data in the aforementioned data group is a two-bit data table composed of two-bit units of data.
The game control means includes a two-bit data acquisition means that acquires two-bit data from the one-byte data of the two-bit data table and stores the two-bit data in a predetermined area of the second storage means.
The aforementioned 2-bit data acquisition means is
A gaming machine characterized by obtaining one byte of data from the aforementioned two-bit data table, and then obtaining two bits of data by performing a two-bit shift on the obtained data according to predetermined conditions.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, this common 2-bit data acquisition process allows for easy acquisition of desired 2-bit data even in special situations where four 2-bit data points are stored in one byte of data.

(A-4-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
The process of executing the 2-bit data acquisition means sets the position of the predetermined table data (for example, the starting address of the table data) and the selected value (for example, an entry indicating the relative position of the data to be acquired).
The two-bit data acquisition means is configured to determine the location where the one-byte data to be acquired from the predetermined table data is stored, and the number of two-bit shifts, based on the result of dividing the selected value by a specific number (for example, by dividing the selected value by 4 and determining it based on the quotient and remainder).

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-4-3) The invention according to the third embodiment of the present invention has the following configuration in the second embodiment.
The 2-bit data acquisition means is configured to calculate the quotient and remainder by dividing the selected value by 4, and to determine the position of the 1-byte data to be acquired by adding the relative position based on the quotient to the position of the predetermined table data, and to determine the number of 2-bit unit shifts based on the remainder.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-4-4) The invention according to the fourth embodiment of the present invention has the following configuration in the first embodiment.
The 1-byte data in the aforementioned 2-bit data table is generated by multiplying the 2-bit data to be stored in the first 2 bits by "40"H, the 2-bit data to be stored in the second 2 bits by "10"H, and the 2-bit data to be stored in the third 2 bits by "4"H to shift each of the 2-bit data, and then adding the shifted 2-bit data to the 2-bit data to be stored in the fourth 2 bits.

According to the configuration of this invention, even with different types of data groups, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data expansion process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, allowing for efficient use of the main ROM's program storage area and reducing pressure on the main ROM's capacity. Furthermore, since four 2-bit data points can be stored in each 1-byte data point of the table data, unused area is reduced, saving main ROM capacity. Moreover, even in the special situation where four 2-bit data points are stored in one byte of data, this common 2-bit data acquisition process allows for easy acquisition of the desired 2-bit data by specifying a selection value indicating the relative position of the data to be acquired between the table data position and the data to be acquired.

(A-4-5) The invention according to the fifth embodiment of the present invention has the following configuration in the first embodiment.
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The game value input means for detecting the game medium and inputting its game value (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
The system is configured such that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process, depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-4-6) The invention according to the sixth embodiment of the present invention has the following configuration in the fifth embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) in which a value based on the number of game media dispensed according to the winning combination is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-4-7) The invention according to the seventh embodiment of the present invention has the following configuration in the first embodiment.
The system further includes a setting switch (e.g., a key-type setting switch) for changing or checking the setting value.
The second storage means comprises a third storage means (for example, a RAM area 2203a within the usage area) for storing data directly related to the progress of the game, and a fourth storage means (for example, a RAM area 2203b outside the usage area) for storing data not directly related to the progress of the game.
The aforementioned game control means is
A range calculation means that performs calculations within a specific address range of the second storage means and stores the calculation results in a calculation result storage area (for example, a CRC circuit 2107c that performs CRC calculations in a CRC generation process (outside the usage area) called by the power interrupt processing shown in Figure 190, and a main CPU 2101 that stores the calculated CRC value in a CRC value storage area 2103e),
A range matching means (for example, the main CPU 2101 that performs a comparison of CRC values in the CRC check process (outside the used area) shown in Figure 172) performs calculations within a specific address range of the second storage means and compares the calculation result with the calculation result stored in the calculation result storage area,
The system includes an initialization means for initializing the second storage means (for example, a main CPU 2101 that performs initialization processing such as the specified RAM initialization process shown in Figure 176),
The aforementioned game control means is
The starting position of the third storage means is determined according to the state of the setting switch when the power is turned on and the matching result of the range matching means.
Based on the starting position of the third storage means determined above, the starting position of the fourth storage means is determined.
The initialization means is configured to initialize the third storage means based on the determined starting position of the third storage means, and to initialize the fourth storage means based on the determined starting position of the fourth storage means.

According to the configuration of this invention, when determining the RAM initialization range of the working area outside the usage area, the state of the gaming machine is not determined. Therefore, the program size can be reduced, and the pressure on the main ROM's program area capacity can be mitigated. Furthermore, this configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

(A-4-8) The invention according to the eighth embodiment of the present invention has the following configuration in the first embodiment.
A start operation detection means (for example, a start lever) that detects the start operation performed by the player,
Based on the detection of a start operation by the start operation detection means, an internal winning combination determination means (main CPU 2101 that executes the internal lottery process called in the main process shown in Figure 170) determines the internal winning combination with a predetermined probability,
A variable display means that includes multiple display columns and displays a variable pattern in each display column (a main CPU 2101 that executes the reel rotation start process called in the main process shown in Figure 170),
A stop operation detection means (main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that detects a stop operation performed by the player (for example, the operation of pressing the stop button),
The system includes a stop control means (a main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that stops the display of the changing symbols based on the determination result of the internal winning combination determination means and the detection of a stop operation by the stop operation detection means,
The fluctuation display of the fluctuation display means includes game fluctuations (normal gameplay) that assign game value and pseudo-fluctuations (pseudo-gameplay) that do not assign game value.
The stop control means executes a control process to stop the display of the changing symbols for the sake of the game variation.
The aforementioned game control means is
A pseudo-stop control means that performs a control process to stop the display of the pattern fluctuations in the pseudo-fluctuation,
The system further includes a stop operation detection input monitoring means (for example, a main CPU 2101 that performs the stop button input monitoring process shown in Figure 206) for determining whether the detection of a stop operation by the stop operation detection means is effective,
The stop control means and the pseudo-stop control means are configured to execute the stop operation detection input monitoring means to determine whether the stop operation is valid or not (executing a common process in both normal and simulated gameplay (i.e., for example, the stop button input monitoring process shown in Figure 206)).

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

(A-4-9) The invention according to the ninth embodiment of the present invention has the following configuration in the first embodiment.
The second storage means includes a first storage area (common information storage area) for storing a group of information related to the game, and a second storage area (common information backup storage area) located in a different location from the first storage area.
The aforementioned game control means is
When predetermined conditions are met, a backup means (for example, the main CPU 2101 that executes the common information backup generation process shown in Figure 207) saves all the information stored in the first storage area to the second storage area,
The system includes a recovery means (for example, a main CPU 2101 that executes the common information recovery process shown in Figure 208) that restores information saved in the second storage area to the first storage area when the predetermined conditions mentioned above and specific conditions (for example, penalty conditions) are met,
The aforementioned retraction means and the aforementioned return means share a common program, except for some processing.
The saving means and the restoring means set the starting address of the first storage area in a first register (e.g., DE register, HL register) capable of setting two bytes of data, and set the starting address of the second storage area in a second register (e.g., HL register, DE register) capable of setting two bytes of data.
A transfer command transfers the information stored at the source address from the source address set in the first register to the destination address set in the second register.
When the processing by the recovery means is executed, the system is configured to swap the source address set in the first register with the destination address set in the second register before executing the transfer instruction.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-4-10) The invention according to the tenth embodiment of the present invention has the following configuration in the ninth embodiment.
A means for instructing the player to start the game (for example, a start lever),
A variable display means (for example, each reel) capable of displaying multiple pieces of identification information in response to the operation of the game start instruction means,
A means for determining the winning combination (for example, the main CPU 2101 that performs the internal lottery process shown in Figure 179),
A stop operation detection means (for example, a stop button and a stop switch) capable of detecting a stop operation that stops the variable display of the variable display means,
A stop control means (for example, a main CPU 2101 that executes the reel stop control process shown in Figure 170) capable of stopping the variable display of the variable display means and deriving a stop display based on the winning combination determined by the combination determination means and the stop operation pattern detected by the stop operation detection means,
A prize-winning means capable of generating a prize in accordance with the stop display (for example, a main CPU 2101 that executes a process such as step S2013 in Figure 170),
The system further includes a notification means (e.g., an instruction monitor or a main display device) capable of notifying a favorable stopping operation method,
When the player operates the game start instruction means,
The saving means saves information stored in the first storage area, which is information relating to a favorable state (e.g., AT state) that enables notification by the notification means (e.g., various information), to the second storage area (for example, the process corresponding to step S4602 in Figure 163),
The game state-related processing means for updating the information related to the advantageous state updates the information stored in the first storage area (for example, the processing corresponding to steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164, etc.),
When the game start instruction means is operated by the player and a predetermined penalty condition is met, the recovery means is configured to restore the information stored in the second storage area to the first storage area (for example, the process corresponding to step S4624 in Figure 164).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-4-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 9th embodiment.
The aforementioned specific conditions are penalty conditions that cancel a predetermined advantageous game state,
The aforementioned penalty conditions are configured to be conditions based on the game state and predetermined operations performed by the player.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

According to this invention, even if the data sets are of different types, if the maximum data size is the same (for example, in units of 2 bits), a common data acquisition process (data decompression process) can be used. Therefore, there is no need to provide a separate data acquisition process for each data type, and the program storage area of the main ROM can be used efficiently, reducing the pressure on the main ROM's capacity.

Furthermore, according to the present invention, since multiple data can be stored in the data storage unit of a table, unused area is reduced, and the capacity of the main ROM can be saved. Moreover, this common data retrieval process allows for easy retrieval of desired data even in special situations where multiple data are stored in the data storage unit of a table (e.g., 1-byte data).

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

According to the configuration of this invention, when determining the RAM initialization range of the working area outside the usage area, the state of the gaming machine is not determined. Therefore, the program size can be reduced, and the pressure on the main ROM's program area capacity can be mitigated. Furthermore, this configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

<Note A-5>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

Some gaming machines disclose a system where the settlement process, executed when the settlement button is pressed while waiting for a unit game to start, and the payout process, executed at the end of a unit game, are performed as separate processes (for example, Japanese Patent Publication No. 2019-170605).

Regarding the dispensing of game tokens, there is no difference between the settlement process and the payout process, and although there are common processing parts, it is common for the settlement process and the payout process to be separate processes, as in the game machine mentioned above. The fact that these separate processes, each containing a common processing part, are written separately is one of the factors that puts pressure on the main ROM's program area.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that can reduce the strain on the main ROM's program area capacity by standardizing the process of pressing the settlement button while waiting for a unit game to start, and the payout process for the gaming medium executed at the end of a unit game.

Furthermore, the present invention aims to provide a gaming machine that can mitigate the strain on the main ROM's program area capacity by setting the lower address of the target counter when executing the payout process for the gaming medium, which is performed when the settlement button is pressed or when a unit of game ends.

Furthermore, the present invention aims to improve the development efficiency and maintainability of programs by standardizing the disbursement process, thereby simplifying the program's structure and description.

To achieve the above objective, the present invention provides the following gaming machine.
(A-5-1) The invention according to the first embodiment of the present invention has the following configuration.
A game control means (for example, a main CPU 2101) that controls the progress of the game,
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The game value input means for detecting the game medium and inputting its game value (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
A gaming machine characterized in that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) in which a value based on the number of game media dispensed according to the winning combination is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-3) The invention according to the third embodiment of the present invention has the following configuration in the first embodiment.
When the settlement process is performed by the settlement processing means, the disbursement process is configured to be executed twice for different disbursement operations.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-4) The invention according to the fourth embodiment of the present invention has the following configuration in the third embodiment.
When the settlement process is performed by the settlement processing means, and the payout process is executed twice,
The parameter assigned when executing the first payout process is information relating to the address of the storage area (for example, the credit counter storage area) where the number moved from the number of game media paid out according to the winning combination is stored.
The parameters assigned when executing the second payout process are configured to be information relating to the address of the input number storage area (for example, the medal insertion counter storage area) in which the game value of the game medium detected by the game value input means is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-5) The invention according to the fifth embodiment of the present invention has the following configuration in the second or fourth embodiment.
The information relating to the aforementioned address is configured to be a part of the address of the corresponding memory area (for example, the lower byte of a 2-byte address data representing the memory location of the memory area).

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program. Additionally, by setting a portion of the address of the corresponding memory area, the size of the calling program can be reduced, further reducing the pressure on the program area capacity of the main ROM.

(A-5-6) The invention according to the sixth embodiment of the present invention has the following configuration in the fourth embodiment.
When the prize payout process is performed by the prize payout process, the instruction to execute the payout process (for example, a jump (JP) instruction) and when the settlement process is performed by the settlement processing means, the instruction to execute the first payout process (for example, a call (CALL) instruction) are configured to be of different types (the difference being whether or not the program returns to the calling program when the process is completed).

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-7) The invention according to the seventh embodiment of the present invention has the following configuration in the sixth embodiment.
When the prize payout process is performed by the prize payout process, the call command that causes the payout process to be executed is a command that does not return to the next step of the call command that called the payout process (for example, a jump (JP) command).
When the settlement process is performed by the settlement processing means, the command to execute the first disbursement process is configured to be a command that returns to the next step of the call command that invoked the disbursement process (for example, a CALL command).

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-8) The invention according to the eighth embodiment of the present invention has the following configuration in the third embodiment.
When the settlement process is performed by the settlement processing means, and the payout process is executed twice,
The system is configured to assign different parameters to each of the aforementioned payout processes (for example, the first payout process assigns address information to the credit counter storage area, and the second payout process assigns address information to the medal insertion counter storage area).

With this configuration of the present invention, a common payout process is used when settlement processing is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-9) The invention according to the ninth embodiment of the present invention has the following configuration in the fifth embodiment.
The dispensing processing means is configured to identify a storage area by combining a predetermined upper address with a lower address received as a parameter, and to perform dispensing processing based on the number of dispensing items stored in the storage area.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-10) The invention according to the tenth embodiment of the present invention has the following configuration in the eighth embodiment.
The program that executes the settlement processing means includes a program that executes the disbursement processing, and is configured to call the same program range related to the disbursement processing if the disbursement processing is to be executed twice.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-5-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 10th embodiment.
The prize payout process is configured to be controlled to call the program range related to the payout process when the payout process is executed.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

According to this invention, by standardizing the payout process for game media executed when the settlement button is pressed or at the end of a game, the pressure on the program area capacity of the main ROM can be reduced.

Furthermore, according to the present invention, when executing the payout process for game media, which is performed when the settlement button is pressed or when a unit of game ends, the lower address of the target counter is set. This reduces the size of the calling program, thereby mitigating the pressure on the main ROM's program area capacity.

Furthermore, according to the present invention, by standardizing the dispensing process, the program's structure and description can be made more concise, thereby improving the development efficiency and maintainability of the program.

<Note A-6>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

Among such gaming machines, there are disclosed that perform initialization from multiple starting addresses depending on the conditions of the game control work area (for example, Japanese Patent Publication No. 2019-141455).

In the gaming machines described above, only the game control work area is initialized. However, currently, it is necessary to initialize both the area within the main RAM's usage area (which is the game control work area) and the area outside of the main RAM's usage area (which is not the game control work area) under the same conditions. Due to regulations specific to the gaming machine industry, separate programs must be created for each area, according to the conditions, and stored in the main ROM. However, preparing such separate programs puts pressure on the main ROM's program area and also leads to increased complexity of the main program.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine equipped with a smaller program that can initialize the main RAM with respect to both the working area within the usage area and the working area outside the usage area.

Furthermore, this invention aims to simplify the structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

Furthermore, the present invention aims to make the RAM clearing process for the work area outside the usage area completely independent of the RAM clearing process for the work area within the usage area, thereby facilitating the creation and modification of programs in accordance with other standards.

To achieve the above objective, the present invention provides the following gaming machine.
(A-6-1) The invention according to the first embodiment of the present invention has the following configuration.
A game control means that controls the progress of the game by implementing a microprocessor (e.g., microprocessor 2100) which includes an arithmetic circuit (e.g., main CPU 2101), read memory (e.g., main ROM 2102), and read/write memory (e.g., main RAM 2103),
It includes a setting switch (for example, a setting key type switch) provided for changing or confirming the setting value,
The aforementioned game control means is
Range calculation means that performs calculations within a specific address range of the read/write memory and stores the calculation results in a calculation result storage area of the read/write memory outside the specific address range (for example, a CRC circuit 2107c that performs CRC calculations in a CRC generation process (outside the used area) called by the power interrupt processing shown in Figure 190, and a main CPU 2101 that stores the calculated CRC value in a CRC value storage area 2103e),
A range matching means (for example, the main CPU 2101 that performs a comparison of CRC values in the CRC check process (outside the used area) shown in Figure 172) that performs calculations within a specific address range of the read/write memory and compares the calculation result with the calculation result stored in the calculation result storage area,
Initialization means for initializing the read/write memory (for example, a main CPU 2101 that performs initialization processing such as the specified RAM initialization process shown in Figure 176),
It includes a main processing means that performs main processing as the game progresses (for example, a main CPU 2101 that executes the main processing shown in Figure 170),
The read/write memory comprises a first storage means (for example, a RAM area 2203a within the usage area) for storing data directly related to the progress of the game, and a second storage means (for example, a RAM area 2203b outside the usage area) for storing data not directly related to the progress of the game.
The aforementioned ranges are,
When the power is turned on, the setting switch is in the ON state and a mismatch is detected by the range matching means, the first starting position of the first storage means (for example, the RAM error clear address),
When the power is turned on, the setting switch is in the ON state and no matching mismatch is detected by the range matching means, the second starting position of the first storage means (for example, the setting change clear address),
The third starting position of the first storage means (for example, the clear address at the end of one game) is set when the unit game of the main processing means has finished and the next unit game has not yet started.
The initialization start position of the first storage means, including the first start position, the second start position, and the third start position, is represented by a 2-byte address.
The initialization means is
A 2-byte address value relating to one of the starting positions selected from the first starting position, the second starting position, or the third starting position is stored in the storage determination area.
The initialization start position of the second storage means is determined according to the value of the lower address of the address stored in the storage determination area.
With respect to the first storage means, initialization is performed from any of the initialization start positions of the first storage means, such as the first start position, the second start position, and the third start position (for example, RAM initialization within the usage area as shown in step S2151 in Figure 176).
The gaming machine (e.g., a pachislo machine 2001) is characterized in that the second storage means is initialized from the determined initialization start position of the second storage means (for example, the out-of-use RAM initialization process (out-of-use area) in step S2150 shown in Figure 176).

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-6-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
The final initialization position (for example, the clear-end address shown in Figure 205) is configured to be set once for each of the first and second storage means, regardless of the initialization start position of the first storage means and the initialization start position of the second storage means.

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-6-3) The invention according to the third embodiment of the present invention has the following configuration in the first embodiment.
The second storage means stores correspondence data indicating the correspondence between a lower address related to the initialization start position of the first storage means and an address related to the initialization start position of the second storage means.
The initialization means is configured to determine the initialization start position of the second storage means corresponding to the value of the lower address stored in the storage determination area, using the corresponding data.

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-6-4) The invention according to the fourth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The game value input means for detecting the game medium and inputting its game value (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
The system is configured such that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process, depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-6-5) The invention according to the fifth embodiment of the present invention has the following configuration in the fourth embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) that stores a value based on the number of game media dispensed according to the winning combination.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-6-6) The invention according to the sixth embodiment of the present invention has the following configuration in the fourth embodiment.
When the settlement process is performed by the settlement processing means, the disbursement process is configured to be executed twice for different disbursement operations.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-6-7) The invention according to the seventh embodiment of the present invention has the following configuration in the sixth embodiment.
When the settlement process is performed by the settlement processing means, and the payout process is executed twice,
The parameter assigned when executing the first payout process is information relating to the address of the storage area (for example, the credit counter storage area) where the number moved from the number of game media paid out according to the winning combination is stored.
The parameters assigned when executing the second payout process are configured to be information relating to the address of the input number storage area (for example, the medal insertion counter storage area) in which the game value of the game medium detected by the game value input means is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-6-8) The invention according to the eighth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
A start operation detection means (for example, a start lever) that detects the start operation performed by the player,
Based on the detection of a start operation by the start operation detection means, an internal winning combination determination means (main CPU 2101 that executes the internal lottery process called in the main process shown in Figure 170) determines the internal winning combination with a predetermined probability,
A variable display means that includes multiple display columns and displays a variable pattern in each display column (a main CPU 2101 that executes the reel rotation start process called in the main process shown in Figure 170),
A stop operation detection means (main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that detects a stop operation performed by the player (for example, the operation of pressing the stop button),
The system includes a stop control means (a main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that stops the display of the changing symbols based on the determination result of the internal winning combination determination means and the detection of a stop operation by the stop operation detection means,
The fluctuation display of the aforementioned fluctuation display means includes game fluctuations (normal gameplay) that assign game value and pseudo-fluctuations (pseudo-gameplay) that do not assign game value.
The stop control means executes a control process to stop the display of the changing symbols for the sake of the game variation.
The aforementioned game control means is
A pseudo-stop control means that performs a control process to stop the display of the pattern fluctuations in the pseudo-fluctuation,
The system further includes a stop operation detection input monitoring means (for example, a main CPU 2101 that performs the stop button input monitoring process shown in Figure 206) for determining whether the detection of a stop operation by the stop operation detection means is effective,
The stop control means and the pseudo-stop control means are configured to execute the stop operation detection input monitoring means to determine whether the stop operation is valid or not (executing a common process in both normal and simulated gameplay (i.e., for example, the stop button input monitoring process shown in Figure 206)).

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

(A-6-9) The invention according to the ninth embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned calculation circuit functions as a game control means for controlling the progress of the game.
A third storage means (for example, main ROM 2102) in which the program and table data are stored,
The system includes a fourth storage means (for example, a main RAM 2103) for storing data in conjunction with the execution of the aforementioned program.
The fourth storage means includes a first storage area (common information storage area) for storing a group of information related to the game, and a second storage area (common information backup storage area) located in a different location from the first storage area.
The aforementioned game control means is
When predetermined conditions are met, a backup means (for example, the main CPU 2101 that executes the common information backup generation process shown in Figure 207) saves all the information stored in the first storage area to the second storage area,
The system includes a recovery means (for example, a main CPU 2101 that executes the common information recovery process shown in Figure 208) that restores information saved in the second storage area to the first storage area when the predetermined conditions mentioned above and specific conditions (for example, penalty conditions) are met,
The aforementioned retraction means and the aforementioned return means share a common program, except for some processing.
The saving means and the restoring means set the starting address of the first storage area in a first register (e.g., DE register, HL register) capable of setting two bytes of data, and set the starting address of the second storage area in a second register (e.g., HL register, DE register) capable of setting two bytes of data.
A transfer command transfers the information stored at the source address from the source address set in the first register to the destination address set in the second register.
When the processing by the recovery means is executed, the system is configured to swap the source address set in the first register with the destination address set in the second register before executing the transfer instruction.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-6-10) The invention according to the tenth embodiment of the present invention has the following configuration in the ninth embodiment.
A means for instructing the player to start the game (for example, a start lever),
A variable display means (for example, each reel) capable of displaying multiple pieces of identification information in response to the operation of the game start instruction means,
A means for determining the winning combination (for example, the main CPU 2101 that performs the internal lottery process shown in Figure 179),
A stop operation detection means (for example, a stop button and a stop switch) capable of detecting a stop operation that stops the variable display of the variable display means,
A stop control means (for example, a main CPU 2101 that executes the reel stop control process shown in Figure 170) capable of stopping the variable display of the variable display means and deriving a stop display based on the winning combination determined by the combination determination means and the stop operation pattern detected by the stop operation detection means,
A prize-winning means capable of generating a prize in accordance with the stop display (for example, a main CPU 2101 that executes a process such as step S2013 in Figure 170),
The system further includes a notification means (e.g., an instruction monitor or a main display device) capable of notifying a favorable stopping operation method,
When the player operates the game start instruction means,
The saving means saves information stored in the first storage area, which is information relating to a favorable state (e.g., AT state) that enables notification by the notification means (e.g., various information), to the second storage area (for example, the process corresponding to step S4602 in Figure 163),
The game state-related processing means for updating the information related to the advantageous state updates the information stored in the first storage area (for example, the processing corresponding to steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164, etc.),
When the game start instruction means is operated by the player and a predetermined penalty condition is met, the recovery means is configured to restore the information stored in the second storage area to the first storage area (for example, the process corresponding to step S4624 in Figure 164).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-6-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 9th embodiment.
The aforementioned specific conditions are penalty conditions that cancel a predetermined advantageous game state,
The aforementioned penalty conditions are configured to be conditions based on the game state and predetermined operations performed by the player.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

According to the present invention, by providing a smaller program that can initialize the main RAM for both the working area within the used area and the working area outside the used area, it is possible to reduce the pressure on the program area capacity of the main ROM.

Furthermore, according to the present invention, the structure and description of the main program can be made simpler, improving the development efficiency and maintainability of the program. Moreover, since the RAM clearing process for the non-used work area can be completely isolated, it becomes easier to create and modify programs according to other standards.

Furthermore, according to this invention, since a common payout process is used when a prize payout process or a settlement process is performed, the pressure on the program area capacity of the main ROM can be reduced. Also, by using such a common payout process, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, since some of the processing for normal gameplay and simulated gameplay is common, the pressure on the program area capacity of the main ROM can be reduced. Also, according to the present invention, by partially commonizing the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, the backup restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially standardized, thereby reducing the pressure on the main ROM's program area capacity. Moreover, by standardizing the program in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

<Note A-7>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

In such gaming machines, the process of stopping the reels related to the restriction of symbol stopping is generally handled separately for normal gameplay and simulated gameplay (for example, Japanese Patent Publication No. 2022-067988).

As with the gaming machine described above, if regular gameplay and simulated gameplay are treated as separate processes, and corresponding programs are created for each, the program size will increase, putting pressure on the program area of the main ROM, which is not otherwise large.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that can reduce the strain on the main ROM's program area by partially unifying the processing of normal games and simulated games.

Furthermore, this invention aims to improve the development efficiency and maintainability of programs by simplifying the program's structure and description through the partial commonality of processing between normal and simulated gameplay.

To achieve the above objective, the present invention provides the following gaming machine.
(A-7-1) The invention according to the first embodiment of the present invention has the following configuration.
Game control means (for example, main CPU 2101) that controls the progress of the game,
A start operation detection means (for example, a start lever) that detects the start operation performed by the player,
Based on the detection of a start operation by the start operation detection means, an internal winning combination determination means (main CPU 2101 that executes the internal lottery process called in the main process shown in Figure 170) determines the internal winning combination with a predetermined probability,
A variable display means that includes multiple display columns and displays a variable pattern in each display column (a main CPU 2101 that executes the reel rotation start process called in the main process shown in Figure 170),
A stop operation detection means (main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that detects a stop operation performed by the player (for example, the operation of pressing the stop button),
The system includes a stop control means (a main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that stops the display of the changing symbols based on the determination result of the internal winning combination determination means and the detection of a stop operation by the stop operation detection means,
The fluctuation display of the aforementioned fluctuation display means includes game fluctuations (normal gameplay) that assign game value and pseudo-fluctuations (pseudo-gameplay) that do not assign game value.
The stop control means executes a control process to stop the display of the changing symbols for the sake of the game variation.
The aforementioned game control means is
A pseudo-stop control means that performs a control process to stop the display of the pattern fluctuations in the pseudo-fluctuation,
The system further includes a stop operation detection input monitoring means (for example, a main CPU 2101 that performs the stop button input monitoring process shown in Figure 206) for determining whether the detection of a stop operation by the stop operation detection means is effective,
The stop control means and the pseudo-stop control means each execute the stop operation detection input monitoring means to determine whether the stop operation is valid (a common process in normal gameplay and pseudo-gameplay (i.e., for example, the stop button input monitoring process shown in Figure 206)) and are characterized in that they are used in a gaming machine (e.g., a pachislo machine 2001).

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

(A-7-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The game value input means for detecting the game medium and inputting its game value (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
The system is configured such that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process, depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-7-3) The invention according to the third embodiment of the present invention has the following configuration in the second embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) in which a value based on the number of game media dispensed according to the winning combination is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-7-4) The invention according to the fourth embodiment of the present invention has the following configuration in the second embodiment.
When the settlement process is performed by the settlement processing means, the disbursement process is configured to be executed twice for different disbursement operations.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-7-5) The invention according to the fifth embodiment of the present invention has the following configuration in the fourth embodiment.
When the settlement process is performed by the settlement processing means, and the payout process is executed twice,
The parameter assigned when executing the first payout process is information relating to the address of the storage area (for example, the credit counter storage area) where the number moved from the number of game media paid out according to the winning combination is stored.
The parameters assigned when executing the second payout process are configured to be information relating to the address of the input number storage area (for example, the medal insertion counter storage area) in which the game value of the game medium detected by the game value input means is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-7-6) The invention according to the sixth embodiment of the present invention has the following configuration in the first embodiment.
A game control means that controls the progress of the game by implementing a microprocessor (e.g., microprocessor 2100) which includes an arithmetic circuit (e.g., main CPU 2101), read memory (e.g., main ROM 2102), and read/write memory (e.g., main RAM 2103),
It includes a setting switch (for example, a setting key type switch) provided for changing or confirming the setting value,
The aforementioned game control means is
Range calculation means that performs calculations within a specific address range of the read/write memory and stores the calculation results in a calculation result storage area of the read/write memory outside the specific address range (for example, a CRC circuit 2107c that performs CRC calculations in a CRC generation process (outside the used area) called by the power interrupt processing shown in Figure 190, and a main CPU 2101 that stores the calculated CRC value in a CRC value storage area 2103e),
A range matching means (for example, the main CPU 2101 that performs a comparison of CRC values in the CRC check process (outside the used area) shown in Figure 172) that performs calculations within a specific address range of the read/write memory and compares the calculation result with the calculation result stored in the calculation result storage area,
Initialization means for initializing the read/write memory (for example, a main CPU 2101 that performs initialization processing such as the specified RAM initialization process shown in Figure 176),
It includes a main processing means that performs main processing as the game progresses (for example, a main CPU 2101 that executes the main processing shown in Figure 170),
The read/write memory comprises a first storage means (for example, a RAM area 2203a within the usage area) for storing data directly related to the progress of the game, and a second storage means (for example, a RAM area 2203b outside the usage area) for storing data not directly related to the progress of the game.
The aforementioned ranges are,
When the power is turned on, the setting switch is in the ON state and a mismatch is detected by the range matching means, the first starting position of the first storage means (for example, the RAM error clear address),
When the power is turned on, the setting switch is in the ON state and no matching mismatch is detected by the range matching means, the second starting position of the first storage means (for example, the setting change clear address),
The third starting position of the first storage means (for example, the clear address at the end of one game) is set when the unit game of the main processing means has finished and the next unit game has not yet started.
The initialization start position of the first storage means, including the first start position, the second start position, and the third start position, is represented by a 2-byte address.
The initialization means is
A 2-byte address value relating to one of the starting positions selected from the first starting position, the second starting position, or the third starting position is stored in the storage determination area.
The initialization start position of the second storage means is determined according to the value of the lower address of the address stored in the storage determination area.
With respect to the first storage means, initialization is performed from any of the initialization start positions of the first storage means, such as the first start position, the second start position, and the third start position (for example, RAM initialization within the usage area as shown in step S2151 in Figure 176).
The second storage means is configured to perform initialization from the determined initialization start position of the second storage means (for example, the out-of-use RAM initialization process (out-of-use area) in step S2150 shown in Figure 176).

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-7-7) The invention according to the seventh embodiment of the present invention has the following configuration in the sixth embodiment.
The final initialization position (for example, the clear-end address shown in Figure 205) is configured to be set once for each of the first and second storage means, regardless of the initialization start position of the first storage means and the initialization start position of the second storage means.

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-7-8) The invention according to the eighth embodiment of the present invention has the following configuration in the sixth embodiment.
The second storage means stores correspondence data indicating the correspondence between a lower address related to the initialization start position of the first storage means and an address related to the initialization start position of the second storage means.
The initialization means is configured to determine the initialization start position of the second storage means corresponding to the value of the lower address stored in the storage determination area, using the corresponding data.

According to the configuration of this invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced, thereby mitigating the pressure on the program area capacity of the main ROM. Furthermore, this configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

(A-7-9) The invention according to the ninth embodiment of the present invention has the following configuration in the first embodiment.
A third storage means (for example, main ROM 2102) in which the program and table data are stored,
The system includes a fourth storage means (for example, a main RAM 2103) for storing data in conjunction with the execution of the aforementioned program.
The fourth storage means includes a first storage area (common information storage area) for storing a group of information related to the game, and a second storage area (common information backup storage area) located in a different position from the first storage area.
The aforementioned game control means is
When predetermined conditions are met, a backup means (for example, the main CPU 2101 that executes the common information backup generation process shown in Figure 207) saves all the information stored in the first storage area to the second storage area,
The system includes a recovery means (for example, a main CPU 2101 that executes the common information recovery process shown in Figure 208) that restores information saved in the second storage area to the first storage area when the predetermined conditions mentioned above and specific conditions (for example, penalty conditions) are met,
The aforementioned retraction means and the aforementioned return means share a common program, except for some processing.
The saving means and the restoring means set the starting address of the first storage area in a first register (e.g., DE register, HL register) capable of setting two bytes of data, and set the starting address of the second storage area in a second register (e.g., HL register, DE register) capable of setting two bytes of data.
A transfer command transfers the information stored at the source address from the source address set in the first register to the destination address set in the second register.
When the processing by the recovery means is executed, the system is configured to swap the source address set in the first register with the destination address set in the second register before executing the transfer instruction.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-7-10) The invention according to the tenth embodiment of the present invention has the following configuration in the ninth embodiment.
A means for instructing the player to start the game (for example, a start lever),
A variable display means (for example, each reel) capable of displaying multiple pieces of identification information in response to the operation of the game start instruction means,
A means for determining the winning combination (for example, the main CPU 2101 that performs the internal lottery process shown in Figure 179),
A stop operation detection means (for example, a stop button and a stop switch) capable of detecting a stop operation that stops the variable display of the variable display means,
A stop control means (for example, a main CPU 2101 that executes the reel stop control process shown in Figure 170) capable of stopping the variable display of the variable display means and deriving a stop display based on the winning combination determined by the combination determination means and the stop operation mode detected by the stop operation detection means,
A prize-winning means capable of generating a prize in accordance with the stop display (for example, a main CPU 2101 that executes a process such as step S2013 in Figure 170),
The system further includes a notification means (e.g., an instruction monitor or a main display device) capable of notifying a favorable stopping operation method,
When the player operates the game start instruction means,
The saving means saves information stored in the first storage area, which is information relating to an advantageous state (e.g., AT state) that enables notification by the notification means (e.g., various information), to the second storage area (for example, the process corresponding to step S4602 in Figure 163),
The game state-related processing means for updating the information related to the advantageous state updates the information stored in the first storage area (for example, the processing corresponding to steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164, etc.),
When the game start instruction means is operated by the player and a predetermined penalty condition is met, the recovery means is configured to restore the information stored in the second storage area to the first storage area (for example, the process corresponding to step S4624 in Figure 164).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-7-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 9th embodiment.
The aforementioned specific conditions are penalty conditions that cancel a predetermined advantageous game state,
The aforementioned penalty conditions are configured to be conditions based on the game state and predetermined operations performed by the player.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

According to this invention, by partially unifying the processing of normal gameplay and simulated gameplay, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by partially unifying the processing of normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to this invention, since a common payout process is used when a prize payout process or a settlement process is performed, the pressure on the program area capacity of the main ROM can be reduced. Also, by using such a common payout process, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the work area outside the usage area, the program size can be reduced accordingly, thereby mitigating the pressure on the program area capacity of the main ROM. Also, the above configuration allows for a simpler structure and description of the main program, improving the development efficiency and maintainability of the program. Moreover, since the RAM initialization range of the work area outside the usage area is determined based on a portion of the RAM initialization start address of the work area within the usage area, the RAM clearing process for the work area outside the usage area can be completely isolated, making it easy to create and modify programs according to other standards.

Furthermore, according to the present invention, the backup restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially standardized, thereby reducing the pressure on the main ROM's program area capacity. Moreover, by standardizing the program in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

<Note A-8>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

In such gaming machines, a gaming machine that describes a technology for generating comprehensive state information has been disclosed (for example, Japanese Patent Publication No. 2019-198435).

In recent gaming machines, multiple lottery processes are used at the start to generate comprehensive state information, similar to that of the aforementioned gaming machine. However, depending on the player's gameplay, the generated comprehensive state information may not be applied to the next game. In this case, it is necessary to revert the comprehensive state information to its state before the game. Creating a program to perform such a process is one of the factors that puts pressure on the program area of the main RAM.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that can reduce the pressure on the program area capacity of the main ROM by partially commonizing the backup restoration process that restores predetermined information to the information before gameplay and the backup process that backs up said predetermined information.

Furthermore, this invention aims to improve the development efficiency and maintainability of programs by streamlining their structure and description through program standardization.

To achieve the above objective, the present invention provides the following gaming machine.
(A-8-1) The invention according to the first embodiment of the present invention has the following configuration.
Game control means (for example, a microprocessor 2100) that controls the progress of the game and the state related to the game,
A first storage means (for example, main ROM 2102) in which the program and table data are stored,
The system includes a second storage means (for example, a main RAM 2103) for storing data in conjunction with the execution of the aforementioned program.
The second storage means includes a first storage area (common information storage area) for storing a group of information related to the game, and a second storage area (common information backup storage area) located in a different location from the first storage area.
The aforementioned game control means is
When predetermined conditions are met, a backup means (for example, the main CPU 2101 that executes the common information backup generation process shown in Figure 207) saves all the information stored in the first storage area to the second storage area,
The system includes a recovery means (for example, a main CPU 2101 that executes the common information recovery process shown in Figure 208) that restores information saved in the second storage area to the first storage area when the predetermined conditions mentioned above and specific conditions (for example, penalty conditions) are met,
The aforementioned retraction means and the aforementioned return means share a common program, except for some processing.
The saving means and the restoring means set the starting address of the first storage area in a first register (e.g., DE register, HL register) capable of setting two bytes of data, and set the starting address of the second storage area in a second register (e.g., HL register, DE register) capable of setting two bytes of data.
A transfer command transfers the information stored at the source address from the source address set in the first register to the destination address set in the second register.
The gaming machine is characterized in that, when the processing by the recovery means is executed, the source address set in the first register and the destination address set in the second register are swapped before the transfer command is executed.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
A means for instructing the player to start the game (for example, a start lever),
A variable display means (for example, each reel) capable of displaying multiple pieces of identification information in response to the operation of the game start instruction means,
A means for determining the winning combination (for example, the main CPU 2101 that performs the internal lottery process shown in Figure 179),
A stop operation detection means (for example, a stop button and a stop switch) capable of detecting a stop operation that stops the variable display of the variable display means,
A stop control means (for example, a main CPU 2101 that executes the reel stop control process shown in Figure 170) capable of stopping the variable display of the variable display means and deriving a stop display based on the winning combination determined by the combination determination means and the stop operation mode detected by the stop operation detection means,
A prize-winning means capable of generating a prize in accordance with the stop display (for example, a main CPU 2101 that executes a process such as step S2013 in Figure 170),
The system further includes a notification means (e.g., an instruction monitor or a main display device) capable of notifying a favorable stopping operation method,
When the player operates the game start instruction means,
The saving means saves information stored in the first storage area, which is information relating to an advantageous state (e.g., AT state) that enables notification by the notification means (e.g., various information), to the second storage area (for example, the process corresponding to step S4602 in Figure 163),
The game state-related processing means for updating the information related to the advantageous state updates the information stored in the first storage area (for example, the processing corresponding to steps S4603 and S4604 in Figure 163, and step S4622 in Figure 164, etc.),
When the game start instruction means is operated by the player and a predetermined penalty condition is met, the recovery means is configured to restore the information stored in the second storage area to the first storage area (for example, the process corresponding to step S4624 in Figure 164).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-3) The invention according to the third embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned specific conditions are penalty conditions that cancel a predetermined advantageous game state,
The aforementioned penalty conditions are configured to be conditions based on the game state and predetermined operations performed by the player.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-4) The invention according to the fourth embodiment of the present invention has the following configuration in the second embodiment.
The predetermined penalty conditions are configured to be based on whether or not the game state is a specific game state (for example, whether or not it is in an advantageous period).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-5) The invention according to the fifth embodiment of the present invention has the following configuration in the second embodiment.
The predetermined penalty conditions are configured to be based on whether the stop operation performed by the player was carried out in a specific manner (for example, whether the first spin was the first stop).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-6) The invention according to the sixth embodiment of the present invention has the following configuration in the second embodiment.
The predetermined penalty conditions are configured to be based on whether the game state is a specific bonus state or not (for example, whether it is a bonus state such as a pseudo-BIG or pseudo-REG).

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-7) The invention according to the seventh embodiment of the present invention has the following configuration in the second embodiment.
The aforementioned predetermined penalty conditions are configured to be conditions based on whether the winning hand determined by the hand determination means is a predetermined winning hand.

According to the configuration of this invention, the backup and restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially shared, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program commonality in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

(A-8-8) The invention according to the eighth embodiment of the present invention has the following configuration in the first embodiment.
A dispensing mechanism (for example, a hopper device) that dispenses game media in accordance with the progress of the game,
It comprises a settlement means (for example, a settlement button) that the player can press to initiate a settlement operation,
The aforementioned game control means is
The aforementioned game medium and game value input means (for example, a main CPU 2101 that performs a process to detect the operation of inserting a medal and placing a bet, or a process to detect the operation of placing a bet with credited medals by pressing a bet button),
A prize payout means (for example, the main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182) performs a prize payout process to dispense game media from the payout means according to the winning combination,
Based on the pressing of the settlement means, a settlement processing means (for example, a main CPU 2101 that executes the settlement execution process shown in Figure 183) performs settlement processing to dispense game media from the dispensing means,
The system includes a payout processing means that causes the payout means to perform a payout operation and processes the payout (for example, a main CPU 2101 that executes the medal payout/re-play operation process shown in Figure 182),
The aforementioned game value input means is capable of inputting game value during a first period (for example, a waiting state for a unit game to start (a period during which medals can be accepted and bets can be placed, before the start operation by the start lever)),
The prize payout means is capable of performing the prize payout process during a second period that does not overlap with the first period (for example, the period from the end of a unit game until the payout is completed).
The settlement processing means is capable of performing the settlement process when the settlement means is pressed during the first period.
The aforementioned dispensing processing means is
The payout process can be executed when the payout process is performed by the payout means and when the settlement process is performed by the settlement processing means.
The system is configured such that different parameters (for example, the addresses of the corresponding medal counters) are assigned when executing the payout process, depending on whether the payout process is performed by the payout payout means or by the settlement process means.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the strain on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-8-9) The invention according to the ninth embodiment of the present invention has the following configuration in the eighth embodiment.
When the prize payout process is performed as described above, the parameters assigned during the execution of the payout process are configured to be information relating to the address of a payout storage area (for example, a payout counter storage area) in which a value based on the number of game media dispensed according to the winning combination is stored.

With this configuration of the present invention, a common payout process is used when a prize payout process or a settlement process is performed, thus reducing the pressure on the program area capacity of the main ROM. Furthermore, the use of such a common payout process allows for a simpler program structure and description, improving the development efficiency and maintainability of the program.

(A-8-10) The invention according to the tenth embodiment of the present invention has the following configuration in the first embodiment.
The system further includes a setting switch (e.g., a key-type setting switch) for changing or checking the setting value.
The second storage means comprises a third storage means (for example, a RAM area 2203a within the usage area) for storing data directly related to the progress of the game, and a fourth storage means (for example, a RAM area 2203b outside the usage area) for storing data not directly related to the progress of the game.
The aforementioned game control means is
A range calculation means that performs calculations within a specific address range of the second storage means and stores the calculation results in a calculation result storage area (for example, a CRC circuit 2107c that performs CRC calculations in a CRC generation process (outside the usage area) called by the power interrupt processing shown in Figure 190, and a main CPU 2101 that stores the calculated CRC value in a CRC value storage area 2103e),
A range matching means (for example, the main CPU 2101 that performs a comparison of CRC values in the CRC check process (outside the used area) shown in Figure 172) performs calculations within a specific address range of the second storage means and compares the calculation result with the calculation result stored in the calculation result storage area,
The system includes an initialization means for initializing the second storage means (for example, a main CPU 2101 that performs initialization processing such as the specified RAM initialization process shown in Figure 176),
The aforementioned game control means is
The starting position of the third storage means is determined according to the state of the setting switch when the power is turned on and the matching result of the range matching means.
Based on the starting position of the third storage means determined above, the starting position of the fourth storage means is determined.
The initialization means is configured to initialize the third storage means based on the determined starting position of the third storage means, and to initialize the fourth storage means based on the determined starting position of the fourth storage means.

According to the configuration of this invention, when determining the RAM initialization range of the working area outside the usage area, the state of the gaming machine is not determined. Therefore, the program size can be reduced, and the pressure on the main ROM's program area capacity can be mitigated. Furthermore, this configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

(A-8-11) The invention according to the eleventh embodiment of the present invention has the following configuration in the first embodiment.
A start operation detection means (for example, a start lever) that detects the start operation performed by the player,
Based on the detection of a start operation by the start operation detection means, an internal winning combination determination means (main CPU 2101 that executes the internal lottery process called in the main process shown in Figure 170) determines the internal winning combination with a predetermined probability,
A variable display means that includes multiple display columns and displays a variable pattern in each display column (a main CPU 2101 that executes the reel rotation start process called in the main process shown in Figure 170),
A stop operation detection means (main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that detects a stop operation performed by the player (for example, the operation of pressing the stop button),
The system includes a stop control means (a main CPU 2101 that executes the reel stop control process called in the main process shown in Figure 170) that stops the display of the changing symbols based on the determination result of the internal winning combination determination means and the detection of a stop operation by the stop operation detection means,
The fluctuation display of the fluctuation display means includes game fluctuations (normal gameplay) that assign game value and pseudo-fluctuations (pseudo-gameplay) that do not assign game value.
The stop control means executes a control process to stop the display of the changing symbols for the sake of the game variation.
The aforementioned game control means is
A pseudo-stop control means that performs a control process to stop the display of the pattern fluctuations in the pseudo-fluctuation,
The system further includes a stop operation detection input monitoring means (for example, a main CPU 2101 that performs the stop button input monitoring process shown in Figure 206) for determining whether the detection of a stop operation by the stop operation detection means is effective,
The stop control means and the pseudo-stop control means are configured to execute the stop operation detection input monitoring means to determine whether the stop operation is valid or not (executing a common process in both normal and simulated gameplay (i.e., for example, the stop button input monitoring process shown in Figure 206)).

According to the configuration of this invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Furthermore, by sharing some of the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

According to this invention, the backup restoration process, which restores predetermined information to its pre-game state, and the backup process, which backs up the predetermined information, can be partially unified, thereby reducing the pressure on the main ROM's program area capacity. Furthermore, by promoting program unification in this way, the program's structure and description can be made simpler, improving the program's development efficiency and maintainability.

Furthermore, according to this invention, since a common payout process is used when a prize payout process or a settlement process is performed, the pressure on the program area capacity of the main ROM can be reduced. Also, by using such a common payout process, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, since the state of the gaming machine is not determined when determining the RAM initialization range of the working area outside the usage area, the program size can be reduced accordingly, thereby mitigating the pressure on the main ROM's program area capacity. In addition, the above configuration allows for a simpler structure and description of the main program, thereby improving the development efficiency and maintainability of the program.

Furthermore, according to the present invention, since some of the processing for normal gameplay and simulated gameplay is shared, the pressure on the program area capacity of the main ROM can be reduced. Also, according to the present invention, by partially sharing the processing for normal gameplay and simulated gameplay, the program structure and description can be made simpler, improving the development efficiency and maintainability of the program.

<Note A-9>
Conventionally, a pachislo machine is known that comprises: multiple reels, each with multiple symbols arranged on its circumference; multiple display windows, each corresponding to a reel, which display some of the symbols on the circumference of each reel so that the player can see them; a start switch that, provided that a medal is inserted, outputs a signal requesting the start of rotation of each reel when it detects an operation by the player (hereinafter referred to as "start operation"); a stop switch that, when it detects an operation by the player (hereinafter referred to as "stop operation"), outputs a signal requesting the stop of rotation of the reel according to the type of reel; and a control unit that controls the operation of a stepping motor based on the signals output by the start switch and the stop switch to rotate and stop each reel. Typically, in such a pachislo machine, whether or not a win is achieved is determined based on the combination of symbols displayed in the multiple display windows, and if a win is determined, medals are dispensed from the hopper and stored in the medal receiving section.

Furthermore, a gaming machine is disclosed that checks the RAM upon power-on and, if an abnormality is detected in the RAM, issues a notification prompting the user to resolve the abnormality (for example, Japanese Patent Publication No. 2006-326203).

However, with the gaming machines described above, when the hall staff turns on the machine, it immediately reports a malfunction. Therefore, even if fraudulent activity (so-called cheating) occurs, the malfunction is quickly resolved, preventing the perpetrator from using the machine and thus making it impossible to detect the fraud.

This invention has been made in view of the above-mentioned points, and aims to provide a gaming machine that allows the person who committed the fraud to start playing the game on a gaming machine that has been subjected to fraudulent activity.

Furthermore, the present invention aims to provide a gaming machine configured to reduce the size of the processing program related to checking the main RAM, thereby preventing it from overwhelming the program area of the main ROM. It also aims to simplify the structure and description of the main program by performing the calculation processing related to checking the main RAM on a CPU other than the main CPU, thereby improving the development efficiency and maintainability of the program, and further reducing the load on the main CPU.

To achieve the above objective, the present invention provides the following gaming machine.
(A-9-1) The invention according to the first embodiment of the present invention has the following configuration.
A game control means (e.g., main control board 2071) that controls the progress of the game, having an arithmetic circuit (e.g., main CPU 2101), read memory (e.g., main ROM 2102), read/write memory (e.g., main RAM 2103), and random number circuits (e.g., random number circuits 2110, random number circuits 2150) for generating random values,
It includes a setting switch (for example, a setting key type switch) provided for changing or confirming the setting value,
The aforementioned game control means is
A main processing means that performs the main processing that accompanies the progress of the game (for example, a main CPU 2101 that executes the main processing shown in Figure 170),
A periodic processing means that performs processing at regular intervals (for example, the main CPU 2101 that performs periodic interrupt processing as shown in Figure 186),
A range calculation means (for example, a main CPU 2101 that executes the CRC generation process (outside the used area) shown in Figure 191, which is called by the power interrupt process shown in Figure 190), performs calculations within a specific address range of the read/write memory (a predetermined area of the main RAM 2103), and stores the calculation results in a calculation result storage area (CRC value storage area 2103e) outside the specific address range of the read/write memory,
A range matching means (for example, a main CPU 2101 that performs a CRC check process (outside the used area) as shown in Figure 172) that performs calculations within a specific address range of the read/write memory and compares the calculation result with the calculation result stored in the calculation result storage area,
The setting value storage area where the aforementioned setting value is stored,
Error detection means for detecting errors in the game control means (for example, a main CPU 2101 that performs the CRC inspection process (outside the usage area) shown in Figure 172 and the setting value check process (outside the usage area) shown in Figure 189),
The error detection means has an error processing means (for example, a main CPU 2101 that performs the game recovery impossible error processing (outside the usage area) shown in Figure 174) when it detects an error,
When the error detection means detects an abnormality in the random number circuit, or when the setting value stored in the setting value storage area is different from a predetermined value, it sets an error (data indicating "cannot be recovered") in the error flag (for example, the game recovery impossible error flag).
The aforementioned game control means is
If a mismatch is detected by the range matching means, the error processing means is executed (for example, the game recovery impossible error processing is called in the power-on processing shown in Figure 171),
A gaming machine characterized in that, in the main processing (for example, within the internal lottery processing), if an error is set in the error flag, the error processing means (for example, calling the game recovery impossible error processing in the power-on processing shown in Figure 171) is executed.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-2) The invention according to the second embodiment of the present invention has the following configuration in the first embodiment.
The aforementioned game control means further includes a power-on means that performs a power-on process associated with power-on when the power is turned on,
The range matching means is controlled to be executed by the power-on means (for example, it is executed in the power-on processing shown in Figure 171),
The aforementioned game control means is
When the range matching means detects a matching mismatch, the main processing means is controlled to execute the error processing means before performing the main processing (for example, in the power-on processing shown in Figure 171, the game recovery impossible error processing is called in the case of a CRC abnormality).

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-3) The invention according to the third embodiment of the present invention has the following configuration in the first embodiment.
The error detection means is executed at regular intervals by the periodic processing means (for example, by the periodic interrupt processing shown in Figure 186),
The aforementioned game control means is
When an error is set in the error flag, the system is configured to control the execution of the error handling means after the player has instructed the start of the game (for example, after the player has operated the start lever) (for example, by calling the game recovery impossible error handling in the internal lottery process shown in Figure 179).

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-4) The invention according to the fourth embodiment of the present invention has the following configuration in the first embodiment.
The game control means's microprocessor (for example, microprocessor 2100) comprises the arithmetic circuit, the read memory, and the read/write memory,
The random number circuit includes a first random number circuit provided in the microprocessor and a second random number circuit located outside the microprocessor.
The error detection means is configured to set an error in the error flag when it detects an abnormality in either the first random number circuit or the second random number circuit.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-5) The invention according to the fifth embodiment of the present invention has the following configuration in the fourth embodiment.
The error detection means is configured to detect abnormalities in the first random number circuit and the second random number circuit in different ways.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-6) The invention according to the sixth embodiment of the present invention has the following configuration in the first embodiment.
The game control means further includes a power interruption means that performs a power interruption process when it detects a decrease in the power supply voltage,
The range calculation means is controlled to be executed by the power interruption means,
The game control means is configured to execute the error processing means (for example, calling the game recovery impossible error processing in the power-on processing shown in Figure 171) if it is determined that the range calculation means is not being executed, even if the range matching means has not detected a matching mismatch.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-7) The invention according to the seventh embodiment of the present invention has the following configuration in the first embodiment.
The error processing performed by the aforementioned error processing means is:
The error details are displayed on the display unit.
The system is configured to maintain a standby state that does not accept the operation to start the game.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-8) The invention according to the eighth embodiment of the present invention has the following configuration in the seventh embodiment.
In the standby state, when the power is turned on after being turned off, a predetermined operation is performed using the setting switch, which is configured to execute a process to change or confirm the setting value, and then the main process is executed.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-9) The invention according to the ninth embodiment of the present invention has the following configuration in the eighth embodiment.
In the aforementioned standby state, if a predetermined operation is not performed using the setting switch when turning the power back on after turning the power off, the device is configured to return to the standby state.

According to the configuration of this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

(A-9-10) The invention according to the tenth embodiment of the present invention has the following configuration in the fourth embodiment.
The microprocessor further includes a cyclic redundancy check circuit,
The microprocessor is configured to transmit data within the specified address range to the cyclic redundancy check circuit in order to have the cyclic redundancy check circuit perform calculations within the specified address range, and to receive the calculation results of the calculations from the cyclic redundancy check circuit.

According to this configuration of the present invention, by performing the calculation processing related to checking the main RAM on a CPU other than the main CPU, the size of the processing program related to checking the main RAM can be reduced, and the program area of the main ROM can not be compressed. Furthermore, the structure and description of the main program can be made simpler, improving the development efficiency and maintainability of the program, and further reducing the load on the main CPU.

(A-9-11) The invention according to the 11th embodiment of the present invention has the following configuration in the 10th embodiment.
The data within the specified address range transmitted to the cyclic redundancy check circuit includes data from multiple non-contiguous areas in the read/write memory.
The calculation result received from the cyclic redundancy check circuit is configured to be a single data point.

According to this configuration of the present invention, by performing the calculation processing related to checking the main RAM on a CPU other than the main CPU, the size of the processing program related to checking the main RAM can be reduced, and the program area of the main ROM can not be compressed. Furthermore, the structure and description of the main program can be made simpler, improving the development efficiency and maintainability of the program, and further reducing the load on the main CPU.

According to this invention, when fraudulent activity occurs, a game recovery error does not occur at the time the fraudulent activity is performed. Instead, the game recovery error occurs at the start of a subsequent unit of gameplay. Therefore, the person who committed the fraud mistakenly believes that their fraudulent activity was successful and starts the game machine. As a result, the person who committed the fraud can be identified immediately.

Furthermore, according to the present invention, by performing the calculation processing related to checking the main RAM on a CPU other than the main CPU, the size of the processing program related to checking the main RAM can be reduced, preventing it from putting pressure on the program area of the main ROM. In addition, the structure and description of the main program can be made simpler, improving the development efficiency and maintainability of the program, and further reducing the load on the main CPU.

1, 2001, 3001 Pachislo machine A Display unit B Irradiation unit C Screen device G Cabinet UD Upper door mechanism DD Lower door mechanism 2071 Main control board 2100 Microprocessor 2101 Main CPU
2102 Main ROM
2103 Main RAM

Claims (1)

A gaming machine that controls the progress of a game by implementing a microprocessor including a central processing unit, read memory, and read/write memory,
The central processing unit is
Main registers including extended registers, general-purpose registers, flag registers, index registers, and stack pointer,
Subregisters including extended registers, general-purpose registers, flag registers, and index registers,
Bank 0 and Bank 1 include the main register and the sub-registers,
It is configured to include control registers, which include an interrupt page address register, a memory refresh register, a program counter, an interrupt enable register 1, and an interrupt enable register 2.
The read memory comprises a first storage means that stores programs and data directly involved in the progress of the game, and a second storage means that stores programs and data not directly involved in the progress of the game.
The program stored in the second storage means includes a specific subroutine that, after being called by the program stored in the first storage means and executing a process, always returns to the calling program in the first storage means, and a normal subroutine that, after being called by the program stored in the second storage means and executing a process, always returns to the calling program in the second storage means.
The central processing unit is
When calling the aforementioned specific subroutine, execute the specific call instruction used to call the aforementioned specific subroutine,
The specific subroutine executes a specific return instruction used when returning to the program stored in the first storage means that called it, thereby controlling the return to the program stored in the first storage means.
The amount of instruction capacity stored in the first storage means differs depending on whether the specific call instruction calls a program stored before a specific address in the second storage means or a program stored at an address after the specific address.
The instruction capacity required is greater when calling a program stored at an address after the specified address than when calling a program stored at an address before the specified address.
If the program body of the specified subroutine is stored at an address after the specified address, in order to reduce the instruction capacity, the specified call instruction executes the program body of the specified subroutine via a call to a program stored at an address before the specified address.
When the aforementioned specific call command is executed, the system switches from bank 0 to bank 1.
When the aforementioned specific return command is executed, the system switches from bank 1 to bank 0.
The aforementioned specific subroutine executes processing after switching from bank 0 to bank 1.
If the program body of the specified subroutine is stored at an address after the specified address, the address before the specified address stores processing code for executing the program body of the specified subroutine.
The aforementioned specific call instruction executes the program body of the aforementioned specific subroutine by executing the processing code.
The processing code is a jump instruction for jumping to the program body of the specific subroutine.
The aforementioned specific call instruction is:
When calling a program stored at an address prior to the aforementioned specific address, this is a two-byte instruction that identifies the program using a lower address of the address where the program is stored.
A gaming machine characterized in that , when calling a program stored at an address after the aforementioned specific address, it can be configured as a 3-byte instruction .