JP7798874B2 - エラーパターン分析を使用した訂正不可能なエラーの識別 - Google Patents
エラーパターン分析を使用した訂正不可能なエラーの識別Info
- Publication number
- JP7798874B2 JP7798874B2 JP2023525013A JP2023525013A JP7798874B2 JP 7798874 B2 JP7798874 B2 JP 7798874B2 JP 2023525013 A JP2023525013 A JP 2023525013A JP 2023525013 A JP2023525013 A JP 2023525013A JP 7798874 B2 JP7798874 B2 JP 7798874B2
- Authority
- JP
- Japan
- Prior art keywords
- memory
- error
- memory cells
- corruption
- patterns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/008—Reliability or availability analysis
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/38—Response verification devices
- G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/81—Threshold
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US17/080,126 | 2020-10-26 | ||
| US17/080,126 US11507454B2 (en) | 2020-10-26 | 2020-10-26 | Identifying non-correctable errors using error pattern analysis |
| PCT/US2021/055450 WO2022093562A1 (en) | 2020-10-26 | 2021-10-18 | Identifying non-correctable errors using error pattern analysis |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2023547885A JP2023547885A (ja) | 2023-11-14 |
| JP2023547885A5 JP2023547885A5 (https=) | 2024-08-29 |
| JP7798874B2 true JP7798874B2 (ja) | 2026-01-14 |
Family
ID=78771159
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023525013A Active JP7798874B2 (ja) | 2020-10-26 | 2021-10-18 | エラーパターン分析を使用した訂正不可能なエラーの識別 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US11507454B2 (https=) |
| EP (1) | EP4232903B1 (https=) |
| JP (1) | JP7798874B2 (https=) |
| CN (1) | CN116508006B (https=) |
| WO (1) | WO2022093562A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12259777B2 (en) * | 2021-04-07 | 2025-03-25 | Intel Corporation | Uncorrectable memory error prediction |
| US12038809B1 (en) | 2023-03-06 | 2024-07-16 | SK Hynix Inc. | Failure analysis for uncorrectable error events |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090164872A1 (en) | 2007-12-21 | 2009-06-25 | Sun Microsystems, Inc. | Prediction and prevention of uncorrectable memory errors |
| JP2012118979A (ja) | 2010-12-03 | 2012-06-21 | Internatl Business Mach Corp <Ibm> | Ｎａｎｄフラッシュ・メモリにおける確率論的多層エラー訂正のためのシステム、方法、およびコンピュータ・プログラム |
| US20170123879A1 (en) | 2015-11-03 | 2017-05-04 | Silicon Graphics International Corp. | Storage error type determination |
| JP2018156712A (ja) | 2017-03-21 | 2018-10-04 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の診断方法 |
| JP2019169127A (ja) | 2018-02-06 | 2019-10-03 | インテル・コーポレーション | メモリエラーを訂正するための共有パリティチェック |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7669189B1 (en) * | 2002-06-26 | 2010-02-23 | Oracle International Corporation | Monitoring memory accesses for computer programs |
| US7168028B2 (en) * | 2002-10-31 | 2007-01-23 | Lucent Technologies Inc. | Method and apparatus for MAP decoding of binary hamming codes and related error correction codes |
| US7437651B2 (en) * | 2004-06-29 | 2008-10-14 | Hewlett-Packard Development Company, L.P. | System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem |
| US8429468B2 (en) * | 2010-01-27 | 2013-04-23 | Sandisk Technologies Inc. | System and method to correct data errors using a stored count of bit values |
| US8347154B2 (en) | 2010-09-21 | 2013-01-01 | International Business Machines Corporation | Use of hashing function to distinguish random and repeat errors in a memory system |
| US8427875B2 (en) * | 2010-12-07 | 2013-04-23 | Silicon Motion Inc. | Method and memory controller for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory |
| US8786972B2 (en) * | 2012-11-18 | 2014-07-22 | HGST Netherlands B.V. | Magnetic recording disk drive with method for recovery of data from failed data sectors |
| US8966348B2 (en) * | 2012-11-30 | 2015-02-24 | Hewlett-Packard Development Company, L.P. | Memory error identification based on corrupted symbol patterns |
| WO2015106162A1 (en) * | 2014-01-09 | 2015-07-16 | SanDisk Technologies, Inc. | Selective copyback for on die buffered non-volatile memory |
| US20160155514A1 (en) * | 2014-12-01 | 2016-06-02 | Kingtiger Technology (Canada) Inc. | System and method of testing and identifying memory devices |
| CN105843699B (zh) * | 2015-02-02 | 2019-06-04 | 国际商业机器公司 | 用于错误监视与校正的动态随机存取存储器设备与方法 |
| US9734008B2 (en) * | 2015-05-06 | 2017-08-15 | International Business Machines Corporation | Error vector readout from a memory device |
| US9733870B2 (en) | 2015-05-06 | 2017-08-15 | International Business Machines Corporation | Error vector readout from a memory device |
| KR102324769B1 (ko) * | 2015-06-29 | 2021-11-10 | 삼성전자주식회사 | 반도체 메모리 장치의 에러 정정 회로, 반도체 메모리 장치 및 이를 포함하는 메모리 시스템 |
| JP6840591B2 (ja) * | 2017-03-24 | 2021-03-10 | キオクシア株式会社 | 復号装置 |
| US10540228B2 (en) | 2018-03-07 | 2020-01-21 | Micron Technology, Inc. | Providing data of a memory system based on an adjustable error rate |
| KR102719499B1 (ko) * | 2018-10-15 | 2024-10-21 | 에스케이하이닉스 주식회사 | 에러 정정 회로, 이를 포함하는 메모리 컨트롤러 및 메모리 시스템 |
-
2020
- 2020-10-26 US US17/080,126 patent/US11507454B2/en active Active
-
2021
- 2021-10-18 WO PCT/US2021/055450 patent/WO2022093562A1/en not_active Ceased
- 2021-10-18 EP EP21814967.2A patent/EP4232903B1/en active Active
- 2021-10-18 JP JP2023525013A patent/JP7798874B2/ja active Active
- 2021-10-18 CN CN202180073304.9A patent/CN116508006B/zh active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090164872A1 (en) | 2007-12-21 | 2009-06-25 | Sun Microsystems, Inc. | Prediction and prevention of uncorrectable memory errors |
| JP2012118979A (ja) | 2010-12-03 | 2012-06-21 | Internatl Business Mach Corp <Ibm> | Ｎａｎｄフラッシュ・メモリにおける確率論的多層エラー訂正のためのシステム、方法、およびコンピュータ・プログラム |
| US20170123879A1 (en) | 2015-11-03 | 2017-05-04 | Silicon Graphics International Corp. | Storage error type determination |
| JP2018156712A (ja) | 2017-03-21 | 2018-10-04 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の診断方法 |
| JP2019169127A (ja) | 2018-02-06 | 2019-10-03 | インテル・コーポレーション | メモリエラーを訂正するための共有パリティチェック |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2022093562A1 (en) | 2022-05-05 |
| CN116508006B (zh) | 2025-02-11 |
| EP4232903B1 (en) | 2026-04-22 |
| EP4232903A1 (en) | 2023-08-30 |
| JP2023547885A (ja) | 2023-11-14 |
| US11507454B2 (en) | 2022-11-22 |
| CN116508006A (zh) | 2023-07-28 |
| US20220129347A1 (en) | 2022-04-28 |
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