JP7565348B2 - Receiver and method for controlling receiver - Google Patents

Description

This technology relates to a receiving device. More specifically, it relates to a receiving device that measures a current location and a method for controlling the receiving device.

GNSS (Global Navigation Satellite System), such as the US GPS (Global Positioning System), has been widely used in car navigation devices and smartphones to measure current positions. In recent years, GNSS has been modernized, and in addition to the conventional L1 band, satellites compatible with new GNSS standards in the L2, L5, and L6 bands have been launched one after another. Until now, high-precision positioning using signals of two or more frequencies has been limited to certain industries, such as surveying and agricultural machinery, but it is expected that it will become widespread in consumer devices in the future. Among GNSS, QZSS (Quasi-Zenith Satellite System) also distributes signals in the L2, L5, and L6 bands (L2C, L5, and L6) (see, for example, Non-Patent Document 1 and Non-Patent Document 2).

"Quasi-Zenith Satellite System Interface Specification Satellite Positioning, Navigation and Timing Service (IS-QZSS-PNT-003)", [online], Cabinet Office and Quasi-Zenith Satellite System Services Co., Ltd., Internet (https://qzss.go.jp/en/technical/download/pdf/ps-is-qzss/is-qzss-pnt-003.pdf?t=1588762566266) "Quasi-Zenith Satellite System Interface Specification Centimeter Level Augmentation Service (IS-QZSS-L6-001)", [online], Cabinet Office and Quasi-Zenith Satellite System Services Co., Ltd., Internet (https://qzss.go.jp/en/technical/download/pdf/ps-is-qzss/is-qzss-l6-001.pdf?t=1588762736567)

In the above-mentioned conventional technology, the positioning signal in the L1 band is combined with the positioning signals in the L2 and L5 bands and used for positioning calculation, thereby improving the positioning accuracy and shortening the time required for positioning. In addition, by using centimeter-level positioning augmentation information in the L6 band, it is possible to achieve centimeter-level high-precision positioning. However, in order to support multiple GNSS standards in multiple frequency bands, it is necessary to add an RF (Radio Frequency) circuit and a digital signal processing circuit, which may increase hardware costs and power consumption. In addition, since the above-mentioned system has only one receiving circuit, it is not possible to continue receiving when the receiving circuit breaks down. For this reason, when the system is operated in a harsh environment, performance such as failure resistance may be insufficient. On the other hand, if the receiving circuit is made redundant to improve failure resistance, power consumption may increase. In this way, it is difficult to improve performance while suppressing an increase in power consumption in the above-mentioned system.

This technology was developed in light of these circumstances, and aims to improve performance while suppressing increases in power consumption in receiving devices that receive signals from satellites.

The present technology has been made to solve the above-mentioned problems, and its first aspect is a receiving device that includes a master-side receiving circuit that converts a high-frequency signal having a higher frequency than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal, a master-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the signal as a master-side observation value, a slave-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the signal as a slave-side observation value, a master-side power control unit that cuts off the power supply to either the master-side receiving circuit or the master-side satellite processing unit when a predetermined condition is satisfied, and a positioning unit that generates position information based on at least one of the master-side observation value and the slave-side observation value. This provides the effect of optimizing the balance between power consumption and performance.

In addition, in this first aspect, the device may further include a slave side receiving circuit that converts the high frequency signal into the intermediate frequency signal and outputs it to the slave side satellite processing unit, and a slave side power control unit that turns on the power to the slave side receiving circuit when the predetermined condition is satisfied, and the master side power control unit controls the power of the master side receiving circuit to stop the output of the intermediate frequency signal when the predetermined condition is satisfied, and the master side receiving circuit outputs the intermediate frequency signal to the slave side satellite processing unit via the slave side receiving circuit. This provides the effect of cutting off the power supply to the slave side receiving circuit and reducing power consumption.

In addition, in this first aspect, the master side receiving circuit may output the digital intermediate frequency signal to the master side satellite processing unit and the slave side satellite processing unit. This eliminates the need for analog to digital (AD) conversion on the slave side.

In addition, in this first aspect, the master receiving circuit may output the analog intermediate frequency signal to the slave receiving circuit. This reduces the number of wiring and terminals of the interface.

In addition, in this first aspect, the master receiving circuit may further transmit a predetermined clock signal to the slave receiving circuit, and the master receiving circuit and the slave receiving circuit may further perform AD conversion processing on the intermediate frequency signal in synchronization with the clock signal. This provides the effect of eliminating the need for clock generation on the slave side.

In addition, in this first aspect, the slave-side receiving circuit may further output the intermediate frequency signal to the master-side receiving circuit. This provides the effect that the intermediate frequency signal on the slave side is also used on the slave side.

In addition, in this first aspect, the master satellite processing unit and the slave satellite processing unit may decode at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave. This provides the effect of using two wavelengths for positioning.

In addition, in this first aspect, the master satellite processing unit may decode at least one of the L1 signal and the L5 signal transmitted using the high-frequency signal as a carrier wave, and the slave satellite processing unit may decode at least one of the L1 signal, the L5 signal, and the L2 signal transmitted using the high-frequency signal as a carrier wave. This provides the effect of using three wavelengths for positioning.

In addition, in this first aspect, the master satellite processing unit may decode a master baseband signal corresponding to a predetermined frequency band, and the slave satellite processing unit may decode a slave baseband signal corresponding to a frequency band different from the predetermined frequency band. This provides the effect of enabling support for L2 signals and L6 signals.

In addition, in this first aspect, the master side digital front end converts the intermediate frequency signal to the master side baseband signal and generates a master side control signal based on the intermediate frequency signal, a slave side digital front end converts the intermediate frequency signal to the slave side baseband signal and generates a slave side control signal based on the intermediate frequency signal, and a selector selects and outputs either the master side control signal or the slave side control signal as a control signal, and the master side receiving circuit may include a mixer that converts the high frequency signal to the intermediate frequency signal, and an automatic gain controller that controls the gain for the intermediate frequency signal in accordance with the control signal. This provides the effect that the automatic gain control circuit is controlled by the master or the slave.

In addition, in this first aspect, the master satellite processing unit may decode at least one of the L1 signal and the L5 signal transmitted using the high-frequency signal as a carrier wave, and the slave satellite processing unit may decode either the L2 signal or the L6 signal transmitted using the high-frequency signal as a carrier wave. This provides the effect of making it possible to handle the L2 signal and the L6 signal.

In addition, in this first aspect, the master satellite processing unit may decode at least one of the L1 signal, L2 signal, and L5 signal transmitted using the high-frequency signal as a carrier wave, and the slave satellite processing unit may decode the L6 signal transmitted using the high-frequency signal as a carrier wave. This provides the effect of using three wavelengths for positioning.

In addition, in this first aspect, the master side receiving circuit, the master side satellite processing unit, and the master side power control unit may be provided in a predetermined master side chip, and the slave side satellite processing unit may be provided in a predetermined slave side chip. This provides the effect of exchanging intermediate frequency signals between the chips.

In addition, in this first aspect, the positioning unit may be provided in the master chip. This provides the effect of positioning being performed within the chip.

In addition, in this first aspect, the positioning unit may be provided outside the master chip and the slave chip. This provides the effect of positioning being performed outside the chip.

1 is a block diagram showing a configuration example of a receiving device according to a first embodiment of the present technology; 1 is a block diagram showing a configuration example of a GNSS chip according to a first embodiment of the present technology; 1 is a block diagram showing a configuration example of a master-side RF circuit according to a first embodiment of the present technology; 1 is a block diagram showing a configuration example of a slave-side RF circuit according to a first embodiment of the present technology; 2 is a block diagram showing a configuration example of a master-side digital signal processing unit according to the first embodiment of the present technology; FIG. 2 is a block diagram showing a configuration example of a slave-side digital signal processing unit according to the first embodiment of the present technology; FIG. 1 is a diagram illustrating an example of a state of a receiving device when switching from a master to a slave in the first embodiment of the present technology; 1 is a diagram illustrating a configuration example of a receiving device when a plurality of antennas are provided according to a first embodiment of the present technology; 4 is a flowchart showing an example of an operation of a receiving device according to the first embodiment of the present technology. FIG. 11 is a block diagram showing a configuration example of a slave-side RF circuit in a modified example of the first embodiment of the present technology. 11 is a block diagram showing a configuration example of a slave-side digital signal processing unit in a modified example of the first embodiment of the present technology. FIG. FIG. 11 is a diagram illustrating an example of a state of a slave-side RF circuit when receiving an L2 band in a modified example of the first embodiment of the present technology; 11 is a diagram illustrating an example of a state of a slave-side digital signal processing unit when receiving an L2 band in a modified example of the first embodiment of the present technology; FIG. FIG. 11 is a block diagram showing a configuration example of a GNSS chip according to a second embodiment of the present technology. 13 is a block diagram showing a configuration example of a master-side RF circuit and a switching unit according to a second embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a slave-side RF circuit and a switching unit according to a second embodiment of the present technology; FIG. FIG. 13 is a block diagram showing a configuration example of a GNSS chip according to a third embodiment of the present technology. FIG. 13 is a block diagram showing a configuration example of a master-side RF circuit according to a third embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a slave-side RF circuit according to a third embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a GNSS chip according to a fourth embodiment of the present technology. FIG. 13 is a block diagram showing a configuration example of a master-side RF circuit according to a fourth embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a slave-side RF circuit according to a fourth embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a slave-side digital signal processing unit according to a fourth embodiment of the present technology. FIG. 13 is a block diagram showing a configuration example of a GNSS chip according to a fifth embodiment of the present technology. FIG. 13 is a block diagram showing a configuration example of a master-side RF circuit according to a fifth embodiment of the present technology; FIG. 13 is a block diagram showing a configuration example of a master-side digital signal processing unit according to a fifth embodiment of the present technology. FIG. 13 is a block diagram showing a configuration example of a slave-side digital signal processing unit according to a fifth embodiment of the present technology. FIG. 23 is a block diagram showing a configuration example of a master-side RF circuit according to a sixth embodiment of the present technology; FIG. 23 is a block diagram showing a configuration example of a master-side digital signal processing unit according to a sixth embodiment of the present technology. FIG. 23 is a block diagram showing a configuration example of a slave-side digital signal processing unit according to a sixth embodiment of the present technology. FIG. 23 is a block diagram showing a configuration example of a receiving device according to a seventh embodiment of the present technology. FIG. 23 is a block diagram showing a configuration example of a master-side digital signal processing unit according to a seventh embodiment of the present technology. A diagram showing an example of a schematic configuration of an IoT system 9000 to which the technology disclosed herein can be applied.

Hereinafter, modes for carrying out the present technology (hereinafter, referred to as embodiments) will be described in the following order.
1. First embodiment (example in which a master outputs an IF signal to a slave)
2. Second embodiment (example in which a master outputs a digital IF signal to a slave)
3. Third embodiment (example in which a master outputs an IF signal and a clock signal to a slave)
4. Fourth embodiment (example of transmitting and receiving IF signals between a master and a slave)
5. Fifth embodiment (example in which a master outputs an IF signal of a band different from that of the master side to a slave)
6. Sixth embodiment (example in which a master outputs an IF signal to a slave and three frequency bands are used)
7. Seventh embodiment (example in which a master outputs an IF signal to a slave and performs positioning outside the chip)
8. Examples of applications to moving objects

1. First embodiment
[Example of positioning system configuration]
1 is an overall diagram showing a configuration example of a positioning system according to a first embodiment of the present technology. This positioning system is a system for acquiring a current position using a signal from a satellite, and includes a satellite 100 and a receiving device 200.

The receiving device 200 receives a signal from the satellite 100 and obtains the current position of the receiving device 200. The receiving device 200 includes an antenna 201, a surface acoustic wave filter 210, a crystal oscillator 220, and GNSS chips 230 and 240.

The antenna 201 receives a radio frequency (RF) signal transmitted from the satellite 100 as RFIN. This RF signal RFIN is supplied to both the GNSS chips 230 and 240 via the surface acoustic wave filter 210.

The surface acoustic wave filter 210 transmits a predetermined frequency band of the RF signal RFIN from the antenna. For example, a predetermined frequency band in GPS or QZSS (for example, the L1 band and the L5 band) is transmitted. Here, the L1 band is a frequency band with a predetermined bandwidth (such as ±12.0 MHz) with a center frequency of 1575.42 megahertz (MHz). The L5 band is a frequency band with a predetermined bandwidth (such as ±12.45 MHz) with a center frequency of 1176.45 megahertz (MHz). A signal transmitted by the satellite 100 by modulating a carrier wave in the L1 band is called an L1 signal, and a signal transmitted by the satellite 100 by modulating a carrier wave in the L5 band is called an L5 signal.

The crystal oscillator 220 generates a clock signal CLK _TCXO of a constant frequency by utilizing the piezoelectric phenomenon of a crystal. The crystal oscillator 220 supplies the generated clock signal CLK _TCXO to the GNSS chips 230 and 240.

The GNSS chip 230 generates at least one of position information, time information, and speed information based on the RF signal RFIN from the surface acoustic wave filter 210 and the satellite observation value from the GNSS chip 240. Here, the position information is information indicating the current position of the receiving device 200, and the time information is information indicating the current time. Signals from four or more satellites 100 are required to generate the position information. Furthermore, the speed information is information indicating the moving speed of the receiving device 200. The GNSS chip 230 may generate all of the position information, time information, and speed information, or may generate only a part of them (such as only the position information). Furthermore, the GNSS chip 230 converts the RF signal into an intermediate frequency (IF) signal and outputs the IF signal to the GNSS chip 240.

The GNSS chip 240 obtains satellite observation values based on the IF signal from the GNSS chip 230. Here, the satellite observation values are information obtained by decoding signals from satellites such as satellite 100, and include navigation data and correction data. The GNSS chip 240 supplies the satellite observation values to the GNSS chip 230.

In addition, the GNSS chip 230 supplies a synchronization control signal to the GNSS chip 240, causing the GNSS chip 240 to operate in synchronization with the GNSS chip 230. Therefore, in the receiving device 200, the GNSS chip 230 functions as a master that controls the slave, and the GNSS chip 240 functions as a slave.

In addition, although only one slave-side GNSS chip 240 is provided in the receiving device 200, the number of slave-side chips is not limited to one, and two or more chips can be provided as necessary.

[Example of GNSS chip configuration]
FIG. 2 is a block diagram showing an example configuration of the GNSS chips 230 and 240 according to the first embodiment of the present technology.

The GNSS chip 230 includes a master-side interface control unit 231, a master-side power supply control unit 232, a master-side RF circuit 300, a master-side digital signal processing unit 400, and serial interfaces 233 and 234. The GNSS chip 230 is an example of a master-side chip as described in the claims.

The GNSS chip 240 includes a slave-side interface control unit 241, a slave-side power control unit 242, a slave-side RF circuit 500, a slave-side digital signal processing unit 600, and a serial interface 243. The GNSS chip 240 is an example of a slave-side chip as described in the claims.

The master side interface control unit 231 controls the selector in the master side RF circuit 300. The destination of the selector will be described later.

The master side power supply control unit 232 controls the power supply of the master side RF circuit 300 and the master side digital signal processing unit 400.

The master-side RF circuit 300 operates in synchronization with a clock signal CLK _TCXO from the crystal oscillator 220, and converts the RF signal from the surface acoustic wave filter 210 into an analog IF signal AIF. The master-side RF circuit 300 outputs the IF signal AIF to the slave-side RF circuit 500. The GNSS chip 230 is provided with a terminal for outputting the IF signal AIF.

In addition, the master side RF circuit 300 performs AD conversion processing on the IF signal AIF to generate a digital IF signal DIF and output it to the master side digital signal processing unit 400.

Furthermore, the master-side RF circuit 300 generates a clock signal CLK _DSP for operating the master-side digital signal processing unit 400 from the clock signal CLK _TCXO , and outputs it to the master-side digital signal processing unit 400 .

The master-side digital signal processing unit 400 operates in synchronization with the clock signal CLK _DSP , and processes the digital IF signal DIF to generate position information and the like. This master-side digital signal processing unit 400 converts the IF signal DIF into a baseband signal, and acquires satellite observation values (navigation data, etc.) based on the baseband signal. In addition, the master-side digital signal processing unit 400 acquires satellite observation values on the slave side via the serial interface 234, and generates position information and the like using the satellite observation values on the master side and the slave side. Then, the master-side digital signal processing unit 400 outputs the position information and the like to the outside of the GNSS chip 230 via the serial interface 233.

The slave side interface control unit 241 controls the selector in the slave side RF circuit 500. The destination of the selector will be described later.

The slave side power supply control unit 242 controls the power supply of the slave side RF circuit 500 and the slave side digital signal processing unit 600.

The slave side RF circuit 500 operates in synchronization with the clock signal CLK _TCXO from the crystal oscillator 220, and converts the RF signal from the surface acoustic wave filter 210 into an analog IF signal AIF.

In addition, the slave side RF circuit 500 performs AD conversion processing on the master side or slave side IF signal AIF, generates a digital IF signal DIF, and outputs it to the slave side digital signal processing unit 600.

Furthermore, the slave-side RF circuit 500 generates a clock signal CLK _DSP for operating the slave-side digital signal processing unit 600 from the clock signal CLK _TCXO , and outputs it to the slave-side digital signal processing unit 600 .

The slave-side digital signal processor 600 operates in synchronization with the clock signal CLK _DSP and processes the digital IF signal DIF to generate satellite observation values. This slave-side digital signal processor 600 outputs the slave-side satellite observation values to the GNSS chip 230 via the serial interface 243.

The functions of the digital signal processing units on the master and slave sides can also be realized by an FPGA (Field-Programmable Gate Array) or a DSP (Digital Signal Processor). Common circuits such as processors and memories on the master and slave sides can also be provided outside the master and slave and shared between the master and slave. This also applies to other embodiments described later.

[Example of RF circuit configuration]
3 is a block diagram showing a configuration example of a master-side RF circuit 300 according to the first embodiment of the present technology. The master-side RF circuit 300 includes low-noise amplifiers 311 and 321, local phase-locked loops 312 and 322, mixers 313 and 323, low-pass filters 314 and 324, and automatic gain control circuits 315 and 325. The master-side RF circuit 300 further includes a phase-locked loop 330, a switching unit 340, and ADCs (Analog to Digital Converters) 351 and 352. The switching unit 340 includes selectors 341 and 342.

The low-noise amplifier 311 amplifies the RF signal RFIN from the surface acoustic wave filter 210. The low-noise amplifier 311 supplies the amplified RF signal RFIN to the mixer 313.

The local phase locked loop 312 generates a local signal _{LO_L1} having a local frequency corresponding to the L1 band from the clock signal _{CLK_TCXO} . The local phase locked loop 312 supplies the local signal _{LO_L1} to a mixer 313.

The mixer 313 mixes the RF signal RFIN from the low noise amplifier 311 with the local signal LO _L1 to generate an analog IF signal AIF _L1 having a lower frequency than the RF signal. The mixer 313 supplies the IF signal AIF _L1 to a low pass filter 314.

The low pass filter 314 passes frequency components of the IF signal AIF _{L 1} that are equal to or lower than a predetermined cutoff frequency, and supplies the same to an automatic gain control circuit 315 .

The automatic gain control circuit 315 controls the gain of the input IF signal AIF _L1 according to the level of the signal. The automatic gain control circuit 315 outputs the IF signal AIF _L1 at a constant level to the GNSS chip 240 and the selector 341.

The selector 341 has two input terminals and one output terminal. One of the two input terminals is connected to the automatic gain control circuit 315, and the output terminal is connected to the ADC 351. The selector 341 also switches the input destination according to the control of the master side interface control unit 231.

The phase-locked loop 330 generates, from the clock signal CLK _TCXO , a clock signal CLK _DSP and a clock signal CLK _ADC for operating the ADCs 351 and 352. The phase-locked loop 330 supplies the clock signal CLK _DSP to the master-side digital signal processing unit 400, and supplies the clock signal CLK _ADC to the ADCs 351 and 352.

The ADC 351 performs AD conversion processing on the IF signal _{AIF_L1} from the selector 341 in synchronization with the clock signal _{CLK_ADC} . The ADC 351 outputs the processed digital IF signal to the master side digital signal processing unit 400 as _{DIF_L1} .

The low noise amplifier 321 amplifies the RF signal RFIN. The low noise amplifier 321 supplies the amplified RF signal RFIN to the mixer 323.

The local phase locked loop 322 generates a local signal _{LO_L5} having a local frequency corresponding to the L5 band from the clock signal _{CLK_TCXO} . The local phase locked loop 312 supplies the local signal _{LO_L5} to a mixer 323.

The mixer 323 mixes the RF signal RFIN from the low noise amplifier 321 with the local signal _LOL5 to generate an analog IF signal AIF _L5 having a lower frequency than the RF signal. The mixer 323 supplies the IF signal AIF _L5 to a low pass filter 324.

The low pass filter 324 passes frequency components in the IF signal AIF _{L 5} that are equal to or lower than a predetermined cutoff frequency, and supplies the same to an automatic gain control circuit 325 .

The automatic gain control circuit 325 controls the gain of the input IF signal AIF _L5 according to the level of the signal. The automatic gain control circuit 325 outputs the IF signal AIF _L5 at a constant level to the GNSS chip 240 and the selector 342.

The selector 342 has two input terminals and one output terminal. One of the two input terminals is connected to the automatic gain control circuit 325, and the output terminal is connected to the ADC 352. The selector 342 also switches the input destination according to the control of the master side interface control unit 231.

The ADC 352 performs AD conversion processing on the IF signal _{AIF_L5} from the selector 342 in synchronization with the clock signal _{CLK_ADC} . The ADC 352 outputs the processed digital IF signal to the master side digital signal processing unit 400 as _{DIF_L5} .

Here, in the initial state, the master-side interface control unit 231 sets the input destinations of both selectors 341 and 342 to the automatic gain control circuits 315 and 325. Also, in the initial state, the master-side power supply control unit 232 turns on all power supplies of the master-side RF circuit 300.

When a predetermined condition is satisfied, the master-side interface control unit 231 switches the input destination of both the selectors 341 and 342. As a result, the paths between the automatic gain control circuits 315 and 325 and the ADCs 351 and 352 are opened. Furthermore, the master-side power supply control unit 232 cuts off the power supply to the master-side RF circuit 300 when a predetermined condition is satisfied. One possible predetermined condition is, for example, a failure of the master-side RF circuit 300.

Figure 4 is a block diagram showing an example of the configuration of a slave-side RF circuit 500 in the first embodiment of the present technology. The slave-side RF circuit 500 includes low-noise amplifiers 511 and 521, local phase-locked loops 512 and 522, mixers 513 and 523, low-pass filters 514 and 524, and automatic gain control circuits 515 and 525. The slave-side RF circuit 500 further includes a phase-locked loop 530, a switching unit 540, and ADCs 551 and 552. Selectors 541 and 542 are arranged in the switching unit 540.

The configuration of each circuit in the slave-side RF circuit 500 is similar to that of the circuit with the same name in the master-side RF circuit 300. However, the IF signal AIF _L1 from the GNSS chip 230 (master) is input to one of the two input terminals of the selector 541, and the other is connected to the automatic gain control circuit 515. The IF signal AIF _L5 from the master is input to one of the two input terminals of the selector 542, and the other is connected to the automatic gain control circuit 525.

In addition, in the initial state, the slave-side interface control unit 241 sets the input destination of both selectors 541 and 542 to the master side. In the initial state, the slave-side power control unit 242 cuts off the power to circuits other than the phase-locked loop 530, the switching unit 540, ADC 551, and ADC 552 in the slave-side RF circuit 500. In the figure, the grey circuits are circuits whose power has been cut off. The same applies to the subsequent figures.

When a predetermined condition is satisfied, the slave-side interface control unit 241 switches the input destination of both the selectors 541 and 542. When a predetermined condition is satisfied, the slave-side power control unit 242 turns on the power of all circuits in the slave-side RF circuit 500. One possible predetermined condition is, for example, a failure of the master-side RF circuit 300.

[Configuration example of digital signal processing unit]
5 is a block diagram showing a configuration example of the master side digital signal processing unit 400 in the first embodiment of the present technology. The master side digital signal processing unit 400 includes an L1 digital front end 410 and a predetermined number of L1 satellite processing units 420. Furthermore, the master side digital signal processing unit 400 includes an L5 digital front end 430, a predetermined number of L5 satellite processing units 440, and a positioning engine 450. A predetermined satellite is assigned to each of the L1 satellite processing units 420 as a capture target. Similarly, a predetermined satellite is assigned to each of the L5 satellite processing units 440 as a capture target. N (N is an integer) L1 satellite processing units 420 and L5 satellite processing units 440 are provided.

The L1 digital front end 410 converts the IF signal DIF _L1 into a baseband signal corresponding to the L1 band using a down converter and a digital filter. The L1 digital front end 410 supplies the baseband signal to each of the L1 satellite processing units 420.

The L1 satellite processing units 420 capture and track the assigned satellites based on the baseband signals corresponding to the L1 band, and decode the L1 signals from the satellites. The L1 satellite processing units 420 output the satellite observation values (navigation data, etc.) obtained by decoding to the positioning engine 450. Each of the L1 satellite processing units 420 includes a satellite capture unit 421 and a satellite tracking unit 422.

The satellite capture unit 421 captures the assigned satellite. For example, the satellite capture unit 421 inputs the exclusive OR of the assigned satellite's identification information (C/A code) and the input baseband signal to a correlator to obtain a correlation value. The satellite capture unit 421 outputs the carrier frequency offset and code phase that maximize the correlation value to the satellite tracking unit 422 as the capture result. Note that the satellite capture unit 421 can also integrate the correlation value for a certain period of time to increase the signal-to-noise (SN) ratio, and output the carrier frequency offset, etc., that maximizes the integral value.

The satellite tracking unit 422 tracks the captured satellite. The satellite tracking unit 422 synchronizes with the carrier and code timing using the carrier frequency offset and code phase as initial values, and further synchronizes with the physical frame of the navigation data and correction data to regenerate the satellite time. The satellite tracking unit 422 also estimates the propagation time of the satellite signal from the difference between the satellite time and the time of the receiving device, and estimates the propagation distance between the satellite 100 and the receiving device 200 as a pseudo distance by multiplying this by the speed of light. The satellite tracking unit 422 also demodulates the signal from the captured satellite to obtain navigation data and correction data. The satellite tracking unit 422 supplies these pseudo distances, navigation data, and correction data to the positioning engine 450 as satellite observation values.

The L5 digital front end 430 converts the IF signal DIF _L5 into a baseband signal corresponding to the L5 band. The L5 digital front end 430 supplies the baseband signal to each of the L5 satellite processing units 440.

The L5 satellite processing unit 440 captures and tracks the assigned satellite based on the baseband signal corresponding to the L5 band, and decodes the L5 signal from the satellite. The L5 satellite processing unit 440 outputs the satellite observation values (navigation data, etc.) obtained by decoding to the positioning engine 450.

Each of the L5 satellite processing units 440 includes a satellite capture unit 441 and a satellite tracking unit 442. These functions are similar to those of the satellite capture unit 421 and the satellite tracking unit 422.

The positioning engine 450 generates position information and the like based on the master-side satellite observation values from the L1 satellite processing unit 420 and the L5 satellite processing unit 440 and the slave-side satellite observation values obtained via the serial interface 234. In positioning, the positioning engine 450 may use only the master-side satellite observation values, or may use both the master-side and slave-side satellite observation values. In addition, in positioning, satellite observation values from both the L1 band and the L5 band are used.

In addition, in the initial state, the master-side power supply control unit 232 turns on the power supply to all circuits in the master-side digital signal processing unit 400. Then, when a predetermined condition is satisfied (such as a failure of the master-side RF circuit 300), the master-side power supply control unit 232 cuts off the power supply to each of the L1 digital front-end 410, the L1 satellite processing unit 420, the L5 digital front-end 430, and the L5 satellite processing unit 440.

Although the master-side digital signal processing unit 400 decodes both the L1 signal and the L5 signal, it can also decode only one of them (such as the L1 signal). In this case, the power supply to the digital front end and satellite processing unit corresponding to the one not being decoded is cut off by the master-side power supply control unit 232.

In addition, the master-side digital signal processing unit 400 determines positioning using signals in GPS and QZSS (L1 signals and L5 signals), but can also determine positioning using signals in GNSS other than GPS (such as Galileo and Glonass).

6 is a block diagram showing an example of the configuration of the slave-side digital signal processing unit 600 in the first embodiment of the present technology. The slave-side digital signal processing unit 600 includes an L1 digital front end 610, a predetermined number of L1 satellite processing units 620, an L5 digital front end 630, and a predetermined number of L5 satellite processing units 640. Each of the L1 satellite processing units 620 is provided with a satellite capture unit 621 and a satellite tracking unit 622, and each of the L5 satellite processing units 640 is provided with a satellite capture unit 641 and a satellite tracking unit 642. The circuit configuration of the slave-side digital signal processing unit 600 is the same as that of the master-side digital signal processing unit 400, except that the positioning engine 450 is not provided.

The L1 satellite processing unit 620 and L5 satellite processing unit 640 on the slave side acquire satellite observation values and transmit them to the master via the serial interface 243.

Figure 7 shows an example of the state of a receiving device when switching from master to slave in the first embodiment of the present technology.

As described above, in the initial state, the master RF circuit 300 down-converts the RF signal RFIN to a lower frequency IF signal. The master RF circuit 300 then outputs an analog IF signal AIF to the slave RF circuit 500, and outputs an IF signal DIF obtained by AD converting the IF signal AIF to the master digital signal processing unit 400. The master RF circuit 300 is an example of a master receiving circuit as described in the claims.

Also, in the initial state, the slave-side RF circuit 500 AD converts the IF signal AIF from the master and outputs it to the slave-side digital signal processing unit 600. In other words, the IF signal from the master is input to the slave-side digital signal processing unit 600 via the slave-side RF circuit 500. The slave-side RF circuit 500 is an example of a slave-side receiving circuit as described in the claims.

Also, in the initial state, the L1 digital front end 410 and the L5 digital front end 430 in the master side digital signal processing unit 400 convert the IF signals DIF _L1 and DIF _L5 into baseband signals. The L1 satellite processing unit 420 and the L5 satellite processing unit 440 decode the signals from the assigned satellites based on those baseband signals and obtain satellite observation values. The positioning engine 450 generates position information and the like based on at least one of the satellite observation values on the master side and the slave side. The positioning engine 450 is an example of a positioning unit described in the claims.

In the initial state, the slave-side satellite processing unit (not shown) in the slave-side digital signal processing unit 600 converts the IF signal into a baseband signal. The slave-side satellite processing unit then decodes a signal from a satellite other than the master-side based on the baseband signal to obtain satellite observation values, which are then output to the master.

As described above, in the initial state, both the master and the slave observe satellites, so if the number of satellites that can be observed by each is the same, the receiving device 200 can observe twice as many satellites as the case of only the master. The slave GNSS chip 240 can be added as necessary. Therefore, if the total number of chips in the master and the slave is M (M is an integer equal to or greater than 2), the receiving device 200 can observe M times as many satellites as the case of only the master. By using two wavelengths, the L1 band and the L5 band, and increasing the number of satellites observed by M times, it is possible to improve multipath resistance and shorten the initialization time in high precision point positioning (PPP-RTK: Precise Point Positioning-RTK). In other words, it is possible to improve the performance of the receiving device 200.

Although there is concern that the addition of the slave GNSS chip 240 will increase power consumption, the master RF circuit 300 outputs an IF signal to the slave, so the master RF circuit 300 can be shared by the master and slave. Therefore, the slave power supply control unit 242 can cut off the power supply to the low noise amplifier and mixer in the slave RF circuit 500. This makes it possible to suppress an increase in power consumption.

In this way, by adding scalable chips and controlling the power supply of the RF circuits, it is possible to optimize the balance of performance and power for each application.

When a predetermined condition is satisfied, for example when the master RF circuit 300 fails, the master interface control unit 231 switches the selector in the master RF circuit 300. The master power supply control unit 232 also cuts off the power to the master RF circuit 300 and cuts off the power to everything except the positioning engine in the master digital signal processing unit 400. This stops the output of the IF signal from the master power supply control unit 232.

In addition, when a predetermined condition is satisfied, the slave side interface control unit 241 switches the selector in the slave side RF circuit 500, and the slave side power control unit 242 powers on all circuits of the slave side RF circuit 500. Therefore, even if the master side RF circuit 300 fails, the receiving device 200 can switch to the slave side RF circuit 500 and continue positioning. This improves the failure resistance of the receiving device 200, making it possible to operate in harsher environments such as outer space. In other words, the performance of the receiving device 200 is improved. As described above, before switching to the slave side RF circuit 500, the power supply of the slave side RF circuit 500 is cut off, so that the increase in power consumption due to the redundancy of the RF circuit can be suppressed.

In the receiving device 200, one antenna 201 is shared by the master and the slave, but this configuration is not limited to this. The receiving device 200 may also be provided with multiple antennas.

Figure 8 is a diagram showing an example configuration of a receiving device 200 when multiple antennas are provided in the first embodiment of the present technology. As illustrated in the figure, an antenna 202 and a surface acoustic wave filter 211 are further added. The RF signal from the antenna 201 is input only to the master side GNSS chip 230 via the surface acoustic wave filter 210. On the other hand, the RF signal from the antenna 202 is input only to the slave side GNSS chip 240 via the surface acoustic wave filter 211.

In the configuration illustrated in the same figure, the specified conditions for switching from master to slave can be a failure on the master side as well as a decrease in the receiving sensitivity of the antenna 201 on the master side.

Alternatively, although not shown in the figure, a separate antenna can be provided for each frequency band. Each frequency band can be separated using a SAW filter to improve interference resistance. This also eliminates the loss of antenna signal splitting.

It is also possible to arrange the circuits in the receiving device 200 in two systems, provide an antenna for each system, and further arrange a direction detection unit that detects the direction in which the receiving device 200 is facing using the positioning results of each system. This makes it possible to realize a satellite compass.

[Example of operation of receiving device]
9 is a flowchart showing an example of an operation of the receiving device 200 according to the first embodiment of the present technology. This operation is started, for example, when a predetermined application that uses position information is executed in the receiving device 200.

The receiving device 200 determines whether the current time is the positioning time at which positioning should be performed (step S901). If the current time is not the positioning time (step S901: No), the receiving device 200 repeats step S901.

On the other hand, if the current time is the positioning time (step S901: Yes), the receiving device 200 captures GPS satellites (step S902) and tracks them (step S903). The receiving device 200 also performs positioning calculations using satellite observation values to obtain position information and speed information (step S904).

Then, the receiving device 200 determines whether the master RF circuit 300 has failed (step S905). If the master RF circuit 300 has failed (step S905: Yes), the receiving device 200 switches the RF circuit to be operated from the master RF circuit 300 to the slave RF circuit 500 (step S906). If the master RF circuit 300 has not failed (step S905: No), or after step S906, the receiving device 200 repeatedly executes steps S901 and onward.

In this way, in the first embodiment of the present technology, the master-side RF circuit 300 outputs an IF signal to the master side and the slave side, and after switching to the slave, the master-side power control unit 232 shuts off the master-side RF circuit 300. Also, before switching to the slave, the slave-side power management unit 242 shuts off the power supply to the slave-side RF circuit 500. By shutting off the power supply to these RF circuits, it is possible to suppress an increase in power consumption when the RF circuits are made redundant and performance (fault tolerance, etc.) is improved.

[Modification]
In the first embodiment described above, the receiving device 200 performs positioning using signals in the L1 and L5 bands, but the number of satellites and the positioning accuracy may be insufficient with only these two frequency bands. The receiving device 200 of this modified example of the first embodiment differs from the first embodiment in that it performs positioning using an L2 signal as well. Here, the L2 signal is a signal transmitted by a satellite by modulating a carrier wave in the L2 band. This L2 band is a frequency band with a predetermined bandwidth (such as ±12.0 MHz) with a center frequency of 1227.60 megahertz (MHz).

Figure 10 is a block diagram showing an example configuration of a slave-side RF circuit 500 in a modified example of the first embodiment of the present technology. The slave-side RF circuit 500 in the modified example of the first embodiment differs from the first embodiment in that it includes a local phase-locked loop 526 instead of the local phase-locked loop 522.

The local phase synchronizing circuit 526 generates one of a local signal LO _L2 having a local frequency corresponding to the L2 band of GPS and a local signal LO _L5 having a local frequency corresponding to the L5 band from the clock signal CLK _TCXO . This local phase synchronizing circuit 526 supplies one of the local signals LO _L2 and LO _L5 to the mixer 523.

Furthermore, the ADC 552 in the modification of the first embodiment outputs one of the digital IF signals DIF _L2 and DIF _L5 to the slave-side digital signal processing unit 600.

The slave side power supply control unit 242 of the modified example of the first embodiment, similar to the first embodiment, cuts off power to circuits other than the phase synchronization circuit 530, the switching unit 540, the ADC 551 and the ADC 552 in the initial state.

Figure 11 is a block diagram showing an example configuration of a slave-side digital signal processing unit 600 in a modified example of the first embodiment of the present technology. The slave-side digital signal processing unit 600 in this modified example of the first embodiment differs from the first embodiment in that it further includes an L2 digital front-end 660 and a predetermined number of L2 satellite processing units 670.

The L2 digital front end 660 converts the IF signal DIF _L2 into a baseband signal corresponding to the L2 band. The L2 digital front end 660 supplies the baseband signal to each of the L2 satellite processing units 670.

The L2 satellite processing unit 670 captures and tracks the assigned satellite based on the baseband signal corresponding to the L2 band, and decodes the L2 signal from that satellite. This L2 satellite processing unit 670 outputs the satellite observation values (navigation data, etc.) obtained by decoding to the master via the serial interface 243.

With the configuration illustrated in the same figure, the three satellite processing units on the slave side can decode at least one of the L1 signal, L2 signal, and L5 signal.

In the initial state, the slave side power control unit 242 of the modified example of the first embodiment cuts off the power to each of the L2 digital front end 660 and the L2 satellite processing unit 670. Note that a clock control unit may be provided instead of the slave side power control unit 242, and the clocks of the L2 digital front end 660 and the L2 satellite processing unit 670 may be stopped instead of cutting off the power.

In addition, in the initial state, the master-side positioning engine 450 of the modified example of the first embodiment performs positioning based on satellite observation values of, for example, the L1 and L5 bands.

FIG. 12 is a diagram showing an example of the state of the slave side RF circuit 500 when receiving the L2 band in a modified example of the first embodiment of the present technology. When the receiving device 200 receives two wavelengths in GPS or QZSS, the combination of L1 and L2 signals may have a larger number of observable satellites than the combination of L1 and L5 signals. For this reason, when the number of observable satellites does not reach a predetermined value, the receiving device 200 switches the combination of signals to be received from the L1 and L5 signals to the L1 and L2 signals. In addition, performance can be further improved by using three frequency bands of the L1, L2, and L5 signals. For this reason, when the number of satellites or positioning accuracy is insufficient, the receiving device 200 can switch from two wavelengths of the L1 and L5 signals or the L1 and L2 signals to three wavelengths of the L1, L2, and L5 signals.

When switching the received signal to the L1 signal and the L2 signal, as illustrated in the figure, the slave-side power supply control unit 242 turns on the power supplies of the low-noise amplifier 521, the local phase-locked loop 526, the mixer 523, the low-pass filter 524, and the automatic gain control circuit 525. In addition, the local phase-locked loop 526 supplies the local signal LO _L2 to the mixer 523 under the control of the slave-side digital signal processing unit 600.

13, the slave side power control unit 242 turns on the power of the L2 digital front end 660 and the L2 satellite processing unit 670, and cuts off the power of the L5 digital front end 630 and the L5 satellite processing unit 640. Note that a clock control unit may be provided instead of the slave side power control unit 242, and the clocks of the L5 digital front end 630 and the L5 satellite processing unit 640 may be stopped instead of cutting off the power.

Then, the master side positioning engine 450 performs positioning based on satellite observation values in the L1 and L2 bands.

When switching the received signal to an L1 signal, an L2 signal, or an L5 signal, the master-side power control unit 232 powers on all circuits in the GNSS chip 230, and the slave-side power control unit 242 powers on all circuits in the GNSS chip 240. The master-side positioning engine 450 then performs positioning based on satellite observation values in the L1, L2, and L5 bands.

The positioning engine can be realized by software processing using a CPU (Central Processing Unit). In this case, for example, positioning processes for the L1 band, L2 band, L5 band, etc. can be implemented as functions, and the required functions can be combined and used according to the satellite observation conditions. Also, the implementation of a frequency band switching function can be handled by expanding the functionality through a firmware update.

In addition, the receiving device 200 can receive an L1 signal and an L2 signal in an initial state, and then switch to a combination of an L1 signal and an L5 signal, or an L1 signal, an L2 signal and an L5 signal.

As described above, the slave can support three wavelengths, the L1 band, the L2 band, and the L5 band, by decoding the L1 signal, the L2 signal, and the L5 signal. This improves performance, such as the number of satellites that can be observed, compared to when only the L1 band and the L5 band are supported.

In addition, in the variant of the first embodiment, the receiving device 200 switches to the slave side RF circuit 500 when the master side RF circuit 300 fails, as in the first embodiment.

In addition, the receiving device 200 of the modified example of the first embodiment receives two or three wavelengths, but it can also receive only one of them (such as the L1 band). In this case, the power supply of the digital front end and satellite processing unit corresponding to the signal not being received is cut off.

Thus, according to a modified example of the first embodiment of the present technology, the slave decodes at least one of the L1 signal, the L2 signal, and the L5 signal, thereby improving performance compared to a case in which only the L1 band and the L5 band are supported.

2. Second embodiment
In the first embodiment described above, the master transmits an analog IF signal to the slave, and the slave performs AD conversion of the IF signal, but in this configuration, it is not possible to cut off the power supply to the ADC on the slave side. The receiving device 200 of the second embodiment differs from the first embodiment in that the master outputs a digital IF signal to the slave.

Figure 14 is a block diagram showing an example configuration of the GNSS chips 230 and 240 in the second embodiment of the present technology. The master-side GNSS chip 230 in this second embodiment differs from the first embodiment in that it further includes a switching unit 250.

In the second embodiment of the GNSS chip 230, the master side RF circuit 300 outputs a digital IF signal DIF to the switching unit 250 and the GNSS chip 240 (slave).

In addition, the slave-side GNSS chip 240 of the second embodiment differs from the first embodiment in that it further includes a switching unit 260. In the GNSS chip 240 of the second embodiment, the master-side RF circuit 300 outputs a digital IF signal DIF to the switching unit 260.

Figure 15 is a block diagram showing an example configuration of a master-side RF circuit 300 and a switching unit 250 in the second embodiment of the present technology. The master-side RF circuit 300 in the second embodiment does not include a switching unit 340.

In addition, the automatic gain control circuit 315 supplies an analog IF signal to the ADC 351, and the automatic gain control circuit 325 supplies an analog IF signal to the ADC 352.

Furthermore, selectors 251 and 252 are arranged in the switching unit 250. The ADC 351 outputs a digital IF signal DIF _L1 to the selector 251 and the GNSS chip 240. The ADC 352 outputs a digital IF signal DIF _L5 to the selector 252 and the GNSS chip 240.

The selector 251 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 351, and the output terminal is connected to the master-side digital signal processing unit 400. The selector 251 also switches the input destination according to the control of the master-side interface control unit 231.

The selector 252 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 352, and the output terminal is connected to the master-side digital signal processing unit 400. The selector 252 also switches the input destination according to the control of the master-side interface control unit 231.

If the number of bits of the IF signal DIF _L1 is K (K is an integer), then the switching unit 250 is provided with K selectors 251. Similarly, the same number of selectors 252 as the number of bits of the IF signal DIF _L5 are provided. In the figure, only the selectors 251 and 252 for one bit are shown, and the rest are omitted.

It is also possible to insert a parallel-serial converter that performs parallel-serial conversion between the ADCs 351 and 352 and the switching unit 250. This allows only one selector 251 and one selector 252 to be used, reducing the number of terminals that output IF signals. However, it is necessary to increase the operating clock compared to when parallel-serial conversion is not performed. A parallel-serial converter can also be inserted on the slave side in a similar manner.

The master can also output to the slave the digital signal after downsampling or after interference removal in the digital front end of the master-side digital signal processor 400. The number of bits of the digital signals ( _DIFL1 and DIF _L5 ) output by the ADCs 351 and 352 is set to be large in order to provide a dynamic range margin (so-called back-off) against interference. However, if it is a digital signal after interference removal, the number of bits can be reduced. Furthermore, if it is a signal after downsampling, the band can be suppressed, making parallel-serial conversion easier. Alternatively, the degree of freedom for wiring is improved.

Figure 16 is a block diagram showing an example configuration of a slave-side RF circuit 500 and a switching unit 260 in the second embodiment of the present technology. The slave-side RF circuit 500 in the second embodiment does not include a switching unit 540.

Then, the automatic gain control circuit 515 supplies an analog IF signal to the ADC 551, and the automatic gain control circuit 525 supplies an analog IF signal to the ADC 552.

Furthermore, selectors 261 and 262 are arranged in the switching unit 260. The ADC 551 outputs a digital IF signal DIF _L1 to the selector 261. The ADC 552 outputs a digital IF signal DIF _L5 to the selector 262.

The selector 261 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 551, and the other receives the IF signal DIF _L1 from the master. The output terminal is connected to the slave-side digital signal processing unit 600. The selector 261 also switches the input destination under the control of the slave-side interface control unit 241.

The selector 262 has two input terminals and one output terminal. One of the two input terminals is connected to the ADC 552, and the other receives the IF signal DIF _L5 from the master. The output terminal is connected to the slave-side digital signal processing unit 600. The selector 262 also switches the input destination under the control of the slave-side interface control unit 241.

In addition, in the initial state, the slave-side power supply control unit 242 cuts off the power supply to circuits other than the phase-locked loop 530, including the ADCs 551 and 552. In addition, when a predetermined condition is satisfied (such as when the master-side RF circuit 300 fails), the slave-side power supply control unit 242 turns on the power supply to all circuits in the slave-side RF circuit 500.

14 to 16, the master outputs a digital IF signal to the slave, so that the slave does not need to perform AD conversion of the IF signal. This allows the slave-side power supply control unit 242 to further cut off the power supplies to the ADCs 551 and 552, further reducing power consumption.

In addition, a modified example of the first embodiment can also be applied to the second embodiment.

In this way, according to the second embodiment of the present technology, the master-side GNSS chip 230 outputs a digital IF signal to the slave, so that the power supply to the slave-side ADCs 551 and 552 can be cut off. This allows the power consumption of the receiving device 200 to be reduced.

3. Third embodiment
In the first embodiment described above, the master and the slave generate the clock signals CLK _ADC and CLK _DSP , respectively, but in this configuration, it is not possible to cut off the power supply to the phase locked loop circuit on the slave side. The receiving device 200 of the third embodiment differs from the first embodiment in that the master further outputs the clock signals CLK _ADC and CLK _DSP to the slave.

Figure 17 is a block diagram showing an example configuration of the GNSS chips 230 and 240 in the third embodiment of the present technology. The master-side GNSS chip 230 in this third embodiment differs from the first embodiment in that it further includes a selector 235.

The master-side RF circuit 300 of the third embodiment further outputs clock signals CLK _ADC and CLK _DSP to the slave-side GNSS chip 240. Of these, the clock signal CLK _DSP is also output to the selector 245.

The selector 235 has two input terminals and one output terminal. One of the two input terminals is connected to the master side RF circuit 300, and the output terminal is connected to the master side digital signal processing unit 400. The selector 235 also switches the input destination according to the control of the master side interface control unit 231.

In addition, the third slave side GNSS chip 240 differs from the first embodiment in that it further includes a selector 245.

The selector 245 has two input terminals and one output terminal. One of the two input terminals is connected to the slave side RF circuit 500, and the other receives a clock signal CLK _DSP from the master. The output terminal is connected to the slave side digital signal processing unit 600. The selector 245 also switches the input destination according to the control of the slave side interface control unit 241.

Figure 18 is a block diagram showing an example configuration of a master-side RF circuit 300 in a third embodiment of the present technology. The master-side RF circuit 300 of the third embodiment differs from the first embodiment in that it further includes a selector 360.

The phase-locked loop 330 of the third embodiment outputs a clock signal CLK _DSP to the selector 235, and outputs a clock signal CLK _ADC to the selector 360 and the GNSS chip 240 on the slave side.

The selector 360 has two input terminals and one output terminal. The clock signal CLK _ADC from the phase locked loop 330 is input to one of the two input terminals. The output terminal is connected to the ADCs 351 and 352. The selector 360 also switches the input destination under the control of the master side interface control unit 231.

Figure 19 is a block diagram showing an example configuration of a slave-side RF circuit 500 in a third embodiment of the present technology. The slave-side RF circuit 500 of the third embodiment differs from the first embodiment in that it further includes a selector 560.

The phase-locked loop 530 of the third embodiment outputs a clock signal CLK _DSP to the selector 245 and outputs a clock signal CLK _ADC to the selector 560 .

The selector 560 has two input terminals and one output terminal. The clock signal CLK _ADC from the phase-locked loop 530 is input to one of the two input terminals, and the clock signal CLK _ADC from the master-side GNSS chip 230 is input to the other. The output terminals are connected to the ADCs 551 and 552. The selector 560 also switches the input destination according to the control of the slave-side interface control unit 241.

In addition, in the initial state, the slave-side power supply control unit 242 cuts off the power supply to circuits other than the switching unit 540, ADCs 551 and 552, including the phase-locked loop 530. In addition, when a predetermined condition is satisfied (such as when the master-side RF circuit 300 fails), the slave-side power supply control unit 242 turns on the power supply to all circuits in the slave-side RF circuit 500.

17 to 19, the master further outputs the clock signals CLK _ADC and CLK _DSP to the slave, so that the slave-side phase-locked loop 530 does not need to generate those clocks. This allows the slave-side power supply control unit 242 to further cut off the power supply to the phase-locked loop 530, thereby further reducing power consumption.

In addition, a modified version of the first embodiment or the second embodiment can also be applied to the third embodiment.

In this way, according to the third embodiment of the present technology, the GNSS chip 230 on the master side further outputs the clock signals CLK _ADC and CLK _DSP to the slave, so that the power supply of the phase-locked loop circuit 530 on the slave side can be cut off. This allows the power consumption of the receiving device 200 to be reduced.

4. Fourth embodiment
In the first embodiment described above, the master-side RF circuit 300 AD-converted only the master-side IF signal, but in this configuration, the slave-side IF signal cannot be used on the master side when switching from master to slave. The receiving device 200 of the fourth embodiment differs from the first embodiment in that the slave also outputs an IF signal to the master, and the master-side RF circuit 300 AD-converts the slave-side or master-side IF signal.

Figure 20 is a block diagram showing an example configuration of the GNSS chips 230 and 240 in a fourth embodiment of the present technology. The GNSS chip 240 in this fourth embodiment differs from the first embodiment in that it further includes a serial interface 244. In addition, the master-side GNSS chip 230 in the fourth embodiment outputs satellite observation values to the slave when a predetermined condition (such as a failure of the master) is satisfied.

21 is a block diagram showing a configuration example of a master-side RF circuit 300 according to a fourth embodiment of the present technology. The fourth master-side RF circuit 300 further receives analog IF signals AIF _L1 and AIF _L5 from the slave-side GNSS chip 240.

In addition, the slave side IF signal _{AIF_L1} is input to one of the two input terminals of the selector 341 in the fourth embodiment, and the IF signal _{AIF_L1} from the automatic gain control circuit 315 is input to the other terminal as in the first embodiment.

The slave side IF signal AIF _L5 is input to one of the two input terminals of the selector 342 in the fourth embodiment, and the IF signal AIF _L5 from the automatic gain control circuit 325 is input to the other terminal as in the first embodiment.

22 is a block diagram showing a configuration example of a slave-side RF circuit 500 according to a fourth embodiment of the present technology. The slave-side RF circuit 500 according to the fourth embodiment differs from the first embodiment in that automatic gain control circuits 515 and 525 output IF signals AIF _L1 and AIF _L5 to both the switching unit 540 and the master-side GNSS chip 230.

Figure 23 is a block diagram showing an example configuration of a slave-side digital signal processing unit 600 in a fourth embodiment of the present technology. The slave-side digital signal processing unit 600 of the fourth embodiment differs from the first embodiment in that it further includes a positioning engine 650.

The function of the positioning engine 650 is the same as that of the master-side positioning engine 450. However, the slave-side power control unit 242, for example, cuts off the power to the positioning engine 650 in the initial state. Then, when a predetermined condition such as a master failure is met, the slave-side power control unit 242 turns on the power to the positioning engine 650. At this time, the power to the master-side positioning engine 450 is cut off, and satellite observation values are transmitted from the master-side satellite processing unit to the slave side. The slave-side positioning engine 650 performs positioning using the satellite observation values of the master and slave, and outputs position information, etc. to the outside via the serial interface 244.

As illustrated in Figures 20 to 23, the slave outputs an IF signal to the master side RF circuit 300, so that when switching from master to slave, the slave side IF signal can also be used on the master side. This makes it possible to maintain the same number of observable satellites as before switching when switching to the slave, thereby suppressing performance degradation. Furthermore, even if the master side positioning engine fails, positioning can be continued using the slave side positioning engine. This makes it possible to realize flexible and robust failure avoidance.

In addition, a clock control unit can be provided instead of the master side power supply control unit 232 and the slave side power supply control unit 242, and the clocks of the master side and slave side circuits can be stopped instead of cutting off the power supply.

In addition, the fourth embodiment can also be applied to a modified version of the first embodiment, and to each of the second and third embodiments.

In this way, according to the fourth embodiment of the present technology, the slave outputs an IF signal to the master RF circuit 300, so that when switching from the master to the slave, the slave's IF signal can also be used on the master side. This makes it possible to maintain the number of observable satellites and suppress performance degradation when switching.

<5. Fifth embodiment>
In the first embodiment described above, the receiving device 200 receives the L1 signal and the L5 signal, but in this configuration, the L2 signal and the L6 signal cannot be used. The receiving device 200 in this fifth embodiment differs from the first embodiment in that it also supports the L2 signal and the L6 signal. Here, the L6 signal is a signal modulated from a carrier wave in the L6 band and transmitted by a satellite. This L6 band is a frequency band with a predetermined bandwidth and a center frequency of 1278.75 megahertz (MHz).

Figure 24 is a block diagram showing an example configuration of the GNSS chips 230 and 240 in the fifth embodiment of the present technology. The GNSS chip 240 of the fifth embodiment differs from the first embodiment in that it does not include a slave side RF circuit 500, but instead includes an ADC 552.

The master-side RF circuit 300 of the fifth embodiment receives the L1 signal and any one of the L2 signal, L5 signal, and L6 signal. The master-side RF circuit 300 also converts the RF signal into an analog IF signal AIF using a local signal corresponding to any one of the L2 signal and L6 signal, and outputs the analog IF signal AIF to the slave-side ADC 552. The master-side RF circuit 300 also converts the RF signal into a digital IF signal using a local signal corresponding to the L1 signal and L5 signal, and outputs the digital IF signal to the master-side digital signal processor 400. The master-side RF circuit 300 also outputs a clock signal CLK _ADC to the ADC 552.

The ADC 552 converts the IF signal from the master side to digital and outputs it to the slave side digital signal processing unit 600.

In addition, if the slave does not have an RF circuit as shown in the figure, the slave itself can be realized by an FPGA or DSP. This makes it possible to reduce development costs when adding slaves and expanding functions.

25 is a block diagram showing an example of a configuration of a master-side RF circuit 300 in a fifth embodiment of the present technology. The master-side RF circuit 300 of the fifth embodiment differs from the first embodiment in that it includes a local phase-locked loop 326 instead of the local phase-locked loop 322.

The local phase-locked loop 326 generates one of the local signals LO _L2 , LO _L5 and LO _L6 from the clock signal CLK _TCXO under the control of the master-side digital signal processor 400. LO _L6 is a local signal having a local frequency corresponding to the L6 band. The local phase-locked loop 326 supplies the generated local signal to the mixer 323.

Furthermore, the phase-locked loop 330 of the fifth embodiment outputs a clock signal CLK _ADC to the ADCs 351 and 352 and the GNSS chip 240 .

Furthermore, the automatic gain control circuit 325 of the fifth embodiment outputs an analog IF signal to the ADC 352 and the GNSS chip 240. The IF signals AIF _L2 and AIF _L6 corresponding to the local signals LO _L2 and L _OL6 are used in the slave-side GNSS chip 240. The IF signal AIF _L5 corresponding to the local signal LO _L5 is AD-converted by the master-side ADC 352.

Furthermore, the automatic gain control circuit 325 controls the gain for the IF signal in accordance with a control signal CTRL _AGC from the master side digital signal processing unit 400 .

Figure 26 is a block diagram showing an example configuration of a master-side digital signal processing unit 400 in a fifth embodiment of the present technology. The master-side digital signal processing unit 400 of the fifth embodiment differs from the first embodiment in that it further includes a selector 451.

Furthermore, the L5 digital front-end 430 of the fifth embodiment generates a master-side control signal CTRL _AGCm for controlling the automatic gain control circuit 325 based on the baseband signal. Specifically, the L5 digital front-end 430 calculates the average amplitude or average power of the IF signal AIF _L5 . When the calculated value exceeds a certain value, the L5 digital front-end 430 generates a master-side control signal CTRL _AGCm for lowering the gain by a predetermined value. On the other hand, when the calculated value falls below the certain value, the L5 digital front-end 430 generates a master-side control signal CTRL _AGCm for increasing the gain by a predetermined value and outputs it to the selector 451.

The selector 451 has two input terminals and one output terminal. A master side control signal CTRL _AGCm is input to one of the two input terminals, and a slave side control signal CTRL _AGCs from the serial interface 234 is input to the other of the two input terminals. In addition, a control signal CTRL _AGC is output from the output terminal to the master side RF circuit 300. The selector 451 switches the input destination according to the control of the master side interface control unit 231.

27 is a block diagram showing an example configuration of a slave-side digital signal processing unit 600 in a fifth embodiment of the present technology. The slave-side digital signal processing unit 600 in the fifth embodiment includes an L2/L6 digital front-end 680 and a predetermined number of L2/L6 satellite processing units 690.

The L2/L6 digital front-end 680 converts the IF signal DIF _L2 or DIF _L6 from the ADC 552 into a baseband signal and supplies it to each of the L2/L6 satellite processing units. The L2/L6 digital front-end 680 also generates a slave-side control signal CTRL _AGCs in the same manner as the master-side control signal, and outputs it to the master via the serial interface 243.

The L2/L6 satellite processing unit 690 includes a satellite capture unit 691 and a satellite tracking unit 692. This L2/L6 satellite processing unit 690 decodes one of the L2 signal and the L6 signal, and supplies the satellite observation value to the master-side GNSS chip 230 via the serial interface 243.

With the configurations illustrated in Figures 24 to 27, the receiving device 200 can receive any combination of L1 and L2 signals, L1 and L5 signals, and L1 and L6 signals, and use them to perform positioning. This allows it to flexibly support standards that use the added L2 and L6 bands while supporting the L1 and L5 bands. The receiving device 200 can also optimize the dynamic range of the IF signal in new frequency bands (such as the L2 and L6 bands). Note that if the frequency band that can be generated by the local phase-locked loop 326 of the master-side RF circuit 300 is set to any frequency including the L5 band, and the slave-side digital signal processing unit 600 is made to support new GNSS standards that will be introduced in the future, it can also flexibly support new standards in any frequency band.

When receiving the L1 signal and the L2 signal, the selector 451 selects the slave side control signal CTRL _AGCs and supplies it to the automatic gain control circuit 325. The master side RF circuit 300 generates local signals LO _L1 and LO _L2 , and generates a digital IF signal DIF _L1 and an analog IF signal AIF _L2 . The master side power supply control section 232 cuts off the power supply to the L5 digital front end 430 and the L5 satellite processing unit 440 in the master side digital signal processing section 400, and turns on the power supply to the rest. The slave side power supply control section 242 turns on the power supply to the slave side digital signal processing section 600.

Furthermore, when receiving the L1 and L5 signals, the selector 451 selects the master side control signal CTRL _AGCm and supplies it to the automatic gain control circuit 325. The master side RF circuit 300 generates local signals LO _L1 and LO _L5 , and generates digital IF signals DIF _L1 and DIF _L5 . The master side power supply control unit 232 turns on the power supply of the master side digital signal processing unit 400. The slave side power supply control unit 242 turns off the power supply of the slave side digital signal processing unit 600.

Furthermore, when receiving the L1 signal and the L6 signal, the selector 451 selects the slave side control signal CTRL _AGCs and supplies it to the automatic gain control circuit 325. The master side RF circuit 300 generates local signals LO _L1 and LO _L6 , and generates a digital IF signal DIF _L1 and an analog IF signal AIF _L6 . The master side power supply control section 232 cuts off the power supplies to the L5 digital front end 430 and the L5 satellite processing unit 440 in the master side digital signal processing section 400, and turns on the power supplies of the rest. The slave side power supply control section 242 turns on the power supply to the slave side digital signal processing section 600.

For example, in the initial state, the receiving device 200 receives the L1 signal and the L5 signal, and when a predetermined condition is satisfied, the receiving device 200 switches to a combination of the L1 signal and the L2 signal, or the L1 signal and the L6 signal. Examples of the predetermined condition include when the number of observable satellites is equal to or less than a predetermined value, or when the positioning accuracy is less than a target value.

In addition, a clock control unit can be provided instead of the master side power supply control unit 232 and the slave side power supply control unit 242, and the clocks of the master side and slave side circuits can be stopped instead of cutting off the power supply.

In addition, the receiving device 200 decodes two frequency band signals, such as the L1 signal and the L2 signal, but can also decode only one of them (such as the L1 signal). In this case, the power supply to the digital front end and satellite processing unit corresponding to the signal not being decoded is cut off.

Thus, according to the fifth embodiment of the present technology, the master decodes the L1 and L5 signals, and the slave decodes the L2 or L6 signal, so that while it is compatible with the L1 and L5 bands, it can also flexibly support the L2 and L6 bands.

6. Sixth embodiment
In the fifth embodiment described above, the receiving device 200 performs positioning using two frequency bands such as the L1 band and the L2 band, but this configuration may result in insufficient performance. The receiving device 200 of the sixth embodiment differs from the fifth embodiment in that it uses three frequency bands.

28 is a block diagram showing an example of a configuration of a master-side RF circuit 300 according to a sixth embodiment of the present technology. The master-side RF circuit 300 according to the sixth embodiment further includes a low-noise amplifier 371, a local phase-locked loop 372, a mixer 373, a low-pass filter 374, an automatic gain control circuit 375, and an ADC 353. Moreover, the master-side RF circuit 300 according to the sixth embodiment includes a local phase-locked loop 322 that generates a local signal _LOL5 , instead of the local phase-locked loop 326.

The low-noise amplifier 371 amplifies the RF signal RFIN. The low-noise amplifier 371 supplies the amplified RF signal RFIN to the mixer 373.

The local phase-locked loop 372 generates one of the local signals _{LO_L2} and _{LO_L6} from the clock signal _{CLK_TCXO} under the control of the master-side digital signal processor 400. The local phase-locked loop 372 supplies the generated local signal to a mixer 373.

The mixer 373 mixes the RF signal RFIN from the low noise amplifier 371 with the local signal (LO _L2 or LO _L6 ) to generate an analog IF signal AIF _L2 or AIF _L6 having a lower frequency than the RF signal. The mixer 373 supplies the IF signal to a low pass filter 374.

The low-pass filter 374 passes frequency components in the IF signal below a predetermined cutoff frequency and supplies them to the automatic gain control circuit 375.

The automatic gain control circuit 375 controls the gain of the input IF signal (AIF _L2 or AIF _L6 ) depending on the level of the signal. This automatic gain control circuit 315 outputs an IF signal of a constant level to the GNSS chip 240 and the ADC 353. The IF signal AIF _L2 is used on the master side, and the IF signal AIF _L6 is used on the slave side.

Furthermore, the automatic gain control circuit 375 controls the gain for the IF signal in accordance with a control signal CTRL _AGCs from the master side digital signal processor 400 .

The ADC 353 performs AD conversion of the IF signal and outputs it to the master side digital signal processing unit 400.

29 is a block diagram showing an example of the configuration of a master-side digital signal processing unit 400 in a sixth embodiment of the present technology. The master-side digital signal processing unit 400 of the sixth embodiment differs from the fifth embodiment in that it further includes an L2 digital front-end 460 and a predetermined number of L2 satellite processing units 470.

The L2 digital front end 460 converts the IF signal DIF _L2 into a baseband signal corresponding to the L2 band. The L2 digital front end 460 supplies the baseband signal to each of the L2 satellite processing units 470. The L2 digital front end 460 also generates a master side control signal CTRL _AGCm based on the baseband signal and supplies it to the selector 451.

The L2 satellite processing unit 470 acquires and tracks the assigned satellite based on the baseband signal corresponding to the L2 band, and decodes the L2 signal from that satellite. The L2 satellite processing unit 470 outputs the satellite observation values (navigation data, etc.) obtained by decoding to the positioning engine 450.

The positioning engine 450 of the sixth embodiment generates position information etc. based on satellite observation values from the L1 satellite processing unit 420, the L5 satellite processing unit 440 and the L2 satellite processing unit 470, and the satellite observation values of the L6 signal from the slave.

Figure 30 is a block diagram showing an example configuration of a slave-side digital signal processing unit 600 in a sixth embodiment of the present technology. The slave-side digital signal processing unit 600 in the sixth embodiment includes an L6 digital front-end 681 and a predetermined number of L6 satellite processing units 695.

The L6 digital front end 681 converts the IF signal DIF _L6 from the ADC 552 into a baseband signal and supplies it to each of the L6 satellite processing units 695. The L6 digital front end 681 also generates a slave side control signal CTRL _AGCs in the same manner as the master side, and outputs it to the master via the serial interface 243.

The L6 satellite processing unit 695 includes a satellite capture unit 691 and a satellite tracking unit 692. This L6 satellite processing unit 695 decodes the L2 signal and supplies the satellite observation values to the master-side GNSS chip 230 via the serial interface 243.

Although the slave side digital signal processing unit 600 decodes the L6 signal, it is not limited to this configuration and can also decode signals other than the L1, L2, L5 and L6 signals.

With the configuration illustrated in Figures 28 to 30, the receiving device 200 can receive any combination of L1 signals, L5 signals, and L2 signals, and L1 signals, L5 signals, and L6 signals, and perform positioning using them.

When receiving the L1 signal, the L5 signal, and the L2 signal, the selector 451 selects the master-side control signal CTRL _AGCm and supplies it to the automatic gain control circuit 375. The master-side power supply control unit 232 turns on the power of all circuits in the master-side digital signal processing unit 400. The slave-side power supply control unit 242 cuts off the power of the slave-side digital signal processing unit 600.

When receiving the L1 signal, the L5 signal, and the L6 signal, the selector 451 selects the slave side control signal CTRL _AGCs and supplies it to the automatic gain control circuit 375. The master side power supply control section 232 cuts off the power to the L2 digital front end 460 and the L2 satellite processing unit 470 in the master side digital signal processing section 400, and turns on the power to the rest. The slave side power supply control section 242 turns on the power to the slave side digital signal processing section 600.

Switching from a combination of L1, L5 and L2 signals to a combination of L1, L5 and L6 signals is performed when certain conditions regarding the number of satellites, positioning accuracy, etc. are met.

Note that the receiving device 200 decodes signals in three frequency bands, such as the L1 signal, the L5 signal, and the L2 signal, but can also decode only two of them (such as the L1 signal and the L5 signal) or only one of them (such as the L1 signal). In this case, the power supply to the digital front end and satellite processing unit corresponding to the signal not being decoded is cut off.

In addition, although the receiving device 200 uses signals in three frequency bands, it can also use signals in four or more frequency bands. In this case, it is sufficient to add a circuit (digital front end or satellite processing unit) corresponding to the master or slave.

As described above, by the receiving device 200 performing positioning using signals in three frequency bands, performance such as positioning accuracy can be improved compared to when only two frequency bands are used.

Thus, according to the sixth embodiment of the present technology, the receiving device 200 performs positioning using signals of three frequency bands (such as an L1 signal, an L5 signal and an L2 signal), thereby improving performance compared to the case where only two frequency bands are used.

7. Seventh embodiment
In the first embodiment described above, the positioning engine is arranged inside the GNSS chip 230 in the receiving device 200, but this configuration makes it difficult to reduce the circuit scale of the GNSS chip 230. The receiving device 200 of the seventh embodiment differs from the first embodiment in that the positioning engine is arranged outside the GNSS chip 230.

Figure 31 is a block diagram showing an example configuration of a receiving device 200 in a seventh embodiment of the present technology. The receiving device 200 of the seventh embodiment differs from the first embodiment in that it further includes a host CPU 270.

The host CPU 270 has the same functions as the positioning engine. The host CPU 270 receives a clock signal CLK _DSP and the master side satellite observation values from the GNSS chip 230, and receives the slave side satellite observation values from the GNSS chip 240.

In addition, the host CPU 270 generates a satellite control signal and a synchronization control signal for controlling the satellite processing unit and supplies them to the GNSS chips 230 and 240. The host CPU 270 is an example of a positioning unit described in the claims.

Figure 32 is a block diagram showing an example configuration of a master-side digital signal processing unit 400 in a seventh embodiment of the present technology. The master-side digital signal processing unit 400 of this seventh embodiment differs from the first embodiment in that a positioning engine 450 is not provided. In addition, the L1 satellite processing unit 420 and the L5 satellite processing unit 440 of the seventh embodiment output satellite observation values to the host CPU 270.

As illustrated in Figures 31 and 32, by placing the positioning engine outside the GNSS chip 230, the user or customer can optimize the balance of cost, performance and power for each application.

In addition, the circuit size of the GNSS chip 230 can be reduced. Furthermore, the circuits of the GNSS chips 230 and 240 can be made identical to each other, making it easier to manufacture the chips.

In addition, a modified version of the first embodiment or each of the second to sixth embodiments can be applied to the seventh embodiment.

In this way, in the seventh embodiment of the present technology, the host CPU 270 that performs positioning is disposed outside the GNSS chip 230, so there is no need to place a positioning engine within the GNSS chip 230. This makes it possible to reduce the circuit scale of the GNSS chip 230.

8. Application Examples
The technology disclosed herein can be applied to a technology called IoT (Internet of things), which is the so-called "Internet of things." IoT is a mechanism in which an IoT device 9100, which is an "object," is connected to other IoT devices 9003, the Internet, a cloud 9005, etc., and mutually controls them by exchanging information. IoT can be used in various industries, such as agriculture, housing, automobiles, manufacturing, distribution, and energy.

Figure 33 is a diagram showing an example of a schematic configuration of an IoT system 9000 to which the technology disclosed herein can be applied.

The IoT device 9001 includes various sensors such as a temperature sensor, a humidity sensor, an illuminance sensor, an acceleration sensor, a distance sensor, an image sensor, a gas sensor, and a human sensor. The IoT device 9001 may also include a terminal such as a smartphone, a mobile phone, a wearable terminal, or a game machine. The IoT device 9001 is powered by an AC power source, a DC power source, a battery, a non-contact power supply, or a so-called energy harvesting. The IoT device 9001 can communicate by wired, wireless, or close-proximity wireless communication. The communication method preferably used is 3G/LTE, WiFi, IEEE802.15.4, Bluetooth, Zigbee (registered trademark), Z-Wave, or the like. The IoT device 9001 may communicate by switching between multiple of these communication means.

The IoT devices 9001 may form one-to-one, star-shaped, tree-shaped, or mesh-shaped networks. The IoT devices 9001 may be connected to an external cloud 9005 directly or through a gateway 9002. The IoT devices 9001 are assigned addresses by IPv4, IPv6, 6LoWPAN, or the like. Data collected from the IoT devices 9001 are transmitted to other IoT devices 9003, servers 9004, clouds 9005, and the like. The timing and frequency of transmitting data from the IoT devices 9001 may be suitably adjusted, and the data may be compressed and transmitted. Such data may be used as is, or may be analyzed by a computer 9008 using various means such as statistical analysis, machine learning, data mining, cluster analysis, discriminant analysis, combinatorial analysis, and time series analysis. By using such data, various services such as control, warning, monitoring, visualization, automation, and optimization can be provided.

The technology disclosed herein can also be applied to devices and services related to the home. IoT devices 9001 in the home include washing machines, dryers, microwave ovens, dishwashers, refrigerators, ovens, rice cookers, cooking appliances, gas appliances, fire alarms, thermostats, air conditioners, televisions, recorders, audio equipment, lighting equipment, hot water heaters, water heaters, vacuum cleaners, electric fans, air purifiers, security cameras, locks, door/shutter opening/closing devices, sprinklers, toilets, thermometers, weight scales, blood pressure monitors, etc. The IoT devices 9001 may also include solar cells, fuel cells, storage batteries, gas meters, power meters, and distribution boards.

A communication method for the IoT device 9001 in the home is preferably a low-power communication method. The IoT device 9001 may communicate indoors via WiFi and outdoors via 3G/LTE. An external server 9006 for controlling the IoT device may be installed on the cloud 9005 to control the IoT device 9001. The IoT device 9001 transmits data such as the status of the home appliances, temperature, humidity, power usage, and the presence or absence of people and animals inside and outside the home. The data transmitted from the home appliances is accumulated in the external server 9006 via the cloud 9005. Based on such data, new services are provided. Such an IoT device 9001 can be controlled by voice using voice recognition technology.

In addition, by sending information directly from various household appliances to a television, the status of the various appliances can be visualized. Furthermore, various sensors can determine whether or not an occupant is present and send data to air conditioners, lights, etc., so that they can be turned on and off. Furthermore, advertisements can be displayed via the Internet on the displays attached to various household appliances.

The above describes an example of an IoT system 9000 to which the technology disclosed herein can be applied. The technology disclosed herein can be suitably applied to the IoT device 9001 among the configurations described above. Specifically, the receiving device 200 of FIG. 3 can be applied to the IoT device 9001. By applying the technology disclosed herein to the IoT device 9001, it is possible to reduce the power consumption of the IoT device while improving its performance, thereby improving the usefulness and convenience of the system.

Note that the above-described embodiment shows an example for realizing the present technology, and there is a corresponding relationship between the matters in the embodiment and the matters specifying the invention in the claims. Similarly, there is a corresponding relationship between the matters specifying the invention in the claims and the matters in the embodiment of the present technology having the same name. However, the present technology is not limited to the embodiment, and can be realized by making various modifications to the embodiment without departing from the gist of the technology.

The processing procedures described in the above embodiments may be regarded as a method having a series of these procedures, or as a program for causing a computer to execute the series of procedures or a recording medium for storing the program. For example, a CD (Compact Disc), an MD (MiniDisc), a DVD (Digital Versatile Disc), a memory card, a Blu-ray (registered trademark) Disc, etc. may be used as this recording medium.

Note that the effects described in this specification are merely examples and are not limiting, and other effects may also exist.

The present technology can also be configured as follows.
(1) a master-side receiving circuit that converts a high-frequency signal having a frequency higher than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal;
a master-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the decoded signal as a master-side observation value;
a slave-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the decoded signal as a slave-side observation value;
a master power supply control unit that cuts off the power supply of the master satellite processing unit when a predetermined condition is satisfied;
a positioning unit that generates position information based on at least one of the master-side observed value and the slave-side observed value.
(2) a slave side receiving circuit that converts the high frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal to the slave side satellite processing unit;
a slave-side power supply control unit that turns on the power supply to the slave-side receiving circuit when the predetermined condition is satisfied,
the master-side power supply control unit controls a power supply of the master-side receiving circuit to stop output of the intermediate frequency signal when the predetermined condition is satisfied;
The receiving device according to (1), wherein the master receiving circuit outputs the intermediate frequency signal to the slave satellite processing unit via the slave receiving circuit.
(3) The receiving device according to (2), wherein the master side receiving circuit outputs the digital intermediate frequency signal to the master side satellite processing unit and the slave side satellite processing unit.
(4) The receiving device according to (2), wherein the master receiving circuit outputs the intermediate frequency signal which is analog to the slave receiving circuit.
(5) the master receiving circuit further transmits a predetermined clock signal to the slave receiving circuit;
The receiving device according to any one of (2) to (4), wherein the master receiving circuit and the slave receiving circuit further perform an AD (Analog to Digital) conversion process on the intermediate frequency signal in synchronization with the clock signal.
(6) The receiving device according to any one of (2) to (5), wherein the slave receiving circuit further outputs the intermediate frequency signal to the master receiving circuit.
(7) A receiving device described in any of (2) to (6), in which the master satellite processing unit and the slave satellite processing unit decode at least one of the L1 signal and the L5 signal transmitted using the high-frequency signal as a carrier wave.
(8) The master satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave,
The receiving device according to any one of (2) to (6), wherein the slave satellite processing unit decodes at least one of the L1 signal, the L5 signal, and the L2 signal transmitted using the high-frequency signal as a carrier wave.
(9) The master satellite processing unit decodes a master baseband signal corresponding to a predetermined frequency band;
The receiving device according to (1), wherein the slave-side satellite processing unit decodes a slave-side baseband signal corresponding to a frequency band different from the frequency band.
(10) a master-side digital front end that converts the intermediate frequency signal into the master-side baseband signal and generates a master-side control signal based on the intermediate frequency signal;
a slave-side digital front end that converts the intermediate frequency signal into the slave-side baseband signal and generates a slave-side control signal based on the intermediate frequency signal;
a selector for selecting either the master side control signal or the slave side control signal and outputting the selected control signal as a control signal;
The master side receiving circuit includes:
a mixer for converting the high frequency signal to the intermediate frequency signal;
The receiving device according to (9), further comprising an automatic gain controller for controlling a gain for the intermediate frequency signal in accordance with the control signal.
(11) The master satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave,
The receiving device according to (9) or (10), wherein the slave satellite processing unit decodes either an L2 signal or an L6 signal transmitted using the high frequency signal as a carrier wave.
(12) The master satellite processing unit decodes at least one of the L1 signal, the L2 signal, and the L5 signal transmitted using the high frequency signal as a carrier wave;
The receiving device according to (9) or (10), wherein the slave satellite processing unit decodes an L6 signal transmitted using the high-frequency signal as a carrier wave.
(13) The master-side receiving circuit, the master-side satellite processing unit, and the master-side power supply control unit are provided in a predetermined master-side chip,
The receiving device according to any one of (1) to (12), wherein the slave-side satellite processing unit is provided in a predetermined slave-side chip.
(14) The receiving device according to (13), wherein the positioning unit is provided in the master side chip.
(15) The receiving device according to (13), wherein the positioning unit is provided outside the master chip and the slave chip.
(16) a master side receiving procedure for converting a high frequency signal having a frequency higher than a predetermined intermediate frequency signal into the intermediate frequency signal and outputting the intermediate frequency signal to the master side satellite processing unit and the slave side satellite processing unit;
a master-side satellite processing procedure in which a master-side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the signal as a master-side observation value;
a slave-side digital signal processing procedure in which a slave-side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the signal as a slave-side observation value;
a master-side power control procedure for cutting off the power supply of the master-side satellite processing unit when a predetermined condition is satisfied;
and a positioning procedure for generating position information based on at least one of the master-side observed value and the slave-side observed value.

100 Satellite 200 Receiving device 201, 202 Antenna 210, 211 Surface acoustic wave filter 220 Crystal oscillator 230, 240 GNSS chip 231 Master side interface control unit 232 Master side power supply control unit 233, 234, 243, 244 Serial interface 235, 245, 251, 252, 261, 262, 341, 342, 360, 451, 541, 542, 560 Selector 241 Slave side interface control unit 242 Slave side power supply control unit 250, 260, 340, 540 Switching unit 270 Host CPU
300 Master side RF circuit 311, 321, 371, 511, 521 Low noise amplifier 312, 322, 326, 372, 512, 522, 526 Local phase locked loop 313, 323, 373, 513, 523 Mixer 314, 324, 374, 514, 524 Low pass filter 315, 325, 375, 515, 525 Automatic gain control circuit 330, 530 Phase locked loop 351 to 353, 551, 552 ADC
400 Master side digital signal processing unit 410, 610 L1 digital front end 420, 620 L1 satellite processing unit 421, 441, 621, 641, 691 Satellite capture unit 422, 442, 622, 642, 692 Satellite tracking unit 430, 630 L5 digital front end 440, 640 L5 satellite processing unit 450, 650 Positioning engine 460, 660 L2 digital front end 470, 670 L2 satellite processing unit 500 Slave side RF circuit 600 Slave side digital signal processing unit 680 L2/L6 digital front end 681 L6 digital front end 690 L2/L6 satellite processing unit 695 L6 satellite processing unit 9001 IoT device

Claims (11)

a master side receiving circuit that converts a high frequency signal having a frequency higher than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal;
a master-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the decoded signal as a master-side observation value;
a slave-side satellite processing unit that decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the decoded signal as a slave-side observation value;
a master power supply control unit that cuts off the power supply of either the master receiving circuit or the master satellite processing unit when a predetermined condition is satisfied;
a positioning unit that generates position information based on at least one of the master-side observation value and the slave-side observation value ,
The master satellite processing unit decodes a master baseband signal corresponding to a predetermined frequency band;
the slave-side satellite processing unit decodes a slave-side baseband signal corresponding to a frequency band different from the frequency band;
a master-side digital front end that converts the intermediate frequency signal into the master-side baseband signal and generates a master-side control signal based on the intermediate frequency signal;
a slave-side digital front end that converts the intermediate frequency signal into the slave-side baseband signal and generates a slave-side control signal based on the intermediate frequency signal;
a selector that selects either the master side control signal or the slave side control signal and outputs it as a control signal;
Further comprising:
The master side receiving circuit includes:
a mixer for converting the high frequency signal to the intermediate frequency signal;
an automatic gain controller for controlling a gain for the intermediate frequency signal in accordance with the control signal;
Equipped
Receiving device. a slave side receiving circuit that converts the high frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal to the slave side satellite processing unit;
a slave-side power supply control unit that turns on the power supply to the slave-side receiving circuit when the predetermined condition is satisfied,
the master-side power supply control unit controls a power supply of the master-side receiving circuit to stop output of the intermediate frequency signal when the predetermined condition is satisfied,
2. The receiving device according to claim 1, wherein the master receiving circuit outputs the intermediate frequency signal to the slave satellite processing unit via the slave receiving circuit. 3. The receiving device according to claim 2, wherein the master receiving circuit outputs the digital intermediate frequency signal to the master satellite processing unit and the slave satellite processing unit. 3. The receiving device according to claim 2, wherein the master receiving circuit outputs the intermediate frequency signal in analog form to the slave receiving circuit. the master receiving circuit further transmits a predetermined clock signal to the slave receiving circuit;
3. The receiving device according to claim 2, wherein the master receiving circuit and the slave receiving circuit further perform an AD (Analog to Digital) conversion process on the intermediate frequency signal in synchronization with the clock signal. The master satellite processing unit decodes at least one of the L1 signal and the L5 signal transmitted using the high frequency signal as a carrier wave,
2. The receiving device according to claim 1 , wherein the slave satellite processing unit decodes either an L2 signal or an L6 signal transmitted using the high frequency signal as a carrier wave. The master satellite processing unit decodes at least one of the L1 signal, the L2 signal, and the L5 signal transmitted using the high frequency signal as a carrier wave,
2. The receiving device according to claim 1 , wherein the slave satellite processing unit decodes an L6 signal transmitted using the high frequency signal as a carrier wave. the master-side receiving circuit, the master-side satellite processing unit, and the master-side power supply control unit are provided in a predetermined master-side chip,
2. The receiving device according to claim 1, wherein the slave-side satellite processing unit is provided in a predetermined slave-side chip. The receiving device according to claim 8 , wherein the positioning unit is provided in the master chip. The receiving device according to claim 8 , wherein the positioning unit is provided outside the master chip and the slave chip. a master side receiving procedure in which a master side receiving circuit converts a high frequency signal having a frequency higher than a predetermined intermediate frequency signal into the intermediate frequency signal and outputs the intermediate frequency signal to the master side satellite processing unit and the slave side satellite processing unit;
a master-side satellite processing procedure in which the master- side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the decoded signal as a master-side observation value;
a slave-side satellite processing procedure in which the slave-side satellite processing unit decodes a signal from a predetermined satellite based on the intermediate frequency signal and outputs the signal as a slave-side observation value;
a master-side power supply control procedure for cutting off power to either the master-side receiving circuit or the master-side satellite processing unit when a predetermined condition is satisfied;
a positioning procedure for generating position information based on at least one of the master-side observation value and the slave-side observation value ,
In the master satellite processing procedure, a master baseband signal corresponding to a predetermined frequency band is decoded;
In the slave-side satellite processing procedure, a slave-side baseband signal corresponding to a frequency band different from the frequency band is decoded;
a master-side control signal generating step in which a master-side digital front end converts the intermediate frequency signal to the master-side baseband signal and generates a master-side control signal based on the intermediate frequency signal;
a slave-side control signal generating step in which a slave-side digital front end converts the intermediate frequency signal to the slave-side baseband signal and generates a slave-side control signal based on the intermediate frequency signal;
a selection step in which a selector selects either the master side control signal or the slave side control signal and outputs it as a control signal;
Further comprising:
The master side receiving procedure includes:
a mixing step in which a mixer converts said high frequency signal to said intermediate frequency signal;
an automatic gain control procedure in which an automatic gain controller controls a gain for the intermediate frequency signal in accordance with the control signal;
Equipped
A method for controlling a receiving device.

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