JP7547037B2 - Method for depositing molybdenum metal films on dielectric surfaces of substrates by a cyclic deposition process and related semiconductor device structures - Patents.com - Google Patents

Description

CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to the following: U.S. Non-provisional Patent Application No. 15/691,241, entitled "Layer Forming Method," filed August 30, 2017; U.S. Provisional Patent Application No. 62/607,070, entitled "Layer Forming Method," filed December 18, 2017; and U.S. Provisional Patent Application No. 62/619,579, entitled "Deposition Method," filed January 19, 2018.

The present disclosure generally relates to methods for depositing a molybdenum metal film onto a dielectric surface of a substrate, and to specific methods for depositing a nucleation film directly onto a dielectric surface and depositing a molybdenum metal film directly onto the nucleation film. The present disclosure also generally relates to semiconductor device structures comprising a molybdenum metal film disposed directly onto a nucleation film disposed directly on a surface of a dielectric material.

Semiconductor device manufacturing processes at advanced technology nodes typically require cutting-edge deposition methods to form metal films, such as, for example, tungsten metal films and copper metal films.

A common requirement for the deposition of metal films is that the deposition process be highly conformal. For example, conformal deposition is often required to uniformly deposit metal films over three-dimensional structures that contain high aspect ratio features. Another common requirement for the deposition of metal films is that the deposition process be capable of depositing continuous ultra-thin films over large substrate areas. In the specific case where the metal film is conductive, the deposition process may need to be optimized to produce a low electrical resistivity film.

Low electrical resistivity metal films commonly utilized in advanced semiconductor device applications may include tungsten (W) and/or copper (Cu). However, tungsten and copper metal films generally require a thick barrier layer disposed between the metal film and the dielectric material. A thick barrier layer may be utilized to prevent diffusion of metal species into the underlying dielectric material, thereby improving device reliability and device yield. However, thick barrier layers generally exhibit high electrical resistivity, thus resulting in an increase in the overall electrical resistivity of the semiconductor device structure.

Cyclic deposition processes, such as atomic layer deposition (ALD) and cyclic chemical vapor deposition (CCVD), sequentially introduce one or more precursors (reactants) into a reaction chamber where the precursors react sequentially, one at a time, with the surface of a substrate. Cyclic deposition processes have been demonstrated to produce metal films with excellent conformality with atomic-level thickness control.

Therefore, methods and associated device structures for depositing and utilizing low electrical resistivity metal films deposited on dielectric materials by a conformal cyclic deposition process are desired.

This Summary is provided to introduce a selection of concepts in a simplified form. These concepts are described in more detail below in the Detailed Description of the Disclosure. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

In some embodiments, a method is provided for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process. The method may include providing a substrate having a dielectric surface in a reaction chamber, depositing a nucleation film directly on the dielectric surface, and depositing a molybdenum metal film directly on the nucleation film, where depositing the molybdenum metal film includes contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor and contacting the substrate with a second gas phase reactant comprising a reducing agent precursor.

In some embodiments, a semiconductor device structure is provided. The semiconductor device structure may include a substrate having a dielectric surface, a nucleation film disposed directly on the dielectric surface, and a molybdenum metal film disposed directly on the nucleation film.

Certain objects and advantages of the present invention have been described herein above for purposes of summarizing the invention and the advantages achieved over the prior art. Of course, it should be understood that not necessarily all such objects or advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught or suggested herein, without necessarily achieving other objects or advantages that may be taught or suggested herein.

All of these embodiments are intended to be within the scope of the invention disclosed herein. These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of several embodiments with reference to the accompanying drawings, and the invention is not limited to any particular embodiment disclosed.

While this specification concludes with claims particularly pointing out and distinctly claiming what are regarded as embodiments of the present disclosure, the advantages of the disclosed embodiments may be more readily apparent from the following description of certain illustrative embodiments of the present disclosure when read in conjunction with the accompanying drawings.

FIG. 1 is a non-limiting exemplary process flow illustrating a method for depositing a nucleation film directly onto a dielectric surface, followed by depositing a molybdenum metal film directly onto the nucleation film, according to an embodiment of the present disclosure.

FIG. 2 is a non-limiting exemplary process flow illustrating a cyclic deposition process for depositing a nucleation film directly on a dielectric surface according to an embodiment of the present disclosure.

FIG. 3 is a non-limiting exemplary process flow illustrating a cyclic deposition process for depositing a molybdenum metal film directly onto a nucleation film according to an embodiment of the present disclosure.

4A, 4B, and 4C are cross-sectional schematic diagrams of semiconductor device structures formed during a process of depositing a nucleation film directly on a dielectric surface with vertical gap features, followed by depositing a molybdenum metal film directly on the nucleation film, in accordance with an embodiment of the present disclosure.

5A, 5B, and 5C are cross-sectional schematic diagrams of semiconductor device structures formed during a process of depositing a nucleation film directly on a dielectric surface with horizontal gap features, followed by depositing a molybdenum metal film directly on the nucleation film, in accordance with an embodiment of the present disclosure.

6 illustrates the rms surface roughness (R a ) of molybdenum metal films deposited directly on a dielectric surface and using an intermediate nucleation film on a dielectric surface according to an embodiment of the present _disclosure .

Although several embodiments and examples are disclosed below, it will be understood by those skilled in the art that the present invention extends beyond the specifically disclosed embodiments and/or applications of the present invention, as well as obvious modifications and equivalents thereof. Therefore, it is not intended that the scope of the disclosed invention should be limited by the specifically disclosed embodiments described below.

The figures shown herein are not meant to be actual illustrations of any particular materials, structures or devices, but merely idealized representations used to describe embodiments of the present disclosure.

As used herein, the term "substrate" may refer to any underlying material or materials that may be used or upon which a device, circuit or film may be formed.

As used herein, the term "cyclic deposition" refers to the sequential introduction of one or more precursors (reactants) into a reaction chamber to deposit a film on a substrate, and includes deposition techniques such as atomic layer deposition and cyclic chemical vapor deposition.

As used herein, the term "cyclic chemical vapor deposition" can refer to any process in which a substrate is sequentially exposed to one or more volatile precursors that react and/or decompose on the substrate to produce a desired deposit.

The term "atomic layer deposition" (ALD) as used herein may refer to a vapor deposition process in which a deposition cycle, preferably multiple consecutive deposition cycles, are performed in a reaction chamber. Typically, during each cycle, a precursor chemisorbs to the deposition surface (e.g., the surface of a substrate or a previously deposited underlayer, such as a material deposited using a previous ALD cycle) and forms a monolayer or submonolayer that does not readily react with additional precursors (i.e., a self-limiting reaction). If necessary, a reactant (e.g., another precursor or reactant gas) can then be introduced into the process chamber for use in converting the chemisorbed precursor to the desired material on the deposition surface. Typically, this reactant can further react with the precursor. Additionally, a purge step can be utilized during each cycle to remove excess precursor from the process chamber after conversion of the chemisorbed precursor and/or to remove excess reactants and/or reaction by-products from the process chamber. Additionally, the term "atomic layer deposition" as used herein is also meant to include processes indicated by related terms, such as "chemical vapor deposition atomic layer deposition," "atomic layer epitaxy" (ALE), molecular beam epitaxy (MBE), gas source MBE, or metalorganic MBE, as well as chemical beam epitaxy when performed with alternating pulses of precursor compositions, reactive gases, and purge (e.g., inert carrier) gases.

As used herein, the terms "film" and "thin film" are intended to mean any continuous or non-continuous structures and materials formed by the methods disclosed herein. "Films" and "thin films" can include, for example, 2D materials, nanolaminates, nanorods, nanotubes, or nanoparticles, or planar partial or complete molecular layers, or partial or complete atomic layers, or clusters of atoms and/or molecules. "Films" and "thin films" can include materials or layers that have pinholes, yet are at least partially continuous.

As used herein, the term "compound material" can refer to a material in which two or more different elements are chemically bonded.

As used herein, the term "binary compound material" can refer to a material that is essentially composed of two different elements. It should be noted that while the term "binary compound material" can refer to a material that is essentially composed of two different elements, a binary compound material may also contain trace amounts of impurity elements.

As used herein, the term "silicon binary compound material" can refer to a material that consists essentially of silicon atoms and another distinct element. It is noted that while the term "silicon binary compound material" can refer to a material that consists essentially of silicon atoms and another distinct element, silicon binary compound materials may also contain trace amounts of impurity elements.

As used herein, the term "molybdenum binary compound material" can refer to a material that consists essentially of molybdenum atoms and another distinct element. It is noted that, although the term "molybdenum binary compound material" can refer to a material that consists essentially of molybdenum atoms and another distinct element, molybdenum binary compound materials may also contain trace amounts of impurity elements.

As used herein, the term "molybdenum halide precursor" refers to a reactant that includes at least a molybdenum component and a halide component, where the halide component may include one or more of a chlorine component, an iodine component, or a bromine component.

As used herein, the term "molybdenum chalcogenide halide" refers to a reactant that includes at least a molybdenum component, a halide component, and a chalcogenide component, where the chalcogens are elements from Group IV of the periodic table, which includes oxygen (O), sulfur (S), selenium, and tellurium (Te).

As used herein, the term "molybdenum oxyhalide" may refer to a reactant that includes at least a molybdenum component, an oxygen component, and a halide component.

As used herein, the term "reductant precursor" may refer to a reactant that donates electrons to another species in a redox chemical reaction.

As used herein, the term "crystalline film" refers to a film that exhibits at least short-range order, or even long-range order, of the crystal structure, and includes monocrystalline films as well as polycrystalline films.

As used herein, the term "gap feature" may refer to an opening or recess disposed between two surfaces of a non-planar surface. The term "gap feature" may refer to an opening or recess disposed between the sloping sidewalls of two protrusions extending vertically from a substrate surface, or the opposing sloping sidewalls of an indentation extending vertically into the surface of a substrate surface, such a gap feature may be referred to as a "vertical gap feature." The term "gap feature" may also refer to an opening or recess disposed between two opposing substantially horizontal surfaces, such that the horizontal surfaces connect the horizontal openings or recesses, such a gap feature may be referred to as a "horizontal gap feature."

As used herein, the term "seam" can refer to a line or void(s) formed by the abutment of edges formed in the gap-fill metal, and a "seam" can be identified using scanning transmission electron microscopy (STEM) or transmission electron microscopy (TEM), where a "seam" is present when observation reveals a distinct vertical line or void(s) in vertical gap-fill metal, or a distinct horizontal line or void(s) in horizontal gap-fill metal.

It should be noted that many exemplary materials are provided throughout the embodiments of this disclosure, and the chemical formulas provided for each of the exemplary materials should not be construed as limiting, nor should the non-limiting exemplary materials provided be limited by any exemplary stoichiometry.

The present disclosure includes a method for depositing a molybdenum metal film on a surface of a dielectric material utilizing an intermediate nucleation film disposed directly on the surface of the dielectric material. The molybdenum metal thin film may be utilized in many applications, such as, for example, low electrical resistivity gap fill, liner layers for 3D-NAND, DRAM wordline features, or interconnect materials for CMOS logic. The ability to deposit a molybdenum metal film on a dielectric surface utilizing an intermediate nucleation film, i.e., without the use of a high electrical resistance liner layer, allows for lower effective electrical resistance for logic applications, i.e., CMOS structures, and wordlines/bitlines for memory applications, e.g., interconnects in 3D-NAND and DRAM structures.

Accordingly, embodiments of the present disclosure include a method of depositing a molybdenum metal film on a dielectric surface of a substrate utilizing an intermediate nucleation film. The method can include providing a substrate having a dielectric surface to a reaction chamber, depositing a nucleation film directly on the dielectric surface, and depositing a molybdenum metal film directly on the nucleation film, where depositing the molybdenum metal film includes contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor and contacting the substrate with a second gas phase reactant comprising a reducing agent precursor.

An exemplary process 100 for depositing a molybdenum metal film on a dielectric surface utilizing an intermediate nucleation film is illustrated with reference to FIG. 1. The exemplary process 100 can include two deposition processes, a first deposition process for depositing a nucleation film directly on the surface of a dielectric material, and a second deposition process for depositing a molybdenum metal film directly on the nucleation film.

In more detail and with reference to FIG. 1, the exemplary process 100 can begin with process block 110, which includes providing a substrate having a dielectric surface into a reaction chamber.

In some embodiments of the present disclosure, the substrate may comprise a patterned substrate comprising high aspect ratio features, such as trench structures, horizontal gaps, and/or fin structures. For example, the substrate may include one or more substantially vertical gap features and/or one or more substantially horizontal gap features. The term "gap feature" may refer to an opening or recess disposed between the sloping sidewalls of two protrusions extending vertically from the substrate surface, or the opposing sloping sidewalls of an indentation extending vertically into the surface of the substrate surface, such a gap feature may be referred to as a "vertical gap feature." The term "gap feature" may also refer to an opening or recess disposed between two opposing substantially horizontal surfaces, where a horizontal surface connects the horizontal opening or recess, such a gap feature may be referred to as a "horizontal gap feature." It should be noted that embodiments of the present disclosure are not limited to filling vertical and/or horizontal gap features, and other geometries of gaps disposed in and/or on the substrate may be filled with molybdenum metal by the processes disclosed herein.

In some embodiments of the present disclosure, the substrate can include one or more substantially vertical gap features, as illustrated in FIG. 4A, which shows a semiconductor device structure 400 including a substrate 402 including a dielectric material having a high aspect ratio vertical gap feature 404 disposed within the substrate 402. In some embodiments, the vertical gap feature or features can have an aspect ratio (height:width) of greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or greater than 100:1, with "greater" as used in this example meaning a greater distance in the height of the gap feature.

In embodiments of the present disclosure, the substrate may include one or more substantially horizontal gap features, as illustrated in FIG. 5A, which shows a dielectric device structure 500 including a substrate 502 including a dielectric material having a high aspect ratio horizontal gap feature 504 disposed within the substrate 502. In some embodiments, the horizontal gap feature or features may have an aspect ratio (height:width) of greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or greater than 1:100, with "greater" as used in this example meaning a greater distance in the width of the gap feature.

The substrate may include one or more materials and material surfaces, including, but not limited to, semiconductor materials, dielectric materials, and metallic materials.

In some embodiments, the semiconductor material may include silicon (Si), germanium (Ge), germanium tin (GeSn), silicon germanium (SiGe), silicon germanium tin (SiGeSn), silicon (SiGeSn), silicon carbide (SiC), or a III-V semiconductor material.

In some embodiments, the substrate may include metallic materials such as, for example, but not limited to, pure metals, metal nitrides, metal carbides, metal borides, and mixtures thereof.

In some embodiments, the substrate may include a dielectric material such as, for example, but not limited to, silicon, including dielectric materials and metal oxide dielectric materials. In some embodiments, the substrate may include one or more dielectric surfaces including, for example, but not limited to, silicon dioxide (SiO ₂ ), silicon suboxide, silicon nitride (Si ₃ N ₄ ), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon oxycarbide nitride (SiOCN), silicon carbonitride (SiC), etc. In some embodiments, the substrate may include one or more dielectric surfaces including, for example, but not limited to, metal oxides such as, for example, aluminum oxide ((Al ₂ O ₃ ), hafnium oxide (HfO ₂ ), tantalum oxide (Ta ₂ O ₅ ), zirconium oxide (ZrO) ₂ ), titanium oxide (TiO ₂ ), hafnium silicate (HfSiO _x ), and lanthanum oxide (La) ₂ O ₃ ).

In some embodiments of the present disclosure, the substrate may comprise an engineered substrate, with a surface semiconductor layer disposed on a bulk support with an intervening buried oxide (BOX) disposed therebetween.

A patterned substrate may comprise a substrate that may include semiconductor device structures formed in or on the substrate surface, for example, a patterned substrate may comprise fabricated and/or partially fabricated semiconductor device structures, such as transistors and/or memory elements. In some embodiments, the substrate may include one or more secondary surfaces that may include single crystal surfaces and/or non-single crystal surfaces, such as polycrystalline surfaces and/or amorphous surfaces. Single crystal surfaces may include, for example, one or more of silicon (Si), silicon germanium (SiGe), germanium tin (gESn), or germanium (Ge). Polycrystalline or amorphous surfaces may include dielectric materials, such as oxides, oxynitrides, oxycarbides, oxycarbide nitrides, nitrides, or mixtures thereof.

The substrate may be placed in one or more reaction chambers configured to deposit a nucleation film directly on the surface of the dielectric material and to deposit a molybdenum metal film directly on the nucleation film. In some embodiments, the nucleation film may be deposited directly on the dielectric surface by one or more of a chemical vapor deposition (CVD) process, a dip process, a plasma-enhanced chemical vapor deposition (PECVD) process, or a physical vapor deposition (PVD) process. In certain embodiments of the present disclosure, both the nucleation film and the molybdenum film may be deposited using a cyclic deposition process due to the inherent conformality achievable using the cyclic deposition process and the ability of the cyclic deposition process to form conformal films on non-planar substrates with one or more high aspect ratio features, including but not limited to vertical gap features and/or horizontal gap features.

Thus, a reactor or reaction chamber that can be used to deposit a molybdenum metal film onto a dielectric surface utilizing an intermediate nucleation film can be configured to perform a cyclic deposition process, such as an atomic layer deposition process or a cyclic chemical vapor deposition process. Thus, a reactor or reaction chamber suitable for performing embodiments of the present disclosure can include ALD reactors and CVD reactors configured to provide precursors. According to some embodiments, a showerhead reactor can be used. According to some embodiments, a cross-flow, batch, mini-batch, or space ALD reactor can be used.

In some embodiments of the present disclosure, a batch reactor may be used. In some embodiments, a vertical batch reactor may be used. In other embodiments, the batch reactor comprises a mini-batch reactor configured to accommodate 10 or fewer wafers, 8 or fewer wafers, 6 or fewer wafers, 4 or fewer wafers, or 2 or fewer wafers. In some embodiments where a batch reactor is used, the wafer-to-wafer non-uniformity is less than 3% (1 sigma), less than 2%, less than 1% or even less than 0.5%.

The exemplary process described herein for depositing a molybdenum metal film fill utilizing an intermediate nucleation film may be carried out in a reactor or reaction chamber that is optionally coupled to a cluster tool. In a cluster tool, the temperature of the reaction chambers in each module can be kept constant since each reaction chamber is dedicated to one type of process, improving throughput compared to reactors that heat the substrate to a process temperature before each run. Additionally, in a cluster tool, it is possible to reduce the time to evacuate the reaction chamber to the desired process pressure level between substrates. In some embodiments of the present disclosure, the exemplary process disclosed herein may be carried out in a cluster tool that includes multiple reaction chambers, each individual reaction chamber may be used to expose the substrate to an individual precursor gas, and the substrate may be transported between different reaction chambers to be exposed to multiple precursor gases, with the transport of the substrate being carried out under a controlled ambient environment to avoid oxidation/contamination of the substrate. For example, the nucleation film may be deposited by a cyclic deposition process in a first reaction chamber associated with a cluster tool, and the molybdenum film may be deposited by a cyclic deposition process in a second reaction chamber associated with the same cluster tool, with transfer between the first and second reaction chambers occurring in a controlled environment to prevent contamination or degradation of the substrate and associated film. In some embodiments of the present disclosure, the processes of the present disclosure may be performed in a cluster tool comprising multiple reaction chambers, and each individual reaction chamber may be configured to heat the substrate to a different temperature.

In some embodiments, the exemplary process of depositing a nucleation film directly onto a dielectric surface and depositing a molybdenum metal film directly onto the nucleation film can be carried out in a single stand-alone reactor, which may also include a load lock, without the need to cool the reaction chamber between runs.

Once the substrate is deposited in a suitable reaction chamber, e.g., a reaction chamber configured for a cyclic deposition process, the exemplary process 100 of FIG. 1 can be performed by process block 120, which includes depositing a nucleation film directly on a dielectric surface. Process block 120 and its constituent sub-processes are described in more detail with reference to FIG. 2, which illustrates an exemplary, non-limiting cyclic deposition process for depositing a nucleation film directly on a dielectric surface.

More specifically, the deposition process to deposit the nucleation film directly on the dielectric surface can be performed by sub-process 210, which includes heating the substrate to a desired deposition temperature. For example, the substrate can be heated to a substrate temperature of less than about 800° C., or less than about 700° C., or less than about 600° C., or less than about 500° C., or less than about 400° C., or less than about 300° C., or less than about 200° C. In some embodiments of the present disclosure, the substrate temperature during the cyclic deposition process of process block 120 can be between 250° C. and 800° C., or between 300° C. and 600° C., or between 550° C. and 600° C.

In some embodiments, the deposition temperature for depositing the nucleation film may depend on the composition of the material being deposited. For example, in some embodiments of the present disclosure, the nucleation film may comprise a compound material, i.e., a material that includes at least two different elements. In some embodiments, the compound material may comprise a binary compound material, i.e., a material that consists essentially of two different elements and a trace impurity element. In some embodiments, the compound may comprise a ternary compound material, i.e., a material that consists essentially of three different elements and a trace impurity element.

In some embodiments, the binary compound material may include a silicon binary compound material, which is essentially composed of different elements with silicon atoms and trace amounts of impurity elements. For example, in some embodiments, the silicon binary compound material may include at least one of silicon nitride (e.g., _Si3N4 ), silicon carbide (e.g., SiC), or silicon oxide (e.g., _SiO2 ). In such exemplary embodiments, the temperature of the substrate during deposition of the nucleation layer comprising the silicon binary compound material may be less than about 500 _° C, or less than about 400°C, or less than about 300°C, or less than about 250°C, or even less than about 200°C.

In some embodiments, the binary compound material may include a molybdenum binary compound material, which consists essentially of different elements with molybdenum atoms and trace amounts of impurity elements. For example, in some embodiments, the molybdenum binary compound material may include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide. In such exemplary embodiments, the temperature of the substrate during deposition of the nucleation film including the molybdenum binary compound material may be less than about 700° C., or less than about 600° C., or less than about 500° C., or less than about 400° C., or even less than about 300° C. In some embodiments, deposition of the nucleation film including the molybdenum binary compound material may be performed at a substrate temperature between 300° C. and 600° C., or between 400° C. and 500° C.

In some embodiments of the present disclosure, the nucleation film can include a ternary compound, such as a silicon ternary compound (e.g., SiCN, SiON), or a molybdenum ternary compound (e.g., MoON, MoSiO). In such embodiments, the substrate temperature during deposition of the ternary compound can be less than about 700°C, or less than about 600°C, or less than about 500°C, or less than about 400°C, or even less than about 300°C.

Furthermore, to achieve a desired deposition temperature, i.e., a desired substrate temperature, the exemplary atomic layer deposition process (i.e., process block 120) that deposits a nucleation film directly on a dielectric surface can also adjust the pressure in the reaction chamber during deposition to obtain the desired properties of the nucleation film directly on the dielectric surface. For example, in some embodiments of the present disclosure, the exemplary cyclic deposition process can be performed in a reaction chamber that is adjusted to a reaction chamber pressure of less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or less than 15 Torr, or even less than 1 Torr. In some embodiments, the pressure in the reaction chamber during deposition of the nucleation film can be adjusted at a pressure between 1 Torr and 300 Torr, or between 1 Torr and 50 Torr, or between 1 Torr and 15 Torr, or even 30 Torr or more.

Once the substrate has been heated to a desired temperature and the pressure in the reaction chamber has been controlled to a desired level, the exemplary process of depositing a nucleation film directly onto a dielectric surface can continue with a cyclic deposition phase 205, which can include atomic layer deposition (ALD) or cyclic chemical vapor deposition (CCVD).

A non-limiting example embodiment of a cyclic deposition process includes atomic layer deposition (ALD), which is based on a typical self-limiting reaction whereby sequential and alternating pulses of reactants are used to deposit approximately one atomic (or molecular) monolayer of material per deposition cycle. Deposition conditions and precursors are typically selected to provide a self-saturating reaction such that an adsorbed layer of one reactant leaves a surface termination unreactive with the gas phase reactant of the same reactant. The substrate is then contacted with a different reactant that reacts with the previous termination, allowing for successive depositions. Thus, each cycle of alternating pulses typically leaves approximately one monolayer or less of the desired material. However, as noted above, one skilled in the art will recognize that more than one monolayer of material can be deposited in one or more ALD cycles, for example, if several gas phase reactions occur despite the alternating nature of the process.

In an ALD-type process utilized to form a nucleation film directly on a dielectric surface, one unit of deposition cycle may include exposing the substrate to a first gas-phase reactant, removing any unreacted first reactant and reaction by-products from the reaction chamber, and exposing the substrate to a second gas-phase reactant, followed by a second removal step. In some embodiments of the present disclosure, the first gas-phase reactant may include at least one of a first silicon precursor or a molybdenum precursor, and the second gas-phase reactant may include at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

The precursors can be separated by an inert gas, e.g., argon (Ar) or nitrogen ( _N2 ), to prevent gas-phase reactions between the reactants and to allow self-saturating surface reactions. However, in some embodiments, the substrate can be moved to contact the first and second gas-phase reactants separately. Since the reaction is self-saturating, strict temperature control of the substrate and precise dosage control of the precursors may not be necessary. However, the substrate temperature is preferably such that the incident gas species do not condense into a monolayer and do not decompose on the surface. Before contacting the substrate with the next reactive chemical, excess chemicals and reaction by-products, if any, are removed from the substrate surface, e.g., by purging the reaction space or by moving the substrate. Undesired gas molecules can be effectively evacuated from the reaction space using an inert purge gas. A vacuum pump can be used to facilitate purging.

According to some non-limiting embodiments of the present disclosure, ALD processes can be used to deposit nucleation films directly onto dielectric material surfaces. In some embodiments of the present disclosure, each ALD cycle can include two separate deposition steps or stages. In a first stage of the deposition cycle, the substrate surface on which deposition is desired can be contacted with a first gas-phase reactant comprising at least one of a first silicon precursor or a molybdenum precursor that chemisorbs onto the substrate surface to form about a monolayer or less of reactant species on the substrate surface. In a second stage of the deposition, the substrate surface on which deposition is desired can be contacted with a second gas-phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

Upon heating the substrate to a desired deposition temperature and adjusting the pressure in the reaction chamber, the exemplary atomic layer deposition process 120 can continue with the cyclical deposition phase 205 by process block 220, which includes contacting the substrate with a first gas phase reactant, particularly, in some embodiments, contacting the substrate with a first gas phase reactant comprising at least one of a first silicon precursor or a molybdenum halide precursor.

In some embodiments, the nucleation film may include a silicon binary compound, and in such embodiments the first vapor phase reactant may include a first silicon precursor. In some embodiments, the first silicon precursor may include _at least one of N,N,N',N-tetraethyl silanediamine ( _C8H22N2Si ), BTBAS (bis( _{tertiarybutylamino} )silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexakis(ethylamino ₎ disilane ( _Si2 ( _NHC2H5 ) ₆ ), silicon tetraiodide ( _SiI4 ), silicon tetrachloride ( _SiCl4 ), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, the first silicon precursor comprises a silane, such as silane (SiH ₄ ), disilane (Si ₂ H ₆ ), trisilane (Si ₃ H ₈ ), tetrasilane (Si ₄ H ₁₀ ), or higher silanes of the general formula Si _x H _(2x+2) .

In some embodiments, the nucleation film may include a molybdenum binary compound, and in such embodiments, the first gas phase reactant may include a molybdenum halide precursor. In some embodiments, the molybdenum halide precursor may include a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, as a non-limiting example, the first gas phase reactant may include a molybdenum chloride, such as, for example, molybdenum pentachloride (MoCl ₅ ).

In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in certain embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In certain embodiments of the present disclosure, the molybdenum precursor may include a molybdenum oxychloride, including, but not limited to, molybdenum ( _VI ) dichloride dioxide ( _MoO2Cl2 ).

In some embodiments of the present disclosure, contacting the substrate with a first gas phase reactant comprising at least a first silicon precursor or a molybdenum precursor can include contacting the substrate with the first gas phase reactant for about 0.1 seconds to about 60 seconds, about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 5.0 seconds. Further, during contacting the substrate with the first gas phase reactant, the flow rate of the precursor can be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. Further, during contacting the substrate with the first gas phase reactant, the flow rate of the precursor can range from about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

As illustrated by process block 120 in FIG. 2, an exemplary atomic layer deposition process for depositing a nucleation film directly on a dielectric surface can be continued by purging the reaction chamber. For example, excess first gas phase reactant and reaction by-products, if any, can be removed from the surface of the substrate, for example, by pumping in an inert gas. In some embodiments of the present disclosure, the purge process can include a purge cycle, in which the substrate surface is purged for a time period less than about 5.0 seconds, or less than about 3.0 seconds, or even less than about 2.0 seconds. For example, excess first gas phase reactant, e.g., excess first silicon precursor or molybdenum precursor, and any possible reaction by-products can be removed using a vacuum generated by a pump system in fluid communication with the reaction chamber.

Upon purging the reaction chamber with the purge cycle, the exemplary atomic layer deposition process block 120 can continue with a second stage of the cyclical deposition phase 205 by process block 230, which includes contacting the substrate with a second gas phase reactant, in particular, contacting the substrate with a second gas phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor.

In some embodiments of the present disclosure, the nucleation film may comprise a silicon binary compound material, which in certain embodiments comprises silicon _nitride (e.g., _Si3N4 ). In such embodiments, the first gas-phase reactant may comprise a first silicon precursor and the second gas-phase reactant may comprise a nitrogen precursor.

In some embodiments of the present disclosure, the nucleation film may comprise a silicon binary compound material, which in certain embodiments comprises silicon oxide (e.g., _SiO2 ). In such embodiments, the first gas-phase reactant may comprise a first silicon precursor and the second gas-phase reactant may comprise an oxygen precursor.

In some embodiments of the present disclosure, the nucleation film may include a silicon binary compound material, which in certain embodiments includes silicon carbide (e.g., SiC). In such embodiments, the first gas phase reactant may include a first silicon precursor and the second gas phase reactant may include a carbon precursor.

In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in certain embodiments, molybdenum nitride. In such embodiments, the first gas phase reactant may include a molybdenum precursor and the second gas phase reactant may include a nitrogen precursor.

In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in certain embodiments, a molybdenum oxide. In such embodiments, the first gas phase reactant may include a molybdenum precursor and the second gas phase reactant may include an oxygen precursor.

In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, which in certain embodiments includes molybdenum silicide. In such embodiments, the first gas phase reactant may include a molybdenum precursor and the second gas phase reactant may include a second silicon precursor.

In some embodiments of the present disclosure, the nucleation film may include a molybdenum binary compound material, and in certain embodiments, a molybdenum carbide material. In such embodiments, the first gas phase reactant may include a molybdenum precursor and the second gas phase reactant may include a carbon precursor.

In embodiments in which the nucleation film comprises a nitride, such as silicon nitride or molybdenum nitride, _the second gas phase reactant may comprise a nitrogen precursor. In such embodiments of the present disclosure, the nitrogen precursor may comprise _at least one _of ammonia ( _NH3 ), hydrazine ( _N2H4 ), _triazane ( _N3H5 ), tert _- butylhydrazine ( _C4H9N2H3 ), methylhydrazine ( _CH3NHNH2 ), _{dimethylhydrazine} (( _CH3 ) _2N2H2 ), or nitrogen plasma _, which comprises atomic nitrogen, nitrogen radicals, and excited _nitrogen species.

In embodiments where the nucleation film comprises an oxide, such as silicon oxide or molybdenum oxide, the second gas phase reactant can comprise an oxygen precursor. In such embodiments of the present disclosure, the oxygen precursor comprises at least one of water ( _H2O ), hydrogen peroxide ( _H2O2 ), ozone ( _O3 ), or nitrogen oxides, such as nitric _oxide (NO), nitrous oxide ( _N2O ), or nitrogen dioxide ( _NO2 ). In some embodiments of the present disclosure, the oxygen precursor can comprise an organic alcohol, such as isopropyl alcohol. In some embodiments, the oxygen precursor can comprise an oxygen plasma, which comprises atomic oxygen, oxygen radicals, and excited oxygen species.

In embodiments in which the nucleation film comprises a carbide, such as silicon carbide or molybdenum carbide, the second gas phase reactant may comprise a carbon precursor. In such embodiments of the present disclosure, the carbon precursor may comprise a hydrocarbon, such as a linear or branched alkane.

In embodiments in which the nucleation film comprises a silicide, such as molybdenum silicide, the second vapor-phase reactant can comprise a second silicon precursor. In some embodiments of the present disclosure, the second silicon precursor comprises at least one of N,N,N',N _- tetraethyl silanediamine ( _C8H22N2Si ), BTBAS (bis( _{tertiarybutylamino} )silane), BDEAS (bis(diethylamino)silane), TDMAS (tris(dimethylamino)silane), hexakis _{(ethylamino)disilane (Si2(NHC2H5)6 ) , silicon} tetraiodide ( _SiI4 ), silicon tetrachloride ( _SiCl4 ), hexachlorodisilane (HCDS), or pentachlorodisilane (PCDS). In some embodiments, _the second silicon precursor comprises a _silane , such as silane ( _SiH4 ), disilane ( _Si2H6 ), trisilane ( _Si3H8 ), tetrasilane ( _Si4H10 ), or higher silanes of the general formula _{SixH (2x+2) .}

In some embodiments of the present disclosure, contacting the substrate with the second gas phase reactant can include contacting the substrate with the precursor for between about 0.01 seconds and about 120 seconds, between about 0.05 seconds and about 60 seconds, or between about 0.1 seconds and about 10 seconds. Additionally, during contacting of the substrate with the second gas phase reactant, the flow rate of the second gas phase reactant can be less than 10,000 sccm, or less than 5,000X sccm, or even less than 1,000X.

Upon contacting the substrate with a second gas phase reactant comprising at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor, the exemplary process block 120 of depositing a nucleation film directly onto a dielectric surface can proceed by purging the reaction chamber. For example, excess second gas phase reactant and (if any) reaction by-products can be removed from the substrate surface, e.g., by pumping, while flowing an inert gas. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 3 seconds, or even about 1 second to 2 seconds.

Upon completion of purging the reaction chamber of the second gas phase reactant and any reaction by-products, the cyclical deposition phase 205 of the exemplary atomic layer deposition of process block 120 can continue with a decision gate 240, which depends on the thickness of the deposited nucleation film. For example, if the nucleation film is deposited with an insufficient thickness for a desired device application, the cyclical deposition phase 205 can be repeated by returning to process block 220 to continue with an additional deposition cycle, where a unit of deposition cycle can include contacting the substrate with at least a first silicon precursor or a molybdenum halide precursor (process block 220), purging the reaction chamber, contacting the substrate with at least one of a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor (process block 230), and purging the reaction chamber again. A unit of deposition cycle of the cyclical deposition phase 205 may be repeated one or more times until a desired thickness of the nucleation film is deposited directly on the substrate and particularly on the dielectric surface. Once the nucleation film has been deposited to a desired thickness, the exemplary atomic layer deposition process 120 is terminated by process block 250, and the substrate with the dielectric surface having the nucleation film deposited thereon can be subjected to further processing of the exemplary process 100 of FIG.

It will be appreciated that in some embodiments of the present disclosure, the order of contacting the substrate with the first gas phase reactant (e.g., a first silicon precursor or a molybdenum precursor) and the second gas phase reactant (e.g., a nitrogen precursor, a carbon precursor, an oxygen precursor, or a second silicon precursor) can be such that the substrate is first contacted with the second gas phase reactant followed by contact with the first gas phase reactant. Further, in some embodiments, the cyclical deposition phase 205 of the exemplary process block 120 may include contacting the substrate with the first gas phase reactant one or more times before contacting the substrate with the second gas phase reactant one or more times. Further, in some embodiments, the cyclical deposition phase 205 of the exemplary process block 120 may include contacting the substrate with the second gas phase reactant one or more times before contacting the substrate with the first gas phase reactant one or more times.

In some embodiments, the cyclic deposition process can be a hybrid ALD/CVD or cyclic CVD process. For example, in some embodiments, the growth rate of an ALD process may be low compared to a CVD process. One approach to increasing the growth rate is to operate at a higher substrate temperature than typically used in an ALD process, resulting in part of a chemical vapor deposition process, but also utilizing sequential introduction of precursors, such a process may be referred to as cyclic CVD. In some embodiments, the cyclic CVD process may include the introduction of two or more precursors into the reaction chamber, with periods of overlap between the two or more precursors in the reaction chamber resulting in both the ALD component of the deposition and the CVD component of the deposition. For example, a cyclic CVD process may include a continuous flow of one precursor and periodic pulses of a second precursor into the reaction chamber.

In some embodiments of the present disclosure, the nucleation film can be deposited directly onto the dielectric surface at a growth rate of about 0.05 Å/cycle to about 5 Å/cycle, about 0.1 Å/cycle to about 5 Å/cycle, or even about 0.5 Å/cycle to about 1.5 Å/cycle.

In some embodiments of the present disclosure, the nucleation film is deposited as a continuous film. See, for example, semiconductor device structure 405 with a continuous nucleation film 406 disposed directly on a dielectric substrate 402 with vertical gap features 404, as illustrated in FIG. 4B. Alternatively, see, for example, semiconductor device structure 505 with a continuous nucleation film 506 disposed directly on a dielectric substrate 502 with horizontal gap features, as illustrated in FIG. 5B. In some embodiments, the continuous nucleation film 406/506 may be deposited to a thickness of less than 20 Å, or less than 10 Å, or less than 5 Å, or even less than 3 Å.

In some embodiments of the present disclosure, the nucleation film is deposited as a discontinuous film. See, for example, inset 408 of semiconductor device structure 405 including an example of a discontinuous nucleation film 406' disposed directly on a dielectric substrate 402 with vertical gap features 404, as illustrated in FIG. 4B. Alternatively, see, for example, inset 508 of semiconductor device structure 505 including an example of a discontinuous nucleation film 506' disposed directly on a dielectric substrate 502 with horizontal gap features, as illustrated in FIG. 5. In some embodiments, the discontinuous nucleation film 406'/506' may be deposited to a thickness of less than 20 Å, or less than 10 Å, or less than 5 Å, or even less than 3 Å.

In some embodiments, the step coverage of the nucleation film over one or more dielectric gap features can be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

It should also be noted that the nucleation films of the present disclosure do not constitute barrier layers or barrier materials as are typically used in semiconductor device applications to prevent diffusion of metal species into the underlying dielectric material, and that the barrier layers are disposed between the metal contacts and the dielectric material. The nucleation films of the present disclosure are utilized to improve the material quality of the subsequently deposited molybdenum metal film, and do not constitute thick film, high resistivity barrier layers or barrier materials utilized in typical semiconductor device manufacturing processes.

Having deposited a nucleation film directly on the dielectric surface, the exemplary process 100 (of FIG. 1) can continue with process block 130, which includes depositing a molybdenum metal film directly on the nucleation film, and in some particular embodiments, depositing a molybdenum metal film directly on the nucleation film by a cyclic deposition process. Process block 130 and associated constituent sub-process blocks are described in further detail with reference to FIG. 3, which illustrates an exemplary cyclic deposition process for depositing a molybdenum metal film.

More specifically, the exemplary cyclic deposition process may include an atomic layer deposition process or a cyclic chemical vapor deposition process. As a non-limiting example, the process block 130 may include an atomic layer deposition process and may begin with a sub-process block 310 that includes heating the substrate to a desired deposition temperature. For example, the substrate may be heated to a substrate temperature of less than about 800°C, or less than about 700°C, or less than about 600°C, or less than about 550°C, or less than about 500°C, or less than about 400°C, or less than about 300°C, or even less than about 200°C. In some embodiments of the present disclosure, the substrate temperature during the exemplary atomic layer deposition process block 130 may be between 200°C and 800°C, or between 300°C and 700°C, or between 400°C and 600°C, or between 500°C and 550°C.

Furthermore, to achieve the desired deposition temperature, i.e., the desired substrate temperature, the exemplary atomic layer deposition process 130 can also adjust the pressure in the reaction chamber during deposition to obtain the desired characteristics of the deposited molybdenum metal film. For example, in some embodiments of the present disclosure, the exemplary atomic layer deposition process 130 can be performed in a reaction chamber that is adjusted to a reaction chamber pressure of less than 300 Torr, or less than 200 Torr, or less than 100 Torr, or less than 50 Torr, or less than 25 Torr, or even less than 10 Torr. In some embodiments, the pressure in the reaction chamber during deposition can be adjusted to a pressure between 10 Torr and 300 Torr, or between 30 Torr and 80 Torr, or even 30 Torr or more.

Upon heating the substrate to the desired deposition temperature and adjusting the pressure within the reaction chamber, the exemplary atomic layer deposition process 130 can continue with the cyclical deposition phase 305 by process block 320, which includes contacting the substrate with a first gas phase reactant, and in particular, in some embodiments, contacting the substrate with a first gas phase reactant that includes a molybdenum halide precursor, i.e., a molybdenum precursor.

In some embodiments of the present disclosure, the molybdenum halide precursor may include a molybdenum chloride precursor, a molybdenum iodide precursor, or a molybdenum bromide precursor. For example, as a non-limiting example, the first gas phase reactant may include a molybdenum chloride, such as, for example, molybdenum pentachloride (MoCl ₅ ).

In some embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide, and in certain embodiments, the molybdenum halide precursor may include a molybdenum chalcogenide halide. For example, the molybdenum chalcogenide halide precursor may include a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. In certain embodiments of the present disclosure, the molybdenum precursor may include a molybdenum oxychloride, including, but not limited to, molybdenum ( _VI ) dichloride dioxide ( _MoO2Cl2 ).

In some embodiments of the present disclosure, contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor may include contacting the molybdenum halide precursor with the substrate for about 0.1 seconds to about 60 seconds, about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 5.0 seconds. Further, during contacting the substrate with the molybdenum halide precursor, the flow rate of the molybdenum halide precursor may be less than 1000 sccm, or less than 500 sccm, or less than 100 sccm, or less than 10 sccm, or even less than 1 sccm. Further, during contacting the substrate with the molybdenum halide precursor, the flow rate of the molybdenum precursor may range from about 1 to 2000 sccm, about 5 to 1000 sccm, or about 10 to about 500 sccm.

The exemplary atomic layer deposition process 130 for depositing a molybdenum metal film directly on a nucleation film, exemplified by process block 130 in FIG. 3, can continue by purging the reaction chamber. For example, excess first gas phase reactant and reaction by-products, if any, can be removed from the surface of the substrate, for example, by pumping in an inert gas. In some embodiments of the present disclosure, the purge process can include a purge cycle, in which the substrate surface is purged for a time period less than about 5.0 seconds, or less than about 3.0 seconds, or even less than about 2.0 seconds. For example, excess first gas phase reactant, such as excess molybdenum precursor and possible reaction by-products, can be removed using a vacuum generated by a pumping system in fluid communication with the reaction chamber.

Once the reaction chamber has been purged with a purge cycle, the exemplary atomic layer deposition process block 130 can continue with a second stage of the cyclical deposition phase 305 by process block 330, which includes contacting the substrate with a second gas phase reactant, in particular contacting the substrate with a second gas phase reactant that includes a reducing agent precursor ("reducing precursor").

In some embodiments of the present disclosure, the reducing agent precursor may include at least one of forming gas ( _H2 + _N2 ), ammonia ( _NH3 ), hydrazine ( _N2H4 ), alkyl-hydrazine (e.g., _{tertiary butyl} hydrazine ( _C4H12N2 ), molecular hydrogen ( _H2 ), atomic hydrogen ( _H ), hydrogen plasma, hydrogen radicals, hydrogen excited species, alcohols, aldehydes, carboxylic acids _, boranes, or amines. In further embodiments, the reducing agent precursor may include at least one of silane ( _SiH4 ), disilane ( _Si2H6 ), trisilane ( _{Si3H8 )} , germane ( _GeH4 ), _digermane ( _Ge2H6 ), borane ( _BH3 ), or _diborane ( _B2H6 ). In certain embodiments of the present disclosure, the reducing agent precursor may include molecular hydrogen ( _H2 ).

In some embodiments of the present disclosure, contacting the substrate with the reducing agent precursor may include contacting the substrate with the reducing agent precursor for about 0.01 seconds to about 180 seconds, about 0.05 seconds to about 60 seconds, or about 0.1 seconds to about 10.0 seconds. Further, during contacting the substrate with the reducing agent precursor, the flow rate of the reducing agent precursor may be less than 30 slm, or less than 15 slm, or less than 10 slm, or less than 5 slm, or less than 1 slm, or even less than 0.1 slm. Further, during contacting the substrate with the reducing agent precursor, the flow rate of the reducing agent precursor may range from about 0.1 to 30 slm, about 5 to 15 slm, or 10 slm or more.

Once the substrate is contacted with the reducing agent precursor, exemplary process block 130 for depositing a molybdenum metal film directly on the nucleation film can proceed by purging the reaction chamber. For example, excess reducing agent precursor and reaction by-products can be removed from the substrate surface, for example, by pumping in a flow of inert gas. In some embodiments of the present disclosure, the purging process can include purging the substrate surface for about 0.1 seconds to about 10 seconds, or about 0.5 seconds to about 3 seconds, or even about 1 second to 2 seconds.

Upon completion of purging of the second gas phase reactant, i.e., the reducing agent precursor (and any reaction by-products) from the reaction chamber, the cyclical deposition phase 305 of the exemplary atomic layer deposition process block 130 continues to a decision gate 340, which depends on the thickness of the deposited molybdenum metal film. For example, if the molybdenum metal film is deposited with an insufficient thickness for a desired device application, the cyclical deposition phase 305 may be repeated by returning to process block 320 and continuing with additional deposition cycles, where one unit of deposition cycle may include contacting the substrate with a molybdenum halide precursor (process block 320), purging the reaction chamber, contacting the substrate with a reducing agent precursor (process block 330), and purging the reaction chamber again. The unit of deposition cycle of the cyclical deposition phase 305 may be repeated one or more times until a molybdenum metal film of a desired thickness is deposited on the substrate, and in particular directly on the nucleation film. Once the molybdenum metal film has been deposited to a desired thickness, the exemplary atomic layer deposition process block 130 may end with process block 350, and the substrate including the dielectric surface with the molybdenum metal film deposited thereon may be further processed to form a device structure. For example, the exemplary process 100 of FIG. 1 may proceed to process block 140, where the process ends, and the substrate with the molybdenum metal film disposed thereon may undergo further semiconductor processing to complete a semiconductor device structure.

It should be appreciated that in some embodiments of the present disclosure, the order in which the substrate is contacted with the first gas phase reactant (e.g., a molybdenum precursor) and the second gas phase reactant (e.g., a reduced precursor) can be such that the substrate is first contacted with the second gas phase reactant followed by contact with the first gas phase reactant. Furthermore, in some embodiments, the cyclical deposition phase 305 of the exemplary process block 130 may include contacting the substrate with the first gas phase reactant one or more times before contacting the substrate with the second gas phase reactant one or more times. Furthermore, in some embodiments, the cyclical deposition phase 305 of the exemplary process block 130 may include contacting the substrate with the second gas phase reactant one or more times before contacting the substrate with the first gas phase reactant one or more times.

In some embodiments, the cyclic deposition process utilized to deposit the molybdenum metal film directly onto the nucleation may be a hybrid ALD/CVD or cyclic CVD process, as previously described herein.

The molybdenum metal film deposited by the methods disclosed herein may be a continuous film. In some embodiments, the molybdenum metal film may be continuous at a thickness of about 100 Å or less, or about 60 Å or less, or about 50 Å or less, or about 40 Å or less, or about 30 Å or less, or about 20 Å or less, or about 10 Å or less, or even 5 Å or less. The continuity referred to herein can be physical continuity or electrical continuity. In some embodiments of the present disclosure, the thickness at which the material film may be physically continuous may not be the same as the thickness at which the film is electrically continuous, and vice versa.

In some embodiments of the present disclosure, molybdenum metal films formed according to embodiments of the present disclosure may have a thickness of about 20 angstroms to about 250 angstroms, or about 50 angstroms to about 200 angstroms, or even about 100 angstroms to about 150 angstroms. In some embodiments, molybdenum metal films deposited according to some embodiments described herein may have a thickness of greater than about 20 Å, or greater than about 30 Å, or greater than about 40 Å, or greater than about 50 Å, or greater than about 60 Å, or greater than about 100 Å, or greater than about 250 Å, or greater than about 500 Å, or more. In some embodiments, molybdenum metal films deposited according to some embodiments described herein may have a thickness of less than about 250 Å, or less than about 100 Å, or less than about 50 Å, or less than about 25 Å, or less than about 10 Å, or even less than about 5 Å. In some embodiments, the molybdenum metal film disposed on the dielectric surface using the intermediate nucleation film may have a thickness of about 100 angstroms to 250 angstroms.

In some embodiments of the present disclosure, an intermediate nucleation film may be utilized to deposit a molybdenum metal film on a dielectric surface, such that the molybdenum metal film may comprise a crystalline film. In some embodiments, the molybdenum metal film may comprise a polycrystalline film, and the multiple crystalline grains comprising the polycrystalline molybdenum metal film may have a grain size greater than 100 Å, or greater than 200 Å, or even greater than 250 Å. In some embodiments, the crystal structure of the crystalline molybdenum metal film may comprise a body-centered cubic structure.

In some embodiments of the present disclosure, molybdenum metal films can be deposited on a dielectric surface having one or more high aspect ratio features, including high vertical aspect ratio features and/or high horizontal aspect ratio features.

For example, FIG. 4C illustrates a semiconductor device structure 410 comprising a dielectric material 402 having a vertical high aspect ratio feature 404. The aspect ratio (height:width) may be greater than 2:1, or greater than 5:1, or greater than 10:1, or greater than 25:1, or greater than 50:1, or even greater than 100:1, with "greater" referring to the greater height of the gap feature in this particular example. The deposition methods disclosed herein can be utilized to deposit a molybdenum metal film on the surface of the vertical high aspect ratio gap feature 404, as illustrated by the molybdenum metal film 412. In some embodiments, the step coverage of the molybdenum metal film on the vertical high aspect ratio dielectric gap feature can be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

As a non-limiting example, the semiconductor device structure 410 may represent a partially fabricated CMOS logic device, the dielectric material 402 may comprise an interlayer dielectric, and the molybdenum metal film 412 may comprise a metal gap fill to provide electrical connection to one or more transistor structures (not shown). As illustrated in FIG. 4A, the molybdenum metal film 406 contacts the nucleation film 404 directly, i.e., without the need for an intermediate barrier layer material, which is in turn disposed directly on the dielectric material 402, thereby reducing the overall effective electrical resistivity of the semiconductor device structure 410.

In some embodiments, the molybdenum metal film 412 can include a gap-fill metallization, where the molybdenum metal film 412 can fill the gap feature, i.e., the high vertical aspect ratio gap feature 404, without forming a seam. A seam can refer to a line or one or more voids formed by the abutting edges formed in the gap-fill material, and can be identified using a scanning transmission electron microscope (STEM) or a transmission electron microscope (TEM). A seam is present when observation reveals a distinct vertical line or one or more vertical voids in the gap-fill material.

As a further non-limiting example, FIG. 5C illustrates a semiconductor device structure 510 comprising a dielectric material 502 having one or more horizontal high aspect ratio gap features 504, where the aspect ratio (height:width) may be greater than 1:2, or greater than 1:5, or greater than 1:10, or greater than 1:25, or greater than 1:50, or even greater than 1:100, where in this example the term "greater" refers to the wide width of the one or more gap features. The deposition methods disclosed herein may be utilized to deposit a molybdenum metal film 512 on the surface of the horizontal high aspect ratio gap feature 504 utilizing an intermediate nucleation film 506. In some embodiments, the step coverage of the molybdenum metal film deposited on the horizontal high aspect ratio dielectric gap feature may be about 50% or more, about 80% or more, about 90% or more, about 95% or more, about 98% or more, or about 99% or more.

As a non-limiting exemplary embodiment, the semiconductor device structure 510 may represent a portion of a partially fabricated memory device, the dielectric material 502 may include aluminum oxide ( _Al2O3 ), and the _molybdenum metal film 512 may include at least a portion of a metal gate structure.

As previously discussed, similar to the vertical gap-fill process, molybdenum metal film 512 (FIG. 5C) can be utilized as gap-fill metallization for horizontal high aspect ratio features without forming seams.

In some embodiments of the present disclosure, a molybdenum metal film deposited directly on a nucleation film disposed directly on a dielectric surface can include a low electrical resistivity molybdenum metal film. In some embodiments, a molybdenum metal film deposited on a dielectric surface utilizing an intermediate nucleation film can have a lower electrical resistivity than a molybdenum film deposited directly on a dielectric surface, i.e., without any intermediate nucleation film. For example, in some embodiments, a molybdenum metal film of the present disclosure can have an electrical resistivity of less than 3000 μΩ-cm, or less than 1000 μΩ-cm, or less than 500 μΩ-cm, or less than 200 μΩ-cm, or less than 100 μΩ-cm, or less than 50 μΩ-cm, or less than 25 μΩ-cm, or less than 15 μΩ-cm, or even less than 10 μΩ-cm. As a non-limiting example, a molybdenum metal film may be deposited on the surface of a dielectric material utilizing an intermediate nucleation film to a molybdenum metal film thickness of less than about 60 angstroms, and the molybdenum metal film may exhibit an electrical resistivity of less than 40 μΩ-cm, or less than 35 μΩ-cm, or even less than 30 μΩ-cm.

In addition to improving the electrical resistivity of the molybdenum metal film, the deposition of an intermediate nucleation film can also improve the surface roughness of the deposited molybdenum metal film. For example, FIG. 6 shows the r.m.s. surface roughness (R _a ) in angstroms for two exemplary 60 angstrom thick molybdenum metal films. The molybdenum metal film, indicated by label 600, was deposited directly on an aluminum oxide (Al ₂ O ₃ ) dielectric surface. The corresponding r.m.s. surface roughness (R _a ) is about 7.3 angstroms. The molybdenum metal film, indicated by label 602, was deposited directly on a 4 angstrom thick silicon nitride nucleation film that was disposed directly on an aluminum oxide (Al ₂ O ₃ ) dielectric surface. The corresponding r.m.s. surface roughness (R _a ) is about 3.3 angstroms. The r.m.s. surface roughness of the molybdenum metal film is approximately 1.2 angstroms. It should be noted that surface roughness (R _a ) can be measured over a surface area of, for example, 1 micron by 1 micron, using an atomic force microscope.

Thus, the use of an intermediate nucleation film significantly improves the surface roughness of the molybdenum metal film, for example, in some embodiments, the rms surface roughness of a molybdenum metal film deposited on a dielectric surface utilizing an intermediate nucleation film can have an rms surface roughness (R _a ) of less than 5 Angstroms, or less than 4 Angstroms, or less than 3 Angstroms, or even less than 2 Angstroms. In some embodiments, the rms surface roughness (R _a ) may be expressed as a percentage of the roughness of the total film thickness. For example, in some embodiments, the rms surface roughness (R a ) can be less than 10 percent, or less than 5 percent, or less than 3 percent, or even less than 1 percent of the total thickness of the molybdenum metal film.

In some embodiments of the present disclosure, the method of depositing a molybdenum metal film on a dielectric surface utilizing an intermediate nucleation film may further include depositing a molybdenum metal film having a low atomic percentage (at.%) of impurities. For example, the molybdenum metal film of the present disclosure may include an impurity concentration of less than 5 at. %, or less than 2 at. %, or even less than 1 at. %. In some embodiments, the impurities disposed within the molybdenum metal film may include at least oxygen and chlorine.

Embodiments of the present disclosure may also provide a semiconductor device structure including a molybdenum metal film. In some embodiments, the semiconductor device structure includes a substrate having a dielectric surface, a nucleation film disposed directly on the dielectric surface, and a molybdenum metal film disposed directly on the nucleation film. As a non-limiting example, the semiconductor device structure 410 (of FIG. 4C) and the semiconductor device structure 510 (of FIG. 5C) include a dielectric substrate 402/502, the dielectric substrate having a dielectric surface. A nucleation film 406/506 is disposed directly on the dielectric substrate 402, and a molybdenum metal film 412/512 is disposed directly on the nucleation film 406/506. Thus, in some embodiments, the nucleation 406/506 is disposed directly between the molybdenum metal film 412/512 and the dielectric material 402/502.

In some embodiments, the nucleation film 406/506 may comprise a continuous film, while in other embodiments, the nucleation film 406'/506' may comprise a discontinuous film. In some embodiments, the continuous nucleation film 406/506 may be less than 20 Angstroms, or less than 10 Angstroms, or less than 5 Angstroms, or even less than 3 Angstroms thick. In some embodiments, the discontinuous nucleation film 406'/506' may be less than 20 Angstroms, or less than 10 Angstroms, or less than 5 Angstroms, or even less than 3 Angstroms thick.

In some embodiments, the nucleation film 406/506 can include a compound material, and in certain embodiments, the nucleation film 406/506 can include a binary compound material, such as a silicon binary compound material or a molybdenum binary compound material. In some embodiments, the nucleation film 406/506 can include a ternary compound material, such as a silicon ternary material or a molybdenum ternary material.

As a non-limiting example, the silicon binary compound material can include at least one of silicon nitride, silicon carbide, or silicon oxide. As a further non-limiting example, the molybdenum binary compound material can include at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum silicide.

In some embodiments, the molybdenum metal film 412/512 may be crystalline and may have an impurity concentration of less than 5 atomic %, or less than 2 atomic %, or even less than 1 atomic %. Additionally, the molybdenum metal film 412/512 may have an electrical resistivity of less than 40 μΩ-cm at a thickness of less than 60 Angstroms.

In some embodiments, the molybdenum metal film 412/512 can have an rms surface roughness (R _a ) of less than 5 Angstroms, or less than 4 Angstroms, or less than 3 Angstroms, or even less than 2 Angstroms. In some embodiments, the rms surface roughness (R _a ) may be expressed as a percentage of the roughness of the total film thickness. For example, in some embodiments, the rms surface roughness (R a ) can be less than 10 percent, or less than 5 percent, or less than 3 percent, or even less than 1 percent of the total thickness of the molybdenum metal film. As exemplified by the molybdenum metal films 412 and 512, the low surface roughness of the molybdenum metal film 412/512 can enable the molybdenum metal film to fill one or more gap features disposed in and/or on the substrate, such as the vertical gap feature 404 and/or the horizontal gap feature 504, without forming a seam.

The exemplary embodiments of the present disclosure described above are merely examples of embodiments of the present invention, as defined by the appended claims and their legal equivalents, and therefore do not limit the scope of the present invention. Any equivalent embodiments are intended to be within the scope of the present invention. Indeed, various modifications of the present disclosure in addition to those shown and described herein may become apparent to those skilled in the art from the description, such as alternative useful combinations of the described elements. Such modifications and embodiments are also intended to fall within the scope of the appended claims.
The present invention includes the following aspects.
[1]
1. A method for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process, comprising:
Providing a substrate having a dielectric surface in a reaction chamber;
depositing a nucleation film directly onto the dielectric surface;
depositing a molybdenum metal film directly onto the nucleation film, the depositing of the molybdenum metal film comprising:
contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor;
contacting the substrate with a second gas phase reactant comprising a reducing agent precursor.
[2]
The method according to [1], wherein the nucleation film comprises a compound material.
[3]
The method according to [2], wherein the compound material comprises a binary compound material.
[4]
The method of claim 3, wherein the binary compound material comprises a silicon binary compound material.
[5]
5. The method of claim 4, wherein the silicon binary compound material comprises at least one of silicon nitride, silicon carbide, or silicon oxide.
[6]
The method according to [3], wherein the binary compound material comprises a molybdenum binary compound material.
[7]
7. The method of claim 6, wherein the molybdenum binary compound material comprises at least one of molybdenum nitride, molybdenum carbide, molybdenum oxide, or molybdenum disilicide.
[8]
2. The method of claim 1, wherein depositing the nucleation film further comprises heating the substrate to a substrate temperature of less than 600° C.
[9]
Depositing the nucleation film further comprises performing at least one unit cycle of a cyclic deposition process, a unit cycle comprising:
contacting the substrate with a first gas-phase reactant comprising at least one of a first silicon precursor or a molybdenum precursor;
and contacting the substrate with a second gas-phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a second silicon precursor.
[10]
The method of claim 1, wherein depositing the molybdenum metal film further comprises heating the substrate to a substrate temperature of 400° C. to 700° C.
[11]
The method according to [1], wherein the molybdenum halide comprises a molybdenum chalcogenide halide.
[12]
The method of claim 11, wherein the molybdenum chalcogenide halide comprises a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide.
[13]
The method according to [12], wherein the molybdenum oxychloride comprises molybdenum (IV) dichloride dioxide (MoO ₂ Cl ₂ ).
[14]
The method according to [1], wherein the molybdenum metal film is a crystalline film.
[15]
2. The method of claim 1, wherein the dielectric surface includes a gap feature and the molybdenum metal film fills the gap feature without forming a seam.
[16]
1. A semiconductor device structure comprising:
a substrate having a dielectric surface;
a nucleation film disposed directly on the dielectric surface;
a molybdenum metal film disposed directly on the nucleation film.
[17]
The structure according to [16], wherein the nucleation film comprises a compound material.
[18]
The structure of [17], wherein the compound material comprises a binary compound material.
[19]
The structure of [18], wherein the binary compound material comprises a silicon binary compound material.
[20]
20. The structure of claim 19, wherein the silicon binary compound material comprises at least one of silicon nitride, silicon carbide, or silicon oxide.
[21]
The structure of [18], wherein the binary compound material comprises a molybdenum binary compound material.
[22]
The molybdenum binary compound material may be selected from the group consisting of molybdenum nitride, molybdenum carbide, and molybdenum oxide.
The structure according to [21], further comprising at least one of: a silicide;
[23]
The structure of [16], wherein the molybdenum film has an electrical resistivity of less than 40 μΩ-cm at a thickness of less than 60 Angstroms.
[24]
The structure according to [16], wherein the molybdenum metal film is a crystalline film.
[25]
16. The structure of claim 15, wherein the dielectric surface comprises a gap feature, and the molybdenum metal film fills the gap feature without forming a seam.

Claims (25)

1. A method for depositing a molybdenum metal film on a dielectric surface of a substrate by a cyclic deposition process, comprising:
Providing a substrate having a dielectric surface in a reaction chamber;
depositing a nucleation film directly onto the dielectric surface;
depositing a molybdenum metal film directly onto the nucleation film;
depositing the molybdenum metal film
contacting the substrate with a first gas phase reactant comprising a molybdenum halide precursor;
contacting the substrate with a second gas phase reactant comprising a reducing agent precursor ;
depositing the nucleation film includes repeating a unit cycle of a cyclic deposition process;
the nucleation film comprises molybdenum nitride, molybdenum carbide, molybdenum oxide, or a combination thereof;
At least one of the unit cycles comprises:
contacting the substrate with a first gas phase reactant comprising a molybdenum precursor;
contacting the substrate with a second gas phase reactant comprising at least one of a nitrogen precursor, an oxygen precursor, or a carbon precursor;
method. 10. The method of claim 1, wherein the molybdenum precursor is selected from the group consisting of a molybdenum nitride precursor, a molybdenum carbide precursor, a molybdenum oxide precursor, and a molybdenum silicide precursor. The method of claim 1 , wherein the nucleation film is a discontinuous film. The method of claim 1 , wherein the nucleation film has a thickness of less than 10 Å. 10. The method of claim 1, wherein depositing the molybdenum metal film comprises repeating a unit cycle of a cyclic deposition process to form a molybdenum metal film having a thickness between 50 Å and 200 Å. The nitrogen precursor is ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), triazane (N ₃ H ₅ ), tert-butylhydrazine (C ₄ H ₉ N ₂ H ₃ ), methylhydrazine (CH ₃ N.H.N.H. ₂ ), dimethylhydrazine ((CH ₃ ) ₂ N ₂ H ₂ ), or nitrogen plasma, and the oxygen precursor is water (H ₂ O), hydrogen peroxide (H ₂ O ₂ ), ozone (O ₃ ), or nitric oxide (NO), nitrous oxide (N ₂ O), or nitrogen dioxide (NO ₂ 10. The method of claim 1, wherein the carbon precursor comprises at least one of: nitrogen oxides including at least one of the following: The method of claim 1 , wherein the nucleation film has a thickness of less than 5 Å. The method of claim 1 , wherein depositing the nucleation film further comprises heating the substrate to a substrate temperature less than 600° C. The method of claim 1 , wherein the nucleation film has a thickness of less than 3 Å. The method of claim 1 , wherein depositing the molybdenum metal film further comprises heating the substrate to a substrate temperature of between 400° C. and 700° C. The method of claim 1 , wherein the molybdenum halide comprises a molybdenum chalcogenide halide. 12. The method of claim 11, wherein the molybdenum chalcogenide halide comprises a molybdenum oxyhalide selected from the group including molybdenum oxychloride, molybdenum oxyiodide, or molybdenum oxybromide. The molybdenum oxychloride is molybdenum (IV) dichloride dioxide ( _MoO2C
The method of claim 12 , _further comprising: The method of claim 1, wherein the molybdenum metal film is a crystalline film. The method of claim 1 , wherein the dielectric surface includes a gap feature, and the molybdenum metal film fills the gap feature without forming a seam. 1. A semiconductor device structure comprising:
a substrate having a dielectric surface;
a nucleation film disposed directly on the dielectric surface;
a molybdenum metal film disposed directly on the nucleation film ;
A semiconductor device structure, wherein the nucleation film comprises molybdenum nitride, molybdenum carbide, molybdenum oxide, or a combination thereof . 17. The structure of claim 16, wherein the nucleation film comprises molybdenum carbide . 17. The structure of claim 16, wherein the nucleation film comprises molybdenum oxide. 17. The structure of claim 16, wherein the nucleation film comprises molybdenum nitride. 20. The structure of claim 16, wherein the nucleation film comprises a molybdenum ternary compound. 21. The structure of claim 20, wherein the molybdenum ternary compound comprises MoON or MoSiO. 20. The structure of claim 16 , wherein the nucleation film has a thickness of less than 10 Å . The structure of claim 16, wherein the molybdenum film has an electrical resistivity of less than 40 μΩ-cm at a thickness of less than 60 angstroms. The structure of claim 16, wherein the molybdenum metal film is a crystalline film. 17. The structure of claim 16, wherein the dielectric surface comprises a gap feature, and the molybdenum metal film fills the gap feature without forming a seam.