JP7482994B2 - データ・ストレージ・システムにおけるリンク速度回復 - Google Patents

データ・ストレージ・システムにおけるリンク速度回復 Download PDF

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Publication number
JP7482994B2
JP7482994B2 JP2022513694A JP2022513694A JP7482994B2 JP 7482994 B2 JP7482994 B2 JP 7482994B2 JP 2022513694 A JP2022513694 A JP 2022513694A JP 2022513694 A JP2022513694 A JP 2022513694A JP 7482994 B2 JP7482994 B2 JP 7482994B2
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link
recovery
link speed
sequential
loop
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Japanese (ja)
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JP2022548208A5 (enExample
JP2022548208A (ja
Inventor
バーク、シェーマス
カーソン、マシュー
バッチェラー、ゲイリー、ウィリアム
マックック、ハイディ、リーン
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International Business Machines Corp
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International Business Machines Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4295—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)
JP2022513694A 2019-09-11 2020-08-13 データ・ストレージ・システムにおけるリンク速度回復 Active JP7482994B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/567,320 US10754798B1 (en) 2019-09-11 2019-09-11 Link speed recovery in a data storage system
US16/567,320 2019-09-11
PCT/IB2020/057624 WO2021048658A1 (en) 2019-09-11 2020-08-13 Link speed recovery in a data storage system

Publications (3)

Publication Number Publication Date
JP2022548208A JP2022548208A (ja) 2022-11-17
JP2022548208A5 JP2022548208A5 (enExample) 2022-12-13
JP7482994B2 true JP7482994B2 (ja) 2024-05-14

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JP2022513694A Active JP7482994B2 (ja) 2019-09-11 2020-08-13 データ・ストレージ・システムにおけるリンク速度回復

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US (1) US10754798B1 (enExample)
JP (1) JP7482994B2 (enExample)
CN (1) CN114286993B (enExample)
DE (1) DE112020003608B4 (enExample)
GB (1) GB2603315B (enExample)
WO (1) WO2021048658A1 (enExample)

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US11263092B2 (en) * 2020-03-06 2022-03-01 Hitachi, Ltd. Resource allocation optimization for cloud bursting use case
CN113590511B (zh) * 2021-10-08 2022-02-22 苏州浪潮智能科技有限公司 一种带宽降速修复方法、装置及电子设备
US11847071B2 (en) * 2021-12-30 2023-12-19 Pure Storage, Inc. Enabling communication between a single-port device and multiple storage system controllers
US12153527B2 (en) * 2022-12-14 2024-11-26 Qualcomm Incorporated Data rate increase for faulty lane recovery in multiple lane data links
TWI883606B (zh) * 2023-10-24 2025-05-11 群聯電子股份有限公司 裝置控制方法、記憶體儲存裝置及記憶體控制電路單元
CN118708128A (zh) * 2024-08-28 2024-09-27 联芸科技(杭州)股份有限公司 固态硬盘数据传输速率的控制方法及固态硬盘
CN119357106B (zh) * 2024-09-20 2025-08-26 无锡众星微系统技术有限公司 PCIe链路均衡失败后的重建链方法及装置

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US20130051483A1 (en) 2011-08-24 2013-02-28 Nvidia Corporation System and method for detecting reuse of an existing known high-speed serial interconnect link
JP2015121837A (ja) 2013-12-20 2015-07-02 株式会社デンソー 情報処理装置、情報処理装置の起動方法、情報処理装置の起動プログラム

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WO2012106934A1 (zh) * 2011-07-27 2012-08-16 华为技术有限公司 Pci快速通道设备、链路能量管理方法及系统
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JP2011248814A (ja) 2010-05-31 2011-12-08 Nec Corp ＰＣＩＥｘｐｒｅｓｓリンクエラー検出及び自動復旧機能を備えたデバイス
US20130051483A1 (en) 2011-08-24 2013-02-28 Nvidia Corporation System and method for detecting reuse of an existing known high-speed serial interconnect link
JP2015121837A (ja) 2013-12-20 2015-07-02 株式会社デンソー 情報処理装置、情報処理装置の起動方法、情報処理装置の起動プログラム

Also Published As

Publication number Publication date
CN114286993A (zh) 2022-04-05
GB2603315B (en) 2023-02-22
GB202203356D0 (en) 2022-04-27
DE112020003608B4 (de) 2025-10-23
DE112020003608T5 (de) 2022-07-28
JP2022548208A (ja) 2022-11-17
GB2603315A (en) 2022-08-03
CN114286993B (zh) 2023-02-14
WO2021048658A1 (en) 2021-03-18
US10754798B1 (en) 2020-08-25

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