JP7468754B1 - ELECTRONIC INFORMATION STORAGE MEDIUM, IC CHIP, IC CARD, RECEPTION BLOCK PROCESSING METHOD, AND PROGRAM - Google Patents

Abstract

[Problem] To provide an electronic information storage medium, an IC chip, an IC card, a received block processing method, and a program capable of reducing the communication time required until chaining is completed. [Solution] When the first I-block of multiple I-blocks is received, an IC chip 1 acquires the LEN (total length) of the transmission data from the first I-block, and each time an I-block is received, determines whether all I-blocks for transmitting the transmission data have been received based on the acquired LEN (total length), and if it is determined that all I-blocks have not been received, it waits to send a response to an external device 2, while if it is determined that all I-blocks have been received, it responds to the external device 2 that all I-blocks have been received. [Selected Figure] Figure 5

Description

The present invention relates to the technical field of IC (Integrated Circuit) cards that can transmit and receive data between external devices.

A data transmission protocol called chaining is known in the past, in which data to be transmitted is divided into multiple blocks when transmitting data longer than the length of data that can be transmitted at one time between an IC card and an external device. In data transmission protocols using block formats defined in the international standards ISO/IEC 7816-3 and ISO/IEC 14443, a response from the IC card to the transmitted block is required, which causes problems in that communication time is longer than necessary and the transaction itself between the IC card and the external device also takes time. Patent Document 1 discloses a technology that can shorten communication time in a data transmission protocol control method for controlling data transmission between a contactless IC card and a reader/writer, in which when multiple divided blocks are transmitted consecutively from the transmitting side to the receiving side, the number of blocks to be transmitted consecutively is included in the first block to be transmitted.

Japanese Patent No. 5106456

However, with conventional technology, although the first block sent contains the number of blocks to be sent in succession, the total length of the data to be sent is unknown from this number of blocks. As a result, the IC card does not know how much data will be sent in one chaining, and there is a possibility that the IC card will receive a large amount of data, which also causes communication times to be longer than necessary.

The present invention has been made in consideration of these points and has as one example an objective to provide an electronic information storage medium, an IC chip, an IC card, a reception block processing method, and a program that can reduce the communication time required until chaining is completed.

In order to solve the above problem, the invention described in claim 1 is an electronic information storage medium capable of sequentially receiving blocks in which transmission data is divided into multiple pieces and transmitted from an external device, comprising: an acquisition means for acquiring a total length of the transmission data contained in the first block of the multiple blocks; a first determination means for determining whether all of the blocks for transmitting the transmission data have been received based on the acquired total length each time a block is received; a first response means for waiting to send a response to the external device if it is determined that all of the blocks have not been received, while responding to the external device that all of the blocks have been received if it is determined that all of the blocks have been received; a second determination means for determining whether to refuse receipt of the transmission data based on the acquired total length when the first block is received; and a second response means for responding to the external device with a refusal to receive the transmission data if it is determined that receipt of the transmission data is to be refused .

The invention described in claim 2 is characterized in that, in the electronic information storage medium described in claim 1 , when an error is detected in a block being received, the first response means responds to the external device of the occurrence of the error.

The invention described in claim 3 is an IC chip capable of sequentially receiving blocks in which transmission data is divided into multiple pieces and transmitted from an external device, comprising: an acquisition means for acquiring a total length of the transmission data included in the first block of the multiple blocks; a first determination means for determining whether all of the blocks for transmitting the transmission data have been received based on the acquired total length each time a block is received; a first response means for waiting to send a response to the external device when it is determined that all of the blocks have not been received, and for responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received; a second determination means for determining whether to refuse receipt of the transmission data based on the acquired total length when the first block is received; and a second response means for responding to the external device with a refusal to receive the transmission data when it is determined that receipt of the transmission data is to be refused .

The invention described in claim 4 is an IC card capable of sequentially receiving blocks in which transmission data is divided into multiple pieces and transmitted from an external device, comprising: an acquisition means for acquiring a total length of the transmission data included in the first block of the multiple blocks; a first determination means for determining whether all of the blocks for transmitting the transmission data have been received based on the acquired total length each time a block is received; a first response means for waiting to send a response to the external device when it is determined that all of the blocks have not been received, and for responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received; a second determination means for determining whether to refuse receipt of the transmission data based on the acquired total length when the first block is received; and a second response means for responding to the external device with a refusal to receive the transmission data when it is determined that receipt of the transmission data is to be refused .

The invention described in claim 5 is a received block processing method executed by an electronic information storage medium capable of sequentially receiving blocks in which transmission data is divided into multiple pieces and transmitted from an external device, comprising the steps of: acquiring the total length of the transmission data contained in the first block of the multiple blocks; determining, each time a block is received, whether or not all of the blocks for transmitting the transmission data have been received based on the acquired total length; waiting to send a response to the external device if it is determined that all of the blocks have not been received, while responding to the external device that all of the blocks have been received if it is determined that all of the blocks have been received; determining, when the first block is received, based on the acquired total length, whether or not to refuse receipt of the transmission data; and, if it is determined that receipt of the transmission data is to be refused, responding to the external device with a refusal to receive the transmission data.

The invention described in claim 6 is characterized in that a computer capable of sequentially receiving blocks in which transmission data is divided into multiple pieces and transmitted from an external device executes the following steps: acquiring the total length of the transmission data contained in the first block of the multiple blocks; determining, each time a block is received, whether or not all of the blocks for transmitting the transmission data have been received based on the acquired total length; waiting to send a response to the external device if it is determined that all of the blocks have not been received, while responding to the external device that all of the blocks have been received if it is determined that all of the blocks have been received; determining, when the first block is received, based on the acquired total length, whether or not to refuse receipt of the transmission data; and, if it is determined that receipt of the transmission data is to be refused, responding to the external device of refusal to receive the transmission data .

The present invention can reduce the communication time required to complete chaining.

FIG. 2 is a diagram illustrating an example of a hardware configuration of an IC chip 1. 1 is a diagram showing a data format of a block transmitted and received in contact communication between an IC chip 1 and an external device 2. FIG. This is a diagram showing the contents of bits 6 to 1 in the PCB of R-block. FIG. 13 is a diagram showing an example of a portion of the first I-block that includes the LEN (total length) of transmission data. FIG. 1A is a sequence diagram showing an example in which chaining is completed normally, FIG. 1B is a sequence diagram showing an example in which a refusal to receive transmitted data is responded to, and FIG. 1C is a sequence diagram showing an example in which an error has occurred during chaining. 11 is a flowchart showing an example of a reception block process executed by a CPU 15 of the IC chip 1.

The following describes in detail an embodiment of the present invention with reference to the drawings.

[1. Configuration and Function of IC Chip 1]
First, the configuration and functions of an IC chip 1 according to this embodiment will be described with reference to Fig. 1. The IC chip 1 is an example of an electronic information storage medium capable of sequentially receiving blocks (hereinafter referred to as "blocks") in which transmission data is divided into a plurality of pieces by chaining and transmitted from an external device 2. The IC chip 1 is mounted on, for example, an IC card such as a credit card, a cash card, or a My Number card, or a mobile device such as a smartphone. In the case of a mobile device such as a smartphone, the IC chip 1 may be mounted on a small IC card that is detachable from the mobile device, or may be mounted on an embedded board as an eUICC (Embedded Universal Integrated Circuit Card) so that it cannot be easily removed or replaced from the mobile device.

1 is a diagram showing an example of the hardware configuration of an IC chip 1. As shown in FIG. 1, the IC chip 1 includes an I/O circuit 11, a RAM (Random Access Memory) 12, a NVM (Nonvolatile Memory) 13, a ROM (Read Only Memory) 14, a CPU (Central Processing Unit) 15 (an example of a computer), and a coprocessor 16 that performs cryptographic operations. The I/O circuit 11 serves as an interface with an external device 2. Note that communication between the IC chip 1 and the external device 2 may be contact communication or non-contact communication. In the case of non-contact communication, the IC chip 1 and the external device 2 communicate with each other via an antenna (not shown) mounted on an IC card or a mobile device. Note that an example of the external device 2 is a transaction device equipped with a reader/writer. For example, a flash memory is applied to the NVM 13. Note that the NVM 13 may be an "Electrically Erasable Programmable Read-Only Memory". The NVM 13 or ROM 14 stores an OS (operating system) and one or more applications (including the program of the present invention).

The IC chip 1 communicates with the external device 2 via the I/O circuit 11, for example, in accordance with a half-duplex block transmission protocol. For example, ISO/IEC 7816-3 specifies the T=1 protocol (start-stop half-duplex block transmission protocol) as a half-duplex block transmission protocol. In communication following the half-duplex block transmission protocol, an I (Information)-block, an R (Receive Ready)-block, and an S (Supervisory)-block are used. The I-block is used to transmit data used by the application in the application layer. The data used in the application layer corresponds to the transmission data described above.

An example of the transmission data is a command APDU (Application Protocol Data Unit). The command APDU is composed of a header section consisting of CLA (instruction class), INS (instruction code), P1 and P2 (instruction parameters), and a body section including data to be written to NVM 13 (e.g., key data used by the coprocessor 16). For example, if the data to be written to NVM 13 exceeds the maximum length that can be transmitted at one time (i.e., in one command APDU), the data will be transmitted sequentially from the external device 2 in multiple command APDUs by chaining. Note that when bit 5 of the CLA in the command APDU is set to "0", the command APDU indicates the end of the chaining (or no chaining). On the other hand, when bit 5 of the CLA in the command APDU is set to "1", the command APDU indicates that the chaining is in progress.

R-blocks are used to transmit acknowledgments (ack) and various errors. S-blocks are used to exchange control information between the external device 2 and the IC chip 1. Figure 2 shows the data format of blocks transmitted and received in contact communication between the IC chip 1 and the external device 2. As shown in Figure 2, one block consists of a prologue field, an information field, and an epilogue field. An error detection code (LRC or CRC) is stored in the epilogue field. A command APDU is stored in the information field (INF) of an I-block. An R-block does not have an information field. The first field of each block consists of a node address byte (NAD), a protocol control byte (PCB), and a length byte (LEN). The NAD indicates the source and destination of the block. The first two bits (bits 8 to 7) of the PCB indicate whether the block is an I-block, an R-block, or an S-block, and the remaining six bits (bits 6 to 1) indicate more detailed information. Additionally, a specific bit on the I-block PCB can indicate the end of a chain or the middle of a chain.

Figure 3 shows the contents of bits 6 to 1 in the PCB of an R-block. In Figure 3, N(R) indicates the sequence number of the I-block expected to be sent after the R-block. As shown in Figure 3, bits 6 to 1 of the PCB indicate whether the R-block is an acknowledgment (ack), a block error (redundancy code error / character parity error), or other error. Although not shown, a block sent and received in non-contact communication between the IC chip 1 and the external device 2 also consists of a first field, an information field, and a last field as specified in ISO/IEC 14443, and the first field consists of a PCB, a CID (Card identifier), and an NAD. In this case, the PCB indicates whether the block is an I-block, R-block, or S-block using the first two bits (bits 8 to 7) as with blocks sent and received in contact communication, and the remaining six bits (bits 6 to 1) indicate more detailed information. In addition, LEN may be included in the first field of a block transmitted and received in non-contact communication, or a field containing only LEN may be provided prior to the first field.

The CPU 15 (an example of a computer) executes the OS and applications (including the program of the present invention) stored in the NVM 13, thereby functioning as the acquisition means, first determination means, second determination means, response means, and the like of the present invention. The CPU 15 sequentially receives, via the I/O circuit 11, each I-block of the transmission data that is divided into multiple pieces by chaining and transmitted from the external device 2. Here, the first I-block of the multiple I-blocks contains the LEN (total length) of the transmission data. The LEN (total length) of the transmission data may be the length when all I-blocks to be transmitted to the IC chip 1 by chaining are combined, or may be the length when the command APDUs contained in each of the I-blocks are combined. When the first I-block of the multiple I-blocks is received, the CPU 15 acquires the LEN (total length) of the transmission data from the first I-block.

Figure 4 is a diagram showing an example of a portion where the LEN (total length) of the transmission data is included in the first I-block of contact communication. In the example of Figure 4 (A), the LEN (total length) of the transmission data is represented by the value obtained by combining P1 (LEN1) and P2 (LEN2) in the header part of the command APDU in the information field of the first I-block (similar to non-contact communication). In the example of Figure 4 (B), a TLV is included at the beginning of the Data in the body part of the command APDU in the information field of the first I-block, and the LEN (total length) of the transmission data is represented by the value of the Value part of the TLV (similar to non-contact communication). In the example of Figure 4 (C), the LEN (total length) of the transmission data is represented by a part of the value of LEN (for example, the first few bits) in the first field of the first I-block (similar to non-contact communication). As an example different from Figure 4, the LEN (total length) of the transmission data may be included before the command APDU in the information field of the first I-block (similar to non-contact communication). In non-contact communication, if a LEN field is provided before the first field of the first I-block, the LEN value may represent the LEN (total length) of the transmission data.

Each time an I-block is received from the external device 2, the CPU 15 determines whether or not all I-blocks (in other words, all command APDUs) for transmitting the transmission data have been received, based on the acquired LEN (total length). If the CPU 15 determines that all I-blocks have not been received, it waits to send a response to the external device 2, but if it determines that all I-blocks have been received, it responds to the external device 2 by sending an R-block (ack) to notify that all I-blocks have been received. This makes it possible to reduce the communication time required for chaining to be completed (the communication time required for chaining).

The CPU 15 may also determine whether to reject the reception of the transmission data based on the LEN (total length) acquired when the first I-block is received, and if it determines that the reception of the transmission data is rejected, may respond to the external device 2 by using an R-block (other error) to notify the reception of the transmission data. For example, if the LEN (total length) of the transmission data exceeds a preset threshold, it may be determined that the reception of the transmission data is rejected. The threshold may be set based on the free space of the NVM 13. This can prevent the IC chip 1 from receiving a large amount of transmission data in advance, which can also reduce communication time. If the CPU 15 detects an error in an I-block being received, it may respond to the external device 2 by using an R-block (redundancy code error or character parity error).

2. Operation of IC chip 1
Next, the operation of the IC chip 1 will be described with reference to Fig. 5 and Fig. 6. Fig. 5(A) is a sequence diagram showing an example in which chaining is normally completed. Fig. 5(B) is a sequence diagram showing an example in which a refusal to receive transmission data is responded to. Fig. 5(C) is a sequence diagram showing an example in which an error occurrence is responded to during chaining. Fig. 6 is a flow chart showing an example of a reception block process executed by the CPU 15 of the IC chip 1. The process shown in Fig. 6 is started when an I-block is received from the external device 2.

In FIG. 5 (A), the external device 2 transmits (1) the first I-block including the LEN (total length) of the transmission data to the IC chip 1. When the CPU 15 receives an I-block from the external device 2 (step S1), it determines whether the received I-block is the first I-block (step S2). The received I-block is stored in a specified area of the RAM 12. If it is determined that the received I-block is the first I-block (step S2: YES), the process proceeds to step S3. On the other hand, if it is determined that the received I-block is not the first I-block (step S2: NO), the process proceeds to step S6.

In step S3, the CPU 15 obtains the LEN (total length) of the transmission data from the first I-block and stores it in another area of the RAM 12. Next, the CPU 15 compares the LEN (total length) obtained in step S3 with a threshold value to determine whether or not to reject the reception of the transmission data (step S4). If it is determined that the reception of the transmission data is not rejected (step S4: NO), the process proceeds to step S6. On the other hand, if it is determined that the reception of the transmission data is rejected (step S4: YES), an R-block (other error) indicating a refusal to receive the transmission data is transmitted (2) to the external device 2 (step S5), as shown in FIG. 5(B), and the process ends.

In step S6, the CPU 15 determines whether or not an error has been detected in the received I-block. If it is determined that no error has been detected in the I-block (step S6: NO), the process proceeds to step S8. On the other hand, if it is determined that an error (e.g., a CRC error) has been detected in the I-block (step S6: YES), as shown in FIG. 5(C), an R-block (redundancy code error) indicating the occurrence of an error (e.g., a CRC error) is transmitted (2) to the external device 2 (step S7), and the process ends.

In step S8, the CPU 15 determines whether the received I-block is the last I-block. If it is determined that the received I-block is not the last I-block (step S8: NO), the CPU 15 waits for a response to be sent to the external device 2 (i.e., does not send a response) and returns to step S1. Then, when the next I-block is sent (2) from the external device 2 to the IC chip 1, the CPU 15 receives the I-block from the external device 2 and proceeds to step S2, as described above. Note that the second and subsequent I-blocks do not include the LEN (total length) of the transmission data.

On the other hand, if it is determined that the received I-block is the last I-block (the Nth I-block in the example of FIG. 5A) (step S8: YES), an R-block (ack) indicating that all I-blocks have been received is sent to the external device 2 (step S9), and the process proceeds to command processing according to the command APDU, for example. In the data transmission method defined by the above-mentioned international standard, a response is sent every time an I-block is received from the data sending side, but the IC chip 1 according to this embodiment waits without sending a response until the transmission data for the LEN (total length) acquired in the first I-block is sent, and sends a response (R-block (ack)) only when the last I-block is received.

As described above, according to the above embodiment, when the first I-block of multiple I-blocks is received, the IC chip 1 acquires the LEN (total length) of the transmission data from the first I-block, and each time an I-block is received, it determines whether all I-blocks for transmitting the transmission data have been received based on the acquired LEN (total length). If it is determined that all I-blocks have not been received, it waits to send a response to the external device 2, but if it is determined that all I-blocks have been received, it responds to the external device 2 that all I-blocks have been received. This reduces the communication time required to complete chaining.

1 IC chip 11 I/O circuit 12 RAM (
13 NVM
14 ROM
15 CPU
16 Coprocessor

Claims (6)

An electronic information storage medium capable of sequentially receiving blocks of transmission data that are divided into a plurality of blocks and transmitted from an external device, comprising:
an acquisition means for acquiring a total length of the transmission data included in a first block of the plurality of blocks;
a first determination means for determining, each time the block is received, whether or not all the blocks for transmitting the transmission data have been received based on the acquired total length;
a first response means for waiting for transmission of a response to the external device when it is determined that all of the blocks have not been received, and for responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received;
a second determination means for determining whether or not to reject reception of the transmission data based on the acquired total length when the first block is received;
a second response means for responding to the external device of a refusal to receive the transmission data when it is determined that the reception of the transmission data is to be refused;
An electronic information storage medium comprising: 2. The electronic information storage medium according to claim 1, wherein, when an error is detected in the block being received, the first response means responds to the external device by notifying the occurrence of the error. An IC chip capable of sequentially receiving blocks of transmission data that are divided into a plurality of blocks and transmitted from an external device,
an acquisition means for acquiring a total length of the transmission data included in a first block of the plurality of blocks;
a first determination means for determining, each time the block is received, whether or not all the blocks for transmitting the transmission data have been received based on the acquired total length;
a first response means for waiting for transmission of a response to the external device when it is determined that all of the blocks have not been received, and for responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received;
a second determination means for determining whether or not to reject reception of the transmission data based on the acquired total length when the first block is received;
a second response means for responding to the external device of a refusal to receive the transmission data when it is determined that the reception of the transmission data is to be refused;
An IC chip comprising: An IC card capable of sequentially receiving blocks of transmission data that are divided into a plurality of blocks and transmitted from an external device,
an acquisition means for acquiring a total length of the transmission data included in a first block of the plurality of blocks;
a first determination means for determining, each time the block is received, whether or not all the blocks for transmitting the transmission data have been received based on the acquired total length;
a first response means for waiting for transmission of a response to the external device when it is determined that all of the blocks have not been received, and for responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received;
a second determination means for determining whether or not to reject reception of the transmission data based on the acquired total length when the first block is received;
a second response means for responding to the external device of a refusal to receive the transmission data when it is determined that the reception of the transmission data is to be refused;
An IC card comprising: 1. A received block processing method executed by an electronic information storage medium capable of sequentially receiving blocks of transmission data that are divided into a plurality of blocks and transmitted from an external device, comprising:
obtaining a total length of the transmission data included in a first block of the plurality of blocks;
determining, each time the block is received, whether or not all the blocks for transmitting the transmission data have been received based on the acquired total length;
a step of waiting for transmission of a response to the external device when it is determined that all of the blocks have not been received, and responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received;
determining whether to reject reception of the transmission data based on the acquired total length when the first block is received;
a step of responding to the external device of refusal to receive the transmission data when it is determined that the reception of the transmission data is to be refused;
23. A method for processing a received block, comprising: A computer capable of sequentially receiving blocks of data that are divided and transmitted from an external device,
obtaining a total length of the transmission data included in a first block of the plurality of blocks;
determining, each time the block is received, whether or not all the blocks for transmitting the transmission data have been received based on the acquired total length;
a step of waiting for transmission of a response to the external device when it is determined that all of the blocks have not been received, and responding to the external device that all of the blocks have been received when it is determined that all of the blocks have been received;
determining whether to reject reception of the transmission data based on the acquired total length when the first block is received;
a step of responding to the external device of refusal to receive the transmission data when it is determined that the reception of the transmission data is to be refused;
A program characterized by executing the above.

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