JP7464226B2 - Gaming Machines - Google Patents

Description

The present invention relates to gaming machines such as pachinko gaming machines (commonly referred to as "pachinko machines") and slot machine gaming machines (commonly referred to as "pachislot machines").

Some gaming machines, such as pachinko machines, perform a RAM clear process by turning the power back on when play is stopped due to a power outage or other reason (see, for example, Patent Document 1).

JP 2021-58793 A

The gaming machine disclosed in Patent Document 1 prevents the complexity of operations required to resume play from a stopped state, but because the RAM must be cleared when resuming play, it is not possible to continue playing, which may reduce the player's interest in the game.

The present invention was developed in consideration of the above circumstances, and aims to provide a gaming machine that prevents a decline in interest in gaming by allowing the player to continue playing in the state before the game was stopped.

A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
a prize medium awarding means for awarding a prize medium based on the winning of a prize;
a first counting means for counting a first count value based on the number of game media consumed in a game;
A second counting means for counting a second count value based on the number of the awarded prize media;
a game stopping means which is executed by a program stored in an area outside the area in which the program for controlling the progress of the game is stored, which counts a difference based on the first count value and the second count value, and executes a setting for stopping the progress of the game based on the counted difference value;
a game stop means for counting a difference between the first count value and the second count value and stopping a game based on the counted difference;
A game stop release means for releasing the stop of the game when the progress of the game is stopped;
An operation means for operating the game stop release means;
Equipped with
The operation means includes a first operation means and a second operation means different from the first operation means,
The game stop release means releases the stop of the game by operating the second operation means while operating the first operation means when the game progress is stopped by the game stop means, thereby making it possible to resume the game state that is in the stopped state.

According to one embodiment of the present invention, it is possible to solve the above problems and prevent a decline in interest in the game.

1 is a front view of a pachinko machine according to one embodiment of the present invention. FIG. FIG. 1 is a plan view of a pachinko machine. FIG. 2 is a rear view of the pachinko machine. This is a front perspective view of a pachinko machine. This is a perspective view of a pachinko machine seen from behind. This is an oblique view of a pachinko machine viewed from the front with the door frame open from the main frame and the main frame open from the outer frame. This is an exploded oblique view of a pachinko machine viewed from the front, disassembled into a door frame, a game board, a main frame, and an outer frame. This is an exploded oblique view of a pachinko machine disassembled into a door frame, a game board, a main body frame, and an outer frame, viewed from the rear. FIG. 2 is a front view showing an example of a game board. This is an oblique view of the game board from the front right. This is an oblique view of the game board from the front left. This is a perspective view of the game board from behind. This is an exploded perspective view of the game board, broken down into its main components, as seen from the front. This is an exploded perspective view of the game board disassembled into its main components and viewed from behind. This is a front view of the front components and front unit of the game board cut at approximately the center in the front-to-back direction within the game area. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. A diagram showing the configuration inside the main control MPU. A diagram showing the configuration of an arithmetic circuit in the main control MPU. FIG. 2 is a diagram illustrating a configuration of a serial communication circuit. 13 is a flowchart illustrating an example of an initialization process. 22 is a flowchart showing a continuation of the initialization process of FIG. 21 . 13 is a flowchart illustrating an example of a timer interrupt process. 13 is a flowchart showing an example of a role-playing device ratio calculation and display process. 25 is a flowchart showing the continuation of the reel ratio calculation and display process of FIG. 24. A diagram showing an example of the arrangement of programs (code) and data stored in the ROM and RAM built into the main control MPU. A diagram showing the structure of data stored in the reel ratio calculation area. A diagram showing the configuration of a role ratio display device. FIG. 2 is a diagram showing a configuration of a driver circuit. FIG. 4 is a timing diagram of data input to a driver circuit. FIG. 2 is a diagram showing an example of a main control board implementation. A diagram showing the positional relationship between the main control MPU and the reel ratio display. FIG. 13 is a diagram showing a load register selection table. FIG. 13 is a diagram showing a character generator decode table. FIG. 4 is a state transition diagram of a driver circuit. FIG. 13 is a diagram showing an example of the display of the role ratio. FIG. 13 is a diagram showing an example of the display of the role ratio. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. 13 is a flowchart illustrating an example of a base calculation area update process. 13 is a flowchart showing an example of a base calculation and display process. A figure showing an example of the timing of updating the number of prize balls and the timing of calculating the base value. A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. A figure showing another example of the timing of updating the number of prize balls and the timing of calculating the base value. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a diagram showing a structure of data stored in a base calculation area. FIG. FIG. 11 is a front view showing another example of a game board. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart showing another example of the base calculation and display process. 6 is a flowchart showing an example of a peripheral control unit power-on process; 13 is a flowchart showing an example of a peripheral control unit V blank interrupt process. 13 is a flowchart showing an example of a peripheral control unit 1 ms timer interrupt process. 13 is a flowchart illustrating an example of a display selection process. FIG. 11 is a diagram illustrating an example of a display selection table. FIG. 11 is a diagram illustrating an example of a display selection table. FIG. 11 is a diagram illustrating an example of a display selection table. FIG. 11 is a diagram illustrating an example of a display selection table. FIG. 11 is a diagram illustrating an example of a display selection table. FIG. 13 is a diagram showing an example of a display screen. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart showing another example of the base calculation and display process. 13 is a flowchart illustrating an example of a base calculation area update process. 13 is a flowchart showing another example of the base calculation area update process. 13 is a flowchart illustrating an example of a timer interrupt process. 13 is a flowchart showing an example of a base calculation process 1. 13 is a flowchart showing an example of a base calculation process 2. 13 is a flowchart showing another example of the base calculation process 1. 13 is a flowchart showing another example of the base calculation process 2. 13 is a flowchart showing another example of the timer interrupt process. 13 is a flowchart showing an example of a base calculation process 3. 13 is a flowchart showing an example of a base calculation process 4. 13 is a flowchart illustrating an example of a base display process. 13 is a flowchart showing another example of the base calculation process 3. 13 is a flowchart showing another example of the base calculation process 4. 13 is a flowchart showing another example of the base display process. 1 is a block diagram showing an outline of the control configuration of a pachinko machine. A diagram showing the arrangement of the frame side discharged ball sensor. A diagram showing the arrangement of the frame side discharged ball sensor. A diagram showing an example of connection between the discharged ball sensor and the main control board. FIG. 2 is a front view showing an example of a game board. FIG. 2 is a diagram showing a configuration of a main control input circuit. FIG. 2 is a diagram showing an example of a main control board implementation. FIG. 2 is a diagram showing an example of a main control board implementation. FIG. 2 is a diagram showing an example of a main control board implementation. FIG. 2 is a diagram illustrating an example of the configuration of a main control I/O port. FIG. 2 is a diagram illustrating an example of the configuration of a main control I/O port. A timing diagram for an example configuration of the main control I/O port shown in Figure 97. FIG. 13 is a diagram showing changes in state (section) for calculating a base value. FIG. 13 is a diagram showing an example of characters displayed on the base display. 13 is a flowchart illustrating an example of an initialization process. 102 is a flowchart showing the continuation of the initialization process of FIG. 101 . FIG. 13 is a diagram showing a configuration of a base calculation area. 13 is a flowchart illustrating an example of a timer interrupt process. 13 is a flowchart illustrating an example of a base calculation process. 106 is a flowchart showing the continuation of the base calculation process in FIG. 105 . 13 is a flowchart illustrating an example of a base display data generation process. 13 is a flowchart showing a modified example of the base calculation process. FIG. 13 is a diagram showing the calculation of the base when the game state is switched. A diagram showing the configuration related to the memory area of the internal configuration of the main control MPU 1311. FIG. 13 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. FIG. 13 is a diagram illustrating an example of a program for timer interrupt processing and base calculation processing. A diagram showing an example of the arrangement of programs (code) and data stored in the ROM and RAM built into the main control MPU. FIG. 2 is a diagram showing an example of a gaming history recorded in a gaming machine. FIG. 13 is a diagram illustrating an example of an error screen. FIG. 13 is a diagram illustrating an example of an error signal. FIG. 13 illustrates an example of an error. FIG. 13 illustrates an example of an error. FIG. 13 illustrates an example of an error. 6 is a flowchart showing an example of a peripheral control unit power-on process; FIG. 13 is a diagram showing an example of a game history recording condition setting table. FIG. 2 is a diagram showing an example of a gaming history. 2 is a block diagram showing the configuration of a peripheral control board and its surroundings. FIG. FIG. 2 is a block diagram showing the peripheral configuration of a peripheral control SRAM; FIG. 13 is a diagram showing a modified example of the game history recording condition setting table. FIG. 13 is a diagram showing a modified example of the game history. FIG. 13 is a diagram showing a modified example of the game history. FIG. 13 is a diagram showing a modified example of the game history. A block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. This is an oblique view of a pachinko machine having a setting unit, seen from behind with the door open. This is an oblique view of the pachinko machine shown in Figure 130 from behind with the doors closed. A diagram showing the setting section of the pachinko machine shown in Figure 130. FIG. 13 is a diagram showing a modified example of the setting unit. A block diagram showing an outline of the control configuration of a pachinko machine having a setting unit. This is an oblique view of a game board having a setting section seen from behind. This is an oblique view from behind of a pachinko machine equipped with the game board shown in Figure 135. 13 is a flowchart illustrating an example of an initialization process. 11 is a flowchart showing an example of a setting change process and a setting display process. 11 is a flowchart showing an example of a setting change process and a setting display process. 13 is a flowchart showing an example of a procedure for special symbol and special electric device control processing. 13 is a flowchart showing an example of a procedure for waiting for a special pattern change. 13 is a flowchart showing an example of a procedure for setting a special symbol variation pattern. 13 is a flowchart showing an example of a procedure for a variation pattern selection determination process. (A) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a miss. (B) is an example of a variation pattern table selected when the game state is normal and the result of the special lottery is a jackpot. This is an overview diagram showing an example of a presentation executed in miss variation patterns 20 and 24 to 29 in the variation pattern table of Figure 144 (A). This is an overview diagram showing an example of a presentation executed in miss variation patterns 1, 2, and 30 in the variation pattern table of Figure 144 (A). This is an overview diagram showing an example of a presentation executed in miss variation pattern 31 and win variation pattern 34 in the variation pattern table of Figure 144 (A). This is an overview diagram showing an example of a presentation executed in miss fluctuation pattern 32 and hit fluctuation pattern 35 in the fluctuation pattern table of Figure 144 (A). (A) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a miss. (B) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a jackpot. FIG. 2 is a diagram showing an example of a main control board implementation. FIG. 13 is a diagram showing another implementation example of the main control board. This is a cross-sectional view of A-A' in Figure 151 (B). FIG. 13 is a diagram showing another implementation example of the main control board. 13 is a flowchart illustrating an example of an initialization process. 13 is a flowchart illustrating an example of a timer interrupt process. 13 is a flowchart illustrating an example of a setting confirmation process. FIG. 4 is a timing diagram of a security signal. 13 is a flowchart showing another example of the initialization process. 13 is a flowchart showing another example of the setting confirmation process. 13 is another example of a fluctuation pattern table. 13 is an example of a final reserved color table. This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 1 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 3 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. This is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 5 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. 13 is an example of a preview performance table. 13 is an example of a dialogue presentation table. This is another example of a preview performance table. 13 is an example of a setting suggestion presentation table. An explanatory diagram showing an example of an overview of the setting suggestion presentation. An explanatory diagram showing an example of an outline of a setting suggestion effect as a pre-reading effect. 13A is an example of a performance restriction table in the setting confirmation mode, and FIG. 13B is an example of a performance restriction table when an error occurs. 13 is an example of a new start winning performance restriction table. 3 is an example of a processing table 1. 4 is an example of a processing table 2. 3 is an example of a processing table 3. 4 is an example of a processing table 4. 4 is an example of a processing table 5. 4 is an example of a processing table 6. 13 is a flowchart of a power-on process in a first modification; 13 is a flowchart of a power-on process in a first modification; 13 is a flowchart of a timer interrupt process according to a first modification; 13 is a flowchart of a timer interrupt process according to a first modification; 13 is a flowchart of a performance display process according to a first modified example. FIG. 13 is a diagram showing a notification mode of a first modified example. FIG. 13 is a diagram showing notification priorities in a first modified example. 13 is a flowchart of a power-on process in a first modification; 13 is a flowchart of a power-on process in a first modification; 13 is a flowchart of a main process on the main control side in the first modification. 13 is a flowchart of an initialization process when a RAM abnormality occurs according to a first modified example. 13 is a flowchart of a timer interrupt process according to a first modification; 13 is a flowchart of a timer interrupt process according to a first modification; 13 is a flowchart of a setting process of a first modified example. 13 is a flowchart of a setting display process of a first modified example. 13 is a flowchart of a power-on setting process according to a first modification; 13 is a flowchart of a random number update process 2 of the modified example 1. 13 is a flowchart of a timer interrupt process according to a first modification; 13 is a flowchart of a switch input process 1 according to a first modification. Figure 198 (A) is a diagram showing an example of the configuration of a switch winning information data table in variant 1, and Figure 198 (B) is a diagram showing an example of the configuration of a switch input level/edge data area in variant 1. Figure 199 (A) is a diagram showing another example of the configuration of the switch winning information data table of variant 1, and Figure 199 (B) is a diagram showing another example of the configuration of the switch input level/edge data area of variant 1. 13 is a flowchart of a setting change/confirmation process of a first modified example. FIG. 201A is a diagram showing a configuration example of a switch input port 2 of the modified example 1, and FIG. 201B is a diagram showing a configuration example of a setting status management area of the modified example 1. Figure 202 (A) is a diagram showing an example of the configuration of a power-on operation command of alternative example 1, Figure 202 (B) is a diagram showing an example of the configuration of a power-on state command of alternative example 1, Figure 202 (C) is a diagram showing an example of the configuration of a power-on return destination command of alternative example 1, and Figure 202 (D) is a diagram showing an example of the configuration of a setting value command of alternative example 1. FIG. 13 is a diagram showing a command transmission order in the first modification. FIG. 13 is a diagram showing state transitions of a setting state management area in Modified Example 1. 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. 13 is a time chart from the start to the end of a setting confirmation mode in Modified Example 1. 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. 13 is a time chart from the start to the end of a setting change mode in Modified Example 1. A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. A figure showing an example of the configuration of a jackpot determination threshold table for variant 1. 13 is a flowchart of a power-on process in a second modification. 13 is a flowchart of a power-on process in a second modification. 13 is a flowchart of a setting value confirmation process of a second modification. 13 is a flowchart of the RAM outside the game area confirmation process when the power is turned on in another example 2. 13 is a flowchart of processing when an abnormality occurs in the RAM outside the game area in Example 2. 13 is a flowchart of an outside-area RWM initialization process according to a second modification; 13 is a flowchart of a power-on setting process according to a second modification; Figure 220 (A) is a diagram showing an example of the configuration of a setting status management area in variant 2, Figure 220 (B) is a diagram showing an example of the configuration of a power-on operation command in variant 2, and Figure 220 (C) is a diagram showing an example of the configuration of a power-on status command in variant 2. 13 is a flowchart of the main processing on the main control side of the modified example 2. 13 is a flowchart of a process when the power is turned off in the second modification. 13 is a flowchart of a timer interrupt process according to a second modification; 13 is a flowchart of a setting process in a second modification; 13 is a flowchart of a setting display process of a second modification. 13 is a flowchart of a power-on process according to a third modification. 13 is a flowchart of a power-on process according to a third modification. 13 is a flowchart of the main processing on the main control side of modification 3. 13 is a flowchart of a timer interrupt process for a setting change process of a third modified example. 13 is a flowchart of a timer interrupt process for normal play in Example 3. 13 is a flowchart of the main processing on the main control side of the modified example 4. 13 is a flowchart of a timer interrupt process for a setting change process of a fourth modified example. This is an exploded oblique view of the center gimmick and front performance unit of the front unit of the game board, viewed from the front. This is a front view showing the first image being illuminated on the front performance unit. This is a front view showing the second image being illuminated on the front performance unit. 1A and 1B are diagrams illustrating a structure of a light guide plate. 5A and 5B are diagrams illustrating a structure of a reflecting portion provided on a light guide plate. 5A and 5B are diagrams illustrating a structure of a reflecting portion provided on a light guide plate. 1A and 1B are diagrams illustrating a structure of a light guide plate. 11A and 11B are diagrams showing examples of images projected onto a light guide plate. 11A and 11B are diagrams showing examples of images projected onto a light guide plate. 11A and 11B are diagrams showing examples of images projected onto a light guide plate. 1A and 1B are diagrams illustrating a structure of a light guide plate. 11A and 11B are diagrams showing examples of images projected onto a light guide plate. 11 is a diagram illustrating a state in which a picture is displayed in a planar view by a light guide plate. FIG. 11 is a diagram illustrating a state in which a picture is displayed in a planar view by a light guide plate. FIG. 11A and 11B are diagrams illustrating how a picture that is stereoscopically viewed is displayed by a light guide plate. 11A and 11B are diagrams illustrating how a picture that is stereoscopically viewed is displayed by a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. 1A to 1C are diagrams illustrating an example of a display effect using a light guide plate. FIG. 11 is a circuit diagram of the periphery of the synchronous serial interface of the main control board. FIG. 2 is a circuit diagram showing a connection between a serial-parallel conversion circuit and an LED. A diagram showing the arrangement of the main control MPU and peripheral components on the main control board. FIG. 2 is a diagram showing the arrangement of ports in the main control MPU. FIG. 2 is a diagram showing the timing of data output and capture by a synchronous serial signal. A diagram showing another arrangement of the main control board in the main control board box. A diagram showing another arrangement of the main control board in the main control board box. FIG. 1 is a perspective view of a slot machine. 1 is an oblique view of the slot machine with the front member open. A block diagram showing the configuration of various mechanical elements, electronic devices, operating members, etc. equipped in the slot machine. 2 is a diagram showing details of a ROM area and storage areas provided by a ROM, a RAM, etc. in the present embodiment; FIG. FIG. 2 is a diagram showing details of a RAM area in the present embodiment. A diagram showing the structure of data stored in the reel ratio calculation area. 4 is a diagram showing details of a parameter information setting area in the present embodiment. FIG. 13 is a flowchart illustrating a procedure of a system reset start-up process executed when the slot machine is reset. 13 is a flowchart showing a procedure of a periodic process. 13 is a flowchart showing a procedure for an information signal N output process. 13 is a flowchart of an initialization process according to a fifth modified example. A flowchart showing the continuation of the initialization process of variant 5 of Figure 274. 13 is a flowchart showing a timer interrupt process according to a fifth modification; A diagram illustrating an example of winning information transmitted from the main control board to the ball information control board. A diagram illustrating an example of a table that defines the number of winning balls corresponding to each winning slot. This figure shows an example of when the number of winning balls is included in the winning information, where (A) is the case when the number of winning prizes is tallied for each general winning slot, and (B) is the case when the number of winning prizes is tallied by aggregating all general winning slots. FIG. 13 is a diagram showing an example in which winning information is stored in order of winning. 11A and 11B show an example of game information transmitted from the main control board to the ball information control board, where (A) is an example of winning information, and (B) is an example of main control recognition information. A figure showing another example of game information transmitted from the main control board to the ball information control board. A diagram explaining the communication between the main control board and the ball information control board when the gaming machine is started. This figure shows a case in which there is no response from the ball information control board to a notification from the main control board in communication between the main control board and the ball information control board. This figure shows another example of communication between the main control board and the ball information control board, in which there is no response from the ball information control board to a notification from the main control board. A figure showing an example of a memory area allocated to the main control built-in RAM in game control. A figure showing an example of a data area included in the input information storage area, where (A) shows the input edge data 1 area (INPUT_EDG1) and (B) shows the prize ball determination area (PAY_JDG_AR). 11 is a flowchart showing an example of a procedure for a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine. 13 is a flowchart explaining the steps of the process for opening the large prize opening. 13 is a timing chart explaining the processing of each component when a gaming ball enters a large prize opening. 13 is a timing chart explaining the processing of each component when a gaming ball enters the second starting hole. This is a timing chart explaining the processing of each component when a gaming ball enters a probability change area (V-AT area). FIG. 1 is a diagram for explaining an outline of a bit transfer procedure. FIG. 13 is a diagram showing an example of the configuration of an instruction code for executing a bit transfer instruction. FIG. 11 is a diagram illustrating an example of a type of bit transfer instruction. FIG. 13 is a diagram showing an example of a flowchart of a process using a bit transfer instruction "RBT." FIG. 297 is a diagram showing an example of a program corresponding to the flowchart (FIG. 296) of a process using the bit transfer instruction "RBT." 1 is a flowchart showing an example of an index creation process as a subroutine, in which (A) is a process that calls the index creation process, and (B) is the subroutine index creation process. FIG. 2 is a diagram illustrating an example of a table structure. FIG. 13 is a diagram for explaining the detailed procedure of a bit transfer command, and is a diagram for explaining a case where a single piece of data is read out from a reference table. FIG. 13 is a diagram for explaining the detailed procedure of a bit transfer command, and is a diagram for explaining a case where data is continuously read out from a reference table. 1A and 1B are diagrams for explaining a bit transfer command for data larger than 1 byte in size, where FIG. 1A shows a table to be referenced and FIG. 1A and 1B are diagrams illustrating an example of application of a bit transfer command, in which (A) is a diagram illustrating the relationship between a fluctuation pattern and a corresponding range, (B) is program code showing a fluctuation pattern table, and (C) is a diagram illustrating an example of the structure of the table before and after compression for the fluctuation pattern table corresponding to (B). 13 is a flowchart showing an example of a procedure for selecting a variation pattern. A figure showing an example of a program for selecting a variation pattern. A figure showing an example of an address map showing the configuration of the memory area of the main control board of the gaming machine. FIG. 13 is a diagram showing an example of a program implementation of a processing address table in which addresses of processes (subroutines) are stored. FIG. 13 is a diagram illustrating an example of program code that defines an index for identifying a process stored at an address stored in a process address table. FIG. 13 is a diagram for explaining the operation when an INVD command is executed. FIG. 13 is a diagram illustrating a procedure for identifying a process to be called by an INVD command. FIG. 13 is a diagram illustrating an example of a program for a port read process (PORT_RD). FIG. 13 is a diagram illustrating an example of a program for data setting processing (DAT_SET). FIG. 13 is a diagram showing an example program of work area setting process 1 (WORK_AD); FIG. 13 is a diagram showing an example of a program for work area setting process 2 (WORK_AD_INC_HL). FIG. 13 is a diagram showing an example of a program for 2-byte data search processing (LD_HLA_HL). A figure showing example programs for the jackpot information command setting process (TDINF_CMBF_SET), command buffer setting process 1 (CMBF_SET1), and command storage process (COM_SET). FIG. 13 is a diagram showing an example of a program for output determination common process 1 (OHAN_SUB1). FIG. 13 is a diagram illustrating an example of a program for output determination common process 2 (OHAN_SUB2). FIG. 13 is a diagram illustrating an example of a program for output port data setting processing (PORT_DAT_SET). A figure showing an example program of variable information number search processing (TI_SRCH). FIG. 13 is a diagram showing an example program of the fraud notification setting process (ILG_OUTSET). FIG. 13 is a diagram showing an example of a program for data search processing (HLA_SRCH). FIG. 13 is a diagram illustrating an example of a program for multiplication value addition address acquisition processing (MUL_WA_HL). FIG. 13 is a diagram showing an example of a program for SPI 2-byte output processing (SPI_TX_WA). 13A and 13B are diagrams showing excerpts of a program that calls processes using the INVS command, in which (A) is a program excerpt of the portion that calls the solenoid drive process and the motor drive process, (B) is an example program (part) of the solenoid drive process, and (C) is an example program (part) of the motor drive process. FIG. 13 is a diagram illustrating the procedure of an INVI command. 1A and 1B are diagrams showing an example of a PSW, in which FIG. 1A illustrates the configuration of the PSW, and FIG. 1A and 1B are diagrams showing example programs for explaining the arrangement of processes called by an INVI command, in which (A) shows an example program of an area from which the processes are read, and (B) shows an example program of the actual processes. 11 is a flowchart showing an example of a timer interrupt process using various process calling instructions. 13 is a flowchart showing the procedure for processing when a game is stopped during timer interrupt processing. 13 is an example of program code for processing when game play stops during timer interrupt processing. A figure showing an example of a memory map of the program/data area in the ROM area of the main control board of the gaming machine. A figure showing an example of program code for a fluctuation pattern selection process (Hp_select). FIG. 2 is a diagram showing an example of a mounting diagram of a main control board of the gaming machine of the present embodiment. A block diagram of the configuration for performing SPI communication with the main control MPU 1311 of the gaming machine of this embodiment. A figure explaining the operating mode of SPI communication in the gaming machine of this embodiment. This figure explains the configuration of various registers for setting up SPI communication in the gaming machine of this embodiment, where (A) is control register 1 (SPICNA0), (B) is control register 2 (SPICNA1), and (C) is prescaler registers (SPICPSA0, SPICPSA1, SPICPSA2, SPICPSA3). 1 is a time chart showing the state from when the gaming machine of this embodiment is initialized to when SPI communication can be started. 2 is a diagram illustrating a configuration of an SPI communication B buffer register in this embodiment. FIG. 13 is a diagram showing an example of SPI common output setting data (SPI_COMTX_B) of the present embodiment. FIG. This is a circuit diagram focusing on the configuration for receiving signals via SPI communication in the gaming machine of this embodiment. 10 is a flowchart showing an example of a procedure for a switch input process for acquiring information detected by a sensor or the like provided in the gaming machine of the present embodiment. A figure showing an example of program code for switch input processing in this embodiment, corresponding to the flowchart in Figure 342. 13 is an example of a program code of setting data (SPI input setting data; SPI_SWRX_B) when starting reception of an input signal through SPI communication in this embodiment. 13 is an example of a program code of setting data (SPI restart setting data; SPI_RESTART_B) when initializing a communication circuit for SPI communication in the present embodiment. 5A to 5C are diagrams illustrating an example of SPI switch input information data according to the embodiment. 4 is a diagram showing an example of the configuration of an area for storing level data and edge data according to the embodiment; FIG. 11 is a flowchart illustrating an example of a procedure for SPI twice read processing (TWICE_SPI) according to the present embodiment. A figure showing an example of program code for the SPI twice read processing (TWICE_SPI) of this embodiment, which corresponds to the flowchart of Figure 348. 5 is a flowchart showing the steps of a level/edge data creation process according to the embodiment. A figure showing an example of program code for the level/edge data creation process of this embodiment, corresponding to the flowchart of Figure 350. 4 is a time chart showing a process from the start of a switch input process to the completion of data transmission by SPI communication in the present embodiment in chronological order. 11 is a time chart showing a process in chronological order from the completion of data transmission by SPI communication to the start of the switch input processing by the next timer interrupt in the switch input processing of the present embodiment. 13 is a flowchart showing the procedure of a game-playable time process executed in the timer interrupt process of this embodiment. A figure showing an example of program code for processing when play is possible in this embodiment, and corresponds to the flowchart in Figure 354. This figure shows an example of a circuit diagram that shows the configuration in the gaming machine of this embodiment, from inputting signals output from the contact detection sensor (touch sensor) and the firing stop switch (firing stop button) to the main control MPU. 5 is a flowchart showing a procedure of a switch-related control process according to the embodiment; 4 is a diagram illustrating a data structure of history area creation data according to the embodiment. FIG. FIG. 11 is a diagram showing an example of history area creation data according to the embodiment; A diagram showing the configuration of an area (data area) for storing signals input to the main control MPU 1311 in this embodiment. 11 is a flowchart showing a procedure for a history monitoring switch data creation process according to the embodiment; 362 is an example of program code for the history monitoring switch data creation process of this embodiment, and corresponds to the flowchart of FIG. 361. 11 is a diagram illustrating a flow of creating history monitoring switch data according to the present embodiment. FIG. 11 is a diagram illustrating a data structure of switch history command transmission determination data according to the embodiment. FIG. 11 is a diagram illustrating an example of switch history command transmission determination data according to the embodiment. FIG. 11 is a diagram illustrating an example of switch history command transmission determination data corresponding to input edge data of the present embodiment. FIG. 11 is a flowchart showing a procedure for a switch history command transmission determination process according to the present embodiment. 368 is an example of program code for the switch history command transmission determination process of this embodiment, and corresponds to the flowchart of FIG. 367. 2 is a diagram showing an example of the configuration of an internal function register of a main control MPU of the present embodiment. FIG. A figure showing an example of history area creation data for random number clock errors stored in an internal function register of the main control MPU of this embodiment. FIG. 13 is a diagram illustrating an example of applying the switch history command transmission determination data of the present embodiment to an internal function register (random number clock error); 4 is a diagram illustrating a data structure of switch passing command data according to the present embodiment. FIG. 11 is a diagram illustrating an example of switch passing command data according to the embodiment. FIG. FIG. 4 is a diagram illustrating an example of switch address data according to the embodiment. 13 is a diagram showing another example of switch passing command data according to the embodiment; FIG. 10 is a flowchart illustrating a procedure for a switch passing command transmission process according to the present embodiment. 377 is an example of program code for a switch passing command transmission process according to this embodiment, and corresponds to the flowchart of FIG. 376. 5 is a flowchart showing the procedure of a safe switch abnormality determination process according to the present embodiment. This is an example of program code for the safe switch abnormality determination processing of this embodiment, and corresponds to the flowchart of Figure 378. 1 is a block diagram showing an example of a connection form of connection lines that supply power to various boards that control the gaming machine of the present embodiment. FIG. 11A to 11C are diagrams showing an example of an operation for executing a setting function of the gaming machine of the present embodiment. 4 is a flowchart of the processing performed when the gaming machine of this embodiment is turned on. 5 is a flowchart showing a procedure for a power-on startup confirmation process according to the embodiment; 10 is a flowchart showing the procedure of a RAM clear determination process according to the present embodiment. This is an example of program code for the RAM clear determination process of this embodiment, and corresponds to the flowchart of Figure 384. 5 is a flowchart showing the procedure of a setting value confirmation process according to the present embodiment. 387 is an example of program code for the setting value confirmation process of this embodiment, and corresponds to the flowchart of FIG. 386. 13 is an example of program code corresponding to the definition of a memory area related to a power interruption flag in this embodiment. 13 is an example of program code corresponding to the definition of setting values related to settings of the gaming machine of this embodiment. 5 is a flowchart showing the procedure of a setting operation determination process according to the present embodiment. This is an example of program code for the setting operation determination process of this embodiment, and corresponds to the flowchart of Figure 390. 4 is a flowchart showing a procedure for a disconnection/short circuit abnormality determination process according to the present embodiment. This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and the power supply is resumed after the wiring is reconnected, resulting in an unauthorized act of performing a setting confirmation operation. This is a timing chart that explains the control that occurs when the power supply is cut off by disconnecting the wiring connected to the main control board of this embodiment, and the power supply is resumed after the wiring is reconnected, resulting in an unauthorized act of executing a setting change operation. This is a timing chart that explains the control when the wiring connected to the main control board of this embodiment is disconnected but the power supply is not cut off, the wiring is reconnected, and when the power is turned back on, a setting change operation is performed to resume play. 13 is a timing chart explaining the control when wiring connected to the main control board is disconnected and then reconnected during the occurrence of a weak error in the gaming machine of this embodiment. 13 is a timing chart explaining the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. 11 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a first operation. 11 is a timing chart illustrating an example of control when the gaming machine of this embodiment is powered on by executing a second operation. A figure showing an example of a command transmitted from the main control board to the peripheral control board in the gaming machine of this embodiment. A figure showing an example of a screen transition when transitioning to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. A figure showing an example of a screen transition when the time-saving state ends in the gaming machine of this embodiment. FIG. 13 is a diagram showing a modified example of the game board of the gaming machine of the present embodiment. A figure showing an example of a counting ball entry port arranged on the game board 5 of the gaming machine of this embodiment. A figure showing a cross-sectional view of an example of a counting ball entrance unit arranged on a modified version of the game board of the gaming machine of this embodiment. 13A and 13B are diagrams showing the movement path of game balls when the counting ball entrance unit of a modified example of this embodiment is in a ball entrance permission state, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view. 13A and 13B are diagrams showing the movement path of the game ball when the counting ball entry unit of a modified example of this embodiment is in a ball entry disallowed state, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view. 13 is a timing chart showing changes in the time-saving transition count in a modified example of the gaming machine of the present embodiment. This is a timing chart when the second starting winning port functions as a counting ball winning port in a modified example of the gaming machine of this embodiment. 11 is a flowchart illustrating the steps of a state transition determination process for determining whether or not to transition to another gaming state in the gaming machine of this embodiment. 4 is a flowchart showing the procedure of a state transition process according to the present embodiment. FIG. 4 is a diagram illustrating an example of state transition data according to the present embodiment. 4 is a diagram illustrating an example of the configuration of a work area for storing state transition data according to the present embodiment; FIG. FIG. 13 is a diagram showing a modified example of state transition data according to the embodiment. 13 is a timing chart explaining the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. A figure showing an example of the arrangement of values stored in a memory area provided by the main control RAM of the gaming machine of this embodiment. 13A to 13C are diagrams illustrating the operation of the RAM clear switch in the gaming machine of this embodiment and the memory areas that are cleared when a RAM abnormality occurs. A figure showing an example of setting data at the time of transition to the first interval before a jackpot, which is set when transitioning to a jackpot gaming state upon winning a special lottery in the gaming machine of this embodiment. A figure showing an example of large prize opening closure setting data that is set when closing the large prize opening during a large prize game state of the gaming machine of this embodiment. This is a sample module that performs initial settings based on the special prize opening closure setting data in the gaming machine of this embodiment. FIG. 13 is a diagram illustrating an example of a program for data initialization processing (DAT_SET_CLR) according to the present embodiment. This is a sample module that performs initial settings in the gaming machine of this embodiment using conventional procedures based on the special prize opening closure setting data. A figure showing an example of a setting state management area and values set in the setting state management area in the gaming machine of this embodiment. A figure showing an example of a table for selecting initialization setting data when initializing the gaming machine of this embodiment. 11 is a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. 13 is a modified example of a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. FIG. 4 is a block diagram showing a control configuration of a peripheral control board. 1 is an example of a memory map of storage areas accessed by a VDP. A diagram explaining the allocation of memory areas provided by the performance data ROM. 6 is a flowchart showing a process executed when the peripheral control board is powered on. A figure showing an example of the configuration of modules etc. used in presentation control by the peripheral control board of the gaming machine of this embodiment. This is a diagram explaining an overview of the presentation control of the first half of the fluctuation pattern "10H03H" (normal fluctuation 12 seconds). A figure showing an example of a function in the presentation control of the gaming machine of this embodiment. 1A and 1B are diagrams for explaining the mechanism of lenticular-type 3D display, in which (A) shows the area viewed by the left eye (L) and (B) shows the area viewed by the right eye (R). A figure showing an example of a lenticular image in the gaming machine of the present embodiment. 1A and 1B are diagrams for explaining the arrangement of images stored in an image data area, in which (A) shows the arrangement of the entire image data area, and (B) shows the details of the arrangement of an area for storing 3D images. A figure explaining the arrangement of layers on which images displayed on the performance display device of the gaming machine of this embodiment are drawn. A figure explaining the procedure for writing an image to be displayed on the performance display device of the gaming machine of this embodiment into a frame buffer. 13 is a diagram illustrating a procedure for synthesizing a 3D image in which a left-eye image and a right-eye image are arranged side-by-side with a side-by-side 2D image (such as a background image) to generate a 3D display image (lenticular image). 11 is a diagram illustrating the procedure for creating image data for a 3D display effect in the gaming machine of this embodiment. FIG. FIG. 1 is a diagram illustrating a first method for generating a side-by-side image. FIG. 13 is a diagram illustrating a second method for generating a side-by-side image. FIG. 13 is a diagram illustrating a third method for generating a side-by-side image. FIG. 13 is a diagram illustrating a procedure for synthesizing a full-screen image from a side-by-side image. FIG. 13 is a diagram showing an example of a layer structure in the case where there is a single 3D layer. 44 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. FIG. 13 is a diagram showing an example of a layer structure in the case where there are multiple 3D layers. 447 is a flowchart for explaining the procedure for drawing on each layer in the layer structure of FIG. 446. A figure showing an example of a screen in the effect selection mode of the gaming machine of this embodiment. 11A to 11D are diagrams illustrating the procedure for using images for 3D display presentation in the 2D display presentation mode in the gaming machine of this embodiment. A flowchart showing the procedure for using images for 3D display presentation in the 2D display presentation mode shown in Figure 449. A figure showing an example of an abnormality notification screen that is displayed when an abnormality occurs during execution of a 3D display performance. 13 is a timing chart showing the state of each component when the power supply to the main control board is cut off during a 3D display performance. A figure showing an example of a screen transition when the power supply to the main control board is cut off during a 3D display performance. This is a timing chart showing the state of each component when the power supply to the peripheral control board is cut off during a 3D display performance during a jackpot game state. A figure showing an example of a screen transition when the power supply to the peripheral control board is cut off during a 3D display presentation during a jackpot game state. FIG. 2 is a diagram showing an example of a structure for storing frame data for generating a moving image. 11 is a graph showing the relationship between the interval at which one reference frame data is arranged and the amount of data. FIG. 13 is a diagram showing an example of the arrangement of areas displaying images. 13 is a diagram for explaining images corresponding to each region, with the upper part showing images corresponding to each region, and the lower part showing a display image generated as a result of drawing images corresponding to all regions. 1 is a table showing configuration information of each area. FIG. 2 is a diagram for explaining the chronological relationship of each layer. FIG. 2 is a diagram illustrating a first procedure for generating a moving image. FIG. 13 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated in the first procedure. 13 is a diagram showing an example of the arrangement intervals of reference frame data when generating a moving image in the second procedure. FIG. FIG. 11 is a diagram illustrating a second procedure for generating a moving image. FIG. 11 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated in the second procedure. 11 is a diagram for explaining the capacity of a decode buffer required when a moving image is generated by combining the first and second procedures. FIG. FIG. 4 is a diagram showing an example of image management information. FIG. 1 is a block diagram illustrating a configuration for testing an external RAM. FIG. 13 is a diagram illustrating an example of a command for testing an external RAM. FIG. 13 is a diagram illustrating registers that are set by the RAM diagnostic circuit to perform testing of an external RAM. 13 is a flowchart showing a procedure for an external RAM inspection process (glitch margin check) in a boot program. 11 is a flowchart showing a procedure for an external RAM inspection process (R/W test) in the peripheral control program. 11 is a flowchart showing a procedure for an external RAM inspection process (glitch margin check and R/W test) executed after power-on. 10 is a diagram illustrating the types of winnings of the gaming machine of this embodiment. FIG. 13A and 13B are diagrams explaining the random numbers used to determine a win in the gaming machine of this embodiment, where (A) is pattern 1 and (B) is pattern 2. 11 is a flowchart showing the procedure of a fraud detection process in the gaming machine of the present embodiment. 13 is a flowchart showing the steps of the processing for detecting irregularities at a large prize opening in the gaming machine of this embodiment. 13 is a flowchart showing the procedure for a fraud notification setting process in the gaming machine of this embodiment. FIG. 13 is a diagram showing a timing chart when the first jackpot is won in the gaming machine of the present embodiment. FIG. 13 is a timing chart showing a case where a second win is won before the number of consecutive first wins reaches an upper limit in the gaming machine of this embodiment. A figure showing a timing chart when a second jackpot is won in the gaming machine of this embodiment. This is a timing chart that explains the operation of a gaming machine that is designed to maintain the gaming state when a small jackpot is won, when a gaming ball passes through a specific area when a small jackpot is won. This is a timing chart explaining the timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state (normal gaming state) when a small jackpot is won, and shows a case where the gaming ball does not pass through a specific area when a small jackpot is won. This is a timing chart explaining the timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where the gaming ball passes through a specific area after a small jackpot is won. This is a timing chart that improves the timing of updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where the gaming ball passes through a specific area when a small jackpot is won. This is a timing chart that explains the operation of a gaming machine that transitions to a non-time-saving state when a small win is won, and starts a special game state due to a big win after the special game state due to the small win ends, when a gaming ball passes through a specific area when a small win is won. 13 is a diagram explaining the types of variation pattern tables that are set when the special pattern of the gaming machine of this embodiment is displayed in a variable manner. FIG. A figure showing an example of a pattern in which a variation pattern table is selected depending on the remaining number of times up to the upper limit at which the time-saving state can occur consecutively. A figure showing an example of the type of random numbers and the range of random number values obtained when a gaming ball enters a starting hole. A figure showing an example of the range in which the result of a special lottery for each setting value of a gaming machine will be a jackpot. 13 is a flowchart showing the procedure for special symbol/special electric device control processing in the gaming machine of this embodiment. 13 is a flowchart showing the procedure for waiting for a special pattern change in the gaming machine of this embodiment. 13 is a flowchart showing the steps of a special symbol/flag setting process in the gaming machine of this embodiment. 13 is a flowchart showing the procedure for a special symbol determination process of the gaming machine of this embodiment. This is a diagram for explaining the means for determining the lottery results, where (A) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine's setting value is 6 in a high probability state, (B) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine's setting value is 1 in a high probability state, (C) is a table for determining the result of the variable display of special pattern 1 (special lottery) when the gaming machine's setting value is 6 in a high probability state, (D) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine's setting value is 6 in a low probability state, and (E) is a table for determining the result of the variable display of special pattern 2 (special lottery) when the gaming machine's setting value is 1 in a low probability state. This is a diagram that explains the process by which some bits of the random number used to determine a jackpot are changed due to factors such as noise, causing the value to change outside the range. 1A and 1B show an example of data for determining a special symbol, where (A) shows the case of special symbol 1 and (B) shows the case of special symbol 2. 13 is a diagram explaining the pattern types corresponding to the special pattern random numbers, where (A) shows the case of special pattern 1 and (B) shows the case of special pattern 2. 13 is a flowchart showing an example of a procedure for setting a special symbol variation pattern. 13 is a flowchart showing an example of a procedure for a variation pattern selection determination process. A figure showing an example of reach fluctuation pattern selection data. A diagram to explain the comparison value for activating the excessive winning ball suppression means. FIG. 13 is a diagram illustrating an example of a table showing the relationship between commands and the remaining number. 13 is a timing chart illustrating the flow of releasing a game stop by a first game stop release means. 13 is a timing chart illustrating the flow of releasing a game stop by a second game stop release means. 13 is a timing chart showing an example of control for releasing a game stop by turning the power back on when the door is opened. 13 is a timing chart showing an example of control in which the game stop is not lifted by turning the power back on when the door is closed. 13 is a timing chart showing an example of control for executing a setting change while opening a door after a game is stopped. 11 is a timing chart showing an example of control in which a setting change is executed while the door is open after a game is stopped, and the door is closed after the gaming machine is started. 13 is a timing chart showing an example of control for executing a setting change while closing the door after a game is stopped. 13 is a timing chart showing an example of control for performing setting check while opening the door after game play has stopped. 13 is a timing chart showing an example of control for performing setting check while closing the door after game play has stopped. 11 is a timing chart showing an example of control in which the opening of the door is a condition for canceling a game stop and a condition for starting a setting change.

A pachinko machine 1 according to one embodiment of the present invention will be described in detail with reference to the drawings. First, the overall configuration of the pachinko machine 1 according to this embodiment will be described with reference to Figs. 1 to 9. Fig. 1 is a front view of a pachinko machine according to one embodiment of the present invention. Fig. 2 is a right side view of the pachinko machine, Fig. 3 is a plan view of the pachinko machine, and Fig. 4 is a rear view of the pachinko machine. Fig. 5 is a perspective view of the pachinko machine as seen from the front, and Fig. 6 is a perspective view of the pachinko machine as seen from the rear. Fig. 7 is a perspective view of the pachinko machine as seen from the front with the door frame 3 open from the main frame and the main frame 4 open from the outer frame 2. Fig. 8 is an exploded perspective view of the pachinko machine disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2 as seen from the front, and Fig. 9 is an exploded perspective view of the pachinko machine disassembled into the door frame 3, game board 5, main frame 4, and outer frame 2 as seen from the rear.

The pachinko machine 1 of this embodiment is equipped with a frame-shaped outer frame 2 that is installed in an island facility (not shown) of a gaming hall, a door frame 3 that closes the front of the outer frame 2 in an openable and closable manner, a main frame 4 that supports the door frame 3 in an openable and closable manner and is attached to the outer frame 2 in an openable and closable manner, and a game board 5 that is detachably attached to the main frame 4 from the front side and is visible from the player's side through the door frame 3, and has a game area 5a into which the player shoots game balls.

As shown in Figures 8 and 9, the outer frame 2 of the pachinko machine 1 comprises an upper frame member 10 and a lower frame member 20 that are vertically spaced apart and extend horizontally, and a left frame member 30 and a right frame member 40 that connect both ends of the upper frame member 10 and the lower frame member 20 and extend vertically. The upper frame member 10, the lower frame member 20, the left frame member 30, and the right frame member 40 are formed to have the same width from front to back. Furthermore, the vertical length of the left frame member 30 and the right frame member 40 is longer than the horizontal length of the upper frame member 10 and the lower frame member 20.

The outer frame 2 also includes a panel member 50 that connects the lower ends of the left and right frame members 30 and 40 and is attached to the front side of the lower frame member 20, an upper outer frame hinge member 60 that is attached to the left end side of the upper frame member 10 when viewed from the front, and a lower outer frame hinge member 70 that is attached to the upper left end side of the panel member 50 when viewed from the front and to the left frame member 30. The upper outer frame hinge member 60 and the lower outer frame hinge member 70 of the outer frame 2 allow the main frame 4 and the door frame 3 to be attached so as to be able to open and close.

The door frame 3 of the pachinko machine 1 comprises a frame-shaped door frame base unit 100 having a rectangular external shape when viewed from the front and a through hole 111 penetrating from front to back, a tray unit 200 attached to the lower front part of the door frame base unit 100 and having an upper tray 201 and a lower tray 202 capable of storing game balls, a top unit 350 attached to the upper front part of the door frame base unit 100, a left side unit 400 attached to the left front part of the door frame base unit 100, a right side unit 450 attached to the right front part of the door frame base unit 100, and an upper tray unit 202 attached to the lower right front part of the door frame base unit 100 by penetrating the tray unit 200. The device is equipped with a handle unit 500 that can be operated by the player to shoot the game balls stored in the upper tray 201 into the game area of the game board 5, a foul cover unit 520 that is attached to the lower rear surface of the door frame base unit 100 and receives game balls that are not successfully shot into the game area and ejects them onto the lower tray 202 of the tray unit 200, a ball sending unit 540 that is attached to the lower rear surface of the door frame base unit 100 and sends the game balls on the upper tray 201 to the ball launching device 680, a glass unit 560 that is attached to the rear surface of the door frame base unit 100 and closes the through hole 111, and a security cover 580 that covers the lower rear surface of the glass unit 560.

The main body frame 4 of the pachinko machine 1 comprises a frame-shaped main body frame base 600, a portion of which can be inserted into the frame of the outer frame 2 and which can support the outer periphery of the game board 5; a main body frame upper hinge member 620 and a main body frame lower hinge member 640 which are attached to both the upper and lower ends of the left side of the main body frame base 600 when viewed from the front, and which are rotatably attached to the outer frame upper hinge member 60 and the outer frame lower hinge member 70 of the outer frame 2, respectively, and to which the door frame upper hinge member 140 and the door frame lower hinge member 150 of the door frame 3 are rotatably attached, respectively; a reinforcing frame 660 attached to the left side of the main body frame base 600 when viewed from the front; and a reinforcing frame 670 attached to the lower front part of the main body frame base 600. The game machine includes a ball launcher 680 that is attached to the right side of the main frame base when viewed from the front and locks the outer frame 2 and the main frame 4, and the door frame 3 and the main frame 4, an inverted L-shaped payout unit 800 that is attached to the rear side along the upper and left sides of the main frame base 600 when viewed from the front and pays out game balls to the player, a base unit 900 that is attached to the lower rear surface of the main frame base 600, and a back cover 980 that is attached to the rear side of the main frame base 600 so as to be able to open and close and covers the rear side of the game board 5 attached to the main frame base 600.

Inside the back cover 980, a main control unit 1300 is provided which controls the progress of the game played on the pachinko machine 1. The main control unit 1300 is provided with a bonus feature ratio display. The bonus feature ratio display 1317 is, for example, configured with a four-digit seven-segment LED. The bonus feature ratio display 1317 may also be configured with a liquid crystal display device. The bonus feature ratio display 1317 may also be provided in the payout control board unit 950, rather than in the main control unit 1300.

In addition, instead of providing a separate display device to display the role ratio, the role ratio may be displayed on the liquid crystal display device 1600, 3114, or 244. In this case, if the role ratio is constantly displayed on one of the liquid crystal displays 1600, 3114, or 244, the role ratio can be notified to the player, allowing the player to check the condition of the pachinko machine.

As described below, the bonus feature ratio can be calculated by dividing the number of bonus feature balls by the total number of bonus feature balls. For example, a pachinko machine with a high bonus feature ratio (e.g., 90%) can be said to be in good condition because it has won many prize balls from jackpots. On the other hand, a pachinko machine with a low bonus feature ratio (e.g., 10%) can be said to be in bad condition because it has won few jackpots and won few prize balls during jackpots. Therefore, players can choose a pachinko machine to play on by taking the bonus feature ratio into consideration.

The number of the reel ratio may be displayed on the main liquid crystal display device 1600 as a way to inform the player of the reel ratio. For example, if the reel ratio is 70% or more, the number is displayed in red and the frame lamp is lit red or flashes, and if it is between 69% and 30%, the number is displayed in green and the frame lamp is lit green or flashes. The number of the reel ratio should be displayed in a way that it is not mistaken for a decorative pattern. For example, it should be displayed in a position that does not overlap with the display position of the decorative pattern when it is not fluctuating, or the size of the number indicating the reel ratio should be smaller than that of the decorative pattern. The display mode may be divided into any number of stages.

The mode of the decorative pattern displayed on the main LCD display device 1600 may be changed depending on the value of the role ratio to notify the player of the role ratio. For example, if the role ratio is 70% or higher, the decorative pattern is displayed in red and the frame lamp is lit red or flashes, and if it is between 69% and 30%, the decorative pattern is displayed in green and the frame lamp is lit green or flashes. The display mode may be divided into any number of stages.

It may also be displayed on the liquid crystal display device 244 provided on the door frame 3. In this case, the display mode described above may be changed, and other information may be displayed in addition to the bonus ratio. Other information may include the number of jackpots, the number of consecutive jackpots (the number of consecutive wins), the number of balls held, the remaining balance, etc.

In addition to the role ratio, the consecutive role ratio and base value described below may be displayed in different ways as described above. The role ratio, consecutive role ratio, and base value may each be displayed in different ways.

As shown in FIG. 13, the main control unit 1300 is enclosed in a transparent resin main control board box 1320 that is sealed in such a way that once closed, it cannot be opened without being destroyed, and the components arranged on the printed board can be seen from the outside. Furthermore, for example, if the back cover 980 is made of transparent resin, the main control unit 1300 can be seen from the back side of the pachinko machine 1, and the role ratio display 1317 provided on the main control unit 1300 can be seen from the back side of the pachinko machine 1. By enclosing the role ratio display 1317 in the main control board box 1320, it is possible to prevent unauthorized modification of the role ratio display 1317 to make the gambling quality of the pachinko machine 1 appear lower, and it is possible to display the accurate gambling quality of the pachinko machine 1.

If the back cover 980 is made of opaque resin, the reel ratio display 1317 may be made visible from the back side of the pachinko machine 1 by drilling a hole in the back cover 980 at the location of the reel ratio display 1317 or by making the location of the reel ratio display 1317 transparent.

Even if the back cover 980 is made of a transparent resin, the surface of the back cover 980 at the location of the bonus ratio display 1317 may be made flat or the back cover 980 may be made thin, making it easier to see the bonus ratio display 1317 from the back side of the pachinko machine 1.

A discharge port is provided on the underside of the rear surface of the pachinko machine 1, which collects game balls that have flowed out of the game area 5a via the outlet 1111 and winning ports 2001, 2005, 2006, etc., and discharges them outside the pachinko machine 1. The game balls discharged from the discharge port are supplied to the ball tank 802 through the island equipment. The pachinko machine 1 of this embodiment is provided with a discharge ball sensor 3060 that detects game balls discharged from the discharge port.

As shown in FIG. 13, the main control unit 1300 is provided with a display switch 1318. The main control board box 1320 is provided with a hole through which the display switch 1318 can be operated. It is advisable to indicate (by printing, engraving, sticker, etc.) that the display switch 1318 is a switch for operating the display of the role ratio on the printed circuit board near the display switch 1318 or on the main control board box 1320. The display switch 1318 is preferably provided near the role ratio display 1317, but it may be provided on other boards (e.g., the performance control board 4700, the power supply unit 4112), the housing 4100, or the front member 4200, even if it is not on the main control unit 1300, as long as it is in a place where it is easy to operate. It may be provided on the peripheral control unit 1500, a relay board provided separately from the main control unit 1300, a power board in the power supply board box 930 on the frame side, or the payout control board unit 950. In addition, as described later, the display switch 1318 may also be used as a RAM clear switch. By placing the display switch 1318 in a position where the player cannot operate it, it is possible to prevent the player from operating it by mistake.

The payout unit 800 of the main frame 4 comprises an inverted L-shaped payout unit base 801 attached to the rear of the main frame base 600, a ball tank 802 attached to the top of the payout unit base 801, which is a box-shaped tank that is open upward and extends to the left and right, and which stores game balls supplied from an island facility (not shown), a tank rail 803 that is attached to the payout unit base 801 below the ball tank 802 and extends to the left and right to guide the game balls in the ball tank 802 to the left when viewed from the front, a ball guide unit 820 that is attached to the rear surface of the upper left side of the payout unit base 801 when viewed from the front and guides the game balls from the tank rail 803 downward in a serpentine shape, and a payout control board unit 95 that is detachably attached to the payout unit base 801 below the ball guide unit 820 and controls the game balls guided by the ball guide unit 820. 0, a payout device 830 that pays out balls one by one based on instructions from a payout control board 951 (see FIG. 17) housed in the payout unit base 801; an upper full ball path unit 850 that is attached to the rear surface of the payout unit base 801 and guides the game balls paid out by the payout device 830 downward and releases the game balls from either the normal release port or the full release port depending on the storage state of the game balls in the upper tray 201 of the tray unit 200; and a lower full ball path unit 860 that is attached to the lower end of the payout unit base 801 and has a normal guide path that guides the game balls released from the normal release port of the upper full ball path unit 850 forward and guides them from the front end to the through ball passage 526 of the door frame 3, and a full guide path that guides the game balls released from the full release port forward and guides them from the front end to the full ball receiving port 530 of the door frame 3.

The board unit 900 of the main body frame 4 includes a board unit base 910 attached to the rear of the main body frame base 600, a speaker unit 920 attached to the rear of the main body frame base 600 on the left side of the board unit base 910 when viewed from the front and having a low-frequency speaker 921 inside, a power supply board box 930 attached to the rear of the board unit base 910 on the right side when viewed from the front and housing a power supply board inside, an interface control board box 940 attached to the rear of the speaker unit 920 and housing an interface control board inside, and a payout control board unit 950 attached across the power supply board box 930 and the interface control board box 940 and housing a payout control board 951 that controls the payout of game balls inside.

As shown in Figures 8 and 9, the game board 5 of the pachinko machine 1 is made up of a front component 1000 having an outer rail 1001 and an inner rail 1002 that define the outer periphery of the game area 5a into which game balls are shot and guide the game balls shot from the ball launcher 680 to the upper part of the game area 5a, a flat game panel 1100 that is attached to the rear side of the front component 1000 and defines the rear end of the game area 5a, and a box-shaped game panel 1100 that is attached to the lower part of the rear side of the game panel 1100 and is open upward. It is equipped with a board holder 1200, a main control unit 1300 attached to the rear of the board holder 1200 and having a main control board 1310 for controlling the game of the pachinko machine 1, a front unit (not shown) attached in the game area 5a on the front side of the game panel 1100 and having multiple winning holes that can receive game balls shot into the game area 5a, and a back unit 3000 attached to the rear side of the game panel 1100 above the board holder 1200.

In the pachinko machine 1 of this embodiment, when game balls are stored in the upper tray 201 and the player rotates the handle lever 504, the ball launcher 680 shoots the game balls into the game area 5a of the game board 5 with a strength according to the rotation angle of the handle lever 504. When the game balls shot into the game area 5a are received by a winning hole (not shown), a predetermined number of game balls are paid out to the upper tray 201 by the payout device 830 according to the winning hole into which the game ball was received. This payout of game balls can increase the player's interest, so that the game balls in the upper tray 201 can be shot into the game area 5a, allowing the player to enjoy the game.

[2. Overall configuration of the game board]
Next, the overall structure of the game board 5 of the pachinko machine 1 will be described in detail with reference to Figures 10 to 16. Figure 10 is a front view of the game board. Figure 11 is a perspective view of the game board seen from the right front, Figure 12 is a perspective view of the game board seen from the left front, and Figure 13 is a perspective view of the game board seen from the back. Figure 14 is an exploded perspective view of the game board disassembled into its main components and seen from the front, and Figure 15 is an exploded perspective view of the game board disassembled into its main components and seen from the back. Furthermore, Figure 16 is a front view of the front components and the front unit of the game board cut at approximately the center in the front-rear direction within the play area.

The game board 5 of this embodiment has a game area 5a into which game balls are inserted by the player operating the handle lever 504 of the handle unit 500. The game board 5 also includes a front component 1000 that defines the outer periphery of the game area 5a and has a generally rectangular shape when viewed from the front, a plate-shaped game panel 1100 that is attached to the rear side of the front component 1000 and defines the rear end of the game area 5a, a board holder 1200 that is attached to the rear lower part of the game panel 1100, and a main control unit 1300 that is attached to the rear surface of the board holder 1200 and has a main control board 1310 (see FIG. 17) that controls the game content that is performed by inserting game balls into the game area 5a. A plurality of obstacle nails that come into contact with the game balls are planted in a predetermined gauge arrangement in a portion of the front of the game panel 1100 that is within the game area 5a (not shown).

The game board 5 further includes a function display unit 1400 that displays the game status based on a control signal from the main control board 1310 and is attached to the lower left corner of the front component 1000 so as to be visible to the player, a peripheral control unit 1500 that is attached to the rear of the game panel 1100, a main liquid crystal display device 1600 that is located in the center of the game area 5a when viewed from the front and is capable of displaying a predetermined performance image, a front unit 2000 that is attached to the front of the game panel 1100, and a rear unit 3000 that is attached to the rear of the game panel 1100. The main liquid crystal display device 1600 is attached to the rear of the rear unit 3000, and the peripheral control unit 1500 is attached to the rear of the main liquid crystal display device 1600.

The game panel 1100 is equipped with a transparent, flat panel plate 1110 whose outer periphery is slightly larger than the inner periphery of the frame-shaped front component 1000, and a frame-shaped panel holder 1120 that holds the outer periphery of the panel plate 1110 and is attached to the rear side of the front component 1000, with the rear unit 3000 attached to its rear surface.

The front unit 2000 is equipped with a plurality of general winning openings 2001 that are always open to receive game balls dropped into the game area 5a, a first starting opening 2002 that is always open to receive game balls at a different position in the game area 5a from the plurality of general winning openings 2001, a gate unit 2003 that is attached to a predetermined position in the game area 5a and detects the passage of the game ball, a second starting opening 2004 that is capable of receiving the game ball depending on the result of a normal lottery that is drawn when the game ball passes through the gate unit 2003, and a first large winning opening 2005 and a second large winning opening 2006 that are capable of receiving the game ball depending on the result of a first special lottery or a second special lottery that is drawn when a game ball is received at the first starting opening 2002 or the second starting opening 2004. The second large prize opening 2006 is composed of two large prize openings, the second upper large prize opening 2006a and the second lower large prize opening 2006b, which are arranged in a single flow path through which the game balls circulate (see Figure 16).

The front unit 2000 also includes a start port unit 2100 that is attached directly above the exit 1111 in the left-right center of the play area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 that is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 that is attached to the upper left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 that is attached approximately in the center of the play area 5a and has one general prize port 2001, a gate portion 2003, a second start port 2004, and a second large prize port 2006.

The rear unit 3000 is attached to the rear surface of the panel holder 1120 and is box-shaped with an open front and a square opening 3010a in the rear wall. The rear box 3010 is arranged at a predetermined position within the rear box 3010 and has a number of general winning port sensors 3015 for detecting game balls received in the general winning port 2001 of the front unit 2000. A locking mechanism is attached to the rear surface of the rear box 3010 and allows the main LCD display device 1600 to be detachably attached. 3020, a right ball passage unit 3030 attached to the right end of the rear box 3010 when viewed from the front and used to discharge game balls received in the general winning opening 2001 and second starting opening 2004 of the center device 2500, and a lower right ball passage unit 3035 attached near the front end of the lower right corner of the rear box 3010 when viewed from the front and used to discharge game balls received in the second large winning opening 2006 and second out opening 2543c of the center device 2500.

The rear unit 3000 also includes an upper relay board 3040 attached to the rear surface of the rear box 3010, an upper relay board cover 3041 that covers the rear side of the upper relay board 3040, a box-shaped performance drive board box 3042 that is rotatably attached to the rear surface of the rear box 3010, a performance drive board 3043 housed within the performance drive board box 3042, a panel relay board 3044 attached to the rear surface of the rear box 3010, and a panel relay board cover 3045 that covers the rear side of the panel relay board 3044.

The rear unit 3000 further includes a rear left middle decorative unit 3050 attached to the front end of the rear box 3010, from the center to the top on the left side when viewed from the front, a rear lower rear movable performance unit 3100 attached to the rear wall of the rear box 3010 below the opening 3010a inside the rear box 3010, a rear upper left movable performance unit 3200 attached to the left side when viewed from the front above the opening 3010a inside the rear box 3010, a rear left movable performance unit 3300 attached to the left side of the opening 3010a when viewed from the front inside the rear box 3010, a rear upper middle movable performance unit 3400 attached from the center to the right edge when viewed from the front above the opening 3010a inside the rear box 3010, and a rear lower front movable performance unit 3500 attached in front of the rear lower rear movable performance unit 3100 below the opening 3010a inside the rear box 3010.

[2-1. Previous components]
Next, the front component 1000 will be described mainly with reference to Figures 14 and 15. The front component 1000 has an outer shape of a substantially square in front view, an inner shape of a substantially circular shape penetrating in the front-rear direction, and the inner circumference of the inner shape defines the outer circumference of the play area 5a. The front component 1000 includes an outer rail 1001 that extends in an arc shape from the lower end on the left side of the center in the front view to the upper right diagonal direction in a clockwise circumferential direction, passing the upper end of the center in the front view to the upper right diagonal direction, an inner rail 1002 that is disposed inside the front component 1000 along the outer rail 1001 and extends in an arc shape from the lower center in the front view to the upper left diagonal direction in the front view, and an out guide portion 1003 that is formed at the lowest position of the play area 5a on the right side of the lower end of the inner rail 1002 in the front view and is inclined so as to become lower toward the rear.

The component 1000 also includes a lower right rail 1004 that slopes linearly from the right end of the out guide section 1003 when viewed from the front to near the right side of the component 1000, with the right end being slightly higher; a right rail 1005 that extends from the right end of the lower right rail 1004 along the right side of the component 1000 to below the upper end of the outer rail 1001, with the upper part curved inward of the component 1000; and a collision stop section 1006 that connects the upper end of the right rail 1005 to the upper end of the outer rail 1001 and comes into contact with a game ball rolling along the outer rail 1001.

The component 1000 is also provided with a backflow prevention member 1007 that is rotatably supported on the upper end of the inner rail 1002 and can rotate only between a closed position in which it extends upward from the upper end of the inner rail 1002 to close the gap with the outer rail 1001, and an open position in which it rotates clockwise when viewed from the front to open the gap with the outer rail 1001, and is biased by a spring (not shown) to return to the closed position.

A launched ball sensor 1020 is provided on the back side of the game board 5 near the exit of the rails 1001 and 1002 (preferably immediately after passing through the backflow prevention member 1007) to detect game balls that have been shot into the game area 5a. For example, the launched ball sensor 1020 is composed of a magnetic sensor, and outputs a signal when it detects a game ball that has passed through the backflow prevention member 1007 and flowed into the game area 5a. The launched ball sensor 1020 may be provided at a position in the game area through which the game ball always passes. By fixing the position of the launched ball sensor 1020 on the game board 5, specifications can be standardized between multiple models, making inspection at the manufacturing site and post-installation inspection in the hall easier.

In addition, the launched ball sensor 1020 installed upstream of the game area 5a, such as near the exit of the rails 1001 and 1002, detects the out ball before the winning port sensor detects the winning game ball. In other words, since the game balls are detected in the order of out balls and then prize balls, prize balls resulting from game balls that are not counted as out balls are not detected, and the base value can be calculated accurately.

[2-2. Game Panel]
Next, the game panel 1100 will be described mainly with reference to Figures 14 and 15. The game panel 1100 includes a flat panel plate 1110 whose outer circumference is formed slightly larger than the inner circumference of the frame-shaped front component 1000 and made of transparent synthetic resin, and a frame-shaped panel holder 1120 which holds the outer circumference of the panel plate 1110, is attached to the rear side of the front component 1000, and has a rear unit 3000 attached to its rear surface. The panel plate 1110 of the game panel 1100 has an outlet 1111 penetrating from front to rear at a location that is the lowest position in the play area 5a. The panel plate 1110 also has a plurality of openings 1112 penetrating from front to rear for mounting the front unit 2000.

The panel holder 1120 of the game panel 1100 holds the panel plate 1110 so that it can be attached and detached from the rear side. The panel holder 1120 also has multiple mounting holes for attaching the rear unit 3000 and multiple positioning holes formed on the rear surface.

When the game panel 1100 is attached to the rear of the preceding component 1000, the outlet 1111 of the panel board 1110 opens to the rear of the out-guide section 1003 of the preceding component 1000. As a result, game balls that flow down to the bottom end of the game area 5a are guided by the out-guide section 1003 to the rear outlet 1111, and are discharged through the outlet 1111 to the rear of the game panel 1100.

[2-3. Substrate holder]
Next, the board holder 1200 will be described with reference to Figures 11 to 15. The board holder 1200 is formed in a horizontally long box shape with the top and front open, and the bottom surface is inclined so that it becomes lower toward the center in the left-right direction. When assembled to the game board 5, this board holder 1200 can cover the lower part of the back unit 3000 attached to the rear side of the game panel 1100 from the bottom side. This allows the board holder 1200 to receive all game balls discharged to the rear side of the game panel 1100 through the outlet 1111 and game balls discharged downward from the front unit 2000 and the back unit 3000, and to discharge them downward from the discharge part 1201 (see Figure 14) formed on the bottom surface.

[2-4. Main control board unit]
Next, the main control unit 1300 will be described with reference to Figures 11 to 15 and 17. The main control unit 1300 is detachably attached to the rear surface of the board holder 1200. This main control unit 1300 includes a main control board 1310 that controls the game content and the payout of game balls, and a main control board box 1320 that houses the main control board 1310 and is attached to the board holder 1200.

The main control board box 1320 is equipped with multiple sealing mechanisms, and when one sealing mechanism is used to close the main control board box 1320, that sealing mechanism must be destroyed in order to open the main control board box 1320, leaving traces of the opening and closing of the main control board box 1320. Therefore, by observing the traces of opening and closing, unauthorized opening and closing of the main control board box 1320 can be discovered, and the deterrent effect against unauthorized acts on the main control board 1310 is enhanced.

[2-5. Function display unit]
Next, the function display unit 1400 will be described with reference to Figures 10 to 12. As shown in the figures, the function display unit 1400 is attached to the lower left corner of the front component 1000 outside the play area 5a. This function display unit 1400 can be seen from the front (player side) through the through hole 111 of the door frame 3 when the play board 5 is assembled to the pachinko machine 1 (see Figure 1). This function display unit 1400 uses multiple LEDs based on control signals from the main control board 1310 to display the game status (play situation), normal lottery results, special lottery results, etc.

The function display unit 1400, although not shown in detail, comprises a status indicator consisting of one LED for displaying the game status, a normal pattern display which displays normal patterns by controlling the blinking of two LEDs based on the result of a normal lottery drawn when a game ball passes through the gate unit 2003, and then displays these two LEDs in a lighting mode corresponding to the result of the normal lottery, a normal hold display consisting of two LEDs for displaying the number of holds, which is the number of variable displays of normal patterns related to the passage of a game ball through the gate unit 2003 for which the conditions for starting the variable display have not yet been met, a first special pattern display which displays a first special pattern by controlling the blinking of eight LEDs based on the result of a first special lottery drawn when a game ball is accepted through the first start port 2002 (occurrence of a start winning), and a normal hold display which displays a number of variable displays of normal patterns related to the passage of a game ball through the gate unit 2003 for which the conditions for starting the variable display have not yet been met, The display device mainly comprises a first special reserved number display consisting of two LEDs for displaying the reserved number, which is the number of variable displays of the first special pattern for which the start conditions for the variable display have not yet been met, a second special pattern display device which displays the second special pattern by controlling the blinking of the eight LEDs based on the second special lottery result drawn upon the acceptance of a game ball into the second starting port 2004 (occurrence of a start winning), thereby displaying the second special pattern in a variable display state and then displays these eight LEDs in a lighting mode according to the second special lottery result, a second special reserved number display consisting of two LEDs for displaying the reserved number, which is the number of variable displays of the second special pattern related to the acceptance of a game ball into the second starting port 2004 for which the start conditions for the variable display have not yet been met, and a round display device consisting of two LEDs for displaying the number of times (number of rounds) the opening and closing pattern of the first large winning port 2005 and the second large winning port 2006 is repeated when the first special lottery result or the second special lottery result is a "jackpot" or the like. In addition, some of the displays of the function display unit 1400 (for example, the first special pattern display) may be configured with a 7-segment LED.

This functional display unit 1400 can display the number of reserved items, designs, etc., by turning on, off, blinking, etc. the LEDs provided as appropriate.

[2-6. Peripheral control unit]
Next, the peripheral control unit 1500 will be described with reference to Figures 13 and 15. The peripheral control unit 1500 is attached to the rear surface of the rear box 3010 of the rear unit 3000. The peripheral control unit 1500 includes a peripheral control board 1510 (see Figure 17) that controls the effects presented to the player based on control signals from the main control board 1310, and a peripheral control board box 1520 that houses the peripheral control board 1510. The peripheral control board 1510 includes a peripheral control unit 1511 for controlling light emission effects, sound effects, moving effects, etc., and a liquid crystal display control unit 1512 for controlling effect images (see Figure 17).

[2-7. Main LCD display device]
Next, the main liquid crystal display device 1600 will be described with reference to Figs. 10 to 16. The main liquid crystal display device 1600 is disposed in the center of the game area 5a when viewed from the front, and is attached to the rear side of the game panel 1100 via the rear box 3010 of the rear unit 3000. More specifically, the main liquid crystal display device 1600 is detachably attached to the rear surface at the approximate center of the rear wall of the rear box 3010. When the game board 5 is assembled, the main liquid crystal display device 1600 can be viewed from the front side (player side) through the inside of the frame of the frame-shaped center role 2500. The main liquid crystal display device 1600 is a full-color display device backlit by white LEDs, and can display still images and moving images.

As shown in Figs. 14 and 15, the main LCD display device 1600 has two left fixing pieces 1601 protruding outward from the left side as viewed from the front, and a right fixing piece 1602 protruding outward from the right side as viewed from the front. With the LCD screen facing forward, the main LCD display device 1600 is attached to the rear box 3010 by inserting the two left fixing pieces 1601 from the diagonal rear of the rear box 3010 into two fixing grooves 3010c opening on the left inner peripheral surface as viewed from the front in the frame-shaped LCD mounting portion of the rear box 3010 described later, and then moving the right fixing piece 1602 side forward to insert the right fixing piece 1602 into the opening of the locking mechanism 3020 and sliding the locking mechanism 3020 downward.

[2-8. Overall structure of the table unit]
Next, the front unit 2000 will be described mainly with reference to Figures 10 to 12 and 14 to 16. The front unit 2000 of the game board 5 is attached to the panel plate 1110 of the game panel 1100 from the front, with the front end protruding forward from the front surface of the panel plate 1110 and the rear end penetrating the opening 1112 and protruding rearward from the rear surface of the panel plate 1110. The front unit 2000 of this embodiment is equipped with a plurality of general winning ports 2001 which are always open and capable of accepting game balls dropped into the game area 5a, a first starting port 2002 which is always open and capable of accepting game balls at a different position in the game area 5a from the plurality of general winning ports 2001, a gate unit 2003 which is attached to a predetermined position in the game area 5a and detects the passage of the game ball, a second starting port 2004 which is capable of accepting the game ball depending on the result of a normal lottery which is drawn when the game ball passes through the gate unit 2003, and a first large winning port 2005 and a second large winning port 2006 which are capable of accepting the game ball depending on the result of a first special lottery or a second special lottery which is drawn when a game ball is accepted into the first starting port 2002 or the second starting port 2004.

Three of the multiple (four here) general winning holes 2001 are located at the bottom of the play area 5a, and the remaining one is located near the top right of the play area 5a when viewed from the front. The first starting hole 2002 is located directly above the out hole 1111 in the center of the left and right direction of the play area 5a. The gate section 2003 is located at the top right of the play area 5a when viewed from the front, approximately directly below the impact stop section 1006. The second starting hole 2004 is located from directly below the gate section 2003 to the right when viewed from the front. Of the multiple general winning holes 2001 described above, the general winning hole 2001 located near the top right of the play area 5a when viewed from the front is located directly above the second starting hole 2004. The first large winning hole 2005 is located between the first starting hole 2002 and the out hole 1111. The second large prize opening 2006 is located to the right of the first starting opening 2002 when viewed from the front, and above the first large prize opening 2005.

As shown in FIG. 16, the second large prize opening 2006 in the front unit 2000 is composed of a second upper large prize opening 2006a and a second lower large prize opening 2006b arranged along one flow path through which the game balls circulate. The second large prize opening 2006 is arranged such that the second upper large prize opening 2006a is located near the bottom right when viewed from the front within the game area 5a, and the second lower large prize opening 2006b is located below and to the left of the second upper large prize opening 2006a when viewed from the front.

The front unit 2000 also includes a start port unit 2100 that is attached directly above the exit 1111 in the left-right center of the play area 5a and has a first start port 2002 and a first large prize port 2005, a lower side unit 2200 that is attached along the inner rail 1002 to the left of the start port unit 2100 when viewed from the front and has three general prize ports 2001, an upper side unit 2300 that is attached to the upper left end of the lower side unit 2200 when viewed from the front, and a frame-shaped center device 2500 that is attached approximately in the center of the play area 5a and has one general prize port 2001, a gate section 2003, a second start port 2004, and a second large prize port 2006.

[2-8a. Starting unit]
Next, the start opening unit 2100 of the front unit 2000 will be described. The start opening unit 2100 is disposed directly above the outlet 1111 near the lower end of the left-right center in the game area 5a, and is attached to the panel board 1110 from the front. The start opening unit 2100 has a first start opening 2002 and a first large winning opening 2005.

The starting port unit 2100 is equipped with a flat unit base 2101 attached to the front of the panel board 1110 and having a first large winning port 2005 that is rectangular and extends from left to right and penetrates from front to back, a ball receiving section 2102 that protrudes forward from the upper part of the unit base 2101, approximately in the center in the left-right direction, above the first large winning port 2005, and forms the first starting port 2002, a ball guide section 2103 attached to the rear side of the unit base 2101 and guides downward the game ball received in the first starting port 2002, a first starting port sensor 2104 attached to the ball guide section 2103 and detects the game ball received in the first starting port 2002, and a first attacker unit 2110 attached to the rear side of the unit base 2101 to close the first large winning port 2005.

The first attacker unit 2110 of the starting port unit 2100 is attached to the rear surface of the unit base 2101 so as to close the first large winning port 2005 from the rear, and is a box-shaped unit case 2111 whose front end is approximately the same size as the first large winning port 2005 and is open forward; a horizontally elongated rectangular, flat first large winning port door member 2112 whose lower edge is rotatably supported at the front end of the unit case 2111 so as to open and close the first large winning port 2005; and a first attacker sole mounted within the unit case 2111 for driving the first large winning port door member 2112 to open and close. id 2113, a first large prize opening sensor 2114 that is attached inside the unit case 2111 and detects game balls received in the first large prize opening 2005, a start opening unit relay board 2115 that is attached to the top surface of the unit case 2111 and relays the connections between the first start opening sensor 2104, the first attacca solenoid, and the first large prize opening sensor 2114 and the main control board 1310, and a start opening unit decoration board (not shown) that is attached to the bottom of the unit case 2111 and decorates the first large prize opening 2005 with light.

The ball receiving portion 2102 forming the first starting opening 2002 opens upward and is large enough to receive only one game ball at a time. The first large winning opening 2005 penetrating the unit base 2101 opens forward and is large enough to receive multiple game balls at a time (e.g., 4 to 6).

In the start port unit 2100, the first start port 2002 formed by the ball receiving portion 2102 opens upward, and the game ball received in the first start port 2002 is guided downward at the rear side of the unit base 2101 by the ball guide portion 2103, and after being detected by the first start port sensor 2104, it can be discharged downward through the first attacker unit 2110. In this embodiment, two first start port sensors 2104 are provided, and when the two first start port sensors 2104 detect a game ball within a predetermined time range, the main control board 1310 determines that a game ball has been received in the first start port 2002. This makes it possible to detect fraudulent acts such as the insertion of illegal tools into the first start port 2002.

In the starting port unit 2100, the first attacka unit 2110 is attached to the rear surface of the unit base 2101, and the first large prize opening door member 2112 of the first attacka unit 2110 is inserted from the rear into the first large prize opening 2005 that opens into the unit base 2101, closing the first large prize opening 2005. When the first large prize opening door member 2112 is in an upright state closing the first large prize opening 2005, both left and right ends of the lower edge are rotatably attached by the unit case 2111, and the first large prize opening 2005 can be changed from a closed state to an open state by rotating the upper edge so that it moves forward and downward.

The first large prize opening door member 2112 of the first attacca unit 2110 stands upright in the normal state (when the first attacca solenoid 2113 is not energized), closing the first large prize opening 2005. Then, when the first attacca solenoid 2113 is energized according to the game state, the first large prize opening door member 2112 rotates so that the top edge moves forward and downward, and the top edge is positioned slightly higher than the bottom edge. In other words, the first large prize opening door member 2112 is inclined so that it becomes higher as it moves forward from the bottom edge of the first large prize opening 2005.

In this state, when a game ball flows down in front of the first main prize opening 2005 and abuts against the first main prize opening door member 2112, the inclination of the first main prize opening door member 2112 changes the flow direction of the game ball from downward to backward, and the game ball is received by the first main prize opening 2005 and enters the unit case 2111. Then, after being detected by the first main prize opening sensor 2114, the game ball received by the first main prize opening 2005 is discharged downward from the underside of the unit case 2111.

3. Control Configuration
Next, the control configuration for performing various controls of the pachinko machine 1 will be described with reference to FIG. 17. FIG. 17 is a block diagram showing the control configuration of the pachinko machine. The main control configuration of the pachinko machine 1 is composed of a main control board 1310 and a peripheral control board 1510 attached to the game board 5, and a payout control board 951 attached to the main body frame 4, as shown in the figure, and each control is shared. The main control board 1310 controls the game operation (progress of the game). The peripheral control board 1510 includes a peripheral control unit 1511 that controls various performance devices during the game based on commands from the main control board 1310, and a liquid crystal display control unit 1512 that controls the display of performance images on the main liquid crystal display device 1600, the upper tray liquid crystal display device 244, etc. based on commands from the peripheral control unit 1511. The payout control board 951 is equipped with a payout control unit 952 that controls the payout of game balls, and a launch control unit 953 that controls the launch of game balls by rotating the handle lever 504.

[3-1. Main control board]
The main control board 1310 that controls the progress of the game includes a main control MPU 1311, which is a microprocessor that incorporates a ROM 1313 that stores various processing programs and various commands and a RAM 1312 that temporarily stores data, a main control I/O port 1314 as an input/output device (I/O device), a main control input circuit 1315 to which detection signals from various detection switches are input, a main control solenoid drive circuit 1316 for driving various solenoids, and a RAM clear switch for completely erasing information stored in the RAM incorporated in the main control MPU 1311. In addition to the incorporated ROM and RAM, the main control MPU 1311 also incorporates a watchdog timer that monitors its operation (system), a function for preventing fraud, and the like.

The main control MPU 1311 of the main control board 1310 detects game balls received in the first start opening 2002, the second start opening sensor 2551 detects game balls received in the second start opening 2004, the general winning opening sensor 3015 detects game balls received in the general winning opening 2001, the gate sensor 2547 detects game balls that have passed through the gate section 2003, the first large winning opening 2005 detects game balls that have passed through the gate section 2003, the first large winning opening 2006 detects game balls that have passed through the gate section 2007, the first large winning opening 2009 detects game balls that have passed through the gate section 2008, the first large winning opening 2010 detects game balls that have passed through the gate section 2009, the first large winning opening 2011 detects game balls that have passed through the gate section 2009, the first large winning opening 2012 detects game balls that have passed through the gate section 2009, the first large winning opening 2013 detects game balls that have passed through the gate section 2001, the first large winning opening 2014 detects game balls that have passed through the gate section 2001, the second large winning opening 2015 detects game balls that have passed through the gate section 2001, the first large winning opening 2016 detects game balls that have passed through the gate section 2002, the second large winning opening 2017 detects game balls that have passed through the gate section 2003, the first large winning opening 2018 detects game balls that have passed through the gate section 2003, the second large winning opening 2019 detects game balls that have passed through the gate section 2004, the second large winning opening 2016 detects game balls that have passed through the gate section 2005, the second Detection signals from the first large prize opening sensor 2114, which detects the game balls received by the second upper large prize opening 2006a and the second lower large prize opening 2006b as the second large prize opening 2006, the second upper large prize opening sensor 2554 and the second lower large prize opening sensor 2557, the ejected ball sensor 3060, the launched ball sensor 1020, and the magnetic detection sensor that detects unauthorized magnetism within the game area 5a, etc. are each input via the main control I/O port 1314.

Based on these detection signals, the main control MPU 1311 outputs a control signal from the main control I/O port 1314 to the main control solenoid drive circuit, thereby outputting drive signals to the start port solenoid 2550, the first attacca solenoid 2113, the second upper attacca solenoid 2553, and the second lower attacca solenoid 2556, and outputs drive signals from the main control I/O port 1314 to the first special pattern display, the second special pattern display, the first special pattern memory display, the second special pattern memory display, the normal pattern display, the normal pattern memory display, the game status display, the round display, etc. of the function display unit 1400.

In this embodiment, the first start opening sensor 2104, the second start opening sensor 2551, the gate sensor 2547, the first large winning opening sensor 2114, the second upper large winning opening sensor 2554, and the second lower large winning opening sensor 2557 use non-contact type electromagnetic proximity switches, whereas the general winning opening sensor 3015 uses a contact type ON/OFF operation mechanical switch. This is because game balls frequently enter the first start opening 2002 and the second start opening 2004 and frequently pass through the gate section 2003, so that the first start opening sensor 2104, the second start opening sensor 2551, and the gate sensor 2547 frequently detect game balls. For this reason, the first start opening sensor 2104, the second start opening sensor 2551, and the gate sensor 2547 use proximity switches that are highly durable and have a long lifespan. In addition, when a favorable game state (such as a "jackpot" game) occurs that is advantageous to the player, the first large prize opening 2005 and the second large prize opening 2006 are opened (or enlarged) and game balls frequently enter the opening, so the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also frequently detect game balls. For this reason, the first large prize opening sensor 2114, the second upper large prize opening sensor 2554, and the second lower large prize opening sensor 2557 also use proximity switches that are highly durable and have a long lifespan. In contrast, the general prize opening 2001, which does not receive game balls frequently, is not frequently detected by the general prize opening sensor 3015. For this reason, the general prize opening sensor 3015 uses a mechanical switch that has a shorter lifespan than a proximity switch.

The main control MPU 1311 also transmits various information related to the game (game information) and various commands related to payouts to the payout control board 951, and receives various commands related to the state of the pachinko machine 1 from the payout control board 951. Furthermore, the main control MPU 1311 transmits various commands related to the control of game presentations executed by the main LCD display device 1600, etc., and various commands related to the state of the pachinko machine 1 to the peripheral control unit 1511 of the peripheral control board 1510 via the main control I/O port 1314. When the main control MPU 1311 receives various commands related to the state of the pachinko machine 1 from the payout control board 951, it formats these various commands and transmits them to the peripheral control unit 1511.

Various voltages are supplied to the main control board 1310 from the power supply board in the power supply board box 930. The power supply board that supplies various voltages to the main control board 1310 is equipped with an electric double layer capacitor (hereinafter simply referred to as "capacitor") as a backup power source to supply power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the main control MPU 1311 to store various information in RAM 1312 during power off processing even when the power is cut off. This stored information is completely erased (cleared) from RAM 1312 when the RAM clear switch on the main control board 1310 is operated when the power is turned on. The operation signal (detection signal) of this RAM clear switch is also output to the dispensing control board 951.

The main control board 1310 is also provided with a power outage monitoring circuit. This power outage monitoring circuit monitors drops in various voltages supplied from the power supply board, and when these voltages fall below the power outage warning voltage, it outputs a power outage warning signal as a power outage warning. This power outage warning signal is input to the main control MPU 1311 via the main control I/O port 1314, and is also output to the dispensing control board 951, etc.

A bonus feature ratio display 1317 is attached to the main control board 1310 in a position that is visible from the back side of the pachinko machine 1. The bonus feature ratio display 1317 displays the bonus feature ratio calculated by the main control MPU 1311.

The main control board 1310 is also provided with a display switch 1318. The display switch 1318 is preferably configured as a push button switch with momentary operation, but may be another type of switch. When the display switch 1318 is operated, the reel ratio is displayed on the reel ratio display 1317. Note that the reel ratio display 1317 may always display the reel ratio, and the display content may be switched by operating the display switch 1318.

Figure 18 shows the internal configuration of the main control MPU 1311.

The main control MPU 1311 has a CPU 13111, a RAM 1312, a ROM 1313, a random number generation circuit 13112, a parallel input port 13113, a serial communication circuit 13114, a timer circuit 13115, an interrupt controller 13116, an external bus interface 13117, a clock circuit 13118, a comparison block 13119, unique information 13120, an arithmetic circuit 13121 and a reset circuit 13122.

The CPU 13111 executes the programs stored in the ROM 1313. The RAM 1312 stores data required when executing the programs.

The main control MPU 1311 is provided with one or more random number generating circuits 13112. The random number generating circuit 13112 provides random numbers for determining the lottery results of the variable display game (first special lottery result, second special lottery result) and the presentation content of the variable display game. The random number generating circuit 13112 is a so-called hard random number generating means that outputs random numbers updated at the timing of a clock cycle (or a signal obtained by dividing the clock cycle) supplied to the main control MPU 1311, for example. The hard random numbers generated by the random number generating circuit 13112 are used for drawing lots for winning special patterns, drawing lots for winning patterns in the special pattern variable display game, and drawing lots for winning normal patterns.

The parallel input port 13113 is a port to which detection signals from various detection switches are input via the main control input circuit 1315.

The serial communication circuit 13114 transmits and receives various commands related to the control of game presentations and various commands related to the state of the pachinko machine 1 to and from the peripheral control unit 1511 of the peripheral control board 1510 via the main control I/O port 1314. The serial communication circuit 13114 also transmits and receives various information related to the game (game information) and various commands related to the payout of game balls to the payout control board 951 via the main control I/O port 1314. Furthermore, the serial communication circuit 13114 transmits data for displaying the role ratio to the role ratio display 1317. The detailed configuration of the serial communication circuit 13114 will be described later with reference to FIG. 20.

The timer circuit 13115 is a timer for timer interrupts and various time controls. The interrupt controller 13116 controls various interrupts (general interrupts, NMIs that cannot be masked by software) to the CPU 13111. That is, when the interrupt controller 13116 detects an interrupt, it refers to a processing address table defined for each type of interrupt, and jumps to the address set in the processing address table.

The external bus interface 13117 is an interface for connecting the internal bus of the main control MPU 1311 to external devices. I/O requests (IORQ), reads (RD), writes (WR), 16-bit addresses (A0 to A15), and 8-bit data (D0 to D7) can be input and output from the external bus interface 13117.

The clock circuit 13118 generates an internal clock for the main control MPU 1311 from an input external clock signal (e.g., 32 MHz). The clock circuit 13118 also divides the input clock signal by a set number and outputs the result to the outside from the CLKO terminal. For example, it may output a clock signal to be supplied to the driver circuit 13171 (see FIG. 28) of the role ratio display 1317.

The verification block 13119 is a functional block that uses a specified code to verify whether the ROM 1313 has been tampered with. The unique information 13120 is an ID unique to the main control MPU 1311, and is written in a non-rewritable manner when the chip is manufactured.

The arithmetic circuit 13121 provides an arithmetic function that is not dependent on the program recorded in the ROM 1313. This arithmetic function is written in a fixed manner when the chip is manufactured.

The reset circuit 13122 has an undesignated driving prohibition circuit, a watchdog timer, and a user reset function. If the CPU 13111 accesses an address other than a specified address in the ROM 1313, the undesignated driving prohibition circuit assumes that the access is due to an unauthorized program, and resets the operation of the main control MPU 1311. The watchdog timer outputs a timeout signal when a specified timer time has elapsed, and resets the operation of the main control MPU 1311. The user reset function resets the operation of the main control MPU 1311 by a reset signal input to the SRST terminal.

Figure 19 is a block diagram showing the detailed configuration of the arithmetic circuit 13121.

The calculation circuit 13121 provides a calculation function for the calculation result that is not dependent on a program, and has a multiplication circuit 131211 and a division circuit 131215.

The multiplication circuit 131211 is an arithmetic circuit that multiplies two values of a predetermined number of bits (e.g., 16 bits) and outputs a 32-bit product, and functions as a conversion circuit that converts input values (multiplier, multiplicand) into a product using a multiplication function and outputs the product.

The CPU 13111 of the main control MPU 1311 stores a multiplier and a multiplicand of 16 bits or less in the multiplication input register A 131212 and the multiplication input register B 131213. The multiplication circuit 131211 reads the values stored in the two 16-bit multiplication input registers 131212 and 131213 at a predetermined timing, and stores the result of multiplying the two values in the multiplication result register 131214. The CPU 13111 obtains the multiplication result from the multiplication result register 131214. The process from writing the values to the multiplication input registers 131212 and 131213 to storing the calculation result in the multiplication result register 131214 is configured to be completed in a predetermined time (e.g., one clock), and the CPU 13111 can obtain the multiplication result by referring to the multiplication result register 131214 after a predetermined number of clocks have elapsed after storing the values in the multiplication input registers 131212 and 131213.

The division circuit 131215 is an arithmetic circuit that divides a dividend of a predetermined number of bits (e.g., 32 bits) by a divisor of a predetermined number of bits (e.g., 32 bits) to output a 32-bit quotient and a 32-bit remainder, and functions as a conversion circuit that converts input values (divisor, dividend) into a quotient and remainder using a division function and outputs them.

The CPU 13111 of the main control MPU 1311 stores a dividend of 32 bits or less in the division input register A 131216, and stores a divisor of 32 bits or less in the division input register B 131217. When the division circuit 131215 detects that values are stored in both of the two 32-bit division input registers 131216, 131217, it reads the stored values at a predetermined timing, stores the quotient, which is the result of dividing the dividend by the divisor, in the division result register A 131218, and stores the remainder in the division result register B 131219. When the division circuit 131215 reads the values stored in the division input registers 131216, 131217, it may erase the read values and clear the registers. Furthermore, the division circuit 131215 may read the values stored in the division input registers 131216 and 131217 at the timing when a start command is input, and store the division result in the division result registers 131218 and 131219. In this case, the values stored in the division input registers 131216 and 131217 do not need to be erased at the timing of reading. Furthermore, the division input registers 131216 and 131217 may already have values stored therein (without clearing the stored values), and may further be able to overwrite the values.

The CPU 13111 obtains the division result from the division result registers 131218 and 131219. The process from writing values to the division input registers 131216 and 131217 to storing the calculation result in the division result registers 131218 and 131219 is configured to be completed in a predetermined time (e.g., 32 clocks), and after storing values in the division input registers 131216 and 131217 and a predetermined number of clocks has elapsed, the CPU 13111 can obtain the quotient and remainder by referring to the division result registers 131218 and 131219, respectively.

As described later, in the pachinko machine 1 of this embodiment, division processing is required to calculate the base value, and the division program executed by the CPU 13111 is performed by multiple multiplications and subtractions, so it takes a considerable amount of time. For this reason, it is difficult to execute the base calculation processing for each timer interrupt processing, and it is difficult to display the base value without delay. In contrast, by performing division processing using the arithmetic circuit 13121, the time required to calculate the base value can be shortened, and the base value can be calculated multiple times in one timer interrupt processing (see Figures 75 and 80). In addition, since the CPU 13111 is not occupied by division processing from the writing of values to the division input registers 131216 and 131217 of the arithmetic circuit 13121 to the reading of the calculation result from the division result register A 131218, it can execute other processing and efficiently execute the base calculation processing during the timer interrupt processing.

Figure 20 shows the configuration of the serial communication circuit 13114.

The serial communication circuit 13114 has four data transmission/reception circuits, and each data transmission/reception circuit transmits and receives one channel's worth of data to and from a specified device. Note that in FIG. 20, only the data transmission circuits are illustrated, and an explanation of the data reception circuits (for example, one channel's worth of implementation) is omitted.

As described above, in the gaming machine of this embodiment, the serial communication circuit 13114 uses three channels: channel 0, which is used for communication with the peripheral control board 1510; channel 1, which is used for communication with the payout control board 951; and channel 2, which is used for communication with the driver circuit 13171 of the bonus ratio display 1317; and channel 3 is unused.

The serial communication circuit 13114 has a data register 3141, a transmission data register 3142, a parity generation circuit 3143, a transmission shift register 3144, a command status register 3145, a communication setting register 3146, a transmission trigger setting level register 3147, a baud rate register 3148, and a baud rate generation circuit 3149.

The data input from the CPU 13111 is stored in the data register 3141, and then in the transmission data register 3142. The transmission data register 3142 is composed of a FIFO of a predetermined capacity (for example, 64 bytes). The transmission data register 3142 adds an error detection code generated by the parity generation circuit 3143 for each transmission unit of data to the data to be transmitted, and stores the data in the transmission shift register 3144.

The baud rate generation circuit 3149 generates a transmission clock signal for transmitting data at the rate set in the baud rate register 3148 from the clock signal supplied from the clock circuit 13118. The transmission shift register 3144 then transmits data in accordance with the transmission clock signal.

The command status register 3145 is a register that is referenced to check the transmission status.

The communication setting register 3146 stores commands for controlling data transmission. The transmission trigger setting level register 3147 stores a threshold for controlling the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. The baud rate register 3148 stores a baud rate setting for defining the data transmission rate. The communication setting register 3146, the transmission trigger setting level register 3147, and the baud rate register 3148 are set for each of the four channels as initial settings in step S28 of FIG. 21.

These settings are explained in detail below. The communication setting register is set to the communication format of each channel. Specifically, it sets whether or not FIFO is used (FIFO mode, normal mode), the number of stop bits, and parity (whether parity is used, even parity, or odd parity). For example, for channel 0 used for communication with the peripheral control board 1510 and channel 1 used for communication with the payout control board 951, FIFO mode, stop bit = 1 bit, and 1xxx1010B meaning even parity are set, and for channel 2 used for communication with the driver circuit 13171 of the role ratio display 1317, FIFO mode, stop bit = 1 bit, and 1xxx1000B meaning unused parity are set.

In FIFO mode, data is transmitted using the FIFO of the transmission data register 3142. Also, since gaming machines are in a noisy environment, it is desirable to set parity when transmitting data at high speed outside the main control board 1310.

The feature ratio display 1317 is mounted on the main control board 1310, so it is less affected by noise compared to communication with other boards via communication wires. Also, because the amount of data sent and received is small, the communication speed can be low and there is little need to use parity. A ground pattern can be provided along the pattern that transmits signals between the driver circuit 13171 of the feature ratio display 1317 and the main control MPU 1311 (for example, on a layer adjacent to the left and right and/or thickness direction of a signal line provided on the surface or inner layer of the printed circuit board), and the shielding effect of the ground pattern can reduce noise superimposed on the signal transmission pattern.

The transmission trigger setting level register 3147 determines the amount of data at which the FIFO of the transmission data register 3142 generates an interrupt. Specifically, if the amount of transmission data stored in the FIFO of the transmission data register 3142 is smaller than the set number of bytes, a specified bit in the status register corresponding to each channel is set. By checking the relevant bit in the status register, it is possible to confirm whether there is free space in the FIFO of the transmission data register 3142 and to determine the transmission timing of the data stored in the FIFO of the transmission data register 3142.

The relevant bit of the status register can be used to determine whether there is an abnormality in the transmission FIFO. For example, even if no data is written to the FIFO of the transmission data register 3142 for a predetermined period of time, if the relevant bit of the status register is not set, it is possible to determine that no data is being transmitted from the FIFO of the transmission data register 3142 because there is no free space in the FIFO of the transmission data register 3142, and to execute error processing (e.g., error notification).

The baud rate register 3148 determines the data transmission rate. For example, 19200 bps is set for channel 0 used for communication with the peripheral control board 1510, 1200 bps is set for channel 1 used for communication with the payout control board 951, and 1200 bps is set for channel 2 used for communication with the driver circuit 13171 of the reel ratio display 1317.

In this way, the transmission rate is changed depending on the data transmitted through each channel. This is because the gaming balls are rolling inside the gaming machine, and the electronic circuits of the gaming machine are in an environment that is easily affected by noise. For this reason, data for controlling the ball output, which is directly related to the profit given to the player, is transmitted to the payout control board 951 at a low speed so that the data is transmitted reliably. On the other hand, the peripheral control board 1510 transmits data at a high rate because the amount of data transmitted is large and is not related to the ball output. In addition, the peripheral control board 1510 verifies whether the received command is abnormal, and if it is determined to be abnormal, it does not operate the peripheral control board 1510 or executes abnormal processing (for example, communication error notification) and requests retransmission of the command. Then, if it is determined that the retransmitted command is normal, the state of the peripheral control board 1510 is restored using the normal command. For this reason, communication with the peripheral control board 1510 can transmit data at a high rate. Furthermore, if the communication rate with the peripheral control board 1510 is reduced, the player may become aware of the delay between when the start gate wins and when the patterns start to change, which may reduce interest.

The communication with the driver circuit 13171 of the role ratio display 1317 may be at a high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) or at a low rate (1200 bps, which is the data transmission rate with the payout control board 951). In addition, the communication with the driver circuit 13171 of the role ratio display 1317 may adopt a rate between the high rate (19200 bps, which is the data transmission rate with the peripheral control board 1510) and the low rate (1200 bps, which is the data transmission rate with the payout control board 951). This is because if the data transmission rate is increased, there is a possibility that other circuits may malfunction due to switching noise of the transistors of the driver circuit 13171 of the role ratio display 1317. On the other hand, even if an abnormality occurs in the transmitted data due to noise, the same data is resent at each timer interrupt unless the transmitted data is updated, and if the resent command is normal, the display content of the role ratio display 1317 returns to normal, so there is no need to make the transmission rate extremely slow.

The command status register 3145 is a register referenced to check the transmission status, and for example, each bit is defined as follows:
Bit 7: SnTC A flag indicating completion of transmission, where 0 indicates transmission in progress and 1 indicates completion of transmission. Bit 6: SnTDBE A flag indicating transmission data empty in normal mode (a communication mode that does not use FIFO), where 0 indicates that data has not been transferred to the transmission shift register and 1 indicates that data has been transferred to the transmission shift register. In other words, this flag is set when data is transferred from the transmission data register 3142 to the transmission shift register 3144 and no transmission data is stored in the transmission data register 3142.

In the SnTFTL FIFO mode, this is a flag indicating the transmission FIFO trigger level, with 0 indicating that the amount of transmission data stored in the FIFO of the transmission data register 3142 is equal to or greater than the trigger level, and 1 indicating that the amount of transmission data stored in the FIFO of the transmission data register 3142 is less than the trigger level. In other words, this is set when the amount of transmission data stored in the FIFO of the transmission data register 3142 is less than the number of bytes set in the transmission trigger level setting register. Therefore, during communication in the FIFO mode, data is written to the FIFO of the transmission data register 3142 after confirming that the bit is 1.
Bits 5-2: Unused (fixed to 0)
Bit 1: SnTCL This bit is written from the outside to clear the transmission buffer, break code transmission, empty the transmission data, or set the transmission FIFO trigger level (SnTFL). For example, to forcibly clear the contents of the buffer, set this bit to 1. More specifically, this is used when a command has been written to the FIFO, but due to some circumstances (for example, an abnormality has occurred), the transmission of the written command is stopped. Note that even if bit 1 is set, the data in the transmission shift register is not cleared.

In the configuration described above, the serial communication circuit 13114 is capable of start-stop synchronous communication (asynchronous communication), but outputs a clock signal for synchronous communication (not shown). In this case, the clock signal supplied to the communication partner (driver circuit 13171 of the role ratio display 1317) is output from the serial communication circuit 13114, not the clock circuit 13118. At least one channel of each transmitting/receiving circuit of the serial communication circuit 13114 may be capable of synchronous communication by setting, or a serial communication circuit for start-stop synchronous communication and a serial communication circuit for synchronous communication may be provided separately.

Although not shown in the figure, the serial communication circuit 13114 outputs a signal (LOAD) that indicates the data import timing used during synchronous communication.

[3-2. Dispense control board]
Returning to Fig. 17, the explanation of the control configuration of the pachinko machine will be continued. Although detailed illustration is omitted, the payout control board 951 that controls the payout of game balls, etc., includes a payout control unit 952 that performs various controls related to payout, a launch control unit 953 that performs launch control by the launch solenoid 682 and ball feed control by the ball feed solenoid 551, an error LED display that displays the state of the pachinko machine 1, an error release switch for releasing the error displayed on the error LED display, and a ball removal switch for discharging the game balls in the ball tank 802, tank rail 803, ball guide unit 820, and payout device 830 to the outside of the pachinko machine 1 and starting the ball removal operation.

[3-2a. Dispense control unit]
The payout control unit 952, which performs various controls related to payout in the payout control board 951, is equipped with a payout control MPU, which is a microprocessor that has built-in ROM for storing various processing programs and various commands and RAM for temporarily storing data, a payout control I/O port as an I/O device, an external WDT (external watchdog timer) for monitoring whether the payout control MPU is operating normally, a payout motor drive circuit for outputting a drive signal to the payout motor 834 of the payout device 830, and a payout control input circuit to which detection signals from various detection switches related to payout are input. In addition to the built-in ROM and RAM, the payout control MPU also has built-in functions for preventing fraud.

The payout control MPU of the payout control unit 952 receives various information related to the game (game information) and various commands related to payout from the main control board 1310 in a serial manner via the payout control I/O port, and inputs the operation signal (detection signal) of the RAM clear switch from the main control board 1310 via the payout control I/O port. In addition, it also inputs detection signals from the full tank detection sensor 535, the ball out detection sensor 827, the payout detection sensor 842, and the blade rotation detection sensor 840.

The detection signals from the ball out detection sensor 827, the dispensing detection sensor 842, and the blade rotation detection sensor 840 of the dispensing device 830 are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I/O port.

In addition, the detection signals from the door frame opening switch, which detects the opening of the door frame 3 relative to the main frame 4, and the main frame opening switch, which detects the opening of the main frame 4 relative to the outer frame 2, are input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I/O port.

In addition, the detection signal from the full tank detection sensor 535 of the fall cover unit 520 is input to the dispensing control input circuit and input to the dispensing control MPU via the dispensing control I/O port.

The payout control MPU outputs a drive signal for driving the payout motor 834 to the payout motor 834 via the payout control I/O, outputs a signal for displaying the status of the pachinko machine 1 on the error LED indicator to the error LED indicator via the payout control I/O port, transmits a command for indicating the status of the pachinko machine 1 to the main control board 1310 in a serial manner via the payout control I/O port, and outputs the number of game balls actually paid out to the external terminal board 784 via the payout control I/O port. This external terminal board 784 is connected to a hall computer installed on the gaming hall side. This hall computer monitors the player's play by grasping the number of game balls paid out by the pachinko machine 1 and game information of the pachinko machine 1. Among the signals output from the external terminal board 784, the signals generated by the main control board 1310 are output from the external terminal board 784 via the payout control board 951 from the main control board 1310. In addition, the signal generated by the main control board 1310 may be output from the external terminal board 784 without passing through the dispensing control board 951.

The error LED display is a segment display that displays alphanumeric characters, figures, etc. to indicate the status of the pachinko machine 1. The information displayed and notified by the error LED display includes the following: For example, when the figure "-" is displayed, it indicates "normal", when the number "0" is displayed, it indicates "connection abnormality" (specifically, that there is an abnormality in the electrical connection between the main control board 1310 and the payout control board 951), when the number "1" is displayed, it indicates "ball out" (specifically, that there are no game balls in the payout device 830 based on the detection signal from the out-of-ball detection sensor 827), when the number "2" is displayed, it indicates "ball stuck" (specifically, that the payout blade and the game ball are engaged in the payout passage of the payout device 830 based on the detection signal from the blade rotation detection sensor 840, making it difficult for the payout blade to rotate), and when the number "3" is displayed, it indicates a "counting switch error" (specifically, that there is no game ball in the payout device 830 based on the detection signal from the blade rotation detection sensor 842). When the number "5" is displayed, it indicates that there is a "retry error" (specifically, that the number of retries for the payout operation has reached a preset upper limit). When the number "6" is displayed, it indicates that the ball tank is full (specifically, that the ball tank is full with the game balls stored in the ball cover unit 520 based on the detection signal from the full tank detection sensor 535). When the number "7" is displayed, it indicates that the CR is not connected (that the electrical connection has been cut somewhere between the payout control board 951 and the CR unit). When the number "9" is displayed, it indicates that the ball tank is stocked (specifically, that the number of game balls that have not yet been paid out has reached a preset number).

A signal requesting the loan of game balls from the ball loan button, and a signal requesting the return of a prepaid card from the return button are input to the CR unit. The CR unit serially transmits a signal specifying the number of game balls to be loaned in accordance with the ball loan request signal to the payout control board 951, and this signal is received by the payout control I/O port and input to the payout control MPU. The CR unit also updates the remaining balance of the inserted prepaid card according to the number of game balls loaned, and outputs a signal to display the remaining balance on the display unit, and this signal is input to the display unit and displayed.

[3-2b. Launch control section]
The launch control unit 953, which controls launch by the launch solenoid 682 and ball delivery by the ball delivery solenoid 551, includes, although not shown in detail, a launch control input circuit to which detection signals from various launch-related detection switches are input, an oscillation circuit that outputs a clock signal at regular intervals, a launch timing control circuit that outputs a launch reference pulse for launching game balls toward the game area 5a based on this clock signal, a launch solenoid drive circuit that outputs a drive signal to the launch solenoid 682 based on this launch reference pulse, and a ball delivery solenoid drive circuit that outputs a drive signal to the ball delivery solenoid 551 based on the launch reference pulse. The launch timing control circuit generates a launch reference pulse based on the clock signal from the oscillation circuit so that 100 game balls are launched per minute toward the game area 5a and outputs it to the launch solenoid drive circuit, and also generates a ball delivery reference pulse that is a predetermined number of times the launch reference pulse and outputs it to the ball delivery solenoid drive circuit.

In relation to the handle unit 500, the detection signals from the contact detection sensor 509, which detects whether the palm or fingers are touching the handle lever 504, and the stop button, which detects whether the player wishes to forcibly stop the shooting of the game balls, are input to the launch control input circuit and then to the launch timing control circuit. When the CR unit and the CR unit connection terminal board are electrically connected, the signal is input to the launch control input circuit as a CR connection signal and then to the launch timing control circuit. A signal from the handle operation sensor 507, which electrically adjusts the strength with which the game balls are shot towards the play area 5a depending on the rotational position of the handle lever 504, is input to the launch solenoid drive circuit.

Based on the signal from the handle operation sensor 507, the launch solenoid drive circuit outputs a drive current to the launch solenoid 682 to launch the game ball with a launch strength corresponding to the rotation position of the handle lever 504, triggered by the input of the launch reference pulse. On the other hand, the ball forwarding solenoid drive circuit outputs a constant current to the ball forwarding solenoid 551 triggered by the input of the ball forwarding reference pulse, thereby receiving one game ball stored in the upper tray 201 of the tray unit 200 into the ball forwarding unit 540, and sends the received game ball to the ball launching device 680 side by stopping the output of the constant current triggered by the end of the input of the ball forwarding reference pulse. In this way, the drive current output from the launch solenoid drive circuit to the launch solenoid 682 is variably controlled, while the drive current output from the ball forwarding solenoid drive circuit to the ball forwarding solenoid 551 is controlled to be constant.

The power supply board that supplies various voltages to the dispensing control board 951 is equipped with a capacitor as a backup power supply to supply power to the main control board 1310 for a predetermined period of time even when the power is cut off. This capacitor allows the dispensing control MPU to store various information in the RAM of the dispensing control board 951 during power-off processing even when the power is cut off. This stored information is completely erased (cleared) from the RAM of the dispensing control board 951 when the RAM clear switch of the main control board 1310 is operated when the power is turned on.

[3-3. Peripheral control board]
As shown in Figure 17, the peripheral control board 1510 is equipped with a peripheral control unit 1511 that controls the presentation based on commands from the main control board 1310, and an LCD display control unit 1512 that controls the drawing of the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244 based on control data from this peripheral control unit 1511.

[3-3a. Peripheral control unit]
The peripheral control unit 1511, which controls the performance on the peripheral control board 1510, is equipped with a peripheral control MPU as a microprocessor (detailed illustration is omitted), a peripheral control ROM that stores various processing programs and various commands, a sound source IC that produces high-quality sound, and a sound ROM in which sound information such as music and sound effects referenced by this sound source IC is stored.

The peripheral control MPU has multiple built-in parallel I/O ports, serial I/O ports, etc., and when it receives various commands from the main control board 1310, it transmits game board side light emission data from the serial I/O port for the lamp drive board to the performance drive board 3043 based on these various commands in order to output lighting signals, flashing signals, or gradation lighting signals to the color LEDs, etc., provided on each decorative board of the game board 5, transmits game board side drive data from the serial I/O port for the game board decoration drive board to the performance drive board 3043 in order to output drive signals to the drive motors that operate the various performance units provided on the game board 5, and transmits the vibration device 242 provided on the door frame 3. The serial I/O port for the frame decoration drive board transmits door side drive light emission data, which is composed of door side drive data for outputting drive signals to electrical drive sources such as the door right lower drive motor 272 and door side light emission data for outputting lighting signals, flashing signals, or gradation lighting signals to color LEDs and the like provided on each decorative board of the door frame 3, to the door frame 3 side, control data (display commands) indicating the screen to be displayed on the main LCD display device 1600 and the upper tray LCD display device 244 is transmitted from the serial I/O port for the LCD control unit to the LCD display control unit 1512, and a control signal (sound command) for extracting sound information from the sound ROM is output to the sound source IC.

The detection signals from the various position detection sensors for detecting the positions of the various presentation units provided on the game board 5 are input to the peripheral control MPU via the presentation drive board 3043 attached to the rear surface of the back box. In addition, the detection signals from the touch panel 246 and presentation button pressure sensor 258 of the presentation operation unit 220 provided on the door frame 3 are input to the peripheral control MPU.

In addition, the peripheral control MPU receives a signal (operation signal) from the LCD display control unit 1512 indicating that the LCD display control unit 1512 is operating normally, and monitors the operation of the LCD display control unit 1512 based on this operation signal.

The sound source IC extracts sound information from the sound ROM based on control data (sound commands) from the peripheral control MPU, and controls the playback of music and sound effects in accordance with various performances from speakers 921 and the like provided on the door frame 3 and main body frame 4. The volume can be adjusted by rotating the volume protruding rearward from the peripheral control board box 1520 in which the peripheral control board 1510 is housed. In this embodiment, sound signals (e.g., 2ch stereo signals, 4ch stereo signals, 2.1ch surround signals, or 4.1ch surround signals) as sound information are sent to the multiple speakers on the door frame 3 side and the bass speaker 921 on the main body frame 4, thereby presenting a more realistic sound effect (sound performance) than ever before.

In addition to the built-in WDT (watchdog timer) built into the peripheral control MPU, the peripheral control unit 1511 also has an external WDT (watchdog timer) (not shown), and the peripheral control MPU uses the built-in WDT and the external WDT together to diagnose whether its own system is out of control.

The display commands output from this peripheral control MPU to the LCD display control unit 1512 are sent via a serial input/output port, and in this embodiment, the bit rate (the amount of data that can be sent per unit time) is set to 19.2 kilobits per second (bps). On the other hand, the initial data, door frame side lighting and blinking commands, game board side lighting and blinking commands, movable body driving commands, and display commands are sent from the peripheral control MPU to the performance drive board 3043 attached to the rear of the back box via multiple different serial input/output ports, and in this embodiment, the bit rate is set to 250 kbps.

This performance drive board 3043 outputs a lighting signal or a flashing signal based on the received door frame side lighting/flashing command to the LEDs of each decorative board provided on the door frame 3, and outputs a lighting signal or a flashing signal based on the received game board side lighting/flashing command to the LEDs of each decorative board provided on the game board 5.

The performance drive board 3043 also outputs drive signals based on the received drive commands to the vibration device 242 and bottom right door drive motor 272 provided on the door frame 3, as well as to each drive motor provided on the game board 5, etc.

[3-3b. Various control processes of peripheral control units]
First, the peripheral control unit power-on process will be described with reference to FIG. 60. When the power is turned on to the pachinko machine 1, the peripheral control MPU (not shown) of the peripheral control unit 1511 shown in FIG. 17 performs the peripheral control unit power-on process as shown in FIG. 60. When this peripheral control unit power-on process starts, the performance control program performs an initial setting process under the control of the peripheral control MPU (step S1000). In this initial setting process, the performance control program performs a process of initializing the peripheral control MPU itself, a process of determining whether it is a hot start or a cold start, and a process of setting a wait timer after reset. The peripheral control MPU first performs a process of initializing itself, but the time required for the process of initializing the peripheral control MPU is on the order of microseconds (μs), and the peripheral control MPU can be initialized in an extremely short time. As a result, the peripheral control MPU is in a state where interrupt permission is set, and for example, in the peripheral control unit command reception interrupt process described later, it is in a state where it can receive various commands, such as commands related to the control of game performances and commands related to the state of the pachinko machine 1, output from the main control board 1310.

Following step S1000, the performance control program performs a current time information acquisition process (step S1002). In this current time information acquisition process, calendar information specifying the date and time information specifying the hour, minute, and second are acquired from the RTC control unit, and are set in the calendar information storage unit of the peripheral control RAM as the current calendar information, and are also set in the time information storage unit as the current time information.

Following step S1002, the performance control program sets the V blank signal detection flag VB-FLG to a value of 0 (step S1006). This V blank signal detection flag VB-FLG is a flag for determining whether or not to execute the peripheral control unit regular processing described below, and is set to a value of 1 when the peripheral control unit regular processing is executed, and to a value of 0 when the peripheral control unit regular processing is not executed. The V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt processing described below, which is executed in response to the input of a V blank signal indicating that the peripheral control MPU is in a state where it is possible to accept screen data. In this step S1006, the V blank signal detection flag VB-FLG is initialized once by setting the V blank signal detection flag VB-FLG to a value of 0.

Following step S1006, the performance control program determines whether the V blank signal detection flag VB-FLG is equal to the value 1 (step S1008). If the V blank signal detection flag VB-FLG is not equal to the value 1 (it is equal to the value 0), the program returns to step S1008 and repeatedly determines whether the V blank signal detection flag VB-FLG is equal to the value 1. By repeating such determinations, the program enters a standby state until the peripheral control unit executes normal processing.

When the V blank signal detection flag VB-FLG is set to a value of 1 in step S1008, that is, when peripheral control unit steady-state processing is to be executed, the steady-state processing in progress flag SP-FLG is first set to a value of 1 (step S1009). This steady-state processing in progress flag SP-FLG is set to a value of 1 when peripheral control unit steady-state processing is being executed, and to a value of 0 when peripheral control unit steady-state processing has been completed.

Following step S1009, the performance control program performs a 1 ms interrupt timer start process (step S1010). In this 1 ms interrupt timer start process, a 1 ms interrupt timer is started to execute the peripheral control unit 1 ms timer interrupt process described below, and the 1 ms timer interrupt execution count STN is set to a value of 1 to count the number of times the 1 ms interrupt timer has been started and the peripheral control unit 1 ms timer interrupt process has been executed, thereby initializing the 1 ms timer interrupt execution count STN. This 1 ms timer interrupt execution count STN is updated by the peripheral control unit 1 ms timer interrupt process.

Following step S1010, the performance control program performs lamp data output processing (step S1012). In this lamp data output processing, the performance control program performs DMA serial continuous transmission to the lamp drive board 4170 shown in FIG. 119. Here, continuous transmission is performed to the serial I/O port for the lamp drive board by utilizing the peripheral control DMA controller of the peripheral control MPU.

Following step S1012, the presentation control program performs a presentation operation unit monitoring process (step S1014). In this presentation operation unit monitoring process, the presentation operation unit information acquisition process in the peripheral control unit 1 ms timer interrupt process described later monitors whether or not the operation button 220C is being operated based on various information acquired based on detection signals from various detection switches provided in the presentation operation unit 220, such as the operation of the operation button 220C, and appropriately determines whether or not to reflect the operation state of the operation button 220C in the game presentation.

Following step S1014, the presentation control program performs a display data output process (step S1016). In this display data output process, the sound source VDP outputs one screen's worth of drawing data (one frame's worth) generated on the built-in VRAM of the sound source VDP in the display data creation process described below to the game board side decorative board 3053 and the door frame side decorative board 233. This allows various screens to be drawn on the game board side decorative board 3053 and the door frame side decorative board 233.

Following step S1016, the performance control program performs a sound data output process (step S1018). In this sound data output process, the performance control program outputs sound data such as music and sound effects set in the sound source built-in VDP in the sound data creation process described below to the speaker 921, and outputs sound data of alert sounds and notification sounds in addition to music and sound effects to the speaker 921.

Following step S1018, the performance control program performs a scheduler update process (step S1020). In this scheduler update process, the performance control program updates various schedule data set in the peripheral control RAM. For example, in the scheduler update process, a pointer is updated to indicate which screen data, from the first screen data, among the screen data arranged in chronological order that constitutes the schedule data for screen generation, is to be output to the VDP with built-in sound source.

The scheduler update process also updates the pointer to indicate which light emission data, from the first light emission data, among the light emission data arranged in chronological order that constitutes the schedule data for generating light emission modes, is to be used as the light emission mode for each LED.

The scheduler update process also updates a pointer to indicate which sound command data, starting from the first sound command data, should be output to the VDP with built-in sound source among the sound command data that indicates sound data such as music and sound effects, and sound data for alarms and announcements, arranged in chronological order to make up the schedule data for sound generation.

The scheduler update process also updates a pointer to indicate which drive data, starting from the first drive data, is to be output among the drive data for electric drive sources such as motors and solenoids arranged in chronological order that constitutes the electric drive source schedule data.

Following step S1020, the presentation control program performs a received command analysis process (step S1022). In this received command analysis process, the presentation control program analyzes the information sent from the game board side decorative board 3053 and the various commands sent from the main control board 1310, which are received in the peripheral control unit command reception interrupt process (command reception means) described below (command analysis means).

Following step S1022, the performance control program performs a warning process (step S1024). In this warning process, when the commands analyzed in the received command analysis process in step S1022 as described above include various commands classified as a predetermined notification display, the performance control program extracts the schedule data for screen generation, the schedule data for light emission mode generation, the schedule data for sound generation, and the schedule data for the electrical drive source, which are set in the abnormality display mode for executing various abnormality notifications, from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 and sets them in the peripheral control RAM. In addition, in the warning process, if multiple abnormalities occur simultaneously, the abnormality notification is performed in order of the highest priority registered in advance, and the abnormality is resolved and the remaining abnormality notification is automatically transitioned to. This allows multiple abnormalities to be monitored simultaneously without losing information that one abnormality has occurred after another abnormality has occurred but before the abnormality has been resolved.

Furthermore, in this warning process, after a predetermined time has elapsed since the power was turned on, if the command analyzed by the presentation control program in the above-mentioned received command analysis process (step S1022) is one of the various commands classified as status indications, such as an error reset navigation command (second error reset command), the presentation control program controls the presentation to a different mode from the normal presentation mode associated with the presentation operation, for example, by visually warning the outside using the game board side decorative board 3053 (presentation device), the door frame side decorative board 233 (presentation device), or a lamp (presentation device), or by audibly warning the outside using a speaker (error notification means). In this way, when a malicious player attempts to input an error reset navigation command to the main control board 1310 by operating the operation switch of the payout control board 951 even though the game is in progress, the pachinko machine 1 is configured to warn the outside, thereby preventing fraudulent acts against the main control board 1310 that may affect the progress of the game.

Next, following step S1024 described above, the performance control program performs an RCT acquisition information update process (step S1026). In this RTC acquisition information update process, the performance control program updates the calendar information stored in the calendar information storage unit and the time information stored in the time information storage unit that were acquired in the current time information acquisition process in step S1002 and set in the peripheral control RAM. This RCT acquisition information update process updates the time information stored in the time information storage unit, which is the hour, minute, and second, and updates the calendar information stored in the calendar information storage unit, which is the year, month, and date, based on the updated time information.

Following step S1026, the performance control program performs lamp data creation processing (step S1028). In this lamp data creation processing, the performance control program updates the pointer in the scheduler update processing in step S1020, and based on the light emission data indicated by the pointer among the light emission data arranged in time series that constitute the schedule data for generating light emission modes, extracts and creates game board side light emission data SL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 for outputting lighting signals, blinking signals, or gradation lighting signals to the multiple LEDs of various decorative boards provided on the game board 5, and sets it in the peripheral control RAM, and extracts and creates door side light emission data STL-DAT from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 for outputting lighting signals, blinking signals, or gradation lighting signals to the multiple LEDs of various decorative boards provided on the door frame 3, and sets it in the peripheral control RAM.

Following step S1028, the presentation control program performs a display data creation process (step S1030). In this display data creation process, the presentation control program updates the pointer in the scheduler update process in step S1020, and extracts the screen data indicated by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 among the screen data arranged in chronological order that constitutes the schedule data for screen generation, and outputs it to the sound source built-in VDP. When screen data is input from the peripheral control MPU, the sound source built-in VDP extracts character data from the liquid crystal and sound control ROM 1512b based on the input screen data, creates sprite data, and generates drawing data for one screen (one frame) on the built-in VRAM to be displayed on the game board side decorative board 3053 and the door frame side decorative board 233.

Following step S1030, the performance control program performs a sound data creation process (step S1032). In this sound data creation process, the performance control program updates the pointer in the scheduler update process in step S1020, and among the sound command data arranged in chronological order that constitutes the sound generation schedule data, extracts the sound command data pointed to by the pointer from the peripheral control ROM or peripheral control RAM of the peripheral control unit 1511 and outputs it to the sound source built-in VDP. When sound command data is input from the peripheral control MPU, the sound source built-in VDP extracts sound data such as music and sound effects stored in the liquid crystal and sound control ROM and controls the built-in sound source to incorporate the sound data such as music and sound effects according to the track number specified in the sound command data, and sets the output channel to be used according to the output channel number.

Following step S1032, the performance control program performs a backup process (step S1034). In this backup process, the performance control program copies and backs up the contents stored in the peripheral control MPU and the external peripheral control RAM to the first backup area and the second backup area, respectively, and also copies and backs up the contents stored in the peripheral control MPU and the external peripheral control SRAM to the first backup area and the second backup area, respectively.

Following step S1034, a WDT clear process is performed (step S1036). In this WDT clear process, a clear signal is output to the peripheral control internal WDT 1511af and the peripheral control external WDT 1511e to prevent the peripheral control MPU from being reset.

Following step S1036, the performance control program sets the steady-state processing in progress flag SP-FLG to a value of 0 as the peripheral control unit steady-state processing has been completed (step S1038), returns to step S1006, sets the V blank signal detection flag VB-FLG to a value of 0 to initialize it, and repeats the judgment of step S1008 until the V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt processing described below. In other words, in step S1008, the program waits until the V blank signal detection flag VB-FLG is set to a value of 1, and if it is determined in step S1008 that the V blank signal detection flag VB-FLG is a value of 1, it performs the processing of steps S1009 to S1038, and returns to step S1006 again. In this way, if it is determined in step S1008 that the V blank signal detection flag VB-FLG is a value of 1, it performs the processing of steps S1009 to S1038. The processing of steps S1009 to S1038 is referred to as "peripheral control unit regular processing."

This peripheral control unit steady-state processing starts with the performance control program first setting the steady-state processing in progress flag SP-FLG to a value of 1 in step S1009, indicating that the peripheral control unit steady-state processing is being executed, then in step S1010, it performs a 1 ms interrupt timer start process, and then in step S1012, step S1014, ..., and step S1036, it finally completes in step S1038 by setting the steady-state processing in progress flag SP-FLG to a value of 0, indicating that the peripheral control unit steady-state processing has been completed. The peripheral control unit steady-state processing is executed when the V blank signal detection flag VB-FLG is a value of 1 in step S1008. As described above, this V blank signal detection flag VB-FLG is set to a value of 1 in the peripheral control unit V blank signal interrupt processing described later, which is executed when a V blank signal indicating that the peripheral control unit is in a state where it can accept screen data from the peripheral control MPU is input from the sound source built-in VDP. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to approximately 30 fps per second, as described above, so the interval at which the V blank signal is input is approximately 33.3 ms (= 1000 ms ÷ 30 fps). In other words, the peripheral control unit regular processing is repeatedly executed every approximately 33.3 ms.

Next, the peripheral control unit V blank signal interrupt process shown in FIG. 61 will be described, which is executed when a V blank signal indicating that the peripheral control unit 1511 is ready to accept screen data from the peripheral control MPU is input from the sound source built-in VDP of the liquid crystal display control unit 1512. When this peripheral control unit V blank signal interrupt process is started, the peripheral control MPU of the peripheral control unit 1511 determines whether the steady processing in progress flag SP-FLG is set to a value of 0, as shown in FIG. 61 (step S1045). As described above, this steady processing in progress flag SP-FLG is set to a value of 1 when the peripheral control unit steady processing of steps S1009 to S1038 in the peripheral control unit power-on processing in FIG. 60 is being executed, and to a value of 0 when the peripheral control unit steady processing has been completed.

When the steady-state processing flag SP-FLG is not 0 (is 1) in step S1045, that is, when the peripheral control unit steady-state processing is being executed, this routine ends. On the other hand, when the steady-state processing flag SP-FLG is 0 in step S1045, that is, when the peripheral control unit steady-state processing has been completed, the V blank signal detection flag VB-FLG is set to 1 (step S1050), and this routine ends. As described above, this V blank signal detection flag VB-FLG is a flag for determining whether or not to execute the peripheral control unit steady-state processing, and is set to 1 when the peripheral control unit steady-state processing is executed, and to 0 when the peripheral control unit steady-state processing is not executed.

Next, the peripheral control unit 1 ms timer interrupt processing, which is repeatedly executed each time the 1 ms interrupt timer occurs due to the activation of the 1 ms interrupt timer in step S1010 in the peripheral control unit regular processing of the peripheral control unit power-on processing in Fig. 60, will be described. When this peripheral control unit 1 ms timer interrupt processing is started, the peripheral control MPU of the peripheral control unit 1511 determines whether the 1 ms timer interrupt execution count STN is less than 33 times, as shown in Fig. 62 (step S1100). As described above, this 1 ms timer interrupt execution count STN is a counter that counts the number of times the 1 ms interrupt timer is activated in the 1 ms interrupt timer activation processing in step S1010 in the peripheral control unit regular processing of the peripheral control unit power-on processing in Fig. 60 and the peripheral control unit 1 ms timer interrupt processing, which is this routine, is executed. In this embodiment, the frame frequency (number of screen updates per second) of the game board side decorative board 3053 and the door frame side decorative board 233 is set to approximately 30 fps per second, as described above, so the interval at which the V blank signal is input is approximately 33.3 ms (=1000 ms÷30 fps). In other words, the peripheral control unit regular processing is repeatedly executed every approximately 33.3 ms, so after the 1 ms interrupt timer is started in step S1010 in the peripheral control unit regular processing, the peripheral control unit 1 ms timer interrupt processing is executed only 32 times before the next peripheral control unit regular processing is executed. Specifically, when the 1 ms interrupt timer is started in step S1010 in the peripheral control unit regular processing, the first 1 ms timer interrupt occurs, followed by the second, ..., and 32nd 1 ms timer interrupts in sequence.

When the 1 ms timer interrupt execution count STN is not less than 33 in step S1100, that is, when the 33rd 1 ms timer interrupt occurs and the peripheral control unit 1 ms timer interrupt process is started, the routine is terminated. In the case where the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, in this embodiment, the peripheral control unit 1 ms timer interrupt process is set to have a higher priority than the peripheral control unit V blank interrupt process as the interrupt process priority, but the start of the peripheral control unit 1 ms timer interrupt process by the 33rd 1 ms timer interrupt is forcibly canceled. In other words, in this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, in the case where the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, the start of the peripheral control unit 1 ms timer interrupt process by the 33rd 1 ms timer interrupt is forcibly canceled in order to execute the peripheral control unit V blank interrupt process. Then, after the V blank signal is generated and the 1 ms interrupt timer is started again in step S1010 of the peripheral control unit regular processing, the peripheral control unit 1 ms timer interrupt processing is started again when the first 1 ms timer interrupt occurs.

On the other hand, if the 1 ms timer interrupt execution count STN is less than 33 in step S1100, the 1 ms timer interrupt execution count STN is incremented by a value of 1 (step S1102). By adding the value of 1 to the 1 ms timer interrupt execution count STN, the 1 ms interrupt timer is started in the 1 ms interrupt timer start process in step S1010 of the peripheral control unit regular processing of the peripheral control unit power-on processing in FIG. 60, and the number of times that the peripheral control unit 1 ms timer interrupt process, which is this routine, has been executed, is increased by one.

Following step S1102, motor and solenoid drive processing is performed (step S1104). In this motor and solenoid drive processing, various motors, solenoids, and other electric drive sources are driven according to the drive data indicated by the pointer among the drive data for the electric drive sources such as motors and solenoids arranged in chronological order that constitute the electric drive source schedule data set in the peripheral control MPU and peripheral control RAM, and the pointer is updated to the next drive data specified in the chronological order, and the pointer is updated each time this motor and solenoid drive processing is performed.

Following step S1104, a movable body information acquisition process is performed (step S1106). In this movable body information acquisition process, by determining whether or not detection signals are being input from the various detection switches provided on the game board 5, history information of the detection signals from the various detection switches (e.g., original position history information, movable position history information, etc.) is created and set in the peripheral control RAM. From the history information of the detection signals from the various detection switches set in this peripheral control RAM, the original positions, movable positions, etc. of the various movable bodies provided on the game board 5 can be obtained.

Following step S1106, a production operation unit information acquisition process is performed (step S1108). In this production operation unit information acquisition process, by determining whether or not detection signals are being input from the various detection switches provided in the production operation unit 220, history information of the detection signals from the various detection switches (such as operation history information of the operation button 220C) is created and set in the peripheral control RAM. Whether or not the operation button 220C has been operated can be obtained from the history information of the detection signals from the various detection switches set in this peripheral control RAM.

Following step S1108, a drawing status information acquisition process is performed (step S1110). In this drawing status information acquisition process, history information of the LOCKN signal output from the door frame side performance receiver IC of the door frame side decorative board 233 is created and set in the peripheral control RAM. As described above, the LOCKN signal is a signal that the door frame side performance receiver IC SDIC0 of the door frame side decorative board 233 outputs to inform the user that the drawing data received from the door frame side performance transmitter IC 1512d provided on the peripheral control board 1510 is abnormal data.

Following step S1110, backup processing is performed (step S1112), and this routine ends. In this backup processing, the contents stored in the peripheral control RAM are copied and backed up to the first backup area and the second backup area, respectively, and the contents stored in the peripheral control SRAM are copied and backed up to the first backup area and the second backup area, respectively.

In this way, in the peripheral control unit 1 ms timer interrupt processing, various processes related to the performance described above in steps S1104 to S1108 are executed as the performance progresses within a period of 1 ms. In contrast, in the peripheral control unit steady-state processing in the peripheral control unit power-on processing in Figure 60, various processes related to the performance described above in steps S1012 to S1032 are executed as the performance progresses within a period of approximately 33.3 ms. In the peripheral control unit 1 ms timer interrupt processing, when the 1 ms timer interrupt execution count STN is not less than the value 33 in step S1100, that is, when the 33rd 1 ms timer interrupt occurs and the peripheral control unit 1 ms timer interrupt processing is started, this routine is terminated as is. Therefore, even if the 33rd 1 ms timer interrupt occurs by chance before the next V blank signal occurs, the start of the peripheral control unit 1 ms timer interrupt processing by the 33rd 1 ms timer interrupt is forcibly canceled, and the 1 ms interrupt timer is started again in step S1010 in the peripheral control unit regular processing by the occurrence of the V blank signal, and then the peripheral control unit 1 ms timer interrupt processing is newly started by the occurrence of the first 1 ms timer interrupt. In other words, the consistency between the progress state of the performance by the peripheral control unit regular processing and the progress state of the performance by the peripheral control unit 1 ms timer interrupt processing, which is timer interrupt control, is not lost. Therefore, the progress state of the performance can be reliably matched.

As mentioned above, the interval at which the V blank signal is output varies slightly depending on the liquid crystal size of the game board side decorative board 3053 and the door frame side decorative board 233, and the interval at which the V blank signal is output may also vary slightly depending on the production lot of the peripheral control board 1510 on which the peripheral control MPU and the sound source built-in VDP are mounted. In this embodiment, since the V blank signal is a signal that controls the entire system of the peripheral control board 1510, if the occurrence of the 33rd 1 ms timer interrupt happens to precede the occurrence of the next V blank signal, the start of the peripheral control unit 1 ms timer interrupt process due to the 33rd 1 ms timer interrupt is forcibly canceled in order to execute the peripheral control unit V blank interrupt process. In other words, in this embodiment, even if the interval at which the V blank signal is output varies slightly, the time lag caused by the slight change in the interval at which the V blank signal is output can be absorbed by forcibly canceling the start of the peripheral control unit 1 ms timer interrupt process due to the 33rd 1 ms timer interrupt.

[3-4. Liquid crystal display control unit]
Next, the LCD display control unit 1512 in the peripheral control board 1510, which controls the drawing of the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244, is not shown in detail, but is equipped with a display control MPU as a microprocessor, a display control ROM for storing various processing programs, various commands, and various data, a VDP (short for Video Display Processor) for display control of the main LCD display device 1600 and the upper tray LCD display device 244, an image ROM (performance data ROM) for storing various data for the screens displayed on the main LCD display device 1600, the sub LCD display device 3114, and the upper tray LCD display device 244, and an image RAM to which the various data stored in this image ROM (performance data ROM) is transferred and copied.

This display control MPU has built-in parallel I/O ports, serial I/O ports, etc., and controls the VDP based on control data (display commands) from the peripheral control unit 1511 to control the drawing of the main LCD display unit 1600, sub LCD display unit 3114, and upper tray LCD display unit 244. When the display control MPU is operating normally, it outputs an operation signal to the peripheral control unit 1511 to inform the same. The display control MPU also receives an in-progress signal from the VDP, and performs interrupt processing when the output of this in-progress signal is stopped every 16 ms.

The display control ROM stores a variety of programs for generating screens to be drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244, as well as schedule data corresponding to control data (display commands) from the peripheral control unit 1511, and non-resident area transfer schedule data corresponding to the control data (display commands). The schedule data is configured by chronologically arranging screen data that specifies the screen configuration, and specifies the order in which the screens are drawn on the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244. The non-resident area transfer schedule data is configured by chronologically arranging non-resident area transfer data that specifies the order in which the various data stored in the image ROM (performance data ROM) is transferred to the non-resident area of the image RAM. This non-resident area transfer data predefines the order in which various types of screen data are transferred from the image ROM (performance data ROM) to the non-resident area of the image RAM in order to display screen data that is drawn on the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244 in accordance with the progress of the schedule data.

The display control MPU extracts the first screen data of the schedule data corresponding to the control data (display command) from the peripheral control unit 1511 from the display control ROM and outputs it to the VDP, and then extracts the screen data following the first screen data from the display control ROM and outputs it to the VDP. In this way, the display control MPU extracts the screen data arranged in chronological order in the schedule data one by one from the display control ROM, starting from the first screen data, and outputs it to the VDP.

When the VDP receives screen data output from the display control MPU, it extracts sprite data from the image RAM based on the input screen data, generates drawing data to be displayed on the main LCD display 1600, sub LCD display 3114, and upper tray LCD display 244, and outputs this generated drawing data to the main LCD display 1600, sub LCD display 3114, and upper tray LCD display 244. When the main LCD display 1600, sub LCD display 3114, or upper tray LCD display 244 does not accept screen data from the display control MPU, the VDP outputs an execution signal to that effect to the display control MPU. The VDP uses a line buffer system. This "line buffer method" is a method in which one line of drawing data for drawing in the left-right direction of the main LCD display 1600, sub LCD display 3114, or top-tray LCD display 244 is stored in a line buffer, and the one line of drawing data stored in the line buffer is output to the main LCD display 1600, sub LCD display 3114, or top-tray LCD display 244.

The image ROM (performance data ROM) stores a large amount of sprite data, and its capacity is large. When the capacity of the image ROM (performance data ROM) becomes large, that is, when the number of sprites to be drawn on the main LCD display 1600, the sub LCD display 3114, and the upper tray LCD display 244 increases, the access speed of the image ROM (performance data ROM) cannot be ignored, and this affects the speed of drawing on the main LCD display 1600, the sub LCD display 3114, and the upper tray LCD display 244. Therefore, in this embodiment, the sprite data stored in the image ROM (performance data ROM) is transferred and copied to the image RAM, which has a fast access speed, and the sprite data is extracted from this image RAM. Note that the sprite data is the base data, which is the data before the sprite is expanded into bitmap format, and is stored in the image ROM (performance data ROM) in a compressed state.

Now, to explain what a "sprite" is, a "sprite" is an image displayed as a unit on the main LCD display 1600 or the top tray LCD display 244. For example, when various people (characters) are displayed on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244, the data for drawing each person is called a "sprite". Thus, when multiple people are displayed on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244, multiple sprites are used. In addition to people, the houses, mountains, roads, etc. that make up the background are also sprites, and the entire background can be treated as a single sprite. These sprites are drawn on the main LCD display 1600, the sub LCD display 3114, or the top tray LCD display 244 after their positions on the screen and their hierarchical relationship when sprites overlap (hereinafter referred to as the "sprite overlap order") are set.

A sprite is made up of multiple rectangular areas of 64 pixels each. The data used to draw these rectangular areas is called a "sprite character." Small sprites can be represented using one sprite character, while relatively large sprites such as people can be represented using a total of six sprite characters arranged, for example, 2 x 3. Even larger sprites such as backgrounds can be represented using even more sprite characters. In this way, the number and arrangement of sprite characters can be specified arbitrarily for each sprite.

The main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244 are driven by main scanning, which sets the display state of each pixel in one direction along the pixels, from left to right when viewed from the front, and sub scanning, which repeats main scanning in a direction intersecting the one direction. When the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244 receive one line of drawing data output from the LCD display control unit 1512, they output the data to one line of pixels in the main scanning, from left to right when viewed from the front of the main LCD display 1600, the sub LCD display 3114, and the top tray LCD display 244. Once the output of one line is complete, the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244 move on to the line directly below as a sub-scan, and when the drawing data for the next line is input in the same way, they output one line's worth of pixels in a main scan based on the drawing data for the next line, sequentially from left to right when viewed from the front of the main LCD display 1600, sub LCD display 3114, and top tray LCD display 244.

[4. Game Contents]
Next, the game contents of the pachinko machine 1 of this embodiment will be described mainly with reference to Figures 10, 16, and 17. In the pachinko machine 1 of this embodiment, the player rotates the handle lever 504 of the handle unit 500 arranged in the lower right corner of the front of the door frame 3, and the game balls stored in the upper tray 201 of the tray unit 200 are shot into the upper part of the game area 5a through between the outer rail 1001 and the inner rail 1002 of the game board 5, and a game using the game balls is started. The game balls shot into the upper part of the game area 5a flow down either the left side or the right side of the center role 2500 depending on the shooting strength. The shooting strength of the game balls can be adjusted by the rotation amount of the handle lever 504, and the more it is rotated in the clockwise direction, the stronger the balls can be shot, and up to 100 game balls can be shot continuously in one minute, that is, at intervals of 0.6 seconds.

In addition, within the game area 5a, multiple obstacle nails (not shown) are planted in a predetermined gauge arrangement at appropriate positions on the front of the game panel 1100 (panel board 1110). When the game ball hits the obstacle nails, the flow speed of the game ball is suppressed and various movements are imparted to the game ball, allowing the player to enjoy its movements. In addition to the obstacle nails, within the game area 5a, there is also provided at an appropriate position a windmill (not shown) that rotates when the game ball hits it.

When a game ball is shot into the top of the center gadget 2500 and enters the area to the left of the highest part of the outer periphery of the front peripheral wall 2512 of the center gadget 2500 as viewed from the front, it will come into contact with multiple obstacle nails (not shown) and flow down the area to the left of the center gadget 2500. When the game ball flowing down the area to the left of the center gadget 2500 enters the warp entrance 2520 opening on the outer periphery of the front peripheral wall 2512 of the center gadget 2500, it is supplied to the stage 2530 through the warp passage 2521, the warp exit 2522 opening inside the frame of the center gadget 2500, and the guideway 2523.

The game balls supplied to the stage 2530 from the warp exit 2522 roll back and forth on the stage 2530 and are released rearward from either the central guide section 2531 in the center of the left-right direction or the side guide sections 2532 on either side of that. When the game balls are released into the game area 5a from the central guide section 2531 of the stage 2530, because this central guide section 2531 is located directly above the first starting opening 2002, the game balls released from the central guide section 2531 are highly likely to be received by the first starting opening 2002. When the game balls are received by the first starting opening 2002, a predetermined number (e.g., three) of game balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

When the game ball rolling on the stage 2530 is released from the side guide section 2532 into the game area 5a, it flows down toward the start opening unit 2100. The game ball released into the game area 5a from the stage 2530 of the center device 2500 may be received by the first start opening 2002 of the start opening unit 2100 or the first large winning opening 2005 in an open state.

If a game ball that has flowed down to the left side of the center device 2500 does not enter the warp entrance 2520, it may be pulled toward the center in the left-right direction by the shelf 2302 on the upper side unit 2300, and may be accepted into the general winning opening 2001 or the first starting opening 2002 on the lower side unit 2200. When a game ball is accepted into the general winning opening 2001, a predetermined number (for example, 10 balls) of game balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

On the other hand, when a game ball that is shot into the top of the center gadget 2500 in the game area 5a enters (is shot into) the right side of the highest part of the outer periphery of the front peripheral wall portion 2512 of the center gadget 2500, it enters the upper right circulation space 2541 of the right-hitting game area 2540. Although not shown, multiple obstacle nails are planted in this upper right circulation space 2541, and the game ball comes into contact with the obstacle nails and flows while changing its flow direction in various ways. This upper right circulation space 3541 is equipped with a gate portion 2003 at the top, and a general winning opening 2001 and a second starting opening 2004 that is usually closed by a second starting opening door member 2549 at the bottom.

The game balls that flow down the upper right circulation space 2541 pass through the downstream right circulation passage 2542 and enter the lower right circulation space 2543. The game balls that enter the lower right circulation space 2543 pass through the second attacca passage 2543a, the bottom surface of which is formed by the upper surfaces of the second upper large prize opening door member 2552 and the second lower large prize opening door member 2555 that close the second upper large prize opening 2006a and the second lower large prize opening 2006b that are lined up on the left and right as the second large prize opening 2006, and are released into the game area 5a from the left end of the lowered release plate portion 2559 on the left side when viewed from the front. The downstream end (release plate portion 2559) of the second attacca passage 2543a is open so that the game ball is directed toward the first large winning opening 2005 of the starting opening unit 2100, and when the first large winning opening 2005 is open, if a game ball is released from the second attacca passage 2543a into the game area 5a, there is a high probability that the game ball will be received by the first large winning opening 2005.

The game balls flowing through the right flow passage 2542 and the lower right flow space 2543 flow down while the increase in flow speed is suppressed by multiple deceleration ribs 2546. In addition, in very rare cases, in the lower right flow space 2543, the game balls may enter the discharge passage 2543b that branches off near the upstream end of the second attacca passage 2543a, and the game balls that enter the discharge passage 2543b are discharged outside the game board 5 from the second outlet 2543c without being returned to the game area 5a.

When a game ball that has been hit to the right and entered the upper right circulation space 2541 passes through the gate section 2003 and is detected by the gate sensor 2547, one normal random number is obtained from the normal random numbers updated within a predetermined numerical range in the main control board 1310, and a normal lottery is performed by comparing this obtained normal random number with a predetermined normal win judgment table. If the result of this normal lottery is a "normal win" when the time-saving control described below is not being executed, the second start port door member 2549 rotates once in a counterclockwise direction as viewed from the front to open the second start port 2004, and game balls can be received into the second start port 2004 for a predetermined time (0.5 seconds in this example). On the other hand, if the time-saving control is being executed, a lottery is performed to determine whether the "normal win" is a "first normal win", "second normal win", or "third normal win". Then, when the time-saving control is being executed, if the result of the regular lottery is either a "first regular hit," "second regular hit," or "third regular hit," the second starting port door member 2549 rotates counterclockwise when viewed from the front to open the second starting port 2004, thereby enabling the second starting port 2004 to receive game balls for a predetermined period of time, and then rotates counterclockwise when viewed from the front to close the second starting port 2004, thereby rendering it impossible to receive game balls in the second starting port 2004. This opening and closing control is repeated a predetermined number of times (five times in this example). In addition, when the result of the regular lottery is the "first regular win", the five periods during which the second starting port 2004 is in a state in which it can receive game balls are set to "0.3 seconds", "0.28 seconds", "0.3 seconds", "0.28 seconds", and "0.3 seconds", respectively, and when the result of the regular lottery is the "second regular win", the five periods during which the second starting port 2004 is in a state in which it can receive game balls are set to "0.3 seconds", "0.28 seconds", and "1.1 seconds", respectively. , "0.28 seconds", and "0.3 seconds", and when the result of the normal lottery is the "third normal win", the five periods during which the second starting hole 2004 is in a state in which it is possible to receive game balls are set to "0.3 seconds", "0.28 seconds", "0.3 seconds", "0.28 seconds", and "1.1 seconds", respectively, and the "second normal win" and "third normal win" are more advantageous to the player (it is easier to receive game balls into the second starting hole 2004) than the "first normal win". Also, when a game ball is received into the second starting hole 2004, a predetermined number (for example, three balls) of game balls are paid out from the payout device 830 to the upper tray 201 via the main control board 1310 and the payout control board 951.

In this embodiment, in the normal pattern display performed by the normal pattern display of the function display unit 1400 based on the passage of the game ball through the gate section 2003, a certain amount of time is set from the start of the normal pattern display to the stop display of the normal pattern (until the normal lottery result is suggested) (for example, 0.01 to 60 seconds, also referred to as the normal variation time). In the second start port 2004, after the normal variation time has elapsed, the second start port door member 2549 rotates to an open state. Note that, during the execution of the time-saving control described later, control is executed to shorten the normal variation time more than normal (when the time-saving control is not executed). In addition, the opening time for rotating the second start port door member 2549 to open the second start port 2004 may be changed according to the game state. For example, when the time-saving control is not executed, the opening time of the second start port 2004 may be changed to a longer time than when the time-saving control is executed.

In addition, if a new game ball passes through the gate unit 2003 between the time when the game ball passes through the gate unit 2003 and the time when the normal pattern displayed on the normal pattern display is stopped (until the normal lottery result is suggested), the normal pattern display cannot start displaying the normal pattern again, so the start of the normal pattern display is suspended until the previous normal pattern display is completed (until the indication of the normal lottery result is completed). Specifically, the normal random number acquired by the main control board 1310 based on the detection of the game ball passing through the gate unit 2003 by the gate sensor 2547 is stored, and the start of the normal pattern display is suspended until the normal pattern display can be started. Note that the number of reserved normal random numbers that can be stored in the main control board 1310 is limited to four, and any more than this are discarded without being reserved even if the game ball passes through the gate unit 2003. This prevents the increase in the burden on the game hall side from increasing due to the accumulation of reserved numbers.

In the pachinko machine 1 of this embodiment, when a game ball received in the first start hole 2002 is detected by the first start hole sensor 2104, one first special random number is obtained from among the first special random numbers updated in a predetermined numerical range in the main control board 1310, and the obtained first special random number is compared with a predetermined big win determination table to draw a first special lottery result that will generate a favorable game state (e.g., "big win", "small win", etc.) favorable to the player. Then, based on the drawn first special lottery result, the eight LEDs of the first special symbol display are controlled to blink for a predetermined variable time (e.g., 0.1 to 360 seconds) and then displayed in a lighting mode corresponding to the first special lottery result (the first special symbol is displayed variably and then a stop symbol corresponding to the first special lottery result is displayed), thereby suggesting the first special lottery result to the player. In addition, the first special lottery results that are drawn when a game ball is accepted into the first starting port 2002 include "miss," "small hit," "2R jackpot," "8R jackpot," and "10R jackpot." The obtained first special random number is compared with a jackpot determination table to determine which of these results it is. Furthermore, it is also possible to determine whether or not to execute a probability improvement control (high probability state (also called a probability change state): in this example, a jackpot is won with a probability of about 1 in 44) that improves the probability of winning a jackpot (winning probability) compared to the normal state (low probability state: in this example, a jackpot is won with a probability of about 1 in 395) after a jackpot game (probability change jackpot or not), whether or not to execute a time-saving control (time-saving state) that shortens the fluctuation time more than normal at least when the first special lottery result is a miss (time-saving jackpot or not), and the period for which the time-saving control is executed (time-saving number of times: special patterns (number of times the first special hitting pattern and the second special pattern fluctuate)). The probability of winning a "small win" is always constant regardless of the game state (in this example, approximately 1 in 300).

In addition, when a game ball received in the second starting hole 2004 is detected by the second starting hole sensor 2551, one second special random number is obtained from the second special random numbers updated in a predetermined numerical range in the main control board 1310, and the obtained second special random number is compared with a predetermined big win determination table to draw a second special lottery result that will generate a favorable game state (e.g., "big win", "small win", etc.) favorable to the player. Then, based on the drawn second special lottery result, the eight LEDs of the second special symbol display are controlled to blink for a predetermined variation time (e.g., 0.1 to 360 seconds) and then displayed in a lighting mode corresponding to the second special lottery result (the second special symbol is displayed variably and then a stop symbol corresponding to the second special lottery result is displayed), thereby suggesting the second special lottery result to the player. In addition, the second special lottery results that are drawn when a game ball is received by the second starting hole 2004 include "miss," "2R jackpot," "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," and "16R jackpot." The obtained second special random number is compared with a jackpot determination table to determine which of these results it is, and further, after playing a jackpot, the player is more likely to win a jackpot than usual (low probability state: in this example, the probability of winning a jackpot is approximately 1 in 395). It is also possible to determine whether to execute probability improvement control (high probability state (also called probability state): in this example, there is a 1 in 44 chance of winning the jackpot) to improve the probability of winning (winning probability) (whether it is a probability jackpot or not), whether to execute time-saving control (time-saving state) to shorten the fluctuation time more than usual when at least the second special lottery result is a miss (whether it is a time-saving jackpot or not), and the period during which time-saving control is executed (time-saving count: special patterns (number of times the first special hit pattern and second special pattern fluctuate)).

If the special lottery result (first special lottery result and second special lottery result) drawn by the acceptance of game balls into the first starting port 2002 and the second starting port 2004 is a special lottery result that generates a favorable game state, after a predetermined fluctuation time has elapsed, the eight LEDs of the special pattern display (first special pattern display, second special pattern display) are displayed in a lighting mode corresponding to the special lottery result, and then either the first large winning port 2005 or the second large winning port 2006 becomes able to accept game balls in a predetermined opening and closing pattern. When the first large winning opening 2005 or the second large winning opening 2006 is open and game balls are received in the first large winning opening 2005 or the second large winning opening 2006, the main control board 1310 and the payout control board 951 pay out a predetermined number of game balls (for example, 11 balls when a game ball is received in the first large winning opening 2005, or 15 balls when a game ball is received in the second large winning opening 2006) from the payout device 830 to the upper tray 201. Therefore, when the first large winning opening 2005 or the second large winning opening 2006 is able to receive game balls, by having the first large winning opening 2005 or the second large winning opening 2006 receive game balls, a large number of game balls can be paid out, which can entertain the player.

If the special lottery result is a "small win" or a "2R big win," the first large prize opening 2005 repeats an opening and closing pattern multiple times (e.g., twice) in which it is open to receive a game ball for a predetermined short period of time (e.g., between 0.2 and 0.6 seconds) and then closes. On the other hand, if the special lottery result is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," then after the first large prize opening 2005 or the second large prize opening 2006 becomes an open state capable of receiving game balls, a predetermined time (e.g., about 30 seconds) has elapsed, or a predetermined number of game balls (e.g., 7 balls) have been received into the first large prize opening 2005 or a predetermined number of game balls (e.g., 10 balls) have been received into the second large prize opening 2006, and either of these conditions is met, an opening and closing pattern (one opening and closing pattern is referred to as one round) that brings the opening and closing pattern into a closed state in which game balls cannot be received is repeated a predetermined number of times (predetermined number of rounds). For example, a "4R jackpot" is repeated 4 rounds, a "5R jackpot" is repeated 5 rounds, and a "16R jackpot" is repeated 16 rounds, thereby generating an advantageous gaming state for the player. In addition, in the opening and closing pattern executed when the special lottery result is a "small jackpot" or a "2R jackpot" (the opening and closing pattern in which the first large winning opening 2005 is in an open state capable of receiving a gaming ball for a predetermined short time (for example, between 0.2 and 0.6 seconds) and then closes), it is practically difficult to allow a gaming ball to enter the first large winning opening 2005. In contrast, in the opening/closing pattern executed when the special lottery result is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot" (an opening/closing pattern which switches to a closed state in which game balls cannot be received when either a predetermined time (e.g., about 30 seconds) has elapsed after the first large prize opening 2005 or the second large prize opening 2006 has been opened to receive game balls, or when a predetermined number of game balls (e.g., 7 balls) have been received into the first large prize opening 2005 or a predetermined number of game balls (e.g., 10 balls) have been received into the second large prize opening 2006), it is easy to insert a game ball into the first large prize opening 2005 or the second large prize opening 2006. In addition, in the case where the result of the special lottery is a "4R jackpot," "5R jackpot," "6R jackpot," "7R jackpot," "8R jackpot," "10R jackpot," or "16R jackpot," when either of the following conditions is satisfied after the first major winning port 2005 or the second major winning port 2006 becomes an open state capable of receiving game balls, a predetermined time (e.g., about 30 seconds) has elapsed, or a predetermined number of game balls (e.g., 7 balls) have been received into the first major winning port 2005 or a predetermined number of game balls (e.g., 10 balls) have been received into the second major winning port 2006, the number of rounds in which an opening and closing pattern is executed to close the state in which game balls cannot be received is substantially determined. It may be a special lottery result such as, when either of the conditions that a predetermined number (e.g., 7) of game balls are received into the first large winning opening 2005 or a predetermined number (e.g., 10) of game balls are received into the second large winning opening 2006 is met as a special lottery result, a pattern may be provided that executes multiple rounds including an opening/closing pattern that closes the opening and closing so that game balls cannot be received, and an opening/closing pattern that is executed when the special lottery result is a "small win" or a "2R jackpot" (an opening/closing pattern in which the first large winning opening 2005 is in an open state capable of receiving game balls for a predetermined short period of time (e.g., between 0.2 seconds and 0.6 seconds) and then closes). For example, a special lottery result may be set to "an 8R jackpot that is effectively 4R," and when either a predetermined number of game balls (e.g., 7 balls) are received into the first large winning opening 2005 or a predetermined number of game balls (e.g., 10 balls) are received into the second large winning opening 2006, an opening/closing pattern that closes the opening and closing so that game balls cannot be received may be repeated four times, and then an opening/closing pattern that is executed when the special lottery result is a "small win" or a "2R jackpot" (an opening/closing pattern in which the first large winning opening 2005 is in an open state that allows game balls to be received for a predetermined short period of time (e.g., between 0.2 and 0.6 seconds) and then closed) may be repeated four times.

In this embodiment, the second large prize opening 2006 is composed of the second upper large prize opening 2006a and the second lower large prize opening 2006b arranged side by side. In the case of a "jackpot" in which the second large prize opening 2006 is used, for example, in the first round (1R), the second upper large prize opening 2006a opens and can receive game balls, and is closed when the condition that makes it unacceptable is satisfied. During the interval until it is next acceptable, the second lower large prize opening 2006b opens and can receive game balls to start the next round (2R). When the second lower large prize opening 2006b becomes unacceptable, the interval period has elapsed, so the second upper large prize opening 2006a opens again and can receive game balls. Then, the second upper large prize opening 2006a and the second lower large prize opening 2006b are alternately opened and closed until a predetermined number of rounds are consumed. As a result, in the second attacca passage 2543a, either the second upper large prize opening 2006a or the second lower large prize opening 2006b is in a state where it can receive a game ball during a "jackpot", so if a game ball is circulated in the second attacca passage 2543a by hitting to the right in this state, the game ball will always be received by the second large prize opening 2006, eliminating the loss of game balls and allowing the player to enjoy the game.

In addition, in this embodiment, in some of the multiple types of jackpots described above, whether or not the above-mentioned time-saving control is executed after the end of the jackpot game is different depending on the game state at the time of winning the jackpot. For example, in a non-time-saving state (a state in which time-saving control is not being executed), if the first special lottery result is an 8R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, in a time-saving state (a state in which time-saving control is being executed), if the first special lottery result is an 8R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is executed after the jackpot game. Also, in a non-time-saving state (a state in which time-saving control is not being executed), if the second special lottery result is a 2R normal jackpot in which the probability improvement control is not executed after the jackpot game, the time-saving control is not executed after the jackpot game. On the other hand, in a time-saving state (a state in which time-saving control is being executed), if the second special lottery result is a 2R normal jackpot in which the probability improvement control is executed after the jackpot game, the time-saving control is executed after the jackpot game. Also, in a low probability non-time-saving state (a state where neither probability improvement control nor time-saving control is being executed: also called the normal state), if the first special lottery result and the second special lottery result are a 2R variable probability jackpot that executes probability improvement control after the jackpot game, time-saving control is not executed after the jackpot game. On the other hand, in a state where probability improvement control or time-saving control is being executed, that is, in a state other than the normal state, if the first special lottery result and the second special lottery result are a 2R variable probability jackpot that executes probability improvement control after the jackpot game, time-saving control is executed after the jackpot game.

In this embodiment, the display of the first special pattern change executed by the first special pattern display device upon receipt of a gaming ball into the first starting port 2002 and the display of the second special pattern change executed by the second special pattern display device upon receipt of a gaming ball into the second starting port 2004 are not executed simultaneously, but only one of them is executed. Therefore, if a new game ball is received into the first starting port 2002 or the second starting port 2004 during the period between when a game ball is received into the first starting port 2002 and the first special pattern displayed in a variable manner on the first special pattern display device is stopped (until the result of the first special lottery is suggested) and when a game ball is received into the second starting port 2004 and the second special pattern displayed in a variable manner on the second special pattern display device is stopped (until the result of the second special lottery is suggested), it is not possible to start a new display of the first special pattern or the second special pattern on the first special pattern display device or the second special pattern display device, so the start of the display of the special patterns (first special pattern, second special pattern) is suspended until the display of the previous special patterns (first special pattern, second special pattern) has ended (until the suggestion of the result of the first special lottery or the result of the second special lottery is completed). Specifically, the first special random number acquired by the main control board 1310 based on the detection of a game ball received in the first start hole 2002 by the first start hole sensor 2104 and the second special random number acquired by the main control board 1310 based on the detection of a game ball received in the second start hole 2004 by the second start hole sensor 2551 are stored, and the start of the variable display of the special symbols (first special symbol, second special symbol) is suspended until the variable display of the special symbols (first special symbol, second special symbol) can be started. Note that the number of reserved first special random numbers and second special random numbers that can be stored in the main control board 1310 is limited to four each, and any number greater than this is discarded without being reserved even if a game ball is received in the first start hole 2002 and the second start hole 2004. This prevents the increase in the burden on the game hall from the accumulation of reserved numbers. Furthermore, of the first and second special random numbers stored in the main control board 1310, the second special random number is consumed with priority. In other words, regardless of the timing of receiving the game balls into the first start port 2002 and the second start port 2004, if the second special random number is stored and the start of the variable display of the second special symbol is on hold, the variable display of the second special symbol is executed with priority over the first special symbol.

The special lottery result is suggested by the function display unit 1400 (first special pattern display, second special pattern display) and the main LCD display device 1600 (the sub LCD display device 3114 may also be used). The function display unit 1400 is directly controlled by the main control board 1310 to suggest the special lottery result. The function display unit 1400 suggests the special lottery result by repeatedly turning on and off the eight LEDs that make up the special pattern display device (first special pattern display, second special pattern display) for a predetermined period of time, and then stopping them in a predetermined lighting mode, and the special lottery result is suggested by the combination of LEDs that are lit at the time of stopping.

On the other hand, the main liquid crystal display device 1600 is indirectly controlled by the peripheral control board 1510 based on control signals (variable pattern commands, judgment result notification commands, etc.) from the main control board 1310, and the special lottery result is suggested by the performance image. Specifically, in the main liquid crystal display device 1600, a series of decorative pattern rows consisting of multiple different patterns is displayed in multiple rows (for example, three rows of left decorative pattern, center decorative pattern, and right decorative pattern), and the variable display of each decorative pattern row is started, and then they are displayed in sequence (in this example, the left decorative pattern → right decorative pattern → center decorative pattern are displayed in that order), and when all the decorative pattern rows are finally displayed, the lottery result of the special random number (first special random number, second special random number) extracted by the combination of the patterns displayed is suggested to the player. In other words, according to the special lottery result (first special lottery result, second special lottery result) based on the special random number (first special random number, second special random number) obtained when the start winning occurs, multiple decorative pattern rows are displayed in a variable manner, and then a performance image is displayed in a static manner suggesting the special lottery result (first special lottery result, second special lottery result). Note that since the decorative patterns displayed on the main LCD display device 1600 are larger and easier to see than the first special pattern displayed in a variable manner on the first special pattern display device and the second special pattern displayed in a variable manner on the second special pattern display device, players will generally focus on the decorative patterns displayed on the main LCD display device 1600.

The time indicating the special lottery result on the function display unit 1400 (LED blinking time (variation time)) is different from the time indicating the special lottery result on the main LCD display device 1600 (the time from when the pattern row changes until the final image is displayed), and is set to a shorter time on the function display unit 1400.

In addition to the display of performance images suggesting the results of the special lottery by the main LCD display device 1600, the peripheral control board 1510 can provide light-emitting performances, movable performances, display performances, etc. by appropriately using the decorations of the center role 2500, the back left center decorative unit 3050, the back bottom rear movable performance unit 3100, the back top left movable performance unit 3200, the back left movable performance unit 3300, the back top center movable performance unit 3400, and the back bottom front movable performance unit 3500, etc., depending on the results of the special lottery drawn. This allows players to be entertained by various types of performances, and prevents a decline in the player's interest in the game.

[5. Various control processes on the main control board]
Next, we will explain the processing executed by the main control board 1310 according to the progress of the game on the pachinko machine 1. Specifically, we will explain the system/user reset processing executed when the power of the gaming machine is turned on, and the timer interrupt processing executed at a predetermined cycle (4 ms in this embodiment) by a timer started by the system/user reset processing.

[5-1. Initialization process]
21 and 22 are flowcharts showing the procedure of the initialization process of the main control board in the embodiment of the present invention.

When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. When the initialization processing starts, the main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Specifically, it outputs "00H" to the RAM protection register, indicating write permission.

Then, the main control MPU 1311 starts the built-in watchdog timer (step S12). Specifically, it first writes "03H" to the watchdog timer control register, indicating a mode setting, and then writes "03H" to indicate starting the watchdog timer. It then clears and resets the watchdog timer (step S14).

Next, it is determined whether a predetermined wait time has elapsed (step S16). Since the voltage does not rise immediately after the pachinko machine 1 is powered on until it reaches the predetermined voltage, if the voltage falls below the power outage warning voltage between powering on and reaching the predetermined voltage, a power outage warning signal is input from the power outage monitoring circuit. In the wait process, a predetermined monitoring wait value is set, and the process is put on hold for a predetermined time (e.g., 200 milliseconds) while the watchdog timer is activated.

If the predetermined wait time has elapsed, the time required for the sub-board (such as the peripheral control board 1510) to start has elapsed, and it is determined whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, data backed up in the work area of the built-in RAM 1312 other than the work area for calculating the ratio of features (area for calculating the ratio of features 13128) is erased (step S30), and the process proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the built-in RAM 1312 is not erased, and it is determined whether a power outage flag has been set (step S20). The power outage flag is a flag that is set when the power supply to the pachinko machine 1 is cut off after normal processing, such as when a power outage occurs (see step S56 in FIG. 22).

If the power outage flag is not set, the data in the work area of the built-in RAM 1312 may be incorrect, so the data backed up in the work area (other than the area 13128 for calculating the role ratio) is erased (step S30) and the program proceeds to step S24. On the other hand, if the power outage flag is set, the power outage flag is cleared and the checksum calculated from the data backed up in the work area of the built-in RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

If the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of the built-in RAM 1312 may not be correct, so the data backed up in the work area (other than the reel ratio calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of the built-in RAM 1312 is correct, so the data backed up in the work area is not erased and the process proceeds to step S24.

Then, the check code is used to determine whether the work area for calculating the ratio of features (area 13128 for calculating the ratio of features) is normal (step S24). If it is determined to be abnormal, the data in the work area for calculating the ratio of features may be incorrect, so the data stored in the work area for calculating the ratio of features is erased (step S26).

When one or more backup areas are provided in the area 13128 for calculating the ratio of game devices, the main area is first judged using a check code, and if the main area is judged to be abnormal, backup areas 1, 2, and N are judged in that order, and the data of the backup area that is first judged to be normal is copied to the main area. After that, the data in the backup area may be erased or left as it is. If the main area is judged to be normal, the data in the backup area may be erased or left as it is.

The data in the feature ratio calculation area 13128 may be erased at predetermined time intervals, separate from the result of the check code when the power is turned on. Also, the data in the feature ratio calculation area 13128 may be erased for each predetermined amount of operation (for example, for each predetermined number of balls fired, for each predetermined number of winning balls, for each predetermined number of games that display special patterns, for each jackpot in each predetermined number of games that display special patterns, etc.).

In this way, in the pachinko machine of this embodiment, the data backed up in the work area of the built-in RAM 1312 is erased under different conditions for each type of data (game control data 13132 and feature ratio calculation/display data 13136). That is, by operating the RAM clear switch, the backed up game control data 13132 is erased, but the backed up feature ratio calculation/display data 13136 is not erased. If the feature ratio calculation/display data 13136 can be erased by operating the RAM clear switch, the feature ratio calculated by the pachinko machine 1 can be erased at any time. Therefore, by operating the RAM clear switch, the backed up feature ratio calculation/display data 13136 is not erased, preventing the erasure of the feature ratio calculation/display data 13136 by the operation of the game center staff, and preventing the concealment of an abnormal feature ratio state. Therefore, it is possible to easily detect a gaming machine that has been modified to have a high or low feature ratio.

When the power recovery setting of the RAM work area or the RAM initialization process is executed, the main control MPU 1311 executes the initial setting for setting various setting registers of the main control MPU 1311 (CPU 13111) (step S28). In the initial setting of the main control MPU 1311, first, the initial setting of the CTC (Counter/Timer Circuit) is performed and interrupts are permitted. Furthermore, the initial setting of the serial communication port and the test signal output port is performed. The hardware random number generation circuit is started. Then, the serial communication circuit 13114 used for communication with the peripheral control board 1510, the payout control board 951, and the reel ratio display 1317 is set. Furthermore, after the serial communication circuit 13114 starts operating, the initial setting of the driver circuit 13171 of the reel ratio display 1317 is performed.

Then, the main control MPU 1311 executes a process to set a power-on command to be sent to the peripheral control board 1510 (step S32). In the power-on command creation process, game information is read from the game backup information, and various commands corresponding to the game information are stored in a specified storage area of the main control built-in RAM 1312. The power-on command is generated by setting the power-on state reference command as reference command data, and adding command addition data corresponding to the command to be generated.

The commands issued when the power is turned on include a power-on status buffer command and special symbol/electric device operation number commands. The power-on status buffer command is a command that notifies the game status when the power is restored after being turned off, and notifies the probability of winning the special lottery and the operation mode of the regular electric device. Meanwhile, the special symbol/electric device operation number command notifies the execution status of the variable display of the special symbol.

Then, the main control MPU 1311 allows the execution of interrupt processing, including timer interrupt processing (step S34). The processing from powering on the pachinko machine 1 to step S34 completes the initial setting of the pachinko machine 1 (initial setting means).

Then, the main control MPU 1311 acquires the power outage warning signal (step S36) and determines whether the power outage warning signal is ON (step S38). If the power outage warning signal is not ON (the result of step S38 is "No"), that is, the random number update process is executed (step S40). In the random number update process of step S46, random numbers other than the random numbers used to determine whether a special lottery or a regular lottery has been won are updated. Note that the update process of the random numbers used to determine whether a special lottery or a regular lottery has been won is executed by the timer interrupt process described below. The processes from step S36 to step S40 are executed until the power outage warning signal is detected, and these processes are treated as the main process on the main control side (normal means after initial setting).

On the other hand, if a power failure warning signal is detected (the result of step S38 is "Yes"), the main control MPU 1311 executes a power failure process (power failure setting means). In the power failure process, a process is executed to back up data to restore the state before the power failure. Specifically, first, execution of interrupt processing is prohibited (step S42). This prevents the timer interrupt processing described later from being performed, prevents writing to the main control built-in RAM 1312, and protects the game information from being overwritten. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of the devices controlled by the output from each port (step S44). Specifically, the power failure clear signal OFF bit data is set to the solenoid, power failure clear, and ACK output ports. It is not necessary to clear all output ports; for example, it is sufficient to clear the output ports for controlling solenoids and motors that consume a large amount of power. By clearing these output ports, the power consumption during the time until the main board side power failure process is completed can be reduced, and the main board side power failure process can be completed reliably.

Then, the main control MPU 1311 calculates a checksum to determine whether the data stored in the work area to be backed up has been properly stored (step S46). Furthermore, the checksum calculation result is stored in the checksum area of the RAM 1312 (step S48). This checksum is used to determine whether the data backed up in the work area is normal.

Next, a check code (e.g., a checksum) is calculated from the data in the work area for calculating the ratio of features (area 13128 for calculating the ratio of features) (step S50). If the check code is a fixed value, there is no need to calculate the check code in step S50. Note that the check code may be calculated and stored each time data is updated in the feature ratio calculation and display process, rather than in the process when the main board is powered off.

Next, the calculated check code (or a predetermined value used as the check code) is stored in a predetermined area of the reel ratio calculation area 13128 (step S52).

Next, the data in the main area of the work for calculating the ratio of features (area 13128 for calculating the ratio of features) is copied to each backup area (step S54). At this time, the calculated check code is also copied. Backup may be performed as appropriate (for example, each time data is updated) during the calculation and display process of the ratio of features, rather than during the process when the power is turned off on the main board.

In this way, by storing the data used to calculate the feature ratio in a backup area together with the calculated (or predetermined) check code, the data for calculating the feature ratio can be retained even when the power is cut off, making it possible to calculate the feature ratio over a long period of operation.

Furthermore, a value indicating that the backup has been successful is stored in the backup flag area as a power outage flag (step S56). This completes the storage of the game backup information. Finally, writing to RAM 1312 is prohibited by outputting "01H" indicating write prohibition to the RAM protect register (step S58), and the system waits until the power is restored from the power outage (infinite loop).

[5-2. Timer interrupt processing]
Next, the timer interrupt process will be described. The timer interrupt process is repeatedly performed at intervals of the interrupt period (4 ms in this embodiment) set in the initialization process shown in Fig. 21 and Fig. 22. Fig. 23 is a flowchart showing an example of the timer interrupt process.

When timer interrupt processing starts, the main control MPU 1311 executes the main control program to first set the RBS (register bank selection flag) in the program status word to 1 and switch registers (step S70). In this embodiment, the main control board 1310 has bank 0 and bank 1, which are switched and used each time timer interrupt processing is executed.

Next, the main control MPU 1311 executes switch input processing (step S74). In the switch input processing, various signals input to the input terminals of various input ports of the main control MPU 1311 are read and stored as input information in the input information storage area of the main control built-in RAM 1312. Specifically, detection signals from various sensors that detect game balls entering winning holes such as general winning holes, detection signals from the magnetic detection switch 3024 that detects fraudulent acts using magnets, and a payer ACK signal from the payout control board 951 that notifies the payout control board 951 that the prize ball command sent in the prize ball control processing has been normally received are read and stored as input information in the input information storage area. In addition, in the switch input processing, detection signals from the discharged ball sensor 3060 and the shot ball sensor 1020 are read to count the number of out balls.

Then, the main control MPU 1311 performs a timer update process (step S76). In the timer update process, for example, in addition to the time during which the special symbol display 1185 is lit according to the variable display pattern determined by the special symbol and special electric role control process described later, and the time during which the normal symbol display 1189 is lit according to the normal symbol variable display pattern determined by the normal symbol and normal electric role control process, the ACK signal input judgment time, which is set as a judgment condition when judging whether or not a payer ACK signal that informs the payout control board 951 that various commands transmitted by the main control board 1310 (main control MPU 1311) have been normally received, is input, time management is performed. Specifically, when the variable display pattern or normal symbol variable display pattern variable display pattern variable time is 5 seconds, the timer interrupt period is set to 4 ms, so that the variable time is subtracted by 4 ms each time this timer subtraction process is performed, and the subtraction result becomes a value of 0, thereby accurately measuring the variable display pattern or normal symbol variable display pattern variable time.

Then, the main control MPU 1311 executes random number update process 1 (step S78). In random number update process 1, the random numbers for jackpot determination, jackpot symbol random numbers, and small jackpot symbol random numbers are updated. In addition to these random numbers, the random numbers for determining the initial values for the jackpot symbol and the small jackpot symbol random numbers are also updated in the non-win/lose random number update process of step S40 in the system/user reset process (main process on the main control side) shown in the figure.

Then, the main control MPU 1311 executes the prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the result is written to the main control built-in RAM 1312. In addition, based on the calculation result of the number of prize balls, a prize ball command for paying out game balls is created, and a self-check command for checking the connection status between the main control board 1310 and the payout control board 951 is created. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data.

Then, the main control MPU 1311 determines the current game state, adds the number of prize balls to be paid out as the game value to an area corresponding to the current game state, and updates the area 13128 (see FIG. 26) for calculating the ratio of prize balls in the main control built-in RAM 1312 (step S81). The process of step S81 can be skipped if there are no prize balls to be paid out in step S80, thereby reducing the load on the pachinko machine 1.

Next, the main control MPU 1311 executes the frame command reception process (step S82). In the dispensing control board 951, the dispensing control program transmits various 1-byte (8-bit) commands classified as status display (e.g., frame status 1 command, error release navigation command, and frame status 2 command). On the other hand, as described below, the dispensing control program outputs an error occurrence command when an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the frame command reception process, when various commands are normally received as the payer serial data, information that conveys this to the payer control board 951 is stored as output information in the output information storage area of the main control built-in RAM 1312. In addition, the main control MPU 1311 formats the command normally received as the payer serial data into a 2-byte (16-bit) command (e.g., frame status display command, error release notification command, etc.) and stores it as transmission information in the transmission information storage area described above. In addition, during the prize ball discharge process, the number of prize balls discharged is recorded in a memory area (see FIG. 27) determined by the game status of the device ratio calculation area 13128.

The reel ratio calculation area update process (step S81) may be performed in any order, provided that it is performed after the prize ball control process (step S80) and before the reel ratio calculation and display process (step S89).

Then, the main control MPU 1311 executes a fraud detection process (step S84). In the fraud detection process, an abnormal state related to the winning ball is confirmed. For example, when the input information is read from the input information storage area described above, and the count switch detects that a game ball has entered the big winning opening 2005, 2006 when the big winning game state is not being played, the main control program creates a winning abnormality display command classified as a notification display as an abnormal state, and stores it as transmission information in the transmission information storage area described above.

Then, the main control MPU 1311 executes the special symbol and special electric device control process (step S86). In the special symbol and special electric device control process, it is determined whether the random number value for the jackpot matches a hit determination value previously stored in the main control built-in ROM. Furthermore, it is determined whether to transition to a probability variable state based on the random number value of the jackpot symbol. Then, if the probability variable transition condition is met, the state is subsequently transitioned to the probability variable state, whereas if the probability variable transition condition is not met, the state is transitioned to a game state other than the probability variable state. Here, the "probability variable state" refers to a state (high probability state) in which the probability of winning the special lottery described above is set relatively high compared to the normal game state (low probability state).

Next, the main control MPU 1311 executes the normal symbol and normal electric device control process (step S88). In the normal symbol and normal electric device control process, the input information is read from the input information storage area described above, and it is determined whether or not a detection signal from the gate switch 2352 has been input to the input terminal. If a detection signal has been input to the input terminal, a random number for determining whether or not a normal symbol has been hit is extracted, and it is determined whether or not it matches the normal symbol hit determination value previously stored in the main control built-in ROM (called the "normal lottery"). Then, depending on the lottery result of the normal lottery, it is determined whether or not to open or close the second start port door member 2549. If the opening and closing operation is performed based on this decision, the second start port door member 2549 is opened (or expanded), and the game state becomes one in which the game ball can be received by the start port 2004, and the game state is transitioned to one that is advantageous to the player.

The main control MPU 1311 then determines whether the display switch 1318 has been operated, and if so, calls up the feature ratio calculation and display process (Figs. 24 and 25) and calculates the feature ratio by referring to the number of winning balls stored in the feature ratio calculation area 13128. The calculated feature ratio is then displayed on the feature ratio display 1317 (step S89). In this way, by calling up the feature ratio calculation and display process in the timer interrupt process and calculating the feature ratio, the feature ratio (the gambling nature of the pachinko machine 1) can be confirmed based on the most recent data.

Regardless of whether the display switch 1318 is operated, if the main frame opening switch (not shown) detects that the main frame 4 has been released from the outer frame 2, the bonus ratio may be displayed. Also, if the display switch 1318 is operated while the main frame opening switch (not shown) is detecting that the main frame 4 has been released from the outer frame 2, the bonus ratio may be displayed on the bonus ratio display 1317. Since the display switch 1318 is provided on the back side of the game board, if the display switch 1318 is displayed, the main frame 4 is usually open and the progress of the game has stopped. In this way, if the bonus ratio is calculated at the timing when the progress of the game has stopped, CPU resources are not consumed by division or subtraction to calculate the bonus ratio during play, and the load on the CPU can be reduced.

Details of the role ratio calculation and display process will be described later in FIG. 24 and FIG. 25. Specific examples of the role ratio display method will be described later. When the display switch 1318 is operated, all types of values (role ratio, consecutive role ratio, cumulative total, total cumulative total) may be calculated, but only the value to be displayed may be calculated each time the display switch 1318 is operated. Also, the role ratio may be calculated regardless of whether the display switch 1318 is operated, and if the display switch 1318 is operated, the calculated role ratio may be displayed on the role ratio display 1317.

Even if the pachinko machine 1 detects fraud and stops playing, it still executes the reel ratio calculation area update process (step S81) and the reel ratio calculation and display process (step S89). By executing these processes, regardless of whether fraud has been detected or not, the reel ratio can be confirmed even during a fraud alert.

Next, the main control MPU 1311 executes an output data setting process (step S90). In the output data setting process, various signals are output from the output terminals of the various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are normally received from the output terminal of a predetermined output port of the main control MPU 1311 based on the output information, a main payout ACK signal is output to the payout control board 951, and when in a jackpot game state, a drive signal is output to the attacca solenoids (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556) that open and close the opening and closing members 2107 of the large winning openings 2005 and 2006, and a drive signal is output to the start port solenoid 2550 that opens and closes the start port (second start port door member 2549). In addition, various information (game information) signals related to the game, such as probability fluctuation information output signal, special pattern display information output signal, normal pattern display information output signal, time reduction information output signal, start port winning information output signal, and security signals, are output to the payout control board 951.

In addition, in the output data setting process, a signal corresponding to the number of out balls counted in the switch input process (step S74) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 for every predetermined number of out balls (e.g., 10 balls).

The output data setting process also sets test signals to be output to an inspection device connected to the pachinko machine 1. Test signals include, for example, signals indicating the game status and signals indicating the stopping patterns of normal and special symbols (information signal output means).

Then, the main control MPU 1311 executes the peripheral control board command transmission process (step S92). In the peripheral control board command transmission process, the transmission information such as commands and data is read from the transmission information storage area described above, and the transmission information is transmitted to the peripheral control board 1510 as main circuit serial data. The transmission information stores various commands created in the timer interrupt process, which is this routine. The main circuit serial data is composed of 3 bytes per packet. Specifically, the main circuit serial data is composed of a status indicating the type of command with a storage capacity of 1 byte (8 bits), a mode indicating the variation of the performance with a storage capacity of 1 byte (8 bits), and a sum value calculated by treating the status and mode as numerical values, and this sum value is generated at the time of transmission.

Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). By setting the predetermined value in the watchdog timer clear register WCL, the watchdog timer clear register WCL is cleared. Finally, the main control MPU 1311 switches (restores) the register bank. When the above processing is completed, the timer interrupt processing is terminated and processing before the interrupt is restored.

In the pachinko machine 1 of this embodiment, the main control MPU 1311 executes the calculation process of the role ratio and the consecutive role ratio in the timer interrupt process, but the payout control MPU of the payout control unit 952 may execute the calculation process of the role ratio and the consecutive role ratio. In this case, the main control board 1310 may send a command to the peripheral control unit 1511 of the peripheral control board 1510 to display the role ratio and the consecutive role ratio, or the payout control unit 952 may send a command to the peripheral control unit 1511 to display the role ratio and the consecutive role ratio.

[5-3. Calculation and display processing of the reel ratio]
24 and 25 are flowcharts showing an example of a role ratio calculation and display process. The role ratio calculation and display process is executed by the main control MPU 1311. The peripheral control unit 1511 of the peripheral control board 1510 may execute the role ratio calculation and display process. When the peripheral control unit 1511 calculates the role ratio, the calculated role ratio may be displayed on the main liquid crystal display device 1600. For example, if the calculated role ratio is within a predetermined range (or outside the range), the performance in the game may be changed. Specifically, if the role ratio exceeds a predetermined threshold (a threshold smaller than a reference value), the preview performance may be changed to provide a preview performance that is more interesting than a normal preview performance.

First, a check code is calculated from the main area of the feature ratio calculation area 13128 of the RAM 1312 of the main control MPU 1311 (step S140), and it is determined whether the calculated check code matches the check code stored in the feature ratio calculation area 13128 (step S142). If the calculated check code matches the check code stored in the feature ratio calculation area 13128, the data in the main area is normal, so a feature ratio calculation process is executed, and the feature ratio and consecutive feature ratio are calculated from the data in the main area and stored in the feature ratio calculation area 13128 (step S156). Specifically, the feature ratio is calculated by the number of feature balls acquired ÷ the total number of acquired balls, and the consecutive feature ratio is calculated by the number of consecutive feature balls acquired ÷ the total number of acquired balls. The decimal parts (values below the decimal point) of the calculated feature ratio and consecutive feature ratio may be truncated or rounded off. Then, proceed to step S160.

In addition, in step S156, each time the reel ratio and/or continuous reel ratio in the reel ratio calculation area 13128 is updated, the updated value may be copied to the backup area.

If the number of bits in which the number of acquired balls is stored is large and the number of bits available for calculation by the main control MPU 1311 is insufficient, the lower bits of the number of acquired balls may be omitted and division may be performed to calculate the ratio of the game features. For example, if the storage area for the number of acquired balls is 32 bits, values from 0 to 4,294,967,295 can be stored. However, if the main control MPU is an 8-bit processor and can perform 8 or 16-bit calculations, it is advisable to take out the 16 bits below the most significant bit with a value of 1 from the number of acquired balls stored in 32 bits and store them in a calculation register (16 bits) for division. Note that if the number of acquired balls is less than the maximum number of bits available for calculation (32,767, the maximum value of 16 bits), the lower 16 bits may be taken out and used for calculation.

You can also avoid using decimals to calculate the ratio of winning balls by dividing the total number of winning balls by 100 (rounding down to the nearest whole number) and using that as the dividend (the number to be divided).

Also, the upper limit of the reel ratio can be set to 99, and if the calculated reel ratio is 100 or more, it can be set to 99.

On the other hand, if the calculated check code does not match the check code stored in the reel ratio calculation area 13128, the data in the main area is abnormal, so an attempt is made to calculate the reel ratio from the data in the backup area 1. Specifically, a check code is calculated from the backup area 1 of the reel ratio calculation area 13128 (step S144), and it is determined whether the calculated check code matches the check code stored in the reel ratio calculation area 13128 (step S146). If the calculated check code matches the check code stored in the reel ratio calculation area 13128, the data in the backup area 1 is normal, so the data in the backup area 1 is copied to the main area (step S148), a reel ratio calculation process is executed, and the reel ratio and continuous reel ratio are calculated from the data in the main area (step S156). Then, proceed to step S160.

On the other hand, if the calculated check code does not match the check code stored in the reel ratio calculation area 13128, the data in the backup area 1 is abnormal, so an attempt is made to calculate the reel ratio from the data in the backup area 2. Specifically, a check code is calculated from the backup area 2 in the reel ratio calculation area 13128 (step S150), and it is determined whether the calculated check code matches the check code stored in the reel ratio calculation area 13128 (step S152). If the calculated check code matches the check code stored in the reel ratio calculation area 13128, the data in the backup area 1 is normal, so the data in the backup area 2 is copied to the main area (step S154), a reel ratio calculation process is executed, and the data in the main area is read to calculate the reel ratio and the continuous reel ratio (step S156). Then, proceed to step S160.

If there are other backup areas, it is similarly determined whether the data in those backup areas is normal, and the reel ratio and continuous reel ratio are calculated from the data in the normal backup areas.

If the data in the main area and all backup areas is abnormal, the work area for calculating the ratio of reels (area 13128 for calculating the ratio of reels) is initialized and the abnormality is reported (step S158).

Next, a check code is calculated from the main area (step S160), and the calculated check code is stored in the feature ratio calculation area 13128 (step S162). The reason why the check code is calculated in the feature ratio calculation/display process is that if the main board is reset during the power-off process, the power failure flag and checksum are not calculated, and the data backed up in the RAM 1312 is initialized in the initialization process. However, if the check code is calculated and stored periodically in the feature ratio calculation/display process, the data in the feature ratio calculation work area (feature ratio calculation area 13128) can be left without being erased even if the power to the pachinko machine is turned back on.

Then, the backup area allocation counter value is updated by adding 1 (step S164), and it is determined whether the backup area allocation counter value is odd (step S166). If the backup area allocation counter value is odd, the data in the main area is copied to backup area 1 (step S168). On the other hand, if the backup area allocation counter value is even, the data in the main area is copied to backup area 2 (step S170). By allocating the destination of the data in the main area according to the backup area allocation counter value and writing the data to only some of the backup areas, it is possible to prevent abnormal values from being written to multiple backup areas.

When three or more backup areas are provided, the backup area to which data is written can be allocated based on the remainder obtained by dividing the backup area allocation counter value by the number of backup areas.

Then, the calculated feature ratio is displayed on the feature ratio display 1317 (step S172). Specifically, using the calculated feature ratio type and the calculated value, a conversion table (not shown) is referenced to obtain data to be displayed in each digit of the feature ratio display 1317, and the obtained data is sent to the driver circuit 13171 of the feature ratio display 1317. For example, if the feature ratio type is feature ratio (cumulative), A7 is displayed in the top two digits, and if the calculated feature ratio is 66%, 66 is displayed in the bottom two digits.

The feature ratio calculation process (step S156) of the feature ratio calculation and display process reads data on the number of balls acquired from the feature ratio calculation area 13128 (i.e., the feature ratio calculation work area shown in FIG. 27), but cannot write data to the memory area related to the number of balls acquired in the feature ratio calculation area 13128. In other words, as described below, if the processes of steps S156 and S172 are configured by a common program module, the common program module does not have the authority to write data to the memory area related to the number of balls acquired in the feature ratio calculation area 13128, but can write data to the memory area of the calculated feature ratio and consecutive feature ratio.

As explained above, the data used to calculate the reel ratio during the reel ratio calculation and display process is duplicated in the backup area, so that the data used to calculate the reel ratio can be protected if normal power-off processing is not performed due to an abnormal reset, etc.

The processes of steps S156 and S172 are common regardless of the type of gaming machine, so they may be configured as one or more common program modules. In this case, the process of determining whether the check code in the main area and the check code in the backup area are correct may be configured on the non-common side, separate from the common program module. This is because the methods of checking and backing up data differ from model to model. However, if the methods of checking and backing up data are standardized between models, they may be placed in the common program module.

[6. Storage Area Configuration]
Next, a description will be given of the arrangement of programs and data stored in the ROM 1313. Fig. 26(A) is a diagram showing an example of the arrangement of programs (codes) and data stored in the ROM 1313 and RAM 1312 built into the main control MPU 1311 of the main control board 1310.

ROM 1313 includes areas for storing game control code 13131, game control data 13132, debugging (inspection function) code 13133, debugging (inspection function) data 13134, feature ratio calculation/display code 13135, and feature ratio calculation/display data 13136. In this embodiment, the ROM 1313 is assigned a game control area (first memory area) for storing programs and data related to the pachinko machine 1, such as game control code 13131 and game control data 13132; a debug (inspection function) area (second memory area) for storing programs and data used for the purpose of outputting signals necessary for the debugging (inspection function) of the pachinko machine 1, such as debug (inspection function) code 13133 and debug (inspection function) data 13134; and a role ratio calculation area (third memory area) for storing programs used for the purpose of calculating role ratios, such as role ratio calculation/display code 13135 and role ratio calculation/display data 13136.

Between the final address of the game control data 13132 and the first address of the debug (inspection function) code 13133, there is a free space (unused space) of 16 bytes or more, so that the game control area and the debug (inspection function) area can be easily distinguished when displayed in a dump list format. Similarly, between the final address of the debug (inspection function) code 13133 and the first address of the role ratio calculation/display code 13135, there is a free space (unused space) of 16 bytes or more, so that the debug (inspection function) area and the role ratio calculation area can be easily distinguished when displayed in a dump list format. The value stored in the free space is preferably a fixed value that is the same value, and is set to a value different from the values set in the game area and the debug area or a value that is set less frequently. The value stored in the free space may also be a command that the CPU does nothing, such as a No Operation code. In this way, when displayed in a dump list format, the game control area, the debug (inspection function) area, and the role ratio calculation area can be easily distinguished.

Also, instead of separating the debug (inspection function) area from the feature ratio calculation area, the feature ratio calculation/display code 13135 and feature ratio calculation/display data 13136 may be stored in part of the debug area. In other words, it is sufficient that the game control area and other areas are clearly distinguished. In this way, by clearly distinguishing between the game control area and other areas, the feature ratio calculation area (feature ratio calculation/display code 13135 and feature ratio calculation/display data 13136), which is a process that is not directly related to the control of the progress of the game, is placed separately from the game control area, avoiding the risk of a malfunction (bug, etc.) of the feature ratio calculation/display code 13135 affecting game control.

The debug (inspection function) area stores programs and data for purposes that are not directly related to the game, for example, code 13133 for outputting various function inspection signals that are used only when debugging the pachinko machine 1 other than the game control of the pachinko machine 1. These debug (inspection function) codes 13133 are programs for outputting debug (inspection function) signals. The feature ratio calculation area stores a program for calculating feature ratios that is not directly related to the progress of the game.

The game control code 13131 is executed by the main control MPU 1311. The game control code 13131 can be read and written to the RAM 1312 as appropriate, but the game control area 13126 used by the game control code 13131 is configured so that only reading can be performed from the debug (inspection function) code, and writing to the area cannot be performed. In this way, the game control area 13126 constitutes a game area that can be accessed only from the game control code 13131. Processing based on the debug (inspection function) code 13133 can be called and executed unilaterally while the game control code 13131 is being executed, but it is configured so that the game control code 13131 cannot be called and executed from the debug (inspection function) code. This increases the independence of the debugging (testing function) code 13133, so that even if the game control code 13131 is changed, changes to the debugging (testing function) code 13133 can be kept to a minimum.

The feature ratio calculation/display code 13135 is called from the game control code 13131 (for example, step S89 of the timer interrupt process shown in FIG. 23) and executed by the main control MPU 1311. The feature ratio calculated by the feature ratio calculation/display code 13135 is stored in the feature ratio calculation area 13128 of the RAM 1312. The feature ratio calculation area 13128 is provided separately from the game control area 13126 (outside the game control area) as shown. In this way, by designing the feature ratio calculation/display code 13135 separately from the game control code 13131 and storing them in different areas, the feature ratio calculation/display code 13135 and the game control code 13131 can be inspected separately, and the effort required for inspecting the pachinko machine 1 can be reduced. In addition, the code 13135 for calculating and displaying the ratio of features can be used across multiple models, regardless of the model.

Figure 26 (B) is a diagram showing details of the feature ratio calculation area 13128. The feature ratio calculation area 13128 may have a main area in which the feature ratio calculation result is stored, as well as a backup area 1 and a backup area 2 in which copies of the data stored in the main area are stored. There may be one or more backup areas. A check code for detecting data errors is added to each area. The check code may be a checksum of the data in each area or a predetermined value. The check code may be set in the initialization process when the pachinko machine 1 is turned on, set each time the data in the main area is updated in the feature ratio calculation/display process, or set in the main control side power off process (steps S50 to S54 in Figure 22). In particular, if the check code is a fixed value, the check code may be initialized when the initialization process determines that the data is normal or erases the data, and the fixed value may be set in the main control side power off process (step S50 in Figure 20). The check code may also be used as a power outage flag. That is, if a predetermined value is set in the check code of the main area, it may be determined that the power outage flag is set. Also, if a predetermined value is set in the power outage flag, it may be determined that the check code of each area is a correct value (i.e., the data in each area is normal).

When it is determined that the main area is abnormal, it may be determined whether the backup area is normal, and data from the backup area that is determined to be normal may be copied to the main area (step S24 in FIG. 21). In addition, in the process when the power supply to the main control side is cut off, the value of the main area may be copied to each backup area (step S54 in FIG. 22). In addition, in the reel ratio calculation and display process, each time the value of the main area is updated, the updated data may be copied to the backup area (steps S168 and S170 in FIG. 25).

Unused space is provided between the main area and backup area 1, and between backup area 1 and backup area 2. By providing unused space between each area, the addresses of each area can be separated, and each area can be distinguished by the upper digits of the address.

Figure 27 is a diagram showing the specific structure of the work area for storing each data in the feature ratio calculation area 13128. The data on the number of acquired balls in the feature ratio calculation area 13128 is written in the timer interrupt process (Figure 23) timed by the main control MPU 1311, and is read out in the feature ratio calculation process (step S156 in Figure 24) of the feature ratio calculation/display process. In this way, the feature ratio calculation/display process reads the data on the number of acquired balls from the feature ratio calculation area 13128, and the timer interrupt process (game control program) writes the data on the number of acquired balls in the feature ratio calculation area 13128, so that the game control program and the program that executes the feature ratio calculation/display process can be completely separated, and the program for the feature ratio calculation/display process can be shared even for gaming machines with different specifications.

The reel ratio calculation process (step S156 in FIG. 24) of the reel ratio calculation and display process writes the calculated reel ratio and continuous reel ratio to the reel ratio and continuous reel ratio storage areas of the reel ratio calculation area 13128. When displaying the reel ratio, the calculated reel ratio and continuous reel ratio data is read out in the reel ratio display process (step S170 in FIG. 25) of the reel ratio calculation and display process. The game control program does not access the reel ratio and continuous reel ratio storage areas of the reel ratio calculation area 13128.

Figure 27 (A) shows the structure of the work area in the simplest way. In the structure of the work area shown in Figure 27 (A), the number of balls acquired from the role, the number of balls acquired from consecutive roles, the total number of balls acquired, the role ratio, and the consecutive role ratio are stored. The number of balls acquired from the role is the number of prize balls that have been awarded to the role in operation (for example, the large prize openings 2005 and 2006 that are open, and the second start opening 2004 when the second start opening door member 2549 is open). The number of consecutive role balls that have been awarded is the number of prize balls that have been awarded to the role when the role is continuously operating (for example, the prize opening is open during a series of big wins). The total number of balls that have been awarded is the total number of prize balls paid out to the player. The role ratio can be calculated by dividing the number of balls acquired from the role by the total number of balls acquired. The consecutive role ratio can be calculated by dividing the number of balls acquired from consecutive roles by the total number of balls acquired. The number of balls acquired by the special feature, the number of balls acquired by consecutive special features, and the total number of balls acquired are updated in step S81 of the timer interrupt process, and the special feature ratio and consecutive special feature ratio are calculated and stored in step S91 of the timer interrupt process.

Of the work area structure shown in Figure 27 (A), the number of balls acquired by special features, the number of balls acquired by consecutive special features, and the total number of balls acquired correspond to the total cumulative total in Figure 27 (B) described below, and each is a 3 or 4 byte memory area that can store values up to 16777215 or 4294967295 in decimal. Since this data is not erased unless an abnormality occurs in the data, a large memory area is provided so that data can be stored for a long period of time. Additionally, the special feature ratio and consecutive special feature ratio are 1 byte memory areas that can store values up to 255 in decimal.

Figure 27 (B) shows the structure of the work area using a ring buffer. In the structure of the work area shown in Figure 27 (B), the number of balls acquired from the special feature, the number of other balls acquired, the number of consecutive balls acquired from the special feature, the total number of balls acquired, the special feature ratio, and the consecutive feature ratio are stored. In addition, the storage area for each data is configured by a ring buffer having n storage areas (for example, n = 10 storage areas for every 6000 prize balls) for each predetermined number of prize balls, and when the total number of balls acquired reaches a predetermined number (6000 balls), the write pointer for all data moves and the storage area in which the data is updated changes. Then, after the data for the predetermined number of prize balls is stored in the nth storage area, the write pointer moves to the first storage area and the data is stored in the first storage area. Note that the write pointer may be moved when data other than the total number of balls acquired (number of balls acquired from the special feature, number of balls fired, number of winning balls, number of games with special symbol variation display, number of jackpots in the special symbol variation display game, etc.) reaches a predetermined number.

The write pointer and read pointer of the ring buffer are common to all data, and the write pointer of all data columns moves for each specified number of winning balls. In addition, the read pointer also moves as the write pointer moves. The read pointer points to the memory area immediately before the write pointer. This is because the most recent data for 6,000 winning balls is used to calculate the ratio of winning balls.

The cumulative total of each data is the cumulative value of the data stored in the n memory areas of the ring buffer, and the cumulative values of the feature ratio and continuous feature ratio are values calculated from the cumulative values of each data, and when the ring buffer goes through one cycle and one memory area of the ring buffer is cleared to write new data, the cumulative value is calculated excluding the data of the cleared area. The total cumulative total of each data is the cumulative value of data collected in the past, and the total cumulative values of the feature ratio and continuous feature ratio calculated from the cumulative values are values calculated from the total cumulative values of each data, and even when the ring buffer goes through one cycle and one memory area of the ring buffer is cleared to write new data, the total cumulative value is calculated including the data of the cleared area.

Of the work area structure shown in FIG. 27(B), the number of balls acquired from special features, the number of balls acquired from consecutive special features, the special feature ratio, and the consecutive special feature ratio are the same as those explained in FIG. 27(A). The number of other acquired balls is the number of prize balls that have been won through prizes other than special features (a prize opening that does not open or close, such as the general prize opening 2001). The total number of acquired balls is the total number of prize balls paid out to the player, and when this value reaches a predetermined number, the write pointer moves. The number of balls acquired from special features, the number of other acquired balls, the number of balls acquired from consecutive special features, and the total number of acquired balls are updated in the data of the memory area where the write pointer is located in step S81 of the timer interrupt process, and the special feature ratio and consecutive special feature ratio are calculated and stored in step S91 of the timer interrupt process.

Figure 27 (C) shows the structure of the work area using a ring buffer. The work area structure shown in Figure 27 (C) can obtain more detailed data than that shown in Figure 27 (B), and stores the number of balls acquired for normal electric role devices, the number of balls acquired for special electric role devices, the number of balls acquired for the starting port, the number of balls acquired for other winning ports, the number of balls acquired for consecutive role devices, the total number of balls acquired, the role device ratio, and the consecutive role device ratio. In addition, the storage area for each data is composed of a ring buffer with n storage areas (for example, 10 storage areas for every 6000 winning balls) for each predetermined number of winning balls, and when the total number of winning balls reaches a predetermined number (6000 balls), the write pointer moves and the storage area in which the data is updated changes. Then, after the data for the predetermined number of winning balls is stored in the nth storage area, the write pointer moves to the first storage area and the data is stored in the first storage area. In addition, the write pointer may be moved when data other than the total number of balls won (number of balls won by special electric devices, number of balls fired, number of winning balls, number of games with special symbol change display, number of jackpots in the special symbol change display game, etc.) reaches a predetermined number.

The cumulative total of each data is the cumulative value of the data stored in the n memory areas of the ring buffer, and the cumulative values of the reel ratio and continuous reel ratio are values calculated from the cumulative values of each data, and when the ring buffer goes through one cycle and is cleared to one memory area of the ring buffer to write new data, the cumulative value is calculated excluding the data in that cleared area. The total cumulative total of each data is the cumulative value of data collected in the past, and the cumulative values of the reel ratio and continuous reel ratio are values calculated from the cumulative values of each data, and even when the ring buffer goes through one cycle and is cleared to one memory area of the ring buffer to write new data, the total cumulative value is calculated including the data in that cleared area.

In the work area structure shown in Figures 27 (B) and (C), the number of balls acquired from the special feature in the ring buffer, the number of other balls acquired, the number of consecutive feature balls acquired, the total number of balls acquired, the number of balls acquired from the normal electric feature, the number of balls acquired from the special electric feature, the number of balls acquired from the starting port, and the number of balls acquired from the other winning ports are each 2-byte memory areas that can store values up to 65535 in decimal. The cumulative number of balls acquired from the special feature, the number of other balls acquired, the number of consecutive feature balls acquired, the total number of balls acquired, the number of balls acquired from the normal electric feature, the number of balls acquired from the special electric feature, the number of balls acquired from the starting port, and the number of balls acquired from the other winning ports are each 3-byte memory areas that can store values up to 16777215 in decimal. The cumulative total is the sum of data for 6000 prize balls x n (60000 prize balls when n = 10), so a large memory area is provided. The total cumulative totals of the number of balls acquired from the reel, the number of other balls acquired, the number of balls acquired from consecutive reels, the total number of balls acquired, the reel ratio, the consecutive reel ratio, the number of balls acquired from normal electric reels, the number of balls acquired from special electric reels, the number of balls acquired from the starting port, and the number of balls acquired from other winning ports are each 3 or 4 bytes of memory area and can store values up to 16777215 or 4294967295 in decimal. Since the total cumulative totals are not erased unless an abnormality occurs in the data, an even larger memory area is provided so that data can be stored for a long period of time. Additionally, the cumulative totals and total cumulative totals of the reel ratio and consecutive reel ratio are each 1 byte of memory area and can store values up to 255 in decimal.

In the structure of the work area shown in FIG. 27(C), the total number of balls won, the ratio of the role, and the ratio of the consecutive role are the same as those explained in FIG. 27(B). The number of other balls won is the number of prize balls won by winning a prize other than a role (a prize opening that does not open or close). The number of balls won by a normal electric role is the number of prize balls won by winning a normal electric role (the second start opening 2004 with the second start opening door member 2549 open) that is in operation as a result of a lottery based on a normal pattern. The number of balls won by a special electric role is the number of prize balls won by winning a special electric role (for example, the large prize opening 2005, 2006 that is open) that is in operation as a result of a lottery based on a special pattern. The number of balls won by a start opening is the number of prize balls won by winning a prize opening (the first start opening 2002). The number of balls won by other prize openings is the number of prize balls won by winning a prize opening (the general prize opening 2001) that is not a role (does not operate) and does not trigger a lottery based on a special pattern. The data in the memory area where the write pointer is located is updated in step S81 of the timer interrupt process for the number of balls acquired from normal electric devices, the number of balls acquired from special electric devices, the number of balls acquired from the starting port, the number of balls acquired from other winning ports, the number of balls acquired from consecutive devices, and the total number of balls acquired, and the ratio of devices and the ratio of consecutive devices are calculated and stored in step S91 of the timer interrupt process.

In the data structure shown in FIG. 27(A), if the stored value is determined to be abnormal, the data in the reel ratio calculation area 13128 is erased in step S116 of the initialization process, but the data is not erased due to other triggers. For this reason, the data in the reel ratio calculation area 13128 may be erased every predetermined period (e.g., one day, one week, one month, etc.). Similarly, the total cumulative values in FIG. 25(B)(C) may be erased every predetermined period.

In addition, if the data in the device ratio calculation area 13128 or the calculated device ratio is an abnormal value (for example, the device ratio is over 100%, the device ratio calculation result has changed significantly from the previous calculation value, the number of device balls acquired > the total number of balls acquired, etc.), the abnormal value may be erased. Not only the abnormal value but also all data in the device ratio calculation area 13128 may be erased. In addition, if the data in the device ratio calculation area 13128 or the calculated device ratio is an abnormal value, an abnormality may be notified. In addition, the data in the backup area may be inspected using a check code, and the device ratio may be calculated again after copying normal data from the backup area to the main area.

[7. Configuration of the role ratio display device]
FIG. 28 is a diagram showing the configuration of the reel ratio display 1317.

The role ratio display 1317 is composed of a driver circuit 13171 and multiple 7-segment LEDs 13172. For example, the 7-segment LEDs 13172 are composed of 4 digits.

The driver circuit 13171 and the 7-segment LED 13172 are preferably housed together in a single package, but may also be housed in separate packages.

The driver circuit 13171 and the main control MPU 1311 are connected by three signal lines (DATA, LOAD, CLOCK).

The DATA line transfers data to be displayed on the reel ratio display 1317 and signals that set the operating status of the reel ratio display 1317, and is connected to the serial communication circuit 13114 of the main control MPU 1311. The LOAD line transfers a signal indicating the timing of data import, and is connected to the serial communication circuit 13114 of the main control MPU 1311. The CLOCK line transfers a clock signal that determines the operating period of the driver circuit 13171, and is connected to the serial communication circuit 13114 of the main control MPU 1311.

The driver circuit 13171 and the 7-segment LED 13172 are connected by four digit selection signal lines IDIG-0 to IDIG-3 and eight segment lighting signal lines ISEG-a to ISEG-Dp. The segment lighting signal lines ISEG-a to ISEG-Dp transmit signals that light up each LED element (7 segments and decimal point) of the 7-segment LED 13172. The digit selection signal lines IDIG-0 to IDIG-3 transmit control signals that indicate which digit of the 7-segment LED 13172 the signal transmitted by the segment lighting signal lines ISEG-a to ISEG-Dp corresponds to. Note that the direction of the illustrated signal (current) differs depending on whether the 7-segment LED 13172 is an anode common type or a cathode common type, but an example of an anode common type is illustrated.

A resistor 13174 that determines the value of the current that flows through each LED element of the 7-segment LED 13172 is connected to the R-EXT terminal of the driver circuit 13171. By changing the resistance value of the resistor 13174, the light emission brightness of each LED element of the 7-segment LED 13172 can be changed.

Figure 29 shows the configuration of the driver circuit 13171 of the role ratio display 1317.

The driver circuit 13171 has a 16-bit shift register 3171, a 16-bit data latch 3172, an 8-bit data latch 3173A-D, an 8x4 data selector 3174, a decoder 3175, a 2x8 data selector 3176, a constant current driver 3178, a driver 3179, a latch selector/load pulse distributor 3180, a Digit-Limit control unit 3181, a duty ratio control unit 3182, a data selector control unit 3183, a standby mode control unit 3184, and an oscillator 3185.

The 16-bit shift register 3171 takes in serial data input to the DATA IN terminal, holds 16 bits of data, and sends it as parallel data to the 16-bit data latch 3172. The four bits D15 (MSB) to D12 are data for selecting the operating mode of the driver circuit 13171 (see Figure 35), the four bits D11 to D8 are data for selecting the register corresponding to the operating mode (see Figure 33), and D7 to D0 (LSB) are data for detailed settings.

The 16-bit data latch 3172 latches data at the timing of the LOAD signal, sends D15 to D8 to each control unit (latch selector/load pulse distributor 3180, digit-limit control unit 3181, duty ratio control unit 3182, data selector control unit 3183, standby mode control unit 3184), and sends D7 to D0 to the 8-bit data latches 3173A to D.

Specifically, as shown in FIG. 30, the 16-bit shift register 3171 takes in serial data input to the DATA IN terminal at the rising edge of the CLOCK signal and shifts the data. The 16-bit data latch 3172 acquires 16 bits of data as parallel data from the 16-bit shift register 3171 at the rising edge of the LOAD signal and latches the data. It then sends D15 to D8 to each control unit (latch selector/load pulse distributor 3180, digit-limit control unit 3181, duty ratio control unit 3182, data selector control unit 3183, and standby mode control unit 3184). The 16-bit data latch 3172 also sends D7 to D0 of the latched data to the 8-bit data latches 3173A to 3173D at the falling edge of the LOAD signal.

The LOAD signal is also input to the latch selector and load pulse distributor 3180. The latch selector and load pulse distributor 3180 acquires D15 to D8 and selects the 8-bit data latch 3173 that stores the display data (8 bits D7 to D0). Specifically, as shown in the load register selection table (see FIG. 33), if D15 to D8 are 00100010B, the latch selector and load pulse distributor 3180 sends a signal to select the 8-bit data latch 3173 so that the 8-bit data latch 3173A of data register 0, i.e., Digit-A, stores the data.

The 8-bit data latches 3173 are provided in the same number as the 7-segment LEDs 13172 (number of display digits), and capture and hold data to be displayed on each 7-segment LED in accordance with the selection signal from the latch selector/load pulse distributor 3180. The 8-bit data latches 3173 send the held data to the 8x4 data selector 3174.

The 8x4 data selector 3174 selects the data sent from each 8-bit data latch 3173A-D at the predetermined display timing for each digit and sends it to the decoder 3175 and the 2x8 data selector 3176.

The decoder 3175 uses a character generator decode table (see FIG. 34) to convert the input data into characters to be displayed on the 7-segment LED 13172, and generates data for lighting each segment. The generated data is input to the 2×8 data selector 3176.

The 2x8 data selector 3176 refers to the decode setting and selects data from the decoder 3175 if the mode is set to one in which the decoder is used, and selects data from the 8x4 data selector 3174 if the mode is set to one in which the decoder is not used. The selected data is input to the constant current driver 3178.

The constant current driver 3178 uses the data from the 2x8 data selector 3176 to output current signals for lighting each segment from the data output terminals OUTa to OUTDp. As mentioned above, the current output from the constant current driver 3178 is controlled by the resistance value of the resistor connected to the R-EXT terminal.

The driver 3179 receives the sink current of the current output from the constant current driver 3178 to light each segment of the 7-segment LED 13172. The driver 3179 controls the timing of current sinking at terminals DIG-0 to DIG-3 to determine which 7-segment LED (digit) is displayed.

The Digit-Limit control unit 3181 controls the number of digits displayed on the 7-segment LED 13172 controlled by the driver circuit 13171. That is, the driver circuit 13171 can control the number of digits to be lit from 1 to 4 digits by external settings. Specifically, by inputting data in which D15 to D8 are 00100001B and D7 to D0 are xxxxxx0011B, a setting to use all four digits is written to the digit register (DIGIT REGISTER) of the Digit-Limit control unit 3181. Note that x indicates that either H or L data is acceptable, and whether the input data is H or L does not affect the truth table.

The duty ratio control unit 3182 controls the duty ratio when the 7-segment LED 13172 is turned on. That is, the driver circuit 13171 can control the duty ratio by external settings, and controls the brightness at which the 7-segment LED 13172 is turned on. The duty ratio control unit 3182 controls the duty ratio by controlling the pulse width of at least one of the timing signals sent to the constant current driver 3178 and the driver 3179. Specifically, by setting D15 to D8 to 00100000B and inputting any data to D3 to D0, 16 duty ratio settings from 0/16 to 15/16 are written to the duty register (DUTY REGISTER) of the duty ratio control unit 3182.

The data selector control unit 3183 controls the decoder settings. That is, the driver circuit 13171 controls whether or not to use the decoder 3175 based on external settings. Specifically, by inputting data in which D15 to D8 are 00100001B and D7 to D0 are 0001xxxxB, a setting to use the decoder is written to the decode register, and by inputting data in which D7 to D0 are 0000xxxxB, a setting of NO DECODER that does not use the decoder is written. When the decoder is set to be used, the data selector control unit 3183 controls the 2×8 data selector 3176 to select data from the decoder 3175, and when the decoder is set to not be used, the data selector control unit 3183 controls the 2×8 data selector 3176 to select data from the 8×4 data selector 3174.

The standby mode control unit 3184 controls the standby mode setting and data clear setting. In other words, the driver circuit 13171 can transition to standby mode by external settings. Specifically, standby mode can be set by inputting data in which D15 to D12 are set to 0100B and D3 to D0 are set to 0000B. In standby mode, the settings at that time are maintained as they are, and the current output to the 7-segment LED 13172 is cut off, reducing the power consumption of the driver circuit 13171.

The driver circuit 13171 can also clear all data stored internally by external settings. Specifically, by inputting data in which D15 to D12 are set to 0100B and D3 to D0 are set to 0001B, all data stored in the registers and latches is cleared and initialized.

The oscillator 3185 generates the clock used within the driver circuit 13171.

Figure 31 is a diagram showing an example of the implementation of the main control board 1310. In this figure, the configuration of the main control board box 1320 is shown with solid lines, and the configuration on the main control board 1310 is shown with dotted lines.

Figure 31 (A) shows the main control board box 1320 of implementation example 1. The main control board box 1320 is made of transparent resin that houses the main control board 1310 in a sealable structure that cannot be opened without being destroyed once closed, and the model number of the main control board 1310 (stickered, engraved, printed, etc.) and an opening seal are affixed to the surface. The opening seal is a seal that records the history of when the seal on the main control board 1310 has been opened.

Mounting example 1 shown in FIG. 31 (B) shows the state in which the main control board 1310 is housed in the main control board box 1320 shown in (A). In mounting example 1, the main control MPU 1311 is mounted on the main control board 1310. It is preferable that the main control MPU 1311 is mounted so that the longitudinal direction of the main control board 1310 and the longitudinal direction of the main control MPU 1311 are in the same direction.

The main control board 1310 is enclosed in a main control board box 1320 and constitutes the main control unit 1300. The main control MPU 1311 is arranged in a position that allows for confirmation from the outside that no inappropriate modifications have been made. In addition, the main control MPU 1311 is arranged so that it is easy to confirm from the outside that no inappropriate modifications have been made, by not placing any parts around it.

The role ratio display 1317 is arranged on the main control board 1310 in a position that is visible from the outside. The direction of the numbers displayed on the role ratio display 1317 should be the same as the model number display of the main control MPU 1311 and the model number display of the main control board box 1320. In addition, it is preferable that the role ratio display 1317, the main control board 1310, and the main control MPU 1311 are mounted so that their longitudinal directions are in the same direction. In addition, when the main control board 1310 is mounted on the gaming machine in a landscape orientation, it is preferable that the role ratio display 1317 and the main control MPU 1311 are mounted so that their longitudinal directions are in the same direction as the longitudinal directions of the role ratio display 1317, the main control MPU 1311, and the main control board 1310. In addition, if the main control board 1310 is installed in the gaming machine in a portrait orientation, it is recommended that the role ratio display 1317 and the main control MPU 1311 be installed so that the longitudinal direction of the role ratio display 1317 and the longitudinal direction of the main control board 1310 are oriented at 90 degrees to the longitudinal direction of the main control board 1310.

In addition, the connectors CN1 and CN2 for drawing out signal lines from the main control board 1310 are preferably mounted on the end along the long side of the main control board 1310 (the upper end along the upper long side in the figure, but the lower end along the lower long side or the end along the left or right side may also be used) with their long sides aligned with the role ratio display 1317. In other words, it is desirable to position the connectors CN1 and CN2 so that the wiring (harness) connected to the connectors CN1 and CN2 overlaps with the role ratio display 1317 and does not interfere with the visibility of the role ratio display 1317.

Furthermore, the model number of the main control board box 1320 and the opening seal attached to the main control board box 1320 are affixed in a position that does not overlap either the main control MPU or the role ratio display 1317.

By implementing the feature ratio display 1317 in this way, the model numbers of the feature ratio display 1317 and the main control MPU 1311 are displayed in the correct orientation, improving their visibility. This makes it possible to check whether the feature ratio or the main control MPU 1311 has been modified without having to assume an awkward position during the manufacturing process or during inspection after installation in the amusement center.

In another implementation example shown in FIG. 31(C), the model number display of the main control MPU 1311 and the numeric display of the role ratio display 1317 are mounted so that they are oriented in the same direction, but the model number display of a circuit module (e.g., IC) other than the main control MPU 1311 is oriented in a different direction from the model number display of the main control MPU 1311 and the numeric display of the role ratio display 1317. In addition, the circuit module other than the main control MPU 1311 may be positioned so that it overlaps with the model number display of the main control board box 1320 or the opening seal affixed to the main control board box 1320. This is because the circuit modules other than the main control MPU 1311 are less important when inspecting for unauthorized modifications, and therefore there is little point in arranging them in the same direction on the main control board 1310.

Figure 32 shows the positional relationship between the main control MPU 1311 and the role ratio display 1317.

As shown in FIG. 32(A), the signal line 13173 between the driver circuit 13171 of the role ratio display 1317 and the 7-segment LED 13172 may become unstable due to the influence of noise. For this reason, it is desirable to place the driver circuit 13171 and the 7-segment LED 13172 as close as possible.

For example, as shown in the figure, the distance between the driver circuit 13171 and the 7-segment LED 13172 (length L2 of the wire 13173) is arranged to be shorter than the distance between the main control MPU 1311 and the driver circuit 13171 of the role ratio display 1317 (length L1 of the wire 13191). In other words, L1 is greater than L2.

As mentioned above, no parts are placed around the main control MPU 1311, as shown by the dotted line, to make it easy to check from the outside that no inappropriate modifications have been made. For this reason, the wiring length L1 will be a certain length, but L2 will be made as short as possible.

The driver circuit 13171 and the 7-segment LED 13172 may be housed in a single package or in separate packages, and in either case, they are mounted so that L1 is greater than L2.

Figure 32(B) is a diagram showing the positional relationship between the main control MPU 1311 and the role ratio display 1317 in another implementation example, and Figure 32(C) is a cross-sectional view of the printed circuit board in the implementation example shown in Figure 32(B).

As shown in FIG. 32(B), ground patterns 13192 are provided on both sides of the signal line 13191 between the main control MPU 1311 and the driver circuit 13171 of the role ratio display 1317. Furthermore, in the printed circuit board, a prohibited area 13196 is provided on the back surface and inner layers of the signal line 13191, where no signal patterns are provided. It is advisable to provide a ground pattern 13197 or a power supply pattern as a guard pattern on at least one of the back surface and inner layers of the printed circuit board in the prohibited area 13196.

To explain the arrangement of other signal lines in this implementation example, for example, signal line 13193, which supplies a clock signal from an oscillator to main control MPU 1311, is arranged so as to avoid forbidden area 13196 (i.e., so that signal line 13193 does not cross signal line 13191). Also, signal line 13194 connected to main control MPU 1311 may be arranged so as to pass through through hole 13195 to the back surface or inner layer. In this case as well, signal line 13194 is arranged so as to avoid forbidden area 13196 (i.e., so that signal line 13194 does not cross signal line 13191).

To prevent unauthorized modification, the main control board 1310 is generally configured as a two-layer board with patterns on the front and back sides and no inner layers, but the implementation example described above can also be applied to multi-layer boards with inner layers (4 layers, 6 layers, etc.).

Figure 33 shows the load register selection table for the driver circuit 13171.

The load register selection table is a table for determining the register that stores the data input to the driver circuit 13171.

The driver circuit 13171 of this embodiment has seven registers. The duty registers are used by the duty ratio control unit 3182 to set the duty ratio for lighting the 7-segment LED 13172. For example, when D15 to D8 are 00100000B, the data set in D7 to D0 is data for setting the duty ratio, and is written to the duty register of the duty ratio control unit 3182.

The decode register is used by the data selector control unit 3183 or the digit-limit control unit 3181 to set the use of the decoder 3175, i.e., whether or not to decode and the number of digits to display. The decode register and the digit number register may be configured as one register. For example, if D15 to D8 are 00100001B, the data set in D7 to D0 is data for setting whether or not to decode or data for setting the number of digits to display, and is written to the decode register of the data selector control unit 3183 or the digit register of the digit-limit control unit 3181.

The data registers are used by the 8-bit data latches 3173A-D, and data is set to be displayed in each digit of the 7-segment LED 13172. For example, if D15-D8 are 00100010B-00100101B, the data set in D7-D0 is the data for lighting the 7-segment LED, and is written to the data registers in the 8-bit data latches 3173A-D.

The duty ratio, whether to decode, and number of display digits set in the registers described above do not need to be set each time the feature ratio is displayed, but only need to be set once, so they are set as the initial settings in step S28 of FIG. 21. Note that if the initial settings are set only once, there is a possibility that the settings may change after the initial settings due to the effects of noise, etc., so they may be reset to a specified condition (for example, each time the opening of the main body frame 4 is detected, or each time the switch button is pressed). This makes it possible to always display the correct display even if the settings change due to noise.

Figure 34 shows the character generator decode table. The character generator decode table is used by the decoder 3175 to convert input data into character data to be displayed on the 7-segment LED 13172. By using the character generator decode table, characters such as numbers and some alphabets can be displayed without having to consider the font. In addition, when displaying numbers, D5 to D0 match the numbers to be displayed, so the calculation results can be input to the driver circuit 13171 without conversion and displayed on the 7-segment LED 13172.

The lighting of the decimal point for each digit of the 7-segment LED 13172 is controlled by D6.

Figure 35 is a state transition diagram of the driver circuit 13171, and Figure 36 is a diagram showing an example of the display of the role ratio display 1317.

In this embodiment, the driver circuit 13171 has five states: initial state, data input state, LED on state (0000), LED on state (lights up according to input data), and LED on state (all lights up).

To control these five states, there are mode setting commands: blank, normal operation, register write, all on, and standby. The blank command shuts off the output of the constant current driver 3178 and the output of the driver 3179. The normal operation command displays the 7-segment LED 13172 after each setting is completed. If the normal operation command is input without setting display data, the 7-segment LED 13172 displays the number 0 for all digits. The register write command sets the number of digits to be used, the duty ratio, whether the decoder is used or not, and inputs the display data. D11 to D8 select the register to which data is written, and D7 to D0 input the contents to be set in the register (see Figure 33). The all on command turns on the output of the constant current driver 3178 on the data side, lighting up all segments of the 7-segment LED 13172. The standby command is divided into two depending on the parameters: a standby command that transitions to the standby state, and a clear command that transitions to the initial state. The standby command maintains the settings at that time, stops the operation of the constant current driver 3178 and the driver 3179, and cuts off the current output to the 7-segment LED 13172, reducing the power consumption of the driver circuit 13171. The clear command clears and initializes all data held in the registers and latches, and also turns off the display.

Note that since the blank command is also a type of display command, in this specification, "display" includes all states of the 7-segment LED, including all lights, some segments, and all lights off.

With reference to Figure 36, we will explain examples of the display in each of the above-mentioned states.

When the gaming machine is turned on, the initial settings of the driver circuit 13171 have not been completed or the display data has not been set, so it is in the initial state (ALL BLANK), and all segments of the 7-segment LED 13172 are turned off and in a non-illuminated state as shown in FIG. 36 (A). Also, when the main body frame 4 is closed and play is possible, the bonus ratio display 1317 cannot be seen, so it is a good idea to set it to standby mode, turn off the 7-segment LED 13172, and reduce the power consumption of the gaming machine.

After the driver circuit 13171 has completed initial settings by setting control data in various control registers, the seven-segment LED 13172 displays a specific indication when display data is input. This specific indication may be a "-" for all digits, or all segments may be lit, as shown in FIG. 36(B). This specific indication may be used to confirm that the reel ratio display 1317 is operating normally.

In addition, when the main frame 4 is opened, it is advisable to display a specific indication on all digits so that it is possible to confirm that the reel ratio display 1317 is operating normally. For example, as shown in FIG. 36(B), all digits may display "-" or all segments may be lit up.

When the display switch 1318 is operated and the display data is input to the driver circuit 13171, the LED is turned on (lights up according to the input data). Specifically, the device ratio display state is entered, and a code indicating the display content is displayed in the left two digits of the 7-segment LED 13172, and the device ratio value is displayed in the right two digits. In the example shown in FIG. 36(C), "y175" is displayed, indicating that device ratio 1 is 75%. Note that if the displayed device ratio is an abnormal value outside the specified range, it is advisable to display this in a way that makes it identifiable. For example, all digits (or numbers) can be displayed flashing, or the decimal point can be lit or flashing.

Furthermore, when the display switch 1318 is operated and the display data is input to the driver circuit 13171, the display content of the 7-segment LED 13172 is changed. That is, a different type of feature ratio is displayed. In this case, too, a code indicating the display content is displayed in the left two digits, and the numerical value of the feature ratio is displayed in the right two digits. In the example shown in Figure 36 (D), "y263" is displayed, indicating that feature ratio 2 is 63%. Note that in this case, too, as in the above case, it is advisable to display a value that allows the user to identify that the displayed feature ratio is an abnormal value outside the specified range. A more specific display example of feature ratios will be described later using Figure 37.

When the main body frame 4 is closed, a predetermined display is made to confirm that the reel ratio display 1317 is operating normally (Figure 36 (E)), and after a predetermined time (e.g., 30 seconds) has elapsed, the 7-segment LED 13172 is turned off to reduce the power consumption of the gaming machine. This reel ratio non-display state is in the same form as after the initial settings are completed, but it may be in a different form as long as it is distinguishable from the reel ratio display.

Figure 36 (E) is an example of a display when an abnormality occurs in the reel ratio display 1317 or the main control MPU 1311 and the reel ratio cannot be displayed. The decimal point may be lit or flashing, or may be displayed differently for each digit. The abnormality display may also be in a form different from that shown in the figure, as long as it is distinguishable from a normal reel ratio display to indicate that the reel ratio cannot be displayed.

In either state, if an all-on command is input, all segments of the 7-segment LED 13172 will light up. In either state, if a blank command or standby command is input, all segments of the 7-segment LED 13172 will turn off while retaining the data. In either state, if a data clear command is input, all data held in the registers and latches will be cleared, all segments of the 7-segment LED 13172 will light up, and the initial state will be restored.

[8. Display of role ratio]
Next, a method for calculating and displaying the role ratio will be explained.

As mentioned above, the role ratio is displayed on the role ratio display 1317 provided on the main control board 1310. As mentioned above, the role ratio display 1317 is configured, for example, with a four-digit seven-segment LED or an LCD display device, and displays the role ratio value in the last two digits and the type of value in the first two digits.

The reel ratio display 1317 may also be configured with a two-digit seven-segment LED. In this case, it is recommended to alternately display the reel ratio value and the type of value.

The display mode of the role ratio value may be different depending on the result of comparing the role ratio with a predetermined reference value. For example, if the role ratio exceeds a predetermined reference value, the value may be displayed by flashing or changing color (green under normal circumstances, red when the reference value is exceeded, etc.). By changing the display mode depending on the result of the comparison with the reference value, it is easy to recognize that the role ratio is abnormal.

The reel ratio display 1317 may be configured with one or more LED lamps. When the reel ratio display 1317 is configured with one LED lamp, the result of the comparison between the reel ratio and a predetermined reference value is displayed in different manners. For example, if the reel ratio is smaller than the reference value, it is displayed in green, and if the reel ratio is larger than the reference value, it is displayed in red. Also, if the reel ratio is smaller than the reference value, it is displayed as a light, and if the reel ratio is larger than the reference threshold, it is displayed as a flashing light.

When the reel ratio display 1317 is configured with multiple (e.g., 10) LED lamps, each LED lamp represents 10% and displays the reel ratio. For example, if the reel ratio is 70% or more but less than 80%, 7 LEDs are lit. In this case, different display modes (display colors) may be used depending on the display content (reel ratio or continuous reel ratio, recent data display or medium-term data display, etc.).

In addition, if the total number of balls won is less than 6,000, the period during which prize ball data is collected is short and the value of the bonus item ratio may not have converged, so a different display mode (display color, flashing, etc.) may be used. It is desirable to have a different display mode when the total number of balls won is less than the threshold value and when it exceeds the aforementioned reference value.

The reel ratio display 1317 may switch between displaying the most recent data, the medium-term data, and the long-term data. The most recent data is the reel ratio calculated using the previous counter value currently being written in the ring counter shown in Figures 27(B) and (C). The medium-term data is the reel ratio calculated using the cumulative total in the ring counter shown in Figures 27(B) and (C). The long-term data is the reel ratio calculated using the total cumulative total in the ring counter shown in Figures 27(B) and (C).

The function display unit 1400 may also serve as the role ratio display 1317. The function display unit 1400 normally displays the game status based on a control signal from the main control board 1310, but when a main frame opening switch (not shown) detects that the main frame 4 has been opened from the outer frame 2, the main control board 1310 switches the display so that the function display unit 1400 displays the role ratio. The display of the function display unit 1400 is switched by the opening of the main frame 4, but it is preferable to continue the progress of the game. By continuing the progress of the game, when the main frame 4 is closed, it is possible to quickly switch from the role ratio display to the game status display. For example, when the main frame 4 is opened during a special pattern variable display game, the role ratio is displayed, but when the main frame 4 is closed before the variable time has elapsed, the variable display for the remaining time can be performed. The special pattern displayed on the function display unit 1400 is synchronized with the decorative pattern displayed on the main liquid crystal display device 1600, so the decorative pattern stops at the timing when the special pattern variable display of the function display unit 1400 stops. Therefore, even if the function display unit 1400 displays the ratio of the reels, it can be configured so that the player does not feel uncomfortable.

The bonus ratio display 1317 may display something other than bonus ratios. For example, it may display the number of winning entries per type of winning slot or the number of winning balls paid out per unit time. The unit time may be switched by operating the display switch 1318 to display 1 minute, 10 minutes, 1 hour, 10 hours, etc.

The bonus ratio display 1317 may display the base. The base is the ball payout rate during normal times excluding during special prizes (during big wins), and can be calculated by dividing the number of safe balls by the number of out balls. The number of launched balls (out balls) is detected by the launched ball sensor 1020. As described above, the launched ball sensor 1020 is provided near the exit (backflow prevention member 1007) of the rails 1001 and 1002 that guide game balls from the ball launching device to the game area 5a (see Figures 10 and 16). The number of out balls may also be detected by the discharged ball sensor 3060. As described above, the discharged ball sensor 3060 is provided at the discharge port that discharges game balls that have flowed out of the game area 5a to the outside of the pachinko machine 1 (see Figure 4). Also, an out-port passing ball sensor 1021 (see FIG. 53) may be provided to detect game balls passing through the out-port 1111 provided at the bottom of the game area 5a, and the number of out balls may be detected by adding up the number of game balls detected by the out-port passing ball sensor 1021, the number of game balls detected by the start port sensors 2104 and 2551, and the number of game balls detected by the various winning port sensors 3015, 2114, 2554, and 2557. Furthermore, a launching supply ball sensor (not shown) may be provided to detect game balls supplied to the ball launching device 680, and a foul ball sensor (not shown) may be provided to detect game balls (so-called foul balls) that were shot out from the ball launching device 680 but did not reach the game area 5a, and the number of out balls (number of launched balls) may be detected by subtracting the number of foul balls from the number of game balls supplied to the ball launching device 680 detected by the launching supply ball sensor.

The number of out balls can be counted using any of the methods described above. In other words, it is sufficient to have either the ejected ball sensor 3060 or the launched ball sensor 1020 of the sensors shown in the figure.

The number of safe balls is equal to the number of prize balls paid out. The base may be defined as the ball output rate for each game state (normal play, electric support, probability fluctuation, time reduction), and calculated as the number of safe balls divided by the number of out balls for each game state. By displaying the base on the device ratio display 1317, the deviation from the design value of the ball output performance during operation can be checked on the spot for each gaming machine. Also, since the ball output performance can be checked without using a hall control, it becomes easier to inspect each gaming machine during on-site inspections of the amusement facility.

The bonus ratio display 1317 may display information regarding other winnings and winning balls on the base (such as the number of winnings at the general winning port 2001 and the number of winning balls resulting from said winnings, the number of winnings at the starting port 2002 and the number of winning balls resulting from said winnings, the number of winnings at the large winning ports 2005 and 2006 and the number of winning balls resulting from said winnings, etc.).

The reel ratio display 1317 may always display the reel ratio, or may display the reel ratio by operating the display switch 1318. For example, when the display switch 1318, which is a push button switch, is pressed, the reel ratio display starts and turns off after a predetermined period of time. Note that if the display switch 1318 is operated while a main frame opening switch (not shown) is detecting that the main frame 4 has been released from the outer frame 2, the reel ratio may be displayed on the reel ratio display 1317. In other words, if the main frame is not open, the reel ratio display 1317 will not display the reel ratio even if the display switch 1318 is operated.

The display contents may be changed each time the display switch 1318 is operated. For example, as shown in FIG. 37, when the display switch 1318 is operated once, A7, which means the role ratio (cumulative), is displayed in the upper two digits, and the role ratio to a predetermined number (e.g., 60,000 balls) of prize balls is displayed in the lower two digits. When the display switch 1318 is operated once again, the display of the upper two digits may be switched to A6, which means the consecutive role ratio (cumulative), and the consecutive role ratio to a predetermined number (e.g., 60,000 balls) of prize balls may be displayed in the lower two digits (FIG. 37(B)). Furthermore, when the display switch 1318 is operated once, y7, which means the role ratio (6,000 balls), is displayed in the upper two digits, and the role ratio based on the most recent data is displayed in the lower two digits (most recent data display) (FIG. 37(C)). When the display switch 1318 is operated once more, the top two digits will change to y6, which indicates the bonus ratio (cumulative), and the bottom two digits may display the bonus ratio for a predetermined number of winning balls (e.g., 60,000 balls) (medium-term data display) (Figure 37 (D)).

The display switch 1318 does not have to be provided as an independent switch, and may also serve as a RAM clear switch provided on the main control board 1310 or the peripheral control board 1510. In other words, when the switch is operated when the power is turned on, it functions as a RAM clear switch, and when it is operated while the pachinko machine 1 is in operation, it functions as the display switch 1318. By consolidating the functions of the RAM clear switch and the display switch 1318 into a single switch, the number of switches operated by the arcade attendant is reduced to one, reducing the chance of erroneous operation by inexperienced attendants.

As described above, according to this embodiment, the ratio of the game features of an operating gaming machine can be accurately calculated, and the gambling nature of the operating gaming machine can be confirmed.

In addition, data on the number of winning balls is stored as the data 13136 for calculating and displaying the ratio of winning balls, and if the check code is abnormal, the data 13136 for calculating and displaying the ratio of winning balls is erased, thereby making it possible to avoid displaying an incorrect ratio of winning balls.

In addition, the data 13136 for calculating and displaying the ratio of winning balls is erased under conditions different from those for erasing data related to the progress of the game that is backed up in the RAM 1312 of the main control MPU 1311, so accurate data on the number of winning balls can be retained and accurate ratios of winning balls can be calculated.

In addition, because the operation of the RAM clear switch does not erase the data 13136 for calculating and displaying the ratio of features, the data 13136 for calculating and displaying the ratio of features will not be erased by mistake by an attendant at the amusement park, and because the data for calculating and displaying the ratio of features is not erased by the operation of the RAM clear switch, the data is not erased by an erroneous operation by an attendant at the amusement park. In addition, because the amusement park cannot intentionally erase the data for calculating and displaying the ratio of features, the reliability of the displayed ratio of features is increased, and it is possible to prevent the concealment of a high ratio of features.

[9. Base Display]
[9-1. Basic configuration of a gaming machine that displays a base]
So far, an embodiment of a pachinko machine that calculates and displays the bonus ratio has been described, but next, an embodiment of a pachinko machine that calculates and displays the base value will be described. Note that in this embodiment, a pachinko machine that mainly calculates and displays the base value will be described, but the bonus ratio may be calculated and displayed together with the base value.

In the pachinko machine described below, as described above, when a game ball enters the start hole (first start hole 2002, second start hole 2004), a random number lottery is performed and a special symbol variable display game is executed. The special symbol variable display game has a variable pattern (variation time) that is relatively short (a normal variable pattern of about 10 seconds, a shortened variable pattern of about 2 to 5 seconds that is likely to be selected when there are many reserved balls) and a relatively long variable pattern (a variable pattern such as a super reach that exceeds 1 minute). When calculating the base value in a pachinko machine, since the notification of the base value does not require urgency compared to the notification of an error, it can be notified at the timing when the special symbol variable display game switches to the next variable display game. However, when the variable display time is long, it is preferable to calculate the base value and update the display when a predetermined condition is met (for example, when the number of out balls (number of shot balls) or the number of prize balls (number of paid-out balls) changes) without waiting for the end of one special symbol variable display game. For this reason, in the pachinko machine of this embodiment, when a certain condition is met during play (e.g., even during a special symbol variation display game) (e.g., when the number of out balls (number of shot balls) or the number of winning balls (number of paid out balls) changes), the base value is calculated and displayed. Next, the specific configuration of a pachinko machine that operates in this way will be explained.

Figure 38 is a block diagram showing the peripheral configuration of the main control board 1310 of the pachinko machine 1, which calculates and displays the base value.

The pachinko machine 1 shown in FIG. 38 has a configuration similar to that of the pachinko machine 1 shown in FIG. 17, but the component represented by the reference numeral 1317 is a base display, not a bonus ratio display. The base display 1317 of the pachinko machine 1 of this embodiment may use, for example, a four-digit seven-segment LED as shown in FIG. 4 or FIG. 28, or may use a seven-segment LED with another number of digits (for example, two digits).

In the pachinko machine 1 of this embodiment, data on the number of winning balls and the number of out balls is acquired in the feature ratio calculation area update process (step S81) of the timer interrupt process (FIG. 23) executed by the main control MPU 1311, and a base value is calculated and displayed in the feature ratio calculation and display process (step S89). In the following explanation, the "feature ratio calculation area update process" in step S81 of FIG. 23 is read as the "base calculation area update process", and the "feature ratio calculation and display process" in step S89 is read as the "base calculation and display process". In addition, the "feature ratio calculation area 13128" shown in FIG. 26 is read as the "base calculation area 13128", the "feature ratio calculation and display code 13135" is read as the "base calculation and display code 13135", and the "feature ratio calculation and display data 13136" is read as the "base calculation and display data 13136".

Figure 39 is a flow chart showing an example of the base calculation area update process (step S81). The base calculation area update process determines the current game state, adds the number of prize balls paid out as game value to an area corresponding to the current game state, and updates the base calculation area 13128 of the main control built-in RAM 1312. In particular, the base calculation area update process shown in Figure 39 directly updates the total number of prize balls using the number of prize balls calculated in the prize ball control process (step S80) (step S814), and directly updates the total number of out balls using the number of out balls (step S822) in order to calculate the base value every time the timer interrupt period occurs.

First, it is determined whether the game is in the special prize state (step S810). The game is in the special prize state when the large prize openings 2005, 2006 are open and the player can win many prize balls, but this may also include the opening and ending times of the big win game. If the large prize openings 2005, 2006 open and close repeatedly during one big win, this may also include the time between the closing of the large prize opening and the next opening (closing interval). In other words, the special prize state in step S810 means that the condition device is operating, for example, from the determination of the big win pattern in the special pattern variable display game to the end of the ending. It may also include the entire time during which a right hit command is given.

Furthermore, in the starting holes 2002 and 2004, the special prize may include the time-saving period, the special bonus period (ST period), and the electric support period. Furthermore, in game states other than the time-saving period, the special bonus period (ST period), and the electric support period, the special prize may include the period from the opening of the starting hole 2004 to a predetermined time after it is closed (for example, the few seconds required for a ball that has entered the starting hole to be detected as an out ball).

The electrically operated parts provided in the pachinko machine 1 of this embodiment are divided into two types from the viewpoint of calculating the base value. As described above, in the gaming machine of this embodiment, the special prize period for the large prize openings 2005 and 2006 is when the condition device is operating (for example, from the confirmation of the jackpot pattern of the special pattern variation display game to the end of the ending), and the base value is calculated using the number of prize balls and out balls other than during the special prize period, so normal winning (during the so-called jackpot) in the large prize openings 2005 and 2006 is not used to calculate the base value. On the other hand, for the starting opening 2004 (so-called electric tulip) having an opening and closing member, winning balls and prize balls other than during the special prize period (when there is a low probability or when there is no time reduction) are used to calculate the base value. In other words, among the electrically operated devices, some devices (large prize openings 2005, 2006) do not use the number of winning balls and the number of prize balls in calculating the base value regardless of the game state (whether or not a special prize is being awarded), and the other devices (starting opening 2004) switch whether or not to use the number of winning balls and the number of prize balls in calculating the base value depending on the game state (whether or not a special prize is being awarded). Not using the number of winning balls and the number of prize balls in calculating the base value includes not only not counting the paid-out prize balls as in (the number of prize balls other than during the special prize, which is the dividend in calculating the base value), but also not creating edge information for paying out prize balls in response to a winning signal, even if the winning signal is input.

The large prize openings 2005 and 2006 may be opened (as a small prize) even if the condition device is not activated. Small prizes generally occur during time-saving and are only open for a short time, so the probability of a game ball winning is low, and they do not affect the calculation of the base value. However, small prizes may be generated outside of the special prize period (normal time) and the opening may be opened only for a time when the probability of a game ball winning is high. In this case, the winning balls and prize balls entering the large prize openings 2005 and 2006 in small prizes that occur outside of the special prize period may be used to calculate the base value. In this way, the expected value (design value) of the base value can be changed by controlling the probability of a small prize occurring outside of the special prize period. In other words, a pachinko machine that can flexibly respond to base value standards can be provided, and the degree of freedom in design can be improved.

If the game is in the special prize state, the prize balls are not related to the calculation of the base value, so the number of prize balls and the number of out balls are not updated, and the base calculation area update process is terminated. On the other hand, if the game is not in the special prize state, the number of prize balls calculated based on the input information in the prize ball control process (step S80) is obtained (step S811). The number of prize balls obtained in the base calculation area update process may be the number of prize balls for which the payout has been decided. It may also be the number of prize balls corresponding to a payout command that has already been created. It may also be the number of prize balls corresponding to a payout command that has already been sent. It may also be the number of prize balls corresponding to a payout command that the main control board 1310 sent to the payout control board 951 and received an acknowledgement of receipt (ACK) from the payout control board 951. It may also be the number of prize balls (number of paid out prize balls) that the main control board 1310 sent to the payout control board 951 and received a payout completion report from the payout control board 951. This variation will be described using Figures 41 to 44.

Then, the number of prize balls acquired is added to the total number of prize balls to update the total number of prize balls (step S814). It is to be noted that it is possible to determine whether there are prize balls, and if there are no prize balls, the process of updating the total number of prize balls may be skipped. In addition, even if a game ball enters the start port 2002, 2004, but the reserved number is the upper limit, and the entry into the start port is not reserved, the prize balls are paid out, so the total number of prize balls is updated. In addition, in a game state in which a game ball enters a winning port but no prize balls are generated (for example, when a specific error occurs), no prize balls are generated due to the entry, and the number of prize balls acquired is 0, so the total number of prize balls is not updated. The total number of prize balls is recorded in the total number of prize balls storage area (see FIG. 52) provided in the base calculation area 13128 of the main control built-in RAM 1312. That is, in the base calculation area update process shown in FIG. 39, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated.

After that, the number of out balls is obtained (step S818), and the total number of out balls is updated so that the obtained number of out balls is added to the total number of out balls (step S822). As described above, the number of out balls is detected by the launched ball sensor 1020, the discharged ball sensor 3060, etc., and in the switch input process of step S74, the detection signals of these sensors are read, and if there is a sensor detection signal, the number of out balls = 1 is obtained. The total number of out balls is recorded in the total number of out balls storage area (see Figure 52) provided in the base calculation area 13128 of the main control built-in RAM 1312. That is, in the base calculation area update process shown in Figure 39, the total number of out balls used to calculate the base value is updated each time an out ball is detected. In this way, the base calculation process is executed for each timer interrupt process to update the total number of out balls, and the base value is calculated and displayed in the base calculation display process (Figure 40), so that the base value can be displayed without delay, and it can be determined without delay whether the base is normal or abnormal.

In addition, as in steps S815 to S817 of the base calculation area update process (Figure 46) described later, it may be determined whether there is an abnormality in the number of prize balls, and if there is an abnormality in the number of prize balls, an abnormality notification command may be generated and the prize ball abnormality notification timer may be reset. Furthermore, as in steps S824 to S825, it may be determined whether the prize ball abnormality notification timer has timed out, and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command may be generated and the prize ball abnormality notification may be stopped.

In the pachinko machine 1 of this embodiment, the main control MPU 1311 executes the calculation process of the base value in the timer interrupt process, but the payout control MPU of the payout control unit 952 may execute the calculation process of the base value. In this case, a command to notify the base may be sent from the main control board 1310 to the peripheral control unit 1511 of the peripheral control board 1510, or a command to notify the base may be sent from the payout control unit 952 to the peripheral control unit 1511.

In addition, even if information on both winning balls and out balls at a winning port is obtained in one timer interrupt process, the number of winning balls is added to the total number of winning balls (or the prize ball number buffer in the embodiment described later), and the number of out balls is added to the total number of out balls (or the out ball number buffer in the embodiment described later). In addition, even if information on winning balls at multiple winning ports is obtained in one timer interrupt process, the sum of the number of winning balls from the multiple winning balls is added to the total number of winning balls (or the prize ball number buffer in the embodiment described later). This allows the base value to be accurately calculated and displayed. For example, if winning balls are detected at the winning port sensor of a winning port with five prize balls and at the winning port sensor of a winning port with three prize balls, a total of eight prize balls are added to the total number of winning balls (or the prize ball number buffer).

Also, the number of prize balls may be added to the total number of prize balls (or the number of prize balls buffer) only when the launch of the game ball is detected. In other words, only the number of prize balls related to winning detected within a predetermined time from the detection of the launched ball sensor 1020 may be added to the total number of prize balls (or the number of prize balls buffer). Also, the operation of the launch control unit 953 or the ball launching device 680 may be detected, and only the number of prize balls related to winning detected while the launch control unit 953 or the ball launching device 680 is operating (and further, until a predetermined time (e.g., 5 seconds) after the launch control unit 953 or the ball launching device 680 stops operating) may be added to the total number of prize balls or the number of prize balls buffer. Also, when the player is operating the launch handle, the number of prize balls may be added to the total number of prize balls (or the number of prize balls buffer). In other words, only the number of prize balls related to winning detected within a predetermined time (e.g., 5 seconds) from the time when it is detected that the palm or finger is touching the contact detection sensor 509 of the handle unit 500 may be added to the total number of prize balls (or the number of prize balls buffer). In this way, it is possible to prevent the base value from being affected by abnormalities such as detecting prize balls when no game balls have been released, or by fraudulent acts, and to prevent the display of an inaccurate base value. In addition, by using the contact detection sensor 509, it is not necessary to install a new sensor to detect the release of game balls, which helps prevent an increase in the cost of the pachinko machine 1.

In the base calculation area update process shown in Figure 39, the base was calculated excluding the number of prize balls and the number of out balls during the special prize period, but the number of prize balls that enter the general prize slot and the starting slot, even during the special prize period, may be counted, and the number of out balls may be counted excluding the number of balls that enter the large prize slot to calculate the base value.

Figure 40 is a flowchart showing an example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 40, the base value is calculated every time (every timer interrupt period).

First, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Note that if the total number of prize balls is 0, the base value is calculated as 0, but the base value does not have to be calculated. Furthermore, if an abnormal base value is calculated (for example, if the total number of prize balls is greater than the total number of outs and a value of 1 (100%) or more is calculated as the base value), the base value does not have to be calculated. When the base value is expressed as a percentage, the total number of prize balls divided by the total number of out balls is multiplied by 100 to calculate the base value. Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in the division input register A131216, and the total number of out balls is stored in the division input register B131217.

The predetermined number multiplied by the total number of winning balls stored in division input register A131216 controls the number of digits of the base value calculated. For example, if this predetermined number is 100, the base value is calculated as a percentage to the one's place, and no decimal places are calculated. Also, if this predetermined number is 10,000, the base value is calculated as a percentage to two decimal places. In other words, if the quotient output from the calculation circuit is divided by 100, a base value as a percentage with two decimal places can be calculated.

After 32 clocks have elapsed, the quotient is read from the division result register A131218 and used as the base value. During the 32 clock wait time from when data is written to the division input registers 131216 and 131217 until when data is read from the division result register A131218, the main control MPU 1311 may wait without processing, or may perform other processing. For example, the random number used to determine whether or not a jackpot has been won may be updated during the time from when data is written to the division input registers 131216 and 131217 until when data is read from the division result register A131218. More specifically, the hard random number generated by the random number generating circuit 13112 is updated at the timing of the clock cycle (or a signal obtained by dividing the clock cycle) supplied to the main control MPU 1311, so the hard random number is also updated during the wait time.

In other words, in the gaming machine of this embodiment, even while the calculation circuit 13121 is executing the base calculation process, other processes related to the game can be executed in parallel. The other processes related to the game include at least a process of updating the random numbers used to determine whether or not a game has been won. In addition, during the calculation (division) process in the calculation circuit 13121, the random numbers that affect the outcome of the game are updated one or more times.

In addition, if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 will be an error, so it does not need to be stored in the base calculation area 13128. In this case, the base value displayed on the base display 1317 will not be updated.

After that, a base notification command is generated (step S908) to notify the player and hall employees of the base. The base notification command may simply notify the base value, or may notify an abnormality in the base value. An abnormality in the base value is, for example, when the calculated base value becomes larger or smaller than the design value (normal value) beyond a predetermined tolerance range. Note that multiple tolerance levels may be set, and the degree of abnormality may be determined in multiple stages depending on the degree of deviation of the base value.

There are various methods for notifying the base, and one of the methods described below may be used, or two or more may be combined. For example, the base value may be notified constantly or at a specified timing using the base display (7-segment LED) 1317, the liquid crystal display device 1600, 3114, 244, etc. By notifying the player of the base value, the player may be able to check the condition of the pachinko machine. In this case, the display mode described in the role ratio may be applied to the base value. When notifying the base value, the calculated base value is displayed as a percentage on the display device or display device described above. Note that the decimal point value may be rounded down, rounded up, or rounded up, and in a display device capable of displaying images such as the liquid crystal display device 1600, 3114, 244, it may be displayed to the first decimal place for more detailed display.

When displaying a base value on the base display 1317, which is composed of a 7-segment LED, the main control MPU 1311 inputs display data to a specified register provided in the driver circuit 13171 of the base display 1317. That is, the main control MPU 1311 generates display data to be set in the register of the driver circuit 13171 as a base notification command. More specifically, as shown in Figures 33 and 34, the main control MPU 1311 specifies the digits to display the numerical value in D15 to D8 by "Data n setting", generates data specifying the display content in D7 to D0, and writes it to the shift register 3171.

In addition, when the base value is displayed on the liquid crystal display device 1600, 3114, 244, a predetermined reference value (for example, 50%) may be set for the base value, and if the reference value is exceeded, the display mode may be changed. For example, the numerical value may be displayed by flashing or changing the color (normally in green, and when the reference value is exceeded in red, etc.). Furthermore, the display mode of the base value may be changed in multiple stages. Specifically, the displayed base value may be divided into multiple stages such as 30% or more, 25% or more but less than 30%, 20% or more but less than 25%, 15% or more but less than 20%, 10% or more but less than 15%, and less than 10%, and the luminous color may be changed to white, blue, yellow, etc. for each stage. In addition, when the base value is low, self-deprecating comments such as "You're doing well," "You're getting worse," "That's not bad," and "In a way, it's amazing" may be displayed in each stage. If the base value exceeds the reference value, the pachinko machine is operating differently from what is expected, and there is a possibility that fraud is being committed. For this reason, it is desirable to display the base value in a manner that indicates a warning, such as red. The display may also be the same or similar to a weak error that does not stop the game. Here, "similar" means that at least one of the display, lamp, and sound is the same.

In addition, the range of the base value (whether the base value is high or low, whether it is an abnormal value or a normal value, etc.) may be notified using various lamps, liquid crystal display devices, sounds, etc. In addition, if the base cannot be calculated (Yes in step S902) and there is no previously calculated base value, a base notification command may be generated to display a base notification impossible on the liquid crystal display device. By sending the notification command to the sub-board that generated it, the base state can be notified by the performance device controlled by the sub-board, so a wider variety of notifications can be made than when the main board is used for notification, and the load on the main board can be reduced. In addition, by notifying that the base display is impossible when nothing is displayed on the base display 1317, it is possible to distinguish between a failure of the base display 1317 and the absence of a base value to display. Furthermore, by displaying an abnormality in the base value on the liquid crystal display device, an abnormality in the base value can be known without looking at the back side of the game board on which the base display 1317 is provided.

The functional display unit 1400 may also function as the base display 1317. In this case, a specific LED lamp (or a 7-segment LED) of the functional display unit 1400 may be used to provide a constant notification. Also, the notification may be provided at a specific timing (for example, when the main frame 4 is opened, while the special symbol change display game is not being played, or when the special symbol change display game has ended).

The base information may be output from the external terminal board 784 to a hall computer installed in the gaming center. In this case, the base information may be output at a predetermined timing (for every predetermined number of winning balls, for every predetermined number of out balls), as in the base calculation and display process described below (Figures 47, 49, etc.).

The base information output from the external terminal board 784 may be a binary (high, low) signal indicating whether the calculated base value is high or low relative to a predetermined threshold value. Alternatively, a signal of a length indicating an approximate value of the calculated base value may be output (for example, a 30 millisecond pulse if the base value is between 30% and 40%). Alternatively, a number of consecutive pulses indicating an approximate value of the calculated base value may be output (for example, three consecutive pulses if the base value is between 30% and 40%).

Note that a base notification command may be generated even if the base value is not updated, and a base notification command may not be generated if the base value is not updated. The display of the base value will continue even if a base notification command is not generated.

In addition, as described later in FIG. 56, etc., it may be possible to determine whether the calculated base value is abnormal, generate a base notification command to notify the player or hall employee of the abnormality in the base value.

In addition, whether to notify the player of the base value may be determined based on the game state (game situation). This is because if the base value is constantly notified to the player, the player may not pay attention to the presentation of the special pattern change display game, which is the original enjoyment of the pachinko machine, and the player's attention may be distracted.

In addition, the presentation of the special symbol variation display game that is currently being played or will be played in the future may be changed based on the calculated base value. For example, multiple display selection tables may be prepared, and presentations may be selected from different display selection tables (see Figures 64 to 68) depending on the base value.

In addition, during the special symbol change display game, the base value may exceed or fall below a predetermined threshold (e.g., 30%). For this reason, the presentation of the special symbol change display game may be changed when the threshold is exceeded or fallen below during the special symbol change display game. The presentation may be changed in the same manner when the base value rises above the predetermined threshold and when it falls below it, or the presentation may be changed in different manners.

Figure 41 shows an example of the timing of updating the number of prize balls and the timing of calculating the base value. As shown in Figure 23, in this embodiment, the number of prize balls is updated in the base calculation area update process in step S81, and the base value is calculated in the base ratio calculation and display process in step S89.

For this reason, the main control MPU 1311 detects the entry of a game ball in the switch input process (step S74), calculates the number of prize balls set for each winning slot in the prize ball control process (step S80), and updates the prize ball number buffer in the base calculation area update process (step S81). After that, it updates the base value in the base ratio calculation/display process (step S89), and sends a payout command to the payout control board 951 in the output data setting process (step S90).

When the payout control board 951 stores the received payout command in memory, it transmits a payout command reception confirmation to the main control board 1310. Then, when the payout control board 951 pays out the prize balls according to the payout command, it notifies the main control board 1310 of the completion of the ball payout. The number of unpaid prize balls among the number of prize balls calculated in the prize ball control process (step S80) is backed up by the main control board 1310 or the payout control board 951. When the payout control board 951 backs up the number of unpaid prize balls, the payout control board 951 needs to send a payout command reception confirmation to the main control board 1310, but does not need to notify the main control board 1310 of the completion of the ball payout. On the other hand, when the main control board 1310 backs up the number of unpaid prize balls, the payout control board 951 needs to notify the main control board 1310 of the completion of the ball payout, but does not need to send a payout command reception confirmation to the main control board 1310.

In the pachinko machine according to the embodiment described above, the base value is calculated without delay during play, and the state of the gaming machine can be known in real time. Therefore, abnormalities in the gaming machine can be discovered early. For example, if the base value is determined to be abnormal if it is lower or higher than a predetermined threshold, the base value is calculated multiple times during one special symbol variation display game, and even if it is determined to be abnormal because it goes up and down above the predetermined threshold, the game is not stopped and the calculation process of the base value continues regardless of the abnormality determination. For example, there are short-term special symbol variation display games such as normal variation and long-term special symbol variation display games such as reach variation, and if the conditions for calculating the base value are met multiple times between the start and end of one special symbol variation display game, the base value can be calculated each time and updated and displayed each time. This is because if the calculation of the base value during the special symbol variation display game is limited (for example, the base value is calculated and updated only once at the end of the variation display), depending on the timing of the calculation of the base value, the change in the base value may not be noticed for a long time, and the information necessary for the hall operation may not be output at the appropriate time, which may cause inconvenience to the hall.

In addition, if the released game ball does not enter the starting hole or the general winning hole, the base value will decrease. In this state, the player is at a loss, so for example, additional effects (for example, effects related to winning or losing that are not related to changes in the base value, or specific effects that appear with changes in the base value) may be added to the effects being displayed on the LCD, or a preview effect with a high expectation of a jackpot (a preview effect with a high expectation of a jackpot, such as a preview effect with a high expectation of the next event, among effects that are not related to changes in the base value, or a preview effect with a high expectation of a jackpot among specific effects that appear with changes in the base value (for example, displaying the base value in a rainbow color)) may be performed. This reduces the discomfort felt by the player when the ball does not enter the starting hole or the general winning hole, and motivates him to continue playing.

On the other hand, if many of the released game balls enter the starting hole or general winning hole (if more balls enter than the average number of past winning holes), the base value will rise. In this state, even if the jackpot lottery results in a miss, the player will have received more game balls than usual, so the player's disappointment will be reduced. The presentation of the variable display game may be changed to one with a lower expectation level.

[9-2. Variations in timing of updating the number of prize balls and calculating the base value]
Next, variations in the timing of updating the number of prize balls and the timing of calculating the base value will be described with reference to Figures 42 to 44. The timing of updating the number of prize balls and the timing of calculating the base value in each variation are outlined below.
- Figure 41: Calculate number of prize balls → Update number of prize balls → Calculate base value → Send payout command - Figure 42: Calculate number of prize balls → Update number of prize balls → Send payout command → Calculate base value - Figure 43: Calculate number of prize balls → Send payout command → Update number of prize balls → Calculate base value - Figure 44: Calculate number of prize balls → Send payout command → Confirm command reception → Update number of prize balls → Calculate base value - Figure 45: Calculate number of prize balls → Send payout command → Notification of payout completion → Update number of prize balls → Calculate base value It should be noted that the variations of Figures 41 to 44 above can be applied not only to the base calculation area update process shown in Figure 39 and the base calculation/display process shown in Figure 40, but also to any of the base calculation area update processes and base calculation/display processes described below.

In the procedure shown in FIG. 42, unlike the timer interrupt processing procedure shown in FIG. 23, the base calculation area update processing (step S81) is executed at the position shown in the figure, and the base ratio calculation and display processing (step S89) is executed after the output data setting processing (step S90).

That is, the main control MPU 1311 detects the entry of a game ball in the switch input process (step S74), calculates the number of prize balls set for each winning slot in the prize ball control process (step S80), and updates the total number of prize balls (or the prize ball number buffer in the embodiment described below) in the base calculation area update process (step S81). After that, it sends a payout command to the payout control board 951 in the output data setting process (step S90), and updates the base value in the base ratio calculation and display process (step S89).

When the payout control board 951 stores the received payout command in memory, it sends a payout command reception confirmation to the main control board 1310. Then, when the payout control board 951 pays out prize balls in accordance with the payout command, it notifies the main control board 1310 that ball payout has been completed. As described above, either the payout command reception confirmation or ball payout completion may be omitted depending on whether the main control board 1310 or the payout control board 951 backs up the number of unpaid prize balls among the number of prize balls calculated in the prize ball control process (step S80).

In the procedure shown in FIG. 43, unlike the timer interrupt processing procedure shown in FIG. 23, the base calculation area update process (step S81) and the base ratio calculation and display process (step S89) are executed after the output data setting process (step S90).

That is, the main control MPU 1311 detects the entry of a game ball in the switch input process (step S74), calculates the number of prize balls set for each winning slot in the prize ball control process (step S80), and sends a payout command to the payout control board 951 in the output data setting process (step S90). After that, in the base calculation area update process (step S81), it updates the total number of prize balls (or the prize ball number buffer in the embodiment described below) with the number of prize balls corresponding to the sent payout command, and updates the base value in the base ratio calculation/display process (step S89). Note that the prize ball number buffer may be updated with the number of prize balls corresponding to the created payout command (even if the payout command has not been sent) rather than the number of prize balls corresponding to the sent payout command.

When the payout control board 951 stores the received payout command in memory, it sends a payout command reception confirmation to the main control board 1310. Then, when the payout control board 951 pays out prize balls in accordance with the payout command, it notifies the main control board 1310 that ball payout has been completed. As described above, either the payout command reception confirmation or ball payout completion may be omitted depending on whether the main control board 1310 or the payout control board 951 backs up the number of unpaid prize balls among the number of prize balls calculated in the prize ball control process (step S80).

The timing at which the main control MPU 1311 receives a command reception confirmation or ball payout completion notification from the payout control board 951 depends on the processing speed of the payout control board 951 and the operating speed of the payout device 830, so the order of the base calculation area update process (step S81) and the base ratio calculation/display process (step S89) is not important.

In the procedure shown in FIG. 44, unlike the timer interrupt processing procedure shown in FIG. 23, after receiving a dispensing command reception confirmation from the dispensing control board 951, a base calculation area update process (step S81) and a base ratio calculation/display process (step S89) are executed.

That is, the main control MPU 1311 detects the entry of a game ball in the switch input process (step S74), calculates the number of prize balls set for each winning slot in the prize ball control process (step S80), and sends a payout command to the payout control board 951 in the output data setting process (step S90).

When the dispensing control board 951 stores the received dispensing command in memory, it sends a dispensing command reception confirmation to the main control board 1310.

When the main control MPU 1311 receives a payout command reception confirmation from the payout control board 951, it updates the total number of prize balls (or, in the embodiment described below, the prize ball number buffer) with the number of prize balls corresponding to the payout command for which the command reception confirmation was received in the base calculation area update process (step S81), and updates the base value in the base ratio calculation/display process (step S89).

Then, when the payout control board 951 pays out the prize balls in accordance with the payout command, it notifies the main control board 1310 that the ball payout has been completed. Note that in the procedure shown in FIG. 44, the payout control board 951 backs up the data on the number of prize balls that have not been paid out so that the data is not lost in the event of a power outage. For this reason, it is necessary for the payout control board 951 to confirm receipt of the command to the main control board 1310, but the notification of ball payout completion may be omitted.

In the procedure shown in FIG. 45, unlike the timer interrupt processing procedure shown in FIG. 23, after receiving a ball payout completion notification from the payout control board 951, a base calculation area update process (step S81) and a base ratio calculation/display process (step S89) are executed.

That is, the main control MPU 1311 detects the entry of a game ball in the switch input process (step S74), calculates the number of prize balls set for each winning slot in the prize ball control process (step S80), and sends a payout command to the payout control board 951 in the output data setting process (step S90).

When the payout control board 951 stores the received payout command in memory, it sends a payout command reception confirmation to the main control board 1310. Then, when the payout control board 951 pays out the prize balls in accordance with the payout command, it notifies the main control board 1310 that the ball payout is complete.

When the main control MPU 1311 receives a ball payout completion notification from the payout control board 951, it updates the total number of prize balls (or the prize ball number buffer in the embodiment described below) with the number of prize balls that have been paid out in the base calculation area update process (step S81), and updates the base value in the base ratio calculation and display process (step S89).

In the procedure shown in FIG. 44, the data on the number of unpaid prize balls is backed up by the main control board 1310 so that it is not lost in the event of a power outage. For this reason, it is necessary for the payout control board 951 to notify the main control board 1310 that ball payout has been completed, but confirmation of command reception may be omitted.

As described above, the pachinko machine of this embodiment updates the number of prize balls and the number of out balls, which are parameters used to calculate the base value, when certain conditions are met. For example, in the process shown in Figures 41 and 42, the number of prize balls is updated when the prize opening sensor detects the entry of a game ball in the switch input process (step S74). In the process shown in Figure 43, the number of prize balls is updated when a payout command is sent. In the process shown in Figure 44, the number of prize balls is updated when it is confirmed that a payout command has been received. In the process shown in Figure 45, the number of prize balls is updated when the payout of the prize balls is completed.

In the pachinko machine of this embodiment, there is a possibility that the number of prize balls during the special prize cannot be counted accurately due to a discrepancy between the timing of determining whether the game state is during the special prize and the timing of updating the number of prize balls. This problem is particularly serious when there is a long time between the ball entering the prize slot and the number of prize balls being updated. For this reason, a flag is attached to the prize balls during the special prize, and this flag is carried over to the number of prize balls due to the prize, the payout command, the receipt confirmation, and the payout completion notification. Then, using this flag, it is determined at each stage whether the ball is during the special prize. In this way, even if there is a long time between the ball entering the prize slot and the number of prize balls being updated, the number of prize balls during the special prize can be counted and updated accurately.

In addition, in the pachinko machine of this embodiment, the number of winning balls and the number of out balls are updated at these times, and the base value is calculated and displayed. In other words, since the base value can be known for the gaming machine alone, the time required for nail adjustment during the manufacturing and inspection processes can be shortened, and gaming machines can be manufactured efficiently.

In addition, in the pachinko machine of this embodiment, if the pachinko machine runs out of balls and is unable to pay out prize balls, the main control board 1310 or the payout control board 951 will hold the number of unpaid balls.

When the main control board 1310 holds the number of unpaid balls, when the winning port sensor detects a winning ball in the switch input process (step S74), the number of prize balls corresponding to the winning port where the winning ball was detected is added to the number of unpaid balls. Note that a predetermined upper limit may be set for this number of unpaid balls, but no upper limit may be set. In this case, it is advisable to update the prize ball number buffer or the total number of prize balls used to calculate the base value each time the number of prize balls to be paid out is calculated. The number of prize balls may also be updated after a payout command is sent from the main control board 1310 to the payout control board 951.

On the other hand, if the payout control board 951 holds the number of unpaid balls, when the winning port sensor detects a winning ball in the switch input process (step S74), a payout command for the number of prize balls corresponding to the winning port where the winning ball was detected is sent to the payout control board 951. Even if the pachinko machine is out of balls and cannot pay out prize balls, a payout command is sent and the number of unpaid balls is held in the payout control board 951. In this case, it is a good idea to update the prize ball count buffer or the total number of prize balls used to calculate the base value each time a payout command is sent.

When the payout control board 951 receives a payout command, it may update the number of prize balls used to calculate the base value. A predetermined upper limit may be set for this number of prize balls, but no upper limit may be set. The number of prize balls used to calculate the base value may also be updated each time prize balls are actually paid out. The payout control board 951 transmits the number of prize balls used to calculate the base value to the main control board 1310, and the main control board 1310 calculates the base value using the received number of prize balls.

Also, as described later in FIG. 47, steps S891 and S892 may be executed after a predetermined number of winnings (e.g., 10 winnings) or after a predetermined time period (e.g., 5 seconds) without comparing the prize ball count buffer value with threshold value Th1.

As explained above, the number of prize balls used to calculate the base value can be updated at various times, but when the number of prize balls is updated, the base value may be calculated without delay and displayed in real time on the base display 1317, or the base value may be calculated and displayed at a specified time (for example, every minute).

[9-3. Timing of updating the number of prize balls and calculating the base value]
Next, variations of the base calculation area update process (step S81) and the base calculation display process (step S89) will be described with reference to Figures 46 to 51. The calculation timing of the base value in each variation is outlined below.
・Figures 39 and 40: Calculate the base value for each timer interrupt period. ・Figures 46 and 47: Calculate the base value for each specified number of prize balls. ・Figures 48 and 49: Calculate the base value for each specified number of out balls. ・Figures 50 and 51: When either the number of prize balls or the number of out balls reaches a specified number, the base value is updated.

Figure 46 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 46 records the number of prize balls in the prize ball number buffer (step S813) in order to calculate the base value when the number of prize balls satisfies a predetermined condition. Note that in Figure 46, the same step numbers are used for parts that are the same as those in the base calculation area update process described above (Figure 39), and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. If the game is in a special prize state, the number of prize balls and the number of out balls are not updated and the process proceeds to step S824, since the prize balls are not related to the calculation of the base value. On the other hand, if the game is not in a special prize state, the number of prize balls calculated based on the input information in the prize ball control process (step S80) is obtained (step S811).

Then, it is determined whether there are any prize balls, i.e., whether the number of prize balls acquired is 1 or more (step S812). As a result, if there are no prize balls, the number of prize balls is not updated and the process proceeds to step S818. On the other hand, if there are any prize balls, the number of prize balls acquired is added to the prize ball number buffer (step S813). Note that the number of prize balls may be output from the external terminal board 784 to a hall computer installed in the gaming center each time it is added to the prize ball number buffer, or when the number of prize balls described later becomes equal to or greater than a predetermined threshold value Th1, the threshold value Th1 may be output from the external terminal board 784 to the hall computer. Here, the prize ball number buffer is an area provided in the main control built-in RAM 1312 to calculate a base value, and the number of prize balls paid out by the pachinko machine 1 is temporarily stored therein.

Then, it is determined whether there is an abnormality in the number of prize balls (step S815). For example, an abnormality in the number of prize balls is when a large number of prize balls are obtained during a specified time other than during the special prize period (for example, prize balls equivalent to more than 10 prizes per minute, considering the number of prize balls at the general prize opening and the starting opening). Note that a multiple-stage tolerance range may be set and the degree of abnormality may be determined in multiple stages depending on the degree of deviation of the number of prize balls from the reference value. Also, if there is an abnormality in the number of prize balls, in step S813, it is not necessary to add the obtained number of prize balls to the prize ball number buffer, and the number of prize balls added to the prize ball number buffer in step S813 may be subtracted.

As a result, if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the player and hall staff are notified that the number of prize balls is abnormal. There are various methods for notifying an abnormality, and one of the methods described below may be used, or two or more may be combined. For example, the abnormality in the number of prize balls may be notified by various lamps, liquid crystal display devices 1600, 3114, 244, sound, etc. Also, the abnormality in the number of prize balls may be output from the external terminal board 784 to a hall computer installed in the gaming center. Furthermore, the number of prize balls determined to be abnormal may not be used in the calculation of the base value. In this case, prize balls may be paid out to the player. Also, when the number of prize balls is determined to be abnormal and is notified by the above-mentioned notification means (sound, lamp, LED, liquid crystal display device, information output from the external terminal board 784, etc.), the number of prize balls determined to be abnormal may be used in the calculation of the base value. Furthermore, the game may be temporarily stopped. Specifically, the main control board 1310 initializes all data in the main control built-in RAM 1312 and initializes all data in the RAM of the peripheral control unit 1511 even if the RAM clear switch is not operated. Then, the game is started from the initial state with the operation confirmation. As another method for stopping the game, the game is temporarily stopped (for example, the variable display of the special pattern is stopped), and then the game is resumed by returning to the original state after the error notification is stopped. For this reason, even if the power failure monitoring circuit does not detect a drop in the power supply voltage, the power failure detection signal is output, and the main control MPU 1311 backs up all data in the main control built-in RAM 1312 and stops the game. Then, after the error notification is finished, the data in the main control built-in RAM 1312 is restored from the backup area and the game is resumed. At this time, the peripheral control unit 1511 waits for a command from the main control board 1310 in the same state, so that the interrupted game is resumed by the resumption of the operation of the main control board 1310. However, since 100 game balls (i.e., out balls) are shot into the game area 5a and there is a possibility that all of the game balls will enter the general winning hole or the starting hole, it is desirable for the manner in which an abnormality in the number of winning balls is notified to be less urgent than a normal error (such as a magnetic sensor error) and more gentle (for example, lower volume or brightness than a normal error notification). The display time may also be the same as a normal error or may be shorter. In some cases, the notification time may be set to 0 seconds and no notification may be made.

Then, the prize ball abnormality notification timer is reset (step S817), and counting the prize ball abnormality notification time begins.

Then, the number of out balls is obtained (step S818), and the total number of out balls is updated by adding the obtained number of out balls to the total number of out balls (step S822).

Then, it is determined whether the prize ball abnormality notification timer started in step S817 has timed out (step S824). Then, when the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825). Note that in step S824, the end of the notification is determined based on the time of the timer for notifying the prize ball abnormality for a predetermined period of time, but the end of the notification may also be determined so that the prize ball abnormality is notified for a predetermined number of balls fired. Also, the abnormality may continue to be notified until a hall employee confirms it.

In the base calculation area update process shown in FIG. 46, it was determined in step S985 whether there was an abnormality in the number of prize balls, but after obtaining the number of out balls, it may also be determined whether there is an abnormality in the number of prize balls (i.e., whether there is an abnormality in the base value) by comparing it with the number of out balls. For example, this may be the case when the number of prize balls counted in a specified period of time exceeds the number of out balls, or when a high proportion of out balls (e.g., 50% or more) have won compared to the number of prize balls at the general winning hole and the starting hole.

Figure 47 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 47, the base value is updated when the number of prize balls meets a predetermined condition. Note that in Figure 47, the same steps as in the base calculation and display process described above (Figure 40) are given the same step numbers, and detailed explanations are omitted.

First, it is determined whether the number of prize balls stored in the prize ball number buffer is equal to or greater than a predetermined threshold value Th1 (step S890). Various methods can be used to determine whether the prize ball number buffer value is equal to or greater than the predetermined threshold value Th1. For example, the prize ball number buffer value can be compared to the threshold value Th1, or the value of a predetermined bit in the prize ball number storage area can be used to determine this (specifically, the prize ball number storage area can be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater). In addition, the result of the comparison between the prize ball number and the threshold value Th1 in the base calculation area update process (Figure 46) can be recorded in a flag, and in the base calculation/display process (Figure 47), the flag can be used to determine whether the prize ball number buffer value is equal to or greater than the predetermined threshold value Th1.

If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to calculate the base value, so the base calculation and display process is terminated.

On the other hand, if the prize ball number buffer value is equal to or greater than the threshold Th1, the threshold Th1 is added to the total prize ball number (step S891), and the threshold Th1 is subtracted from the prize ball number buffer (step S892). In other words, if the number of prize balls counted from a predetermined starting point meets a predetermined condition (the number of prize balls stored in the prize ball number buffer is equal to or greater than the threshold Th1), the fractional part of the prize ball number is left (the fraction obtained by subtracting the threshold Th1 from the prize ball number buffer is left in the prize ball number buffer), and the other part is stored in memory (the threshold Th1 is added to the total prize ball number), and a process is executed to use it for calculating the base value. Specifically, when the threshold Th1 is 100, if the prize ball number buffer value is 99 and five prize balls are generated by winning at the general winning port, the prize ball number buffer value becomes 104, but 100 are moved to the total prize ball number and used to calculate the base value, and the remaining four are left in the prize ball number buffer. In this case, the count of the four prize balls remaining in the prize ball number buffer is used to calculate the base value the next time the prize ball number buffer value becomes equal to or greater than the threshold value Th1. Although the threshold value Th1 is described as 100, it may be another value such as 1000. However, if a large threshold value Th1 is set such that the base is not calculated even if a jackpot is obtained, there is a possibility that the detection of fraud may be delayed, so it is recommended that the threshold value Th1 be set to the number of prize balls paid out in one jackpot (or the minimum number of prize balls in a jackpot if there are multiple types of jackpots (for example, 4-round and 8-round jackpots). In addition, it is recommended to update the base value frequently from the viewpoint of early detection of fraud. For example, it is preferable that the threshold value Th1 is 10 rather than 100, since the base value is updated frequently.

In addition, steps S891 and S892 may be executed after a predetermined number of winnings (e.g., 10 times) without comparing the prize ball count buffer value with the threshold value Th1. Furthermore, steps S891 and S892 may be executed every predetermined time (e.g., 5 seconds) without comparing the prize ball count buffer value with the threshold value Th1. This predetermined time may be measured by a timer operated by the main control MPU 1311, or may be measured by the output of an RTC (real-time clock).

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in the division input register A131216, and the total number of out balls is stored in the division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from the division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 will be an error (or indefinite), so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

In addition, when the total number of out balls is 0 or when the calculated base value is an abnormal value, the base value does not need to be calculated and the base calculation area 13128 does not need to be updated. For example, when the total number of out balls is equal to or less than the total number of prize balls, the base value is 100% or more, and the number of prize balls obtained is equal to or more than the number of shot balls (out balls). Since the game is not being played normally, no numerical values are stored in the division input registers 131216 and 131217 and the base value does not need to be calculated. In addition, when the base value is calculated and the value read from the division result register A 131218 is 100% or more, the base calculation area 13128 does not need to be updated with the value read from the division result register A 131218.

Also, an abnormality in the base value may be determined using 1500% as a threshold value. Since the theoretical upper limit of the base value for a pachinko machine in which the maximum number of winning balls per winning slot is 15 is 1500%, a base value exceeding 1500% is an impossible value, and it can be determined that the gaming machine is abnormal. In this case, too, it is not necessary to calculate the base value, or to update the base calculation area 13128 with the value read from the division result register A 131218.

The threshold value for determining whether the base value is abnormal may be another value. A normal value for the base value during normal operation of the pachinko machine (e.g., 30% to 50%) may be defined, and if the base value is outside the normal range, the base calculation area 13128 may not be updated with the value read from the division result register A 131218, and the display of the base value may not be updated.

Although we have explained above the case where the base value is not displayed, even if the calculated base value is abnormal, the abnormal base value may be displayed.

Note that the total number of winning balls and the total number of out balls are cumulative values from the time the pachinko machine 1 starts operating, as described later in FIG. 52, but the total number of winning balls and the total number of out balls may be initialized at the same time (for example, every time a specified number of winning balls or every time a specified number of out balls occurs).

Then, a base notification command is generated (step S908) and the base is notified to the player and hall employees.

As explained above, the pachinko machine of this embodiment judges whether the number of winning balls is abnormal each time the number of winning balls is obtained, so that fraudulent behavior can be detected early. This is because, during normal play, there is a high probability that a significant number of game balls (for example, 50% of the number of balls fired) will not enter the general winning hole 2001 or the starting holes 2002 and 2004. Therefore, abnormalities in winning balls entering the winning holes that are always open (general winning hole 2001 and starting holes 2002 and 2004) are judged and reported.

In addition, in the pachinko machine of this embodiment, the base value is calculated when the number of winning balls meets a predetermined condition, so the accurate base value can be displayed at the appropriate time.

In the examples shown in Figures 46 and 47, the base value is calculated when the number of prize balls reaches a predetermined number, so the amount of calculation required to calculate the base value (e.g., the load on the main control MPU 1311) can be reduced compared to when the base value is calculated for each prize ball. When a new base value is calculated, a base notification command is generated to notify the calculated base value and the new base value is notified, but until then the previous base value is notified.

Figure 48 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 48 records the number of out balls in the out ball count buffer in order to calculate the base value when the number of out balls meets a predetermined condition (step S819). Note that in Figure 48, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in Figure 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and it is determined whether there are any prize balls (step S812). Then, if the result of the determination in step S812 is that there are any prize balls, the obtained number of prize balls is added to the total number of prize balls (step S814). In other words, in the base calculation area update process shown in Figure 48, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated.

Then, it is determined whether there is an abnormality in the number of prize balls (step S815), and if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the timer for notifying abnormality in prize balls is reset (step S817).

Then, the number of out balls is obtained (step S818). The obtained number of out balls is added to the out ball number buffer (step S819).

Then, it is determined whether the prize ball abnormality notification timer has timed out (step S824), and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825).

In addition, in the pachinko machine of this embodiment, the base value is calculated for each predetermined number of winning balls. For this reason, for example, when a game ball enters the starting hole and it is determined that a pre-reading performance is to be generated, and the display mode of the reserved display is displayed in a different mode from the normal mode (such as a flashing display or a red reserved display), the player hopes that the special pattern change display game corresponding to the pre-read reserved will be a big hit, but if the special pattern change display game is a miss, the player will be disappointed. Even in such a case, if the base value is calculated for each predetermined number of winning balls as in this embodiment, the player's disappointment as described above can be reduced. This is because the calculation of the base value is delayed from the timing of the prize ball generation, and the base value that is higher due to the winning ball entering the starting hole is notified. In other words, even if it is determined that a pre-reading performance is to be executed when a ball enters the starting hole, if the number of winning balls paid out at the time of the ball entering the starting hole does not reach the above-mentioned predetermined number (for example, the threshold value Th1 = 100 balls), the base value is not updated. In other words, the base value displayed to the player has not changed. However, since a prize ball has been obtained, the base value should increase (due to the number of digits displayed, it is possible that only the lower digits change, and the display does not change). For this reason, even if the above-mentioned look-ahead performance is a miss, the player will think that the base value will increase later (i.e., the player is doing well), and this helps prevent a decline in interest. In other words, even if it is determined that the look-ahead performance should be executed, the base value will not be updated if the prize ball buffer value has not reached a predetermined number (threshold value Th1). Also, if it is determined that the look-ahead performance should be executed and the prize ball buffer value has reached a predetermined number, the calculation of the base value may be delayed until the next time the prize ball buffer value reaches the predetermined number.

The player may be allowed to select whether to delay the calculation of the base value or to calculate it without delay. For example, the selection may be made by the operation button 220C at the start of the game. The timing of the calculation of the base value may also be determined by lottery. When it is decided to perform a look-ahead performance, a performance that can notify a delay in the calculation of the base value may be executed. If the reserved memory of the special symbol change display game has reached its upper limit, the jackpot lottery will not be executed even if the starting hole is won. Even in this case, prize balls are paid out when the starting hole is won, so the number of prize balls is counted and used to calculate the base value. If a specific error occurs and a prize is not paid out even if the starting hole or the general winning hole is won, the number of prize balls is not counted and the base value is not updated by the winning.

Figure 49 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 49, the base value is updated when the number of out balls meets a predetermined condition. Note that in Figure 49, the same steps as in the base calculation and display process described above are given the same step numbers, and detailed explanations are omitted.

First, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S895). Various methods can be used to determine whether the out ball count buffer value is equal to or greater than the predetermined threshold value Th2. For example, the number of out balls may be compared to the threshold value Th2, or the determination may be made based on the value of a predetermined bit in the storage area for the number of out balls (specifically, the storage area for the number of out balls may be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater). In addition, the result of the comparison between the number of out balls and the threshold value Th2 in the base calculation area update process (Figure 48) may be recorded in a flag, and in the base calculation/display process (Figure 49), the flag may be used to determine whether the number of out balls is equal to or greater than the predetermined threshold value Th2.

If the out ball count buffer value is smaller than threshold value Th2, it is not time to calculate the base value, so the base calculation and display process ends.

On the other hand, if the out ball count buffer value is equal to or greater than the threshold value Th2, the threshold value Th2 is added to the total out ball count (step S899), and the threshold value Th2 is subtracted from the out ball count buffer (step S900). Note that steps S899 and S900 may be executed at predetermined intervals (e.g., one minute) without comparing the out ball count buffer value with the threshold value Th2.

Then, the total number of winning balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of winning balls is multiplied by a predetermined number (e.g., 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 will be an error, so it does not need to be stored in the base calculation area 13128. In this case, the base value displayed in the base display 1317 is not updated.

Note that the total number of winning balls and the total number of out balls are cumulative values from when the pachinko machine 1 starts operating, but the total number of winning balls and the total number of out balls may be initialized at the same time (for example, every time a specified number of winning balls or every time a specified number of out balls occurs).

A base notification command is then generated (step S908) to notify the player and hall staff of the base. The base notification command may simply notify the base value, may notify the base value in a specific presentation, or may notify an abnormality in the base value.

As explained above, in the pachinko machine of this embodiment, the base value can be updated and displayed each time the number of out balls (number of shot balls) reaches a predetermined number. This allows the base value to be displayed at the appropriate time. In addition, it is possible to provide a gaming machine that pursues entertainment.

In addition, the number of prize balls is added to the total number of prize balls each time a prize ball is entered (detection of winning, transmission of a payout command, arrival of the payout command, completion of prize ball payout, etc.). This is because if checking whether a certain condition is met when adding the number of prize balls (for example, whether there is an out ball corresponding to the prize ball), there is a risk that the base value will not be calculated correctly. For example, even if the ball is not released for a certain period of time (about one minute), the game ball may get caught on a nail arranged in the play area, causing a sling (grape) state to be resolved, and the game ball may enter the winning hole after a delay. For this reason, it is desirable to update the number of prize balls regardless of whether there are out balls or not.

If both the number of out balls and the out ball number buffer value are smaller than threshold value Th2, it may be displayed that the out ball number buffer value is a fraction smaller than threshold value Th2, or the out ball number buffer value may be displayed.

In the examples shown in Figures 48 and 49, the base value is calculated when the number of out balls reaches a predetermined number, so the amount of calculation required to calculate the base value (e.g., the load on the main control MPU 1311) can be reduced compared to when the base value is calculated every time an out ball is detected. When a new base value is calculated, a base notification command is generated to notify the calculated base value and the new base value is notified, but until then the previous base value is notified.

Figure 50 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 50 records the number of prize balls in the prize ball number buffer and the number of out balls in the out ball number buffer in order to calculate the base value when either the number of prize balls or the number of out balls meets a specified condition. Note that in Figure 50, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and it is determined whether there are any prize balls (step S812). Then, if there are any prize balls, the obtained number of prize balls is added to the prize ball number buffer (step S813).

Then, it is determined whether there is an abnormality in the number of prize balls (step S815), and if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the timer for notifying abnormality in prize balls is reset (step S817).

Then, the number of out balls is obtained (step S818), and the obtained number of out balls is added to the out ball number buffer (step S819).

Then, it is determined whether the prize ball abnormality notification timer has timed out (step S824), and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825).

Figure 51 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 51, the base value is updated when either the number of winning balls or the number of out balls meets a predetermined condition. Note that in Figure 51, the same step numbers are used for the same parts as in the base calculation and display process described above, and detailed explanations thereof are omitted.

First, it is determined whether the number of prize balls stored in the prize ball count buffer is equal to or greater than a predetermined threshold value Th1 (step S890). If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to update the total number of prize balls, so proceed to step S895. On the other hand, if the prize ball count buffer value is equal to or greater than the threshold value Th1, the threshold value Th1 is added to the total number of prize balls (step S891), and the threshold value Th1 is subtracted from the prize ball count buffer (step S892). Then, the out ball count buffer value is added to the total number of out balls (step S893), and the out ball count buffer is set to 0 (step S894). Note that steps S891 to S894 may be executed after each predetermined number of winnings or at predetermined time intervals, without comparing the prize ball count buffer value with the threshold value Th1.

Then, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S895). If the out ball count buffer value is smaller than the threshold value Th2, it is not time to update the total number of out balls, so proceed to step S902. On the other hand, if the out ball count buffer value is equal to or greater than the threshold value Th2, the prize ball count buffer value is added to the total number of prize balls (step S897), and the prize ball count buffer is set to 0 (step S898). Then, the threshold value Th2 is added to the total number of out balls (step S899), and the threshold value Th2 is subtracted from the out ball count buffer (step S900).

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

After that, a base notification command is generated (step S908) to notify the player and hall employees of the base. The base notification command may simply notify the base value, or may notify an abnormality in the base value. Note that the base notification command may be generated each time the base value is calculated, or may not be generated even when the base value is calculated.

In the base calculation and display process shown in Figure 51, the base value is calculated every time, even if the total number of winning balls or the total number of out balls is not updated. In other words, if the total number of winning balls and the total number of out balls are not updated, the same value is calculated as the base value, and the base value remains the same. On the other hand, if the total number of winning balls or the total number of out balls is updated, the base value is updated to a different value.

Figure 52 shows the specific structure of the work area for storing each data in the base calculation area 13128.

The data of the total number of winning balls and the total number of out balls in the base calculation area 13128 is written by the base calculation area update process and the base calculation/display process (Figures 39, 46, 47, 48, 49, 51, etc.) executed by the main control MPU 1311, and is read by the base calculation/display process (Figures 40, 47, 49, 51, etc.). In addition, the data of the winning ball number buffer and the out ball number buffer in the base calculation area 13128 is written by the base calculation area update process (Figures 46, 48, 50, etc.) executed by the main control MPU 1311, and is read by the base calculation/display process (Figures 47, 49, 51, etc.). For this reason, the base calculation area update process and the base calculation/display process can be configured separately from the timer interrupt process (game control program), and the program for the role ratio calculation/display process can be shared even for game machines with different specifications.

Figure 52 (A) shows an example of the structure of the work area in the simplest way. In the structure of the work area shown in Figure 52 (A), a prize ball number buffer, a total prize ball number, an out ball number buffer, a winning ball number buffer, a specific winning ball number buffer, a total out ball number, and a base are stored. The prize ball number buffer temporarily stores the number of prize balls paid out to the player other than during the special prize, and is used to calculate the base when the number of prize balls meets a predetermined condition (for example, for each predetermined number of prize balls). The total prize ball number is the total number of prize balls paid out to the player other than during the special prize. The out ball number buffer is the number of game balls fired by the player other than during the special prize, and is used to calculate the base when the number of out balls meets a predetermined condition (for example, for each predetermined number of out balls). The winning ball number buffer temporarily stores the number of balls that have won in the general winning hole or the starting hole. The specific winning ball number buffer temporarily stores the number of balls that have won in a specific general winning hole or starting hole. The winning ball count buffer is used when counting the number of out balls based on the number of balls that pass through the out port (Figures 55 and 56). The specific winning ball count buffer is used when correcting the number of out balls based on the number of winning balls that enter specific general winning ports (Figures 71 and 72). The total number of out balls is the total number of game balls fired by the player other than during special prizes. The base is calculated as total number of winning balls ÷ total number of out balls × 100, and is a number expressed as a percentage, and is calculated in step S903 of the base calculation and display process.

Of the work area structure shown in FIG. 52(A), the total number of winning balls and the total number of out balls correspond to the respective areas of the total cumulative total in FIG. 52(B) described later, and are 3 or 4 byte memory areas each, capable of storing values up to 16777215 or 4294967295 in decimal. Since this data is not erased unless an abnormality occurs in the data, a large memory area is provided so that data can be stored for a long period of time. The base is a 1 byte memory area equivalent to the total cumulative total base in FIG. 52(B) described later, and can store values up to 255 in decimal. It is also possible to allocate a capacity that allows the base value to be recorded as a decimal.

Figure 52 (B) shows another example of the structure of the work area using a ring buffer. In the structure of the work area shown in Figure 52 (B), a prize ball number buffer, a total prize ball number, an out ball number buffer, a winning ball number buffer, a specific winning ball number buffer, a total out ball number, and a base are stored. Each data item is the same as that described in Figure 52 (A). The memory area for the total prize ball number and the total out ball number is configured by a ring buffer with n memory areas (for example, n = 10 memory areas for every 6000 prize balls) for every predetermined number of prize balls (or every predetermined number of out balls, every predetermined time), and when the number of prize balls reaches a predetermined number (6000), the write pointer for all data moves and the memory area in which the data is updated changes. Then, after the data for the predetermined number of prize balls is stored in the nth memory area, the write pointer moves to the first memory area, and the data is stored in the first memory area. Note that the write pointer may be moved when data other than the number of prize balls (number of out balls, predetermined time, etc.) reaches a predetermined number.

The write pointer and read pointer of the ring buffer are common to all data, and the write pointer of all data columns moves for each specified number of prize balls. In addition, the read pointer also moves as the write pointer moves. The read pointer points to the memory area immediately before the write pointer. This is because the base value is calculated using the most recent data for 6,000 prize balls.

The cumulative totals of the total number of winning balls and the total number of out balls are the cumulative values of the data stored in the n memory areas of the ring buffer, and the base cumulative value is a value calculated from the cumulative values of the total number of winning balls and the total number of out balls, and when the ring buffer goes through one cycle and one memory area of the ring buffer is cleared to write new data, the cumulative value is recalculated excluding the data in that cleared area. The total cumulative total of each data is the cumulative value of all data collected in the past, and the base total cumulative value calculated from that cumulative value is a value calculated from the total cumulative value of each data, and even when the ring buffer goes through one cycle and one memory area of the ring buffer is cleared to write new data, the total cumulative value is calculated including the original data in that cleared area.

In the work area structure shown in FIG. 52(B), the total number of winning balls and the total number of out balls in the ring buffer are each 2-byte storage areas, and can store values up to 65535 in decimal. The cumulative total is the sum of data for 6000 winning balls x n (60000 winning balls when n=10), so a large storage area is provided. The cumulative total of the total number of winning balls and the total number of out balls are each 3 or 4-byte storage areas, and can store values up to 16777215 or 4294967295 in decimal. The total cumulative total is not erased unless an abnormality occurs in the data, so an even larger storage area is provided to store data for a long period of time. In addition, the base cumulative total and the total cumulative total are each 1-byte storage areas, and can store values up to 255 in decimal. Note that a capacity that allows the base value to be recorded in decimal may be allocated.

In the data structure shown in FIG. 52(A), the stored data is not erased, so the data in the base calculation area 13128 may be erased at predetermined intervals (e.g., one day, one week, one month, etc.). Similarly, the total cumulative total in FIG. 52(B) may be erased at predetermined intervals.

In addition, if the data in base calculation area 13128 or the calculated base value is abnormal, the abnormal value may be erased. Not only the abnormal value but all data in base calculation area 13128 may be erased. Also, it may be notified that the data in base calculation area 13128 or the calculated base value is abnormal. Also, a check code may be used to inspect the data in the backup area, and the normal data in the backup area may be copied to the main area, after which the base value may be calculated again.

[9-4. Display of base value]
As described above, the calculated base value may continue to be displayed while the power of the pachinko machine 1 is turned on, but when the main body frame 4 is closed and play is possible, the base display 1317 cannot be seen, so the 7-segment LED 13172 may be turned off to reduce the power consumption of the gaming machine. Naturally, even when the 7-segment LED 13172 is turned off, the base calculation area update process (step S81) and the base calculation/display process (step S89) are executed.

The base display 1317 may always display the base value, or may display the base value by operating the display switch 1318. For example, when the display switch 1318, which is a push button switch, is pressed, the display of the base value begins and disappears after a predetermined period of time. Note that if the display switch 1318 is operated while a main body frame opening switch (not shown) is detecting that the main body frame 4 has been released from the outer frame 2, the base display 1317 may display the base value. In other words, even if the display switch 1318 is operated when the main body frame 4 is not in the open state, the base display 1317 does not display the role ratio.

In addition, when the main body frame 4 is opened, it is advisable to display a specific indication on all digits so that it is possible to confirm that the base display 1317 is operating normally. For example, as shown in FIG. 36(B), all digits may display "-" or all segments may be lit.

When the main body frame 4 is closed, a predetermined display is made to confirm that the base display 1317 is operating normally (Fig. 36 (E)), and after a predetermined time (e.g., 30 seconds) has elapsed, the 7-segment LED 13172 is turned off to reduce the power consumption of the gaming machine. This base non-display state is the same as that after the initial setting is completed (Fig. 36 (B)), but it may be a different state, as long as it is distinguishable from the displayed base value.

The base display 1317 may be used as the functional display unit 1400. The functional display unit 1400 normally displays the game status based on a control signal from the main control board 1310, but when a main frame opening switch (not shown) detects that the main frame 4 has been opened from the outer frame 2, the main control board 1310 switches the display so that the functional display unit 1400 displays the base value. Even if the display of the functional display unit 1400 is switched by the opening of the main frame 4, the progress of the game may be continued. By continuing the progress of the game, when the main frame 4 is closed, the display can be quickly switched from the base display to the display of the game status. For example, when the main frame 4 is opened during a special pattern variable display game, the base value is displayed, but when the main frame 4 is closed before the variable time has elapsed, the variable display for the remaining time can be performed. The special pattern displayed on the functional display unit 1400 is synchronized with the decorative pattern displayed on the main liquid crystal display device 1600, so the decorative pattern stops when the special pattern variable display of the functional display unit 1400 stops. Therefore, even if the function display unit 1400 displays the base value, it can be configured so that the player does not feel uncomfortable.

In addition, even when the main frame 4 is closed, the calculated base value (in the above-mentioned embodiment, the role ratio) may be displayed on the base display (role ratio display) 1317. In this way, the base value (role ratio) can be confirmed without opening the main frame 4, so that the decline in operation of the gaming machine can be suppressed. In addition, it is not necessary to determine whether the main frame 4 is open. In addition, in an island facility where pachinko machines are installed on both sides, when the main frame 4 of one pachinko machine is opened, the back of the pachinko machine installed on the opposite side can be seen. In such a gaming machine, the base (role ratio) of the two pachinko machines installed back to back can be confirmed by opening the main frame 4 of one pachinko machine. In addition, when the base value is displayed even when the main frame 4 is closed, it is preferable to display the base value in a form that the player can recognize (for example, on a display device that displays the performance of the special pattern variation display game or a display device attached to the frame). This is because the base value can be used as a barometer that indicates the condition of the pachinko machine, and is worth seeing by the player. When the base value is calculated by the main control board 1310, a signal for displaying the base value can be sent from the main control board 1310 to the peripheral control board 1510. When the base value is calculated by the dispensing control board 951, a signal for displaying the base value can be sent from the dispensing control board 951 to the peripheral control board 1510. Also, the signal for displaying the base value can be sent via a relay board.

In addition, in the pachinko machine of this embodiment, the light intensity (brightness) of the base display 1317 is not changed even when the machine transitions to energy saving mode. This is because if the light intensity of the base display 1317 is reduced during energy saving mode, it becomes difficult to check the base value using the base display 1317 when adjusting the pachinko machine outside opening hours.

Specifically, the gaming machine of this embodiment enters a standby state when a predetermined time has elapsed after the game ball has not entered any of the winning slots and the reserved memory of the special symbol variation display game has been consumed. In the standby state, the peripheral control unit 1511 continues to output the BGM that is output in the so-called normal variation. Furthermore, when a predetermined time (e.g., 30 seconds) has elapsed in the standby state, the machine transitions to a demo state. In the demo state, a video showing the motif of the gaming machine is played, or an explanation of the gaming machine is given. Furthermore, when a predetermined time (e.g., 30 seconds) has elapsed in the demo state, the machine transitions to an energy saving mode (note that it is not necessary to distinguish between the demo state and the energy saving mode). In the energy saving mode, the light intensity of the liquid crystal display devices 1600, 3114, 244 and various lamps controlled by the peripheral control unit 1511 is reduced in order to suppress power consumption. However, since the power consumption of the display devices (functional display unit 1400 and base display device 1317) controlled by the main control board 1310 is smaller than the power consumption of the entire pachinko machine, it is not necessary to reduce the light intensity of these display devices. Furthermore, if the light intensity of the functional display unit 1400 is not reduced, players who wish to play on vacant machines can easily see the results of the previous lottery.

In addition, even if the game ball does not enter the start hole or general winning hole, if a game ball is launched into the game area and an out ball is detected, the displayed base value may be recalculated and updated. If game balls are launched and the number of out balls increases but the number of winning balls does not increase, the calculated base value will decrease, but some players are fired up for revenge.

For such players, the interest in the game can be revived by informing them of the game status using the functional display unit 1400, which also serves as the base display 1317. In other words, even if the mode is switched to demo mode or energy saving mode, the display mode of the display showing the base value should maintain the same light intensity as before the mode was switched to demo mode or energy saving mode, or should increase the light intensity so that the player can properly check the base value.

Although the above has been described with respect to maintaining or increasing the light intensity of the display showing the base value, the light intensity of the display showing the base value may be decreased or turned off in order to emphasize the viewpoint of reducing energy consumption. For example, when a specific operation is detected during the energy saving mode (operation of an operating means provided on the gaming machine, such as a firing stop button that forcibly stops firing, an operating button that changes the displayed presentation, a RAM clear button that clears the contents of the RAM, or a supply adjustment button that switches between supplying and not supplying power to the gaming machine), the light intensity of the display showing the base value may be decreased. Furthermore, when the specific operation described above is performed, not only during the energy saving mode, the light intensity of both the lamp or the like that reduces power consumption during the energy saving mode and the display showing the base value may be decreased or turned off.

When reducing or turning off both the light intensity of lamps, etc. and the display that displays the base value, the light intensity of lamps, etc. that reduce power consumption during the energy saving mode may be reduced or turned off before the display that displays the base value. In this case, the light intensity of lamps, etc. that consume a large amount of power is reduced first, which has the effect of greatly reducing power consumption. Also, the light intensity of the display that displays the base value may be reduced or turned off before the display that displays the base value. In this case, the effect of maintaining the glamor of the gaming machine even during the energy saving mode is achieved. Also, during the energy saving mode, lamps, etc. that reduce power consumption and the display that displays the base value may be reduced or turned off at the same time. In this case, the amount of reduction in power consumption can be increased, resulting in a high energy saving effect. Note that the terms "before" and "at the same time" in these explanations include the order of timing of internal processing and the order of appearance from the player.

The display mode of the base value may be set to multiple stages, and the display mode of each stage may be changed. Specifically, the displayed base value may be divided into multiple stages, such as 30% or more, 25% or more but less than 30%, 20% or more but less than 25%, 15% or more but less than 20%, 10% or more but less than 15%, and less than 10%. The display device that displays the base value may be configured with a multi-color LED, and the light color may be changed to white, blue, or yellow for each stage. The display device that displays the base value may be configured with a liquid crystal display device, and self-deprecating comments such as "You're doing well," "You're getting worse," "That's bad," and "In a way, it's amazing" may be displayed for each stage when the base value is low. Furthermore, without changing the display mode of the display device that displays the base value, a performance may be performed in which the above-mentioned comments are added to the main liquid crystal display device 1600 on which the decorative pattern is displayed.

9-5. Calculating the base value using the number of balls passing through the out hole
Next, further variations of the base calculation area update process (step S81) and the base calculation display process (step S89) will be described with reference to Figures 53 to 56. In the process described with reference to Figures 54 to 56, the number of out balls is calculated using the number of winning balls and the number of balls passing through the out hole, and the base value is calculated. The calculation timing of the base value in each variation is as follows:
- Figures 54 and 40: Calculate the base value every timer interrupt period - Figures 55 and 56: Calculate the base value for each specified number of prize balls and each specified number of out balls.Note that we will not explain the patterns for calculating the base value for each specified number of prize balls and each specified number of out balls, but these can be realized by combining Figures 54 to 56.

When out balls are detected by the out-port passing ball sensor 1021 installed near the out port 1111, there is a problem in that the number of out balls cannot be counted accurately. This is because game balls shot toward the game area 5a flow out of the game area 5a via the out port 1111, the general winning port 2001, the starting port 2002, and the large winning ports 2005 and 2006. For this reason, the out-port passing ball sensor 1021 cannot accurately count the number of game balls shot toward the game area 5a. Therefore, in the pachinko machine of this embodiment, the number of out balls is accurately calculated using the number of winning balls and the number of balls passing through the out port, and the base value is accurately calculated.

Figure 53 is a front view showing another example of a game board.

The game board of the pachinko machine of this embodiment has a structure roughly the same as that shown in FIG. 10, but has an out-outlet passing ball sensor 1021 that is provided at the bottom of the game area 5a and detects game balls (number of balls passing through the out-outlet) that pass through the out-outlet 1111 and flow out of the game area 5a. The out-outlet passing ball sensor 1021 should be installed in a position where the player can see it through the out-outlet 1111. By installing the out-outlet passing ball sensor 1021 in a position where the player can see it through the out-outlet 1111, the player can be made aware that the out balls are being counted, i.e., that the base is being calculated.

The out-port passing ball sensor 1021 may be installed in a location that is not visible to the player, such as a collection gutter where game balls that flow down from the game area 5a through the out-port 1111 are lined up. If it is installed in a location that is not visible to the player, the player does not need to be aware of the counting of out balls. Also, by placing the out-port passing ball sensor 1021 on the back side of the out-port 1111, it is possible to secure sufficient space for placing a liquid crystal display device and a role (movable body), and the degree of freedom in designing the game board 5 can be improved. Also, in order to prevent double counting of game balls, it is recommended that the rolling surface on which the game balls that have passed the out-port passing ball sensor 1021 roll be inclined or curved so that the game balls that have passed the out-port passing ball sensor 1021 do not bounce back.

Figure 54 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 54 obtains the number of winning balls, the number of balls that pass through the out exit, and the number of winning balls in order to calculate a base value using the number of balls that pass through the out exit for each timer interrupt period. Note that in Figure 54, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and the obtained number of prize balls is added to the total number of prize balls (step S814). That is, in the base calculation area update process shown in FIG. 54, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated. Note that it is possible to determine whether there are any prize balls, and if there are no prize balls, skip the process of updating the total number of prize balls.

Then, the number of balls that pass through the out port is obtained (step S818), and the number of winning balls is obtained (step S820). The sum of the number of balls that pass through the out port and the number of winning balls is then added to the total number of out balls (step S822). That is, in the base calculation area update process shown in FIG. 54, the total number of out balls used to calculate the base value is updated each time an out ball or winning ball is detected.

As in steps S815 to S817 of the base calculation area update process (Figure 46) described above, it may be determined whether there is an abnormality in the number of prize balls, and if there is an abnormality in the number of prize balls, an abnormality notification command may be generated and the prize ball abnormality notification timer may be reset. Furthermore, as in steps S824 to S825 of Figure 46, it may be determined whether the prize ball abnormality notification timer has timed out, and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command may be generated and the prize ball abnormality notification may be stopped.

After recording the total number of winning balls and the total number of out balls in the base calculation area update process shown in Figure 54, the base value can be calculated using the base calculation and display process shown in Figure 40.

Figure 55 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 55 records the number of prize balls in the prize ball number buffer, records the number of balls passing through the out hole in the out ball number buffer, and records the number of winning balls in the winning ball number buffer in order to calculate the base value when either the number of prize balls or the number of out balls meets a specified condition. Note that in Figure 55, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and it is determined whether there are any prize balls (step S812). Then, if there are any prize balls, the obtained number of prize balls is added to the prize ball number buffer (step S813).

Then, it is determined whether there is an abnormality in the number of prize balls (step S815), and if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the timer for notifying abnormality in prize balls is reset (step S817).

Then, the number of balls passing through the out hole is obtained (step S818), and the obtained number of balls passing through the out hole is added to the out hole number buffer (step S819). Then, the number of winning balls is obtained (step S820), and the obtained number of winning balls is added to the winning ball number buffer (step S821).

Then, it is determined whether the prize ball abnormality notification timer has timed out (step S824), and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825).

In the base calculation area update process shown in Figure 54, the sum of the number of balls that passed through the out exit and the number of winning balls is added to one memory area (total number of out balls), and in the base calculation area update process shown in Figure 55, the number of balls that passed through the out exit and the number of winning balls are added to another memory area (number of out balls buffer, number of winning balls buffer). In this way, the number of balls that passed through the out exit and the number of winning balls may be recorded in one memory area or in separate memory areas.

In addition, when the number of balls passing through the out exit and the number of winning balls are recorded in separate memory areas in the base calculation area update process shown in FIG. 55, the number of out balls increases by one when a ball enters the winning exit, so the counting of the number of balls passing through the out exit and the counting of the number of winning balls are performed simultaneously (within one timer interrupt process), but the base value is calculated after both the out ball count buffer and the winning ball count buffer are updated. In this case, if it is not possible to update both the out ball count buffer and the winning ball count buffer within one timer interrupt process, it is better to determine in advance whether to prioritize counting the number of balls passing through the out exit or the number of winning balls, rather than deciding by lottery. In this case, if the process related to the winning balls is given priority over other processes, the prize ball payout process can be executed quickly, but this can be determined appropriately according to the specifications of the gaming machine.

Figure 56 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 56, the base value is updated when either the number of winning balls or the number of out balls meets a predetermined condition. Note that in Figure 56, the same steps as in the base calculation and display process described above are given the same step numbers, and detailed explanations are omitted.

First, it is determined whether the number of prize balls stored in the prize ball count buffer is equal to or greater than a predetermined threshold value Th1 (step S890). If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to update the total number of prize balls, so proceed to step S896. On the other hand, if the prize ball count buffer value is equal to or greater than the threshold value Th1, the threshold value Th1 is added to the total number of prize balls (step S891), and the threshold value Th1 is subtracted from the prize ball count buffer (step S892). Then, the out ball count buffer value is added to the total number of out balls (step S893), and the out ball count buffer is set to 0 (step S894). Note that steps S891 to S894 may be executed after each predetermined number of winnings or at predetermined time intervals, without comparing the prize ball count buffer value with the threshold value Th1.

Then, it is determined whether the sum of the number of balls passing through the out port stored in the out ball number buffer and the number of winning balls stored in the winning ball number buffer is equal to or greater than a predetermined threshold value Th2 (step S896). The sum of the number of balls passing through the out port and the number of winning balls is the number of game balls that have flowed into the game area, which is the number of out balls. If the result of the determination is that the calculated number of out balls is smaller than the threshold value Th2, it is not time to update the total number of out balls, so proceed to step S902. On the other hand, if the calculated number of out balls is equal to or greater than the threshold value Th2, the prize ball number buffer value is added to the total number of winning balls (step S897), and the prize ball number buffer is set to 0 (step S898). Then, the threshold value Th2 is added to the total number of out balls (step S899), the winning ball number buffer is set to 0, the winning ball number buffer value is added to the out ball number buffer, and the threshold value Th2 is subtracted (step S901). In addition, steps S896 to S901 may be executed every predetermined number of winning attempts or every predetermined time without comparing the number of out balls (out ball number buffer value + winning ball number buffer value) with threshold value Th2.

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

Then, a base notification command is generated (step S908) and the base is notified to the player and hall employees.

In the base calculation and display process shown in Figure 56, the base value is calculated every time, even if the total number of winning balls or the total number of out balls is not updated. In other words, if the total number of winning balls and the total number of out balls are not updated, the same value is calculated as the base value, and the base value remains the same. On the other hand, if the total number of winning balls or the total number of out balls is updated, the base value is updated to a different value.

As described above, in the pachinko machine of this embodiment, the number of out balls is calculated by adding the number of winning balls to the number of balls that pass through the out port, so the number of out balls can be counted accurately and the base value can be calculated accurately. Furthermore, by checking the base value during the manufacturing and inspection processes of the gaming machine, it can be confirmed whether the winning port switch, base display 1317, and the process of calculating the base value are normal.

[9-6. Base Abnormality Notification]
The process described above is for generating a command for notifying the calculated base value. Next, a process for determining whether the base value is abnormal and notifying the abnormality will be described.
- Figure 57: Calculates the base value every timer interrupt period - Figure 58: Calculates the base value for each specified number of prize balls and each specified number of out balls.Note that we will not explain the patterns for calculating the base value for each specified number of prize balls and each specified number of out balls, but these can be realized by combining Figures 57 and 58.

Figure 57 is a flowchart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 57, the base value is calculated every time (every timer interrupt period).

First, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

Then, it is determined whether the calculated base value is abnormal (step S907). An abnormality in the base value occurs, for example, when the calculated base value becomes larger or smaller than a specified tolerance range from the design value (normal value). Note that multiple tolerance levels may be set and the degree of abnormality may be determined in multiple levels depending on the degree of deviation of the base value. If the base value is abnormal, a base notification command is generated (step S908) to notify the player and hall staff of the base. On the other hand, if the base value is not abnormal, the base calculation and display process is terminated. The method of notifying an abnormality in the base can be the same as that of the base notification described above.

For example, one of the methods described below may be used, or two or more may be combined. Specifically, an abnormality in the base value may be notified using the base display (7-segment LED) 1317, the liquid crystal display device 1600, 3114, 244, etc. By notifying the player of an abnormality in the base value, the player may be able to confirm the abnormality in the pachinko machine. The calculated base value may be displayed as a percentage on the aforementioned display device or display device to notify the abnormality in the base value. Note that the decimal point may be rounded down, rounded up, or rounded up, and in a display device capable of displaying images such as the liquid crystal display device 1600, 3114, 244, it may be displayed to one decimal place to provide more detailed information.

In addition, when the base value is displayed on the liquid crystal display device 1600, 3114, 244, if the base value is abnormal, the display mode may be changed. For example, the numerical value may be displayed by blinking or changing the color (e.g., green when normal and red when abnormal). Furthermore, the display mode of the base value may be changed in multiple stages. Specifically, the displayed base value may be divided into multiple stages, such as 30% or more, 25% or more but less than 30%, 20% or more but less than 25%, 15% or more but less than 20%, 10% or more but less than 15%, and less than 10%, and each stage may be displayed with a different light color, such as white, blue, or yellow.

In addition, various lamps, liquid crystal displays, sounds, etc. may be used to indicate the range of the base value (whether the base value is high or low, whether it is an abnormal value or a normal value, etc.). Abnormalities in the base value may be indicated by the functional display unit 1400. Information about the base abnormality may also be output from the external terminal board 784 to a hall computer installed in the gaming center.

The base calculation and display process shown in FIG. 57 may be used in combination with a base calculation area update process, for example, as shown in FIG. 50 and FIG. 55, which updates the total number of prize balls and the total number of out balls when the number of prize balls and the number of out balls meet certain conditions.

Figure 58 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 58, the base value is updated when either the number of winning balls or the number of out balls meets a predetermined condition. Note that in Figure 58, the same step numbers are used for the same parts as in the base calculation and display process described above, and detailed explanations are omitted.

First, it is determined whether the number of prize balls stored in the prize ball count buffer is equal to or greater than a predetermined threshold value Th1 (step S890). If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to update the total number of prize balls, so proceed to step S895. On the other hand, if the prize ball count buffer value is equal to or greater than the threshold value Th1, the threshold value Th1 is added to the total number of prize balls (step S891), and the threshold value Th1 is subtracted from the prize ball count buffer (step S892). Then, the out ball count buffer value is added to the total number of out balls (step S893), and the out ball count buffer is set to 0 (step S894). Note that steps S891 to S894 may be executed after each predetermined number of winnings or at predetermined time intervals, without comparing the prize ball count buffer value with the threshold value Th1.

Then, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S895). If the out ball count buffer value is smaller than the threshold value Th2, it is not time to update the total number of out balls, so proceed to step S902. On the other hand, if the out ball count buffer value is equal to or greater than the threshold value Th2, the prize ball count buffer value is added to the total number of prize balls (step S897), and the prize ball count buffer is set to 0 (step S898). Then, the threshold value Th2 is added to the total number of out balls (step S899), and the threshold value Th2 is subtracted from the out ball count buffer (step S900).

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

Then, it is determined whether the calculated base value is abnormal (step S907). An abnormality in the base value occurs, for example, when the calculated base value becomes larger or smaller than a predetermined tolerance range from the design value (normal value). Note that multiple tolerance levels may be set and the degree of abnormality may be determined in multiple stages depending on the degree of deviation of the base value. If the base value is abnormal, a base notification command is generated (step S908) to notify the player and hall staff of the base. On the other hand, if the base value is not abnormal, the base calculation and display process is terminated.

In the base calculation and display process shown in Figure 58, the base value is calculated every time, even if the total number of winning balls or the total number of out balls is not updated. In other words, if the total number of winning balls and the total number of out balls are not updated, the same value is calculated as the base value, and the base value remains the same. On the other hand, if the total number of winning balls or the total number of out balls is updated, the base value is updated to a different value.

The base calculation and display process shown in FIG. 58 may be used in combination with a base calculation area update process that directly updates the total number of prize balls and the total number of out balls using the acquired number of prize balls and number of out balls, as shown in, for example, FIG. 39 and FIG. 54.

As explained above, in the pachinko machine of this embodiment, if the calculated base value is abnormal, the abnormality is reported, so the player can know the state of the gaming machine, and hall employees can be made aware of the possibility of fraudulent operation of the gaming machine. In addition, it is possible to detect and report abnormalities in the gaming machine that cannot be found by conventional error detection.

[9-7. Notification of base change]
Next, an embodiment of a gaming machine that notifies a change in a calculated base value will be described.

The base value calculated by a pachinko machine will naturally go up and down. Because the base value indicates the condition of the gaming machine, players are concerned about the base value itself as well as any changes to the base value while playing. For this reason, it is desirable for players to be notified of changes in the base value. When a display appears that serves as a guide for whether the base value is up or down, players can play with peace of mind.

Figure 59 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 59, the history of calculated base values is recorded in order to compare the current base value with the history of past base values. Note that in Figure 59, the same step numbers are used for the same parts as in the base calculation and display process described above, and detailed explanations thereof are omitted.

First, it is determined whether the number of prize balls stored in the prize ball count buffer is equal to or greater than a predetermined threshold value Th1 (step S890). If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to update the total number of prize balls, so proceed to step S895. On the other hand, if the prize ball count buffer value is equal to or greater than the threshold value Th1, the threshold value Th1 is added to the total number of prize balls (step S891), and the threshold value Th1 is subtracted from the prize ball count buffer (step S892). Then, the out ball count buffer value is added to the total number of out balls (step S893), and the out ball count buffer is set to 0 (step S894). Note that steps S891 to S894 may be executed after each predetermined number of winnings or at predetermined time intervals, without comparing the prize ball count buffer value with the threshold value Th1.

Then, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S895). If the out ball count buffer value is smaller than the threshold value Th2, it is not time to update the total number of out balls, so proceed to step S902. On the other hand, if the out ball count buffer value is equal to or greater than the threshold value Th2, the prize ball count buffer value is added to the total number of prize balls (step S897), and the prize ball count buffer is set to 0 (step S898). Then, the threshold value Th2 is added to the total number of out balls (step S899), and the threshold value Th2 is subtracted from the out ball count buffer (step S900).

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

Then, it is determined whether the base value management timer has timed out (step S904). If the base value management timer has not timed out, it is not time to store the base value in the base history, and the base calculation and display process is terminated. On the other hand, if the base value management timer has timed out, the base value is stored in the base history (step S905), and the base value management timer is reset (step S906).

The base value management timer is a timer used to record the base value every predetermined time (e.g., 10 minutes), and stores the current base value in the base history every time the base value management timer times out. The base history is stored in the base calculation area 13128. Only one base history may be stored in the base calculation area 13128, or multiple base histories may be stored in the base calculation area 13128. When multiple base histories are stored in the base calculation area 13128, a ring buffer may be configured in the base calculation area 13128, and base values may be stored, for example, for a predetermined time x 10. Also, as shown in FIG. 52, a ring buffer of the total number of winning balls and the total number of out balls may be configured in the base calculation area 13128, and the number of winning balls and the total number of out balls may be stored, for example, for a predetermined time x n, and the base value may be calculated as needed.

Then, a base notification command is generated (step S908) and the base is notified to the player and hall employees.

Figure 63 is a flowchart showing an example of the display selection process. The display selection process is called from the display data creation process (step S1030) of the peripheral control unit power-on process ( Figure 60 ).

First, the MPU of the peripheral control unit 1511 selects a specific base history (e.g., the most recent past base value) stored in the base calculation area 13128, and determines whether the selected base history value is smaller than the current base value (step S10301). If the selected base history value is smaller than the current base value, the MPU refers to the base drop duration measurement timer and determines whether a predetermined time (e.g., 30 seconds) has passed since the base value began to drop (step S10302). If the predetermined time has not passed since the base started to drop, the MPU selects a performance table in which the base is currently dropping (step S10303). On the other hand, if the predetermined time has passed since the base started to drop, the MPU selects a performance table in which the base is currently dropping (step S10304).

On the other hand, if the selected base history value is not smaller than the current base value (is equal to or greater than the current base value), the base drop duration measurement timer is reset (step S10305), and the display selection table for when the base is rising is selected (step S10306).

In the display selection process described above, in step S10301, it is determined whether the current base value is smaller than the base history value, but the current base value may be compared with the base history value to determine whether they are larger, equal, or smaller. The base value is generally a decimal value since it is calculated by division. For this reason, it is advisable to determine whether the base history value and the current base value are equal taking into account a predetermined tolerance range (e.g., 3%).

Figures 64 to 68 are diagrams showing examples of display selection tables. These display selection tables are used to select the presentation of the special symbol change display game based on a random number selected upon winning at the starting gate (or before the start of the special symbol change display game). Display selection table 1 shown in Figures 64 to 66 is selected when the base value is increasing or there is no change in the base value, and display selection tables 2 and 3 shown in Figures 67 and 68 are selected when the base value is decreasing. In particular, display selection table 3 shown in Figure 68 is selected after a predetermined time (e.g., 30 seconds) has elapsed since the base value began to decrease.

Each display selection table contains the following fields: effect number, effect content, change time, remarks, and allocation. The effect number is an identifier that uniquely identifies the effect selected in the display selection table. The effect content is the name of the effect. The change time is the time from when the change in the special pattern due to the effect starts to when it ends. The remarks are information written to allow the designer to understand the outline of the effect. Allocation is the probability that the effect will be selected, and is defined as the numerator with 65536 as the denominator.

Display selection table 1 (Miss) shown in FIG. 64 is selected when the result of the jackpot lottery is a miss and the base value is rising or has not changed. Display selection table 1 (Win 1) shown in FIG. 65 is selected when the result of the jackpot lottery is a normal jackpot that does not result in a high probability state and the base value is rising or has not changed. Display selection table 1 (Win 2) shown in FIG. 66 is selected when the result of the jackpot lottery is a high probability jackpot that results in a high probability state and the base value is rising or has not changed.

Display selection table 2 shown in FIG. 67 is selected while the base value is decreasing. Display selection table 3 shown in FIG. 68 is selected when the base value is still decreasing even after a predetermined time (e.g., 30 seconds) has elapsed since the base value began to decrease.

As shown in the figure, display selection tables 2 and 3 include freeze effects 1 and 2, which are effects in which the patterns do not change, and there is a high probability that the freeze effect will be selected. The freeze effect is displayed when a predetermined time (e.g., 5 seconds) has elapsed after the effect has been determined.

In addition, if the base value is still decreasing after a predetermined time (e.g., 30 seconds) has elapsed since the base value began to decrease, a presentation may be selected using display selection table 3, and the display may be switched to the selected presentation.

In addition, whether or not to display a specific effect notifying the player of a change in the base value may be determined according to the game state (game situation). This is because constantly notifying the player of changes in the base value may distract the player from the effects of the special symbol change display game, which is the original enjoyment of the pachinko machine, and the player's attention may become distracted.

For example, when the special symbol change display game is in progress (a gaming situation in which the result of the jackpot lottery is not being shown), the presentation of the special symbol change display game is executed as a priority, and when the base value is not changing, a specific presentation (a presentation that serves as an indication of the change in the base value) is displayed when the base value increases or decreases.

The specific effect should be displayed when a specified period of time has passed during which the special symbol change display game has not been executed. If the specific effect is displayed immediately after the special symbol change display game ends, the player will feel tense and fatigue will accumulate. If the game ball enters the starting hole while the specific effect is being displayed, the display of the specific effect is stopped and the special symbol change display game effect is executed. This is because the entry into the starting hole triggers a jackpot lottery and the special symbol change display game begins, so it is better to have the player focus on the special symbol change display game.

The specific effect may be displayed even when the number of winning balls has not reached a predetermined number (threshold Th1) or when the number of out balls has not reached a predetermined number (threshold Th2). The specific effect may be displayed according to the results of a lottery, but may also be executed whenever the same conditions are met.

In addition, it is advisable to display the specific effect only when the base value is decreasing, and not when the base value is increasing. This is because notifying a player that the base value is increasing raises the player's expectations, and if the base value does not increase to the extent the player expected, the player may become disappointed due to the gap between their expectations and the actual result. On the other hand, notifying a player that the base value is decreasing may increase some players' competitive spirit in an attempt to increase the base value.

In addition, in this embodiment, the display selection table is different for when the base value is decreasing and when it is not (rising, steady), but the display selection table may be defined to separate the base value into three states: when the base value is decreasing, steady, and rising, and the player may be notified when the base is rising. In this case, it is advisable to determine whether the base value is steady (whether the base history value and the current base value are equal) taking into account a predetermined tolerance range (e.g., 3%).

The specific effect may also be displayed during a special symbol change display game. In this case, the base value is more likely to decrease when the effect is displayed outside of the special symbol change display game than when the effect is displayed during the special symbol change display game.

When the game ball does not enter the starting hole and the special symbol change display game is not played, the base value usually decreases. Also, if the special symbol change display game is not played for a specified period of time, a demo screen is displayed on the main LCD display device 1600.

Figure 69 shows an example of the display screen of a pachinko machine in this embodiment.

Figure 69 (A) is a display example of a normal reach, where the left and right symbols have stopped at 7, and the middle symbol is changing. Figure 69 (B) is a display example of a special reach 1, where the left and right symbols displayed in the upper left of the screen have stopped at 7, and the middle symbol is changing. In the center of the screen, the player and the opponent are playing rock-paper-scissors, and the middle symbol is determined by the outcome of the game. Figure 69 (C) is a display example of a special reach 2, where the left and right symbols displayed in the upper left of the screen have stopped at 7, and the middle symbol is changing. In the center of the screen, the player and the opponent are playing rock-paper-scissors, and the middle symbol is determined by the outcome of the game.

Figure 69 (D) is a display example of freeze effect 1, in which the stopped decorative pattern is displayed in the center of the screen, and a display that allows the user to recognize the decrease in base value is displayed in a position that does not interfere with the recognition of the decorative pattern (for example, the bottom right of the screen). Figure 69 (E) is a display example of freeze effect 2, in which the stopped decorative pattern is displayed in the center of the screen, and a display that allows the user to recognize the continued decrease in base value is displayed in a position that does not interfere with the recognition of the decorative pattern (for example, the bottom of the screen). In a freeze effect, the display indicating the decrease in base value may be displayed in any position that does not interfere with the recognition of the decorative pattern. The display indicating the decrease in base value may also be displayed in a position that overlaps with the decorative pattern. For example, it may be a display that pops up in the center of the display screen.

Although an example of displaying the degree of change in the base value on the main LCD display device 1600 has been described above, the lighting state of the decorative lamps may be changed. Also, the change in the base value may be displayed numerically, rather than the up and down trend of the base value.

The displayed change in base value may be the result of a comparison between the base value calculated in a time interval a predetermined time ago and the base value calculated in the current time interval, or the result of a comparison between the total cumulative base value calculated in a predetermined time ago and the total cumulative base value of the latest time.

[9-8. Calculation of the base taking into account specific general winning slots]
Next, a process for accurately calculating the base value taking into account winnings at specific general winning slots will be described.

In pachinko machines, the player adjusts the strength of the game ball's launch, aiming for a prize in a specific prize hole (for example, large prize holes 2005, 2006 that are open) that is in a state where the game ball is more likely to win during a jackpot. Even during a jackpot, there are variations in the game, such as aiming for the large prize hole 2005 by launching the game ball at the same spot as a so-called normal shot, or aiming for the large prize hole 2006 by a so-called right shot with the shot strength maximized. Among these variations, the game board is sometimes designed to place the start hole and general prize hole downstream of the large prize hole and pick up balls that have spilled from the large prize hole.

Here, the downstream (lower part) of a pachinko machine that allows a player to hit to the right during a jackpot will be described in detail. During a jackpot, the player hits to the right in order to make the game ball enter the open big prize opening 2006. Most of the game balls shot toward the game area enter the open big prize opening 2006. As described above, the pachinko machine of this embodiment has a general prize opening 2001 on the right side of the big prize opening 2005 as shown in FIG. 10 and FIG. 16, and when a game ball hit to the right does not enter the open big prize opening 2006, the game ball enters this general prize opening 2001. In other words, the general prize opening 2001 on the right side of the big prize opening 2005 can be said to enter only when a game ball hit to the right does not enter the open big prize opening 2006.

The base value indicates the number of prize balls paid out as a result of winning at the starting hole and the general winning hole when 100 game balls are fired into the game area 5a (i.e., the ratio of the number of prize balls paid out to the 100 out balls). Therefore, if game balls that enter the game area but have a low chance of winning at the starting hole and the general winning hole (have a high chance of winning at the large winning hole) are counted as the number of fired balls (number of out balls), it is expected that the calculated base value will deviate from the actual base value.

For this reason, in this embodiment, the general prize opening 2001 to the right of the big prize opening 2005 is defined as a specific general prize opening, and the number of balls that enter that specific general prize opening during the special prize is excluded from the number of balls that go out to calculate the base value.

The timing of calculation of the base value in each variation of a gaming machine that calculates the base value taking into account a specific general winning port is outlined below.
- Figures 70 and 40: Calculate the base value every timer interrupt period - Figures 71 and 72: Calculate the base value for each specified number of prize balls and each specified number of out balls.Note that we will not explain the patterns for calculating the base value for each specified number of prize balls and each specified number of out balls, but these can be realized by combining Figures 70 to 72.

Figure 70 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 70 obtains the number of prize balls, the number of out balls, and the number of specific winning balls in order to calculate a base value using the number of out balls corrected by the number of winning balls into a specific general winning port for each timer interrupt period. Note that in Figure 70, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and the obtained number of prize balls is added to the total number of prize balls (step S814). That is, in the base calculation area update process shown in FIG. 70, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated. Note that it is possible to determine whether there are any prize balls, and if there are no prize balls, to skip the process of updating the total number of prize balls.

Then, the number of out balls is obtained (step S818), and the number of winning balls at a specific general winning port (specific winning balls) is obtained (step S820). The value obtained by subtracting the specific winning balls from the number of out balls is then added to the total number of out balls (step S822). That is, in the base calculation area update process shown in FIG. 70, the total number of out balls used to calculate the base value is updated each time an out ball or winning ball is detected.

As in steps S815 to S817 of the base calculation area update process (Figure 46) described above, it may be determined whether there is an abnormality in the number of prize balls, and if there is an abnormality in the number of prize balls, an abnormality notification command may be generated and the prize ball abnormality notification timer may be reset. Furthermore, as in steps S824 to S825 of Figure 46, it may be determined whether the prize ball abnormality notification timer has timed out, and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command may be generated and the prize ball abnormality notification may be stopped.

After recording the total number of winning balls and the total number of out balls in the base calculation area update process shown in Figure 70, the base value can be calculated using the base calculation and display process shown in Figure 40.

Figure 71 is a flowchart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 71 records the number of prize balls in the prize ball number buffer and the number of out balls in the out ball number buffer in order to calculate the base value at the time when the number of prize balls and the number of out balls satisfy a specified condition. Note that in Figure 71, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in progress can be the same as those described in FIG. 39. Then, the number of prize balls other than those in the special prize state is obtained (step S811), and it is determined whether there are any prize balls (step S812). Then, if there are any prize balls, the obtained number of prize balls is added to the prize ball number buffer (step S813).

Then, it is determined whether there is an abnormality in the number of prize balls (step S815), and if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the timer for notifying abnormality in prize balls is reset (step S817).

Then, the number of out balls is obtained (step S818), and the obtained number of out balls is added to the out ball number buffer (step S819). Then, the number of winning balls is obtained, and it is determined whether the winning slot related to the obtained number of winning balls is a specific general winning slot, and the number of winning balls at the specific general winning slot is obtained (step S820). Then, the obtained number of winning balls at the specific general winning slot is added to the specific winning ball number buffer (step S823).

Then, it is determined whether the prize ball abnormality notification timer has timed out (step S824), and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825).

Figure 72 is a flow chart showing another example of the base calculation and display process (step S89). In the base calculation and display process shown in Figure 72, the base value is calculated taking into account the specific winning ball count recorded in the specific winning ball count buffer. Note that in Figure 72, the same step numbers are used for the same parts as in the base calculation and display process described above, and detailed explanations are omitted.

First, it is determined whether the number of prize balls stored in the prize ball count buffer is equal to or greater than a predetermined threshold value Th1 (step S890). If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to update the total number of prize balls, so proceed to step S895. On the other hand, if the prize ball count buffer value is equal to or greater than the threshold value Th1, the threshold value Th1 is added to the total number of prize balls (step S891), and the threshold value Th1 is subtracted from the prize ball count buffer (step S892). Then, the out ball count buffer value is added to the total number of out balls (step S893), and the out ball count buffer is set to 0 (step S894). Note that steps S891 to S894 may be executed after each predetermined number of winning attempts or at predetermined time intervals, without comparing the prize ball count buffer value with the threshold value Th1.

After that, it is determined whether the sum of the number of balls passing through the out port stored in the out ball number buffer and the number of winning balls stored in the winning ball number buffer is equal to or greater than a predetermined threshold value Th2 (step S895). The sum of the number of balls passing through the out port and the number of winning balls is the number of game balls that have flowed into the game area, which is the number of out balls. If the result of the determination is that the calculated number of out balls is smaller than the threshold value Th2, it is not time to update the total number of out balls, so proceed to step S902. On the other hand, if the calculated number of out balls is equal to or greater than the threshold value Th2, the prize ball number buffer value is added to the total number of winning balls (step S897), and the prize ball number buffer is set to 0 (step S898). Then, the specific winning ball number is subtracted from the total number of out balls, and the threshold value Th2 is added (step S899), the winning ball number buffer is set to 0, and the threshold value Th2 is subtracted from the out ball number buffer (step S900).

After that, it is determined whether the total number of out balls is 0 (step S902). If the total number of out balls is 0, the base value cannot be calculated, and the base calculation and display process is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls is divided by the total number of out balls to calculate the base value (step S903). Specifically, the total number of prize balls is multiplied by a predetermined number (for example, 100) and stored in division input register A131216, and the total number of out balls is stored in division input register B131217. Then, after 32 clocks have elapsed, the quotient is read from division result register A131218 and used as the base value. Note that if the total number of out balls is 0, even if the base value is calculated, the return value from the calculation circuit 13121 is an error, so it is not necessary to store it in the base calculation area 13128. In this case, the base value displayed on the base display 1317 is not updated.

Then, it is determined whether the calculated base value is abnormal (step S907). An abnormality in the base value occurs, for example, when the calculated base value becomes larger or smaller than a predetermined tolerance range from the design value (normal value). Note that multiple tolerance levels may be set and the degree of abnormality may be determined in multiple stages depending on the degree of deviation of the base value. If the base value is abnormal, a base notification command is generated (step S908) to notify the player and hall staff of the base. On the other hand, if the base value is not abnormal, the base calculation and display process is terminated.

In the base calculation/display process shown in FIG. 72, the base value is calculated every time, even if the total number of prize balls or the total number of out balls is not updated. In other words, if the total number of prize balls and the total number of out balls are not updated, the same value is calculated as the base value and the base value remains the same, and if the total number of prize balls or the total number of out balls is updated, the base value is updated to a different value. Note that the base value may be calculated when either the total number of prize balls or the total number of out balls is updated, or when both are updated.

In addition, in the pachinko machine of this embodiment, the base value is calculated by excluding game balls that have entered the game area but have a low probability of winning in the start hole or general winning hole, so that an accurate base value that is less likely to deviate from the actual base value can be calculated.

In addition, the above description was given of a pachinko machine in which the player hits the ball from the right during a jackpot, and in which the general prize hole 2001 is located downstream of the large prize hole 2006. However, the invention of this embodiment can also be applied to pachinko machines in which the player hits the ball normally during a jackpot, aiming for the large prize hole 2005, and to gaming machines in which the starting hole or general prize hole is located downstream of the large prize hole 2005.

In addition, the game area 5a is provided with the large prize openings 2005 and 2006, which do not normally accept game balls but can accept game balls depending on the result of the large prize lottery. The prize balls that enter the large prize openings 2005 and 2006 may be excluded from the calculation of the base value. In this case, the period from when the game ball enters the start openings 2002 and 2004 and the special pattern variation display game starts, when the special pattern is determined and the large prize openings 2005 and 2006 open (large prize opening), to when the large prize openings 2005 and 2006 close and the next special pattern variation display game starts (large prize ending) is considered to be in the special prize period, and the detected out balls are excluded from the number of out balls. In this way, the number of prize balls and the number of out balls during the special prize period can be counted without determining whether or not the special prize period is in progress in step S810 of FIG. 39 or the like. In addition, when the large prize openings 2005 and 2006 are repeatedly opened and closed in one big win, the time between the closing of the large prize openings 2005 and 2006 and the next opening (closing interval) may be included in the special prize. In other words, the special prize means that the condition device is operating, for example, from the confirmation of the big win pattern in the special pattern variation display game to the end of the ending. It may also include all the time during the right-hit instruction. Furthermore, in the start openings 2002 and 2004, the special prize may include the time during the time reduction, the probability change (ST), and the electric support. Furthermore, in a game state other than the time reduction, the probability change (ST), and the electric support, the time from the opening of the start opening 2004 to a predetermined time after the closing (for example, several seconds required for the ball that entered the start opening to be detected as an out ball) may be included in the special prize.

In addition, the game area 5a is provided with a second start port 2004 that does not normally accept game balls, but can accept game balls depending on the result of the lottery for the normal pattern. The prize balls that enter the second start port 2004 may be excluded from the calculation of the base value. In this case, the period from when the game ball passes through the gate unit 2003 and the lottery for the normal pattern is performed, the normal pattern change display game starts, and the normal pattern is determined and opened (opening) to when the second start port 2004 closes and the next normal pattern change display game starts (ending) is considered to be during the special prize, and the detected out balls are excluded from the number of out balls. Note that, if the second start port 2004 repeatedly opens and closes depending on the result of the lottery for the normal pattern, the time from when the second start port 2004 closes to when it opens again (closing interval) may be included in the special prize. In this way, not only during the time reduction, but all winnings into the second start port 2004 can be excluded from the calculation of the base value.

By doing as described above, it is possible to accurately count the number of winning balls and the number of out balls when a special prize is not being awarded (jackpot, time reduction, etc.) without determining whether or not a special prize is being awarded in step S810 of FIG. 39, etc.

This allows the number of out balls and winning balls while the player is hitting to the right to be accurately excluded, and the base value to be accurately calculated.

In addition, depending on the pachinko machine, it is recommended to play with the left hand when neither a jackpot nor time-saving is occurring (so-called normal state), and to play with the right hand when a jackpot or time-saving is occurring. In such a gaming machine, a general winning hole 2001 and a first starting hole 2002 are provided for winning when a left hand is being hit, and a general winning hole 2001 and a second starting hole 2004 are provided for winning when a right hand is being hit. In such a gaming machine, the winning rate for each winning hole differs depending on the number and arrangement of the winning holes from the left side to the center of the gaming area 5a (the area where the gaming ball rolls when hitting from the left) and the right side of the gaming area 5a (the area where the gaming ball rolls when hitting from the right), as well as the position of the nails. In other words, the base value when hitting from the left is different from the base value when hitting from the right.

The base value of a pachinko machine is set on the assumption that the player will hit with the left hand under normal conditions. However, for the reasons mentioned above, if the base value differs between hitting with the left and hitting with the right hand (for example, if the base value is designed to be lower when hitting with the right hand under normal conditions than when hitting with the left hand), a lower base value will be calculated when the player hits with the right hand under normal conditions.

When a pachinko machine has a low base value, the hall will inspect it, or determine that it is a machine with poor ball-out performance. Even if the machine is determined to have poor ball-out performance (lower than the expected base), the hall will determine that the player is hitting the ball from the left, and will make adjustments to increase the ball-entry rate of the starting hole and general winning hole that affect the base when hitting from the left. Then, the abnormal nails will be adjusted to increase the base value. When hitting the ball from the left with a machine adjusted in this way, many prize balls will be obtained even in normal conditions. In other words, many lotteries can be held for a small amount of money. In other words, even if the base when hitting from the left is not different from what the hall expected, the hall will misunderstand and make adjustments to increase the ball-entry rate of the starting hole and general winning hole that win when hitting from the left. Since the hall may suffer a disadvantage due to such malicious intent of the player, it is necessary to accurately calculate the base value when hitting from the left and the base value when hitting from the right.

Incidentally, in pachinko machines that use right-hand play during time-saving play, the second start hole 2004, which opens and closes depending on the game state, and the gate section 2003 for drawing a normal symbol to open the second start hole 2004, are located in the area where the game ball rolls when the ball is hit from the right. Also, when the game ball passes through the gate section 2003 during right-hand play in normal mode, the normal symbol drawing is performed, but the probability of winning the normal symbol is made extremely low so that the second start hole 2004 does not open, or even if the normal symbol drawing is won, the opening time of the second start hole 2004 is shortened, making it difficult to win the second start hole 2004 in normal mode.

To increase the base value when hitting from the right side in normal conditions, the rate at which balls enter the second starting hole 2004 must be increased. However, since the second starting hole 2004 is generally set to be more advantageous than the first starting hole 2002, increasing the rate at which balls enter the second starting hole 2004 would put pressure on the profits of the hall. Therefore, it is a good idea to count the game balls that pass through the gate section 2003 in normal conditions, and when calculating the base value, calculate a corrected base value using the number of balls that pass through the gate section 2003.

Specifically, the number of game balls that pass through the gate unit 2003 under normal conditions is treated as the specific winning ball number and is subtracted from the number of out balls (the number of game balls shot into the game area 5a). By reducing the number of out balls, a high base calculation value can be obtained. For example, if a considerable number of game balls pass through the gate unit 2003, an extremely high base value will be calculated. The degree of correction processing may be appropriately determined based on the design values (performance) of the gaming machine.

Furthermore, by monitoring the passage of the gate section 2003, when a game ball passes through the gate section 2003 (a condition may be set such as when a predetermined number (e.g., three) game balls pass through the gate section 2003 without entering the starting hole), the number of out balls counted in a predetermined time or number of shots after (or before and after) passing through the gate section 2003 may not be used in calculating the base value. In this way, the base value can be calculated more accurately. When the passage of the gate section 2003 is detected, a display or sound such as "Please return to left hand shot" may be output without actively notifying the player that it will not be reflected in the calculation result of the base value. Also, when the passage of the gate section 2003 is detected, the hall may be notified that a right hand shot is being performed. For example, a specific lamp may be turned on, the lighting state may be changed, or the fact that a right hand shot is being performed may be output from the external terminal board 784 to the hall computer installed in the game center.

As explained above, by excluding the number of balls that pass through the gate portion 2003 located on the right side of the play area 5a (the area where the game ball rolls when hitting from the right) from the number of out balls, the base value when hitting from the right under normal conditions can be corrected to a larger value. This makes it possible to prevent fluctuations in the calculated base value due to the player's playing style.

[9-9. Initialization of base value]
Considering the role of the base value in checking the operating status of the pachinko machine 1, it is desirable that the calculated base value be stored for a long period of time. It is also desirable that the calculated base value cannot be easily erased. For this reason, the base calculation and display data 13136 is erased under conditions different from the erasure conditions for data related to the progress of the game backed up in the RAM 1312 of the main control MPU 1311. This allows accurate data on the number of winning balls to be stored, and accurate ratios of winning devices to be calculated.

Specifically, the base calculation and display data 13136 is not erased by operating the RAM clear switch (first operation), but all data backed up in the RAM 1312 of the main control MPU 1311 can be erased by a second operation that cuts off the backup power supplied to the main control MPU 1311 and cuts off the power supply to the pachinko machine 1. The second operation may be performed by providing a single switch, or an employee of the arcade may remove the connector of the backup power line supplied to the main control board 1310 to cut off the power supply to the pachinko machine 1.

In other words, two operations are provided to erase the RAM 1312 of the main control MPU 1311; the first operation erases only data related to the progress of the game, while the second operation erases all data, including the calculated base value and data related to the progress of the game.

By configuring it in this way, the base calculation and display data 13136 will not be erased by erroneous operation by the amusement center staff, so the reliability of the displayed role ratio is increased and concealment of a high role ratio state can be prevented.

[9-10. Calculation of the base taking into account winning anomalies]
73 and 74 are flowcharts of the base calculation area update process taking into account winning anomalies.

In the pachinko machine 1, in addition to the abnormality in the number of winning balls determined in step S815 described above, there are cases where a winning abnormality is detected. For example, if a winning is detected other than while the large winning openings 2005 and 2006 are open due to a jackpot being derived in the special pattern change display game, or if a winning is detected other than while the starting opening 2004 is open due to a winning being derived in the normal pattern change display game, this is a winning abnormality. In other words, the abnormality in the number of winning balls determined in step S815 is an abnormal operation detected from the number of winning balls, and is mainly when a large number of winning balls are obtained in a specified time. On the other hand, a winning abnormality is an abnormal operation detected from the number of winning balls, and is mainly when a winning is not possible or when a large number of winnings are detected in a specified time.

Since winning balls that are affected by this winning anomaly are counted as out balls, it is desirable to correct this amount to accurately calculate the base. For this reason, in the base calculation area update process that takes winning anomalies into account, the total number of out balls is corrected to subtract the number of winning balls that are affected by the detected winning anomaly.

Note that, since the large prize slots 2005 and 2006 and the starting slot 2004 are usually awarded only during the special prize period, balls that enter these slots are not counted as out balls for calculating the base, and there is no need to consider winning anomalies.

Figure 73 is a flow chart showing an example of the base calculation area update process (step S81). The base calculation area update process determines the current game state, adds the number of prize balls paid out as a game value to the area corresponding to the current game state, and updates the base calculation area 13128 of the main control built-in RAM 1312. In particular, the base calculation area update process shown in Figure 73, like the base calculation area update process shown in Figure 39, directly updates the total number of prize balls using the number of prize balls calculated in the prize ball control process (step S80) (step S814) and directly updates the total number of out balls using the number of out balls (step S822) in order to calculate the base value every time at each timer interrupt period. Note that in Figure 73, the same step numbers are assigned to the same parts as in the base calculation area update process described above, and detailed explanations thereof are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize is being awarded can be the same as those described in FIG. 39.

If the game is in the special prize state, the prize balls are not related to the calculation of the base value, so the number of prize balls and the number of out balls are not updated, and the base calculation area update process is terminated. On the other hand, if the game is not in the special prize state, the number of prize balls calculated based on the input information in the prize ball control process (step S80) is obtained (step S811). The number of prize balls obtained in the base calculation area update process may be the number of prize balls for which the payout has been decided. It may also be the number of prize balls corresponding to the payout command that has already been created. It may also be the number of prize balls corresponding to the payout command that has already been sent. It may also be the number of prize balls corresponding to the payout command that the main control board 1310 sent to the payout control board 951 and received an acknowledgement of receipt (ACK) from the payout control board 951. It may also be the number of prize balls (number of paid out prize balls) that the main control board 1310 sent to the payout control board 951 and received a payout completion report from the payout control board 951. This variation has already been explained using Figures 41 to 44.

Then, the number of prize balls acquired is added to the total number of prize balls to update the total number of prize balls (step S814). It is to be noted that it is possible to determine whether there are prize balls, and if there are no prize balls, the process of updating the total number of prize balls may be skipped. Even if a game ball enters the start port 2002 or 2004, but the reserved number is the upper limit, and the entry into the start port is not reserved, the prize balls are paid out, so the total number of prize balls is updated. Also, in a game state in which a game ball enters a winning port but no prize balls are generated (for example, when a specific error occurs), no prize balls are generated due to the entry, and the number of prize balls acquired is 0, so the total number of prize balls is not updated. The total number of prize balls is recorded in the total number of prize balls storage area (see FIG. 52) provided in the base calculation area 13128 of the main control built-in RAM 1312. That is, in the base calculation area update process shown in FIG. 73, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated.

Then, the number of balls out is obtained (step S818). Then, it is determined whether a winning abnormality has been detected (step S826). Then, the number of game balls corresponding to the winning determined to be abnormal is obtained (step S827). Specifically, as described above, if a winning is detected in the large winning holes 2005 and 2006 other than during a special prize (condition device is operating) that occurs when a big win is derived in the special pattern change display game, or if a winning is detected in the start hole 2004 even though it is not open due to a win being derived in the normal pattern change display game, it is determined that a winning abnormality has occurred.

A winning abnormality may be determined when one winning ball related to the winning abnormality is detected, or when a predetermined number of winning balls related to the winning abnormality are detected. A winning abnormality may also be determined when a predetermined number of winning balls related to the winning abnormality are detected consecutively, or when a predetermined number of winning balls related to the winning abnormality are detected within a predetermined time.

Then, the total number of out balls is updated so that the acquired number of out balls is added to the total number of out balls (step S822). As described above, the number of out balls is detected by the launched ball sensor 1020 and the discharged ball sensor 3060, and the detection signals of these sensors are read and acquired in the switch input process of step S74. At this time, the value obtained by subtracting the number of winning balls related to winning abnormalities from the acquired number of out balls may be added to the total number of out balls, or the number of winning balls related to winning abnormalities may be subtracted from the total number of out balls after adding the acquired number of out balls to the total number of out balls. The total number of out balls is recorded in the total number of out balls storage area (see FIG. 52) provided in the base calculation area 13128 of the main control built-in RAM 1312. That is, in the base calculation area update process shown in FIG. 73, the total number of out balls used to calculate the base value is updated each time an out ball is detected. In this way, the base calculation process is executed for each timer interrupt process to update the total number of balls out, and the base value is calculated and displayed in the base calculation display process (Figure 40), so the base value can be displayed without delay and it can be determined without delay whether the base value is normal or abnormal.

In addition, as in steps S815 to S817 of the base calculation area update process (Figure 74) described later, it may be determined whether there is an abnormality in the number of prize balls, and if there is an abnormality in the number of prize balls, an abnormality notification command may be generated and the prize ball abnormality notification timer may be reset. Furthermore, as in steps S824 to S825, it may be determined whether the prize ball abnormality notification timer has timed out, and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command may be generated and the prize ball abnormality notification may be stopped.

In the pachinko machine 1 of this embodiment, the main control MPU 1311 executes the calculation process of the base value in the timer interrupt process, but the payout control MPU of the payout control unit 952 may execute the calculation process of the base value. In this case, a command to notify the base may be sent from the main control board 1310 to the peripheral control unit 1511 of the peripheral control board 1510, or a command to notify the base may be sent from the payout control unit 952 to the peripheral control unit 1511.

In addition, even if information on both winning balls and out balls at a winning port is obtained in one timer interrupt process, the number of winning balls is added to the total number of winning balls (or the prize ball number buffer in the embodiment described later), and the number of out balls is added to the total number of out balls (or the out ball number buffer in the embodiment described later). In addition, even if information on winning balls at multiple winning ports is obtained in one timer interrupt process, the sum of the number of winning balls from the multiple winning balls is added to the total number of winning balls (or the prize ball number buffer in the embodiment described later). This allows the base value to be accurately calculated and displayed. For example, if winning balls are detected at the winning port sensor of a winning port with five prize balls and at the winning port sensor of a winning port with three prize balls, a total of eight prize balls are added to the total number of winning balls (or the prize ball number buffer).

Also, the number of prize balls may be added to the total number of prize balls (or the number of prize balls buffer) only when the launch of the game ball is detected. In other words, only the number of prize balls related to winning detected within a predetermined time from the detection of the launch ball sensor 1020 may be added to the total number of prize balls (or the number of prize balls buffer). Also, the operation of the launch control unit 953 or the ball launching device 680 may be detected, and only the number of prize balls related to winning detected while the launch control unit 953 or the ball launching device 680 is operating (and further, until a predetermined time (e.g., 5 seconds) after the launch control unit 953 or the ball launching device 680 stops operating) may be added to the total number of prize balls or the number of prize balls buffer. Also, the number of prize balls may be added to the total number of prize balls (or the number of prize balls buffer) only when the player is operating the launch handle. In other words, only the number of prize balls related to winning detected within a predetermined time (e.g., 5 seconds) from the time when it is detected that a hand or finger is touching the contact detection sensor 509 of the handle unit 500 may be added to the total number of prize balls (or the number of prize balls buffer). In this way, it is possible to prevent the base value from being affected by abnormalities such as detecting prize balls when no game balls have been released, or by fraudulent acts, and to prevent the display of an inaccurate base value. In this case, if the contact detection sensor 509 is used, there is no need to install a new sensor to detect the release of game balls, so the cost of the pachinko machine 1 can be prevented from increasing.

Figure 74 is a flow chart showing another example of the base calculation area update process (step S81). The base calculation area update process shown in Figure 74 records the number of out balls in the out ball count buffer in order to calculate the base value when the number of out balls meets a predetermined condition (step S819). Note that in Figure 74, the same step numbers are used for the same parts as in the base calculation area update process described above, and detailed explanations are omitted.

First, it is determined whether the game is in a special prize state (step S810). The criteria for determining whether a special prize state is in a special prize state can be the same as those described in FIG. 39. Then, the number of prize balls other than the special prize state is obtained (step S811), and it is determined whether there are any prize balls (step S812). If the result of the determination in step S812 is that there are no prize balls, the number of prize balls is not updated and the process proceeds to step S818. On the other hand, if there are prize balls, it is determined whether there is an abnormality in the number of prize balls (step S815), and if there is no abnormality in the number of prize balls, the obtained number of prize balls is added to the total number of prize balls (step S814). In other words, in the base calculation area update process shown in FIG. 74, the total number of prize balls used to calculate the base value is updated each time the number of prize balls is calculated.

On the other hand, if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S816), and the timer for prize ball abnormality notification is reset (step S817).

Then, the number of out balls is obtained (step S818). The obtained number of out balls is added to the out ball number buffer (step S819). Then, it is determined whether a winning abnormality has been detected (step S826), and the number of game balls corresponding to the winning determined to be abnormal is obtained (step S827).

Then, it is determined whether the prize ball abnormality notification timer has timed out (step S824), and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S825).

In the base calculation area update process shown in Figures 73 and 74, the out balls are corrected for all winning balls related to the winning abnormality, but it is also possible to correct the out balls for winning balls related to a specific type of winning abnormality and not correct the out balls for winning balls related to other specific types of winning abnormalities. For example, depending on the type of winning ball related to the winning abnormality, prize balls for the winning ball may or may not be paid out. It is preferable that whether prize balls are paid out for this winning abnormality is determined for each winning port. In this case, for winning abnormalities in which prize balls are not paid out, the winning balls should not be counted as total out balls and should not be used in calculating the base value. On the other hand, for winning abnormalities in which prize balls are paid out, the winning balls should be counted as total out balls and the paid out prize balls should also be counted as total prize balls and used in calculating the base value. Note that even for winning abnormalities in which prize balls are paid out, the winning balls should not be counted as total out balls, and the paid out prize balls should not be counted as total prize balls, and should not be used in calculating the base value.

For example, as a result of maintenance of a gaming machine malfunction (clearing a ball jam, etc.), a hall employee may manually put a game ball into the start port to compensate for the balls that are not dispensed so that the player does not lose money. In this case, a prize ball is paid out for a winning entry into that start port. A winning entry into this start port is detected as a winning abnormality, but a prize ball is paid out. When a prize ball is paid out in this way, it should be reflected in the base value, so it is better not to judge it as a winning abnormality. In this case, prize balls are paid out from the winning ports reflected in the calculation of the base value (start ports 2002, 2004) and a winning abnormality is not judged, and a winning abnormality is judged without paying out prize balls from the other winning ports (large winning ports 2005, 2006). A winning port that is judged to be a winning abnormality pays out fewer prize balls for winning than a winning port that is not judged to be a winning abnormality (3 prize balls for the start port, 15 prize balls for the large winning port). For this reason, winning abnormalities are judged at the large winning port, but even if abnormal winning is not judged at the starting port, it does not become a major security hole in terms of protection against fraudulent activities. In this way, by judging winning abnormalities, it is possible to prevent inconsistencies between out balls and the number of winning balls. In particular, by correcting the number of out balls using the number of winning balls related to winning abnormalities that do not generate prize balls, it is possible to align the number of winning balls with the out balls that cause the prize balls.

As mentioned above, various winning slots can be used to detect winning abnormalities, but we will explain a specific implementation example for a pachinko machine.

First, the general winning port 2001 may not be used to determine whether or not an abnormality has occurred, and instead, a winning abnormality may be determined in a winning port other than the general winning port 2001 (the large winning port 2005, 2006, the starting port 2002, 2004). Since it is difficult for multiple game balls to enter the general winning port at the same time, the security resistance of the gaming machine against fraudulent acts is improved, and balls can be compensated to the player by entering the general winning port 2001 (4 in total), which is provided in greater numbers than the large winning port 2005, 2006 and the starting port 2002 (3 in total), which are electrically operated opening and closing devices. In addition, the general winning port 2001 can be easily identified by the hall's employees, making it easy to perform maintenance of the pachinko machine 1 and operations for ball compensation. The reason why the hall employees can easily identify the general winning openings 2001 is that the general winning openings 2001 are often arranged together (in separate areas) in the game area, and the decorative materials (appearance) are different from the electric devices (large winning openings 2005, 2006, starting openings 2002, 2004). Also, if the number of winning balls per winning ball at a general winning opening is small, this has the effect of improving the security resistance of the gaming machine against fraudulent activities. Note that it is also possible to determine a winning abnormality not only at a specific general winning opening (for example, the leftmost one), but at other general winning openings.

Also, it is possible not to judge whether there is a winning abnormality in the large prize winning ports 2005 and 2006, which have a large number of winning balls, but to judge whether there is a winning abnormality in the winning ports other than the large prize winning ports 2005 and 2006 (the general prize winning port 2001, the starter port 2002, and 2004, which have a small number of winning balls). Since the large prize winning ports have a large number of winning balls per winning ball, the base value changes significantly even with a small number of winning balls. This is convenient because it is easy to check the change in the base value when inspecting the pachinko machine. It is also possible not to judge whether there is a winning abnormality only in a specific large prize winning port (for example, the large prize winning port 2005, which is easy to insert game balls by hand), but to judge whether there is a winning abnormality in other large prize winning ports (for example, 2006).

Also, it is possible not to judge whether there is a winning abnormality at the start ports 2002 and 2004, but to judge whether there is a winning abnormality at the other start ports (general win port 2001, large win port 2005, 2006). Since the number of winning balls per winning ball is smaller at the start port than at the large win port, it is possible to improve the security resistance of the gaming machine against cheating while compensating the player for winning balls. It is also possible not to judge whether there is a winning abnormality at only a specific start port (for example, the start port 2002 located in the center of the gaming board, which is easy to find), but to judge whether there is a winning abnormality at the other start ports 2004.

Furthermore, for the large prize opening and the starting opening, the opening and closing member of the prize opening is in a position visible from the front of the pachinko machine, i.e., the opening and closing member is easy for the hall employee to operate, so it is possible not to judge the winning abnormality, but to judge the winning abnormality for the prize opening that is in a position that cannot be seen from the front of the pachinko machine, i.e., the opening and closing member is difficult for the hall employee to operate. For example, the opening and closing member that is vertical in the closed state is tilted to an oblique position, so that the opening and closing member picks up the game balls (so-called electric tulip) is easy for the hall employee to operate. On the other hand, the winning opening is blocked by a flat member in the closed state, and the opening to the winning opening is opened by the flat member retracting to the back (so-called tongue kiss) is difficult for the hall employee to operate. In this way, the security level is relaxed only for the winning opening used to compensate the player for winning balls, which is easy for the hall employee to understand and improves the security resistance of the game machine.

In addition, a detected winning abnormality may be notified. The method of notifying a winning abnormality may be the same as the method of notifying an abnormality in the number of winning balls described above (for example, outputting a security signal to an external terminal board, displaying a warning on a display device such as an LCD, lighting or blinking decorative lamps on the game board or frame, outputting voice, sound effects, or warning sounds, etc.), but it is preferable to notify a winning abnormality in a less strict manner than other abnormalities. Specifically, the abnormality notification time may be short, the letters notifying the abnormality may be small, a lamp may not be lit when an abnormality is notified, or the abnormality notification sound may be lower in volume (suppressed) than the notification sounds for other abnormalities.

In addition, when announcing a winning abnormality, the abnormality is notified for a predetermined time after the winning abnormality is detected, and even if another winning abnormality is detected during the predetermined time, the predetermined time is not extended, but the notification is terminated at the initially set predetermined time or the notification mode is changed. In this way, if a winning abnormality occurs continuously for a predetermined time (for example, several minutes), it can be determined that the hall is performing maintenance on the gaming machine, rather than that the player is cheating. For this reason, if the winning abnormality is notified for a predetermined time and the notification is not continued thereafter, the maintenance work of the gaming machine by the hall is not hindered, and the work efficiency can be improved. In addition, by changing the notification mode after the predetermined time, it is possible to know that the maintenance work of the gaming machine is being continued correctly without hindering it. Specifically, the notification by the display device or lamp continues, but the notification by sound is stopped (or the volume is reduced).

In summary, the gaming machine of this embodiment has a correction means for correcting the number of out balls based on the number of winning balls, and the correction means divides the multiple winning ports into multiple types (starting port, large winning port), and for the first type of winning port, corrects the number of out balls based on winning balls detected other than when a specified condition is met (during a special prize), and for the second type of winning port, does not correct the number of out balls based on winning balls detected other than when a specified condition is met (during a special prize). As described above, this prevents discrepancies in the number of out balls when compensating players due to maintenance of the gaming machine, and allows the number of out balls to be calculated accurately. In addition, an abnormal base value may be calculated due to a malfunction of the gaming machine, and the base value can be adjusted as an adjustment (maintenance). This allows accurate base values to be calculated and displayed.

So far, we have explained how to detect winning anomalies and exceptional cases in which the detection of winning anomalies is not detected (when no detection is performed). However, since game balls that are determined to have winning anomalies are not prize balls obtained during play, but are likely to be used for the maintenance of the pachinko machine (adjusting the base value), it is desirable that winning balls that are determined to have winning anomalies are not reflected in the number of out balls and are not used to calculate the base value.

In addition, a winning abnormality detected in the base calculation area update process shown in Figures 73 and 74 may be reported. For example, in the fraud detection process of the timer interrupt process (step S84), a winning abnormality display command is created as an abnormal state when the winning abnormality is detected, and is transmitted in the peripheral control board command transmission process (step S92). This winning abnormality may be reported when one winning ball related to the winning abnormality is detected, or when a predetermined number of winning balls related to the winning abnormality are detected. In addition, a winning abnormality may be reported when a predetermined number of winning balls related to the winning abnormality are detected consecutively, or when a predetermined number of winning balls related to the winning abnormality are detected within a predetermined time.

Furthermore, the notification of the winning abnormality may end after a predetermined time has elapsed, or may end the next time the winning opening is opened (the condition device is activated).

Note that it is not necessary to report winning abnormalities.

[9-11. Base value calculation process taking advantage of the characteristics of the calculation circuit]
In the pachinko machine 1 of this embodiment, the division process for calculating the base value is performed by the arithmetic circuit 13121, so that the base value can be calculated without interfering with other processes, as opposed to the CPU 13111 executing the division by program. The base calculation process described so far does not take advantage of this characteristic.

In other words, in relation to the calculation of the base value, in the timer interrupt process (Figure 23) described above, in the switch input process (step S74), the detection signals from the discharged ball sensor 3060 and the fired ball sensor 1020 are read to count the number of out balls, and in the prize ball control process (step S80), the number of game balls (prize balls) to be paid out is calculated. After that, in the base calculation area update process (step S98), the number of prize balls and the number of out balls in the base calculation area 13128 are updated.

Then, in the base calculation and display process (step S89), the base value is calculated by referring to the number of winning balls and the number of out balls stored in the base calculation area 13128, and the calculated base value is displayed on the base display 1317.

Timer interrupt processing is executed at specified time intervals, and the specified processing must be completed for each timer interrupt. Therefore, with slow division processing by a program, it is difficult to include time-consuming processing in the timer interrupt processing, i.e., to include multiple base calculation processes in the timer interrupt processing. On the other hand, by performing division processing using the arithmetic circuit 13121, the time required to calculate the base value can be shortened, and the base value can be calculated multiple times in one timer interrupt processing, allowing the base value to be displayed without delay.

In addition, the CPU 13111 is not occupied by the division process from the time when values are written to the division input registers 131216 and 131217 of the arithmetic circuit 13121 until the time when the calculation result is read from the division result register A 131218. In other words, the 32 clock wait time from the input timing of the dividend and divisor to the output timing of the quotient can be effectively utilized, and other processing can be performed during this time. In other words, since the input timing of the dividend and divisor is separate from the output timing of the quotient, the flexibility of the base value calculation process in the timer interrupt process is improved.

Figure 75 is a flowchart showing an example of timer interrupt processing that makes use of the characteristics of an arithmetic circuit. The timer interrupt processing shown in Figure 75 is the same as the timer interrupt processing described above (Figure 23) except for the base calculation processing (steps S97 and S98), so a description of the same processing will be omitted.

When the timer interrupt process starts, the main control MPU 1311 first switches the registers by executing the main control program (step S70).

Next, the main control MPU 1311 executes switch input processing (step S74). In the switch input processing, various signals input to the input terminals of the various input ports of the main control MPU 1311 are read, and stored as input information in the input information storage area of the main control built-in RAM 1312. Specifically, the number of out balls is counted by reading detection signals from sensors that detect winning balls, detection signals from switches that detect fraudulent activity, and detection signals from the ejected ball sensor 3060 and the launched ball sensor 1020.

Then, the main control MPU 1311 executes base calculation process 1 (step S97). In base calculation process 1, the total number of out balls is updated using the number of out balls counted in step S74, and the base value is calculated. Details of base calculation process 1 will be described later with reference to Figures 76 and 78.

Then, the main control MPU 1311 executes a timer update process (step S76) and a random number update process 1 (step S78).

Then, the main control MPU 1311 executes the prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the calculated number is written to the main control internal RAM 1312. In addition, a prize ball command for paying out game balls is created based on the calculation result of the number of prize balls.

Then, the main control MPU 1311 executes base calculation process 2 (step S98). In base calculation process 2, the total number of prize balls is updated using the number of prize balls calculated in step S80, and the base value is calculated. Details of base calculation process 2 will be described later with reference to Figures 77 and 79.

Then, the main control MPU 1311 executes the frame command reception process (step S82), the fraud detection process (step S84), the special symbol and special electric role control process (step S86), and the normal symbol and normal electric role control process (step S88). Next, the main control MPU 1311 executes the output data setting process (step S90) and the peripheral control board command transmission process (step S92). Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). By setting the predetermined value in the watchdog timer clear register WCL, the watchdog timer clear register WCL is cleared. Finally, the main control MPU 1311 switches (returns) the register bank. When the above processes are completed, the timer interrupt process is terminated and the process before the interrupt is returned to.

Figure 76 is a flowchart showing an example of base calculation process 1 (step S97).

First, the main control MPU 1311 judges whether the game state is during a special prize (step S9701). The criteria for judging whether the game state is during a special prize can be the same as those described in FIG. 39. If the game state is during a special prize, the ball is an out ball that is not related to the calculation of the base value, so the base is not calculated and base calculation process 1 is terminated. On the other hand, if the game state is not during a special prize, the number of out balls detected in the switch input process (step S74) is obtained (step S9702), and the total number of out balls is updated so that the obtained number of out balls is added to the total number of out balls (step S9705). Note that if the number of out balls cannot be obtained or the obtained number of out balls is 0, base calculation process 1 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculation of the base value.

After that, it is determined whether the total number of out balls is 0 (step S9707). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 1 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (for example, 100) is stored in division input register A131216 of calculation circuit 13121, and the total number of out balls is stored in division input register B131217 (step S9708). Then, after a predetermined time (32 clocks) has elapsed, the calculation result (total number of prize balls ÷ total number of out balls) is read from division result register A131218 and used as the base value (step S9709).

After that, as in step S908 described above, a base notification command is generated (step S9710) to notify the player or hall employee of the base (base value or abnormality in the base value). When the base value is notified by the display device (liquid crystal display device 1600, 3114, 244) or speaker 921 controlled by the peripheral control unit 1511 or the liquid crystal display control unit 1512, the base notification command is a display command or a sound output command for the peripheral control unit 1511. When the base value is notified by the base display device 1317 or the function display unit 1400 controlled by the main control board 1310, since these display devices are composed of 7-segment LEDs or LED lamps, the base notification command is a drive signal to the LED elements. Specifically, when the 7-segment LED is driven by a driver, the drive signal including the character code set in the driver (character generator in the driver) is the base notification command. When the 7-segment LED is driven directly, the drive signal for turning on each LED element is the base notification command.

Figure 77 is a flowchart showing an example of base calculation process 2 (step S98).

First, the main control MPU 1311 determines whether the game is currently in a special prize state (step S9801). The criteria for determining whether a special prize state is currently in a special prize state can be the same as those described in FIG. 39.

As a result, if the game state is during the special prize period, the base is not calculated and base calculation process 2 is terminated since the prize balls are not related to the calculation of the base value. On the other hand, if the game state is not during the special prize period, the number of prize balls calculated in the prize ball control process (step S80) is obtained (step S9802), and the total number of prize balls is updated so that the obtained number of prize balls is added to the total number of prize balls (step S9809). Note that if the number of prize balls cannot be obtained or the number of prize balls obtained is 0, base calculation process 2 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculations of the base value.

After that, it is determined whether the total number of out balls is 0 (step S9810). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and the base calculation process 2 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (for example, 100) is stored in the division input register A131216 of the calculation circuit 13121, and the total number of out balls is stored in the division input register B131217 (step S9812). Note that if the total number of prize balls is 0, 0 is calculated as the base value, but the base value does not need to be calculated. Furthermore, if the total number of prize balls is greater than the total number of outs, a value of 1 (100%) or more is calculated as the base value, but the base value does not need to be calculated. Then, after a predetermined time (32 clocks) has elapsed, the calculation result (total number of prize balls ÷ total number of out balls) is read from the division result register A131218 and used as the base value (step S9813).

Then, a base notification command is generated (step S9814) and the base is notified to the player and hall employees.

The base calculation process shown in Figures 76 and 77 is executed for each timer interrupt process, so that the base value can be calculated and displayed without delay. Note that base calculation process 1 and base calculation process 2 may be executed in the timer interrupt process for each predetermined time (for example, one minute, which is a longer period than the timer interrupt process) rather than for each timer interrupt process. By not executing the base calculation display process for each timer interrupt process, the amount of calculation required to calculate the base value (for example, the load on the main control MPU 1311) can be reduced compared to when the base value is calculated for each timer interrupt process.

Next, another example of the base calculation process (steps S97, S98) will be described using Figures 78 and 79. The base calculation process shown in Figures 78 and 79 calculates a base value for each predetermined number of out balls and each predetermined number of winning balls.

Figure 78 is a flowchart showing another example of base calculation process 1 (step S97).

First, the main control MPU 1311 judges whether the game state is during a special prize (step S9701). The criteria for judging whether the game state is during a special prize can be the same as those described in FIG. 39. If the game state is during a special prize, the base is not calculated and the base calculation process 1 is terminated because the ball is an out ball that is not related to the calculation of the base value. On the other hand, if the game state is not during a special prize, the number of out balls detected in the switch input process (step S74) is obtained (step S9702), and the out ball number buffer is updated so that the obtained number of out balls is added to the out ball number buffer (step S9703). Note that if the number of out balls cannot be obtained or the obtained number of out balls is 0, the base calculation process 1 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculation of the base value.

Then, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S9704). There are various methods that can be used to determine whether the number of out balls is equal to or greater than the predetermined threshold value Th2. For example, the out ball count buffer value may be compared with the threshold value Th2, or the determination may be made based on the value of a predetermined bit in the storage area for the number of out balls (specifically, the storage area for the number of out balls may be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater).

If the out ball count buffer value is smaller than threshold value Th2, it is not time to calculate the base value, so base calculation process 1 is terminated.

On the other hand, if the out ball count buffer value is greater than or equal to threshold value Th2, the total number of out balls is updated by adding the out ball count buffer value to the total number of out balls (step S9705), and the out ball count buffer is set to 0 (step S9706).

After that, it is determined whether the total number of out balls is 0 (step S9707). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 1 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (for example, 100) is stored in division input register A131216 of calculation circuit 13121, and the total number of out balls is stored in division input register B131217 (step S9708). Then, after a predetermined time (32 clocks) has elapsed, the calculation result (total number of prize balls ÷ total number of out balls) is read from division result register A131218 and used as the base value (step S9709).

Then, a base notification command is generated (step S9710) and the base is notified to the player and hall employees.

Figure 79 is a flowchart showing another example of base calculation process 2 (step S98).

First, the main control MPU 1311 judges whether the game state is in the special prize state (step S9801). The criteria for judging whether the game state is in the special prize state can be the same as those described in FIG. 39. If the game state is in the special prize state, the base is not calculated and the base calculation process 2 is terminated since the prize balls are not related to the calculation of the base value. On the other hand, if the game state is not in the special prize state, the number of prize balls calculated in the prize ball control process (step S80) is obtained (step S9802), and it is judged whether there are prize balls, that is, whether the number of acquired prize balls is 1 or more (step S9803). As a result, if there are no prize balls, the number of prize balls is not updated and the process proceeds to step S9808. On the other hand, if there are prize balls, it is judged whether there is an abnormality in the number of prize balls (step S9805), and if there is no abnormality in the number of prize balls, the prize ball number buffer is updated so that the acquired number of prize balls is added to the prize ball number buffer (step S9804).

On the other hand, if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S9806), and the player and hall staff are notified that there is an abnormality in the number of prize balls. There are various methods for notifying the abnormality, and one of the methods described below may be used, or two or more may be combined. Specifically, the various methods described in step S816 of FIG. 46 may be used.

An abnormality in the number of prize balls is, for example, when a large number of prize balls are obtained during a specified time other than during the special prize period (for example, the number of prize balls equivalent to more than 10 prizes per minute, considering the number of prize balls at the general prize slot and the starting slot). Note that the degree of abnormality may be judged in multiple stages depending on the deviation of the number of prize balls from the standard value by setting multiple tolerance levels.

Then, the prize ball abnormality notification timer is reset (step S9807), and counting the prize ball abnormality notification time begins.

Then, it is determined whether the number of prize balls stored in the prize ball number buffer is equal to or greater than a predetermined threshold value Th1 (step S9808). Various methods can be used to determine whether the prize ball number buffer value is equal to or greater than the predetermined threshold value Th1. For example, the prize ball number buffer value may be compared with the threshold value Th1, or the determination may be made based on the value of a predetermined bit in the prize ball number storage area (specifically, the prize ball number storage area may be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater).

If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to calculate the base value, so the base is not calculated and base calculation process 2 is terminated.

On the other hand, if the prize ball count buffer value is greater than or equal to the threshold value Th1, the total prize ball count is updated by adding the prize ball count buffer value to the total prize ball count (step S9809), and the prize ball count buffer is set to 0 (step S9810).

Each time the number of prize balls is added to the prize ball count buffer, the number of prize balls may be output from the external terminal board 784 to a hall computer installed in the gaming center, or when the number of prize balls described below reaches or exceeds a predetermined threshold value Th1, the threshold value Th1 may be output from the external terminal board 784 to the hall computer. Here, the prize ball count buffer is an area provided in the main control built-in RAM 1312 to calculate a base value, and temporarily stores the number of prize balls paid out by the pachinko machine 1.

After that, it is determined whether the total number of out balls is 0 (step S9811). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and the base calculation process 2 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (for example, 100) is stored in division input register A131216 of the calculation circuit 13121, and the total number of out balls is stored in division input register B131217 (step S9812). Then, after a predetermined time (32 clocks) has elapsed, the calculation result (total number of prize balls ÷ total number of out balls) is read from division result register A131218 and used as the base value (step S9813).

Then, a base notification command is generated (step S9814) and the base is notified to the player and hall employees.

Then, it is determined whether the prize ball abnormality notification timer started in step S9807 has timed out (step S9815). When the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S9816). Note that in step S9815, the end of the notification is determined based on the time of the timer for notifying the prize ball abnormality for a predetermined period of time, but the end of the notification may also be determined so that the prize ball abnormality is notified for a predetermined number of balls fired. Also, the abnormality may continue to be notified until a hall employee confirms it.

Figure 80 is a flow chart showing another example of timer interrupt processing. The timer interrupt processing shown in Figure 80 is the same as the timer interrupt processing described above (Figures 23 and 75) except for the base calculation processing (steps S93 and S94) and the base display processing (step S95), so a description of the same processing will be omitted.

When the timer interrupt process starts, the main control MPU 1311 first switches the registers by executing the main control program (step S70).

Next, the main control MPU 1311 executes a switch input process (step S74). In the switch input process, the detection signals from the discharged ball sensor 3060 and the launched ball sensor 1020 are read, and the number of out balls is counted.

Then, the main control MPU 1311 executes base calculation process 3 (step S93). In base calculation process 3, the total number of out balls is updated using the number of out balls counted in step S74, and parameters for calculating the base value are written to the calculation circuit 13121. Details of base calculation process 3 will be described later with reference to Figures 81 and 84.

Then, the main control MPU 1311 executes a timer update process (step S76) and a random number update process 1 (step S78).

Then, the main control MPU 1311 executes the prize ball control process (step S80). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the calculated number is written to the main control internal RAM 1312. In addition, a prize ball command for paying out game balls is created based on the calculation result of the number of prize balls.

Then, the main control MPU 1311 executes base calculation process 4 (step S94). In base calculation process 2, the total number of prize balls is updated using the number of prize balls counted in step S80, and parameters for calculating the base value are written to the calculation circuit 13121. Details of base calculation process 4 will be described later using Figures 82 and 85.

Then, the main control MPU 1311 executes a frame command reception process (step S82), a fraud detection process (step S84), a special symbol and special electric device control process (step S86), and a normal symbol and normal electric device control process (step S88).

Next, the main control MPU 1311 executes a base display process that reads from the arithmetic circuit 13121 and generates a command to notify the base (step S95).

Next, the main control MPU 1311 executes an output data setting process (step S90) and a peripheral control board command transmission process (step S92). Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). By setting a predetermined value in the watchdog timer clear register WCL, the watchdog timer clear register WCL is cleared. Finally, the main control MPU 1311 switches (restores) the register bank. When the above processes are completed, the timer interrupt process is terminated and the process before the interrupt is restored.

Figure 81 is a flowchart showing an example of base calculation process 3 (step S93). Base calculation process 3 shown in Figure 81 is obtained by removing steps S9709 and after from base calculation process 1 shown in Figure 76.

First, the main control MPU 1311 judges whether the game state is during a special prize (step S9701). The criteria for judging whether the game state is during a special prize can be the same as those described in FIG. 39. If the game state is during a special prize, the ball is an out ball that is not related to the calculation of the base value, so the base is not calculated and base calculation process 1 is terminated. On the other hand, if the game state is not during a special prize, the number of out balls detected in the switch input process (step S74) is obtained (step S9702), and the total number of out balls is updated so that the obtained number of out balls is added to the total number of out balls (step S9705). Note that if the number of out balls cannot be obtained or the obtained number of out balls is 0, base calculation process 3 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculation of the base value.

After that, it is determined whether the total number of out balls is 0 (step S9707). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 3 is terminated. On the other hand, if the total number of out balls is not 0, the total number of out balls is stored in division input register B131217 of the calculation circuit 13121 (step S9708).

Figure 82 is a flowchart showing an example of base calculation process 4 (step S94). Base calculation process 4 shown in Figure 82 is obtained by removing steps S9813 and after from base calculation process 2 shown in Figure 77.

First, the main control MPU 1311 determines whether the game is in a special prize state (step S9801). The criteria for determining whether the game is in a special prize state can be the same as those described in FIG. 39. If the game is in a special prize state, the base is not calculated and the base calculation process 2 is terminated because the prize balls are not related to the calculation of the base value. On the other hand, if the game is not in a special prize state, the number of prize balls calculated in the prize ball control process (step S80) is obtained (step S9802), and the total number of prize balls is updated so that the obtained number of prize balls is added to the total number of prize balls (step S9809). Note that if the number of prize balls cannot be obtained or the number of prize balls obtained is 0, the base calculation process 1 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculation of the base value.

After that, it is determined whether the total number of out balls is 0 (step S9810). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 2 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (e.g., 100) is stored in division input register A131216 of calculation circuit 13121 (step S9812).

In addition, in step S9708 of FIG. 81, the total number of out balls may not be stored in division input register B131217, and in step S9812 of FIG. 82, the total number of winning balls multiplied by a predetermined number (e.g., 100) may be stored in division input register A131216, and the total number of out balls may be stored in division input register B131217.

Figure 83 is a flowchart showing an example of the base display process (step S95).

The main control MPU 1311 reads the calculation result (total number of winning balls / total number of out balls) from the division result register A 131218 and sets it as the base value (step S8901). It then generates a base notification command (step S8902) and notifies the player and hall staff of the base.

The base calculation process shown in Figures 81 and 82 and the base display process shown in Figure 83 are executed for each timer interrupt process, so that the base value can be calculated and displayed without delay. Note that base calculation process 1 and base calculation process 2 may be executed in the timer interrupt process at a predetermined time interval (e.g., one minute) instead of being executed for each timer interrupt process.

Next, another example of the base calculation process (steps S97, S98) will be described using Figures 84 and 85. The base calculation process shown in Figures 84 and 85 calculates a base value for each predetermined number of out balls and each predetermined number of winning balls.

Figure 84 is a flowchart showing another example of base calculation process 3 (step S93). Base calculation process 3 shown in Figure 84 is obtained by removing steps S9709 and after from base calculation process 1 shown in Figure 78.

First, the main control MPU 1311 judges whether the game state is during a special prize (step S9701). The criteria for judging whether the game state is during a special prize can be the same as those described in FIG. 39. If the game state is during a special prize, the base is not calculated and the base calculation process 1 is terminated because the ball is an out ball that is not related to the calculation of the base value. On the other hand, if the game state is not during a special prize, the number of out balls detected in the switch input process (step S74) is obtained (step S9702), and the out ball number buffer is updated so that the obtained number of out balls is added to the out ball number buffer (step S9703). Note that if the number of out balls cannot be obtained or the obtained number of out balls is 0, the base calculation process 3 may be immediately terminated. In this way, the load on the main control MPU 1311 can be reduced without unnecessary calculation of the base value.

Then, it is determined whether the number of out balls stored in the out ball count buffer is equal to or greater than a predetermined threshold value Th2 (step S9704). There are various methods that can be used to determine whether the number of out balls is equal to or greater than the predetermined threshold value Th2. For example, the out ball count buffer value may be compared with the threshold value Th2, or the determination may be made based on the value of a predetermined bit in the storage area for the number of out balls (specifically, the storage area for the number of out balls may be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater).

If the out ball count buffer value is smaller than threshold value Th2, it is not time to calculate the base value, so base calculation process 1 is terminated.

On the other hand, if the out ball count buffer value is greater than or equal to threshold value Th2, the total number of out balls is updated by adding the out ball count buffer value to the total number of out balls (step S9705), and the out ball count buffer is set to 0 (step S9706).

After that, it is determined whether the total number of out balls is 0 (step S9707). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 1 is terminated. On the other hand, if the total number of out balls is not 0, the total number of out balls is stored in division input register B131217 of the calculation circuit 13121 (step S9708).

Figure 85 is a flowchart showing another example of base calculation process 4 (step S94). Base calculation process 4 shown in Figure 85 is obtained by removing steps S9813 and after from base calculation process 2 shown in Figure 79.

First, the main control MPU 1311 judges whether the game state is in the special prize state (step S9801). The criteria for judging whether the game state is in the special prize state can be the same as those described in FIG. 39. If the game state is in the special prize state, the base is not calculated and the base calculation process 2 is terminated since the prize balls are not related to the calculation of the base value. On the other hand, if the game state is not in the special prize state, the number of prize balls calculated in the prize ball control process (step S80) is obtained (step S9802), and it is judged whether there are prize balls, that is, whether the number of acquired prize balls is 1 or more (step S9803). As a result, if there are no prize balls, the number of prize balls is not updated and the process proceeds to step S9808. On the other hand, if there are prize balls, it is judged whether there is an abnormality in the number of prize balls (step S9805), and if there is no abnormality in the number of prize balls, the prize ball number buffer is updated so that the acquired number of prize balls is added to the prize ball number buffer (step S9804).

On the other hand, if there is an abnormality in the number of prize balls, an abnormality notification command is generated (step S9806), and the player and hall staff are notified that there is an abnormality in the number of prize balls. There are various methods for notifying the abnormality, and one of the methods described below may be used, or two or more may be combined. Specifically, the various methods described in step S816 of FIG. 46 may be used.

An abnormality in the number of prize balls is, for example, when a large number of prize balls are won during a specified period of time other than during the special prize period (for example, 10 or more prize balls won per minute, taking into account the number of prize balls won at the general prize slot and the starting prize slot). Note that multiple tolerance levels may be set, and the degree of abnormality may be determined in multiple stages depending on the degree of deviation of the number of prize balls from the standard value.

Then, the prize ball abnormality notification timer is reset (step S9807), and counting the prize ball abnormality notification time begins.

Then, it is determined whether the number of prize balls stored in the prize ball number buffer is equal to or greater than a predetermined threshold value Th1 (step S9808). Various methods can be used to determine whether the prize ball number buffer value is equal to or greater than the predetermined threshold value Th1. For example, the prize ball number buffer value may be compared with the threshold value Th1, or the determination may be made based on the value of a predetermined bit in the prize ball number storage area (specifically, the prize ball number storage area may be composed of 8 bits, and if the most significant bit is 1, it can be determined that the number of out balls is 128 or greater).

If the prize ball count buffer value is smaller than the threshold value Th1, it is not time to calculate the base value, so the base is not calculated and base calculation process 2 is terminated.

On the other hand, if the prize ball count buffer value is greater than or equal to the threshold value Th1, the total prize ball count is updated by adding the prize ball count buffer value to the total prize ball count (step S9809), and the prize ball count buffer is set to 0 (step S9810).

Each time the number of prize balls is added to the prize ball count buffer, the number of prize balls may be output from the external terminal board 784 to a hall computer installed in the gaming center, or when the number of prize balls described below reaches or exceeds a predetermined threshold value Th1, the threshold value Th1 may be output from the external terminal board 784 to the hall computer. Here, the prize ball count buffer is an area provided in the main control built-in RAM 1312 to calculate a base value, and temporarily stores the number of prize balls paid out by the pachinko machine 1.

After that, it is determined whether the total number of out balls is 0 (step S9811). If the total number of out balls is 0, the base value cannot be calculated, so the base value is not calculated and base calculation process 2 is terminated. On the other hand, if the total number of out balls is not 0, the total number of prize balls multiplied by a predetermined number (e.g., 100) is stored in division input register A131216 of calculation circuit 13121 (step S9812).

In addition, in step S9708 of FIG. 84, the total number of out balls may not be stored in division input register B131217, and in step S9812 of FIG. 85, the total number of winning balls multiplied by a predetermined number (e.g., 100) may be stored in division input register A131216, and the total number of out balls may be stored in division input register B131217.

Figure 86 is a flowchart showing another example of the base display process (step S95).

The main control MPU 1311 reads the calculation result (total number of winning balls / total number of out balls) from the division result register A 131218 and sets it as the base value (step S8901). It then generates a base notification command (step S8902) and notifies the player and hall staff of the base.

After that, it is determined whether the prize ball abnormality notification timer started in step S9807 of base calculation process 4 has timed out (step S8903). Then, when the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command is generated and the prize ball abnormality notification is stopped (step S8904). Note that in step S8903, the end of the notification is determined based on the time of the timer for notifying the prize ball abnormality for a predetermined period of time, but the end of the notification may also be determined so that the prize ball abnormality is notified for a predetermined number of balls fired. Also, the abnormality may continue to be notified until a hall employee confirms it.

As shown in Figures 75 and 80, in the timer interrupt process of this embodiment, before the timer interrupt process ends (before the timer interrupt period has elapsed and the next timer interrupt process starts), the input values (divisor, dividend) are written to the arithmetic circuit 13121 at a timing when the division result can be read from the arithmetic circuit 13121. Specifically, the timing for writing the input values (divisor, dividend) to the arithmetic circuit 13121 is preferably in the first half of the timer interrupt process, before the random number update process (step S78), or before the control process for the special and normal symbols (steps S86, S88).

The number of game media (prize balls) awarded to a player may also determine whether or not to execute the process of calculating the base value. In other words, from the perspective of the number of prize balls set for each winning slot, it may be possible to switch between using the number of prize balls or the number of out balls to calculate the base value. For example, the prize balls of a winning slot that awards the maximum number of prize balls per winning ball may not be used in calculating the base value.

Specifically, if the number of prize game media (prize balls paid out for one winning ball) awarded when a game medium determined for each winning slot in the game area wins is one, three, or five, the maximum number of five prize balls and the corresponding number of out balls do not need to be used to calculate the base value. This is because if a winning prize with a large number of prize balls is used to calculate the base value, the calculated base value will fluctuate greatly, and even if the lowest digits of the calculated base value are rounded by a processing means (by rounding up, down, etc.), the displayed value may change frequently. In such cases, it becomes difficult for the hall to determine whether the pachinko machine is performing as specified (for example, whether the ball payout rate is as set).

In addition, the minimum number of prize balls (one) and the corresponding number of out balls do not have to be used in calculating the base value. This is because the change in the base value due to a win with a small number of prize balls is small, and so even if that one prize ball is not used in calculating the base value, if the lowest digits of the base value calculated by the processing means are rounded (by rounding, rounding up, rounding down, etc.) and displayed, there are cases in which the displayed base value does not change, and therefore processing that does not contribute to a change in the display can be omitted.

Also, as explained above for the maximum and minimum number of winning balls, the intermediate number of winning balls between the maximum and minimum does not have to be used to calculate the base value. In this case, the maximum and minimum number of winning balls are used to calculate the base value, and the maximum and minimum are averaged to show the number of winning balls and the number of out balls that represent the operation of the entire pachinko machine, making it possible to show an appropriate base value.

Note that although three types of prize ball number patterns have been described, the pattern is not limited to three types, and other types of prize ball number patterns such as five or seven types may also be used.

Furthermore, if a winning ball of a specific type (such as the minimum value of 1, the intermediate value of 3, or the maximum value of 5, as mentioned above) is not used in calculating the base value, all winning balls in the game state when that winning ball is detected do not have to be used in calculating the base value. For example, if a winning ball in a winning slot that awards 5 winning balls is not used in calculating the base value, in the game state in which a winning ball in that winning slot is detected, winning balls in that winning slot or other winning slots will not be used in calculating the base value until the end of that game state. Furthermore, winning balls in that winning slot or other winning slots after the start of that game state will not be used retroactively in calculating the base value.

In addition, if the game state when the winning was detected occurs again, the winning does not have to be used in calculating the base value, and winnings up until the game state when the winning was detected transitions to another game state do not have to be used in calculating the base value. This is to eliminate the possibility of delays in determining whether the pachinko machine is normal (for example, whether the payout rate is as set) by not using the number of winning balls and the number of out balls in a game state where the calculated base value changes greatly in calculating the base value.

In addition, when the number of winning balls changes depending on the game state, the maximum (or minimum or intermediate) winning ball for one winning ball does not need to be used in calculating the base value.

Next, we will explain the specific process for not using the number of prize balls and the number of out balls in calculating the base value, depending on the number of game media (prize balls) mentioned above.

In the switch input process (step S74), when the detection signal from each winning port sensor is input to the main control board 1310, the main control MPU 1311 may determine whether the winning is to be used in the calculation of the base value. For winnings that are determined not to be used in the calculation of the base value, the total number of winning balls and the total number of out balls for calculating the base value are not updated, and the calculation process of the base value is not executed. More specifically, for example, in the timer interrupt process shown in FIG. 75, in base calculation process 1 (step S97), the number of winning balls to be excluded from the calculation of the base value is set to 0 and excluded from the number of out balls, and in base calculation process 2 (step S98), the number of winning balls to be excluded from the calculation of the base value is set to 0 and not added to the total number of winning balls. Also, if all detected winnings are not used in the calculation of the base value, the base calculation process 1 (step S97) and the base calculation process 2 (step S98) in FIG. 75 do not need to be executed.

In addition, in the timer interrupt processing shown in FIG. 80, in base calculation processing 3 (step S93), the number of winning balls to be excluded from the calculation of the base value is set to 0 and excluded from the number of out balls, and in base calculation processing 4 (step S94), the number of prize balls to be excluded from the calculation of the base value is set to 0 and not added to the total number of prize balls. Also, if all detected winning balls are not used in the calculation of the base value, it is not necessary to execute base calculation processing 3 (step S93), base calculation processing 4 (step S94), and base display processing (step S95) in FIG. 80.

The method for excluding the number of winning balls that are determined not to be used in calculating the base value from the number of out balls may be the same as the correction of out balls due to abnormal winning balls described in Figures 73 and 74.

In this case, since it is determined from the number of winning balls whether the detected winning is to be used in calculating the base value, it is not necessary to determine whether a special prize is being awarded in base calculation process 1 (step S97), base calculation process 2 (step S98), base calculation process 3 (step S93), and base calculation process 4 (step S94).

In this way, by excluding the number of out balls and winning balls required for a given win from the calculation of the base value, no processing is skipped, making it easy to check whether the processing is being performed accurately, especially during the development stage. Also, by not executing the processing to calculate the base value and not updating the base value, the processing of the main control MPU 1311 is reduced, allowing other processing (such as the lottery processing and the processing to determine the variation pattern) to be performed accurately.

In other words, even if the maximum prize among multiple prizes with different degrees of advantage is awarded to the player, it is not used in calculating the base value, and the base value is displayed unchanged by the award of that prize. Furthermore, the calculated base value is displayed unchanged at least until the game state in which the maximum prize was awarded ends.

[9-12. Another configuration of a gaming machine that displays the base]
FIG. 87 is a block diagram showing the control configuration of the pachinko machine of this embodiment.

In the pachinko machine 1 of this embodiment, unlike the control configuration of the pachinko machine shown in FIG. 17, as the ejected ball sensor 3060, a board-side ejected ball sensor 3060A is provided on the game board 5, and a frame-side ejected ball sensor 3060B is provided on the main body frame 4. Note that either the board-side ejected ball sensor 3060A or the frame-side ejected ball sensor 3060B may be provided, or both may be provided.

As described above, the board-side ejected ball sensor 3060A is the out-port passing ball sensor 1021 that detects game balls passing through the out-port 1111 provided at the bottom of the game area 5a (see FIG. 53). The output signal of the board-side ejected ball sensor 3060A is input to the main control board 1310 and input to the main control MPU 1311, as described later with reference to FIG. 92. In this case, the total of the number of game balls detected by the out-port passing ball sensor 1021, the number of game balls detected by the start port sensors 2104, 2551, and the number of game balls detected by the various winning port sensors 3015, 2114, 2554, 2557 is regarded as the number of out balls.

As described above, the frame-side discharged ball sensor 3060B is provided at the discharge port that discharges game balls that have flowed out of the game area 5a to the outside of the pachinko machine 1 (see FIG. 4). The output signal of the frame-side discharged ball sensor 3060B is input to the main control board 1310 via the payout control board 951 and the connector that connects the main frame 4 and the game board 5.

When both the board-side discharged ball sensor 3060A and the frame-side discharged ball sensor 3060B are provided, the counting results of the board-side discharged ball sensor 3060A and the frame-side discharged ball sensor 3060B may be compared, and an error may be signaled if a difference between the two counting results is greater than a predetermined value. Also, an error may be signaled if a difference between the two counting results within a predetermined period of time is greater than a predetermined value.

In the pachinko machine of this embodiment, the display switch 1318 is not a required component, and the display content of the base display 1317 (tentative interval display and confirmed interval display) is switched at a predetermined time interval as described below (see Figure 99), but the base value may be displayed or the display content may be switched by operating the display switch 1318.

The configuration other than that described above is the same as the control configuration of the pachinko machine shown in Figure 17.

Figures 88 and 89 show the placement of the frame side discharge ball sensor 3060B.

Figure 88 shows an example of a mechanism that aligns out balls in a single line in a ball flow path 960 provided in the main body frame 4 on the back side of the game board, and counts the out balls with one frame-side discharged ball sensor 3060B. Game balls rolling in the game area 5a flow into the main body frame 4 on the back side of the game board 5 via the out port 1111, the general winning port 2001, and the large winning ports 2005 and 2006. The main body frame 4 is provided with a ball flow path 960 that causes discharged game balls to flow down to the right side when viewed from the front, and align them in a single line. The frame-side discharged ball sensor 3060B counts the game balls that are aligned in a single line.

Figure 89 shows an example of a mechanism in which out balls aligned in a ball flow path 960 provided on the back of the game board are made to flow down in two lines and counted by multiple discharged ball sensors 3060. Game balls rolling in the game area 5a flow into the main body frame 4 on the back side of the game board 5 via the out port 1111, the general winning port 2001, the starting ports 2002 and 2004, and the large winning ports 2005 and 2006. The main body frame 4 is provided with a ball flow path 960 that makes the discharged game balls flow down from the left and right to near the center and align them in two lines. Each of the two frame-side discharged ball sensors 3060B counts the game balls aligned in each line.

The frame-side discharged ball sensor 3060B is provided at the position shown in Figures 53, 88, and 89, but it may be configured as a unit together with the ball flow path 960 and detachable from the main body frame 4. The frame-side discharged ball sensor 3060B may also be configured as a unit that is detachable from the main body frame 4.

Figure 90 shows an example of the connection between the ejected ball sensor and the main control board.

The output line of the board-side ejected ball sensor 3060A is connected to a connector 13101 provided on the main control board 1310 via a relay board, and the output signal of the board-side ejected ball sensor 3060A is input to the main control MPU 1311. The output line of the frame-side ejected ball sensor 3060B is connected to a connector 13102 provided on the main control board 1310, and the output signal of the frame-side ejected ball sensor 3060B is input to the main control MPU 1311.

The connector 13101 to which the output line of the board-side ejected ball sensor 3060A is connected may be provided on the upper side of the main control board 1310, and the connector 13102 to which the output line of the frame-side ejected ball sensor 3060B is connected may be provided on the lower side of the main control board 1310.

The connector 13101 to which the output line of the board side ejected ball sensor 3060A is connected and the connector 13102 to which the output line of the frame side ejected ball sensor 3060B is connected are provided separately, but as shown by the dashed line, the output line of the board side ejected ball sensor 3060A and the output line of the frame side ejected ball sensor 3060B may be connected to a single connector (e.g., 13102).

The output line of the board-side ejected ball sensor 3060A may be connected to the main control board 1310 without going through a relay board. The output line of the frame-side ejected ball sensor 3060B may be connected directly to the main control board 1310. The output line of the frame-side ejected ball sensor 3060B may be connected to the main control board 1310 via the payout control board 951. The output line of the frame-side ejected ball sensor 3060B may be connected to the main control board 1310 via a relay board (not shown). After connecting the output line of the frame-side ejected ball sensor 3060B to the payout control board 951 or the relay board, it may be connected to the main control board 1310 via a connector (e.g., a floating connector) that connects the game board 5 and the main frame 4.

The pachinko machine of this embodiment is also provided with multiple magnetic detection sensors 1030. The output signals of the magnetic detection sensors 1030 are input to the main control MPU 1311, as described later with reference to FIG. 92.

Figure 91 is a front view showing an example of a game board 5, and in particular shows the arrangement of the magnetic detection sensor 1030 provided on the game board 5.

The magnetic detection sensor 1030 is a sensor that detects unauthorized magnetism within the game area 5a, and is installed near the sensors that detect winning entries into the various winning slots 2001, 2002, 2004, 2005, and 2006 (at the position of the star in the figure). The detection range of the magnetic detection sensor 1030 is shown by a dashed line on the game board 5, and partially overlaps.

In the pachinko machine 1 of this embodiment, the magnetic detection sensor 1030 is also provided near the outlet 1111. This is to prevent the calculation of an illegal base value. That is, when a player brings a magnet close to the outlet 1111 to operate the discharged ball sensor 3060, the number of discharged balls is counted more than the actual number, and the base value decreases. For this reason, amusement parlors may perform maintenance work on the pachinko machine 1 to return the base value to a predetermined standard value. In a pachinko machine where maintenance work has been performed based on a base value different from the actual number, the number of discharged balls in the normal state increases, allowing the player to play in a more advantageous state than usual and to obtain many discharged balls. In order to calculate an accurate base value and prevent such illegal payout of discharged balls, the magnetic detection sensor 1030 is provided near the outlet 1111. It is advisable to provide the magnetic detection sensor 1030 in a location other than the vicinity of the outlet 1111 where the discharged ball sensor 3060 may malfunction due to magnetism.

As shown in the figure, it is preferable that the magnetic detection sensor 1030 installed near the outlet 1111 has a wider detection range than the other magnetic detection sensors 1030. This is because, when detecting out balls using multiple discharged ball sensors 3060 as shown in FIG. 89, the magnetic detection range of the magnetic detection sensor 1030 installed near the outlet 1111 may also include other winning ports (for example, the large winning port 2005 installed above the outlet 1111).

Figure 92 is a diagram showing the configuration of the main control input circuit 1315. The main control input circuit 1315 receives output signals from the ejected ball sensor 3060, the winning hole sensors (general winning hole sensor 3015, first start hole sensor 2104, second start hole sensor 2551, first large winning hole sensor 2114, second upper large winning hole sensor 2554, second lower large winning hole sensor 2557, etc.), and the magnetic detection sensor 1030, and inputs them to the main control MPU 1311.

The main control input circuit 1315 includes an interface circuit 1331 and a buffer circuit 1332. The interface circuit 1331 converts the levels of signals input from various sensors and outputs them after shaping (e.g., removing chattering). The buffer circuit 1332 outputs the input signals to the data bus at the timing instructed by the main control MPU 1311.

Specifically, the output signal from each sensor is input to one of terminals A1 to A8 of interface circuit 1331, and the signal that has been level converted and shaped by interface circuit 1331 is output from terminals Y1 to Y8 and input to one of terminals A1 to A8 of buffer circuit 1332. Buffer circuit 1332 outputs the signal input to terminals Y1 to Y8 to the data bus when chip select signals CS4, CS5 from the main control MPU 1311 are input. This allows the detection results from each sensor to be taken into the main control MPU 1311.

The interface circuit 1331 includes an abnormality detection circuit and a power supply monitoring circuit. The abnormality detection circuit of the interface circuit 1331 monitors the input of the A1 to A8 terminals, and when the input signal to each terminal is lower than a predetermined threshold (for example, 4V) or higher than a predetermined threshold (for example, power supply voltage -0.1V), it detects a break in the connection line to the switch or a short circuit in the switch. When the input of any terminal exceeds the normal range defined by the predetermined threshold, it outputs an abnormality signal E and outputs a signal at a level at which each sensor is OFF from the Y1 to Y8 terminals, regardless of the input signal of the A1 to A8 terminals. The power supply monitoring circuit of the interface circuit 1331 monitors the power supply voltage VS, and when the power supply voltage becomes lower than a predetermined threshold (for example, 12V-20%) and detects an abnormality in the power supply, it outputs an abnormality signal E and outputs a signal at a level at which each sensor is OFF from the Y1 to Y8 terminals, regardless of the input signal of the A1 to A8 terminals. In other words, even if an ON level signal is input from a sensor, the output of the interface circuit for that input is OFF level. For this reason, the main control MPU 1311 does not determine that the signal output from the sensor is valid (the output of the sensor is invalidated). This eliminates the need for the main control MPU 1311 to determine whether or not to process the input signal depending on whether the power supply to the switch has dropped, reducing the processing load and allowing the output signals Y1 to Y8 to be output at a level that turns each sensor OFF, regardless of the state of the input signals A1 to A8.

As described below, when the main control MPU 1311 detects an abnormal signal, it does not calculate the base value (see Figure 105). The interface circuit 1331 receives signals from sensors used to calculate the base value (number of balls discharged, number of winning balls) and signals from sensors not used to calculate the base value (such as gate sensor 2547). The interface circuit 1331 outputs an abnormality signal if any of the input signals become abnormal. For this reason, even if an abnormality is detected in a sensor that is not related to the calculation of the base, the calculation of the base is not performed, and the display content of the base display 1317 is maintained and does not change.

That is, the main control input circuit 1315 monitors signals from sensors used to calculate the base value and signals from sensors not used to calculate the base value, and if any of the signals become abnormal, it outputs an abnormality signal to stop the calculation of the base value.

Figures 93, 94, and 95 are diagrams showing examples of implementation of the main control board 1310. Figure 93 (A) shows an example in which the function display unit 1400 and the base display 1317 are connected to different driver circuits 1334, and Figure 93 (B) shows an example in which the function display unit 1400 and the base display 1317 are connected to a single driver circuit 1334. Figure 94 shows the arrangement of the main control MPU 1311, the base display 1317, and the main control board 1310. Figure 95 (A) is a front view of the main control board 1310 housed in the main control board box 1320, Figure 95 (B) is a bottom view, and Figure 95 (C) is a right side view.

As shown in Figures 93 (A) and (B), the main control I/O port 1314 includes a latch circuit 1333 and a driver circuit 1334.

In the example shown in FIG. 93(A), the display data of the functional display unit 1400 and the display data of the base display 1317 are output from the main control MPU 1311 and taken into different latch circuits 1333. Then, the display data is output from different driver circuits 1334 to the functional display unit 1400 and the base display 1317.

In the example shown in FIG. 93(B), the display data of the functional display unit 1400 and the display data of the base display 1317 are output from the main control MPU 1311 and taken into one latch circuit 1333. Then, the display data is output from one driver circuit 1334 to the functional display unit 1400 and the base display 1317.

In the example shown in Figures 93 (A) and (B), a reset signal from a reset circuit 1335 and a clock signal from a clock oscillator 1336 are input to the main control MPU 1311. It is preferable that the signal lines over which the display data of the function display unit 1400 and the base display 1317 are output from the main control MPU 1311 do not intersect with the signal lines for the reset signal and the clock signal.

The connector 13101 is a connector to which the output line of the board side ejected ball sensor 3060A is connected, and is preferably provided on the upper side of the main control board 1310. The connector 13101 is connected not only to the output line from the board side ejected ball sensor 3060A, but also to output lines from other winning slot sensors 3015, 2104, etc. and the magnetic detection sensor 1030. The connector 13102 is a connector to which the output line of the frame side ejected ball sensor 3060B is connected, and is preferably provided on the lower side of the main control board 1310. The signal from the ejected ball sensor 3060 input to the connectors 13101 and 13102 is input to the main control MPU 1311 via the interface circuit 1331 and the buffer circuit 1332.

Figure 94 is a diagram showing the arrangement on the main control board 1310 of the components arranged between the main control MPU 1311 and the base display 1317. Figure 94 is a diagram showing the printed circuit board constituting the main control board 1310 from the back side, with solid lines indicating the pattern on the back side, dashed lines indicating the pattern on the component side, and dotted lines indicating the components mounted on the component side of the printed circuit board. Note that the ground pattern and power supply pattern have been omitted from the illustration.

The data lines (D1 to D8) output from the main control MPU 1311 are input to latch 2 (1333) and connected to the cathode side segment terminals of each digit of the 7-segment LED of the base display 1317 via driver 2 (1334).

In addition, some of the data lines (D1 to D4) output from the main control MPU 1311 are input to latch 1 (1333) and connected to the anode side common terminals of each digit of the 7-segment LED of the base display 1317 via driver 1 (1334).

The main control MPU 1311 outputs a chip select signal that controls the operation timing of the latch circuit 1333. Specifically, latch circuit 2 (1333) takes in data for controlling the blinking of each segment from the data lines (D1 to D8) when chip select signal CS2 from the main control MPU 1311 is input. Also, latch circuit 1 (1333) takes in data for controlling the blinking of each digit from the data lines (D1 to D4) when chip select signal CS3 from the main control MPU 1311 is input.

The main control MPU 1311 receives a reset signal from the reset circuit 1335 and a clock signal from the clock oscillator 1336. The reset signal is also input from the reset circuit 1335 to each latch circuit 1333, and the latch circuit 1333 clears the latched data in response to the reset signal.

The data lines (D1 to D8) between the main control MPU 1311 and the base display 1317 are arranged so as not to intersect with the signal lines for the reset signal and the clock signal. Similarly, although not shown, the data lines (D1 to D8) between the main control MPU 1311 and the function display unit 1400 are arranged so as not to intersect with the signal lines for the reset signal and the clock signal.

This is because in the pachinko machine 1 of this embodiment, the base display 1317 is controlled by dynamic lighting, so that a pulse signal is transmitted on the data line between the main control MPU 1311 and the base display 1317, and the level of the data line between the main control MPU 1311 and the base display 1317 frequently changes. In particular, a large current necessary to drive the LED elements flows between the driver circuit 1334 and the base display 1317. For this reason, the data line between the main control MPU 1311 and the base display 1317 (in particular, between the driver circuit 1334 and the base display 1317) is a source of noise generation. And if the data line between the main control MPU 1311 and the base display 1317 crosses the signal lines of the reset signal or clock signal, noise is carried on the signal lines of the reset signal or clock signal, which may cause the pachinko machine 1 to malfunction. These signal line intersections can also occur when wiring patterns on the front and back of a printed circuit board intersect, or when wiring patterns on an inner layer and a surface layer (front and back) intersect.

Specifically, if a reset signal is input to the main control MPU 1311 at a timing that would not normally occur, the main control MPU 1311 may be reset during play, causing the game to stop or the game state to be erased. If the game state is erased at a timing that would not normally occur, the reset occurs without executing the normal power-off processing, so the data stored in the RAM 1312 is cleared, the jackpot ends, the variable display game ends midway, or pending special pattern variable display games and normal pattern variable display games are erased.

The main control board box 1320 is partially low in height and other parts are high in height depending on the height of the components attached to the main control board 1310 and interference with other components when assembled. For example, as shown in FIG. 95, since the main control MPU 1311 is high, the main control board box 1320 is high in height where the main control MPU 1311 is mounted, and the area to the left of the area where the main control MPU 1311 is mounted is high in height, and relatively tall components such as electrolytic capacitors are mounted therein. On the other hand, the area to the right of the area where the main control MPU 1311 is mounted is low in height, and short components such as ICs are mounted therein (tall components cannot be placed there). Note that the main control board box 1320 is high in height, and the area where tall components can be mounted is shown hatched. Additionally, in the area where the connectors 13101 and 13102 are attached, the main control board box 1320 should be formed at a height equal to or lower than the surface where the mating connector is inserted and removed (preferably at the same height as the board surface) so as to prevent any hindrance to the insertion and removal of cables (connectors) that connect to other boards.

In this way, by partially changing the height of the main control board box 1320 to match the height of the components mounted on the board, it is possible to prevent fraudulent attempts to install unauthorized components (circuits) on the main control board.

In FIG. 95, the base display 1317 is placed in the upper right part of the main control board 1310, but it is preferable to place the base display 1317 in a position where the player cannot easily see the display contents even if the main frame 4 is opened to a predetermined angle for maintenance purposes. For example, when the main frame 4 is opened to a predetermined angle for maintenance during business hours (to check whether there are game balls in the supply tank), if the player can see the display contents of the base display 1317, the player may not correctly understand how to read the display of the base display 1317, and may ask for an explanation of the display contents of the base display 1317. In order to prevent such complication, it is preferable to place the base display 1317 in a position where the player cannot easily see the display contents. Also, by placing the base display 1317 in this way, inquiries from players can be suppressed. That is, the base display 1317 displays a base value for a maximum of 52,000 out balls, but since this differs from the base value for a short period of play by the player, complaints may arise regarding the ball output rate. By locating the base display 1317 in this manner, complaints from players can be reduced. The same applies to the aforementioned bonus ratio display 1317, and it is advisable to locate the bonus ratio display 1317 in a position where it is difficult for players to see the displayed content.

As shown, the base display (7-segment LED) 1317 has a low height and is therefore mounted in a low height area of the main control board box 1320.

Figure 96 is a diagram showing the configuration of the main control I/O port 1314, and is a circuit diagram of an example in which the functional display unit 1400 and the base display 1317 are connected to different driver circuits 1334 as shown in Figure 93 (A). In this embodiment, an example in which the functional display unit 1400 and the base display 1317 are configured with light-emitting diodes (LEDs) is described, but they may be configured with lamps (light bulbs) or other light-emitting elements. The main control I/O port 1314 is disposed between the main control MPU 1311 and the base display 1317 or the functional display unit 1400, and outputs display data output from the main control MPU 1311 to the base display 1317 or the functional display unit 1400.

As described above, the main control I/O port 1314 includes a latch circuit 1333 and a driver circuit 1334.

The latch circuit 1333 captures the input data in accordance with the clock signal, holds it until the next clock signal or clear signal is input, and then outputs it. The driver circuit 1334 operates the switching transistors according to the input signal, and each outputs the power supply voltage (+12V) that is input to the VCC terminal of the driver circuit 1334.

Specifically, the latch circuit 1333 takes in bus data input to terminals D1 to D8 at the rising edge of the clock signal CK, and outputs it from terminals Q1 to Q8 to the driver circuit 1334. The driver circuit 1334 operates the switching transistors according to the signals input to terminals I1 to I8, and changes the voltages at terminals O1 to O8, respectively. The outputs O1 to O8 of the driver circuit 1334 are connected to the segment terminals of the 7-segment LED that constitutes the base display 1317 and the 7-segment LED of the function display unit 1400.

For example, to light up the 7-segment LED (7seg1) for the first digit on the base display 1317, the bus data D1 to D8 captured by the latch 2 (1333) is output by the driver 2 (1334) as segment data (LOW when illuminated) at the rising edge of CS1. The drive timing of the 7-segment LED on the base display 1317 is determined by the timing of the voltage applied to the common terminal. That is, the bus data D1 to D4 captured by the latch 1 (1333) is output by the driver 1 (1334) as common data (HIGH when driven) at the rising edge of CS0. Specifically, if the bus data D1 is HIGH at the rising edge of CS0, the COM1 output from the driver 1 (1334) becomes HIGH, and the 7-segment LED (7seg1) for the first digit on the base display 1317 is driven.

In order to light up the 7-segment LED of the functional display unit 1400, the bus data D1 to D8 captured in the latch 3 (1333) is output by the driver 3 (1334) as segment data (LOW when illuminated) at the rising edge of CS2. The drive timing of the 7-segment LED of the functional display unit 1400 is determined by the timing of the voltage applied to the common terminal (LED-C1). That is, at the rising edge of CS3, the bus data D1 to D4 captured in the latch 4 (1333) is output by the driver 4 (1334) as common data (HIGH when driven). Specifically, if the bus data D1 is HIGH at the rising edge of CS3, the O1 terminal of the driver 4 (1334) becomes HIGH, and the 7-segment LED (LED-C1) of the functional display unit 1400 is driven.

In this embodiment, the 7-segment LEDs in both the base display 1317 and the function display unit 1400 are anode common type, so current flows through the 7-segment LED from driver 1 to driver 2. Therefore, when the segment is lit, the output of drivers 1 and 4 is VCC (+12V), and the output of drivers 2 and 3 is GND (0V).

Note that the latches 1 and 4 (1333) on the common side directly output the data input from the data bus to the Q1 to Q8 terminals, but the latches 1 and 4 (1333) may also have a decoder function and output a signal from any of the Q1 to Q8 terminals according to the binary data obtained from the data bus.

Next, we will explain the signal output timing when the function display unit 1400 and the base display 1317 are connected to different driver circuits 1334, as shown in Figures 93(A) and 96.

The segment data sent from driver 2 (1334) to the base display 1317 and the common data sent from driver 1 (1334) to the base display 1317 are output in the same timer interrupt process. In addition, the segment data sent from driver 3 (1334) to the function display unit 1400 and the common data sent from driver 4 (1334) to the function display unit 1400 are also output in the same timer interrupt process. In other words, since both the common data and the segment data are sent to the base display 1317 and the function display unit 1400 via separate signal lines, both the display data for the base display 1317 and the display data for the function display unit 1400 are output in a single timer interrupt process.

Then, in the next timer interrupt process, common data that selects the next digit (group of LEDs) is output, and segment data that controls the lighting of each LED is output at the same timing as the common data output.

The display data for the base display 1317 and the display data for the function display unit 1400 are generated by different processes within the timer interrupt process and are output at different times within the timer interrupt process. That is, the main control MPU 1311 executes the base calculation/display code 13135 outside the game control area to generate and output the display data for the base display 1317. On the other hand, the main control MPU 1311 executes the game control code 13131 in the game control area to generate and output the display data for the function display unit 1400. These data are generated by different programs (codes) and are output at different times.

Next, we will explain modified examples of signal output timing when the function display unit 1400 and the base display 1317 are connected to different driver circuits 1334.

The segment data sent from driver 2 (1334) to the base display 1317 and the common data sent from driver 1 (1334) to the base display 1317 are output in the same timer interrupt process. Similarly, the segment data sent from driver 3 (1334) to the function display unit 1400 and the common data sent from driver 4 (1334) to the function display unit 1400 are output in the same timer interrupt process. The timer interrupt process that outputs the data to be sent to the base display 1317 is executed at a different timing from the timer interrupt process that outputs the data to be sent to the function display unit 1400, and it is preferable to execute them successively.

The process of outputting signals to the function display unit 1400 and the base display 1317 is executed according to programs (game control code 13131, base calculation/display code 13135) stored in different areas of the RAM 1312, but to prevent common signals from being sent at the same timing, it is preferable to use control data common to the two codes to control so that the timing of sending the common signals does not overlap. For example, a common counter shared by the game control code 13131 and the base calculation/display code 13135 is provided, and control is performed so that a common signal is output to the function display unit 1400 when the common counter is 0-3, and a common signal is output to the base display 1317 when the common counter is 4-7.

The process of outputting the common signal and the process of outputting the segment signal may be configured as separate subroutines or as one subroutine. The game control code 13131 for executing the process of outputting data to be sent to the function display unit 1400 and the base calculation/display code 13135 for executing the process of outputting data to be sent to the base display 1317 may call the subroutine at a timing determined by each program to output a signal to the function display unit 1400 or the base display 1317. In this case, the output of data to be sent to the function display unit 1400 and the output of data to be sent to the base display 1317 are not performed within the same timer interrupt process. Although the game control code 13131 and the base calculation/display code 13135 are executed within one timer interrupt process, the subroutines are called by different timer interrupt processes.

As shown in Figures 93(A) and 96, if the functional display unit 1400 and the base display 1317 are connected to different driver circuits 1334, even if noise is mixed in from a display (functional display unit 1400) provided outside the main control board 1310, the effect on the display (base display 1317) inside the main control board 1310 and the circuitry of the main control board 1310 can be suppressed.

Figure 97 shows the configuration of the main control I/O port 1314, and is a circuit diagram of an example in which the functional display unit 1400 and the base display 1317 are connected to a common driver circuit 1334 on the common side as shown in Figure 93 (B). The main control I/O port 1314 is disposed between the main control MPU 1311 and the base display 1317 or the functional display unit 1400, and outputs display data output from the main control MPU 1311 to the base display 1317 or the functional display unit 1400.

As described above, the main control I/O port 1314 includes a latch circuit 1333 and a driver circuit 1334. The circuit configuration included in the main control I/O port 1314 is the same as the circuit configuration described above, so the differences from the configuration example shown in FIG. 96 will be explained below.

In the example shown in FIG. 97, the operation for lighting the 7-segment LED of the base display 1317 is the same as the example shown in FIG. 96, but the common of the function display unit 1400 is the same as the common signal of the base display 1317.

To light up the 7-segment LED of the functional display unit 1400, the bus data D1 to D8 captured in the latch 3 (1333) is output by the driver 3 (1334) as segment data (LOW when illuminated) at the rising edge of CS2. The drive timing of the 7-segment LED of the functional display unit 1400 is determined by the timing of the voltage applied to the common terminal (LED-C1). That is, at the rising edge of CS0, the bus data D1 to D4 captured in the latch 1 (1333) is output by the driver 1 (1334) as common data (HIGH when driven).

In this way, by sharing the driver circuit between the base display 1317 and the functional display unit 1400, the circuit scale can be reduced. By reducing the number of parts, the failure rate is lowered and the size of the board can be reduced, making it easy to miniaturize the board unit (including the main control board 1310 and the main control board box 1320). In pachinko machines, the main control board 1310 does not use an inner layer pattern (a printed board with three or more layers), but uses a two-layer board with patterns only on the front and back sides. For this reason, even if parts can be physically arranged on the main control board 1310 composed of a two-layer board, it is not possible to secure an area for routing the wiring pattern, and the board must be larger than a multi-layer board with three or more layers, so miniaturization by reducing the number of parts is important.

Figure 98 is a timing diagram for the example configuration of the main control I/O port 1314 shown in Figure 97. In Figure 98, dotted lines perpendicular to the time axis indicate divisions of timer interrupt processing (start timings of timer interrupt processing).

During timer interrupt processing, the main control MPU 1311 outputs digit selection data to the data bus when it outputs CS0. Latch 1 (1333) selected by CS0 takes in D1 to D4 from the data bus when CS0 rises, and Driver 1 (1334) outputs common data (HIGH when driven) corresponding to the digit specified by D1 to D4.

Next, the main control MPU 1311 outputs the data of the segments to be lit on the function display unit 1400 to the data bus at the timing of outputting CS2. Latch 3 (1333) selected by CS2 takes in D1 to D8 from the data bus at the rising edge of CS2, and Driver 3 (1334) outputs the segment data specified by D1 to D8 (LOW when lit), lighting up the 7-segment LED on the function display unit 1400.

Then, when the main control MPU 1311 outputs CS1, it outputs the data of the segment to be lit on the base display 1317 to the data bus. Latch 2 (1333) selected by CS1 takes in D1 to D8 from the data bus when CS1 rises, and driver 2 (1334) outputs the segment data specified by D1 to D8 (LOW when lit), lighting up the 7-segment LED on the base display 1317.

Finally, the main control MPU 1311 sets all data on the data bus to 0 when it outputs CS0, CS1, and CS2. This erases the digit selection data set in latch 1 (1333) and the display data set in latches 2 and 3 (1333), and turns off the 7-segment LED.

In the next timer interrupt process, the main control MPU 1311 outputs the next digit selection data to the data bus at the timing of outputting CS0, and repeats the above-mentioned process to output the digit selection data and display data. In this way, the base display 1317 and the function display unit 1400 share a common driver circuit on the common side, and the segment data is output in a time-division manner, and the LED elements of the base display 1317 and the function display unit 1400 can be illuminated using the common data.

As shown in Figures 93(B) and 97, the function display unit 1400 and the base display 1317 are connected to a common driver circuit 1334, so the circuit scale of the main control board 1310 can be reduced, and it is easy to mount components on the main control board 1310 where high-density mounting (for example, the use of multi-layer boards or close placement of components) is not possible.

In addition, in order to control both the functional display unit 1400 and the base display 1317 with common common data in one timer interrupt process, segment data is output to the functional display unit 1400 and the base display 1317 at different timings during the period in which the common data is being output. As a result, while both the functional display unit 1400 and the base display 1317 are controlled by a common common data line, the display of both the functional display unit 1400 and the base display 1317 can be controlled within one timer interrupt process.

In the case shown in FIG. 98, the display data of the functional display unit 1400 is output first, and the display data of the base display 1317 is output later. Each display data is latched at the rising timing of the chip select (CS2, CS1) and erased at the rising timing of the chip select (CS0) corresponding to the erase data. Therefore, as shown in the figure, if the display data of the functional display unit 1400 is output first and the display data of the base display 1317 is output later, the display time of the functional display unit 1400 will be longer than the display time of the base display 1317. This is to prevent a decrease in visibility due to direct illumination by the lighting of the hall by lengthening the lighting time in one cycle of the LED of the functional display unit 1400 arranged on the front side of the pachinko machine 1 and increasing the brightness. In addition, since the base display 1317 is arranged on the back side, which is darker than the front side of the pachinko machine 1, even if the LED is illuminated at a low brightness, the impact on the visibility of the base display 1317 is small. That is, in the pachinko machine 1 of this embodiment, a first LED and a second LED are provided that are controlled by the main control MPU 1311, and the light emission brightness of the first LED is made higher than the light emission brightness of the second LED.

In addition, the display data for the base display 1317 may be output first, and the display data for the functional display unit 1400 may be output later, so that the display time of the base display 1317 is longer than the display time of the functional display unit 1400.

Figure 99 shows the changes in state (section) for calculating the base value.

The base display 1317 of the pachinko machine 1 of this embodiment switches between a provisional interval display and a confirmed interval display at predetermined time intervals (e.g., 5 seconds). The provisional interval display displays the base value of the interval being measured. Specifically, the top two digits display "bA." to indicate that base value A is being displayed, and the bottom two digits display the base value A being measured as a two-digit percentage. Note that if the integer part of the percentage of base value A is 99, "99" is displayed, if it is 100 or more, "99." is displayed, and if it is 0, "00" is displayed. Therefore, even if the base display 1317 has only two digits, it is possible to display whether base value A is 0% or 100%.

In addition, in the provisional interval display, if the number of low-probability/non-time-saving out balls is less than a specified number (e.g., 6,000 balls), the top two digits (or all four digits) will flash (e.g., 0.6 second cycle, with 0.3 second lights on and 0.3 second lights off), indicating that an accurate base value has not been measured. On the other hand, if the number of low-probability/non-time-saving out balls is equal to or greater than the specified number (e.g., 6,000 balls), the top two digits will light up, indicating that an accurate base value has been measured.

The confirmed interval display shows the base value of the previous interval. Specifically, the top two digits show "bb." to indicate that base value B is being displayed, and the bottom two digits show the base value of the previous interval (base value B, which is the final value of the bottom two digits of the previous period) as a two-digit percentage. Note that if the integer part of the percentage of base value B is 99, "99" is displayed, if it is 100 or greater, "99." is displayed, and if it is 0, "00" is displayed. Therefore, even if the base display 1317 has two display digits, it is possible to display whether base value B is 0% or 100%.

In the first section, the base value has not been measured because the previous section is a test section. For this reason, the confirmed section display shows a blinking "bb." in the top two digits and a blinking "--" in the bottom two digits.

In the pachinko machine 1 of this embodiment, a predetermined number of balls (e.g., 256 balls) that are less than 500 balls out from the first power-on is set as a test section, and the base value is not calculated. This is because, in the predetermined number of shots from the first power-on of the pachinko machine 1, the balls may vary within the range of probability distribution, and the base value is not stable, making it impossible to measure a meaningful base value. For this reason, in the test section, the base value is not displayed on the base display 1317, and the base value is undefined. Specifically, in the provisional section display, "bA." is displayed in the top two digits and "--" is displayed in the last digit, and in the final section display, "bb." is displayed in the top two digits and "--" is displayed in the last digit. In the test section, all digits of the base display 1317 are flashed to indicate that an accurate base value has not been measured. Note that the base value may also be calculated in the test section, and the calculated base value may not be displayed on the base display 1317, making the base value undefined.

The initial power-on here refers to the first power-on after the pachinko machine completes a turn on, or the state immediately after the initialization of the base calculation work area (S26 in FIG. 101, S8013 in FIG. 108) is performed. Also, the power-on as generally used in this specification refers to any power-on other than the initial power-on.

In addition, all LEDs of all digits on the base display 1317 may flash for a predetermined time after power is turned on or after the setting change mode or setting confirmation mode ends (from turning OFF the setting key 971).

Note that if an abnormality is detected in the data during inspection of the base calculation area 13128 (described below) and the data is erased, calculation of the base value will resume from the test section.

When the total number of out balls in all game states (jackpot, normal game, time-saving, non-time-saving, high probability, low probability, etc.) in each section other than the test section reaches 52,000, the next section is started and a new base value is measured. Note that the number of out balls in one section does not have to be 52,000, and may be any other number that is a predetermined value. For example, assuming that the operating time of the pachinko machine 1 is 10 hours per day, 60,000 balls, which is the daily operating time (number of out balls), may be used as the number of out balls in one section. Round numbers such as 50,000 or 100,000 may also be used.

The number of out balls in one section may be changed as appropriate. For example, a setting switch (DIP switch, rotary switch, etc.) may be provided on the main control board 1310, and the number of out balls in one section may be set according to the setting of the switch. The switch may be provided on the main control board 1310 provided on the back side of the pachinko machine 1, or on another board connected to the main control board 1310. Furthermore, when the setting of the switch is changed, the base calculation work area (base calculation area 13128) of the RAM 1312 may be initialized to restart the calculation of the base value from the test section, or from the beginning of the current section. Since a pachinko machine is operated frequently immediately after being introduced as a new machine, the number of out balls in one section is set to a large number, and after the operating period has passed, the number of out balls in one section is set to a small number. In other words, the pachinko machine 1 of this embodiment has a setting means that can set the operation that determines the length of the section that is the unit of the calculation of the base value, and when the power is turned on for the first time, the length of one section is set based on the operation set by the setting means.

As an example of the confirmed section display, the section immediately preceding the provisional section currently being measured will be described, but the base values of multiple confirmed sections (for example, sections 1 to 3 sections before) may be switched and displayed. In this case, the display may be switched from provisional section → confirmed section 1 → confirmed section 2 → confirmed section 3 at predetermined time intervals, or the display may be switched from provisional section → confirmed section 1 → confirmed section 2 → confirmed section 3 by operating a separately provided display change switch.

In this case, it is advisable to display the top two digits of the base display 1317 in the confirmed interval display differently for each confirmed interval, such as "b1", "b2", or "b3", rather than just "bb.", so that it is clear which interval is being displayed.

In this way, the base display 1317 switches between displaying the base value of the section currently being measured and the base value of the immediately preceding section or sections at predetermined intervals. Also, a part of the base display 1317 displays a distinguishable display content, and another part displays the measured base value.

Figure 100 shows an example of text displayed on the base display 1317.

As mentioned above, the base display 1317 is composed of a seven-segment LED with multiple digits (for example, four digits), and displays numbers and letters by lighting or blinking the segments of each digit. Numbers from 0 to 9 can be displayed, and letters can include the alphabets A, b, c, d, E, F, and L, as well as the - sign. Furthermore, a decimal point can be displayed at the same time as the numbers and letters. The figures show the number 6 and the number 9 displayed at the same time as the decimal point.

Figures 101 and 102 are flowcharts showing an example of the initialization process of a pachinko machine in this embodiment.

Compared to the initialization process described above in FIGS. 21 and 22, the initialization process shown in FIGS. 101 and 102 eliminates the check code calculation process (step S50) and the check code storage process (step S52). Therefore, the calculation of the check code in the base calculation area is performed in the base calculation process (step S8038) of the timer interrupt process. Note that the same steps as those in the initialization process described above in FIGS. 21 and 22 are given the same reference numerals, and detailed descriptions thereof will be omitted.

When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. The main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Next, the main control MPU 1311 starts the built-in watchdog timer (step S12) and determines whether a predetermined wait time (the time required for the sub-board (such as the peripheral control board 1510) to start) has elapsed (step S16). If the predetermined wait time has elapsed, it determines whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, it erases the data backed up in the work area of the built-in RAM 1312 except for the base calculation work area (base calculation area 13128) (step S30), and proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the internal RAM 1312 is not erased, and it is determined whether the power outage flag is set (step S20).

If the power outage flag is not set, the data in the work area of the internal RAM 1312 may be incorrect, so the data backed up in the work area (other than the base calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the power outage flag is set, the power outage flag is cleared and the checksum calculated from the data backed up in the work area of the internal RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

If the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of the built-in RAM 1312 may not be correct, so the data backed up in the work area (other than the base calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of the built-in RAM 1312 is correct, so the data backed up in the work area is not erased and the process proceeds to step S24.

Then, the check code is used to determine whether the base calculation work area (base calculation area 13128) is normal (step S24). If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S26).

In the pachinko machine 1 of this embodiment, cases in which at least a portion of the RAM 1312 is initialized include the operation of the RAM clear switch (step S18), a power outage flag abnormality where the power outage flag is not set (step S20), a RAM abnormality where the RAM checksum does not match (step S22), and an abnormality in the base calculation work (step S24). Of these, as shown in the figure, if the operation of the RAM clear switch is detected when the power is turned on, or in the case of a power outage flag abnormality or RAM abnormality, the game control area 13126 (including the game work area and game stack area) is cleared, and the base calculation area 13128 (including the base calculation work area and base calculation stack area) is not cleared. Also, in the case of an abnormality in the base calculation work, the base calculation area 13128 (outside the game control area) is cleared, and the game control area 13126 is not cleared.

Unlike the illustrated example, in the case of a power outage flag abnormality, a RAM abnormality, or a base calculation work abnormality, the validity of the data stored in the RAM 1312 is not guaranteed, so the entire RAM area including the game control area 13126 and the base calculation area 13128 may be cleared. If the memory configuration is such that clearing the entire RAM area in the case of a base calculation work abnormality would cause data indicating the game status to be lost and normal processing would be impossible, it is advisable to initialize only the base calculation work area and the base calculation stack area. Also, if operation of the RAM clear switch is detected when the power is turned on, as described above, the game control area 13126 (including the game work area and game stack area) is cleared, but the base calculation area 13128 does not need to be cleared.

When one or more backup areas are provided in the base calculation area 13128, the main area is first identified using a check code, and if the main area is identified as abnormal, backup areas 1, 2, and N are identified in that order, and the data from the backup area that is first identified as normal is copied to the main area. After that, the data in the backup area may be erased or left as is. If the main area is identified as normal, the data in the backup area may be erased or left as is.

In this way, in the pachinko machine 1 of this embodiment, the data backed up in the work area of the built-in RAM 1312 is erased under different conditions for each type of data (the game control area 13126 and the base calculation area 13128). That is, by operating the RAM clear switch, the backed up game control area 13126 is erased, but the backed up base calculation area 13128 is not erased. If the base calculation area 13128 can be erased by operating the RAM clear switch, the base value calculated by the pachinko machine 1 can be erased at any time. Therefore, by preventing the backed up base calculation area 13128 from being erased by the operation of the RAM clear switch, it is possible to prevent the base calculation area 13128 from being erased by the operation of the game center staff, and to prevent the concealment of abnormal base values. Therefore, it is possible to reliably detect gaming machines that have been modified to have a high or low base value.

When the power recovery setting of the RAM work area or the RAM initialization process is executed, the main control MPU 1311 executes an initial setting process (step S28) for setting various setting registers of the main control MPU 1311 (CPU 13111), a power-on command setting process (step S32) for sending to the peripheral control board 1510, and allows execution of interrupt processes including timer interrupt processes (step S34). Next, the main control MPU 1311 acquires a power outage warning signal (step S36) and determines whether the power outage warning signal is ON (step S38). If the power outage warning signal is not ON (the result of step S38 is "No"), it executes a random number update process (step S40).

On the other hand, if a power outage warning signal is detected (the result of step S38 is "Yes"), the main control MPU 1311 executes power-off processing (power-off setting means). In the power-off processing, first, interrupt processing is prohibited (step S42), the output ports are cleared, and the operation of the devices controlled by the output from each port is stopped (step S44). Next, the main control MPU 1311 calculates a checksum to determine whether the data stored in the backed-up work area has been properly retained (step S46), and stores the checksum calculation result in the checksum area of RAM 1312 (step S48).

Next, the data in the main area of the base calculation work (base calculation area 13128) is copied to each backup area (step S54). At this time, the calculated check code is also copied. Backup may be performed as appropriate in the base calculation process (for example, each time data is updated) rather than as a process when the power is turned off on the main board. In this way, by storing the data used to calculate the base value in the backup area together with the calculated (or predetermined) check code, the data for base calculation and the calculated base value can be retained even when the power is turned off, and the base value can be calculated for long-term operation.

The check code checked in step S24 is calculated in step S8038 (Figure 106) of the base calculation process. In the modified example described below, it is calculated in step S50 (Figure 22) of the initialization process.

Furthermore, a value indicating that the backup was successful is stored in the backup flag area as a power outage flag (step S56), and writing to RAM 1312 is prohibited by outputting "01H" indicating write prohibition to the RAM protect register (step S58), and the system waits until the power is restored from the power outage (infinite loop).

Figure 103 is a diagram showing the configuration of the base calculation area 13128 into which the feature ratio calculation area shown in Figure 26 (A) is replaced in the pachinko machine 1 of this embodiment.

The base calculation area 13128 is configured as a portion of the RAM 1312, and as described above, is provided separately from the game control area 13126 (outside the game control area).

The base calculation area 13128 includes storage areas for base value A, base value B, interval counter, total number of out balls, low probability/non-time-saving out balls, and low probability/non-time-saving prize balls.

The storage area for base value A is made up of 1 byte and stores the base value of the provisional section currently being measured. The storage area for base value B is made up of 1 byte and stores the base value measured in the section immediately before the provisional section. The storage area for the section counter is made up of 1 byte and stores a value indicating the section for which the base value is currently being measured. The section counter is updated every time the section is switched and is used to control the display content, which differs depending on the section. The section counter should be controlled to take any of the values 0, 1, or 2, i.e., not to exceed 2. Specifically, the section counter = 0 in the test section, the section counter = 1 in the first section, and the section counter = 2 from the second section onwards. The section counter may also be controlled to take a value between 0 and 255 and not to exceed 255, and from the second section onwards the section counter = 2 or more.

The storage area for the total number of out balls consists of 2 bytes, and stores all the numbers of out balls that are not dependent on the game state (i.e., a value indicating the operation of the game machine). The total number of out balls is used to determine the switching of intervals, which are the base measurement unit. In the pachinko machine of this embodiment, the operation of roughly one day is considered as one interval, and the base value in each interval is measured. For this reason, 2 bytes (65,536) are allocated to the storage area for the total number of out balls. As mentioned above, the total number of out balls is a memory area for counting all the numbers of out balls that are not dependent on the game state for each interval, and is different from the total number of out balls in the previously described embodiment (the total value of the number of out balls during the special prize from the start of operation of the pachinko machine 1).

The storage area for the low probability, non-time-saving out ball count is configured with 2 bytes or more (preferably 4 bytes) and stores the number of out balls (the number of out balls in a game state other than during a special prize) for calculating the base value.The storage area for the low probability, non-time-saving prize ball count is configured with 2 bytes or more (preferably 4 bytes) and stores the number of prize balls (the number of prize balls in a game state other than during a special prize) for calculating the base value.Note that the storage area for the low probability, non-time-saving out ball count and the storage area for the low probability, non-time-saving prize ball count can be 2 bytes or more, but considering the calculation process of the base value, it is preferable to have the same number of bytes.

The memory capacity (number of bytes) of each of the above-mentioned storage areas is merely an example, and should be determined according to the number of out balls in one section.

In addition, when a main area and a backup area are provided for the base calculation area 13128, memory areas of the same configuration are provided in the RAM 1312.

Figure 104 is a flowchart showing an example of timer interrupt processing in a pachinko machine of this embodiment.

Compared to the timer interrupt process described above in FIG. 23, the timer interrupt process shown in FIG. 104 has a base calculation process (step S801) instead of the reel ratio calculation area update process in step S81, and the reel ratio calculation and display process in step S89 is deleted. Note that the same steps as those in the timer interrupt process described above in FIG. 23 are given the same reference numerals, and detailed explanations thereof are omitted.

When the timer interrupt process starts, the main control MPU 1311 executes the main control program to first set the RBS (register bank selection flag) in the program status word to 1 and switch the register (step S70).

Next, the main control MPU 1311 executes switch input processing (step S74), timer update processing (step S76), random number update processing 1 (step S78), and prize ball control processing (step S80).

Then, the main control MPU 1311 refers to the current game state, adds the number of prize balls paid out as game value to an area corresponding to the current game state, updates the base calculation area 13128 (see FIG. 103) of the main control built-in RAM 1312, and calculates the base value (step S801). Details of the base calculation process will be described later using FIG. 105 and FIG. 106. The base calculation process (step S801) may be executed in any order after the prize ball control process (step S80), but it is preferable to execute it in an early order to ensure that it is executed at every timer interrupt.

Then, the main control MPU 1311 executes a frame command receiving process (step S82), a fraudulent behavior detection process (step S84), a special symbol and special electric device control process (step S86), a normal symbol and normal electric device control process (step S88), an output data setting process (step S90), and a peripheral control board command sending process (step S92).

Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). Finally, the main control MPU 1311 switches (restores) the register bank. When the above processing is completed, the timer interrupt processing is terminated and processing before the interrupt is restored.

In this way, in the pachinko machine of this embodiment, the base value is measured using timer interrupt processing, so the base value can be measured in real time during play.

Figures 105 and 106 are flowcharts showing an example of the base calculation process.

The base calculation process (step S801) is called from the timer interrupt process and executed by the main control MPU 1311.

The main control MPU 1311 executes the base calculation program to first determine whether there is an error in the calculation of the base value (step S8011). For example, as described above, if there is an abnormality in the winning entry sensor (general winning entry sensor 3015, first start entry sensor 2104, second start entry sensor 2551, first large winning entry sensor 2114, second upper large winning entry sensor 2554, second lower large winning entry sensor 2557, etc.) or the discharged ball sensor (board side discharged ball sensor 3060A, frame side discharged ball sensor 3060B), the abnormal signal output from the interface circuit 1331 determines that there is an error that makes it impossible to accurately calculate the base value. In addition, if it is determined that fraudulent activity is occurring (for example, the magnetic detection sensor detects magnetism, the vibration detection sensor detects vibration, or the radio wave detection sensor detects radio waves), it also determines that there is an error that makes it impossible to accurately calculate the base value. If it is determined that there is an error, the display of the base indicator 1317 may be turned off. In step S8011, errors that result in the halt of play (e.g., magnetic, vibration, radio wave errors, etc.) may be determined to be errors (YES), while errors that do not result in the halt of play (e.g., prize ball abnormalities, open door, etc.) or malfunctions that are not directly related to the base calculation (out of supply, full tank error, etc.) may be determined to be not errors (NO). In other words, even if some of the multiple types of abnormal conditions are present, the base calculation process may be executed, but if other abnormalities are present, the base calculation process may not be executed.

Next, the main control MPU 1311 obtains the number of out balls (step S8014). As described above, the number of out balls is detected by the launched ball sensor 1020, the discharged ball sensor 3060, etc., and in the switch input process of step S74, the detection signals of these sensors are read, and if a sensor detection signal is present, the number of out balls = 1 is obtained. If out balls are detected by multiple discharged ball sensors 3060, the total number detected by each sensor is obtained as the number of out balls. In other words, multiple out balls may be detected in one timer interrupt process.

Next, the main control MPU 1311 obtains the number of prize balls (step S8015). As described above, the number of prize balls is calculated based on the input information in the prize ball control process in step S80. The number of prize balls obtained in the base calculation process may be the number of prize balls for which the payout has been decided. It may also be the number of prize balls corresponding to a payout command that has already been created. It may also be the number of prize balls corresponding to a payout command that has already been sent. It may also be the number of prize balls corresponding to a payout command that the main control board 1310 sent to the payout control board 951 and received an acknowledgement of receipt (ACK) from the payout control board 951. It may also be the number of prize balls (number of paid-out prize balls) for which the main control board 1310 sent a payout command to the payout control board 951 and received a payout completion report from the payout control board 951. This variation is as described using Figures 41 to 44.

Next, the main control MPU 1311 determines whether an out ball was detected in step S8014 (step S8016). If an out ball was not detected, the process proceeds to step S8022 without executing any processing related to the out ball. On the other hand, if an out ball was detected, the number of detected out balls is added to the total number of out balls stored in the base calculation area 13128 (step S8017).

Next, the main control MPU 1311 refers to the section counter stored in the base calculation area 13128 to determine whether the current section is a test section (step S8018). The test section is a section in which the number of out balls is a predetermined value less than 500 balls from the first power-on of the pachinko machine (or the initialization of the base calculation area 13128), and the value of the section counter is the initial value 0. Therefore, if the section counter value is 0, it can be determined that the section is a test section. If the section is a test section, there is no need to calculate the base value, so proceed to step S8028. On the other hand, if the section is not a test section, it is determined whether the current game state is during a special prize (step S8019). The determination of whether the game is during a special prize can be made in the same manner as in step S810 of FIG. 39 described above. The game state is during a special prize when the big prize openings 2005 and 2006 are open due to a big prize and the player can win many prize balls, but it may also include the opening and ending times of the big prize game. In the case where the large prize openings 2005, 2006 are repeatedly opened and closed during one big win, this may include the time between the closing of the large prize opening and the next opening (the closing interval). In other words, the special prize period in step S810 means that the condition device is operating, for example, from the determination of the big win pattern in the special pattern variable display game to the end of the ending. It may also include the entire time during which the right hit command is given.

Furthermore, in the start ports 2002 and 2004, the special prize may include the time during the time-saving mode, the probability of winning (ST mode), and the electric support mode. Furthermore, in game states other than the time-saving mode, the probability of winning (ST mode), and the electric support mode, the special prize may include the time from the opening of the start port 2004 to a predetermined time after the closing (for example, the few seconds required for a ball that entered the start port to be detected as an out ball). Note that the so-called "latent game state" in which the game state is a high probability game state but is not in the time-saving mode (electric support mode) is not included in the special prize, and the base value may be calculated using the number of winning balls and the number of out balls in that game state, as in the normal state (low probability, non-time-saving state). In this case, the base value may be calculated separately for each of the normal game state and the latent game state, and the base value may be displayed so that it is possible to distinguish which base display is being used.

The latent game state is a game state in which even if the probability is high, the player is not aware that it is a high probability state. However, if the latent game state is excluded from the calculation of the base value, when the slot is opened during business hours, the player may look at the base display 1317 and realize that the game state is latent (i.e., high probability). In other words, when the slot is open and the hall employee places a ball in the winning hole or lets the ball go into the winning hole, the player can know the game state by whether the base display changes. By calculating the base value without distinguishing between the normal game state and the latent game state, such problems can be avoided.

On the other hand, for the purposes of hall operations, it may be necessary to manage the base value in low probability/non-time-saving states, and if the base value is calculated including the latent game state, it may not be possible to manage it in accordance with the hall's business format. This type of problem can be avoided by calculating the base value excluding the latent game state. The same problem can be avoided by calculating the base value separately for the normal game state and the latent game state. In other words, since the normal game state and the latent game state are different game states to begin with, depending on the business format of the hall, it may be desirable to manage (inspect) the base value separately for each game state.

When calculating the base value separately for the normal game state and the latent game state, the base value may be calculated using a dedicated calculation process for each game state, or the base value may be calculated using a common calculation process. By calculating the base value using a common calculation process, the processing load on the CPU can be reduced, and the program capacity can be reduced.

The electrically operated parts provided in the pachinko machine 1 of this embodiment are divided into two types from the viewpoint of calculating the base value. As described above, in the gaming machine of this embodiment, the special prize period for the large prize openings 2005 and 2006 is when the condition device is operating (for example, from the confirmation of the jackpot pattern of the special pattern variation display game to the end of the ending), and the base value is calculated using the number of prize balls and out balls other than during the special prize period, so normal winning (during the so-called jackpot) in the large prize openings 2005 and 2006 is not used to calculate the base value. On the other hand, for the starting opening 2004 (so-called electric tulip) having an opening and closing member, winning balls and prize balls other than during the special prize period (when there is a low probability or when there is no time reduction) are used to calculate the base value. In other words, among the electrically operated devices, some devices (large prize openings 2005, 2006) do not use the number of winning balls and the number of prize balls in calculating the base value regardless of the game status (whether or not a special prize is being awarded), while the other devices (starting opening 2004) switch between using or not using the number of winning balls and the number of prize balls in calculating the base value depending on the game status (whether or not a special prize is being awarded).

The large prize openings 2005 and 2006 may be opened (as a small prize) even if the condition device is not activated. Small prizes generally occur during time-saving and are only open for a short time, so the probability of a game ball winning is low, and they do not affect the calculation of the base value. However, small prizes may be generated outside of the special prize period (normal time) and the opening may be opened only for a time when the probability of a game ball winning is high. In this case, the winning balls and prize balls entering the large prize openings 2005 and 2006 in small prizes that occur outside of the special prize period may be used to calculate the base value. In this way, the expected value (design value) of the base value can be changed by controlling the probability of a small prize occurring outside of the special prize period. In other words, a pachinko machine that can flexibly respond to base value standards can be provided, and the degree of freedom in design can be improved.

If the game is in a special prize state, the out balls are not related to the calculation of the base value, so the number of low-probability, non-time-saving out balls is not updated and the process proceeds to step S8022. On the other hand, if the game is not in a special prize state, the number of out balls detected in step S8014 should be used to calculate the base, so the number of detected out balls is added to the number of low-probability, non-time-saving out balls stored in the base calculation area 13128 (step S8020). Then, the update flag is set to 1 (step S8021). The update flag is set to 1 when an out ball or prize ball other than a special prize is detected each time the base calculation process (timer interrupt process) is executed, and indicates the timing at which the base value should be calculated (see steps S8026 to S8027).

Next, the main control MPU 1311 determines whether a prize ball was detected in step S8015 (step S8022). If a prize ball was not detected, the process proceeds to step S8026 without executing any processing related to the prize ball. On the other hand, if a prize ball was detected, the process determines whether the current game state is during a special prize (step S8023). The determination of whether a special prize is being awarded may be made in the same manner as in step S8019.

If the game is in a special prize state, the number of low probability/non-time-saving prize balls is not updated since the prize balls are not related to the calculation of the base value, and the process proceeds to step S8026. On the other hand, if the game is not in a special prize state, the number of prize balls detected in step S8015 should be used to calculate the base, and the detected number of prize balls is added to the number of low probability/non-time-saving prize balls stored in the base calculation area 13128 (step S8024). Then, the update flag is set to 1 (step S8025).

Next, the main control MPU 1311 determines whether the update flag is 1 (step S8026). If the update flag is 1, an out ball or prize ball other than the special prize has been detected in the base calculation process (timer interrupt process), so the number of low-probability, non-time-saving prize balls is divided by the number of low-probability, non-time-saving out balls to calculate a base value, and the base value is stored in the base value A storage area of the base calculation area 13128 (step S8027).

Next, the main control MPU 1311 refers to the section counter to determine whether it is in a test section (step S8028). If the section counter value is 0, indicating that it is a test section, it is determined whether it is time to end the test section (step S8029). A test section is a section in which the number of out balls is a predetermined value less than 500 from the time the pachinko machine is first turned on (including the initialization of the base calculation area 13128), and if the section counter indicates that it is a test section and the total number of out balls is equal to or greater than the predetermined value, it can be determined that it is time to end the test section.

If it is not time to end the test section, the process proceeds to step S8034 without updating the base calculation area 13128 in order to continue the test section. On the other hand, if the test section is in progress and it is time to end the test section, the process proceeds to step S8032 in order to transition from the test section to the first section. Specifically, the main control MPU 1311 adds 1 to the section counter (step S8032). The section counter changes from 0, which represents the test section, to 1, which represents the first section. Then, the total number of out balls, the number of low probability/non-time-saving out balls, and the number of low probability/non-time-saving prize balls are initialized to 0 (step S8033). This process ends the test section and transitions to the first section.

On the other hand, if it is determined in step S8028 that the section counter value is not 0 and that the test section is not in progress, the main control MPU 1311 determines whether the total number of out balls is 52,000 or more (step S8030). If the total number of out balls is less than 52,000, the process proceeds to step S8034 to continue the current section.

On the other hand, if the total number of out balls is 52,000 or more, the section ends and the process to start a new section (steps S8031 to S8033) is executed. Specifically, the main control MPU 1311 reads the base value A from the base value A storage area in the base calculation area 13128 and writes it to the base value B storage area (step S8031). Then, 1 is added to the section counter (step S8032). As described above, the section counter is controlled so that it does not become any of the values 0, 1, or 2, i.e., does not become greater than 2. Therefore, even if 1 is added to the section counter when the section counter value is 2, the section counter value does not increase and remains at 2. Then, the total number of out balls, the number of low probability and non-time-saving out balls, and the number of low probability and non-time-saving prize balls are initialized to 0 (step S8033), and the process moves to the next section.

Next, the main control MPU 1311 determines whether the update flag is 1 (step S8034). If the update flag is 1, data for displaying the newly calculated base value is generated (step S8035). Details of the base display data generation process will be described later with reference to FIG. 107. Thereafter, the main control MPU 1311 sets the update flag to 0 (step S8036).

Next, the main control MPU 1311 adds 1 to the display switching counter (step S8037). The display switching counter is used to switch between the provisional section display and the final section display described in FIG. 99 at a predetermined time interval (e.g., 5 seconds). The predetermined time for switching between the provisional section display and the final section display should be set to a time sufficiently longer than the cycle of the blinking display (the blinking display controlled in step S8051 in FIG. 107) when the number of low-probability, non-time-saving out balls in each section is less than 6,000. This is to make it easier to tell whether the display is blinking or switching, since if the blinking and the display switching have similar cycles, it becomes difficult to tell whether the blinking display (i.e., whether the number of low-probability, non-time-saving out balls is less than 6,000) is clear.

Next, the main control MPU 1311 calculates a check code (e.g., a checksum) from the data in the base calculation area 13128 (step S8038). The check code is calculated using the same calculation method as that used in the process of calculating the check code in step S50 of the initialization process (FIG. 22). If the check code is to be set as a fixed value without being calculated, it is preferable to set the check code to a multi-byte value in which adjacent bits are not the same value (for example, if it is 2 bytes, it is A55AH (1010010101011010B)). Fixed values may also be arranged separately instead of being set in consecutive areas. For example, a first fixed value is stored at the beginning of the base calculation area 13128, a second fixed value is stored in the middle, and a third fixed value is stored at the end. If the check code is a fixed value, it is preferable to configure it with a number of bytes greater than the check data calculated by the checksum, thereby improving the possibility of determining a RAM abnormality.

In this way, according to the base calculation process of this embodiment, the base value is calculated and displayed for each timer interrupt process, so that the base value can be displayed without delay (in real time) each time a winning ball or an out ball is generated, and it can be determined without delay whether the base value is normal or abnormal. Furthermore, since the capacity of the base calculation area 13128, which is the memory area used for base calculation, is extremely small compared to the capacity of the game control area 13126, the impact on the processing load of the main control MPU 1311 is small even if the check code is calculated at the end of each execution of the base calculation process.

In addition, when the base value for prize balls is calculated and displayed using the number of prize balls scheduled to be paid out based on the winning signal that has been generated, the timing at which the base value is calculated and displayed differs from the timing at which the prize balls are paid out. In other words, even if an abnormality occurs in the payout device and prize balls cannot be paid out (such as when the supply runs out, the upper tray is full, the payout device stops due to a failure of the payout number count sensor installed in the prize ball passage, or a failure of the payout motor), the base value is still calculated and displayed.

In the above-mentioned base calculation process, the base value is calculated using the number of out balls detected in the timer interrupt process and the calculated number of winning balls each time the base calculation process is called from the timer interrupt process, but the base value may also be calculated each time the discharge ball sensor 3060 detects an out ball and each time the various winning port sensors detect a winning ball. In other words, in one timer interrupt process, the base value calculation process is called multiple times and the base value is calculated multiple times. In this way, even if the timing for switching the aforementioned sections (when the number of out balls is 52,000) arrives during one base calculation process, it is possible to distinguish whether the base value for the previous or next section is to be calculated, and an accurate base value can be displayed in real time.

Also, as in steps S815 to S817 of the base calculation area update process (Figure 46) described above, it may be determined whether there is an abnormality in the number of prize balls, and if there is an abnormality in the number of prize balls, an abnormality notification command may be generated and the prize ball abnormality notification timer may be reset. Furthermore, as in steps S824 to S825, it may be determined whether the prize ball abnormality notification timer has timed out, and if the prize ball abnormality notification timer has timed out, a prize ball abnormality notification stop command may be generated and the prize ball abnormality notification may be stopped.

Figure 107 is a flowchart showing an example of the base display data generation process.

The base display data generation process is called and executed from step S8035 of the base calculation process.

The main control MPU 1311 executes the base display data generation program to first determine whether the display switching counter is less than 1250 (step S8041). Because the timer interrupt process described above is executed every 4 milliseconds, when the display switching counter reaches 1250, 5 seconds have passed since the display switching counter was initialized to 0. In step S8053, when the display switching counter reaches 2499, it is initialized to 0, so that while the display switching counter is between 0 and 1249, the processes of steps S8042 to S8045 are executed, and while the display switching counter is between 1250 and 2499, the processes of steps S8046 to S8049 are executed. For this reason, in the base display data generation process of this embodiment, the display data of the base display 1317 is switched every 5 seconds.

If the display switching counter is less than 1250, data is generated to display "bA." in the top two digits of the base display 1317 (step S8042). The main control MPU 1311 then references the section counter stored in the base calculation area 13128 to determine whether the current section is a test section (step S8043). Since the base value has not been calculated in the test section, data is generated to display "--" in the bottom two digits (step S8044). On the other hand, if the current section is not a test section, data is generated to display the base value A currently being measured in the provisional section (step S8045).

If it is determined in step S8041 that the display switching counter is 1250 or greater, data is generated to display "bb." in the top two digits of the base display 1317 (step S8046). The main control MPU 1311 then references the section counter stored in the base calculation area 13128 to determine whether the current section is the test section or the first section (step S8047). Since the base value was not measured in the past confirmed section in the test section or the first section, data is generated to display "--" in the last two digits (step S8048). On the other hand, if the current section is neither the test section nor the first section, data is generated to display the base value B measured in the most recent confirmed section (step S8049).

Next, the main control MPU 1311 refers to the number of low probability, non-time-saving out balls stored in the base calculation area 13128 and determines whether the number of low probability, non-time-saving out balls is less than 6000 (step S8050). If the number of low probability, non-time-saving out balls is less than 6000, the number of operations (number of out balls) after the base value measurement began in that section is small, so the base value may not be stable, and the display on the base display 1317 is controlled to flash (step S8051). On the other hand, if the number of low probability, non-time-saving out balls is 6000 or more, the display on the base display 1317 is controlled to be lit without flashing (step S8052).

Next, the main control MPU 1311 determines whether the display switching counter is equal to or greater than 2499 (step S8053). If the display switching counter is less than 2499, the display switching counter is not initialized, and the process proceeds to step S8055. On the other hand, if the display switching counter is equal to or greater than 2499, one repetition has ended, and the display switching counter is initialized to 0 (step S8054).

Finally, the main control MPU 1311 generates a display pattern based on the generated display data and the specified lighting state (lighting or blinking) (step S8055).

In this way, in the timer interrupt process (base calculation process) that is executed at predetermined time intervals, the display switching counter that is periodically updated is used to switch the display content on the base display 1317, making it possible to clearly display the base value A currently being measured in the provisional section and the base value B previously measured in the confirmed section.

In addition, in each section, the base value flashes in the range where it is unstable, so you can easily check from the display on the base display 1317 whether the base value is in a stable range or not.

Figure 108 is a flowchart showing a modified example of the base calculation process. The modified example shown in Figure 108 is the same as the base calculation process shown in Figure 105, except that a check process for the work for base calculation (steps S8012, S8013) has been added. Note that Figure 108 explains up to the calculation of base value A (step S8027) of the base calculation process, but the processes from steps S8028 to S8038 are the same as those in Figure 106 described above.

The main control MPU 1311 first determines whether there is an error in the calculation of the base value by executing the base calculation program (step S8011).

Next, the main control MPU 1311 uses the check code to determine whether the base calculation work area (base calculation area 13128) is normal (step S8012). If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S8013).

When one or more backup areas are provided in the base calculation area 13128, the main area is first identified using a check code, and if the main area is identified as abnormal, backup areas 1, 2, and N are identified in that order, and the data from the backup area that is first identified as normal is copied to the main area. After that, the data in the backup area may be erased or left as is. If the main area is identified as normal, the data in the backup area may be erased or left as is.

In the illustrated example, it is determined whether there is an error in the calculation of the base value (step S8011), and then it is determined whether the base calculation area 13128 is normal (step S8012). However, conversely, it may be determined whether the base calculation area 13128 is normal (step S8012), necessary processing based on the determination result is performed, and then it is determined whether there is an error in the calculation of the base value (step S8011).

The subsequent processing (from step S8014) is the same as that described above in Figures 105 and 106, so the explanation will be omitted.

In the base calculation process shown in FIG. 108, a check is made every time a timer interrupt occurs (i.e., every 4 milliseconds) to see if the data in the base calculation area 13128 is normal, so that any abnormalities in the base calculation area 13128 can be detected early and the display of an abnormal base value can be suppressed.

Next, a method of determining whether the base calculation area 13128 is abnormal in the pachinko machine of this embodiment will be described. The values used to calculate the base value and the calculated base value are stored in the base calculation area 13128 of the work area of the built-in RAM 1312 (the "game ratio calculation area 13128" shown in FIG. 26 can be read as "base calculation area 13128"), and it is determined whether the data is normal at a predetermined timing. There are the following variations in the process (timing) at which the normal/abnormal determination step and the check code calculation step are performed.
101 and 106: The check code calculated in the base calculation process (timer interrupt process) is judged when the power is turned on.
21 and 22: The check code calculated when the power is turned off is checked when the power is turned on (initialization process).
106 and 108: The check code calculated in the base calculation process (timer interrupt process) is judged in the base calculation process (timer interrupt process).

(The check code is calculated at each timer interrupt and judged when the power is turned on.)
First, the process of determining the check code calculated in the base calculation process (timer interrupt process) at power-on will be described with reference to FIGS.

If the initialization process is as shown in Figures 101 and 102 and the base calculation process is as shown in Figures 105 and 106, in step S8038 of the base calculation process (Figures 105 and 106), a check code (e.g., a checksum) is calculated from the data in the base calculation area 13128.

In addition, in step S24 of the initialization process (Figs. 101 and 102), the check code is used to determine whether the base calculation work area (base calculation area 13128) is normal. If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S26).

When the data in the base calculation area 13128 is erased, the state for calculating the base value is initialized, so the calculated base value is cleared and the calculation of the base value starts from the test period.

When one or more backup areas are provided in the base calculation area 13128, the main area may first be judged using a check code, and if the main area is judged to be abnormal, backup areas 1, 2, and N may be judged in that order, and the data from the backup area that is first judged to be normal may be copied to the main area to restore the data in the base calculation area 13128. After that, the data in the backup area may be erased or left as is. If the main area is judged to be normal, the data in the backup area may be erased or left as is.

In this case, the check code is judged less frequently, and the consumption of computational resources (main control MPU 1311) required for abnormality judgment can be reduced.

(The check code is calculated when the power is turned off and judged when the power is turned on.)
Next, a process of judging the check code calculated when the power is cut off when the power is turned on (initialization process) will be described with reference to FIGS. 21 and 22. FIG.

If the initialization process is as shown in Figures 21 and 22 and the base calculation process is as shown in Figures 105 and 106, in step S50 of the power-off process of the initialization process (Figures 21 and 22), a check code (e.g., checksum) is calculated from the data in the base calculation work area (base calculation area 13128).

In addition, in step S24 of the initialization process (FIGS. 21 and 22), the check code is used to determine whether the base calculation work area (base calculation area 13128) is normal. If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S26).

In this case, calculation of the check code in step S8038 of the base calculation process may be omitted.

In this case, the frequency of calculation and judgment of the check code is reduced, and the consumption of calculation resources (main control MPU 1311) required for abnormality judgment can be reduced.

(The check code is calculated and judged by timer interrupt processing)
Next, a process of determining the check code calculated in the base calculation process (timer interrupt process) in the base calculation process (timer interrupt process) will be described with reference to FIGS. 106 and 108. FIG.

If the base calculation process is as shown in Figures 108 and 106, in step S8038 of the base calculation process (Figures 108 and 106), a check code (e.g., a checksum) is calculated from the data in the base calculation area 13128.

In addition, in step S8012 of the base calculation process (FIGS. 108 and 106), the check code is used to determine whether the base calculation work area (base calculation area 13128) is normal. If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S8013).

In this case, the initialization process is as shown in Figures 101 and 102, and the steps of determining whether the base calculation work area is normal in steps S24 and S26 may be omitted.

In this case, abnormalities in the base calculation area 13128 can be detected more quickly than in the previously described case.

When using a fixed value instead of a checksum as the check code, the timing of setting the check code and judging it may be the same as the timing of calculating the checksum and judging it. Also, it is possible to use both a checksum and a fixed value as the check code for judgment.

Figure 109 shows the calculation of the base value when the game state changes.

A game ball enters the starting hole 2004 (electric tulip) while it is open, and then a predetermined number of variable display games are completed, the time-saving state ends, and the normal state is restored. After that, in the normal state, it is assumed that another game ball enters the starting hole 2004 while it is open.

In the pachinko machine 1 of this embodiment, the second special symbol is displayed variably on the second special symbol display device in accordance with the winning of the starting hole 2004. In other words, a variable display game is played in which the second special symbol is displayed variably in relation to any winning of the starting hole 2004 as shown in the figure.

In addition, in the pachinko machine 1 of this embodiment, the out balls during the special prize are not used in the base calculation, so the first winning ball that enters the starting hole 2004 is not added to the low probability/non-time-saving out ball count, but the second winning ball is added to the low probability/non-time-saving out ball count.

The above explains what happens when the time-saving mode ends, but the same applies when the special mode ends due to ST.

In addition to when the time-saving state described above ends, the same phenomenon also occurs when a jackpot occurs in the special symbol change display game. Assume that in the normal state, one game ball enters the starting hole 2004 (electric tulip) while it is open, then the jackpot state begins, and furthermore, a game ball enters the starting hole 2004 while it is open.

In this case, a variable display game is also played in which the second special symbol is displayed in a variable manner in relation to the winning of any of the starting holes 2004. On the other hand, since the out balls during the special prize are not used in the base calculation, the first winning ball in the starting hole 2004 is added to the low probability/non-time-saving out ball count, but the second winning ball is not added to the low probability/non-time-saving out ball count.

Furthermore, a similar phenomenon occurs when a specific error occurs. Assume that under normal conditions, one game ball enters the starting hole 2004 (electric tulip) while it is open, and then a specific error occurs, and then another game ball enters the starting hole 2004 while it is open. As described above, in the pachinko machine 1 of this embodiment, when a specific error occurs (when an abnormal signal output from the interface circuit 1331 determines that there is an error that makes it impossible to accurately calculate the base value), the out ball is not used in the base calculation.

In this case, a variable display game is also played in which the second special symbol is displayed in a variable manner in relation to a winning entry into any of the starting holes 2004. On the other hand, since the out ball during a specific error is not used in the base calculation, the first winning ball into the starting hole 2004 is added to the low probability/non-time-saving out ball count, but the second winning ball is not added to the low probability/non-time-saving out ball count.

In other words, in the pachinko machine 1 of this embodiment, under certain conditions (such as when the time-saving feature ends, when a jackpot occurs in the special symbol change display game, or when a specific error occurs), multiple game balls that win while the electric device is in operation may or may not be used to calculate the base value, and the special symbol change can be initiated in either case.

In addition, in the pachinko machine 1 of this embodiment, with regard to the look-ahead performance of the pending special symbol change display game, the first winning entry into the start port 2004 in the time-saving state may not be subject to the look-ahead performance, and the second winning entry into the normal state may be subject to the look-ahead performance. Conversely, the first winning entry into the start port 2004 in the time-saving state may be subject to the look-ahead performance, and the second winning entry into the normal state may not be subject to the look-ahead performance.

Note that while we have explained the timing for changing from the time-saving state to the normal state, the same applies to the timing for changing from the special state (ST) or electric support state to the normal state.

[10. Memory switching during processing outside the game control area]
Next, switching of the memory used by the CPU in processing outside the game control area (for example, base calculation processing) will be described.

Figure 110 shows the internal configuration of the main control MPU 1311, including the configuration related to the memory area.

The main control MPU 1311 is configured as shown in FIG. 18 as a whole, but FIG. 110 shows the configuration regarding the memory area in detail.

The main control MPU 1311 is provided with a RAM 1312, a ROM 1313, and an auxiliary storage unit 13142 in the CPU as storage areas for storing data. The auxiliary storage unit 13142 in the CPU temporarily stores data (e.g., flags indicating the state of the calculation result, the execution state of the program, data input/output to the CPU 13111, etc.) when the CPU 13111 executes the program. The auxiliary storage unit 13142 in the CPU temporarily stores, for example, random numbers updated in the random number update process (step S40 in FIG. 22) and intermediate values in the random number update calculation. In addition, the address of the subroutine to be executed and the address of the jump destination are temporarily stored in the auxiliary storage unit 13142 in the CPU, so that the processor core 13141 executes the process corresponding to the stored address. Furthermore, the auxiliary storage unit 13142 temporarily stores values input to the port from various switches connected to the main control board 1310 (e.g., values in the middle of creating edge information of the signal input from the switch, and the detection result of the edge information).

In addition, when a random number is obtained at the time of winning the start gate and stored in the reserved memory area, the random number value is temporarily stored in the auxiliary memory unit 13142 in the CPU, and the temporarily stored random number value is stored in the reserved memory area of the RAM 1312. In addition, when a random number is obtained at the time of winning the start gate and a look-ahead judgment (a win/lose judgment at the time of winning the start gate) is made based on the value of the random number, the look-ahead judgment may be made based on the random number value temporarily stored in the auxiliary memory unit 13142 in the CPU, or the random number value stored in the reserved memory area may be read (again) into one of the memory areas of the auxiliary memory unit 13142 in the CPU to make the look-ahead judgment.

The intra-CPU auxiliary memory unit 13142 is provided separately from the memory space configured by the RAM 1312 and ROM 1313 and specified by addresses, and is identified by the name of each storage area (e.g., Area0) included in the intra-CPU auxiliary memory unit 13142. The intra-CPU auxiliary memory unit 13142 includes a switching unit 13143, a switching register 13144, and multiple auxiliary memory areas 13145A-C.

Auxiliary memory areas 13145A-C are made up of multiple memory areas (Areas 0-6) of a predetermined number of bits (for example, 1 or 2 bytes), and groups are formed for each of a predetermined number of memory areas (7 in the figure), and each group can be accessed by processor core 13141. In other words, when auxiliary memory area 13145A is selected, processor core 13141 can only access auxiliary memory area 13145A, and cannot access the other auxiliary memory areas 13145B and C.

As described below, the selection of this auxiliary memory area 13145 can be performed by switching multiple memory areas for each group at once with one CHANGE command. For example, the command CHANGE 0 selects the auxiliary memory area 13145A of group 0, and the auxiliary memory area accessible by the processor core 13141 is switched to group 0.

In the illustrated example, the auxiliary memory area 13145 is configured with three groups, but any number greater than or equal to two may be used. In other words, at least two auxiliary memory areas 13145 are provided with the same configuration.

The auxiliary memory area 13145 memory areas (Area0-5) are provided separately from the RAM 1312 to temporarily store data during program execution, and can be used individually (1 byte = 8 bits) or as a set of multiple areas (for example, Area0 and Area1 as a set of 2 bytes = 16 bits). Therefore, 8-bit data or 16-bit data can be stored in the auxiliary memory area 13145 without creating excess capacity in the memory area. In addition, the memory area (Area6) is set as a memory area used with a capacity of an integer multiple (for example, 2 bytes) of the other memory areas, and cannot be divided into 1-byte memory areas for use. In this way, the auxiliary memory area 13145 is configured with multiple memory areas of different capacities, and memory areas that can be used in any combination are provided, so that the memory areas can be used according to the purpose (for example, data length) in the calculation process. For example, when the address space is expressed by 16 bits, an address can be specified with one (or a set of combined) memory areas. This allows instructions to have fewer arguments and execute in fewer clock cycles.

The switching unit 13143 switches the group of memory areas that the processor core 13141 can access according to the value stored in the switching register 13144.

The switching register 13144 is a memory area that stores data for determining an accessible auxiliary storage area 13145, and is an area that the processor core 13141 can access regardless of the selection of the auxiliary storage area 13145. The switching register 13144 may store, for example, data for identifying the auxiliary storage area 13145 to be selected (e.g., 2-bit data for switching between four areas), an abnormality flag indicating that the switching was not performed normally (if the abnormality flag is set, the switching command will be executed again), and an unauthorized access flag that is set when an abnormality occurs in which the value of the unselected auxiliary storage area 13145 has changed.

The switching register 13144 may also store flags that indicate the state of the calculation result (e.g., a carry flag, a parity/overflow flag, a zero flag, a sign flag, etc.).

In addition to the switching register 13144, a storage area that can be accessed by the processor core 13141 without selecting the auxiliary storage area 13145 may be provided. For example, a program counter indicating the address at which a program is being executed and a stack pointer indicating the top address of a stack area provided in the RAM 1312 may be provided.

Figure 111 shows an example of a program for timer interrupt processing and base calculation processing, and shows a specific example of the part where the base calculation processing is called from the timer interrupt processing and where the base calculation processing is returned to.

In the timer interrupt process (Figure 104), the base calculation process is called in step S801, but before moving to the base calculation process, interrupts are prohibited by the DI command. The base calculation process can be performed without interrupting the process between the DI command and the EI command due to an interrupt.

Then, the data in the switching register 13144 is saved to the game control stack area 13137 (see FIG. 113) by a PUSH command. Then, the program is executed from the starting address xxxx of the base calculation process by a CALL command.

In the base calculation process, before starting the processes shown in Figures 105 to 108, a CHANGE instruction is used to switch the auxiliary memory area 13145 from group 0, which is used in the timer interrupt process that called it, to group 1, which is used in the base calculation process that is called. In this way, multiple memory areas can be switched by group with one CHANGE instruction, and multiple memory areas can be switched all at once with one instruction (i.e., with few steps).

The LD instruction writes the stack pointer value being used in the timer interrupt process to an arbitrary address (e.g., zzzz) in RAM 1312, and saves the stack pointer value. After that, the LD instruction writes the address yyyy of the base calculation stack area 13138 to the stack pointer, and changes the stack area.

After preparations for executing the base calculation process are complete, the process is executed from step S8011 in FIG. 105 or FIG. 108. Then, after the base calculation process is completed (after step S8038 in FIG. 106), the LD instruction restores the stack pointer value used in the timer interrupt process from address zzzz in RAM 1312. Then, the CHANGE instruction switches the auxiliary memory area 13145 from group 1 used in the called base calculation process to group 0 used in the calling timer interrupt process, and the RET instruction returns to the calling timer interrupt process. Note that, in general, the instruction to switch the auxiliary memory area 13145 and the instruction to restore the data saved in the stack have different roles, but in this embodiment, after returning from the base calculation process to the timer interrupt process, the auxiliary memory area 13145 is switched by returning the data saved in the stack to the switching register 13144. For this reason, in this embodiment, it is not necessary to switch the auxiliary memory area 13145 to group 0 by using the CHANGE command after the base calculation process is completed, but the auxiliary memory area 13145 may be reliably switched by using the CHANGE command.

In this way, the CHANGE command switches the auxiliary memory area 13145 by changing the argument (operand), but a different command may be provided for each auxiliary memory area 13145.

After that, when returning from the base calculation process, the data of the switching register 13144 that was saved in the game control stack area 13137 is restored to the switching register 13144 by a POP command. Note that the saving and restoration of the data in the switching register 13144 may be performed using other commands (e.g., data transfer command LD, exchange command EX) instead of using the stack operation commands PUSH and POP.

Then, after enabling the interrupt with the EI command, the timer interrupt processing continues, and the timer interrupt processing ends with RETI, returning to the main processing on the main control side (steps S36 to S40 in Figure 21).

Note that interrupts may be disabled at the beginning of timer interrupt processing by the DI instruction, and enabled at the end of timer interrupt processing by the EI instruction. Also, by directly manipulating the interrupt enable flag without using the DI or EI instruction, interrupts may be disabled when timer interrupt processing begins, and enabled when the RETI instruction is executed.

Also, since timer interrupt processing is originally executed with interrupts disabled, there is no need to further disable or enable interrupts within the timer interrupt processing. In the example program shown, the DI command disables interrupts in order to disable an interrupt that was enabled for some reason. In this case, the interrupts should remain disabled until the end of the timer interrupt processing, so it is better to issue the EI command at the end of the timer interrupt processing, rather than immediately after the POP command.

In the above example, the saving of the switching register 13144 is performed in the timer interrupt process of the caller, and the switching of the auxiliary memory area 13145 and the switching of the stack area are performed in the base calculation process of the caller, but these three processes may be performed in either the caller or the callee when the process moves outside the game control area and when the process returns to the game control area. An example of switching the auxiliary memory area 13145 in the timer interrupt process of the caller is explained in Figure 112.

Figure 112 shows another example of a program for timer interrupt processing and base calculation processing, and shows a specific example of the part where base calculation processing is called from timer interrupt processing and where the program returns from base calculation processing.

In the timer interrupt process (Figure 104), the base calculation process is called in step S801, but before moving to the base calculation process, interrupts are prohibited by the DI command. An interrupt is issued between the DI command and the EI command, allowing the base calculation process to be performed without interrupting the processing in between.

Then, the data in the switching register 13144 is saved to the game control stack area 13137 (see FIG. 113) by a PUSH command. Then, the auxiliary memory area 13145 is switched from group 0, which is used in the timer interrupt process of the caller, to group 1, which is used in the base calculation process of the caller, by a CHANGE command. In this way, multiple memory areas can be switched by group with one CHANGE command, and multiple memory areas can be switched all at once with one command (i.e., with few steps).

Then, the program is executed from the starting address xxxx of the base calculation process by the CALL instruction.

In the base calculation process, before starting the processes shown in Figures 105 to 108, the LD instruction is used to write the stack pointer value being used in the timer interrupt process to any address (e.g., zzzz) in the RAM 1312, and the stack pointer value is saved. After that, the LD instruction is used to write the address yyyy of the base calculation stack area 13138 to the stack pointer, and the stack area is changed.

After preparations for executing the base calculation process are complete, processing is executed from step S8011 in FIG. 105 or FIG. 108. Then, after the base calculation process is completed (after step S8038 in FIG. 106), the stack pointer value used in the timer interrupt process is restored from address zzzz in RAM 1312 by the LD instruction.

After that, when returning from the base calculation process, the CHANGE command switches the auxiliary memory area 13145 from group 1 used in the called base calculation process to group 0 used in the calling timer interrupt process, and the POP command restores the data of the switching register 13144 saved in the game control stack area 13137 to the switching register 13144. Note that the saving and restoration of the data in the switching register 13144 may use other commands (for example, data transfer command LD, exchange command EX) instead of using the stack manipulation commands PUSH and POP.

As described above, the auxiliary memory area 13145 returns to the state before the base calculation process was called by restoring the switching register 13144, so there is no need to switch the auxiliary memory area 13145 by the CHANGE instruction. However, the auxiliary memory area 13145 may be reliably switched by the CHANGE instruction.

Then, after enabling the interrupt with the EI command, the timer interrupt processing continues, and the timer interrupt processing ends with RETI, returning to the main processing on the main control side (steps S36 to S40 in Figure 21).

As described above, interrupts may be disabled at the beginning of timer interrupt processing by the DI instruction, and enabled at the end of timer interrupt processing by the EI instruction. Also, instead of using the DI or EI instruction, interrupts may be disabled when timer interrupt processing starts and enabled when the RETI instruction is executed by directly manipulating the interrupt enable flag.

Also, since timer interrupt processing is originally executed with interrupts disabled, there is no need to further disable or enable interrupts within the timer interrupt processing. In the example program shown, the DI command disables interrupts in order to disable an interrupt that was enabled for some reason. In this case, the interrupts should remain disabled until the end of the timer interrupt processing, so it is better to issue the EI command at the end of the timer interrupt processing, rather than immediately after the POP command.

In FIG. 111, an example of switching between timer interrupt processing, base calculation processing, and auxiliary memory area 13145 has been described, but auxiliary memory area 13145 may also be switched during inspection processing executed by debugging (inspection function) code 13133. In this case, at the beginning of debugging (inspection function) code 13133, the auxiliary memory area 13145 may be switched to auxiliary memory area 13145 for inspection processing by a CHANGE command. Also, auxiliary memory area 13145 may be switched between initialization processing (steps S10 in FIG. 21 to step S34 in FIG. 22), main control side main processing (steps S36 to S40 in FIG. 21), power-off processing (steps S42 to S58 in FIG. 21), and timer interrupt processing (FIGS. 23, 75, 80, etc.), and different auxiliary memory areas 13145 may be used for each process.

Furthermore, when only two auxiliary memory areas 13145 are provided, the auxiliary memory area 13145 may be switched between processes executed within the game control area (e.g., main control side main processing, timer interrupt processing, etc.) and processes executed outside the game control area (e.g., debug processing, base calculation processing, etc.) (e.g., debug (inspection function) area, base calculation area, etc.), and different auxiliary memory areas 13145 may be used inside and outside the game control area.

In this case, the main control side main processing and the timer interrupt processing use the same auxiliary memory area 13145, but since the main control side main processing being executed is interrupted to start the timer interrupt processing, it is advisable to temporarily store the value of the auxiliary memory area 13145 in the game control stack area 13137 when the timer interrupt processing starts (for example, at the beginning of the timer interrupt processing), and then return the value temporarily stored in the game control stack area 13137 to the auxiliary memory area 13145 when the timer interrupt processing ends (for example, at the end of the timer interrupt processing).

For example, because auxiliary memory area 13145 has multiple (byte) memory areas, if data is saved to the stack area one unit (byte or word) at a time, the number of instructions for saving increases. Similarly, the number of instructions for restoring data from the stack area increases. Also, in this case, if the order of saving data to the stack area and restoring data from the stack area is incorrect, different data will be read from the stack area, and subsequent processing may not be performed accurately. For this reason, the above problem can be solved by providing instructions to save all of the multiple memory areas of auxiliary memory area 13145 to the stack area all at once, and to restore all of the multiple memory areas of auxiliary memory area 13145 from the stack area all at once.

Furthermore, if all the memory areas of the auxiliary memory area 13145 are saved to the stack area, the stack area may overflow, and data outside the area intended for the stack area (such as a stack area for other purposes) may be overwritten. For this reason, in addition to a command to collectively store all the memory areas of the auxiliary memory area 13145 in the stack area, a command to collectively save multiple arbitrarily designated memory areas of the auxiliary memory area 13145 to the stack area, and a command to collectively restore multiple arbitrarily designated memory areas of the auxiliary memory area 13145 saved to the stack area may be provided and executed.

In this way, when moving to processing outside the game control area, a different auxiliary memory area 13145 is switched to, and when moving to processing within the game control area, the original auxiliary memory area 13145 is switched back, so processing can proceed without having to back up data stored in the auxiliary memory area 13145 to RAM 1312 (e.g., a stack area).

In addition, when moving to processing outside the game control area, the switching register 13144 is saved to RAM 1312 (e.g., a stack area), and when moving to processing within the game control area, the switching register 13144 is restored from RAM 1312. Therefore, when moving to processing within the game control area, the auxiliary memory area 13145 can be switched, and the data in the auxiliary memory area 13145 can be restored without being restored from RAM 1312.

In addition, when moving to processing outside the game control area, a different stack area is switched to, and when moving to processing within the game control area, the original stack area is switched back to, so the stack area used for processing within the game control area is not updated in processing outside the game control area, and processing inside and outside the game control area can be completely separated.

In addition, when transitioning to processing outside the game control area, the value stored in the switching register 13144 is saved to RAM 1312 (e.g., a stack area), and when transitioning to processing within the game control area, the saved value is restored to the switching register 13144, so that values related to the execution results of the program within the game control area are not updated in processing outside the game control area, and processing inside and outside the game control area can be completely separated.

Figure 113 (A) is a diagram showing an example of the arrangement of programs (code) and data stored in ROM 1313 and RAM 1312 built into main control MPU 1311 of main control board 1310. The memory arrangement shown in Figure 113 illustrates a stack area in RAM 1312 that is omitted in the memory arrangement described above in Figure 26, but a stack area is also provided in RAM 1312 shown in Figure 26.

The ROM 1313 includes areas for storing game control code 13131, game control data 13132, debug (inspection function) code 13133, debug (inspection function) data 13134, base calculation/display code 13135, and base calculation/display data 13136. In this embodiment, the ROM 1313 is assigned a game control area (first memory area) for storing programs and data related to the pachinko machine 1, such as the game control code 13131 and the game control data 13132, a debug (inspection function) area (second memory area) for storing programs and data used for the purpose of outputting signals necessary for the debugging (inspection function) of the pachinko machine 1, such as the debug (inspection function) code 13133 and the debug (inspection function) data 13134, and a base calculation area (third memory area) for storing programs used for the purpose of calculating the base value, such as the base calculation/display code 13135 and the base calculation/display data 13136.

Between the final address of the game control data 13132 and the first address of the debug (inspection function) code 13133, there is provided a free space (unused space) of 16 bytes or more, so that the game control area and the debug (inspection function) area can be easily distinguished when displayed in a dump list format. Similarly, between the final address of the debug (inspection function) code 13133 and the first address of the base calculation/display code 13135, there is provided a free space (unused space) of a predetermined length. If this predetermined length is set to 16 bytes or more, it is preferable because the debug (inspection function) area and the base calculation area can be easily distinguished when displayed in a dump list format, but the predetermined length may be shorter than 16 bytes. The value stored in the free space is preferably a fixed value that is the same value, and is set to a value different from the values set in the game control area and the debug area or a value that is used less frequently. The value stored in the free space may also be an instruction that the CPU does nothing, such as a No Operation code. In this way, when displayed in dump list format, the game control area, debug (test function) area, and base calculation area can be easily distinguished.

Also, instead of separating the debug (inspection function) area from the base calculation area, the base calculation/display code 13135 and the base calculation/display data 13136 may be stored in a part of the debug area. In other words, it is sufficient that the game control area is clearly distinguished from other areas. In this way, by clearly distinguishing the game control area from other areas, the debug area (debug (inspection function) code, debug (inspection function) data) and the base calculation area (base calculation/display code 13135 and base calculation/display data 13136), which are processes that are not directly related to the control of the progress of the game, are arranged separately from the game control area, thereby avoiding the risk of a malfunction (bug, etc.) of the base calculation/display code 13135 affecting game control.

The debug (inspection function) area stores programs and data for purposes that are not directly related to play, for example, code 13133 for outputting various function inspection signals that are used only when debugging the pachinko machine 1 in addition to controlling the game of the pachinko machine 1 is stored. These debug (inspection function) codes 13133 are programs for outputting debug (inspection function) signals. The base calculation area stores a program for calculating a base value that is not directly related to the progress of play.

The game control code 13131 is executed by the main control MPU 1311. The game control code 13131 can be read and written to the RAM 1312 as appropriate, but the game control area 13126 used by the game control code 13131 is configured so that only reading can be performed from the debug (inspection function) code 13133, and writing to the area cannot be performed. In this way, the game control area 13126 constitutes a game control area that can be accessed only from the game control code 13131. Processing based on the debug (inspection function) code can be called and executed unilaterally while the game control code 13131 is being executed, but it is configured so that the game control code 13131 cannot be called and executed from the debug (inspection function) code. This increases the independence of the debugging (testing function) code 13133, so that even if the game control code 13131 is changed, changes to the debugging (testing function) code 13133 can be kept to a minimum.

The base calculation/display code 13135 is called from the game control code 13131 (for example, step S89 of the timer interrupt process shown in FIG. 23) and executed by the main control MPU 1311. The base value calculated by the base calculation/display code 13135 is stored in the base calculation area 13128 of the RAM 1312. As shown in the figure, the base calculation area 13128 is provided separately from the game control area 13126 (outside the game control area). In this way, by designing the base calculation/display code 13135 separately from the game control code 13131 and storing them in different areas, the base calculation/display code 13135 and the game control code 13131 can be inspected separately, reducing the effort required to inspect the pachinko machine 1. The base calculation/display code 13135 can also be used in common with multiple models, regardless of the model.

RAM 1312 is provided with a game control area 13126, a debug area, a base calculation area 13128, a game control stack area 13137, a debug stack area, and a base calculation stack area 13138.

The game control area 13126 is an area in which data used by the game control code 13131 is stored, and can be read and written from the game control area 13126. In addition, the debug (inspection function) code 13133 and the base calculation/display code 13135 cannot write data to the game control area 13126, but can access it for reading, and the debug (inspection function) code 13133 and the base calculation/display code 13135 can refer to the data stored in the game control area 13126.

The debug area is an area where data used by the debugging (inspection function) code 13133 is stored. The debug area can be accessed by the game control code 13131 and the base calculation/display code 13135, but only reading of data is permitted and writing of data is prohibited. The base calculation area 13128 is an area where data used by the base calculation/display code 13135 is stored. The base calculation area 13128 can be accessed by the game control code 13131 and the debugging (inspection function) code 13133, but only reading of data is permitted and writing of data is prohibited.

The game control stack area 13137 is an area where data used by the game control code 13131 is saved. The debug stack area is an area where data used by the debug (test function) code 13133 is saved. The base calculation stack area 13138 is an area where data used by the base calculation/display code 13135 is saved. Each stack area is used exclusively to temporarily save data stored in the CPU auxiliary memory unit 13142. Each stack area can be switched by changing the value of the stack pointer managed by the CPU 13111. The stack pointer is a memory area that specifies the start address of the stack area.

Figure 113 (B) is a diagram showing details of the base calculation area 13128. The base calculation area 13128 may be provided with a main area in which the calculation result of the base is stored, as well as a backup area 1 and a backup area 2 in which copies of the data stored in the main area are stored. There may be one or more backup areas. A check code for detecting errors in the data is added to each area. The check code may be a checksum of the data in each area or a predetermined value. The check code may be set in the initialization process when the power of the pachinko machine 1 is turned on, set each time the data in the main area is updated in the base calculation/display process, or set in the main control side power off process (steps S50 to S54 in Figure 22). In particular, if the check code is a fixed value, the check code may be initialized when the initialization process determines that the data is normal or erases the data, and the fixed value may be set in the main control side power off process (step S50 in Figure 20). The check code may also be used as a power outage flag. In other words, if a predetermined value is set in the check code in the main area, it may be determined that the power outage flag is set. Also, if a specified value is set in the power outage flag, it may be determined that the check code in each area is a correct value (i.e., the data in each area is normal).

When the main area is determined to be abnormal, it may be determined whether the backup area is normal, and data from the backup area determined to be normal may be copied to the main area (step S24 in FIG. 21). In addition, in the process when the main control side power is cut off, the value of the main area may be copied to each backup area (step S54 in FIG. 22). In addition, in the base calculation/display process, the value of the main area may be copied to the backup area when the base calculation/display process ends. When at least a part of the main area is updated, it is sufficient that the entire main area or only the area of the updated value is copied to the backup area (steps S168, S170 in FIG. 25).

Unused space is provided between the main area and backup area 1, and between backup area 1 and backup area 2. By providing unused space between each area, the addresses of each area can be separated, and each area can be distinguished by the upper digits of the address.

[11. Recording of gaming history]
Next, an embodiment of a pachinko machine that records and outputs a game history will be described.

[11-1. Basic configuration of a gaming machine that records gaming history]
In the pachinko machine 1 of this embodiment, the peripheral control unit 1511 determines an effect that matches the variation pattern command sent from the main control board 1310 from among a plurality of prepared effects, and displays the determined effect on the main liquid crystal display device 1600. At that time, when the peripheral control unit 1511 determines to display a specific effect (for example, two specific effects out of three types of super reach) from among a plurality of prepared effects, it displays on the main liquid crystal display device 1600 how many times the special symbol variation display game has been played since the game state was switched and how the specific effect has appeared (in other words, how many rotations the effect has appeared) together with the game progress.

Specifically, according to the game history shown in Figure 114, Super Reach 1 appears on the 34th spin at 10:25, and the result of the special pattern change display game is a miss, Super Reach 2 appears on the 127th spin at 10:54, and the result of the special pattern change display game is a miss, and Super Reach 2 appears on the 428th spin at 11:30, and the result of the special pattern change display game is a sure chance jackpot.

The display of the jackpot history (for example, a history of a jackpot on the 15th spin, a jackpot on the 50th spin) can be confirmed on a data display installed in the hall, but the specific effects that appeared before the jackpot cannot be confirmed. Some players judge whether the pachinko machine 1 is in good or bad condition from the degree to which a specific effect appears (for example, they think that if Super Reach 2 appears within 50 spins after the end of a jackpot, the jackpot will be won in a short time). In order to meet the expectations of such players, the degree of appearance of the effects is displayed so that it can be seen. Also, since the game ball is not fired while the player is checking the degree of appearance of the effects, if the degree of appearance of all of the multiple effects prepared is displayed, it will take the player time to check the degree of appearance of each effect, and there is a possibility that the operation of the gaming machine will decrease. For this reason, it is better to display only specific reach effects (reach effects with high expectations for a jackpot) among the reach effects. Also, it is possible to make it possible to check the history of the appearance of each effect by operating a specified operating means (such as the operating button 220C).

Specific processing involves the peripheral control unit 1511 storing information on the number of variations and the presented effects when it receives a variation pattern command from the main control board 1310. Furthermore, the peripheral control unit 1511 updates the information on the number of variations and the presented effects based on the received variation pattern command. Then, when a specific operation means (such as operation button 220C) is operated, a process is performed in which the number of variations required for a limited specific effect to appear is added up and displayed, rather than all of the presented effects.

If an error occurs in the pachinko machine 1 during operation, the pachinko machine 1 outputs error information to inform the hall employees. This notification may be in the form of displaying an error screen shown in FIG. 115(A) on the main liquid crystal display device 1600, or displaying a detailed error screen shown in FIG. 115(B) on the main liquid crystal display device 1600 to inform the cause of the error, outputting an alarm sound, or outputting an error signal shown in FIG. 116 from the external terminal board 784. Representative errors in the pachinko machine 1 include those shown in FIG. 117, FIG. 118, and FIG. 119. Errors that occur in the pachinko machine 1 are notified to the outside of the pachinko machine 1 so that the hall employees can know the cause. For example, a code determined for each type of error may be displayed on a status display LED included in the function display unit 1400. Specifically, if there is a fault in the cable connection between the main control board 1310 and the dispensing control board 951, the status display LED included in the function display unit 1400 will show "0" and the LED in the middle right of the door will light up blue.

However, errors can occur for a variety of reasons, including minor malfunctions of the pachinko machine 1 (e.g., a connector coming loose), major malfunctions that require part replacement, or fraudulent activity.

When an error occurs in a pachinko machine 1, the cause of the error must be identified and the machine must be restored to operation. Identifying the cause of the error takes time and costs money, and the pachinko machine 1 being stopped due to an error results in reduced sales. Therefore, if the hall can learn detailed information about the error that has occurred, it can resolve the error early and shorten the time the pachinko machine 1 is stopped.

More specifically, the hall uses the hall computer to determine the state of the pachinko machine 1 based on the signal output from the external terminal board 784. However, to investigate the cause of the error, in addition to the signal output from the external terminal board 784, it is desirable to have game history information such as the "number of wins at the general winning slot," "number of wins at the large winning slot," "number of gate passes," and "number of normal symbol changes." If the pachinko machine 1 is broken, this can be resolved by repair or part replacement, so it is not a big problem, but if game balls are obtained through fraudulent activity, it reduces the opportunities for legitimate players to make profits, disrupting the business of the hall and ultimately causing financial difficulties for the hall.

If such game history information is output from the external terminal board 784, the number of terminals in the connector used in the external terminal board 784 will increase, and the cost of the pachinko machine 1 will rise. Furthermore, because events such as "winning at the general prize slot," "winning at the large prize slot," "passing through the gate," and "changing of normal symbols" occur frequently, if all the data were output from the pachinko machine 1, a high-performance hall computer would be required to analyze the data, which would increase the burden on the hall.

To solve the above-mentioned problems, the pachinko machine 1 of this embodiment stores data that is not output as a real-time signal from the external terminal board 748 inside the pachinko machine 1, and by making the stored data available for later reference, it is possible to check the details of the events leading up to the occurrence of the error.

In addition, the time of occurrence of events that occurred leading up to the error (number of wins at the general prize slot, number of wins at the large prize slot, number of passes through the gate, number of normal symbol changes, etc.) is recorded, so it is possible to determine how many events occurred over what time. For example, it is possible to determine an abnormality such as 50 wins at the general prize slot in one minute.

Note that if the date and time of occurrence for each event is recorded, the amount of data used to investigate the cause of the error increases, and it takes time to investigate the cause of the error. For this reason, if a certain number of events or more occur within a certain period of time (e.g., one minute), they may be output as error information and reported.

For example, since it is possible to win at the general prize slot in any game state, it is a good idea to output error information and notify if a predetermined number of wins occur in a predetermined time, but since a prize can only be won at the jackpot prize slot during jackpot play, it is a good idea to set the predetermined time from the start to the end of jackpot play, and output error information and notify if a predetermined number of wins occur in the jackpot prize slot within the predetermined time.

In the pachinko machine described below, the peripheral control unit 1511 records the game history and outputs it in a specified format.

Figure 120 is a flow chart showing an example of the peripheral control unit power-on process of this embodiment. The peripheral control unit power-on process shown in Figure 120 has a game history recording process (step S1023) added to the peripheral control unit power-on process described above with reference to Figure 60.

In the game history recording process, the peripheral control unit 1511 records the game history in memory if the command received from the main control board 1310 is a specified command based on the analysis result of the command. The game history is recorded as the date and time of the event occurrence in a format such as that shown in FIG. 122, for example. The memory in which the game history is recorded may be DRAM, but considering that the stored contents will be retained even when the power is cut off, it is preferable to record the game history in SRAM, which does not require a refresh operation and has low power consumption.

The game history recording process (step S1023) should be executed before the game control-related processes (steps S1024 to S1032). By executing the game history recording process at an early stage of the peripheral control unit routine processing, the game history can be accurately recorded even if the game control-related processes are stopped midway and some effects are not executed. In other words, even if some effects are not executed (even if all effects are not executed), the results of the lottery already performed on the main control board 1310 do not change, and the benefits given to the player do not change either, so the game history is recorded in priority to the effects. In addition, because the game history recording process is not affected by the game control-related processes, the game history recording process can be shared among multiple models of pachinko machines.

Next, the process when the memory capacity for recording the game history reaches its upper limit will be described. When the amount of data for the game history to be recorded reaches the upper limit of the memory capacity, the game history recording process is executed, but the game history recorded in the memory does not need to be updated. In other words, the information recorded in the memory does not change. In this way, by executing the game history recording process even if there is no free space in the memory for recording the game history, there is no need to check the free space in the memory for recording the game history, and the processing by the peripheral control unit 1511 each time can be reduced.

Also, if the memory capacity for recording game history has reached its upper limit, a game history recording process may be executed to update the game history recorded in memory. In this case, a ring buffer with multiple (e.g., 10) memory areas may be provided in the game history storage area of the peripheral control SRAM 1511d, and the oldest game history may be erased and the latest game history may be recorded. Even in this case, there is no need to check the free space in the memory that records the game history, and the processing performed by the peripheral control unit 1511 each time can be reduced.

In addition, if the game history to be recorded reaches the upper limit of the memory capacity, step S1023 may be skipped and the game history recording process may not be executed. By not executing the game history recording process when the game history to be recorded reaches the upper limit of the memory capacity, it is possible to prevent the execution of unnecessary processes, so that other processes (performance control, lamp control, sound control) performed by the peripheral control unit 1511 can be executed reliably, and the freed up processing time may be used to execute new processes (for example, processes that are executed across multiple peripheral control unit routine processes because there is not enough processing time, or processes that are executed once for several peripheral control unit routine processes because they do not need to be executed every time (for example, a process for switching selection tables)).

In addition, the received command may be analyzed (step S1022) and the game history recording process (step S1023) may be executed immediately after the interrupt timer start process (step S1010).

Figure 121 shows an example of the configuration of a game history recording condition setting table.

The game history recording condition setting table registers the types of commands that are to be recorded as game history from among the commands that the peripheral control unit 1511 receives from the main control board 1310, i.e., the events that are to be recorded as game history.

For example, the following command types are registered in the game history recording condition setting table, and the conditions for generating these commands and the purpose of recording them as game history are as follows:

For example, the start port 1 winning command and the start port 2 winning command are sent from the main control board 1310 to the peripheral control unit 1511 when a game ball is detected winning at start port 2002 and start port 2004, respectively, and the peripheral control unit 1511 can count the number of winning balls at each start port. Also, the special symbol 1 symbol type command and the special symbol 2 symbol type command are sent from the main control board 1310 to the peripheral control unit 1511 when the special symbol starts to change, respectively, and the peripheral control unit 1511 can count the number of changes in special symbols 1 and 2.

In addition, the power-on command is sent from the main control board 1310 to the peripheral control unit 1511 when the power is turned on, and the peripheral control unit 1511 can obtain RAM clear operations, etc. The change start state command is sent from the main control board 1310 to the peripheral control unit 1511 when the special pattern starts to change, and the peripheral control unit 1511 can obtain the state at the start of the special pattern change. The states that can be distinguished by the change start state command are low probability time-saving, low probability time-saving, high probability time-saving, and high probability time-saving, and the state change can be obtained and the number of changes that have started in each state can be counted. Here, low probability is a state in which the probability of deriving a jackpot in the jackpot lottery associated with the special pattern change display game is a normal probability, and high probability is a state in which the probability of deriving a jackpot in the jackpot lottery associated with the special pattern change display game is higher than normal. The time-saving state is a state in which the frequency of the second start opening door element 2549 being in the open (or expanded) state is higher than in the non-time-saving state, such as the probability that the second start opening door element 2549 described above will be in the open (or expanded) state being higher than in the non-time-saving state, and the time from when the normal pattern starts to change until it is determined being shorter. As a result, the probability of selecting a performance in which the time required for one special pattern change display game is short increases.

The large prize slot 1 winning command (for each winning) and the large prize slot 2 winning command (for each winning) are sent from the main control board 1310 to the peripheral control unit 1511 when a game ball wins in the large prize slot 2005 or the large prize slot 2006, respectively, and the peripheral control unit 1511 can count the number of winning balls in each large prize slot.

The large prize slot 1 winning command (a winning amount equal to or less than the prescribed number of winnings) and the large prize slot 2 winning command (a winning amount equal to or less than the prescribed number of winnings) are sent as commands from the main control board 1310 to the peripheral control unit 1511 when a predetermined time has elapsed since the closing of each large prize slot (for example, from one second after the closing of each slot until the next opening) if only a prescribed number of game balls or less have won in the large prize slot 2005 and the large prize slot 2006 by the end of the round, and the peripheral control unit 1511 can obtain the winning status of each large prize slot in one round. The large prize opening 1 winning command (greater than the specified winning number) and the large prize opening 2 winning command (greater than the specified winning number) are sent from the main control board 1310 to the peripheral control unit 1511 when a predetermined time has elapsed since the closing of each large prize opening (e.g., from one second until the next opening) when a round ends with the winning of more than the specified number of game balls in the large prize opening 2005 and the large prize opening 2006, respectively, and the peripheral control unit 1511 can obtain the winning status of each large prize opening in one round. The reason that this command is sent when a predetermined time has elapsed since the closing of each large prize opening 2005 and 2006 is that when the specified number of winning balls (e.g., 10 balls) set for one round are detected and the large prize opening is closed, there is a possibility that undetected game balls may be present in the large prize opening, and the winning status can be accurately grasped even in such an over-winning case.

The jackpot OP command is sent from the main control board 1310 to the peripheral control unit 1511 when a jackpot occurs (i.e. when the condition device is activated or the reel continuous operation device is activated), allowing the peripheral control unit 1511 to obtain the change to the jackpot state and count the number of jackpots. The destination command at the end of the jackpot operation is sent from the main control board 1310 to the peripheral control unit 1511 when the jackpot state ends, allowing the peripheral control unit 1511 to obtain the end of the jackpot state and the situation after the jackpot.

The small win OP command is sent from the main control board 1310 to the peripheral control unit 1511 when the large prize opening is opened for a relatively short time (for example, the opening time for one opening is 1.8 seconds, or the total opening time for multiple openings is less than 1.8 seconds) and the continuous operation device for the reels does not operate (so-called small win), and the command is sent from the main control board 1310 to the peripheral control unit 1511, so that the peripheral control unit 1511 can count the number of small wins.

The normal symbol stop command is sent from the main control board 1310 to the peripheral control unit 1511 when the normal symbol stops, and the peripheral control unit 1511 can obtain the normal symbol stop symbol and count the number of normal symbol changes. The normal symbol gate pass command is sent from the main control board 1310 to the peripheral control unit 1511 when the game ball passes through the gate unit 2003, and the peripheral control unit 1511 can obtain the number of game balls that have passed through the gate unit 2003.

Even if a ball wins at the start gate or passes through the gate and a lottery for a special or normal symbol is not held (for example, if there is an overflow or no memory), the main control board 1310 sends a command for winning at start gate 1, a command for winning at start gate 2, and a command for passing through the normal gate to the peripheral control unit 1511. This allows the peripheral control unit 1511 to count the number of balls that win at the start gate and the number of balls that pass through the gate.

When an error occurs, the error display command is sent from the main control board 1310 to the peripheral control unit 1511, allowing the peripheral control unit 1511 to obtain the timing of the error occurrence and count the number of errors that occur.

When a game ball enters each general winning port 2001, the general winning port 1 winning command, the general winning port 2 winning command, and the general winning port 3 winning command are sent from the main control board 1310 to the peripheral control unit 1511, and the peripheral control unit 1511 can count the number of winning balls in each general winning port 2001. The general winning port winning commands are preferably determined as many as the number of general winning ports 2001 provided in the game area 5a, and the above example shows a case where three general winning ports 2001 are provided. As shown in Figures 10 and 16, the pachinko machine 1 of this embodiment has four general winning ports 2001, so four types of general winning port winning commands are determined, from the general winning port 1 winning command to the general winning port 4 winning command.

Figure 122 shows an example of the structure of the game history recorded in memory.

The game history includes a history number, an event, and the date and time of the event, and is preferably recorded in memory in the order of the event occurrence. The event occurrence date and time may be recorded as the time when the peripheral control unit 1511 receives a command from the main control board 1310, or the main control board 1310 may notify the peripheral control unit 1511 of the time when it detects the occurrence of an event, and the peripheral control unit 1511 may record the event occurrence time notified by the main control board 1310. In the game history shown in the figure, the event occurrence date and time is recorded to the minute, but may also be recorded to the second.

By analyzing the game history in the form shown in FIG. 122, the details of the events that occurred in relation to the commands sent from the main control board 1310 (for example, changes in the game state, the results of the variable display game, etc.) can be known. For example, the power-on command of history number 1 occurred at 15:30 on March 15, 2016, and it can be seen from the contents of the command that the RAM was cleared and the game started in a low probability/non-time-saving state. In other words, it can be seen that the hall started business at 15:30, the power of the pachinko machine 1 was turned on, the player started playing after a while (for example, after lighting a cigarette), and won the general winning port 2001. In addition, the special pattern 1 variable start event of history number 4 occurred at 15:34 on March 15, 2016, and the results of the special pattern variable display game can be known from the contents of the special pattern 1 pattern type command received (type of stopped pattern). The special symbol 1 variation start event of history number 6 occurred at 15:34 on March 15, 2016, and the result of the special symbol variation display game can be known from the contents of the special symbol 1 symbol type command received (type of stopped symbol). Note that although the results of the special symbol variation display game are not shown in FIG. 122, the results of each special symbol variation display game can be known from the numerical value indicating the result of the variation display game included in the symbol type command received when the special symbol variation starts, and the results of the variation display game (miss, normal 4 rounds, high probability 4 rounds, high probability 16 rounds, etc.) may be recorded as a game history.

Next, we will explain how the hall can refer to the information (game history) recorded in the memory.

First, a history output interface 1590 is provided to output information recorded in memory from the peripheral control unit 1511. Then, when the peripheral control unit 1511 receives a history reference command from the main control board 1310, it outputs the game history recorded in memory from the history output interface 1590.

In addition, a data collection terminal is connected to the pachinko machine 1, and when the peripheral control unit 1511 receives a history reference command from the data collection terminal, it outputs the game history recorded in memory from the history output interface 1590. The history output interface 1590 may be configured as a history output terminal provided in the peripheral control unit 1511, or may be provided separately from the peripheral control unit 1511. It is preferable for the parlor to own the data collection terminal for managing the data of the pachinko machine 1.

The connection between the data collection terminal and the pachinko machine 1 may be a cable connection via the history output interface 1590, or a wireless connection via short-range wireless (e.g., Bluetooth (registered trademark)).

The command that triggers the peripheral control unit 1511 to output the game history may be a history reference command dedicated to outputting the game history, or a command that is not sent when normal play is being performed after the power is turned on to the pachinko machine 1 (a command not defined in FIG. 121) when a special condition (operation) is performed. An example of the special condition (operation) is operating the RAM clear button while the power is turned on to the pachinko machine 1. In addition, even if it is a command that is sent during normal play, a history reference command may be sent under the condition of an event that cannot (or is unlikely to) occur. For example, when 50 balls are won in the start gate or general winning gate in one minute. In addition, the game history may be output when commands used for game control are received in a special order that is not normally possible.

In addition, an operation panel (keyboard) and a display (liquid crystal display device) may be provided on the back side of the pachinko machine 1 (in a place not visible to the player) to display the game history.

Figure 123 is a block diagram showing the configuration of the peripheral control board and its surroundings.

The peripheral control board 1510 has a peripheral control unit 1511 which controls the performance based on various commands from the main control board 1310 and exchanges control commands and various information (various data) with the performance display drive board 4450 via the frame peripheral relay terminal board 868, a liquid crystal display control unit 1512 which controls the drawing of the main LCD display device 1600 and the door frame side performance display device 460 and also controls the music, sound effects, etc. played from the lower speaker 921 and upper speaker 573, and a real-time clock (hereinafter referred to as "RTC") control unit 4165 which holds calendar information specifying the year, month, and date and time information specifying the hour, minute, and second.

As shown in FIG. 123, the peripheral control unit 1511 that controls the performance includes a peripheral control MPU 1511a as a microprocessor, a peripheral control ROM 1511b that stores various control programs, various data, various control data, and various schedule data, such as a sub-control program that controls the power-on processing executed when the power is turned on and controls the performance operation executed after a predetermined time has elapsed since the power is turned on, and various information (for example, the main LCD display) that continues across the peripheral control unit regular processing executed each time a V blank signal is input from the VDP 1512a with a built-in sound source of the LCD display control unit 1512 described later. It has a peripheral control RAM 1511c that stores various information (such as schedule data that specifies the screen to be drawn on the display device 1600 and information for managing schedule data that specifies the light emission modes of various LEDs, etc.), a peripheral control SRAM 1511d that stores various information that continues across days (such as information for managing the history of when a jackpot game state has occurred and information for managing special performance flags, etc.), and a peripheral control external watchdog timer 1511e (hereinafter referred to as the "peripheral control external WDT 1511e") that monitors whether the peripheral control MPU 1511a is operating normally.

Whereas the peripheral control RAM 1511c loses its contents when the power is cut off for a long period of time (when a long-term power outage occurs), the peripheral control SRAM 1511d is supplied with backup power from a large-capacity electrolytic capacitor (not shown) provided on the power supply board 931 (hereinafter referred to as the "SRAM electrolytic capacitor"), allowing the peripheral control SRAM 1511d to retain its stored contents for approximately 50 hours. Because the SRAM electrolytic capacitor is provided on the power supply board 931, when the game board 5 is removed from the pachinko machine 1, backup power is no longer supplied to the peripheral control SRAM 1511d, and therefore the peripheral control SRAM 1511d is no longer able to retain its stored contents and loses its contents.

In addition, a portion of the peripheral control SRAM 1511d is powered by a backup power supply 1513 that is different from the backup power supply supplied from the power supply board 931. The area of the peripheral control SRAM 1511d that is powered by the backup power supply 1513 records game history, and is configured to be able to retain the stored contents even if the power to the pachinko machine 1 is cut off. The backup power supply 1513 is configured from a secondary battery such as a lithium ion battery, and preferably has a power supply capacity that can retain the data in at least a portion of the area of the peripheral control SRAM 1511d for several weeks to about a month.

Figure 124 is a block diagram showing the peripheral configuration of the peripheral control SRAM 1511d.

The area of peripheral control SRAM 1511d that stores game history may be configured in a package separate from the peripheral control CPU that includes the peripheral control MPU, or may be configured in the peripheral control CPU package together with the peripheral control MPU.

Figure 124 (A) shows the peripheral configuration of the peripheral control SRAM 1511d, which configures an area for storing game history in a package separate from the peripheral control CPU. As shown in the figure, the performance control area that is not powered by the backup power supply 1513 is provided outside the peripheral control CPU package, and the game history storage area that is powered by the backup power supply 1513 is provided outside the peripheral control CPU package.

When the RAM clear switch is operated to reset the pachinko machine 1, the data in the peripheral control SRAM (area for controlling performance) 1511d within the peripheral control CPU is cleared, but the data in the peripheral control SRAM (area for storing game history) 1511d outside the peripheral control CPU is not cleared.

Figure 124 (B) shows the peripheral configuration of the peripheral control SRAM 1511d, which constitutes an area for storing game history within the peripheral control CPU package. As shown in the figure, both a performance control area not powered by the backup power supply 1513 and a game history storage area powered by the backup power supply 1513 are provided within the peripheral control CPU package.

Even in the configuration shown in FIG. 124(B), when the RAM clear switch is operated to reset the pachinko machine 1, the data in the peripheral control SRAM (performance control area) 1511d in the peripheral control CPU is cleared, but the data in the peripheral control SRAM (game history storage area) 1511d outside the peripheral control CPU is not cleared. For this reason, it is preferable that the performance control area and the game history storage area of the peripheral control SRAM 1511d be physically separated.

The area of the peripheral control SRAM 1511d that stores the game history may be configured with flash memory instead of SRAM. By storing the game history in flash memory, the game history can be retained even in a pachinko machine 1 that is not supplied with power, without providing a backup power supply 1513.

In either of the forms shown in FIG. 124(A) and (B), the pachinko machine 1 has a means for initializing data in the game history storage area of the peripheral control SRAM 1511d. The means for initializing data in the game history storage area of the peripheral control SRAM 1511d may be any method that has a procedure different from the normal data initialization method of turning on the power of the pachinko machine 1 while operating the RAM clear switch. For example, a history clear switch may be provided in addition to the RAM clear switch, and when the power of the pachinko machine 1 is turned on while operating the history clear switch, the stored game history is initialized. In this case, when the power of the pachinko machine 1 is turned on while operating both the RAM clear switch and the history clear switch, both the stored game status information and the game history are initialized. The history clear switch may be directly connected to the peripheral control board 1510.

In addition, if the pachinko machine 1 is powered on while the RAM clear switch is being operated, and the RAM clear switch is continued to be operated for a predetermined period of time after the power is turned on, both the stored game status information and the game history may be initialized.

When initializing the game history stored in the peripheral control SRAM 1511d, the main control board 1310 sends a command different from the normal power-on command to the peripheral control board 1510.

In addition, the main control board 1310 may continue to send a power-on command to the peripheral control board 1510 while the RAM clear switch is being operated, and the peripheral control board 1510 may initialize the game history stored in the peripheral control SRAM (game history storage area) 1511d when it receives a predetermined number of power-on commands within a predetermined time, or when it receives consecutive power-on commands. By providing a means for initializing data in the game history storage area in this way, the latest information can be accurately recorded and analyzed, for example, even if the gaming machine has been operating in the hall for a year.

The peripheral control external WDT 1511e is a timer that monitors whether the peripheral control MPU 1511a system is out of control, and when this timer expires, a hardware reset is applied. In other words, if the peripheral control MPU 1511a does not output a clear signal to the peripheral control external WDT 1511e to clear the timer of the peripheral control external WDT 1511e within a certain period of time (until the timer expires), a reset is applied. When the peripheral control MPU 1511a outputs a clear signal to the peripheral control external WDT 1511e within the certain period of time, it restarts the timer count of the peripheral control external WDT 1511e, so a reset is not applied.

The peripheral control MPU 1511a has multiple built-in parallel I/O ports, serial I/O ports, etc., and when it receives various commands from the main control board 1310, it transmits game board side light emission data for outputting lighting signals, flashing signals, or gradation lighting signals to the multiple LEDs, etc., provided on each decorative board of the game board 5 based on these various commands from the serial I/O port for the lamp drive board to the lamp drive board 4170 via a peripheral control output circuit (not shown), and transmits game board side motor drive data for outputting drive signals to electrical drive sources such as motors and solenoids that operate various movable bodies provided on the game board 5 to the serial I/O port for the motor drive board. The data is sent from the serial I/O port to the motor drive board 4180 via the peripheral control output circuit, door side motor drive data for outputting a drive signal to the electrical drive source provided in the door frame 3 is sent from the serial I/O port for the motor of the frame decoration drive amplifier board via the peripheral control output circuit and the frame peripheral relay terminal board 868 to the frame decoration drive amplifier board, and door side light emission data for outputting a lighting signal, a blinking signal or a gradation lighting signal to the multiple LEDs etc. provided on each decorative board of the door frame 3 is sent from the serial I/O port for LEDs of the frame decoration drive amplifier board via the peripheral control output circuit and the frame peripheral relay terminal board 868 to the frame decoration drive amplifier board.

Various commands from the main control board 1310 are input to the serial I/O port for the main control board of the peripheral control MPU 1511a via a peripheral control input circuit (not shown). In addition, the detection signal from the rotation detection switch for detecting the rotation (rotation direction) of the dial operation unit 401 provided in the performance operation unit 220 and the detection signal from the pressure detection switch for detecting the operation of the pressure operation unit 405 are serialized by a door side serial transmission circuit (not shown) provided on the frame decoration drive amplifier board 194, and this serialized performance operation unit detection data is input from the door side serial transmission circuit to the peripheral door relay terminal board 882, the frame peripheral relay terminal board 868, and the peripheral control input circuit via the serial I/O port for performance operation unit detection of the peripheral control MPU 1511a.

The detection signals from various detection switches (e.g., photosensors, etc.) for detecting the original positions and movable positions of various movable bodies provided on the game board 5 are serialized by a game board side serial transmission circuit (not shown) provided on the motor drive board 4180, and this serialized movable body detection data is input from the game board side serial transmission circuit via a peripheral control input circuit to the serial I/O port for the motor drive board of the peripheral control MPU 1511a. The peripheral control MPU 1511a exchanges various data between the peripheral control board 1510 and the motor drive board 4180 by switching the input and output of the serial I/O port for the motor drive board.

As described above, in the gaming machine of this embodiment, events that occur during play are recorded as a gaming history in accordance with commands sent from the main control board 1310 to the peripheral control board 1510, so that the events that occur during play can be analyzed later (for example, after the hall has closed) to understand the performance and malfunctions of the gaming machine. In addition, since the gaming history is stored in non-volatile memory (SRAM with backup power input), the gaming history can be checked even after the gaming machine is restarted.

In the pachinko machine 1 of this embodiment, various information is recorded along with the time of occurrence, as shown in FIG. 121, FIG. 122, etc. Also, for example, when the starting hole 1 is won, more information than the information output from the external terminal board 748 shown in FIG. 116 is stored inside the pachinko machine 1, such as (1) the fact that the starting hole 1 was won, (2) the time of winning the starting hole 1, and (3) the event that occurred before winning the starting hole 1. This is because, when the starting hole is won, the minimum necessary information (the above-mentioned (1) information indicating the fact that the starting hole was won) is output from the external terminal board 784, and in special cases (for example, when investigating the cause of an error), the information stored inside the pachinko machine 1 can be confirmed. This is because if all of the information stored inside is output from the external terminal board 784 when the starting hole is won, the amount of information output regarding the operation of the pachinko machine 1 will be large, which may be a burden on the hall. In other words, when an event occurs, more information is recorded inside the pachinko machine 1 than is output from the external terminal board 784, and some of the information recorded inside is output to the outside of the pachinko machine 1 via the external terminal board 784, so that in special cases the information stored inside the pachinko machine 1 can be confirmed.

[11-2. Compact Plan 1]
Next, modified examples of a pachinko machine that records and outputs a game history will be described. Note that the following modified examples are modifications of parts of the above-mentioned embodiment, and constitute a part of the embodiment.

In the above-mentioned embodiment, the generated event (type of command) and the date and time of the event were recorded for predetermined commands sent from the main control board 1310 to the peripheral control board 1510. However, the capacity of the SRAM 1511d that records the game history is finite, and it is difficult to record all of the huge number of events that occur during play for a long period of time. For this reason, in the modified example 1 (compact proposal 1), the change in the state of the pachinko machine 1 and the number of counting events that occurred in that state are recorded.

Figure 125 shows an example of the configuration of a game history recording condition setting table for variant example 1.

In the game history recording condition setting table of variant 1, the commands recorded as game history are defined as commands that are counted and commands that trigger a state change, and some commands have both attributes set. Note that the columns for countable information and obtainable state changes are provided for ease of explanation, and when the game history recording condition setting table is implemented in a pachinko machine 1, only the command type column is required.

When the peripheral control unit 1511 receives a command in which a counting attribute is set, it counts the number of events that triggered the issuance of the command as a result of command analysis. In addition, when the peripheral control unit 1511 receives a command in which an attribute that triggers a state change is set, it updates the state of the game history recorded in memory as a result of command analysis and adds a record that counts the number of events.

For example, the power-on command, state command at the start of fluctuation, jackpot OP command, destination command at the end of jackpot operation, and error display command are commands issued in response to state changes, and can be understood as state changes when power is turned on, special pattern fluctuation display starts, jackpot state starts, jackpot state ends, and error state occurs, respectively.

Counting commands are also used to count the number of events that trigger the issuance of a counting command. Specifically, the Start Gate 1 Winning Command and the Start Gate 2 Winning Command can count the number of winning balls at each start gate. The Special Symbol 1 Symbol Type Command and the Special Symbol 2 Symbol Type Command can count the number of variations of each special symbol. The Large Prize Gate 1 Winning Command (per win) and the Large Prize Gate 2 Winning Command (per win) can count the number of winning balls at each large prize gate. The Large Prize Gate 1 Winning Command (less than the specified win) and the Large Prize Gate 2 Winning Command (less than the specified win) can count the number of rounds that ended with less than the specified number of wins. The Large Prize Gate 1 Winning Command (greater than the specified win) and the Large Prize Gate 2 Winning Command (greater than the specified win) can count the number of rounds that ended with more than the specified number of wins (i.e., over-wins).

The small win OP command can count the number of small wins. The normal symbol stop command can count the number of normal symbol changes. The normal symbol gate pass command can obtain the number of game balls that have passed through the gate section. The error display command can count the number of errors that have occurred. The general prize slot 1 win command, general prize slot 2 win command, and general prize slot 3 win command can count the number of winning balls at each general prize slot.

Figure 126 shows the game history recorded in the memory of variant 1.

The game history of the first modified example includes the state change event that triggered the state change of the pachinko machine 1, the state after the state change event, the time when the state change event occurred, and the cumulative number of counting events detected from a predetermined starting point to the end of the state (until the next state change event). The number of counting events recorded as the game history may be the number of counting events detected during the state (between the previous state change event and the state change event). The predetermined starting point is the time when the game history storage area of the peripheral control SRAM 1511d is initialized. The five states in which counting events are recorded separately are assumed to be a low probability/non-time-saving state, a low probability/time-saving state, a high probability/non-time-saving state, a high probability/time-saving state, and a jackpot state, but these states may be further subdivided.

Next, the game history recording process in variant 1 will be described in detail. In the game history shown in FIG. 126, the number of winning entries at start gate 1, the number of winning entries at start gate 2, the number of variations in special pattern 1, the number of variations in special pattern 2, the number of winning entries at general prize gate 1, the number of winning entries at general prize gate 2, the number of winning entries at general prize gate 3, the number of winning entries at large prize gate 1, the number of winning entries at large prize gate 2, the number of gate passes, and the number of variations in normal patterns are recorded as counting events. Note that the number of events other than those shown in the figure may also be counted.

Two bytes of storage space for the cumulative number of each counting event is sufficient. In particular, data that is not generated very frequently and does not have a large cumulative number (for example, the number of wins at the general prize slots) can be one byte, while the rest should be two bytes. In this case, it is best to arrange the data in the order of two bytes, one byte (or one byte, two bytes), without mixing one-byte data and two-byte data.

In addition, when a status change event occurs, the type of status change event, the status after the event occurred, and the date and time of the event are recorded, and a new record is created in the game history. The counting event after the status change is then recorded in the new record.

The counting results of the counting events in the current state may be recorded in the working area of the peripheral control RAM 1511c, and may be stored in a new record created in the game history storage area of the SRAM 1511d after a state change. A new record in the game history storage area of the peripheral control SRAM 1511d is created in response to a state change, but a new record may also be created at the start of the period during which counting events are counted. In this case, even if no data is stored in the new record created while counting events are being counted, 0 may be stored as an initial value. A new record may also be created at the end of the period during which counting events are counted. In this case, immediately after creating the new record, the counting results of the counting events for that period are stored in the new record.

When the game state changes and data recorded in the working area (peripheral control RAM 1511c) is stored in the game history storage area (peripheral control SRAM 1511d), the data is read from the game history storage area, the count value recorded in the working area is added, and the result is stored in the game history storage area. On the other hand, when the number of count events detected during that state (between the previous state change event and the current state change event) is recorded as the game history, the count value of the count event is stored in the game history storage area of the peripheral control SRAM 1511d.

That is, each time a state change event occurs, the count value in the game history storage area of the peripheral control SRAM 1511d is updated. Therefore, the count result in the current state recorded in the working area of the peripheral control RAM 1511c is recorded in the peripheral control RAM 1511c until the next state change event occurs, and the memory contents are backed up in the event of a power outage, but are initialized by a normal RAM clear operation. Specifically, for example, in a low probability/non-time-saving state, the game history information in which 50 winnings into the starting hole 1 are recorded in the working area (peripheral control RAM 1511c) is recorded in the game history storage area of the peripheral control SRAM 1511d after the game state changes in the pachinko machine 1 of the first modified example. In other words, if the game state does not change, the game history is not recorded in the game history storage area of the peripheral control SRAM 1511d. Therefore, if the power is cut off and the RAM clear operation is performed while the low probability/non-time-saving state is still in effect, the 50 winnings are initialized to 0.

The counting result of the counting event in the current state may also be written to the game history storage area of the peripheral control SRAM 1511d. That is, each time a counting event occurs, the count value in the game history storage area of the peripheral control SRAM 1511d is updated. In this case, the counting result in the current state recorded in the peripheral control SRAM 1511d is not initialized by the normal RAM clear operation, but is initialized by the game history initialization operation described above.

In addition, it is advisable to execute the game history recording process even if the game history to be recorded reaches the upper limit of the memory capacity. In this case, recording of the game history to the peripheral control RAM 1511c in the current state may continue, and the cumulative number of counting events may not be stored from the peripheral control RAM 1511c to the peripheral control SRAM 1511d when the state changes. Also, the game history (cumulative number of counting events) in the oldest state may be erased, and the cumulative number of counting events in the previous state may be recorded. In this case, it is advisable to configure a ring buffer in the game history storage area of the peripheral control SRAM 1511d.

By executing the game history recording process even if there is no free space in the memory for recording the game history, there is no need to check the free space in the memory for recording the game history, and the processing performed each time by the peripheral control unit 1511 can be reduced. Also, since the cumulative number of counting events in the current state is recorded in the peripheral control RAM 1511c, the most recent game history can be checked.

In addition, if the game history to be recorded reaches the upper limit of the memory capacity, step S1023 may be skipped and the game history recording process may not be executed. By not executing the game history recording process when the game history to be recorded reaches the upper limit of the memory capacity, it is possible to prevent unnecessary processing from being executed and reduce the processing load of the peripheral control unit 1511.

As explained above, in variant 1, the state changes of the pachinko machine 1 are recorded, and the number of counting events (number of winnings, number of changes, etc.) in each state between the changes are recorded, so that long periods of game history can be recorded without increasing the capacity of the game history storage area of SRAM 1511d.

As mentioned above, another feature of the pachinko machine 1 of variant 1 is that it records more information internally than the information output from the external terminal board 784.

Furthermore, as described above, in the pachinko machine 1 of the modified example 1, the condition for creating a new record in the game history is a change in the game state, and if the game state does not change, information (game history) is not written to the game history storage area of the peripheral control SRAM 1511d. In other words, if cheating is committed in a state where a new record is not created in the game history storage area (while the same game state continues), it may be difficult to detect the cheating. As described above, the hall can check the information written in the game history storage area of the peripheral control SRAM 1511d to analyze the information (game history) written in the memory, but in the pachinko machine 1 of the modified example 1, information is not written to the game history storage area of the peripheral control SRAM 1511d unless the game state changes, so even if information is read from the peripheral control SRAM 1511d, the information of the current state (game history) cannot be confirmed. Even in such cases, a check function may be provided that can detect cheating early.

Specifically, an error may be reported if the comparison result between a first record (the most recent record in peripheral control SRAM 1511d) in which the most recent state of the game history is recorded and a second record (a record in peripheral control RAM 1511c) in which the current state of the game history is recorded meets a predetermined condition.

For example, in a pachinko machine 1 that shoots balls so that they roll on the right side of the play area 5a in a high probability/time-saving state or a jackpot play state, so-called right-handed play, if the state transitions from the high probability/time-saving state to the jackpot play state and then back to the high probability/time-saving state after the jackpot play state ends, the state is switched, but since right-handed play is usually performed, the possibility of winning in the general winning port on the left side of the play area 5a is extremely low. In this case, the number of winning balls in the general winning port may be compared between the jackpot play state and the subsequent high probability/time-saving state, and an error may be notified if a difference is detected. The allowable difference in the number of winning balls in the general winning port between states may be one ball, and an error may be notified if a difference of two or more balls occurs. This is because there is a possibility that unevenness in the launch force will occur when the launch handle is released, causing the game ball to roll on the left side of the play area 5a.

Instead of reporting an error, a security signal may be sent from the external terminal board 784 shown in FIG. 116. The early fraud detection check function described above detects errors by predicting the game from the game state of the pachinko machine 1 (for example, hitting to the right because it is in a high probability/time-saving state), so there is a possibility that an error will be detected when an inexperienced player hits in an unexpected way. For this reason, the pachinko machine 1 may not report an error, but may only output a security signal from the external terminal board 784 without informing the player. In this way, a hall staff member can check for possible errors from a location away from the pachinko machine 1 without the player noticing, and trouble with the player can be prevented.

As such, since the error detection function of the pachinko machine 1 is not perfect, it is possible to check the cause of the error by analyzing the game history outside the pachinko machine 1.

[11-3. Compact Plan 2]
In the above-mentioned modified example 1, among the commands sent from the main control board 1310 to the peripheral control board 1510, the state change event of the pachinko machine 1 is recorded, and the number of counting events in each state during the change is recorded. However, the number of events in each changing state may not be important, and it may be sufficient to know the number of events for each type of state that occurs repeatedly. For this reason, in modified example 2 (compact proposal 2), the state of the pachinko machine 1 and the cumulative number of counting events for each state are recorded.

In variant 2, the game history is recorded using the same game history recording condition setting table (Figure 125) as variant 1.

Figure 127 shows the game history recorded in the memory of variant 2.

As shown in FIG. 127, the game history of variant 2 is composed of a history of state events and the cumulative number of counting events for each state. The history of state events includes the state change event that triggered a state change in the pachinko machine 1, the state after the state change event, and the time at which the state change event occurred. In the pachinko machine 1 of variant 2, the cumulative number of counting events is recorded in five states: low probability/non-time-saving state, low probability/time-saving state, high probability/non-time-saving state, high probability/time-saving state, and jackpot state. The counting events (and commands related to the events) recorded in variant 2 are the number of wins at start port 1 (start port 1 win command), the number of wins at start port 2 (start port 2 win command), the number of changes in special pattern 1 (special pattern 1 pattern type command), the number of changes in special pattern 2 (special pattern 2 pattern type command), the number of wins at general prize port 1 (general prize port 1 win command), the number of wins at general prize port 2 (general prize port 2 win command), the number of wins at general prize port 3 (general prize port 3 win command), the number of wins at large prize port 1 (large prize port 1 win command), the number of wins at large prize port 2 (large prize port 2 win command), the number of gate passes (regular gate pass command), and the number of regular pattern changes (regular pattern stop command).

It is also possible to count the number of counting events other than those mentioned above, and the state in which counting events are recorded separately may be further subdivided.

Next, the game history recording process in Modification 2 will be described in detail. In the game history shown in FIG. 127, when a state change event occurs, the type of state change event, the state after the event occurred, and the date and time of the event are recorded in the state event history. When a change in the state of the gaming machine is detected due to a state change event, the cumulative number of counting events counted in the state before the change is recorded in non-volatile memory, and recording of the cumulative number of counting events described above corresponding to the state after the change is started.

The counting results of the counting events in the current state are recorded in the working area of the peripheral control RAM 1511c, and after a state change, the game history storage area of SRAM 1511d (the cumulative value of that state) is read out, and the value recorded in the working area of the peripheral control RAM 1511c is added to the result and stored in the game history storage area of SRAM 1511d. That is, each time a state change event occurs, the cumulative value in the game history storage area of SRAM 1511d is updated using the value before the state change recorded in the working area of the peripheral control RAM 1511c. For this reason, the counting results in the current state recorded in the working area of the peripheral control RAM 1511c are backed up in the event of a power outage, but are initialized by a normal RAM clear operation.

The counting results of the counting events in the current state may also be written to the game history storage area of SRAM 1511d. That is, each time a counting event occurs, the cumulative value in the game history storage area of SRAM 1511d is updated. In this case, the counting results in the current state recorded in SRAM 1511d are not initialized by the normal RAM clear operation, but are initialized by the game history initialization operation described above.

As described above, in variant 2, the state changes of the pachinko machine 1 are recorded, and counting events for each type of state (number of wins, number of changes, etc.) are recorded, so that long periods of game history can be recorded without increasing the capacity of the game history storage area of SRAM 1511d.

[11-4. Compact Plan 3]
In the above-mentioned modified example 2, among the commands sent from the main control board 1310 to the peripheral control board 1510, the state change of the pachinko machine 1 is recorded by a state change event, and the cumulative number of counting events for each state is recorded. However, there are cases where the timing of the state change is not important, and it is sufficient to know the number of events for each type of state. For this reason, in modified example 3 (compact proposal 3), the state change of the pachinko machine 1 is not recorded, and the cumulative number of counting events for each state is recorded.

In variant 3, the game history is recorded using the same game history recording condition setting table (Figure 125) as variant 1.

In variant 3, the game history recording condition setting table shown in FIG. 125 is used to record the same events as those recorded in variant 1.

Figure 128 shows the game history recorded in the memory of variant example 3.

As shown in FIG. 128, the gaming history of variant 3 is composed of the cumulative number of counting events in each state. Furthermore, the gaming history of variant 3 includes the cumulative time for each state. The cumulative time is included so that the hall can estimate the number of times an event has occurred (for example, the number of times a jackpot has occurred) from the cumulative time. The five states for which counting events are recorded separately are low probability/non-time-saving state, low probability/time-saving state, high probability/non-time-saving state, high probability/time-saving state, and jackpot state, but counting events may be recorded by further subdividing them.

The counting events (and commands related to the events) recorded in variant 3 are the number of wins at start gate 1 (start gate 1 win command), the number of wins at start gate 2 (start gate 2 win command), the number of changes in special pattern 1 (special pattern 1 pattern type command), the number of changes in special pattern 2 (special pattern 2 pattern type command), the number of wins at general prize gate 1 (general prize gate 1 win command), the number of wins at general prize gate 2 (general prize gate 2 win command), the number of wins at general prize gate 3 (general prize gate 3 win command), the number of wins at large prize gate 1 (large prize gate 1 win command), the number of wins at large prize gate 2 (large prize gate 2 win command), the number of gate passes (normal gate pass command), and the number of changes in normal patterns (normal pattern stop command). Note that the number of counting events other than those mentioned above may also be counted.

Next, the game history recording process in Modification 2 will be described in detail. In the game history shown in FIG. 128, when a state change event occurs, the cumulative number of the counting events described above is recorded in accordance with the state of the gaming machine that has changed due to the state change event.

The counting results of the counting events in the current state are recorded in the working area of the peripheral control RAM 1511c, and after a state change, the game history storage area of SRAM 1511d (the cumulative value for that state) is read out, and the value recorded in the working area of the peripheral control RAM 1511c is added to the value and stored in the game history storage area of SRAM 1511d. In other words, the cumulative value in the game history storage area of SRAM 1511d is updated each time a state change event occurs. For this reason, the counting results in the current state recorded in the working area of the peripheral control RAM 1511c are backed up in the event of a power outage, but are initialized by a normal RAM clear operation.

The counting results of the counting events in the current state may also be written to the game history storage area of SRAM 1511d. That is, each time a counting event occurs, the cumulative value in the game history storage area of SRAM 1511d is updated. In this case, the counting results in the current state recorded in SRAM 1511d are not initialized by the normal RAM clear operation, but are initialized by the game history initialization operation described above.

As described above, in variant 2, the state changes of the pachinko machine 1 are recorded, and counting events for each type of state (number of wins, number of changes, etc.) are recorded, so that long periods of game history can be recorded without increasing the capacity of the game history storage area of SRAM 1511d.

As explained above, in variants 1 to 3, when an event occurs, the game history recording process records the data in the working area (peripheral control RAM 1511c), and when the conditions for writing to the game history storage area of the peripheral control SRAM 1511d are met, the data in the working area is written to the game history storage area of the SRAM 1511d. Furthermore, with a normal RAM clear operation, the information written to the game history storage area of the SRAM 1511d is not erased (initialized), but the information recorded in the working area (peripheral control RAM 1511c) is erased (initialized).

Here, we will briefly touch on the business hours of the hall. In many cases, the business hours of the hall are set, for example, opening at 10:00 and closing at 23:00. For this reason, during times when there are many players, such as shortly after opening or in the evening, it may be difficult for the staff to monitor whether the players are playing illegally. However, as the closing time approaches, the number of players decreases, and if there is a pachinko machine in a high probability/time-saving state just before closing, the pachinko machine in the high probability/time-saving state may be initialized to a low probability/non-time-saving state in preparation for the next day's business. In this case, since there are few players, the pachinko machine in the high probability/time-saving state can be monitored, so it is possible to know whether the most recent play has been illegal. In other words, considering the situation where there are some pachinko machines for which the most recent play history is not necessary, by allowing the staff to select whether to leave the most recent information, it is possible to provide an efficient gaming machine.

Specifically, by initializing the pachinko machine 1 by the RAM clear operation, the game history stored in the work area for events that occurred after the most recent event is erased, and the game history stored in the game history storage area for events that occurred before the most recent event is left intact. In other words, although the pachinko machine records information that is not output from the external terminal board 784, the game history is recorded by dividing it into information recorded in the work area that is erased by the RAM clear operation and information recorded in the game history storage area that is not erased by the RAM clear operation. In this way, if the store clerk wants to keep the records of all events recorded in the work area, he or she can simply cause a change in the state of the pachinko machine, and if the store clerk wants to erase the records of events recorded in the work area, he or she can simply perform the RAM clear operation. The reason why the RAM clear operation does not erase all game history, but only erases the game history stored in the work area for events that occurred after the most recent event, is because, as mentioned above, the store clerk does not see the events that occurred before the most recent event (they cannot be seen due to the large number of players).

As mentioned above, the pachinko machine 1 of this embodiment not only records information about winning in the start gate, but also records winnings in general winning gates that are not related to the lottery in the working area, so that it is characterized by collecting game history while game balls are being shot into the game area 5a even if the special pattern (a pattern that starts to change when a ball wins in the start gate and the stopping pattern of this pattern indicates the lottery result) is not changing. In other words, the game history recording process is not a process that is executed when the lottery is executed, but rather a process that may be executed at any time while power is being supplied to the pachinko machine.

In addition, in a low probability/non-time shortening state, the game balls are shot so that they enter the starting hole 2002, like a so-called left shot or a quick shot. In such a case, the game balls should enter the starting hole 2002 and the general winning hole 2001 at a moderate rate. However, if there are no (or very few) winnings in the general winning hole 2001 but many game balls enter the starting hole 2002, or conversely, if there are no (or very few) winnings in the starting hole 2002 but many game balls enter the general winning hole 2001, there is a possibility that fraud is occurring. Therefore, the first winning hole and the second winning hole, which receive game balls at the same time, may be set as targets of monitoring, and an error may be notified when the number of winnings in the first winning hole exceeds a predetermined multiplier of the number of winnings in the second winning hole.

Also, instead of reporting an error, a security signal may be sent from the external terminal board 784. With the detection method described above, there is a possibility that an error may be detected if an inexperienced player plays in an unexpected way. For this reason, the pachinko machine 1 may not report an error, but may simply output a security signal from the external terminal board 784 without informing the player. In this way, a staff member at the parlor may be able to check for possible errors from a location away from the pachinko machine 1 without the player noticing, and trouble with the player may also be prevented.

The pachinko machine 1 of this embodiment is also characterized by collecting information accumulated over multiple games as a gaming history. Since there is a limit to the amount of gaming history data that can be recorded, if each game (each change) was recorded, it would not be possible to record many games (long periods of time), so this makes it possible to keep records of more games.

[12. Game Performance Setting Function]
Next, an embodiment of a pachinko machine having a setting function will be described. The pachinko machine of this embodiment has a setting function for changing the operation rate of a condition device, for example, as a gaming performance.

[12-1. Basic configuration of a pachinko machine with setting function]
Figure 129 is a block diagram showing generally the control configuration of a pachinko machine having a setting unit, Figure 130 is an oblique view of a pachinko machine having a setting unit seen from the back side with the door open, Figure 131 is an oblique view of the pachinko machine shown in Figure 130 seen from the back side with the door closed, and Figure 132 is a diagram showing the setting unit of the pachinko machine shown in Figure 130.

The pachinko machine shown in FIG. 129 has a setting board 970 for setting the game performance of the pachinko machine. The setting board 970 is connected to a payout control board 951, and a payout control unit 952 acquires the operation status of each switch and controls the display of a setting display 974.

As shown in the front view of FIG. 132(A), the setting board 970 is provided with a setting key 971 for changing the operation mode of the pachinko machine 1 to a setting change mode or a setting confirmation mode, a setting change switch 972 for changing the setting value, a setting confirmation switch 973 for confirming and inputting the changed setting value, and a setting display 974 for displaying the set or selected setting value. The setting board 970 functions as a setting change operation unit that accepts setting change operations.

In this embodiment, the operation signals of the setting key 971, setting change switch 972, and setting confirmation switch 973 on the setting board 970 are input to the payout control unit 952. In addition, the setting display 974 is controlled by the payout control unit 952. The confirmed settings are sent from the payout control unit 952 to the main control board 1310. Note that, as described below, the main control board 1310 may control the components on the setting board 970.

The setting key 971 is a switch that maintains a shorted or open state of the contacts by inserting a specific key into the keyhole (key insertion section) and turning the key to the setting position, and outputs a signal that triggers a change to the setting change mode or the setting confirmation mode. Note that the setting key 971 may not be provided and another switch may be used instead. In this case, the setting change mode or the setting confirmation mode may be started by operating (pressing and holding) the setting change switch 972 for a specific period of time (e.g., 5 seconds) or more, and the setting change mode or the setting confirmation mode may be ended by pressing and holding the setting change switch 972 during the setting change mode or the setting confirmation mode.

The setting change mode may also be started and ended by operating the RAM clear switch 954. For example, the setting change mode is started by turning on the power while operating the RAM clear switch 954, and continuing to operate the RAM clear switch 954 for a predetermined time (e.g., 5 seconds) or more (long press). The setting change mode is also started by turning on the power while operating the RAM clear switch 954, and if the continuous operation of the RAM clear switch 954 is less than the predetermined time, a RAM clear process is executed. Furthermore, the setting change mode may be ended by long pressing the RAM clear switch 954 during the setting change mode.

In this way, even employees who do not have a key for the setting key 971 can change the settings, making it easier to handle the pachinko machine 1 in the parlor. In addition, since the operation time of the setting change switch 972 is detected, it is preferable to detect the operation when the setting change switch 972 falls.

The setting change switch 972 is composed of, for example, a push button switch, and is operated to sequentially switch and select the setting value (1 to 6). That is, when the setting change switch 972 is pressed once, the setting value increases by 1, and when the setting change switch 972 is operated when the setting value is 6, the setting value becomes 1. It is also possible to select the setting value by operating the RAM clear switch 954 without providing the setting change switch 972. It is also possible for the setting value to have fewer stages (for example, two stages) or more stages (for example, eight stages) instead of six stages.

Also, the setting change switch 972 may not be provided, and the setting key 971 may double as the setting change switch 972. In this case, the setting key 971 can be operated in three stages, with the key being able to be inserted and removed in the neutral position (normal position), and turning it to the left is an operation for starting the setting change mode, and turning it to the right is an operation for selecting the setting value to be set (turning it to the right functions as the setting change switch 972). The setting key 971 has an alternative operation that allows it to hold the left and neutral positions, and a momentary operation that does not hold the right position (it returns to the neutral position when the hand is released from the key).

The setting value changes the rate at which the condition device operates (i.e., the probability of a special symbol hitting), with a setting value of 1 indicating a low probability of hitting, and a setting value of 6 indicating a high probability of hitting. The setting value may also change various game-related parameters, such as the rate of guaranteed jackpots, the rate of time-saving (ST) after a jackpot, the number of time-saving times, the number of jackpot rounds and counts, the probability of hitting a normal symbol, and the number of prize balls in the normal prize slot, start slot, and large prize slot, thereby changing the number of prize balls the player can win.

The setting confirmation switch 973 is, for example, a momentary switch, and is a switch for confirming the setting value selected by operating the setting change switch 972 and inputting it into the pachinko machine 1. The setting confirmation switch 973 may be a push button switch or a momentary toggle switch, so long as it is a momentary switch. The setting change switch 972 and the setting confirmation switch 973 may be configured with different operating methods (operation directions) and shapes to prevent the two switches from being operated by mistake. For example, the setting change switch 972 may be configured with a push button switch, and the setting confirmation switch 973 may be configured with a momentary toggle switch.

In addition, the setting confirmation switch 973 may not be provided, and the selected setting may be confirmed by returning the setting key 971 to the normal position. The selected setting value may also be confirmed by the operation of another switch or sensor provided in the pachinko machine 1. For example, the selected setting may be confirmed by operating the handle lever 504 of the handle unit 500, contact detection by the contact detection sensor 509 when the handle lever 504 is touched, operating the stop button of the handle unit 500, operating the operation button 220C, operating the ball lending button, operating the return button, or detecting the entry of a game ball into the start hole 2002, 2004. The operation unit that substitutes for the setting confirmation switch 973 may be a switch that can be operated by the player (used for playing) or a switch that cannot be operated by the player (provided on the back side of the pachinko machine).

In other words, in the illustrated example, three switches (including a setting key) are provided on the setting board 970 to set the game performance of the pachinko machine 1, but it is sufficient to provide the setting board 970 with one or two switches.

Furthermore, without providing any of the setting key 971, the setting change switch 972, and the setting confirmation switch 973, the setting change operation may be possible only with the RAM clear switch 954. For example, the setting change mode may be started by turning on the power while operating the RAM clear switch 954, and continuing (pressing and holding) the operation of the RAM clear switch 954 for a predetermined time (e.g., 5 seconds) or more. Also, if the power is turned on while operating the RAM clear switch 954, and the operation of the RAM clear switch 954 is continued for less than the predetermined time, a RAM clear process is executed. Furthermore, instead of the setting change switch 972, the setting value may be selected by operating the RAM clear switch 954 for less than a predetermined time (e.g., 5 seconds) during the setting change mode, and instead of the setting confirmation switch 973, the setting value may be confirmed by operating the RAM clear switch 954 for a predetermined time or more (pressing and holding). Furthermore, the setting change mode may be ended by pressing and holding the RAM clear switch 954 after the setting is confirmed.

The setting display 974 is configured, for example, with a 7-segment LED, and displays the setting value selected by operating the setting change switch 972, and displays the current setting value by a specified operation (for example, operating the setting key 971). Note that instead of a 7-segment LED, the setting display 974 may be configured with LEDs corresponding to the number of settable values. In this case, the LED corresponding to the setting value is lit to display the setting value.

In the pachinko machine 1 of this embodiment, the payout control board 951 is provided with an error type indicator using a 7-segment LED that displays the type of payout error, but this error type indicator may also serve as the setting indicator 974, and the selected setting value or the current setting value may be displayed on the error type indicator. In this case, it is advisable to change the display mode so that the display of the error type and the display of the setting value can be distinguished. For example, the dot may be turned off to display the error type, and the dot may be turned on to display the setting value. Also, the display of the error type may be turned on (not blinking), and the display of the setting value may be blinking.

In the illustrated example, the setting board 970 is connected to the dispensing control board 951, but it may also be connected to a power supply board (not shown) in the power supply board box 930. By providing the setting board 970 alongside the power supply board (or inside the power supply board box 930), the setting key 971 and power switch 932, which are operated when changing settings, can be positioned nearby, improving the operability of changing settings.

In addition, as described below, the setting board 970 may be connected to the main control board 1310.

In yet another embodiment, the setting board 970 may not be an independent board, but may be configured as part of the dispensing control board 951, the power supply board, or the main control board 1310. In other words, the setting key 971, the setting change switch 972, the setting confirmation switch 973, and the setting display 974 may be mounted on either the dispensing control board 951, the power supply board, or the main control board 1310.

As shown in FIG. 130, the setting board 970 is attached to the right side of the lower part of the main body frame 4 constituting the pachinko machine 1 (i.e., the frame side, not the game board 5), and as shown in FIG. 131, when the main body frame 4 is housed in the outer frame 2, at least a part of the setting board 970 faces the right frame member 40 of the outer frame 2. When the main body frame 4 is housed in the outer frame 2, the distance between the setting board 970 and the right frame member 40 is narrow, making it difficult to operate the keys and switches on the setting board 970 in this state. In this way, the right frame member 40 functions as a setting change difficult means that conceals the setting key 971, prevents the insertion of a key into the keyhole of the setting key 971, and makes it difficult to operate the setting board 970 (setting change operation unit). In the pachinko machine 1 of this embodiment, when the main frame 4 is housed in the outer frame 2, the setting key 971 as at least a part of the setting board 970 may face the right frame member 40 of the outer frame 2 at a narrow gap, but the entire setting board 970 may face the right frame member 40 of the outer frame 2 at a narrow gap. In this case, the keys and switches may be arranged vertically so that the width of the setting board 970 does not exceed the width of the right frame member 40. In this way, when the entire setting board 970 faces the right frame member 40 of the outer frame 2 at a narrow gap, it is difficult to operate the setting board 970 while the pachinko machine 1 is in operation (i.e., when the main frame 4 is housed in the outer frame 2), and it is possible to suppress fraudulent acts by players changing the settings of the pachinko machine 1.

In the illustrated example, the member (means for making it difficult to change settings) that faces the setting board 970 when the main body frame 4 is housed in the outer frame 2 is the right frame member 40, but it may be another member. For example, a cover provided on the outer frame 2 may be arranged in a position that faces the setting board 970 at a narrow gap when the main body frame 4 is housed in the outer frame 2. Also, a cover that moves in conjunction with the opening and closing of the main body frame 4 may be provided, and the cover may be arranged in a position that faces the setting board 970 at a narrow gap when the main body frame 4 is housed in the outer frame 2.

The setting change difficult means constituted by a member provided opposite the setting board 970 may be a cover covering the setting board 970. In this case, it is preferable to cover the setting key 971, which is the trigger for starting the setting change mode, with a double cover. For example, an inner cover covering the setting board 970 and an outer cover covering various control boards including the setting board 970 may be provided. Also, an inner cover covering the keyhole of the setting key 971 and an outer cover covering the setting board 970 may be provided. More specifically, the setting board 970 is housed in a setting board case, and the setting board case is provided with a first cover body (for example, a door-shaped lid body that can be opened during operation) that prevents inadvertent operation of the setting key 971 and each switch 972, 973 (at least the setting key 971). Furthermore, a second cover body that covers various control boards including the setting board 970 and the main control board 1310 is provided on the outer frame 2. The second cover body may be provided on the main frame 4 or the game board 5 to cover various control boards. This prevents the setting change mode from being started through inadvertent operations, and prevents dishonest players from changing the settings of the pachinko machine 1.

When the main frame 4 is housed in the outer frame 2, the distance at which the setting board 970 faces the right frame member 40 or other members needs only to be shorter than the length of the head of the key (the key head that is held during operation) inserted into the keyhole of the setting key 971.

The setting board 970 should be located near the power switch 932 so that the setting key 971, which is operated when changing settings, and the power switch 932 are located nearby. This improves operability when starting the setting change mode.

As shown in FIG. 131, the power supply board box 930 is provided with a power switch 932 for supplying power to the pachinko machine 1, and the payout control board unit 950 is provided with a RAM clear switch 954 for initializing the main control RAM 1312 of the pachinko machine 1. In this way, the pachinko machine 1 is provided with a number of switches that are not operated during play and can be operated from the back side, but the power switch 932 and RAM clear switch 954 described above are provided in positions that can be seen and operated from the back side. On the other hand, the setting key 971 (preferably the setting change switch 972 and setting confirmation switch 973 as well) are provided in positions that are difficult to see and operate from the back side while the pachinko machine 1 is in operation. This is because the power switch 932 and RAM clear switch 954 are frequently operated during the manufacturing process, and are provided in positions that can be operated from the back side while the pachinko machine 1 is in operation. On the other hand, the setting key 971 is hidden so that it is difficult to operate while the pachinko machine 1 is in operation, thereby preventing fraudulent acts of operating the setting board 970 and changing the settings of the pachinko machine 1 during play. In this way, in the pachinko machine 1 of this embodiment, the switch is located on the back side of the pachinko machine 1 to achieve both convenience and prevention of fraudulent acts.

Similarly, since the current setting value of the pachinko machine 1 is important information for the player to select a machine, it is desirable that the player does not know about it. For this reason, as shown in FIG. 131, like the setting key 971, the setting display 974 should be placed opposite the right frame member 40 at a close distance so that the display cannot be seen. Normally, when the main body frame 4 is housed in the outer frame 2 or when the setting key 971 is not operated, it is desirable that the setting display 974 is turned off so that the setting value is not known to the player. In this way, the right frame member 40 functions as a visibility-obscuring means that conceals the display contents of the setting display 974 and makes it difficult to see the display contents of the setting display 974 (setting status display section).

Figure 132 (B) is a top view of the setting board 970 when the main frame 4 is housed in the outer frame 2. In this state, the setting board 970 faces the right frame member 40 at a narrow distance, so the head of the key 975 inserted into the keyhole of the setting key 971 interferes with the right frame member 40, making it impossible to insert the key 975 into the keyhole of the setting key 971.

On the other hand, when the main frame 4 is released from the outer frame 2, the right frame member 40 is not positioned in front of the keyhole of the setting key 971, and the key 975 can be inserted into the keyhole of the setting key 971.

In addition, the display surface of the setting display 974 faces the side of the pachinko machine 1 and faces the right frame member 40 when the main body frame 4 is housed in the outer frame 2, making it difficult for a player to check the current setting value of the pachinko machine from the front.

Figure 133 shows a modified example of the setting board 970.

In this modified example, as in the previous example, the setting board 970 is provided with a setting key 971, a setting change switch 972, a setting confirmation switch 973, and a setting display 974. However, in this modified example, the setting key 971 is arranged sideways on the setting board 970, and the key 975 is inserted from the side of the setting board.

For this reason, the setting board 970 of this modified example is installed on the back side, not the side side, of the main body frame 4, with the keyhole facing the side. Then, as shown in FIG. 133(B), when the setting board 970 is viewed from above, with the main body frame 4 housed in the outer frame 2, the side of the setting board 970 (i.e., the keyhole) faces the right frame member 40 at a narrow distance, so that the head of the key 975 inserted into the keyhole of the setting key 971 interferes with the right frame member 40, and the key 975 cannot be inserted into the keyhole of the setting key 971.

In the modified example shown in FIG. 133, the board of the pachinko machine 1 can be arranged in the same orientation as the other boards, and even if the difficulty of arranging the boards is reduced, it is possible to prevent fraudulent acts such as manipulating the setting board 970 while the pachinko machine 1 is in operation to change the settings of the pachinko machine 1.

Next, we will explain a modified version of a pachinko machine with a setting unit. In this modified version, the setting board 970 is provided on the game board 5 instead of the main body frame 4, and is connected to the main control board 1310.

Figure 134 is a block diagram showing the control configuration of this modified pachinko machine, Figure 135 is a perspective view of a game board having a setting section seen from behind, and Figure 136 is a perspective view of a pachinko machine equipped with the game board shown in Figure 135 seen from behind.

The setting board 970 is provided with a setting key 971, a setting change switch 972, a setting confirmation switch 973, and a setting display 974. The setting board 970 may be the one shown in FIG. 132(A) or the one shown in FIG. 133(A).

In the pachinko machine 1 shown in FIG. 134, the setting board 970 for setting the game performance of the pachinko machine is connected to the main control board 1310, and the main control MPU 1311 acquires the operation status of each switch, and the main control MPU 1311 controls the display of the setting display 974.

The function and configuration of the setting board 970 and each component on the setting board are the same as in the previously described embodiment, and common explanations will be omitted.

The main control board 1310 is provided with a base display 1317 consisting of a 7-segment LED. For this reason, the base display 1317 may be used as both the setting display 974 and display the selected setting value and the current setting value on the base display 1317. The base display 1317 normally switches between displaying the base value of the provisional section (the section currently being measured) and the base value of the confirmed section (the straight section) at a predetermined time interval. On the other hand, in the setting change mode, the selected (next setting value) is displayed, and during setting confirmation (see FIG. 152), the current setting value is displayed.

In this case, it is advisable to change the display format so that the display of the base value and the display of the set value can be distinguished. For example, the display of the base value may use four digits, but the display of the set value may use only one specified digit (for example, the rightmost digit) and display "- ". The digits not used to display the set value may display other numbers, letters, or symbols, rather than "-", as long as they are not used to display the base value. Furthermore, when displaying the set value, letters not used to display the base value may be displayed. For example, the set value may be displayed in six alphabetical levels: A, b, C, d, E, and F.

Furthermore, in the setting change mode, the setting value may be displayed blinking while being selected, and the confirmed setting value may be displayed lit. The current setting value may be displayed lit. In addition, the top two digits of the base display indicate the type of display data, and no numbers are displayed. For this reason, the most significant digit may be used to display the setting value. Note that when the base display 1317 and the setting display 974 are used together, the setting value is displayed preferentially during the setting change mode and during setting confirmation, so although the base value is calculated, it is not displayed. After that, when the setting change mode or confirmation of the setting value ends, the base display 1317 resumes displaying the base value.

In addition, when the base display 1317 and the setting display 974 are used together, the process of outputting the display contents to the setting display 974 is executed by the game control code 13131 in the game control area, and the process of outputting the display contents to the base display 1317 is executed by the base calculation/display code 13135 outside the game control area. However, part of the base calculation/display code 13135 (for example, the process of outputting display data to the driver circuit) may be provided within the game control area. Sharing the processes reduces the program capacity and saves memory.

On the other hand, if the process of outputting the display contents to the setting display 974 is executed by the game control code 13131 in the game control area, and the process of outputting the display contents to the base display 1317 is executed by the base calculation/display code 13135 outside the game control area, the processes inside and outside the game control area can be completely separated, improving security.

In addition, processing for changing settings and checking settings may be performed outside the game control area.

In other words, whether the setting display 974 is provided separately from the base display 1317 or is used in combination with the base display 1317, either case falls within the scope of the invention described in this specification. In this way, by displaying the multiple displays provided on the main control board box 1320 in an unconfusing manner during setting change mode or while checking setting values, it is possible to prevent operational errors when changing settings or misidentification of setting values.

Even if the base display 1317 and the setting display 974 are not shared, the display on the base display 1317 may be turned off or fully lit while the setting display 974 is displaying the setting value. Even in this case, when the setting change mode or confirmation of the setting value is completed, the base display 1317 resumes displaying the base value. By not displaying multiple displays on the main control board box 1320 during the setting change mode or confirmation of the setting value, it is possible to prevent operational errors when changing settings or misidentification of the setting value.

In the illustrated example, the setting board 970 is connected to the main control board 1310, but the setting board 970 may not be an independent board and may be formed as part of the main control board 1310. In other words, the main control board 1310 may be equipped with a setting key 971, a setting change switch 972, a setting confirmation switch 973, and a setting display 974.

The setting board 970 may be enclosed in the main control board box 1320 together with the main control board 1310. When the setting board 970 is enclosed in the main control board box 1320, the main control board box 1320 is provided with holes or notches for operating the setting key 971, the setting change switch 972, and the setting confirmation switch 973 on the setting board 970.

When the setting board 970 is enclosed in the main control board box 1320, the structure of the main control board box 1320, that is, the opening and closing direction, differs depending on the orientation of the keyhole of the setting key 971 on the setting board 970. Specifically, when the key 975 is inserted vertically into the board from the front of the board, the main control board box 1320 may be structured so that the front and back sides of the setting board 970 are separated vertically to the setting board 970, or the front side box (or cover) and the back side box are opened and closed with one side as a hinge. On the other hand, when the key 975 is inserted from the side in the direction in which the board extends, the main control board box 1320 may be structured so that the front side box (or cover) and the back side box of the setting board 970 slide and separate in the extension direction of the setting board 970 (insertion direction of the key 975).

In this modified example, the operation signals of the setting key 971, the setting change switch 972, and the setting confirmation switch 973 on the setting board 970 are input to the main control MPU 1311. In addition, the setting display 974 is controlled by the main control MPU 1311.

As shown in FIG. 135, the setting board 970 is attached to the right side (left side in FIG. 135) of the game board 5 constituting the pachinko machine 1, and as shown in FIG. 136, when the main body frame 4 to which the game board 5 is attached is housed in the outer frame 2, at least a part of the setting board 970 faces the right frame member 40 of the outer frame 2. When the main body frame 4 is housed in the outer frame 2, the distance between the setting board 970 and the right frame member 40 is narrow, so that when the main body frame 4 is housed in the outer frame 2, it is difficult to operate the keys and switches on the setting board 970. In the pachinko machine 1 of this embodiment, when the main body frame 4 is housed in the outer frame 2, the setting key 971 as at least a part of the setting board 970 may face the right frame member 40 of the outer frame 2 at a narrow distance, but the entire setting board 970 may face the right frame member 40 of the outer frame 2 at a narrow distance. In this case, it is preferable to arrange the keys and switches vertically so that the width of the setting board 970 does not exceed the width of the right frame member 40. In this way, when the entire setting board 970 faces the right frame member 40 of the outer frame 2 at a narrow distance, it is possible to prevent fraudulent acts such as manipulating the setting board 970 while the pachinko machine 1 is in operation (i.e., when the main body frame 4 is housed in the outer frame 2) to change the settings of the pachinko machine 1.

In the illustrated example, the member (means for making it difficult to change settings) that faces the setting board 970 when the main body frame 4 is housed in the outer frame 2 is the right frame member 40, but it may be another member. For example, a cover provided on the outer frame 2 may be arranged in a position that faces the setting board 970 at a narrow gap when the main body frame 4 is housed in the outer frame 2. Also, a cover that moves in conjunction with the opening and closing of the main body frame 4 may be provided, and the cover may be arranged in a position that faces the setting board 970 at a narrow gap when the main body frame 4 is housed in the outer frame 2.

When the main frame 4 is housed in the outer frame 2, the distance at which the setting board 970 faces the right frame member 40 or other members needs only to be shorter than the length of the head of the key (the key head that is held during operation) inserted into the keyhole of the setting key 971.

As shown in FIG. 136, the power supply board box 930 is provided with a power switch 932 for supplying power to the pachinko machine 1, and the payout control board unit 950 is provided with a RAM clear switch 954 for initializing the main control RAM 1312 of the pachinko machine 1. In this way, the pachinko machine 1 is provided with a number of switches that are not operated during play and can be operated from the back side, but the power switch 932 and RAM clear switch 954 described above are provided in positions that can be seen and operated from the back side. On the other hand, the setting key 971 (preferably the setting change switch 972 and setting confirmation switch 973 as well) are provided in positions that are difficult to see and operate from the back side while the pachinko machine 1 is in operation. This is because the power switch 932 and RAM clear switch 954 are frequently operated during the manufacturing process, and are provided in positions that can be operated from the back side while the pachinko machine 1 is in operation. On the other hand, the setting key 971 is hidden so that it is difficult to operate while the pachinko machine 1 is in operation, thereby preventing fraudulent acts of operating the setting board 970 and changing the settings of the pachinko machine 1 during play. In this way, in the pachinko machine 1 of this embodiment, the switch is located on the back side of the pachinko machine 1 to achieve both convenience and prevention of fraudulent acts.

Similarly, since the current setting value of the pachinko machine 1 is important information for the player to select a machine, it is desirable that the player does not know about it. For this reason, as shown in FIG. 136, like the setting key 971, the setting display 974 should be placed opposite the right frame member 40 at a close distance so that the display cannot be seen. Normally, when the main frame 4 is housed in the outer frame 2 or when the setting key 971 is not operated, it is desirable that the setting display 974 is turned off so that the setting value is not known to the player. In this way, the right frame member 40 functions as a visibility-obscuring means that conceals the display contents of the setting display 974 and makes it difficult to see the display contents of the setting display 974 (setting status display section).

In the pachinko machine 1 shown in Figure 134, when the main body frame 4 is housed in the outer frame 2, the setting board 970 is viewed from above as shown in Figures 132 (B) and 133 (B). In this state, the setting board 970 and the keyhole of the setting key 971 face the right frame member 40 at a narrow distance, so the head of the key 975 inserted into the keyhole of the setting key 971 interferes with the right frame member 40, and the key 975 cannot be inserted into the keyhole of the setting key 971.

In addition, the display surface of the setting display 974 faces the side of the pachinko machine 1 and faces the right frame member 40 when the main body frame 4 is housed in the outer frame 2, so the player cannot check the current setting value of the pachinko machine from the front.

Next, we will explain the process for changing settings.

Figure 137 is a flow chart showing an example of the initialization process. The initialization process shown in Figure 137 differs from the initialization process described above in Figure 21 in that it performs a RAM clear process when the setting key is operated (steps S17, S30) and in that it performs a setting change process within the CPU initial setting process (step S28). Note that the same steps as those in the initialization process described above in Figure 21 are given the same reference numerals, and detailed explanations thereof will be omitted.

When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. The main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Next, the main control MPU 1311 starts the built-in watchdog timer (step S12) and determines whether a predetermined wait time (the time required to start up the sub-board (such as the peripheral control board 1510)) has elapsed (step S16). If the predetermined wait time has elapsed, it determines whether the setting key 971 has been operated and its output is on (step S17). If the setting key 971 is operated, the program will retain the setting value data and game status (e.g., special bonus state, time-saving state, reserved memory for special and normal symbols, information regarding winning balls) from the data backed up in the work area of the built-in RAM 1312, and erase all other data (step S30), and proceed to step S24.

On the other hand, if the setting key 971 has not been operated, it is determined whether the RAM clear switch has been operated (step S18). If the RAM clear switch has been operated, data backed up in the work area of the built-in RAM 1312 other than the base calculation work area (base calculation area 13128) is erased (step S30), and the process proceeds to step S24. On the other hand, if the RAM clear switch has not been operated, the data backed up in the built-in RAM 1312 is not erased, and it is determined whether the power outage flag has been set (step S20).

If the power outage flag is not set, the data in the work area of the internal RAM 1312 may be incorrect, so the data backed up in the work area (other than the base calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the power outage flag is set, the power outage flag is cleared and the checksum calculated from the data backed up in the work area of the internal RAM 1312 using the checksum calculated at the time of the previous power outage is compared (verified) with the checksum stored in step S48 (step S22).

If the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of the built-in RAM 1312 may not be correct, so the data backed up in the work area (other than the base calculation area 13128) is erased (step S30) and the process proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of the built-in RAM 1312 is correct, so the data backed up in the work area is not erased and the process proceeds to step S24.

Then, the check code is used to determine whether the base calculation work area (base calculation area 13128) is normal (step S24). If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the data stored in the base calculation work area is erased (step S26).

In the pachinko machine 1 of this embodiment, cases in which at least a part of the area of the RAM 1312 is initialized include the operation of the setting key 971 (step S17), the operation of the RAM clear switch (step S18), a power failure flag abnormality in which the power failure flag is not set (step S20), a RAM abnormality in which the RAM checksum does not match (step S22), and an abnormality in the base calculation work (step S24). Of these, as shown in the figure, if the operation of the setting key 971 is detected when the power is turned on, the data of the setting value and the game state (for example, the probability state, the time-saving state, the reserved memory of special patterns and normal patterns, and information on prize balls) in the game control area 13126 (including the game work area and the game stack area) is left, and the other data is cleared, and the base calculation area 13128 (outside the game control area) is not cleared. If operation of the RAM clear switch is detected when the power is turned on, or if there is a power outage flag abnormality or RAM abnormality, the game control area 13126 (including the game work area and game stack area) is cleared, and the base calculation area 13128 (including the base calculation work area and base calculation stack area) is not cleared. Also, if there is an abnormality in the base calculation work, the base calculation area 13128 (outside the game control area) is cleared, and the game control area 13126 is not cleared.

Unlike the illustrated example, in the case of a power outage flag abnormality, a RAM abnormality, or a base calculation work abnormality, the validity of the data stored in the RAM 1312 is not guaranteed, so the entire RAM area including the game control area 13126 and the base calculation area 13128 may be cleared. If the memory configuration is such that clearing the entire RAM area in the case of a base calculation work abnormality would cause data indicating the game status to be lost and normal processing would be impossible, it is advisable to initialize only the base calculation work area and the base calculation stack area. Also, if operation of the RAM clear switch is detected when the power is turned on, as described above, the game control area 13126 (including the game work area and game stack area) is cleared, but the base calculation area 13128 does not need to be cleared.

In this way, in the pachinko machine 1 of this embodiment, data backed up in the work area of the built-in RAM 1312 is erased under different conditions for each type of data (game control area 13126 (setting values, game status data), base calculation area 13128). In other words, by operating the RAM clear switch, the backed up game control area 13126 other than the setting values is erased, but the setting values and base calculation area 13128 are not erased. If the setting values were erased by operating the RAM clear switch, it would be necessary to reset the setting values every time a RAM clear operation is performed, which would make maintenance of the pachinko machine 1 in the hall more complicated. For this reason, the setting values are not erased by operating the RAM clear switch.

For the processing after step S28, either the processing shown in FIG. 22 or the processing shown in FIG. 102 may be adopted as necessary. The difference between FIG. 22 and FIG. 102 is the presence or absence of processing (steps S50, S52) to calculate and store a check code from the data in the base calculation work area (base calculation area 13128) when the power is cut off.

Figures 138 and 139 are flow charts showing an example of setting change processing and setting display processing, where Figure 138 shows processing when the setting board 970 is connected to the dispensing control board 951 (or is configured integrally with the dispensing control board 951), and Figure 139 shows processing when the setting board 970 is connected to the main control board 1310 (or is configured integrally with the main control board 1310).

First, we will explain the setting change process in which the main control board 1310 and the payout control board 951 shown in Figure 138 (A) work together.

When the power is turned on to the pachinko machine 1, (1) the payout control unit 952 determines whether the setting key 971 is turned on and whether the main body frame 4 is released from the outer frame 2. Whether the main body frame 4 is released from the outer frame 2 can be determined from a detection signal from the main body frame release switch. Note that, considering the position of the setting key 971, the main body frame 4 must be released from the outer frame 2 in order to operate the setting key 971, so the determination of whether the main body frame 4 is released may be omitted.

If the setting key 971 is operated to ON and the main frame 4 is released from the outer frame 2, the payout control unit 952 starts the setting change mode. In this way, the payout control unit 952 functions as a setting change permission state generating means. As a starting condition for the setting change mode other than the above, the setting change mode may not be started if the handle lever 504 of the handle unit 500 is operated, the contact detection sensor 509 detects that the handle lever 504 has been touched, a prepaid card is inserted in the CR unit (there is a balance on the prepaid card), or there is a balance inserted in the cash sandwich. In addition, it is better not to start the setting change mode if the pachinko machine 1 detects the possibility of some kind of fraudulent activity (for example, a magnetic error). The determination of these conditions may be made by the main control MPU 1311, not the payout control unit 952, after receiving the setting change start command. In such a case, it is presumed that the pachinko machine 1 is not being maintained by the hall, and there is a possibility that a fraudulent player is about to perform a setting change operation, so it is better not to switch to the setting change mode.

(2) When the setting change mode starts, the payout control unit 952 sends a setting change start command to the main control board 1310.

(3) When the main control MPU 1311 receives a setting change start command from the payout control unit 952, it executes a RAM clear process before the setting change. This RAM clear process before the setting change leaves data on the game state (e.g., special bonus state, time-saving state, reserved memory of special and normal symbols, information on winning balls) in the game control area 13126 (including the game work area and game stack area), clears all other data, and does not clear the base calculation area 13128 (outside the game control area). Note that the setting value is set to the initial value later in step (6), so it does not need to be cleared in this step.

(4) The main control MPU 1311 then sends a setting change start command to the peripheral control unit 1511.

(5) When the peripheral control unit 1511 receives a setting change start command from the main control MPU 1311, it notifies that the setting change mode is in progress. The notification that the setting change mode is in progress is made by performing an initial operation of the reel or by displaying a specified message on the main liquid crystal display device 1600. Note that the peripheral control unit 1511 does not have to perform an initial operation of the reel. For example, when displaying the procedure or status of the setting change on the main liquid crystal display device 1600, performing an initial operation of the reel during the setting change would partially hide the display on the main liquid crystal display device 1600, interfering with the setting change operation.

In addition, the main control MPU 1311 may also notify the setting change mode in accordance with the notification of the setting change mode by the peripheral control unit 1511. For example, the display of the function display unit 1400 may be displayed in a special manner that does not appear during normal play (for example, all LEDs for displaying special symbols may be turned off or on) to stop the progress of the game. The main control MPU 1311 may also notify the setting change mode by stopping the detection of winning balls and out balls and stopping the progress of the game. As a result, in the setting change mode, the base value is not calculated. The main control MPU 1311 may also notify the setting change mode by stopping the output of the launch permission signal, stopping the launch of the game balls controlled by the launch control device, and functioning as a launch disable means. When the launch of the game balls is stopped during the setting change mode, the launch of the game balls during the launch stop period may be considered an error, and an error may be detected if the handle lever 504 of the handle unit 500 is operated during that period.

(6) Next, the main control MPU 1311 resets the setting value to 0. As mentioned above, the setting value can be selected between 1 and 6, and a setting value of 0 means that no setting has been made. With a setting value of 0, the setting change mode cannot be ended, and play (launching of game balls, variable display game, etc.) will not start.

(7) After that, each time the player operates the setting change switch 972, the payout control unit 952 displays the selected setting value on the setting display 974.

(8) The payout control unit 952 determines whether the main frame 4 is released from the outer frame 2. Note that, although the openness of the main frame 4 is determined in the above-mentioned procedure (1), it is sufficient to make this determination at least once before determining whether the setting confirmation switch 973 is operated. In this way, the payout control unit 952 functions as a setting change permission state generating means that determines whether the conditions for the setting change are met before the setting change is confirmed.

(9) Furthermore, the payout control unit 952 determines whether the setting confirmation switch 973 has been operated.

(10) If the main frame 4 is open from the outer frame 2 and the setting confirmation switch 973 is operated, the dispensing control unit 952 confirms the selected setting value and displays on the setting display 974 that the setting value has been confirmed. The setting value confirmation display may display a value that cannot be selected as a setting value (e.g., 8) or may flash the confirmed setting value for a predetermined period of time.

(11) After that, the payout control unit 952 determines whether the setting key 971 has been turned off.

(12) If the setting key 971 is turned off, the setting change mode is ended, and the dispensing control unit 952 sends a setting change end command to the main control board 1310. This setting change end command notifies the main control MPU 1311 of the confirmed setting value.

(13) When the main control MPU 1311 receives a setting change end command from the payout control unit 952, it sends the setting change end command to the peripheral control unit 1511.

(14) When the peripheral control unit 1511 receives a setting change end command from the main control MPU 1311, it ends the notification that the setting is being changed. At the same time, if the main control MPU 1311 is notifying the user that the setting is being changed, this also ends.

When the setting change mode ends, the notification (including the halt of play and firing) may be cancelled immediately, or after a predetermined time has passed. If the notification made in step (5) is considered simply as a notification to the outside world (players, hall employees), it is best to cancel the notification immediately after the setting change mode ends. However, if the notification made in step (5) is viewed from the perspective of detecting fraudulent activity, it is best to cancel the notification a predetermined time has passed after the setting change mode ends. This is because when a setting change is made, a predetermined display is displayed or play is stopped for a predetermined period of time, making it easier to detect if a fraudulent player has changed the settings during business hours.

If the launch of game balls is to be stopped for a specified period after the setting change mode ends, the launch of game balls during the launch stop period may be considered an error, and an error may be detected if the handle lever 504 of the handle unit 500 is operated during that period.

(15) After that, the main control MPU 1311 executes a RAM clear process after the setting change. This RAM clear process after the setting change leaves the setting values and game state (e.g., special bonus state, time-saving state, reserved memory of special and normal symbols, and information about winning balls) data in the game control area 13126 (including the game work area and game stack area), clears all other data, and does not clear the base calculation area 13128 (outside the game control area). In other words, unlike the RAM clear process before the setting change, the setting values are not initialized in the RAM clear process after the setting change.

Then exit the setting change mode.

In this way, when the setting board 970 is connected to the dispensing control board 951 and functions as a sub-board of the dispensing control board 951 (or the setting board 970 is configured integrally with the dispensing control board 951), the main control board 1310 and the dispensing control board 951 work together to execute the setting change process.

In the above process, the payout control unit 952 determines whether the setting key 971 is operated, but the main control MPU 1311 may also make the determination. In this case, the signal related to the operation of the setting key 971 from the payout control unit 952 to the main control board 1310 may be transmitted by serial communication, a predetermined pulse signal (a predetermined number of pulses of a predetermined frequency), or an intermediate potential signal that is neither the power supply voltage nor the ground voltage may be output. This is because, in order to prevent fraudulent acts such as shorting the terminals of the setting key 971 to activate the setting change mode, it is preferable to transmit the signal related to the operation of the setting key 971 from the payout control unit 952 to the main control board 1310 by a signal that cannot be generated by shorting the terminals.

Next, we will explain the setting display process in which the main control board 1310 and the payout control board 951 shown in Figure 138 (B) work together.

When the setting key 971 is turned on while the pachinko machine 1 is in operation (powered on), the payout control unit 952 detects the operation of the setting key 971 and starts the setting display mode.

(1) In the setting display mode, the payout control unit 952 determines whether the main body frame 4 is open from the outer frame 2. Considering the position of the setting key 971, the main body frame 4 is open from the outer frame 2 in order to operate the setting key 971, so this determination of whether the main body frame 4 is open may be omitted.

(2) When the dispensing control unit 952 determines that the main frame 4 is released from the outer frame 2, it sends a setting value request command to the main control board 1310.

(3) When the main control MPU 1311 receives a setting value request command from the dispensing control unit 952, it reads the setting value stored in the main control RAM 1312 and sends a setting value notification command to the dispensing control unit 952.

(4) The payout control unit 952 displays the setting value notified by the main control MPU 1311 via the setting value notification command on the setting display 974.

In the above, the setting values stored in the main control board 1310 (main control RAM 1312) are displayed on the setting display 974, but the dispensing control unit 952 may store the setting values, and the setting values stored in the dispensing control unit 952 may be displayed on the setting display 974.

Next, we will explain the setting change process by the main control board 1310 shown in Figure 139 (A).

When the power is turned on to the pachinko machine 1, (1) the main control MPU 1311 judges whether the setting key 971 is operated to ON and whether the main body frame 4 is released from the outer frame 2. In this way, the main control MPU 1311 functions as a setting change permission state generating means. Whether the main body frame 4 is released from the outer frame 2 can be judged by a detection signal from the main body frame release switch. The detection signal of the main body frame release switch is transmitted to the main control board 1310 via the payout control board 951. The payout control board 951 may transmit a main body frame open detection command to the main control board 1310 based on the detection signal of the main body frame open detection switch received. The payout control board 951 may also output the detection signal of the main body frame open detection switch received directly to the main control board 1310. Considering the arrangement position of the setting key 971, the main body frame 4 is released from the outer frame 2 in order to operate the setting key 971, so the judgment of the opening of the main body frame 4 may be omitted.

When the setting key 971 is turned on and the main frame 4 is released from the outer frame 2, the main control MPU 1311 starts the setting change mode. Other conditions for starting the setting change mode include the operation of the handle lever 504 of the handle unit 500, the touch of the handle lever 504 by the contact detection sensor 509, the insertion of a prepaid card into the CR unit (there is a balance on the prepaid card), or the presence of a balance inserted into the cash sandwich. It is also better not to start the setting change mode if the pachinko machine 1 detects the possibility of some kind of fraudulent activity (for example, a magnetic error). In such a case, it is presumed that the pachinko machine 1 is not undergoing maintenance by the hall, and there is a possibility that a fraudulent player is attempting to perform a setting change operation, so it is better not to switch to the setting change mode.

(3) When the setting change mode starts, the main control MPU 1311, upon receiving a setting change start command from the payout control unit 952, executes the RAM clear process before the setting change. This RAM clear process before the setting change leaves data on the game state (e.g., special bonus state, time-saving state, reserved memory of special and normal symbols, information on winning balls) in the game control area 13126 (including the game work area and game stack area), clears all other data, and does not clear the base calculation area 13128 (outside the game control area). Note that the setting value is set to the initial value later in step (6), so it does not need to be cleared in this step.

(4) The main control MPU 1311 then sends a setting change start command to the peripheral control unit 1511.

(5) When the peripheral control unit 1511 receives a setting change start command from the main control MPU 1311, it notifies that the setting change mode is in progress. The notification that the setting change mode is in progress is made by performing an initial operation of the reel or by displaying a specified message on the main liquid crystal display device 1600. Note that the peripheral control unit 1511 does not have to perform an initial operation of the reel. For example, when displaying the procedure or status of the setting change on the main liquid crystal display device 1600, performing an initial operation of the reel during the setting change would partially hide the display on the main liquid crystal display device 1600, interfering with the setting change operation.

In addition, the main control MPU 1311 may also notify the setting change mode in accordance with the notification of the setting change mode by the peripheral control unit 1511. For example, the display of the function display unit 1400 may be displayed in a special manner that does not appear during normal play (for example, all LEDs for displaying special symbols may be turned off or on) to stop the progress of the game. The main control MPU 1311 may also notify the setting change mode by stopping the detection of winning balls and out balls and stopping the progress of the game. As a result, in the setting change mode, the base value is not calculated. The main control MPU 1311 may also notify the setting change mode by stopping the output of the launch permission signal, stopping the launch of the game balls controlled by the launch control device, and functioning as a launch disable means. When the launch of game balls is stopped during the setting change mode, the launch of game balls during the launch stop period may be considered an error, and an error may be detected if the handle lever 504 of the handle unit 500 is operated during that period.

(6) Next, the main control MPU 1311 resets the setting value to 0. As mentioned above, the setting value can be selected between 1 and 6, and a setting value of 0 means that no setting has been made. With a setting value of 0, the setting change mode cannot be ended, and play (launching of game balls, variable display game, etc.) will not start.

(7) After that, each time the player operates the setting change switch 972, the main control MPU 1311 displays the selected setting value on the setting display 974.

(8) The main control MPU 1311 determines whether the main body frame 4 is open from the outer frame 2. Note that while the openness of the main body frame 4 is determined in the above-mentioned procedure (1), it is sufficient to make this determination at least once before determining whether the setting confirmation switch 973 is operated. In this way, the payout control unit 952 functions as a setting change permission state generating means that determines whether the conditions for the setting change are met (in particular, whether a detection signal for the main body frame open switch has been input from the payout control board 951) before the setting change is confirmed.

(9) Furthermore, the main control MPU 1311 determines whether the setting confirmation switch 973 has been operated.

(10) If the main frame 4 is open from the outer frame 2 and the setting confirmation switch 973 is operated, the main control MPU 1311 confirms the selected setting value and displays on the setting display 974 that the setting value has been confirmed. The setting value confirmation display may display a value that cannot be selected as a setting value (e.g., 8) or may flash the confirmed setting value for a predetermined period of time.

(11) After that, the main control MPU 1311 determines whether the setting key 971 has been turned off.

(13) If the setting key 971 is turned off, the setting change mode is ended, and the main control MPU 1311 sends a setting change end command to the peripheral control unit 1511.

(14) When the peripheral control unit 1511 receives a setting change end command from the main control MPU 1311, it ends the notification that the setting is being changed. At the same time, if the main control MPU 1311 is notifying the user that the setting is being changed, this also ends.

When the setting change mode ends, the notification (including the halt of play and firing) may be cancelled immediately, or after a predetermined time has passed. If the notification made in step (5) is considered simply as a notification to the outside world (players, hall employees), it is best to cancel the notification immediately after the setting change mode ends. However, if the notification made in step (5) is viewed from the perspective of detecting fraudulent activity, it is best to cancel the notification a predetermined time has passed after the setting change mode ends. This is because when a setting change is made, a predetermined display is displayed or play is stopped for a predetermined period of time, making it easier to detect if a fraudulent player has changed the settings during business hours.

If the launch of game balls is to be stopped for a specified period after the setting change mode ends, the launch of game balls during the launch stop period may be considered an error, and an error may be detected if the handle lever 504 of the handle unit 500 is operated during that period.

(15) After that, the main control MPU 1311 executes a RAM clear process after the setting change. This RAM clear process after the setting change leaves the setting values and game state (e.g., special bonus state, time-saving state, reserved memory of special and normal symbols, and information about winning balls) data in the game control area 13126 (including the game work area and game stack area), clears all other data, and does not clear the base calculation area 13128 (outside the game control area). In other words, unlike the RAM clear process before the setting change, the setting values are not initialized in the RAM clear process after the setting change.

Then exit the setting change mode.

In this way, when the setting board 970 is connected to the main control board 1310 and functions as a sub-board of the main control board 1310 (or the setting board 970 is configured integrally with the main control board 1310), the main control board 1310 obtains a detection signal of the main frame open switch from the dispensing control board 951, so the main control board 1310 alone cannot perform the setting change process, and the main control board 1310 and the dispensing control board 951 work together to perform the setting change process.

Next, we will explain the setting display process in which the setting board 970 and the payout control board 951 shown in Figure 139 (B) work together.

When the setting key 971 is turned on while the pachinko machine 1 is in operation (power is on), the main control MPU 1311 detects the operation of the setting key 971 and starts the setting display mode.

In the setting display mode, the main control MPU 1311 determines whether the main body frame 4 is open from the outer frame 2. Considering the position of the setting key 971, the main body frame 4 is open from the outer frame 2 in order to operate the setting key 971, so this determination of whether the main body frame 4 is open may be omitted.

When the main control MPU 1311 determines that the main frame 4 is released from the outer frame 2, it reads the setting value stored in the main control RAM 1312 and displays it on the setting display 974.

In the setting change processing described in Figures 138 (A) and 139 (A), if the pachinko machine 1 detects an error during the setting change mode, the setting change mode may be disabled and temporarily stopped. The power to the pachinko machine 1 is then cut off and then turned back on to resume the stopped setting change mode. The setting change mode may be resumed from the stage where it was stopped due to error detection, or from the beginning of the setting change mode (setting value = 0 when no setting value has been selected).

It is advisable to record a history of changes to the setting value a predetermined number of times. Specifically, the date and time when the setting was confirmed and the confirmed setting value are stored in the main control RAM 1312 or the RAM of the peripheral control unit 1511. When storing the history of the setting values in the peripheral control unit 1511, it is preferable to store it in the RAM in the RTC provided in the peripheral control unit 1511, since the stored contents are backed up even when the power to the pachinko machine 1 is cut off. Furthermore, the recorded history of changes to the setting values can be output. For example, it is advisable to display the recorded history of changes to the setting values on the main liquid crystal display device 1600 by a predetermined operation.

The interval for measuring the base value may be changed when the set value is changed. In other words, when the set value is changed, even if the total number of out balls in the interval for which the base value is currently being measured is less than 52,000, that interval will end and the next interval will begin. Because the gaming performance of the gaming machine changes depending on the set value, by changing the interval by changing the set value, it is possible to calculate a base value that does not include a mixture of different gaming performances, and to understand the transition of the base value due to the change in the set value.

In addition, when the set value is changed, the interval for measuring the base value may be continued without changing the interval for measuring the base value. The set value changes the operating ratio of the condition device, and it is possible to design the base value so that changing the set value does not change it significantly. In such a case, there is no need to change the interval for calculating the base value when the set value is changed.

In addition, if both the operation of the RAM clear switch 954 and the ON operation of the setting key 971 are detected when the power is turned on, the setting change mode may be started. Considering the operation method and the arrangement of the operating means, between the RAM clear switch 954 and the ON operation of the setting key 971, the operation of the setting key 971 is less likely to be performed by mistake, and therefore it is considered that starting the setting change mode represents the operator's intention. Also, in the setting change mode, the stored contents of the main control RAM 1312 other than the game status and base value are cleared, so even if a RAM clear is desired, it is considered sufficient to start the setting change mode.

On the other hand, if both the operation of the RAM clear switch 954 and the ON operation of the setting key 971 are detected when the power is turned on, the setting change mode may not be started and the RAM may be cleared. This is because it is considered that if both are operated, the operator at least wishes to clear the RAM. Also, if both the operation of the RAM clear switch 954 and the ON operation of the setting key 971 are detected when the power is turned on, it is not necessary to start the setting change mode or clear the RAM. This is because, from the perspective of file safety against operational errors, it is preferable not to accept operations where the operator's intention is unclear.

When the RAM is cleared in steps (3) and (15) described above, the game status data is maintained, but the reserved memory of the special symbols may be erased. The set value changes the rate at which the condition device is activated, which may change the results of the random number determination for the special symbol lottery. For this reason, it is preferable to erase the reserved memory of the special symbols and hold a new lottery.

On the other hand, the lottery for the special symbols (extraction of the winning random number) is performed when the game ball enters the starting hole, but the lottery result is determined at the start of the variable display game, so the reserved random number value can be determined under the conditions after the setting value is changed. For this reason, the reserved memory of the special symbols may be maintained.

In addition, in the RAM clearing of the above-mentioned steps (3) and (15), the main control RAM 1312 may be initialized in the same area as the area that is erased as a result of operating the RAM clear switch 954. That is, in the RAM clearing process during the setting change mode, the backed-up game control area 13126 other than the setting value is erased (the game state data is also erased), and the setting value and base calculation area 13128 are not erased. This is because setting changes are usually made between the time the hall closes and the time it opens the next day, so there is no need to maintain the game state data (such as the special bonus state, time-saving state, reserved memory for special and normal patterns, and information about winning balls) without erasing it.

[12-2. Effects in pachinko machines with setting functions]
[12-2-1. Special symbols and special electric device control processing]
The details of the processing by the main control MPU 1311 will be described below. First, the special symbol and special electric role control processing will be described. FIG. 140 is a flowchart showing an example of the procedure of the special symbol and special electric role control processing. The special symbol and special electric role control processing is executed in the processing of step S86 in the main control side timer interrupt processing. Hereinafter, the first start hole 2002 and the second start hole 2004 are also collectively referred to as start holes. In addition, the first large prize hole 2005 and the second large prize hole 2006 are also collectively referred to simply as large prize holes. In addition, the first special symbol and the second special symbol are also collectively referred to simply as special symbols.

In the special symbol and special electric device control process, when a game ball is received in the start hole, that is, when a start winning occurs (start condition is satisfied), a random number for determining a jackpot is obtained for each start memory information (start information) for which the start condition is satisfied, and it is determined whether or not this random number for determining a jackpot matches a jackpot determination value previously stored in the main control built-in ROM (lottery means). Then, based on the lottery result, it is determined whether or not a jackpot game state is to be generated, and if the random number for a jackpot matches the jackpot determination value (predetermined winning conditions are satisfied), the game is transitioned from the normal game state to the jackpot game state. Below, the procedure for the special symbol and special electric device control process is explained according to the flowchart shown in FIG. 140.

When the special symbol and special electric device control process is started, the main control MPU 1311 first determines whether or not game ball B has entered the large prize opening (step S100). If game ball B has entered the large prize opening (the result of step S100 is "yes"), a large prize opening entry designation command is set (step S102).

Then, the main control MPU 1311 judges whether or not the game ball has entered the start hole (step S112). Then, whether or not the game ball has entered the start hole is determined based on the input information stored in the input information storage area of the main control built-in RAM by reading the presence or absence of a detection signal from the first start hole sensor 3002 or the second start hole sensor 2511 in the switch input process (step S74) in the main control timer interrupt process.

When a game ball enters the start hole (the result of step S114 is "yes"), the main control MPU 1311 executes the start hole entry process (step S116). In the start hole entry process, the main control MPU 1311 sets a start hole entry command to be sent when a new game ball enters the start hole, extracts random numbers for determining a jackpot and stores them in a specified area, and executes processes for executing a special symbol pre-reading performance.

Then, the main control MPU 1311 executes the corresponding process based on the special symbol/electric device operation number, which is a game progress state variable that specifies the type of branch process to be executed according to the progress of the game (step S124). The game progress state variable is stored in the game progress state storage area of the main control's built-in RAM, and is updated in each branch process executed according to the progress of the game. In the process of step S124, the process moves to the branch process specified based on the value of the game progress state variable stored in the game progress state storage area, and when the branch process to which the process has been moved is completed, the special symbol and special electric device control process ends. Note that the values of the game progress state variables stored in the game progress state storage area are game information, and are therefore backed up in the main control side power cut process.

In the processing of step S130, based on the value of the game progress state variable, the following branching processing is executed: special symbol change waiting processing (step S130), special symbol change processing (step S132), special symbol jackpot determination processing (step S134), special symbol miss stop processing (step S136), special symbol jackpot stop processing (step S138), interval processing before opening of large prize opening (step S140), large prize opening opening processing (step S142), large prize opening closing processing (step S144), or large prize opening end interval processing (step S146).

In the special symbol change waiting process (step S130), a process is performed to start the change display of the special symbol on the special symbol display device based on the game ball B entering the start hole.

In the special symbol changing process (step S132), processes such as controlling the changing display of the special symbol are performed. In the special symbol jackpot determination process (step S134), a determination is made as to whether or not the special symbol that has been confirmed and stopped will generate a jackpot game state based on the game ball entering the starting hole.

In the special symbol miss stop process (step S136), if a jackpot game state is not generated, the display of the changing special symbols is stopped and a notification to that effect is performed. In the special symbol jackpot stop process (step S138), if a jackpot game state is generated, the display of the changing special symbols is stopped and a notification to that effect is performed.

The interval process before the opening of the large prize opening (step S140) performs processes such as generating a large prize game state and notifying the player that the large prize operation is about to begin. The large prize opening process (step S142) performs processes related to the large prize operation, such as opening the large prize openings to make it easier for game balls to enter each large prize opening.

The process for closing the large prize opening (step S144) performs processes related to the large prize opening operation, such as changing the large prize opening from an open state to a closed state, to make it difficult for the game ball to enter each large prize opening. The process for the interval when the large prize opening has ended (step S146) performs processes such as notifying the user that the large prize opening operation has ended.

[12-2-2. Special symbol change waiting process]
Next, the details of the special symbol change waiting process (step S130) in the special symbol and special electric role control process will be described. Fig. 141 is a flow chart showing an example of the procedure of the special symbol change waiting process. The special symbol change waiting process is executed in a state where the special symbol change display is not being executed, and if the change display is held, preparations are made to start the special symbol change display.

The main control MPU 1311 first determines whether or not a special symbol change is pending (step S420). Specifically, it determines whether or not the number of balls pending special symbol activation is 0. Note that, if multiple starting holes are provided, the number of balls pending special symbol activation is stored for each starting hole. If a special symbol change is not pending (the result of step S420 is "no"), the display of the special symbol change is not started, and this process is terminated.

On the other hand, if the variable display of the special pattern is on hold (the result of step S420 is "yes"), the main control MPU 1311 sets a command to specify the number of reserved balls as command data (step S438).

Then, the main control MPU 1311 executes a special symbol/flag setting process (step S442). In the special symbol/flag setting process, a special lottery is executed based on the random number for determining a jackpot obtained when the ball enters the starting hole.

The main control MPU 1311 then executes a special symbol variation pattern setting process (step S444). In the special symbol variation pattern setting process, a variation pattern is set based on the results of the special lottery. Details of the special symbol variation pattern setting process will be described later in FIG. 126.

Next, the main control MPU 1311 creates a variation pattern command to send to the peripheral control board 1510. Specifically, first, the upper byte of the special pattern variation pattern standard command corresponding to the special pattern identification flag is set as the command value (step S452). Furthermore, the variation pattern value stored in the variation pattern area is set as the lower command data (step S458). Furthermore, the variation type type value is obtained from the variation type type area (step S460), and the upper byte of the variation pattern command according to the variation type is calculated by adding the variation type type value to the command value set in the processing of step S452 (step S462). The command data of the variation pattern command created in this way is stored in a specified area.

Then, the main control MPU 1311 sets a symbol type command to be sent to the peripheral control board 1510 (step S466). Furthermore, the main control MPU 1311 sets a variable state designation command in the command buffer (step S474).

Each command created by the above process is set in the command buffer. The reserved ball count designation command set in the command buffer is sent by the peripheral control board command sending process (step S92) in the main control side timer interrupt process.

[12-2-3. Special symbol variation pattern setting process]
Next, the details of the special symbol variation pattern setting process (step S444) in the special symbol variation waiting process will be described. The special symbol variation pattern setting process is a process for setting a variation pattern in the variation display of the special symbol. Figure 142 is a flowchart showing an example of the procedure of the special symbol variation pattern setting process.

The main control MPU 1311 first obtains the number of reserved balls for special symbol activation (step S530). The number of reserved balls for special symbol activation is stored in the buffer for the number of reserved balls for special symbol activation. Furthermore, the main control MPU 1311 sets the jackpot flag from the jackpot flag area (step S538).

Then, the main control MPU 1311 executes a variation pattern selection determination process to select a variation pattern of the special symbol based on the number of balls reserved for special symbol activation and the jackpot flag (step S542). Details of the variation pattern selection determination process will be described later in FIG. 143.

Next, the main control MPU 1311 acquires the fluctuation pattern value extracted by the fluctuation pattern selection determination process (step S544). Then, it searches for data (fluctuation time value) corresponding to the fluctuation pattern value from the special pattern fluctuation time data (step S546).

Furthermore, the main control MPU 1311 executes a variation type determination process to select a variation type defined in the variation pattern in the variation display of the special pattern (step S548). The variation type classification value acquired by the variation type determination process is set (step S550).

Then, the main control MPU 1311 searches the variable time addition value data for a variable time addition value corresponding to the variable type type value (step S552). The variable time addition value is an addition time corresponding to the variable type, and corresponds to, for example, an addition time according to the number of pseudo consecutive wins. The main control MPU 1311 then adds the variable time addition value searched in the processing of step S552 to the reference variable time value searched in the processing of step S546 to obtain the final variable time (step S554). Finally, the final variable time is stored in the special symbol/electric role operation timer area (step S556), and the special symbol variable pattern setting processing ends.

[12-2-4. Variation pattern selection determination process]
Next, the details of the variation pattern selection determination process (step S542) will be described. Fig. 143 is a flowchart showing an example of the procedure of the variation pattern selection determination process. The variation pattern selection determination process is a process for selecting a variation pattern in the variation display of the special pattern.

The main control MPU 1311 first acquires a variable information source table based on the variable table number (step S340). The variable table number is a value for selecting (acquiring) a variable information source table from the variable information source address table. The variable information source table is a data table that stores table information for referencing a win (win variable selection information state table), a loss (loss variable selection information state table), a reach (reach variable selection information state table), a reach probability (special pattern reach probability table), and a variation type (variation type determination data table) according to the game state, etc.

Then, the main control MPU 1311 acquires a hit determination value for deriving the result of the special lottery (step S346). It determines whether or not a jackpot has been won by determining whether or not the hit determination value matches the jackpot value (step S350). If a jackpot has been won (the result of step S350 is "yes"), it acquires a jackpot flag and a jackpot symbol type (step S354).

Next, the main control MPU 1311 executes a variable information number search process based on the jackpot flag and the jackpot pattern type (step S358). In the variable information number search process, a variable information number for determining the winning time variable pattern selection value data table is obtained from the jackpot variable selection information type table. The main control MPU 1311 obtains a variable pattern random number 1 from the jackpot variable selection information type table based on the obtained variable information number (step S360).

On the other hand, if neither a big win nor a small win has been won (the result of step S350 is "no"), the main control MPU 1311 determines whether or not to generate a reach in the variable display corresponding to the initial win (step S372).

If the main control MPU 1311 does not generate a reach in the variable display (the result of step S372 is "no"), it obtains random number 1 for the variable pattern from the miss variable selection information reserve table based on the number of reserved balls (step S376).

On the other hand, if the main control MPU 1311 determines that a reach is to occur in the variable display (the result of step S372 is "yes"), it obtains random number 1 for the variable pattern from the reach variable selection information status table based on the status flag (step S382).

Then, the main control MPU 1311 executes a variable information number search process based on the random number 1 for the variable pattern acquired in the process of step S360, step S378, or step S382 (step S388). Then, a variable pattern selection value data table is acquired by the variable information number search process, and the random number 2 for the variable pattern is acquired from the variable pattern selection value data table (step S392). Furthermore, a variable information number search process is executed based on the random number 2 for the variable pattern and the variable pattern selection value data table (step S394). A variable pattern is selected based on the result of the variable information number search process (step S396), and this process ends.

In this embodiment, a fluctuation pattern is selected in two stages by two types of random numbers, random number 1 for fluctuation pattern (steps S360, S372, S378) and random number 2 for fluctuation pattern (step S392). First, a type of fluctuation pattern (a group of fluctuation patterns such as ○○ series reach) is selected based on random number 1 for fluctuation pattern. Furthermore, a fluctuation pattern (a value set in the fluctuation pattern command) to be finally displayed is selected from the group of fluctuation patterns selected by random number 1 for fluctuation pattern based on random number 2 for fluctuation pattern. Note that the method is not limited to a two-stage lottery method, and may be a method of lottery in three or more stages, or a fluctuation pattern may be selected directly by one random number for fluctuation pattern.

[12-3. Explanation of effects in pachinko machines with setting functions]
The following describes the effects in the pachinko machine 1 with the setting function. Specifically, the setting suggestion effect that suggests the current setting will be described. In the pachinko machine 1 with the setting function, for example, the higher the setting, the more game balls are paid out for the number of special lotteries. Specifically, for example, the higher the setting, the higher the probability of winning a jackpot in a non-variable state (for example, setting 1: 1/300, setting 2: 1/290, setting 3: 1/280, setting 4: 1/270, setting 5: 1/250, setting 6: 1/230, etc.). Therefore, since players want to play with a pachinko machine 1 with as high a setting as possible, the setting suggestion effect increases their motivation to play.

For ease of explanation, in the following description of this chapter, the main control MPU 1311 will select a fluctuation pattern directly using a random number for one fluctuation pattern in the fluctuation pattern selection determination process of step S542. Specifically, in this chapter, the main control MPU 1311 will execute the following process in step S542.

In step S542, the main control MPU 1311 selects a variation pattern table according to the current game state (whether it is a time-saving state (a state in which time-saving control is being executed) or a normal state other than the time-saving state) and the result of the special lottery (whether it is a jackpot or a miss). If the result of the special lottery is a jackpot, the main control MPU 1311 acquires a random number for the variation pattern, and selects a variation pattern from the selected variation pattern table based on the acquired random number for the variation pattern and the allocation of each variation pattern in the selected variation pattern table. If the result of the special lottery is a miss, the main control MPU 1311 further determines whether or not a reach has occurred, acquires a random number for the variation pattern, and selects a variation pattern from the selected variation pattern table based on the acquired random number for the variation pattern and the allocation of each variation pattern in the selected variation pattern table.

Figure 144 (A) is an example of a variation pattern table that is selected when the game state is normal and the result of the special lottery is a miss. Figure 144 (B) is an example of a variation pattern table that is selected when the game state is normal and the result of the special lottery is a jackpot.

The fluctuation pattern table is stored, for example, in the ROM 1313 of the main control board 1310. The fluctuation pattern table includes, for example, a fluctuation pattern type column, a fluctuation time column, a corresponding performance content column, and a column for allocating random numbers for determining a fluctuation pattern. The fluctuation pattern type column stores information that specifies the type for identifying the fluctuation pattern within the table. The fluctuation time column stores information that specifies the fluctuation time for the corresponding fluctuation pattern type. The corresponding performance content column stores information that specifies the performance content executed in the corresponding fluctuation pattern.

The random number column for determining the fluctuation pattern stores the allocation for which the corresponding fluctuation pattern is selected for each setting. The random number column for determining the fluctuation pattern of the fluctuation pattern table (i.e., the fluctuation pattern table in FIG. 144(A) and FIG. 149(A) described below) that is selected when the special lottery result is a miss stores the allocation for which the corresponding fluctuation pattern is selected for each setting when a reach occurs and when a reach does not occur.

[12-4. Setting suggestion effect executed after provisional display of special lottery results]
First, the setting suggestion effect in the failure variation pattern stored in the variation pattern table of Fig. 144 (A) will be described. First, the effect executed in the failure variation patterns 24 to 29 will be described with reference to Fig. 144 as well.

Figure 144 is a schematic diagram showing an example of the effects executed in miss variation pattern 20 and 24 to 29 in the variation pattern table of Figure 144 (A). In the variation of miss variation pattern 20, after SP Reach 1 is executed, a provisional display indicating that the special lottery result is likely to be a miss is displayed on the main liquid crystal display device 1600, and then a final display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600. In contrast, in the variation of miss variation patterns 25 to 29, after SP Reach 1 is executed, a provisional display indicating that the special lottery result is likely to be a miss is displayed on the main liquid crystal display device 1600, and then a setting suggestion effect is executed, and then a final display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600.

In this way, in variation patterns 25 to 29, a setting suggestion effect is executed after a provisional display indicating that the special lottery result is highly likely to be a miss, so that even if the provisional display is executed, the player can expect the subsequent setting suggestion effect to occur and maintain a sense of anticipation. Furthermore, if a setting suggestion effect occurs during a miss variation, it is possible to suppress the player's disappointment due to the special lottery result, even if the special lottery result is a miss, and ultimately to increase the sense of excitement.

In the variation of miss variation pattern 24, after SP Reach 1 is executed, a provisional display indicating that the special lottery result is highly likely to be a miss is displayed on the main liquid crystal display device 1600, and then a false display suggesting the execution of a setting suggestion display is executed, but the setting suggestion display itself is not executed, and a definitive display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600.

The SP reach is a reach effect that is likely to be selected if the result of the special lottery is a jackpot, and is unlikely to be selected if the result of the special lottery is a miss. In other words, the chance of a jackpot occurring when the SP reach is executed is high.

The following is a detailed explanation of the effects that are executed in miss variation patterns 20 and 24 to 29. In addition to the contents described below, each effect may simultaneously include sound output from various speakers, light emission from various lamps, operation of various movable objects, and/or display on the main LCD display device 1600.

In miss variation patterns 20 and 24 to 29, first, a pre-reach performance is executed. In the pre-reach performance, all decorative symbols change on the main LCD display device 1600. Next, in miss variation patterns 20 and 24 to 29, it progresses to a normal reach performance. In the normal reach performance, the decorative symbols change to a reach state on the main LCD display device 1600. Specifically, for example, of the three decorative symbols (for example, the left symbol, the middle symbol, and the right symbol), the left symbol and the right symbol stop at the same symbol, and the middle symbol changes to a changing state.

Next, in miss variation patterns 20 and 24 to 29, it progresses to SP Reach 1, and the first half of the SP Reach 1 performance is executed. In SP Reach 1, for example, one main character and one enemy character are displayed on the main liquid crystal display device 1600, and they play rock-paper-scissors. In the first half of the SP Reach 1 performance in miss variation patterns 20 and 24 to 29, a performance is executed on the main liquid crystal display device 1600 in which the main character loses the rock-paper-scissors game to the enemy character. Note that during the SP Reach, the decorative pattern may be displayed smaller and closer to the periphery of the main liquid crystal display device 1600 than during the pre-reach performance and the normal reach performance, for example.

Next, in miss variation patterns 20 and 24 to 29, it progresses to the latter half of SP Reach 1. In the latter half of SP Reach 1 in miss variation patterns 20 and 24 to 29, for example, a so-called revival effect is executed, and for example, at the start of the latter half, the voice of the main character such as "Not yet!" is output from various speakers, and an effect is executed on the main liquid crystal display device 1600 in which a rock-paper-scissors game is played again between the main character and the enemy character. In the latter half of SP Reach 1 in miss variation patterns 24 to 29, an effect is executed on the main liquid crystal display device 1600 in which the main character loses again to the enemy character in a rock-paper-scissors game.

Then, a provisional display indicating that the special lottery result is a miss is executed on the main liquid crystal display device 1600. Specifically, for example, on the main liquid crystal display device 1600, one combination of decorative symbols in a miss state (for example, the left and right decorative symbols are the same symbols as the symbols that stopped in the reach state, and the center symbol is a different symbol from the same symbols) is displayed in a manner that makes it appear to be swaying in a small range.

Next, in the miss variation pattern 20, after the provisional display, no other effects are performed, and a confirmation display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600. In the miss variation pattern 24, after the provisional display, a setting suggestion false effect is performed, and then a confirmation display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600. In contrast, in the miss variation patterns 25 to 29, after the provisional display, a setting suggestion effect is performed, and then a confirmation display indicating that the special lottery result is a miss is displayed on the main liquid crystal display device 1600. In the confirmation display, for example, the same combination of decorative patterns as those displayed in the provisional display are displayed in a completely stopped state on the main liquid crystal display device 1600. Note that in the provisional display and the confirmation display, the decorative patterns are displayed, for example, in the center of the main liquid crystal display device 1600, in the same size as in the reach pre-effect and normal reach effect.

In the false setting suggestion effect in the failure variation pattern 24, for example, a performance is executed in which one main character discovers two enemy characters on the main liquid crystal display device 1600 and chases the enemy characters but is unable to catch them. As with the distribution of the failure variation pattern 24 in FIG. 144(A), it is desirable that the distribution of the variation pattern in which the false setting suggestion effect is executed is equal or approximately equal for all settings. If the distribution is not equal, the false setting suggestion effect will suggest the setting.

In addition, it is desirable that the ratio of the allocation of miss fluctuation pattern 24 to the total allocation of fluctuations that result in SP Reach 1 being executed is low (for example, 20% or less). If the ratio is high, false setting suggestion effects will occur frequently when the game develops into SP Reach 1, which may reduce the player's expectations for the occurrence of setting suggestion effects.

In the setting suggestion effects in miss variation patterns 25 to 29, for example, on the main LCD display device 1600, a performance is executed in which one main character discovers two enemy characters, chases and captures the enemy characters, and then the three of them play rock-paper-scissors.

In the setting suggestion effect in miss variation pattern 25, an effect is executed in which all three players play rock in a rock-paper-scissors game, resulting in a draw. Also, in FIG. 144(A), miss variation pattern 25 is set to be allocated only to low settings (settings 1, 2, and 3). In other words, the setting suggestion effect in miss variation pattern 25 is an effect in which a low setting is confirmed.

In the example of FIG. 144(A), the allocation of miss fluctuation pattern 25 is the same as the allocation of miss fluctuation pattern 26 etc. in high settings (settings 4, 5, and 6). However, if a low setting confirmation effect occurs, there is a possibility that the player will stop playing early, so the allocation of miss fluctuation pattern 25 may be set lower than the allocation of other setting confirmation effects in other settings, or miss fluctuation pattern 25 itself may not exist.

In the setting suggestion effect in miss variation pattern 26, an effect is executed in which all three players play rock-paper-scissors in a game of rock-paper-scissors, resulting in a draw. Also, in FIG. 144(A), miss variation pattern 26 is set to be allocated only to high settings (settings 4, 5, and 6). In other words, the setting suggestion effect in miss variation pattern 26 is an effect in which a high setting is confirmed.

In the setting suggestion effect in miss variation pattern 27, an effect is executed in which all three players play paper in a rock-paper-scissors game, resulting in a draw. Also, in FIG. 144(A), miss variation pattern 27 is set to be allocated only to even number settings (settings 2, 4, and 6). In other words, the setting suggestion effect in miss variation pattern 27 is an effect in which an even number setting is confirmed.

In the setting suggestion effect in the failure variation pattern 28, an effect is executed in which all three players play different hands in a rock-paper-scissors game, resulting in a tie. Also, in FIG. 144(A), the failure variation pattern 28 is set to be allocated only to odd-number settings (settings 1, 3, and 5). In other words, the setting suggestion effect in the failure variation pattern 28 is an effect in which an odd-number setting is confirmed.

For example, if the odd number setting and the even number setting have different characteristics, the odd number setting confirmation effect or the even number setting confirmation effect described above can be implemented to attract the player's interest in the presentation.

Specifically, for example, the probability of winning a jackpot in normal state is highest for settings 6, 4, 2, 5, 3, and 1 in that order (6 is highest, 1 is lowest); the proportion of special jackpots among jackpot wins is highest for settings 5, 3, 1, 6, 4, and 2 in that order (5 is highest, 2 is lowest); and the proportion of the total number of game balls paid out to the number of game balls entering the first starting port 2002 and the second starting port 2004 is highest for settings 6, 5, 4, 3, 2, and 1 in that order (6 is highest, 1 is lowest).

In this case, compared to the odd number setting, the even number setting has a higher probability of winning a jackpot in the normal state, but a lower probability of winning, i.e., the number of game balls required to win the so-called first jackpot tends to be smaller, but the total number of game balls obtained in one consecutive win from the first jackpot also tends to be smaller. On the other hand, compared to the even number setting, the odd number setting has a lower probability of winning a jackpot in the normal state, but a higher probability of winning, i.e., the number of game balls required to win the first jackpot tends to be larger, but the total number of game balls obtained in one consecutive win from the first jackpot also tends to be larger. In such a case, there is a possibility that a situation will occur in which one player prefers the ball output tendency of the even number setting and another player prefers the ball output tendency of the odd number setting, so players will be more interested in the odd number setting confirmation performance or the even number setting confirmation performance. In addition, compared to the odd number setting, the even number setting may have a characteristic that, while the odd number setting has a higher probability of winning a jackpot in the normal state, a jackpot with fewer rounds is more likely to be selected.

In the above-mentioned failure variation patterns 25 to 29, the presentation up until the start of the setting suggestion presentation is the same, but the content of the setting suggestion presentation is different (the result of the three-player rock-paper-scissors game is different). It is preferable that the three-player rock-paper-scissors game presentation is used only in failure variation patterns 25 to 29. This allows the player to recognize that the setting suggestion presentation has started at the point when the three-player rock-paper-scissors game presentation starts, further increasing the sense of excitement.

For example, the miss fluctuation pattern 25 is a fluctuation pattern in which an effect that confirms a high setting is executed, but it may also be a fluctuation pattern in which an effect that suggests that the high setting is highly likely is executed. Specifically, for example, if a low setting also has an allocation of the fluctuation pattern 25 and the allocation is lower than the allocation of the fluctuation pattern 25 in the high setting (for example, 50% or less), the effect in the miss fluctuation pattern 25 is not an effect that confirms a high setting, but an effect that suggests that the high setting is highly likely.

In addition to the variation patterns in which a performance that confirms a high setting is executed, variation patterns in which a performance that suggests that a high setting is highly likely as described above may be executed may also be defined. The above also applies to the performance that confirms a low setting, the performance that confirms an odd setting, the performance that confirms an even setting, and the performance that confirms a highest setting, etc.

In addition, according to the fluctuation pattern table in FIG. 144 (B) (fluctuation pattern table during normal times and when a jackpot is won), when the special lottery result is a jackpot under normal conditions, no setting suggestion effects are executed other than winning fluctuation pattern 34, which confirms the highest setting. Also, the distribution of fluctuation patterns in which setting suggestion effects are not executed is higher compared to when the special lottery result is a miss. As a result, setting suggestion effects are mainly executed when the special lottery result is a miss, and players can feel a sense of anticipation even when the special lottery result is a miss.

[12-5. Setting suggestion using shortened variation]
Hereinafter, the deviation fluctuation pattern 30 will be described with reference to Fig. 146. Fig. 146 is a schematic diagram showing an example of the performance executed in deviation fluctuation patterns 1, 2, and 30 in the fluctuation pattern table of Fig. 144 (A).

In miss fluctuation patterns 1, 2, and 30, shortened fluctuation is executed. A shortened fluctuation is, for example, a fluctuation with a shorter fluctuation time compared to other fluctuation patterns, and is a fluctuation in which, after the fluctuation of the decorative patterns starts on the main liquid crystal display device 1600, all the decorative patterns stop without progressing to a reach state. In a normal fluctuation, the decorative patterns stop on the main liquid crystal display device 1600 in the order of, for example, the left pattern, the right pattern, and the center pattern, but in a shortened fluctuation, all the decorative patterns may stop at the same time.

Next, in the case of loss fluctuation patterns 1, 2, and 30, a provisional display is made to indicate that the special lottery result is likely to be a loss, and then a final display is made to indicate that the special lottery result is a loss. The explanation of the provisional and final displays is the same as that described above, and will therefore be omitted.

The deviation fluctuation pattern 30 has a fluctuation time that is different from the fluctuation times of all other fluctuation patterns in which shortened fluctuations are executed, such as deviation fluctuation patterns 1 and 2. In the example of FIG. 144(A), the fluctuation time of deviation fluctuation pattern 1 is 2 seconds, the fluctuation time of deviation fluctuation pattern 2 is 5 seconds, and the fluctuation time of deviation fluctuation pattern 30 is 3.5 seconds. Also, in FIG. 144(A), deviation fluctuation pattern 30 is set to be allocated only at the highest setting (setting 6). In other words, when deviation fluctuation pattern 30 is executed, the highest setting is confirmed.

In addition, it is desirable that the allocation of the outgoing fluctuation pattern 30, which is a fluctuation pattern in which shortened fluctuation is executed and which suggests a setting, is extremely low (for example, 10% or less of the minimum allocation of the other fluctuation patterns) compared to the allocation of other fluctuation patterns in which shortened fluctuation is executed. In addition, it is desirable that in each fluctuation pattern in which shortened fluctuation is executed, the execution time of the provisional display and the confirmed display are the same, and only the shortened fluctuation time differs. In addition, it is desirable that the difference between the fluctuation time of the outgoing fluctuation pattern 30 and the fluctuation time of other fluctuation patterns in which shortened fluctuation is executed is recognizable by the player (for example, 1.5 seconds or more).

As a result, when the shortened variation is executed, the player will expect a variation time like the miss variation patterns 1 and 2, which are often distributed, but when miss variation pattern 30 is executed, the player will recognize that it is different from the expected variation time, and can enjoy the presentation in which the highest setting is confirmed. In particular, in the example of Figure 144 (A), a variation pattern including a shortened variation is only selected when there is a miss and no reach, so when a shortened variation is executed, the player's sense of expectation is reduced and he or she will no longer be interested in the shortened variation. However, by executing a setting suggestion presentation using the shortened variation in this way, the player can have a sense of expectation even for the shortened variation that is only selected when there is a miss and no reach, and a decrease in interest can be suppressed.

In addition, in the miss variation patterns 1, 2, and 30, the content displayed on the main LCD display device 1600 is the same, but only the shortened variation time is different. This allows the player to concentrate on the presentation so that he or she does not miss the presentation that confirms the highest setting.

Note that the deviation fluctuation pattern 30 is a fluctuation pattern in which the highest setting is determined and shortened fluctuation is executed, but for each setting other than the highest setting, there may be a fluctuation pattern in which the setting is determined and shortened fluctuation is executed. In this case, for example, it is desirable that the fluctuation time of each of the fluctuation patterns is different from the fluctuation time of other deviation fluctuation patterns in which shortened fluctuation is executed.

[12-6. Setting suggestion effect executed before provisional display of special lottery results]
Below, the miss fluctuation pattern 31 and the hit fluctuation pattern 34 will be explained with reference to FIG. 147. FIG. 147 is a schematic diagram showing an example of the performance executed in the miss fluctuation pattern 31 and the hit fluctuation pattern 34 in the fluctuation pattern table of FIG. 144 (A). In FIG. 144, the miss fluctuation pattern 31 and the hit fluctuation pattern 34 are set to be distributed only in the highest setting (setting 6). That is, when the miss fluctuation pattern 31 and the hit fluctuation pattern 34 are executed, the highest setting is confirmed.

In the case of miss fluctuation pattern 31 and hit fluctuation pattern 34, for example, at the same time as the fluctuation starts, special movie 1 is played on the main LCD display device 1600. Special movie 1 is a presentation that only occurs in the miss fluctuation pattern 31 and hit fluctuation pattern 34, that is, a presentation that confirms the highest setting.

In loss variation pattern 31, after special movie 1 ends, a provisional display is made to indicate that the special lottery result is likely to be a loss, and then a definitive display is made to indicate that the special lottery result is a loss. In win variation pattern 34, after special movie 1 ends, a provisional display is made to indicate that the special lottery result is a win, and then a definitive display is made to indicate that the special lottery result is a win.

Unlike miss variation patterns 25 to 30, miss variation pattern 31 and hit variation pattern 34 start the setting suggestion performance before the provisional display (specifically, for example, at the same time as the start of the variation). This allows the player to feel the excitement of waiting for the announcement of the jackpot lottery result with the highest setting confirmed. In addition, especially when the display time of special movie 1 is long (for example, more than 30 seconds), it is possible to appeal to other players that the setting of the pachinko machine 1 is the highest setting, which in turn allows the player to feel a sense of superiority over the other players, and it is also easier for the hall to appeal to the other players that the highest setting is being used.

[12-7. Setting suggestion effect that determines a big win or high setting]
Below, the miss fluctuation pattern 32 and the hit fluctuation pattern 35 will be explained with reference to FIG. 148. FIG. 148 is a schematic diagram showing an example of the performance executed in the miss fluctuation pattern 32 and the hit fluctuation pattern 35 in the fluctuation pattern table of FIG. 144(A). In FIG. 144(A), the miss fluctuation pattern 32 is set to be allocated only to the high setting (settings 4, 5, and 6). That is, when the miss fluctuation pattern 32 is executed, the highest setting is confirmed.

In the case of miss fluctuation pattern 32 and hit fluctuation pattern 35, for example, at the same time as the fluctuation starts, special movie 2 is played on the main LCD display device 1600. Special movie 2 is an effect that occurs only in the miss fluctuation pattern 31 and hit fluctuation pattern 34.

In the loss variation pattern 32, after the end of the special movie 2, a provisional display is made to indicate that the special lottery result is likely to be a loss, and then a definitive display is made to indicate that the special lottery result is a loss. In the win variation pattern 35, after the end of the special movie 2, a provisional display is made to indicate that the special lottery result is a win, and then a definitive display is made to indicate that the special lottery result is a win.

Therefore, when Special Movie 2 occurs, either the high setting or a jackpot in that variation is confirmed. In other words, if the special lottery result is a miss after Special Movie 2 occurs, the high setting is confirmed, so the player can suppress disappointment over the miss in the special lottery result, and can feel elated by the confirmation of the high setting.

In particular, if the display time of Special Movie 2 is long (e.g., 30 seconds or more), the player can feel a sense of superiority over other players, and if the special lottery result is a loss after Special Movie 2 occurs, the hall can more easily appeal to other players that a high setting is being used.

[12-8. Setting suggestion effect during time-saving state]
The following describes the variation pattern selected when the game state is in the time-saving state. Figure 149 (A) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a miss. Figure 149 (B) is an example of a variation pattern table selected when the game state is in the time-saving state and the result of the special lottery is a big win.

In the example of Figure 149 (A), the higher the setting, the greater the distribution of miss fluctuation pattern 3 and the smaller the distribution of miss fluctuation pattern 2 when there is a miss without a reach. Also, the fluctuation time of miss fluctuation pattern 2 is shorter than the fluctuation time of miss fluctuation pattern 3. For example, if the probability of winning a jackpot is higher the higher the setting, and if the distribution of each fluctuation pattern is the same for all settings, the higher the setting, the easier it will be to win a jackpot in a shorter time, and the number of game balls paid out per unit time will increase, which may lead to a burden on the hall.

However, as in the example of Figure 149 (A), the higher the setting, the more likely it is that there will be a distribution of fluctuation patterns with longer fluctuation times, making it possible to equalize the number of game balls paid out due to jackpots per unit time at each setting. Also, the higher the setting, the higher the selection rate of failure fluctuation pattern 3, which has a longer fluctuation time among fluctuation patterns that include shortened fluctuations, so failure fluctuation pattern 3 can also function as a fluctuation pattern that suggests a high setting.

Similarly, when there is a reach and a miss, the higher the setting, the greater the distribution of miss fluctuation pattern 11, which has a long fluctuation time, and the smaller the distribution of miss fluctuation pattern 12, which has a short fluctuation time. Similarly, when there is a jackpot win, the higher the setting, the greater the distribution of hit fluctuation pattern 2, which has a long fluctuation time, and the smaller the distribution of hit fluctuation pattern 3, which has a short fluctuation time.

As mentioned above, for example, if the higher the setting, the higher the probability of winning the jackpot, and if the distribution of each fluctuation pattern is the same for all settings, the higher the setting, the easier it is to win a jackpot in a short time; in other words, the lower the setting, the longer it takes to win a jackpot, and the more game balls are fired before winning a jackpot. For example, if the lower the setting, the greater the distribution of fluctuation patterns with long fluctuation times and the smaller the selection rate of fluctuation patterns with short fluctuation times, then a player who stops firing game balls during the fluctuation can equalize the number of game balls fired per unit time for each setting.

At the timing when a setting is suggested in the various setting suggestion effects described in this chapter, a specified sound effect may be output or a specified light emission may be executed. The specified sound effect and the specified light emission may be dedicated to be executed only during the setting suggestion effect. In particular, in a setting suggestion effect in which a high or maximum setting is confirmed, it is preferable to output a specified sound effect or execute a specified light emission that is executed only during the setting suggestion effect.

It is desirable that the allocation of a variation pattern in which an effect suggesting that a high or maximum setting has been confirmed or is highly likely is executed is extremely low compared to the allocation of other variation patterns. If the allocation of such a variation pattern is high, a player may lose expectation and stop playing early if an effect suggesting a high or maximum setting is not executed even though the player has only played for a short period of time.

In addition, it is desirable that the allocation of a fluctuation pattern in which an effect suggesting that a low or minimum setting is confirmed or highly likely is executed is extremely low compared to the allocation of other fluctuation patterns. If the allocation of such a fluctuation pattern is high, the effect suggesting a low or minimum setting is executed frequently, which may cause the player to lose expectation and ultimately stop playing early.

In addition, while the setting suggestion effects suggesting groups of settings such as high settings, low settings, highest settings, odd settings, and even settings have been described, the setting groups in the setting suggestion effects are not limited to these. Setting suggestion effects may be executed for any group consisting of one or more settings. For example, settings 1 and 2 may be grouped as low settings, settings 3 and 4 as medium settings, and settings 5 and 6 as high settings, or there may be a group consisting of only setting 5.

[12-9. Other forms of pachinko machines with setting functions]
Fig. 150 is a diagram showing an example of mounting main control board 1310. In this figure, the configuration of main control board box 1320 is shown by solid lines, and the configuration inside main control board box 1320 is shown by dotted lines.

In the above explanation, the setting board 970 is connected to the dispensing control board 951, and the dispensing control unit 952 obtains the operation status of each switch and controls the display of the setting display 974. However, in the following explanation, the setting board 970 is connected to the main control board 1310, and the main control MPU 1311 obtains the operation status of each switch and controls the display of the setting display 974.

Figure 150 (A) shows the main control board box 1320 of this implementation example. The main control board box 1320 is made of transparent resin that houses the main control board 1310 in a sealable structure that cannot be opened without being destroyed once closed. The main control board box 1320 is provided with a hole 1318A for operating the display switch 1318, a hole 954A for operating the RAM clear switch 954, and a hole 971A for operating the setting key 971.

Figure 150 (B) shows the main control board 1310 and setting board 970 housed in the main control board box 1320 shown in (A). In the example shown in Figure 150 (B), in addition to the main control MPU 1311 and driver circuit (not shown), the main control board 1310 is also equipped with a base display 1317, a display switch 1318, and a RAM clear switch 954. Note that the RAM clear switch 954 may not be mounted on the main control board 1310, but may be mounted on another control board (for example, the payout control board 951 or the power supply board). In this case, the main control board box 1320 does not have a hole 954A.

In the pachinko machine 1 of this embodiment, two operation units (RAM clear switch 954, setting key 971) that trigger RAM clearing are provided inside the main control board box 1320. As will be described later, the storage area of the main control RAM 1312 from which data is erased differs when only the RAM clear switch 954 is operated from when the setting key 971 is operated.

The setting board 970 is provided close to the main control board 1310, and the setting board 970 and the main control board 1310 are electrically connected so that signals can be transmitted. The setting board 970 and the main control board 1310 may be connected directly between the boards using a connector, or may be connected using an electric wire. On the setting board 970, a setting key 971 for changing the operation mode of the pachinko machine 1 to a setting change mode or a setting confirmation mode, and a setting display 974 for displaying the set or selected setting value are mounted. In addition, a setting change switch 972 for changing the setting value and a setting confirmation switch 973 for confirming and inputting the changed setting value may also be mounted on the setting board 970.

The outputs of the various switches 971, 972, and 973 provided on the setting board 970 are sent to the main control board 1310 and input to a port of the main control MPU 1311.

In addition, the main control board 1310 and the setting board 970 may communicate serially, and the driver circuit of the setting display 974 may be implemented on the setting board 970.

The main control board box 1320 is placed on the back side of the pachinko machine 1, so the setting display 974 on the setting board 970 is mounted in a position that can be seen from the back side of the pachinko machine 1.

The main control board 1310 may authenticate the setting board 970 in the initialization process (FIGS. 21 and 22). For example, an authentication code for each manufacturer of the pachinko machine is set on the setting board 970, and the main control board 1310 reads and verifies the authentication code set on the setting board 970. If the setting board 970 cannot be authenticated, the pachinko machine 1 cannot start playing. In other words, game balls can be shot toward the game area 5a, but even if a ball enters the winning hole, no prize balls are paid out and the variable display game cannot be executed. The authentication code may be set for each model of pachinko machine, or a serial number for each pachinko machine may be set. The authentication code may be set, for example, by a DIP switch, jumper wire, jumper pin, or short circuit of a pattern provided on the setting board 970, or a logic circuit (for example, a small-capacity FPGA (Field Programmable Gate Array)) in which the authentication code is set may be mounted on the setting board 970.

The main control board 1310 (main control MPU 1311) may be able to identify whether the board mounted in the main control board box 1320 is the setting board 970 or the dummy board 979. For example, the setting board 970 and the dummy board 979 output different signals to the main control board 1310, so that the main control MPU 1311 recognizes whether the connected board is the setting board 970 or the dummy board 979. Specifically, the setting board 970 outputs +5V, and the dummy board 979 outputs 0V (ground level). The signals from the setting board 970 and the dummy board 979 are input to a specific port of the interface circuit 1331 of the main control board 1310. The main control MPU 1311 determines which board is connected based on the input signal to that port.

In this way, by changing the code of the setting board 970 for each manufacturer (each model), it is possible to prevent an incorrect setting board 970 from being installed in the main control board box 1320. In addition, by setting an authentication code in the logic circuit on the setting board 970, it is possible to prevent unauthorized replacement of the setting board 970.

Figure 150 (C) shows the main control board 1310 and dummy board 979 housed in the main control board box 1320 shown in (A).

As mentioned above, in recent years, some pachinko machines 1 have a function for setting the game performance. This setting function can change the performance of the pachinko machine related to the prize balls acquired by the player, such as the probability of winning a jackpot in a special symbol variation display game, and the setting function can change the performance of the pachinko machine 1 in accordance with the business policy of the hall. On the other hand, some halls feel that conventional pachinko machines without a setting function are sufficient and that a setting function is unnecessary. For this reason, pachinko machine manufacturers need to design and produce both pachinko machines without a setting function and pachinko machines with a setting function, and there is a demand for standardizing the specifications of pachinko machines to efficiently design and produce the two types of pachinko machines.

For this reason, in a pachinko machine 1 that does not have a setting function, a dummy board 979 is mounted in the mounting space of the setting board 970, so that the pachinko machine 1 can be produced in the same way as if the setting board 970 were mounted. In addition, the main control board 1310 can be made common between pachinko machines that do not have a setting function and pachinko machines that have a setting function.

The dummy board 979 does not have devices such as the setting keys 971 and setting display 974 mounted on the setting board 970 mounted thereon, but may have a pattern for mounting these devices. In other words, a pattern for mounting devices is provided on the dummy board 979, but no devices are mounted on the pattern.

The dummy board 979 does not have to be constructed of a printed circuit board, but may be a component (e.g., a unit constructed of a resin case) that can be attached to the main control board box 1320 in the same position as the setting board 970.

In addition, since the driver circuit of the setting display 974 is mounted on the main control board 1310, the output of the driver circuit of the setting display 974 is preferably terminated by a dummy resistor on the dummy board 979, rather than being open or grounded. This can prevent damage to the driver circuit due to an overcurrent. In addition, when serial communication is performed between the main control board 1310 and the setting board 970, the dummy board 979 preferably terminates the serial communication with the main control board 1310.

When the dummy board 979 is implemented, the hole 971A is not provided in the main control board box 1320. In addition, by providing a small door that can be moved to cover the hole 971A in the main control board box 1320 so that it can be operated from inside the main control board box 1320 but cannot be operated from the outside, the main control board box 1320 may be made common to pachinko machines that do not have a setting function and pachinko machines that have a setting function.

The dummy board 979 described below may also be set with an authentication code for authentication by the main control board 1310. The dummy board 979 may not require authentication by the main control board 1310, and an authentication code may not be set. The main control board 1310 and the dummy board 979 may communicate serially, and the main control board 1310 may authenticate the dummy board.

The variations in the operating means that can be implemented on the setting board 970 described above can be summarized as follows:

(1) With setting change switch 972 and setting confirmation switch 973 In this case, the key 975 is inserted into the setting key 971 and turned to the setting position (while the RAM clear switch 954 is pressed), and the power switch of the pachinko machine 1 is operated to turn on the power. Then, the setting change switch 972 is operated to select the setting value to be set, and the setting confirmation switch 973 is operated.

(2) Setting change switch 972 present, setting confirmation switch 973 absent In this case, the key 975 is inserted into the setting key 971, and with the setting key 971 turned to the setting position (and with the RAM clear switch 954 pressed), the power switch of the pachinko machine 1 is operated to turn on the power. Then, the setting change switch 972 is operated to select the setting value to be set, and the setting key 971 is returned to the normal position.

(3) No setting change switch 972, setting confirmation switch 973 present In this case, the key 975 is inserted into the setting key 971, turned to the setting position (and with the RAM clear switch 954 pressed), and the power switch of the pachinko machine 1 is operated to turn on the power. Then, the RAM clear switch 954 is operated to select the setting value to be set, and then the setting confirmation switch 973 is operated. Note that instead of operating the RAM clear switch 954, the setting key 971 may be turned to the right to select the setting value to be set.

(4) No setting change switch 972, no setting confirmation switch 973 In this case, the key 975 is inserted into the setting key 971, and with it turned to the setting position (and with the RAM clear switch 954 pressed), the power switch of the pachinko machine 1 is operated to turn on the power. Then, the RAM clear switch 954 is operated to select the setting value to be set, and the setting key 971 is returned to the normal position. Note that instead of operating the RAM clear switch 954, the setting key 971 may be turned to the right to select the setting value to be set.

Figures 151 and 152 are diagrams showing another implementation example of the main control board 1310. In this figure, the configuration of the main control board box 1320 is shown with solid lines, and the configuration inside the main control board box 1320 is shown with dotted lines.

The implementation example shown in Figures 151 and 152 differs from the implementation example shown in Figure 150 in that a small door 1321 is provided on the main control board box 1320.

Figure 151 (A) shows the main control board box 1320 of this implementation example. As described above, the main control board box 1320 is made of transparent resin that houses the main control board 1310 in a sealable structure that cannot be opened without being destroyed once closed. The main control board box 1320 is provided with a hole 1318A for operating the display switch 1318, a hole 954A for operating the RAM clear switch 954, and a hole 976A for operating the setting mode switch 976 for changing the operation mode of the pachinko machine 1 to the setting change mode.

The hole 976A is normally covered by the small door 1321. The small door 1321 is provided with a key unit 1322, and by inserting a key 975 into the keyhole of the key unit 1322 and operating it, the small door 1321 is opened from the main control board box 1320, exposing the hole 976A and allowing the setting mode switch 976 to be operated.

As shown in FIG. 152(A), in the normal state where the key 975 can be inserted and removed, the bar 1323 is in the maximum protruding position from the key unit 1322, and the bar 1323 is inserted into the catch 1324, engaging with the catch 1324, and the small door 1321 is fixed in the closed position. On the other hand, as shown in FIG. 152(B), when the key 975 is inserted into the keyhole and turned, the bar 1323 retracts from the maximum protruding position, disengaging from the catch 1324, and the small door 1321 can be opened around the hinge 1325. When the small door 1321 is in the open state (FIG. 152(B)), the hole 976A is exposed and the setting mode switch 976 can be operated.

Figure 153 is a diagram showing yet another implementation example of the main control board 1310. In the implementation example shown in Figure 153, a key unit 1322 is provided on a rear cover 980 that covers the back side of the pachinko machine 1. That is, by inserting a key 975 into the keyhole of the key unit 1322 and operating it, the rear cover 980 can be opened from the main body frame base 600, and the main control board box 1320 (the setting mode switch 976 provided on the setting board 970) can be operated.

In other words, in the normal state where the key 975 can be inserted and removed, the rear cover 980 is fixed to close the rear side of the main body frame base 600, and the main control board box 1320 is housed in the rear cover 980. On the other hand, when the key 975 is inserted into the keyhole and turned, the rear cover 980 can be opened from the main body frame base 600, the main control board box 1320 housed inside the rear cover 980 is exposed to the rear side, and the setting mode switch 976 can be operated.

When the key unit 1322 is provided on the rear cover 980, the main control board box 1320 (main control board 1310) may have the configuration shown in FIG. 151 (C). Specifically, the main control board box 1320 is made of transparent resin that houses the main control board 1310 in a sealable manner with a structure that cannot be opened without destruction once closed. The main control board box 1320 is provided with a hole 1318A for operating the display switch 1318, a hole 954A for operating the RAM clear switch 954, and a hole 976A for operating the setting mode switch 976 for changing the operation mode of the pachinko machine 1 to the setting change mode. The main control board box 1320 houses the main control board 1310 and the setting board 970. In addition to the main control MPU and driver circuit (not shown), the base display 1317, the display switch 1318, and the RAM clear switch 954 are mounted on the main control board 1310. The RAM clear switch 954 may be mounted on another control board (e.g., the dispensing control board 951 or the power supply board) instead of on the main control board 1310. In this case, the hole 954A is not provided in the main control board box 1320.

The setting board 970 is provided close to the main control board 1310, and the setting board 970 and the main control board 1310 are electrically connected so that signals can be transmitted. The setting board 970 and the main control board 1310 may be connected directly between the boards using a connector, or may be connected by an electric wire. On the setting board 970, a setting mode switch 976 for changing the operation mode of the pachinko machine 1 to a setting change mode, and a setting display 974 for displaying the set or selected setting value are mounted. In addition, a setting change switch 972 for changing the setting value and a setting confirmation switch 973 for confirming and inputting the changed setting value may also be mounted on the setting board 970.

[12-10. Details of setting change process]
Fig. 154 is a flow chart showing an example of the initialization process. The initialization process shown in Fig. 154 differs from the initialization process described above in Fig. 101 in that the RAM clear process is performed when the setting key 971 is operated (steps S17 and S30). Note that the same steps as those in the initialization process described above in Figs. 21 and 101 are given the same reference numerals, and detailed description thereof will be omitted.

When the power is turned on to the pachinko machine 1, the main control MPU 1311 of the main control board 1310 executes the main control program to perform initialization processing. The main control MPU 1311 first sets the protection of the RAM 1312 built into the main control MPU 1311 to write permission, making it possible to write to the RAM 1312 (step S10). Next, the main control MPU 1311 starts the built-in watchdog timer (step S12) and determines whether a predetermined wait time (the time required to start up the sub-board (such as the peripheral control board 1510)) has elapsed (step S16). If the predetermined wait time has elapsed, it determines whether the RAM clear switch 954 has been operated (step S18).

The RAM clear switch 954 may be detected immediately after power is turned on (e.g., before step S12), the detection result may be stored in a specified register, and the stored value may be determined in step S18. By detecting the RAM clear switch 954 immediately after power is turned on, it is possible to reliably detect the operation of the RAM clear switch 954 even if the RAM clear switch 954 is operated only for a short time after power is turned on.

If the RAM clear switch 954 is operated, it is determined whether the setting key 971 is operated and its output is on (step S17). If the setting key 971 is not operated, this is a normal RAM clear operation, so the process proceeds to step S30 and a specified area of the internal RAM 1312 is initialized. On the other hand, if the setting key 971 is operated, that is, if the power is turned on with both the setting key 971 and the RAM clear switch 954 operated, the process transitions to setting change mode. In other words, since two switches and the power switch must be operated to start the setting change mode, the mistake of starting the setting change mode by mistake can be prevented.

In the setting change mode, first, the setting value is displayed (step S60). Specifically, the main control MPU 1311 reads the current setting value from the main control RAM 1312 and generates data for displaying it on the setting display 974. Then, a security signal is output (step S61). Specifically, the main control MPU 1311 generates data for outputting a security signal. The security signal is a signal that is output from the external terminal board 784 when the pachinko machine 1 detects an abnormality. However, since it is extremely rare for the pachinko machine 1 to be put into setting change mode during play and there is a possibility of fraudulent activity, if the setting change mode is entered during business hours, the hall computer should be notified.

The security signal may be output for a predetermined time from the start of the setting change mode, or may be output between the start and end of the setting change mode, or may be output from the start of the setting change mode until a predetermined period after the end of the setting change mode. By outputting the security signal until a predetermined period after the end of the setting change mode, the period during which abnormalities can be detected is extended, thereby improving security.

Then, the main control MPU 1311 determines whether a setting change operation has been performed based on whether the setting change switch 972 has been operated (step S62), changes the setting value according to the operation of the setting change switch 972, and writes it to the main control RAM 1312 (step S63). For example, if the setting change switch 972 is a push button switch, the setting value changes by one step when the setting change switch 972 is pressed once. Also, if the setting key 971 also serves as the setting change switch 972, the setting value changes by one step when the setting key 971 is turned to the right once. The main control MPU 1311 then generates data for displaying the changed setting value on the setting display 974 (step S64).

Then, it is determined whether to end the setting change mode and confirm the setting value (step S65). Specifically, when the main control MPU 1311 detects the operation of the setting confirmation switch 973, it ends the setting change mode and proceeds to step S30. The setting change mode may also be ended by returning the setting key 971 to its normal position. The setting change mode may also be ended by the operation of another switch or sensor provided in the pachinko machine 1.

In the above-mentioned process, the process proceeds to step S30 after the setting change mode is ended or if it is determined in step S17 that the setting key is not on, but it may also proceed to step S20. In this case, after the setting change mode is ended, it is determined whether the power outage flag is set (step S20), and it is determined whether the checksums match (step S22). If the power outage flag is not set and the checksums do not match, a specified area of the internal RAM 1312 is initialized. Note that if it is determined in step S17 that the setting key is not on, the process proceeds to step S30.

After the setting change mode ends, in step S30, the setting value data, the base calculation work area (base calculation area 13128), and the game status (for example, special bonus state, time-saving state, reserved memory for special and normal symbols, information on winning balls) among the data backed up in the work area of the built-in RAM 1312 are retained, and the other data is erased, and the process proceeds to step S24. Note that game status data may be erased without being retained. In this case, the memory area erased by the RAM area erased after the setting change operation and the memory area erased by the RAM clear operation will be the same.

On the other hand, if no operation to end the setting change mode is detected, the process returns to step S62 and further detects a setting change operation.

Also, if operation of the setting key 971 is not detected in step S17, in step S30, the setting value data and the data in the base calculation work area (base calculation area 13128) among the data backed up in the work area of the internal RAM 1312 are left, and the other data is erased, and the process proceeds to step S24.

Also, if operation of the RAM clear switch 954 is not detected in step S18, the main control MPU 1311 does not erase the data backed up in the internal RAM 1312, and determines whether the power outage flag is set (step S20).

If the power outage flag is not set, the data in the work area of the built-in RAM 1312 may be incorrect, so the main control MPU 1311 erases the data backed up in the work area (other than the base calculation area 13128) (step S30) and proceeds to step S24. On the other hand, if the power outage flag is set, the main control MPU 1311 clears the power outage flag and uses the checksum calculated at the time of the previous power outage to compare (verify) the checksum calculated from the data backed up in the work area of the built-in RAM 1312 with the checksum stored in step S48 (step S22).

If the checksum calculated from the backup data does not match the checksum stored in step S48, the data in the work area of the built-in RAM 1312 may be incorrect, so the main control MPU 1311 erases the data backed up in the work area (other than the base calculation area 13128) (step S30) and proceeds to step S24. On the other hand, if the checksum calculated from the backup data matches the checksum stored in step S48, the data in the work area of the built-in RAM 1312 is correct, so the data backed up in the work area is not erased and the process proceeds to step S24.

In step S24, the main control MPU 1311 uses the check code to determine whether the base calculation work area (base calculation area 13128) is normal. If it is determined to be abnormal, the data in the base calculation work area may be incorrect, so the main control MPU 1311 erases the data stored in the base calculation work area (step S26).

In the pachinko machine 1 of this embodiment, cases in which at least a part of the area of the RAM 1312 is initialized include the operation of the setting key 971 (step S17), the operation of only the RAM clear switch (step S18), a power failure flag abnormality in which the power failure flag is not set (step S20), a RAM abnormality in which the RAM checksum does not match (step S22), and an abnormality in the base calculation work (step S24). Of these, as shown in the figure, if the operation of the setting key 971 is detected when the power is turned on, the data of the setting value and the game state (for example, the probability state, the time-saving state, the reserved memory of special patterns and normal patterns, and information on prize balls) in the game control area 13126 (including the game work area and the game stack area) is left, and the other data is cleared, and the base calculation area 13128 (outside the game control area) is not cleared. When the operation of the RAM clear switch 954 is detected when the power is turned on, but the operation of the setting key 971 is not detected, or when there is a power outage flag abnormality or a RAM abnormality, the game control area 13126 (including the game work area and game stack area) is cleared, and the base calculation area 13128 (including the base calculation work area and base calculation stack area) is not cleared. Also, when there is an abnormality in the base calculation work, the base calculation area 13128 (outside the game control area) is cleared, and the game control area 13126 is not cleared.

Unlike the illustrated example, in the case of a power outage flag abnormality, a RAM abnormality, or a base calculation work abnormality, the validity of the data stored in the RAM 1312 is not guaranteed, so the entire RAM area including the game control area 13126 and the base calculation area 13128 may be cleared. If the memory configuration is such that clearing the entire RAM area in the case of a base calculation work abnormality would cause data indicating the game status to be lost and normal processing would be impossible, it is advisable to initialize only the base calculation work area and the base calculation stack area. Also, if operation of the RAM clear switch is detected when the power is turned on, as described above, the game control area 13126 (including the game work area and game stack area) is cleared, but the base calculation area 13128 does not need to be cleared.

In this way, in the pachinko machine 1 of this embodiment, data backed up in the work area of the built-in RAM 1312 is erased under different conditions for each type of data (game control area 13126 (setting values, game status data), base calculation area 13128). In other words, by operating the RAM clear switch, the backed up game control area 13126 other than the setting values is erased, but the setting values and base calculation area 13128 are not erased. If the setting values were erased by operating the RAM clear switch, it would be necessary to reset the setting values every time a RAM clear operation is performed, which would make maintenance of the pachinko machine 1 in the hall more complicated. For this reason, the setting values are not erased by operating the RAM clear switch.

For the processing after step S28, either the processing shown in FIG. 22 or the processing shown in FIG. 102 may be adopted as necessary. The difference between FIG. 22 and FIG. 102 is the presence or absence of processing (steps S50, S52) to calculate and store a check code from the data in the base calculation work area (base calculation area 13128) when the power is cut off.

The setting confirmation process is not executed in the initialization process described above, but is executed in the setting confirmation process called from the timer interrupt process described below (Figs. 155 and 156), but the setting confirmation process may be executed in the initialization process. By executing the setting confirmation process in the initialization process, setting confirmation can be permitted only when the power is turned on, and it is possible to prevent confirmation of setting values due to inadvertent operations while the pachinko machine 1 is in operation.

In this case, an operation unit for confirming the settings (e.g., a push button switch) may be provided in addition to the setting key 971 (the setting change switch 972 may also have the function of the operation unit for confirming the settings), and if the operation unit for confirming the settings is operated when the power is turned on, the current setting value may be read from the main control RAM 1312, data may be generated for display on the setting display 974, and the setting value may be displayed on the setting display 974. In this case as well, a security signal may be output in conjunction with the display of the setting value.

In the main control board 1310 of the pachinko machine 1 of this embodiment, there are cases where the RAM clear process is not executed immediately even when the RAM clear switch 954 is operated. Specifically, when the setting key 971 is operated to ON and the RAM clear switch 954 is operated to turn on the power, the main control RAM is cleared after the setting change mode ends (step S30). In other words, the main control MPU 1311 puts the RAM clear process on hold and executes the RAM clear process after a predetermined condition is satisfied (end of the setting change mode). During the setting change mode, it can be said that the main control MPU 1311 is controlled to memorize that the RAM clear process will be executed. On the other hand, when the setting key 971 is not operated and the RAM clear switch 954 is operated to turn on the power, the main control RAM is cleared without starting the setting change mode (step S30).

We have explained in detail above how to clear (initialize) the main control RAM 1312. Next, we will explain how to clear the RAM of the payout control unit 952 mounted on the payout control board 951.

After the setting change mode, the main control RAM 1312 is cleared in step S30, but the RAM of the payout control unit may also be cleared at the same time. The RAM of the payout control unit 952 does not have to be cleared. Furthermore, whether or not to clear the RAM of the payout control unit may be switched depending on the operation. For example, with the setting key 971 operated to ON, turning on the power while operating the RAM clear switch 954 clears the RAM of the main control RAM 1312 and the RAM of the payout control unit 952, and with the setting key 971 operated to ON, turning on the power without operating the RAM clear switch 954 clears the main control RAM 1312 and does not clear the RAM of the payout control unit 952. In this way, by changing the operation method, a process can be executed in which a portion of the main control RAM 1312 is cleared and the RAM of the payout control unit 952 is not cleared.

When clearing the main control RAM 1312 and the RAM of the payout control unit 952, there may be a discrepancy between the timing at which the main control RAM 1312 is cleared and the timing at which the RAM of the payout control unit 952 is cleared, depending on whether or not the setting key 971 is operated. That is, if the setting key 971 is operated to ON and the RAM clear switch 954 is operated to turn on the power, the main control RAM 1312 is cleared after the setting change mode ends (step S30). On the other hand, when the payout control unit 952 detects the operation of the RAM clear switch 954, it immediately clears the RAM. For this reason, depending on the conditions (operations), a state may occur in which the RAM of the payout control unit 952 is cleared but the main control RAM 1312 is not cleared.

In addition, not only when the RAM clear switch 954 is provided on the main control board 1310, but also in pachinko machines 1 provided on the payout control board 951 or power supply board 931, it is preferable to clear the RAM of the payout control unit 952 by turning on the power while operating the RAM clear switch 954 when changing the setting value. In other words, the payout control unit 952 does not clear the RAM in response to a RAM clear command from the main control board 1310, but rather the payout control unit 952 detects the signal level of the RAM clear switch 954 when the power is turned on, determines whether the RAM clear switch 954 has been operated, and determines whether to clear the RAM of the payout control unit 952. Providing a RAM clear switch on the payout control board 951 has the effect of being able to accommodate a variety of models without changing the control program on the frame side.

[12-11. Details of setting confirmation process]
Figure 155 is a flowchart showing an example of timer interrupt processing in a pachinko machine of this embodiment.

Compared to the timer interrupt processing described above in FIG. 23, the timer interrupt processing shown in FIG. 155 has a base calculation process (step S801) instead of the feature ratio calculation area update process of step S81, and the feature ratio calculation/display process of step S89 is deleted. In addition, a setting confirmation process (step S802) is added to display a setting value indicating the gaming performance of the pachinko machine 1 (for example, the operation rate of a condition device). Note that the same steps as those in the timer interrupt processing described above in FIG. 23 and FIG. 104 are given the same reference numerals, and detailed explanations thereof are omitted.

When the timer interrupt process starts, the main control MPU 1311 executes the main control program to first set the RBS (register bank selection flag) in the program status word to 1 and switch the register (step S70).

Next, the main control MPU 1311 executes switch input processing (step S74), timer update processing (step S76), random number update processing 1 (step S78), and prize ball control processing (step S80).

Then, the main control MPU 1311 refers to the current game state, adds the number of prize balls paid out as game value to an area corresponding to the current game state, updates the base calculation area 13128 (see FIG. 103) of the main control built-in RAM 1312, and calculates the base value (step S801, see FIG. 105 and FIG. 106 for details of the base calculation process). The base calculation process (step S801) may be executed in any order after the prize ball control process (step S80), but it is recommended to execute it in an early order to ensure that it is executed at every timer interrupt.

Then, the main control MPU 1311 executes a frame command reception process (step S82), a fraudulent behavior detection process (step S84), a special symbol and special electric device control process (step S86), and a normal symbol and normal electric device control process (step S88).

Then, a setting confirmation process (step S802) is executed to display the setting values indicating the gaming performance of the pachinko machine 1. In the setting confirmation process, the hall employee performs a predetermined operation to display the current setting values on the setting display 974. The setting confirmation process will be described in detail later with reference to FIG. 156.

Next, the output data setting process (step S90) and the peripheral control board command transmission process (step S92) are executed.

Finally, the main control MPU 1311 sets a predetermined value (18H) in the watchdog timer clear register WCL (step S96). Finally, the main control MPU 1311 switches (restores) the register bank. When the above processing is completed, the timer interrupt processing is terminated and processing before the interrupt is restored.

Figure 156 is a flow chart showing an example of the setting confirmation process of the pachinko machine of this embodiment. The setting confirmation process is called and executed from step S802 of the timer interrupt process (Figure 155).

In the setting confirmation process, first, the main control MPU 1311 determines whether a setting confirmation operation is being performed (step S8061). Specifically, it determines whether the setting key 971 is being operated. If the setting key 971 is operated when the power is turned on, it triggers a transition to setting change mode (step S17 in FIG. 154), and if it is operated during operation, it becomes a setting confirmation operation and the current settings can be displayed.

If no operation of the setting key 971 is detected, the setting key 971 has been returned to its normal position, so data is generated to not display the setting value, and the setting value is hidden (step S8065).

On the other hand, if operation of the setting key 971 is detected, it is determined whether the setting display conditions are met (step S8062).

As a condition for displaying the settings, the output of the frame open switch is used to determine whether the main frame 4 is open from the outer frame 2. Since the setting key 971 is installed on the back side of the pachinko machine 1, the setting key 971 cannot be operated unless the outer frame 2 is open. However, if operation of the setting key 971 is detected even though the outer frame 2 is closed, it is presumed that some abnormality (malfunction or fraudulent activity) has occurred in the pachinko machine 1, and in this case it is better not to display the settings. Also, since the setting display 974 is installed on the back side of the pachinko machine 1, the setting display 974 cannot be seen unless the outer frame 2 is open, and there is no need to display the settings.

The setting value may be displayed at any time while the pachinko machine 1 is in operation. Also, a setting display condition may be set that allows display at a specific time. For example, the setting position may be displayed for a predetermined time (e.g., 10 seconds) after the power is turned on. In this case, a timer may be operated to measure the elapsed time since the power was turned on (or the CPU initial setting in step S28), and the setting value may be displayed until the timer times out.

Also, a setting display condition may be set that allows the setting value to be displayed in a specific game state. For example, the setting display condition may not be displayed while the special pattern is changing or during a jackpot game. In other words, a setting display condition is set that allows the setting value to be displayed during periods other than when the special pattern is changing or during a jackpot game. Note that the setting value may not be displayed in game states other than those mentioned above. In this case, if the setting key is operated during a special pattern changing game or a jackpot game, the setting value may be displayed at the timing when the special pattern changing game or jackpot game ends.

If it is determined that the setting display conditions are met, a security signal is output (step S8063). Specifically, the main control MPU 1311 generates data for outputting the security signal. The security signal is a signal that is output from the external terminal board 784 when the pachinko machine 1 detects an abnormality, but since it is rare for the pachinko machine 1 to check the settings while playing and this can be a sign of fraudulent activity, if a setting check operation is performed during business hours, the hall computer should be notified.

The security signal may be output for a predetermined time from the start of the display of the setting values, or may be output between the start and end of the display of the setting values, or may be output from the start of the display of the setting values until a predetermined period after the display of the setting values ends. By outputting the security signal until a predetermined period after the display of the setting values ends, the period during which abnormalities can be detected is extended, thereby improving security.

In the illustrated setting confirmation process, a security signal is sent when the setting display conditions are met, but even if the setting display conditions are not met, a security signal may be sent when a setting confirmation operation (operation of the setting key 971) is detected.

Then, the setting value is displayed (step S8064). Specifically, the main control MPU 1311 reads the current setting value from the main control RAM 1312 and generates data to display on the setting display 974.

If the setting display conditions are not met, the conditions are checked until they are met, but since there is a possibility that the loop cannot be broken for a long time, the setting confirmation process may be terminated if the setting display conditions are not met continuously for a predetermined time. For example, after it is determined that the setting value is not to be displayed because a special pattern change display is in progress, if the special pattern change display ends within a predetermined time, the setting display conditions are met upon the end of the special pattern change display, and the setting value is displayed. Also, if the setting conditions are not met, the setting confirmation process may be terminated immediately without repeating the checking of the setting conditions.

At this time, the special pattern change display start condition may include that the set value is not being displayed. In this way, a new special pattern change display will not start while the set value is being displayed, and a new special pattern change display will start after the set value is no longer displayed.

As described above, in the pachinko machine 1 of this embodiment, the setting value can be checked at a predetermined timing, so the setting value can be checked without interfering with other displays. In particular, when the base display 1317 and the setting display 974 are used together, the setting value is displayed with priority during setting confirmation, so although the base value is calculated, it is not displayed. In a gaming state in which many prize balls are paid out in a short period of time, it may be desirable to check the changes in the base value. For this reason, the setting value can be displayed without interfering with the real-time display of the base value.

[12-12. Security signal output associated with setting changes and setting confirmation]
FIG. 157 is a timing diagram of security signals output in conjunction with setting changes and setting confirmations.

As mentioned above, a security signal is output in setting change mode and when confirming settings (S61 in FIG. 154, S8063 in FIG. 156).

In the setting change mode, as shown in FIG. 157(A), a security signal is output from the external terminal board 784 for a predetermined time from the start of the setting change mode. The predetermined time (T seconds) for which the security signal is output only needs to be longer than the time that the hall computer can recognize the security signal, and may be less than one second or several tens of seconds.

The security signal may also be output for the period from the start to the end of the setting change mode, rather than for a predetermined time from the start of the setting change mode.

In addition, in the setting change mode, as shown in FIG. 157 (B), a security signal may be output for a predetermined time (T seconds) at the timing of the RAM clear process executed in conjunction with the setting change mode.

When checking the settings, as shown in FIG. 157(C), a security signal is output from the external terminal board 784 for a predetermined time from the start of the setting check. The predetermined time (T seconds) for which the security signal is output only needs to be longer than the time that the hall computer can recognize the security signal, and may be less than one second or several tens of seconds.

In addition, the security signal may be output during the period from the start to the end of the setting check (the period during which the setting value is displayed) rather than for a predetermined time from the start of the setting check.

When the pachinko machine 1 detects an error, a security signal is output from the external terminal board 784 for a predetermined time (T seconds) from the detection of the error, as shown in FIG. 157(D). When the pachinko machine 1 detects an error during setting confirmation, a security signal is output for a predetermined time from the detection of the error, as shown in FIG. 157(E). That is, a security signal resulting from the setting confirmation and a security signal resulting from the error detection are output consecutively for more than a predetermined time (T seconds) (a predetermined time from the error detection). Note that even if an error is detected during setting confirmation, it is not necessary to extend the output time of the security signal. That is, even if an error is detected during security signal output, the security signal resulting from the error detection is not output, but is absorbed into the security signal being output.

In addition, during the setting change mode, the pachinko machine 1 does not detect errors, so the security signal resulting from the setting check and the security signal resulting from the error detection do not overlap. In other words, during the setting change mode, even if an error occurs, the output time of the security signal is not extended, but if an error occurs during the setting check, the output time of the security signal is extended.

[12-13. Another example of setting confirmation process]
Another example of the setting confirmation process will be described below. In the above explanation, the setting confirmation process is mainly performed in the timer interrupt process in the peripheral control unit regular process. In the following, the setting confirmation process is performed in the initialization process when the power is turned on to the pachinko machine 1.

Specifically, for example, if the setting key is on when the power is turned on to the pachinko machine 1, the process proceeds to setting confirmation processing. Details of this process are explained below. Note that the timer interrupt processing executed by the peripheral control MPU in this chapter is the timer interrupt processing in FIG. 23 (i.e., the timer interrupt processing that does not include the setting confirmation processing in step S802).

Figure 158 is a flowchart showing another example of the initialization process. The differences from Figure 154 will be explained. If the main control MPU 1311 determines in step S18 that the RAM clear switch 954 has not been operated (step S18: No), it determines whether the setting key 971 has been operated and its output is on (step S29).

If the main control MPU 1311 determines that the output of the setting key 971 is on (step S29: Yes), it proceeds to the setting confirmation process in step S807, and then proceeds to step S20. The setting confirmation process in step S807 will be described later. If the main control MPU 1311 determines that the output of the setting key 971 is off (step S29: No), it proceeds to step S20.

Figure 159 is a flowchart showing another example of the setting confirmation process (the setting confirmation process in step S807). The differences from Figure 156 will be explained. The main control MPU 1311 determines whether the setting display conditions are met (step S8062) without performing the processing of step S8061. If the main control MPU 1311 determines that the setting display conditions are met (step S8062: Yes), it outputs a security signal (step S8063) and displays the setting value (step S8064). If the main control MPU 1311 determines that the setting display conditions are not met (step S8062: No), it executes the processing of step S8062 again.

Following the processing of step S8064, the main control MPU 1311 determines whether the setting key 971 has been operated and its output is off (step S8071). If the main control MPU 1311 determines that the output of the setting key 971 is on (step S8071: No), it executes the determination of step S8071 again, for example after a predetermined time has elapsed. If the main control MPU 1311 determines that the output of the setting key 971 is off (step S8071: Yes), it makes the setting value invisible (step S8075) and ends the setting confirmation processing. In other words, the state transitions to the setting confirmation state when the power is turned on with the setting key 971 turned on without pressing the RAM clear button.

If the power supply of the pachinko machine 1 is turned off while the special symbol is changing, the number of reserved memories managed by the main control board 1310 and the remaining change time for the special symbol are stored as is. After that, if the setting confirmation process is performed the next time the power is turned on (when the power is turned on with the setting key 971 in the on state), the special symbol change will resume after the setting confirmation process is completed (after the setting key 971 is returned to its initial position without turning the power off). At this time, for example, any effects that were being executed in conjunction with the special symbol change (effects using a display device, effects using lamps, sound effects using speakers, effects using movable objects, etc.) will not be performed at all after the special symbol change resumes.

In addition, if the power supply of the pachinko machine 1 is turned off during the special symbol variation and a setting confirmation process is performed the next time the power is turned on, the performance that was being performed along with the special symbol variation may be resumed when the special symbol variation is resumed after the setting confirmation process is completed. For example, a performance that was interrupted using a display device, lamp, and speaker may be resumed. In addition, for a performance that uses a movable body, for example, after the special symbol variation is resumed or after the movable body is returned to its initial position when the power is turned on, if the performance pattern specifies that the movable body is to be operated, the movable body is operated according to the performance pattern.

In other words, if the setting confirmation state is entered when the movable body is not in the initial position, it is returned to the initial position once when the power is turned on or when the setting confirmation process is completed, and then the movable body may be operated (moved) if the performance determined based on the variation pattern of the special pattern variation includes a performance in which the movable body is operated (moved). Note that, if the setting confirmation state is entered when the movable body is operating (moving), the operation pattern of that operation (movement) may not be executed, or the movable body may be operated if the pattern allows it to operate even after it is returned to the initial position.

In addition, if the power supply of the pachinko machine 1 is turned off during the special symbol variation and a setting confirmation process is performed the next time the power supply is turned on, when the special symbol variation resumes after the setting confirmation process is completed, among the effects that were being performed along with the special symbol variation, the effects using the display device, the effects using the lamps, and the sound effects using the speaker are resumed, and after the special symbol variation resumes or when the power supply is turned on, the movable body is returned to its initial position, and it is not necessary to perform effects using the movable body.

In addition, if the power supply of the pachinko machine 1 is turned off during the special symbol variation and the setting confirmation process is performed the next time the power supply is turned on, the variation of the decorative symbol displayed on the main liquid crystal display device 1600 may be resumed (the performance originally planned to be resumed) when the special symbol variation is resumed after the setting confirmation process is completed, or the decorative symbol may be made transparent and undergo high-speed variation until the symbol is determined (or until the swing change immediately before the symbol is determined), or the decorative symbol may be made invisible until the symbol is determined (or until the swing change immediately before the symbol is determined). In addition, when the symbol is determined, for example, the combination of decorative symbols that was planned before the power supply was turned off may be displayed on the main liquid crystal display device 1600. In addition, in this case, when the special symbol variation is completed after the resumption, a combination of predetermined decorative symbols, a combination of decorative symbols displayed when the power supply is initially turned on, or a special combination of decorative symbols that is not displayed during normal special symbol variation (for example, "XXX") may be displayed on the main liquid crystal display device 1600.

If the power to the pachinko machine 1 is turned off while the special symbol is changing, a setting confirmation process will be performed the next time the power is turned on, and when the setting confirmation process is completed and the normal state is restored, the same initial operation (e.g., an operation to check a predetermined operation of the movable body, a predetermined light emission of the LED, etc.) as when the power is turned on with the setting key 971 in the off state (i.e., when the power is turned on normally) may be performed (the above-mentioned performance, etc. may be resumed after this initial operation is performed).

In addition, if the power supply of the pachinko machine 1 is turned off while a look-ahead performance is being performed during a special symbol variation, and a setting confirmation process is performed the next time the power supply is turned on, for example, when the special symbol variation is resumed after the setting confirmation process is completed, the look-ahead performance and the look-ahead performance for the special symbol variation that was on hold just before the power supply was turned off are not executed (specifically, for example, the display during the waiting of a special zone that was displayed during the special symbol variation that was performed before the power supply was turned off (for example, a special stage that shows the player that the expectation of a big win is high across multiple variations, a zone that develops from a rival horse performance described later to a horse racing performance (a horse racing performance is a special zone that is set to have a high expectation level (for example, a relatively higher expectation than a dialogue performance described later)))) that was displayed, or the display performance during the special zone is erased, or, if the mode of the reserved display is, for example, blue instead of the normal white, it is returned to the normal white). However, a look-ahead performance may be executed for the special symbol variation that corresponds to a winning prize after the setting confirmation process is completed.

In addition, if the power supply of the pachinko machine 1 is turned off while a look-ahead performance is being performed during a special symbol change, and a setting confirmation process is performed the next time the power supply is turned on, for example, when the special symbol change is resumed after the setting confirmation process is completed, the look-ahead performance during the special symbol change is stopped (specifically, for example, the display of the special zone waiting that was displayed during the special symbol change that was being performed before the power supply was turned off, and the display performance during the special zone are erased, and if the mode of the reserved display was, for example, blue instead of the normal white, it is returned to the normal white), but the look-ahead performance may be resumed from the next special symbol change (the erased display may be restored, or if the performance pattern at the start of the change was one that promoted the look-ahead performance, it may be returned to the display mode after promotion). In this case, the look-ahead performance executed from the next special symbol change is resumed, for example, as if the look-ahead performance during the special symbol change was not stopped. In other words, the look-ahead performance that was scheduled to be executed after the next special symbol change before the power supply of the pachinko machine 1 was turned off is executed. Also, a new look-ahead performance pattern may be set, and the new look-ahead pattern may be executed from the next special symbol change.

[12-14. Another example of setting suggestion]
An example of a process for restricting the execution of the setting suggestion effect will be described below. In the following description, the jackpot probabilities of settings 1 to 6 during normal play are 1/240, 1/230, 1/220, 1/210, 1/200, and 1/190, respectively, and the jackpot probabilities of settings 1 to 6 during special probability are 1/48, 1/46, 1/44, 1/42, 1/40, and 1/38, respectively. Also, the special probability rate when a jackpot is won is assumed to be 50%.

[12-14-1. Fluctuation pattern table]
Fig. 160 is another example of a variation pattern table. The variation pattern table is stored, for example, in the ROM 1313 of the main control board 1310. In the explanation of Fig. 142 and the like, an example was explained in which a variation pattern table exists for each winning or losing type of the special lottery result, but in the example of Fig. 160, a variation pattern for each winning or losing type of the special lottery result is defined in one variation pattern table. Also, in the example of Fig. 160, a common variation pattern table is used in all settings.

The fluctuation pattern table in FIG. 160 shows the correspondence between the winning/losing type of the special lottery result, the identifier of the fluctuation pattern, an overview of the presentation of the fluctuation pattern, and the selection rate. As described above, in the example of FIG. 160, information on the fluctuation pattern of each special lottery result is stored in one fluctuation pattern table. Therefore, the main control MPU 1311 selects the fluctuation pattern corresponding to the winning/losing type corresponding to the winning prize according to the selection rate indicated by the fluctuation pattern table. Note that the fluctuation time of each fluctuation pattern may be defined in the fluctuation pattern table, as in the example of FIG. 144.

The movie reach described in the summary section is a reach effect that is selected with a high probability when the result of the special lottery is a jackpot, and is selected with an extremely low probability when the result of the special lottery is a miss. In other words, the probability of a jackpot occurring when a movie reach is executed is high. Furthermore, when a movie reach occurs, a specified movie is displayed on the main LCD display device 1600.

In addition, the "+1 symbol" in the summary column when the winning/losing type is "miss" indicates that after the decorative symbol stops in a reach state, the decorative symbol that has been fluctuating to the end passes one of the decorative symbols in the reach state and stops. Specifically, for example, after the reach state is reached with the decorative symbol "7", the decorative symbol that has been fluctuating to the end stops at "8". In the case of a "jackpot" type, the "+1 symbol" indicates that after the decorative symbol stops in a reach state, the decorative symbol that has been fluctuating to the end passes one of the decorative symbols in the reach state and appears to stop once, and then the decorative symbol stops as the same symbol as the decorative symbol in the reach state. Specifically, for example, after the reach state is reached with the decorative symbol "7", the decorative symbol that has been fluctuating to the end appears to stop at "8", and then the decorative symbol stops at "7", announcing a jackpot.

In the summary column in the example of FIG. 161, the "+1 symbol" is selected only when the winning/losing type is "jackpot (non-probable win)", but it may be selected only when it is "jackpot (probable win)", or it may be selected when it is "jackpot (non-probable win)" and "jackpot (probable win)". Also, the "+1 symbol" may be selected only when the winning/losing type is "miss".

In addition, "+pseudo 1" and "+pseudo 2" in the summary column indicate that a pseudo consecutive performance of two consecutive times and a pseudo consecutive performance of three consecutive times are executed, respectively. A pseudo consecutive performance is a performance in which the operation of changing the decorative pattern and ending the change of the decorative pattern is executed multiple times during one change of the first special pattern display device or the second special pattern display device. "Ending the change of the decorative pattern" means, for example, a mode in which a part or all of the decorative pattern is stopped and displayed, a mode in which the player recognizes that the change of the decorative pattern has once ended, and a mode in which a pseudo consecutive pattern (a pattern that confirms a pseudo consecutive pattern when this pattern stops) stops on a part of the decorative pattern. Note that a pseudo consecutive performance in which the operation is executed N times (N is a natural number of 1 or more) is called an N-consecutive pseudo consecutive performance, and the M-th change of the decorative pattern (M is a natural number of 1 or more and N or less) in an N-consecutive pseudo consecutive performance is called an M-th pseudo consecutive performance. In addition, a presentation that suggests to the player that the action may be executed again during one fluctuation of the first special symbol display or the second special symbol display, but does not actually execute the action again, is called a "pseudo false presentation." In addition, hereinafter, the pseudo consecutive presentation is also simply called a "pseudo consecutive presentation."

When the pseudo consecutive performance occurs or continues, that is, when it is determined that the operation of changing the decorative pattern and terminating the change of the decorative pattern is to be executed again during one change of the first special pattern display or the second special pattern display, the peripheral control MPU may stop the pseudo consecutive pattern on at least one of the left decorative pattern, the middle decorative pattern, and the right decorative pattern. In the following example, the peripheral control MPU stops a character such as "Continue!" on the middle decorative pattern as a pseudo consecutive pattern. Note that, for example, a combination of specific decorative patterns (for example, all of the left decorative pattern, the middle decorative pattern, and the right decorative pattern are odd or even numbers and no reach occurs) may be the pseudo consecutive pattern. Note that the pseudo false performance may be executed, for example, when the summary of the performance is "normal change" or the like. Also, for example, even if the change pattern is one in which "+ pseudo 1" is executed, a pseudo false performance that suggests the occurrence of a third pseudo consecutive in "+ pseudo 2" may be executed.

[12-14-2. Final reserved color table]
FIG. 161 is an example of a final reserved color table. The final reserved color table is stored in, for example, the peripheral main control ROM. The final reserved color table holds, for example, the selection rate of the display color of the reserved display at the end of the corresponding fluctuation pattern (hereinafter also referred to as the final reserved color) for each fluctuation pattern (the winning or losing type of the special lottery result, the identifier of the fluctuation pattern, and the outline of the performance of the corresponding fluctuation pattern).

The main LCD display device 1600 includes a pending display area that shows the number of first special random numbers and second special random numbers that are on hold. In the start-hole winning processing of step S116 in FIG. 142, a pending number designation command that specifies the pending number of first special random numbers and second special random numbers is sent to the peripheral control board 1510. The peripheral control MPU displays the pending number indicated by the pending number designation command in the pending display area.

Specifically, when a game ball enters the first start hole 2002 or the second start hole 2004 (the start condition is met), the number of reserved balls (number of reserved balls stored) specified by the reserved number designation command increases, and one reserved display is added and displayed in the reserved display area. On the other hand, when the display of changing decorative patterns (changing special pattern display) based on the reserved display begins (the start condition is met), the number of reserved balls (number of reserved balls stored) specified by the reserved number designation command decreases, and the reserved display in the reserved display area is erased.

Note that the reserved display may have multiple display modes. For example, the multiple display modes include a reserved display mode in multiple colors (white, blue, green, red, rainbow). Hereinafter, the colors of the reserved display will be white, blue, green, red, rainbow, in that order, and the likelihood of a jackpot for the special lottery result corresponding to the reserved display will increase. In particular, in the example of Figure 161, the rainbow-colored reserved display will be selected only if the special lottery result is a jackpot.

In other words, the peripheral control MPU selects the final reserved color corresponding to the selected variation pattern according to the selection rate indicated by the final reserved color table. In addition, the peripheral control MPU can execute a reserved preview performance that suggests the likelihood of a jackpot for the decorative pattern variation display (special pattern variation display) corresponding to the reserved display, for example, by changing the display mode of the reserved display during the display period from when the reserved display is displayed in the reserved display area until the reserved display is erased.

In addition, in this embodiment, during the display period of the hold display, it is possible to execute a hold change effect that suggests that the display mode of the hold display may change. Note that the hold change effect and hold notice effect during the display period of the hold display and before the start of the change corresponding to the hold are also called hold pre-reading effects.

For example, the peripheral control ROM holds a hold notification table (not shown) that defines the timing of changes in the display mode of the hold display. Specifically, for example, the hold notification table defines the timing of changes in the display mode of the hold display and the display mode (display color) of the hold display at the time of winning and at each change timing for each final hold color. The start, during, and end of the special pattern change after the win and before the special pattern change corresponding to the win are examples of such change timing.

It is preferable that the display mode of the reserved display at each change timing is a reserved color with a jackpot expectancy equal to or lower than the jackpot expectancy of the final reserved color. It is also preferable that the jackpot expectancy indicated by the reserved display at each change timing is not downgraded (for example, it is preferable that a blue reserved display does not change to a white reserved display). It is also possible that there is a different reserved notification table for each reserved memory number at the time of winning.

For example, the start of a special pattern change that was reserved before the reserved display is an example of the timing for changing the display mode of the reserved display described above. Also, for example, a timing for changing the display mode of the reserved display may be provided even during the special pattern change that corresponds to the reserved display.

The pre-reading effects, including the reserved pre-reading effects, are executed based on the pre-determination command sent from the main control MPU 1311 to the peripheral control board 1510 in the pre-determination process performed in the processing at the time of winning the starting hole in step S116 of FIG. 142.

The following describes the pre-determination process in the start-hole winning process for the first special symbol. Note that the pre-determination process in the start-hole winning process for the second special symbol is similar, so only the first special symbol will be described here. In the pre-determination process, the main control MPU 1311 compares a pre-determination table (not shown) with the special random number, pattern random number, reach random number, and variable random number to determine whether or not a jackpot will be reached, and if so, the type of jackpot, and if not, whether or not a jackpot will be reached as a game presentation executed on the main LCD display device 1600, and the type of game presentation to be executed.

Then, a pre-determination command is set according to the specified pre-determination information (whether or not a jackpot will be reached, and if so, the type of jackpot; if not, whether a reach effect will be executed as a game effect executed by the main LCD display device 1600, and the type of game effect to be executed, etc.), the type of special random number obtained (first special random number), and the reserved memory number stored corresponding to the obtained special random number (the value of the reserved number counter). For example, in the effect pre-determination process for the first special symbol, a first special symbol pre-determination command is set according to the specified pre-determination information, the fact that the first special random number has been obtained, and the first reserved memory number.

Then, by transmitting a pre-determination command from the main control board 1310 to the peripheral control board 1510, the peripheral control IC 1510a mounted on the peripheral control board 1510 can grasp pre-determination information such as the number of reserved memories stored corresponding to the start port where the start winning occurred, whether the display result of the variable display of the special pattern based on the start winning that occurred will be a jackpot, the type of jackpot if it is a jackpot, whether a reach effect will be executed as a game effect executed by the main LCD display device 1600 if it is not a jackpot, and the type of game effect to be executed before the variable display corresponding to the start winning begins.

Figure 162 is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 1 when the fluctuation pattern is determined by the fluctuation pattern table of Figure 160 and the final reserved color is determined by the final reserved color table of Figure 161. Figure 163 is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 3 in a similar case. Figure 164 is an example of a table showing the appearance rate of each final reserved color for each fluctuation pattern of setting 5 in a similar case. According to Figures 162 to 164, the higher the setting, the higher the appearance rate of the display mode of the reserved display with a higher jackpot expectation. Also, the higher the setting, the higher the jackpot expectation of each color. Note that these appearance rates and expectations are calculated based on the jackpot probability of each setting described above, and it is assumed that the final reserved color table of Figure 161 is used for all settings.

The peripheral control ROM may hold a different final reservation color table for each setting. In this case, for example, for the same reservation display display mode, the selection rate of the final reservation color table is set so that the higher the setting, the higher the chance of winning. As a result, for example, if a jackpot is won in a special pattern change corresponding to a red reservation display, the chance of winning an even higher setting also increases, giving the player a sense of elation.

Also, for example, in the display mode of the reserve display other than white, which is the most frequently selected, the selection rate of the final reserve color in the final reserve color table may be set so that for the same reserve display mode, the lower the setting, the higher the jackpot expectation (specifically, for example, the jackpot expectation when the reserve display mode is red is set to 50% for setting 1, which is a low setting, and 30% for setting 6, which is a high setting). This makes it possible to suppress disappointment among players and encourage them to continue playing, even if they do not win a jackpot in the special pattern change corresponding to a red reserve display, as the expectation for a high setting is higher.

Also, for example, in the display mode of the reserve display other than white, which is the most frequently selected, the selection rate of the final reserve color in the final reserve color table may be set so that the expectation of a jackpot is approximately the same for all settings for the same reserve display mode. This makes it difficult to infer the setting from the combination of the final reserve color and the special lottery result, for example, and allows the player to concentrate only on the expectation for the special lottery result from the display mode of the reserve display. Also, for example, it is possible to prevent a situation in which the possibility of a low setting increases when a jackpot is not won in the special pattern variation corresponding to the red display mode.

[12-14-3. Preview table]
FIG. 165 is an example of a preview performance table. The preview performance table is stored in, for example, a peripheral control ROM. The preview performance table holds, for example, the selection rate of the preview performance for each variation pattern (specified by the winning or losing type of the special lottery result, the identifier of the variation pattern, and the summary of the performance of the variation pattern).

In the example of FIG. 165, the preview effects include a dialogue effect, a weather change effect, and a rival horse effect. A dialogue effect is, for example, an effect in which a specified character is displayed on the main LCD display device 1600 during the change and speaks a line. A weather change effect is, for example, an effect in which the weather changes in the background of the decorative pattern displayed on the main LCD display device 1600 during the change. A rival horse effect is an effect in which a rival horse of the horse raised by the main character appears on the main LCD display device 1600 during the change.

It is possible to execute a setting suggestion effect using a preview effect, and the preview effect table stores the selection rate of each preview effect depending on whether or not the setting suggestion effect is executed. In the example of Figure 165, "no set" indicates that the setting suggestion effect will not be executed, and "set" indicates that the setting suggestion effect will be executed. The peripheral control MPU decides which preview effect to execute based on the fluctuation pattern and the selection rate of the preview effect table.

In addition, it is desirable that the selection rate of no setting suggestion effects is sufficiently higher than the selection rate of settings with suggestion effects in each preview effect in each variation pattern of the preview effect table. If the selection rate of settings with suggestion effects is high, setting suggestion effects occur frequently. In this state, if the frequency of occurrence of setting suggestion effects suggesting a high setting is low, there is a high possibility that players will stop playing after a short time. In other words, the operating rate of pachinko machines 1 with low settings will drop significantly, which may impose an excessive burden on the hall. Conversely, for example, if the frequency of occurrence of setting suggestion effects suggesting a high setting is high, the number of players who assume that other pachinko machines 1 in the hall are set low will increase, which may decrease the operating rate of those other pachinko machines 1 and impose an excessive burden on the hall.

The selection rate of the variation pattern in the variation pattern table is determined so that the greater the number of pseudo consecutive hits, the higher the chance of winning. However, the selection rate of whether or not to execute the setting suggestion effect in the advance notice effect table is determined so that the appearance rate of the setting suggestion effect does not change substantially depending on the number of pseudo consecutive hits. In other words, for example, the selection rate of whether or not to execute the pseudo setting suggestion effect is determined so that the appearance rate of the setting suggestion effect is approximately the same for variation patterns with an overview of "SP reach", "SP reach + pseudo 1", and "SP reach + pseudo 2". As a result, although the expectation of winning is low for a variation pattern with a small number of pseudo consecutive hits, the occurrence rate of the setting suggestion effect is not low compared to a variation pattern with a large number of pseudo consecutive hits, so players can be interested in the variation of a variation pattern with a small number of pseudo consecutive hits.

The selection rate of whether to execute the setting suggestion effect in the preview effect table may be determined so that the appearance rate of the setting suggestion effect increases as the number of pseudo consecutive hits increases, or the selection rate of whether to execute the setting suggestion effect in the preview effect table may be determined so that the appearance rate of the setting suggestion effect increases as the number of pseudo consecutive hits decreases. Note that, since the above-mentioned problem may occur if the appearance rate of the setting suggestion effect is increased as the number of pseudo consecutive hits decreases, it is preferable to set the numerical value to be approximately the same even if the appearance rate of the setting suggestion effect is increased as the number of pseudo consecutive hits decreases (specifically, for example, the setting of the dialogue effect with set when the variation pattern 5 is selected at the time of a miss is set to 15/256, and the setting of the dialogue effect with set when the variation pattern 6 is selected is set to 16/256).

The selection rate for whether or not to execute a setting suggestion effect in the preview effect table may be determined so that the appearance rate of a setting suggestion effect is higher for a fluctuation pattern with a higher expectation of a jackpot (or for an effect that is not a fluctuation pattern with a higher expectation of a jackpot but has a relatively higher expectation of the effect that appears (for example, an effect with a jackpot expectation rate of a predetermined value or higher)). Specifically, the selection rate for whether or not to execute a setting suggestion effect in the preview effect table may be determined so that the appearance rate of a setting suggestion effect is higher in the following order: "normal fluctuation," "fluctuation including normal reach," "fluctuation including SP reach," and "fluctuation including movie reach."

In the example of FIG. 165, there is a possibility that a setting suggestion effect will occur in all preview effects (dialogue effects, weather change effects, and rival horse effects), but for example, there may be preview effects in which no setting suggestion effect will occur.

In addition, if the outline of the fluctuation pattern is the same, the selection rate for whether or not to execute the setting suggestion effect in the preview effect table may be determined so that the appearance rate of the setting suggestion effect is higher when the special lottery result is a jackpot without a probability change than when the special lottery result is a jackpot with a probability change. This increases the appearance rate of the setting suggestion effect when a jackpot without a probability change is won, reducing the player's disappointment at not being granted a probability change. In the above example, three types of preview effects were described: dialogue effects, weather change effects, and rival horse effects, but it goes without saying that they are not limited to three types.

[12-14-4. Dialogue Direction］
The following is a detailed description of the dialogue effect among the preview effects. When the peripheral control MPU selects a dialogue effect without a setting suggestion effect as the preview effect, for example, after a predetermined time has elapsed (for example, 2 seconds) from the start of the change, After that, character A appears on the main liquid crystal display device 1600 and displays the line of character A saying, "What day is it today?". Then, the peripheral control MPU, for example, After a certain time (for example, 3 seconds), character B appears on the main liquid crystal display device 1600, and the lines of character B are displayed as "Now...". For example, the lines of character A and character B are as follows: It may also indicate the expected probability of a jackpot in the corresponding fluctuation.

On the other hand, when the peripheral control MPU selects a dialogue performance with a setting suggestion performance as the preview performance, it selects character B's dialogue (a dialogue that suggests the setting) from the dialogue performance table described later. For example, the peripheral control MPU makes character A appear on the main liquid crystal display device 1600 a predetermined time after the start of the fluctuation (e.g., 2 seconds later, i.e., the same timing as when character A appears when the setting suggestion performance described above is not performed), and displays character A's dialogue, "What day is it today?". For example, the peripheral control MPU makes character B appear on the main liquid crystal display device 1600 a predetermined time after the display of character A's dialogue (e.g., 3 seconds later), and displays the selected dialogue of character B. Note that character A's dialogue may be a dialogue that directly expresses a setting value, such as, "Do you know what the setting of this machine is today?".

Figure 166 is an example of a dialogue performance table. The dialogue performance table is stored, for example, in a peripheral control ROM. The dialogue performance table holds the type of dialogue performance and the selection rate of the content of Character B's dialogue for each setting. Note that the performance types include a "pattern that is the same until halfway through" and a "pattern that suddenly branches off", and for each of these two patterns, there are "maybe" type dialogues and "definite" type dialogues.

Lines belonging to a "pattern that is the same until partway through" contain the same lines until partway through, and then branch off to different lines. In the example in Figure 166, lines belonging to a "pattern that is the same until partway through" all start with "Now...", and then branch off to different lines. On the other hand, lines belonging to a "pattern that branches off suddenly" branch off to different lines from the beginning. Note that it is desirable for the selection rate of lines belonging to a "pattern that is the same until partway through" to be higher than the selection rate of lines belonging to a "pattern that branches off suddenly". This is to build up a sense of anticipation.

Lines that belong to the "Maybe" category are lines that hint at the current setting but do not definitively announce the setting. For example, "But I think it was an even day..." is a "Maybe" category line that hints at an even setting. Because "But I think it was an even day..." is a "Maybe" category line, the selection rate is determined so that it can also appear in an odd setting. However, the selection rate of the line in an odd setting is sufficiently lower than the selection rate of the line in an even setting. Similarly, for other "Maybe" category lines, the selection rate of the line in the setting it hints at is sufficiently higher than the selection rate of the line in other settings.

On the other hand, lines that belong to the "definite" category are lines that definitively announce the setting. For example, "Ah! I remember! It's an even day!" is a "definite" line that definitively announces the even number setting. Therefore, the selection rate of this line in the odd number setting is 0, and the selection rate exceeds 0 only in the even number setting.

It is desirable that the selection rate of lines belonging to the "possible" category is higher than the selection rate of lines belonging to the "definite" category. If the selection rate of lines belonging to the "definite" category were high, there would be a good possibility that the player would be notified of a high setting definitively within a short time after starting play. In this case, there would be a certain number of players who would assume that the settings of the other pachinko machines 1 in the hall are not good, which could reduce the operation of the other gaming machines.

In addition, in dialogue effects when executing specific reach effects such as SP reach and movie reach, or dialogue effects when performing pseudo consecutive hits, the dialogue suggesting the setting of character B may be displayed in red text (dialogue for normal effects such as jackpot expectation suggestion effects is in white text). This makes it easier for players to distinguish between the dialogue for expectation suggestion effects and the dialogue for setting suggestion effects, allowing the two types of effects (setting suggestion effects and expectation suggestion effects) to coexist without making the player feel unnatural. Expectation suggestion effects are effects that indicate that the jackpot expectation rate in the special pattern fluctuation is a predetermined value, and specifically include advance notice effects that suggest the expectation of a jackpot within one fluctuation, and look-ahead effects that suggest the expectation of a jackpot across multiple fluctuations.

The peripheral control MPU may determine the setting suggestion effects for the weather change effects and rival horse effects using a lottery table similar to the dialogue effect table, although this is not shown in the figures. For example, in a setting suggestion effect for a weather change effect, a thundercloud is displayed on the main LCD display device 1600, and numbers such as "246?" are displayed by lightning (a "maybe" type effect suggesting an even number setting), and in a setting suggestion effect for a rival horse effect, a horse race between the main character's horse and a rival horse is displayed on the main LCD display device 1600, and a number such as "135?" is displayed on the bib of the rival horse (a "maybe" type effect suggesting an odd number setting).

In the above example, "What day is it today?" is displayed as the line of character A in the dialogue performance, but in addition to this line, multiple variations can be provided for one performance (e.g., dialogue performance), such as character A saying "How many points did you get on the test last week?" and character B saying "66 points! (Definite type, which confirms setting 6)" or "I think it was 55 points... (Maybe type, which suggests setting 5)." In that case, it is better to make the credibility of the setting suggestion higher in performance B (e.g., a performance asking about the test score) than in performance A (e.g., a performance asking about the date). Specifically, for example, when "I think it was a day with a 6 on it... (Maybe type)" is said in performance A, the expectation of setting 6 is only 30%, but when "I think it was 66 points... (Maybe type)" is said in performance B, the expectation of setting 6 is 50%.

[12-14-5. Another example of a preview table]
FIG. 167 is another example of a preview performance table. In the example of FIG. 167, the preview performance table 173 holds the selection rate of the preview performance for each variation pattern. Unlike the example of FIG. 165, the preview performance table of FIG. 167 does not hold information on whether or not the setting suggestion performance is executed. In other words, the peripheral control MPU selects only the type of preview performance according to the selection rate corresponding to the variation pattern of the preview performance table of FIG. 167.

The peripheral control MPU then decides whether or not to execute a setting suggestion effect based on the fluctuation pattern and the type of preview effect selected. Figure 168 (A) is an example of a setting suggestion effect table showing whether or not to execute a setting suggestion effect when the outline of the fluctuation pattern is "normal fluctuation" and "dialogue effect" is selected as the preview effect. Figure 168 (B) is an example of a setting suggestion effect table showing whether or not to execute a setting suggestion effect when the outline of the fluctuation pattern is "normal reach + 1 pattern" and "dialogue effect" is selected as the preview effect. Setting suggestion effect tables for all combinations of fluctuation patterns and preview effects like those in Figure 168 are stored in advance in the peripheral control ROM.

In the above example, the peripheral control MPU determines the content of the preview performance and then determines whether or not to execute the setting suggestion performance, but the content of the preview performance may be determined after determining whether or not to execute the setting suggestion performance. By using such a method, although the amount of data will be greater than in a table such as that shown in FIG. 165, it is possible to set the occurrence rate and reliability of the performance in detail. Also, the table shown in FIG. 165 may be combined with the processing shown in this other example.

[12-14-6. Specific examples of setting suggestions]
Fig. 169 is an explanatory diagram showing an example of the outline of the setting suggestion effect. The effect proceeding in the order of Fig. 169(A), (B), and (C) is an outline of the setting suggestion effect when "It's a day with a 4, 5, or 6!" is selected as the line of character B in the line effect.

In FIG. 169(A), the special symbol variation begins. In FIG. 169(B), after the special symbol variation begins, the main LCD display 1600 displays character B's line, "It's a day with a 4, 5, or 6!" In FIG. 169(C), the line is displayed on the main LCD display 1600 until the special symbol variation ends.

The presentation, which progresses in the order of Fig. 169(A), (D), and (E), is an overview of the setting suggestion presentation when "It's a day with a 6!" is selected as the line for character B in the line presentation. In the presentation, which progresses in the order of Fig. 169(A), (D), and (E), the setting suggestion presentation starts at the start of the special pattern variation, while the setting suggested in the setting suggestion presentation is changed while the special pattern variation is ending. Specifically, in Fig. 169(D), after the special pattern variation begins, character B's line "It's a day with a 4, 5, or 6!" is displayed on the main LCD display device 1600. In Fig. 169(E), at the end of the special pattern variation, character B's line "It's a day with a 6!" is displayed. In other words, the setting suggested by character B's line is upgraded.

Specifically, for example, for each line in the line performance table (the line that is finally displayed), one or more scenarios indicating the timing of the line change and the line at each timing, and the selection rate of each scenario may be defined for each setting. The peripheral control MPU displays the line at the timing of the line change according to the selected scenario.

In this case, it is preferable that the dialogue production table does not hold scenarios that may result in a downgrade of the suggested setting. Specifically, for example, it is preferable that the dialogue production table does not hold a scenario in which the line "It's a day that ends in 4, 5, or 6!" is followed by the line "It's an even-numbered day!".

In the example of FIG. 169, only the setting suggestion effect is performed during the special pattern change, but other effects (such as an effect suggesting the likelihood of a jackpot) may be performed in parallel. Although an example has been shown in which character B's lines are promoted at the end of the special pattern change, this is not limiting, and the lines may be promoted before the end of the special pattern change. Note that character A appears before character B's lines and an effect is performed in which character A talks to character B, but this is omitted from the drawing.

Figure 170 is an explanatory diagram showing an example of the outline of a setting suggestion effect as a pre-reading effect. In Figure 170 (A), during the special pattern change without a pending special pattern change, game ball B enters the first start hole 2002. Next, in Figure 170 (B), immediately after game ball B enters the first start hole 2002, the main liquid crystal display device 1600 displays character B's line, "It's a day with a 4, 5, or 6!" In this case, since the remaining time of the special pattern that has already changed is indefinite, character B may be displayed immediately without displaying character A, character B may be displayed after a predetermined time has passed since the winning, or character A may be displayed first and then character B. Also, in Figure 170 (B), the number of reserved symbols displayed in the reserved display area is increased by one.

Next, in Figure 170 (C), all decorative symbols stop and the special symbol variation ends. Additionally, character B's lines "It's a day with a 4, 5, or 6!" remain displayed on the main LCD display 1600. Next, in Figure 170 (D), the special symbol variation corresponding to the winning combination begins. Additionally, at the same time as the special symbol variation begins, character B's lines displayed on the main LCD display 1600 change to "It's a day with a 5 or 6!". In other words, the setting indicated by character B's lines has been upgraded.

Next, in FIG. 170(E), all decorative symbols stop and the special symbol variation corresponding to the winning prize ends. When the special symbol variation corresponding to the winning prize ends, the words of character B displayed on the main LCD display 1600 change to "It's a day with a 6 in it!" In other words, the setting indicated by character B's words has been upgraded.

For example, the peripheral control ROM holds a dialogue pre-reading performance table (not shown) that defines the dialogue of character B and the timing of the change in the dialogue. Specifically, for example, the dialogue pre-reading performance table defines the timing of the change in the dialogue of character B and the dialogue of character B at the time of winning and at each change timing. The start, during, and end of the special pattern change after the time of winning and before the special pattern change corresponding to the winning are examples of the change timing. It is desirable that the setting suggested by the dialogue at each change timing is not demoted. There may be a different dialogue pre-reading performance table for each reserved memory number at the time of winning. When the peripheral control MPU determines to execute the pre-reading performance based on the advance judgment command, it executes the dialogue pre-reading performance by referring to the dialogue pre-reading performance table at a predetermined ratio, for example. Also, in the case of promotion, in FIG. 170, the promotion is done one step at a time (promotion in the order of "It's a day with a 4, 5, or 6!", "It's a day with a 5 or 6!", "It's a day with a 6!"), but it may be promoted multiple steps at once. Specifically, for example, in FIG. 170, the line (E) may be displayed without displaying the line (D).

The setting suggestion effect may be executed under specific circumstances other than those described above. For example, the setting suggestion effect may be executed when the conditions for a series of reserved plays are met. A series of reserved plays means that the next jackpot is realized by a special random number that has been reserved until the end of the jackpot game. In this case, for example, after the reservation is made and before the end of the jackpot game, the setting suggestion effect may be executed. Also, for example, if a specific variation pattern occurs a predetermined number of times in succession, the setting suggestion effect may be executed at the special pattern variation for the predetermined number of times.

[12-15. Restrictions on setting suggestion effects]
The following explains the restrictions on setting suggestion effects under certain conditions.

[12-15-1. Restrictions on setting suggestion effects after special states]
First, the restriction on the setting suggestion effect after the special state will be described. In the following, the setting confirmation mode and the error occurrence are both examples of the special state. The setting confirmation mode is a mode for displaying the setting value that is started when it is determined that the setting display condition is satisfied in the setting confirmation process (step S8062: Yes).

Figure 171 (A) is an example of a performance restriction table in setting confirmation mode. Figure 171 (B) is an example of a performance restriction table when an error occurs. The performance restriction table in setting confirmation mode and the performance restriction table when an error occurs are stored, for example, in the peripheral control ROM.

[12-15-1-1. Restrictions on setting suggestion effects after setting confirmation mode]
First, the setting confirmation mode effect restriction table will be described. The setting confirmation mode effect restriction table stores a restriction flag indicating whether or not to restrict the setting suggestion effect of a change that has been determined to execute a setting suggestion effect (hereinafter, referred to as a setting suggestion change in this chapter) when the setting confirmation mode is started while the change is being executed or pending.

The effect restriction table during setting confirmation mode includes record 1701 which stores a restriction flag when the setting confirmation mode starts before the start of a setting suggestion effect (i.e., when it has been determined that a setting suggestion effect will be performed but the effect related to the setting suggestion has not been executed (displayed)), and record 1702 which stores a restriction flag when the setting confirmation mode starts after the start of a setting suggestion effect during setting suggestion fluctuation (i.e., when it has been determined that a setting suggestion effect will be performed and the effect related to the setting suggestion has been executed (displayed)).

When the setting confirmation process shown in FIG. 159 is performed, game play is stopped when the setting confirmation mode is started, and when the setting confirmation process shown in FIG. 156 is performed, game play continues even during the setting confirmation mode. Therefore, the setting confirmation mode performance restriction table includes column 1703 that stores a restriction flag when game play is stopped when the setting confirmation mode is started, and column 1704 that stores a restriction flag when game play continues even during the setting confirmation mode.

In addition, if the game continues during the setting confirmation mode, there is a possibility that a new setting suggestion change will be reserved by a game ball entering the start hole during the setting confirmation mode. Therefore, column 1704 includes column 1705 that stores a restriction flag in a new setting suggestion change corresponding to a winning entry into the start hole during the setting confirmation mode. Note that each restriction flag in the setting confirmation mode performance restriction table can be set, for example, by an operation medium (which may be an operation medium that the player cannot operate or an operation medium that the player can operate) installed in the pachinko machine 1 when the pachinko machine 1 is manufactured or at the hall, etc. Note that, when a game ball enters the start hole during the setting confirmation mode, it is not necessary to obtain lottery information and draw a prize ball for that ball. However, even in such a case, the special symbol change that has already been reserved will be executed during the setting confirmation mode or after the setting change mode ends.

When play stops at the start of the setting confirmation mode, one of fields 1706 and 1707 has a value of 1 and the other has a value of 0, the values of fields 1708 to 1711 are 0, one of fields 1712 and 1713 has a value of 1 and the other has a value of 0, and the values of fields 1714 to 1717 are 0.

In addition, when gameplay progresses during the setting confirmation mode, the values of fields 1706 and 1707 are 0, one of fields 1708 and 1709 is 1 and the other is 0, one of fields 1710 and 1711 is 1 and the other is 0, the values of fields 1712 and 1713 are 0, one of fields 1714 and 1715 is 1 and the other is 0, and one of fields 1716 or 1717 is 1 and the other is 0.

The peripheral control MPU executes the setting suggestion effect restriction pattern according to the restriction flags for each state defined in the effect restriction table when the setting confirmation mode starts and the effect restriction table when an error occurs. These restriction patterns are explained below.

(1) What to do if the setting confirmation mode starts before the setting suggestion performance begins, and gameplay stops when the setting confirmation mode starts.

(1-1) After gameplay is resumed, a setting suggestion effect is executed (the value of field 1706 is 1 and the value of field 1707 is 0). By executing the setting suggestion effect, the player can be informed that the setting confirmation mode has been executed, rather than the setting change mode in which the setting change process is executed, and this gives the player peace of mind that the game results will not be affected.

(1-2) Do not execute the setting suggestion display after gameplay is resumed (the value of field 1706 is 0 and the value of field 1707 is 1). For example, if during setting confirmation mode, sounds and images indicating that the setting is being confirmed are output to the various speakers and the main LCD display device 1600, by not executing the setting suggestion display in this manner, it is possible to provide the player with a sense of anticipation that the setting may have been changed to a high setting even during setting confirmation mode.

(2) Regarding the setting suggestion effect of the setting suggestion change when the setting confirmation mode starts before the setting suggestion effect starts and gameplay continues during the setting confirmation mode.

(2-1) Execute the setting suggestion effect (the value of field 1708 is 1 and the value of field 1709 is 0). The game progresses even during the setting confirmation mode, so there is no drop in operation. When audio and images indicating that the setting confirmation mode is in progress are output to various speakers and the main liquid crystal display device 1600, these audio and images are output in priority to the audio and images in the setting suggestion effect. At this time, in order to avoid causing discomfort to the player, an image indicating that the setting confirmation mode is in progress is displayed on the main liquid crystal display device 1600 so that part or all of the setting suggestion effect is displayed. Also, in order to provide the player with a sense of expectation such as "when will the setting suggestion effect be displayed" and "maybe a setting suggestion effect suggesting a high setting will be displayed," an image indicating that the setting confirmation mode is in progress may be displayed on the main liquid crystal display device 1600 so that all of the setting suggestion effects are hidden.

(2-2) Do not execute the setting suggestion effect (the value of field 1708 is 0 and the value of field 1709 is 1). For example, if the player checks the setting value and the setting suggested by the setting suggestion effect differs from the actual setting (for example, when the setting value is 1 and an effect suggesting a high setting such as "Maybe it's a high setting?" occurs), the player may become distrustful of the gaming machine. By not executing the setting suggestion effect, such a situation can be avoided.

(2') Regarding the setting suggestion effect of a new setting suggestion change corresponding to a winning entry at the start gate during the setting confirmation mode, in cases where the setting confirmation mode starts before the setting suggestion effect starts and gameplay continues during the setting confirmation mode.

(2'-1) Execute a setting suggestion effect (the value of field 1710 is 1 and the value of field 1711 is 0). By executing the setting suggestion effect, the player can be informed that the setting confirmation mode has been executed instead of the setting change mode, and can be assured that the game result will not be affected.

(2'-2) Do not execute the setting suggestion effect (the value of field 1710 is 0 and the value of field 1711 is 1). For example, if the hall switches to setting confirmation mode because it has doubts about the setting value, there is a possibility that the setting value will be changed afterwards. If the setting suggestion effect is executed in such a case, there is a possibility that the setting suggestion effect and the actual setting will differ (for example, the setting suggestion effect may show that an even number setting has been confirmed, but after the setting has been changed to a different setting, the setting suggestion effect may show that an odd number setting has been confirmed), which could cause trouble between the hall and the player. By not executing the setting suggestion effect, it is possible to avoid such a situation from occurring.

It is preferable that the images, sounds, lights, etc., indicating that the game is in the setting confirmation state described above are displayed regardless of the values in the fields described above. It is also possible that new wins will be valid even if gameplay is stopped after the game has transitioned to the setting confirmation state, and in that case, the same processing as for progressing the game can be performed.

(3) When the setting confirmation mode starts during a setting suggestion change and after the setting suggestion effect has started (when the setting suggestion effect is being displayed, or after the setting suggestion effect has been displayed and the display of the setting suggestion effect has ended), and gameplay stops when the setting confirmation mode starts.

(3-1) Resume the setting suggestion presentation after gameplay is resumed (the value of field 1712 is 1 and the value of field 1713 is 0). If a setting suggestion presentation that has already started is canceled, the player may become suspicious and think that the settings have been changed. By resuming the setting suggestion presentation after gameplay is resumed, this occurrence can be avoided.

(3-2) Do not resume the setting suggestion display after gameplay is resumed (the value of field 1712 is 0 and the value of field 1713 is 1). For example, if during setting confirmation mode, sounds and images indicating that the setting is being confirmed are output to the various speakers and the main LCD display device 1600, by not executing the setting suggestion display in this manner, it is possible to provide the player with a sense of anticipation that the setting may have been changed to a high setting even during setting confirmation mode.

(4) Regarding the setting suggestion effects of the setting suggestion changes when the setting confirmation mode starts during the setting suggestion changes and after the setting suggestion effects have started (when the setting suggestion effects are being displayed, or after the setting suggestion effects have been displayed and the display of the setting suggestion effects has ended), and gameplay continues during the setting confirmation mode.

(4-1) The setting suggestion presentation is continued (the value of field 1714 is 1 and the value of field 1715 is 0). The game progresses even during the setting confirmation mode, so there is no drop in operation. When audio and images indicating that the setting confirmation mode is in progress are output to various speakers and the main liquid crystal display device 1600, these audio and images are output in priority to the audio and images in the setting suggestion presentation. At this time, in order to avoid causing discomfort to the player, an image indicating that the setting confirmation mode is in progress is displayed on the main liquid crystal display device 1600 so that part or all of the setting suggestion presentation is displayed (the image related to the setting suggestion presentation and the image indicating the setting confirmation mode do not overlap, or the image related to the setting suggestion presentation and the text indicating the setting confirmation mode, such as "in setting confirmation mode", do not overlap). The same processing can be used for this display, etc., even when an error occurs, which will be described later. Note that "not overlapping" here does not refer to the image data actually set in the RAM, but rather to the appearance of not overlapping from the player's perspective.

Also, to provide the player with a sense of anticipation, such as "when will the setting suggestion effect be displayed?" and "maybe a setting suggestion effect suggesting a high setting will be displayed," all setting suggestion effects may be hidden and an image indicating that the setting confirmation mode is in progress may be displayed on the main LCD display device 1600.

(4-2) Stop the setting suggestion display (the value of field 1714 is 0 and the value of field 1715 is 1). For example, if the player checks the setting value and the setting suggested by the setting suggestion display differs from the actual setting (for example, if the setting value is 1 and a display suggesting a high setting such as "Maybe it's set high?" occurs), the player may become distrustful of the gaming machine. By not executing the setting suggestion display, such a situation can be avoided.

(4') Regarding the setting suggestion presentation of a new setting suggestion change corresponding to a win at the start gate during the setting confirmation mode, when the setting confirmation mode starts during the setting suggestion change and after the setting suggestion presentation starts, and the game continues during the setting confirmation mode.

(4'-1) Execute a setting suggestion effect (the value of field 1716 is 1 and the value of field 1717 is 0). By executing the setting suggestion effect, the player can be informed that the setting confirmation mode has been executed instead of the setting change mode, and can be assured that the game result will not be affected.

(4'-2) Do not execute the setting suggestion effect (the value of field 1716 is 0 and the value of field 1717 is 1). For example, if the hall switches to setting confirmation mode because it has doubts about the setting value, there is a possibility that the setting value will be changed afterwards. If the setting suggestion effect is executed in such a case, the setting suggestion effect and the actual setting will differ (for example, the setting suggestion effect may indicate that an even number setting has been confirmed, while the setting suggestion effect after the change to a different setting indicates that an odd number setting has been confirmed), which may cause trouble between the hall and the player. By not executing the setting suggestion effect, it is possible to avoid such an occurrence.

When gameplay continues in the setting check mode and the setting check mode spans multiple variations, the peripheral control MPU, for example, determines whether or not the setting check mode is in effect when the first symbol is determined after the setting check mode is started or when the next variation begins, based on a notification from the main control MPU 1311. If the peripheral control MPU determines that the setting check mode is in effect, and if the newly entered reserved symbol is a setting suggestion variation, it performs a setting suggestion presentation along with the variation corresponding to the reserved symbol. By performing a setting suggestion presentation, the player can be informed that the setting check mode has been executed, rather than the setting change mode in which the setting change process is executed, and this provides the player with the peace of mind that the game results will not be affected.

The peripheral control MPU may also choose not to execute the setting suggestion display in this case. If the player checks the setting value and the setting suggested by the setting suggestion display differs from the actual setting (for example, when the setting value is 1 and a display suggesting a high setting such as "Maybe it's a high setting?" occurs), the player may become distrustful of the gaming machine, and by not executing the setting suggestion display, such a situation can be avoided.

In this way, the effect is achieved both when the setting suggestion effect is performed and when the setting suggestion effect is not performed, so by allowing halls and other businesses to set performance restrictions on the setting suggestion effect, it is possible to provide gaming machines that meet the needs of the halls' business style.

[12-15-1-2. Restrictions on setting suggestion effects when an error occurs]
Next, the error occurrence time performance restriction table will be described with reference to Fig. 171 (B). The error occurrence time performance restriction table stores a restriction flag indicating whether or not to restrict the setting suggestion performance of a change (hereinafter, referred to as a setting suggestion change in this chapter) that has been determined to execute a setting suggestion performance when an error occurs during execution or pending of the change.

The error occurrence effect restriction table includes record 1801 which stores a restriction flag in the case where an error occurs before the start of a setting suggestion effect, and record 1802 which stores a restriction flag in the case where an error occurs during the change in the setting suggestion and after the start of a setting suggestion effect in the setting suggestion change.

There are strong errors that are reported by stopping the game, and weak errors that are reported while the game continues. An error that detects illegal magnetism in the launched ball sensor 1020 and the game area 5a is an example of a strong error. A full tank error (an error that indicates that the tank is full of game balls stored in the foul cover unit 520 based on a detection signal from the full tank detection sensor 535) is an example of a weak error.

Therefore, the table includes a column 1803 for storing the restriction flags corresponding to errors that are notified when gameplay is stopped, and a column 1804 for storing the restriction flags corresponding to errors that are notified while gameplay is still in progress.

In addition, if the game continues even during an error, there is a possibility that a new setting suggestion change will be put on hold if a game ball enters the starting hole while an error is occurring. Therefore, column 1804 includes column 1805 that stores a restriction flag for a new setting suggestion change that corresponds to a ball entering the starting hole while an error is occurring.

The restriction flag in the error occurrence performance restriction table can be set, for example, by an operating medium (which can be an operating medium that the player can operate or cannot be operated by the player) that is installed in the pachinko machine 1 when the pachinko machine 1 is manufactured or at the parlor, etc.

In the error occurrence performance restriction table, one of fields 1806 and 1807 has a value of 1 and the other has a value of 0, one of fields 1808 and 1809 has a value of 1 and the other has a value of 0, one of fields 1810 and 1811 has a value of 1 and the other has a value of 0, one of fields 1812 and 1813 has a value of 1 and the other has a value of 0, one of fields 1814 and 1815 has a value of 1 and the other has a value of 0, and one of fields 1816 and 1817 has a value of 1 and the other has a value of 0.

The peripheral control MPU executes the restriction pattern of the setting suggestion effect according to the restriction flag for each case defined in the effect restriction table when an error occurs. These restriction patterns are explained below.

(1) Regarding the case where an error occurs before the setting suggestion effect starts and gameplay stops when the error occurs (serious error).

(1-1) After the game is resumed, a setting suggestion effect is executed (the value of field 1806 is 1 and the value of field 1807 is 0). By executing the setting suggestion effect, the player can be informed that the settings have not been changed when the error is cleared by the hall staff, and this gives the player peace of mind that the outcome of the game will not be affected.

(1-2) Do not execute the setting suggestion effect after restarting the game (the value of field 1806 is 0 and the value of field 1807 is 1). This allows players to play in a way that avoids errors, as this can lead to a disadvantageous situation for the player, in which the setting suggestion effect is not executed if an error occurs, allowing the game to proceed smoothly and reducing the burden on the hall.

(2) Regarding the setting suggestion effect of the setting suggestion fluctuation in the case where an error occurs before the setting suggestion effect starts and the game continues after the error starts occurring (weak error).

(2-1) Execute a setting suggestion effect (the value of field 1808 is 1 and the value of field 1809 is 0). This allows the game to proceed even during an error, so the operation of the gaming machine is not interrupted. In addition, since a setting suggestion effect occurs even during an error, the player's interest can be improved. When audio and images indicating that an error is occurring are output to various speakers and the main liquid crystal display device 1600, these audio and images are output in priority to the audio and images in the setting suggestion effect. At this time, in order to avoid causing discomfort to the player, an image indicating that an error is occurring is displayed on the main liquid crystal display device 1600 so that part or all of the setting suggestion effect is displayed. In addition, in order to provide the player with a sense of expectation such as "when will the setting suggestion effect be displayed" and "maybe a setting suggestion effect suggesting a high setting will be displayed," an image indicating that an error is occurring may be displayed on the main liquid crystal display device 1600 with all of the setting suggestion effects hidden.

(2-2) Do not execute the setting suggestion effect (the value of field 1808 is 0 and the value of field 1809 is 1). This allows players to play in a way that avoids errors, as if an error were to occur, the setting suggestion effect would not be executed, which would be disadvantageous to the player. This allows the game to proceed smoothly and reduces the burden on the hall.

(2') In cases where an error occurs before the start of the setting suggestion presentation and the game continues while the error is occurring (weak error), the setting suggestion presentation changes to new setting suggestions corresponding to winning at the starting hole while the error is occurring.

(2'-1) A setting suggestion effect is executed (the value of field 1810 is 1 and the value of field 1811 is 0). This allows gameplay to proceed even during an error, so the operation of the gaming machine is not interrupted. In addition, because a setting suggestion effect occurs even during an error, it is possible to increase the player's interest.

(2'-2) Do not execute the setting suggestion effect (the value of field 1810 is 0 and the value of field 1811 is 1). As a result, the setting suggestion effect is not executed for winnings during an error, so the player stops shooting the ball and can quickly clear the error.

(3) Regarding cases where an error occurs during setting suggestion fluctuation and after the setting suggestion performance has started, and gameplay stops when the error occurs (serious error).

(3-1) Resume the setting suggestion presentation after gameplay is resumed (the value of field 1812 is 1 and the value of field 1813 is 0). If a setting suggestion presentation that has already started is canceled, the player may become suspicious and think that the settings have been changed. By resuming the setting suggestion presentation after gameplay is resumed, it is possible to prevent such an occurrence.

(3-2) Do not resume the setting suggestion display after gameplay is resumed (the value of field 1812 is 0 and the value of field 1813 is 1). This allows players to play in a way that avoids errors, as if an error were to occur, the setting suggestion display would be canceled, which would be disadvantageous to the player. This allows the game to proceed smoothly and reduces the burden on the hall.

(4) Regarding the setting suggestion presentation of the setting suggestion change when an error occurs during the setting suggestion change and after the start of the setting suggestion presentation, and the game continues even while the error occurs (weak error).

(4-1) Continue the setting suggestion presentation (the value of field 1814 is 1 and the value of field 1815 is 0). This allows the game to proceed even during an error, so the operation of the gaming machine is not interrupted. In addition, since the setting suggestion presentation occurs even during an error, the player's interest can be improved. In addition, when audio and images indicating that an error is occurring are output to various speakers and the main liquid crystal display device 1600, these audio and images are output in priority to the audio and images in the setting suggestion presentation. At this time, in order to avoid causing discomfort to the player, an image indicating that an error is occurring is displayed on the main liquid crystal display device 1600 so that part or all of the setting suggestion presentation is displayed. In addition, in order to provide the player with a sense of expectation as to "when the setting suggestion presentation was displayed" and "whether the setting suggestion presentation suggesting a high setting was displayed," an image indicating that an error is occurring may be displayed on the main liquid crystal display device 1600 so that all of the setting suggestion presentation is hidden.

(4-2) Stop the setting suggestion effect (the value of field 1814 is 0 and the value of field 1815 is 1). This allows players to play in a way that avoids errors, as if an error were to occur, the setting suggestion effect would be stopped, which would be disadvantageous to the player. This allows the game to proceed smoothly and reduces the burden on the hall.

(4') Regarding the setting suggestion presentation of a new setting suggestion change corresponding to winning at the start hole during the error, in the case where an error occurs during the setting suggestion change and after the start of the setting suggestion presentation, and the game continues while the error is occurring (weak error).

(4'-1) Execute a setting suggestion display (the value of field 1816 is 1 and the value of field 1817 is 0). This allows gameplay to proceed even during an error, so the operation of the gaming machine is not interrupted. In addition, because a setting suggestion display occurs even during an error, it is possible to increase the player's interest.

(4'-2) Do not execute the setting suggestion effect (the value of field 1816 is 0 and the value of field 1817 is 1). As a result, the setting suggestion effect is not executed for winnings during an error, so the player stops shooting the ball and can quickly clear the error.

In this way, the effect is achieved both when the setting suggestion effect is performed and when the setting suggestion effect is not performed, so by allowing halls and other businesses to set performance restrictions on the setting suggestion effect, it is possible to provide gaming machines that meet the needs of the halls' business style.

[12-15-2. Restrictions on effects when winning a new prize]
The following describes the restrictions on the effects in the change corresponding to the new start winning during the special pattern change and in the state where a new change can be reserved. Figure 172 is an example of a new start winning effect restriction table. The new start winning effect restriction table is stored in, for example, a peripheral control ROM.

The new start winning performance restriction table includes, for example, a condition column, a reference processing table column, and a flag column. The conditions in the condition column are defined by assumptions about the performance of the previous change and the performance restrictions in the performance of the new start winning under that assumption. Note that the previous change in this chapter is the change immediately before the change corresponding to the new start winning. As conditions for the performance of the previous change, there are cases where only an expectation suggestion performance is performed to see if the special lottery result corresponding to the change is a jackpot, and cases where an expectation suggestion performance and a setting suggestion performance are performed.

In addition, the performance restrictions for the look-ahead performance in a new start winning include restricting only the setting suggestion performance in the look-ahead performance (i.e. not executing the setting suggestion performance), restricting both the setting suggestion performance and the expectation suggestion performance in the look-ahead performance (i.e. not executing the setting suggestion performance and the expectation suggestion performance), and not restricting either the setting suggestion performance or the expectation suggestion performance in the look-ahead performance (i.e. executing the setting suggestion performance and the look-ahead performance).

The reference processing table column stores the identifier of the processing table to be referenced when executing the pre-reading performance restriction for a new start winning that is included in the corresponding condition. The flag column stores a flag indicating which condition is executed and which processing table is used to determine the processing for the pre-reading performance for a new start winning.

A 1 is stored in the flag column corresponding to any one of processing tables 1 to 3, and a 0 is stored in the flag column corresponding to the other two of processing tables 1 to 3. A 1 is stored in the flag column corresponding to any one of processing tables 4 to 6, and a 0 is stored in the flag column corresponding to the other two of processing tables 4 to 6. The flags in the new start winning performance restriction table can be set, for example, by an operating medium (which can be an operating medium that the player cannot operate or an operating medium that the player can operate) installed in the pachinko machine 1 when the pachinko machine 1 is manufactured or at the hall, etc.

When the peripheral control MPU determines that there is a new start winning during a special pattern change and that a new change can be held, and that only the expectation suggestion effect is executed in the previous change, it executes the condition indicated by the condition column corresponding to the flag column that stores a value of 1, where the value of the "Previous change effect" column in the new start winning effect restriction table is a flag column that corresponds to "expectation suggestion only." Furthermore, the peripheral control MPU refers to the processing table that corresponds to the flag column, and determines the content of the look-ahead effect in the change that corresponds to the new start winning.

Similarly, when there is a new start winning during a special pattern change and a new change can be held, and an expectation suggestion effect and a setting suggestion effect are executed in the previous change, the peripheral control MPU refers to the processing table corresponding to the flag column in the new start winning effect restriction table, which is a flag column that stores a value of 1 and corresponds to "expectation suggestion + setting suggestion," to determine the content of the pre-reading effect in the change corresponding to the new start winning.

The following describes each condition indicated in the condition column. The first condition (the condition for selecting processing table 1) is that when only the expectation suggestion effect is executed in the previous variation, only the setting suggestion effect is restricted as a pre-reading effect restriction for the variation corresponding to the new start winning. Under the first condition, the expectation suggestion effect is executed in the previous variation, so the player feels excited due to the expectation of a big win. In this situation, if the setting suggestion effect is executed as a pre-reading effect for the variation corresponding to the new start winning, the player's attention may be directed to the setting suggestion effect, which may reduce the excitement of the previous variation effect. In addition, the player may confuse the setting suggestion effect with the expectation suggestion effect, which may lead to false joy. Therefore, by executing the first condition, it is possible to prevent the occurrence of these situations.

In addition, under the first condition, an expectation suggestion effect is performed in the previous variation, but if a setting suggestion effect is executed in this state as a pre-reading effect of the variation corresponding to the new starting winning, the player can still expect a variation corresponding to the new starting winning even if he or she expects a miss in the previous variation, providing the player with a sense of security.

For example, when selecting an effect using the advance notice effect table of FIG. 165, the peripheral control MPU determines the effect using the table, and then determines whether the flag in the condition column indicating the restriction of the setting suggestion effect is 1 (whether to restrict or not), and if it is 1 (restrict), performs a process to rewrite and display "set not set" even if "set present" is selected, thereby restricting the setting suggestion effect. In other words, the peripheral control MPU can execute the restriction of the setting suggestion effect using the advance notice effect table shown in FIG. 165 by performing a judgment process after determining the effect. In other words, since the pachinko machine 1 does not need to hold an effect table for each type of effect restriction, the amount of data can be reduced. Note that, in the same manner, for the expectation suggestion effect described later, even if the pre-reading reserve display is selected to be other than white using the final reserve color table of FIG. 161, the peripheral control MPU rewrites the selected reserve display to white when restricting the expectation suggestion effect.

The second condition (the condition under which processing table 2 is selected) is that when only the expectation suggestion effect is executed in the previous variation, both the setting suggestion effect and the expectation suggestion effect are restricted as a pre-reading effect restriction for the variation corresponding to the new starting winning. Under the second condition, the expectation suggestion effect is executed in the previous variation, so the player's sense of excitement due to the expectation of a big win is heightened. In this situation, if the setting suggestion effect and the expectation attitude suggestion effect are executed as a pre-reading effect for the variation corresponding to the new starting winning, the player's attention will be directed to these effects as well, which may reduce the sense of excitement in the previous variation effect. Therefore, by executing the second condition, it is possible to prevent these situations from occurring.

The third condition (the condition for selecting processing table 3) is that when only the expectation suggestion effect is executed in the previous variation, neither the setting suggestion effect nor the expectation suggestion effect is restricted as a pre-reading effect restriction for the variation corresponding to the new starting winning. Under the third condition, the expectation suggestion effect is executed in the previous variation, so the player's sense of excitement due to the expectation of a jackpot is heightened. In this state, the setting suggestion effect is executed as a pre-reading effect for the variation corresponding to the new starting winning, so that the player can be given a sense of excitement for the setting suggestion effect (particularly when a high setting confirmation suggestion effect or a high setting confirmation effect, etc. is executed) in addition to the excitement of the jackpot.

The fourth condition (the condition under which processing table 4 is selected) is that when an expectation suggestion effect and a setting suggestion effect are executed in the previous variation, only the setting suggestion effect is restricted as a pre-reading effect restriction for the variation corresponding to the new starting winning. Under the fourth condition, because an expectation suggestion effect and a setting suggestion effect are executed in the previous variation, the player feels a sense of excitement that he or she may win a jackpot in the previous variation, and a sense of excitement due to the setting suggestion (especially when a high setting suggestion effect or a high setting confirmation effect is executed). In such a situation, if a setting suggestion effect is executed as a pre-reading effect for the variation corresponding to the new starting winning, there is a risk that a situation will occur in which the excitement of expecting a jackpot in the pending previous variation will decrease.

Specifically, for example, if a setting suggestion effect in a previous variation confirms a setting of 4 or higher, and a setting suggestion effect as a pre-reading effect for the variation corresponding to the new starting winning confirms a setting of 5 or higher, the setting suggestion effect in the previous variation contains a lot of inaccurate information (it suggests the possibility of a setting of 4, even though the setting is actually 5 or higher). In such a case, the player may infer that not only the setting suggestion effect in the previous variation but also the expectation suggestion effect contains a lot of inaccurate information (specifically, for example, the player may infer that the probability of a jackpot being expected is not high for reserves that are displayed in red), which may reduce the excitement felt by the expectation suggestion effect. By implementing the fourth condition, it is possible to prevent such a situation from occurring.

The fifth condition (the condition for selecting the processing table 5) is that when the expectation suggestion effect and the setting suggestion effect are executed in the previous variation, both the setting suggestion effect and the expectation suggestion effect are restricted as a pre-reading effect restriction for the variation corresponding to the new start winning. Under the fifth condition, since the expectation suggestion effect and the setting suggestion effect are executed in the previous variation, if the setting suggestion effect is executed in the pre-reading effect corresponding to the new start winning, multiple setting suggestion effects will be executed in a short period of time, and there is a risk that the player will guess the setting value with high accuracy (for example, if an odd setting suggestion effect and a high setting suggestion effect are executed, there is a high possibility that the setting is 5). In such a situation, if the player judges that the setting is low, there is a risk that the player will stop playing with the pachinko machine 1, and if the setting is judged to be high, there is a risk that the operation of other pachinko machines 1 in the hall will decrease. By executing the fifth condition, it is possible to prevent such a situation from occurring.

In particular, if an expectation suggestion effect and a setting suggestion effect are performed in the previous variation, and an expectation suggestion effect and a setting suggestion effect are also performed as pre-reading effects in the variation corresponding to a new starting winning, there is a risk that many effects will occur in a short period of time, confusing the player. By implementing the fifth condition, it is possible to prevent such a situation from occurring.

The sixth condition (the condition under which processing table 6 is selected) is that when an expectation suggestion effect and a setting suggestion effect are executed in the previous variation, neither the setting suggestion effect nor the expectation suggestion effect are restricted as a pre-reading effect restriction for the variation corresponding to the new starting winning. Under the sixth condition, an expectation suggestion effect and a setting suggestion effect are executed in the previous variation, so the player estimates the expectation of the expectation suggestion effect in the setting suggested by the setting suggestion effect. In this state, by executing a setting suggestion effect and an expectation suggestion effect in the variation corresponding to the new starting winning, there is a possibility that the expectation of these two expectation suggestion effects will increase.

Specifically, for example, if a setting suggestion effect suggesting a setting of 4 or higher is executed in the previous variation, and a setting suggestion effect suggesting a setting of 5 or higher is executed as a look-ahead effect in a new starting winning, the player will assume an expectation of a setting of 4 or higher for the expectation suggestion effect in the previous variation. However, since a setting suggestion effect as a look-ahead effect in a new starting winning subsequently suggests a setting of 5 or higher, the expectation for that expectation suggestion effect will assume an expectation of a setting of 5 or higher, increasing the player's sense of excitement.

In this way, the effect is realized for each of the look-ahead performance restriction contents that correspond to a new starting winning, so by allowing halls and other businesses to set such look-ahead performance restriction contents, it is possible to provide gaming machines that meet the needs of the halls' business style.

Below, we will explain each processing table and the look-ahead effects that are executed by referring to each processing table. Each processing table is stored, for example, in the peripheral control ROM.

Figure 173 is an example of processing table 1. First, the common contents of each processing table will be explained. Each processing table stores the winning type in the special lottery result of the previous change, the processing content related to the new start winning corresponding to that winning type, and a processing number which is an identifier of that processing content.

The processing contents held in each processing table define the processing contents for look-ahead effects that are not subject to restrictions. Specifically, for example, the processing contents for expectation suggestion effects are defined in the processing contents of processing table 1, which is a table referenced when restricting only setting suggestion effects as a look-ahead effect restriction for fluctuations corresponding to a new starting winning. Similarly, the processing contents for expectation suggestion effects and setting suggestion effects are defined in the processing contents of processing table 3, which is a table referenced when restricting both expectation suggestion effects and setting suggestion effects as a look-ahead effect restriction for fluctuations corresponding to a new starting winning.

The peripheral control MPU therefore determines the look-ahead effects that are subject to restriction in a new start winning event and the processing table to reference based on the flags in the new start winning event restriction table, and then determines the processing for the look-ahead effects that are not subject to restriction based on the processing table.

Processing tables 3 and 6, which will be described later, store flags for selecting the processing content related to a new starting winning from multiple processing contents. The flags in the processing tables can be set, for example, by an operating medium (which may be an operating medium that the player cannot operate or an operating medium that the player can operate) that is installed in the pachinko machine 1 when the pachinko machine 1 is manufactured or at the parlor, etc.

Below, we will explain the processing content related to the new start winning defined by Processing Table 1. Processing Table 1 is a table that is referenced when only the expectation suggestion effect is executed in the previous change, and only the setting suggestion effect is restricted as a look-ahead effect restriction for the change corresponding to the new start winning. Below, we will describe an example in which a reserve look-ahead is performed as a look-ahead effect that gives an expectation suggestion.

The process of process number 1 is a process related to a new start winning when the winning type of the previous variation is a jackpot with time reduction. In the process of process number 1, if the pending display mode of the new start winning is a specific mode (e.g., pending display mode such as blue, green, red, etc.) with a high jackpot expectation, for example, at the start of the opening screen of the jackpot won in the previous variation, the peripheral control MPU returns the pending display mode of the new start winning to the default (the white display mode in the final pending color table of FIG. 161). However, if the pending display is no longer displayed in the pending display area at the start of the opening screen of the jackpot, the pending display of the specific mode is erased in the same way as other pending displays. In addition, the peripheral control MPU does not return the pending display mode of the new start winning to the specific display mode at the time of the transition to time reduction after the end of the jackpot (i.e., it leaves it as the default display). In addition, even if the pending new winnings have not been consumed at the end of the time-saving period, the peripheral control MPU will not return the pending display of the new starting winnings to the specific display mode (i.e., it will remain in the default display).

Processing number 2 is processing related to a new start winning when the winning type of the previous variation is a jackpot without time reduction. In processing number 2, if the pending display mode of the new start winning is a specific mode with a high jackpot expectation, for example, at the start of the opening screen of the jackpot won in the previous variation, the peripheral control MPU returns the pending display mode of the new start winning to the default. However, if the pending is no longer displayed in the pending display area at the start of the opening screen of the jackpot, the pending display of that specific mode is erased in the same way as other pending displays. Also, even when transitioning to the normal state controlled after the jackpot game ends, the pending display mode of the new start winning is not returned to the specific display mode (i.e., it remains as the default display).

Processing number 3 is processing related to a new start winning when the winning type of the previous variation is a small win. In processing number 3, the peripheral control MPU does not change the mode of the pending display of the new start winning (i.e., it continues the pending display; specifically, for example, if the pending display mode is blue, it continues to display the blue pending display mode). In addition, the peripheral control MPU may reset the pending display mode of the new start winning to the default at the start of the opening screen of the small win won in the previous variation. However, if the pending is no longer displayed in the pending display area at the start of the opening screen of the small win, the pending display of that specific mode is erased in the same way as other pending displays.

Processing number 4 is processing related to a new start winning when the winning type of the previous variation is a miss. In processing number 4, the peripheral control MPU does not change the state of the pending display of the new start winning (i.e., the pending display is continued; specifically, for example, if the pending display state is blue, the blue pending display state is continued to be displayed).

Figure 174 is an example of processing table 2. Processing table 2 is a table that is referenced when only the expectation suggestion effect is executed in the previous variation, and when both the setting suggestion effect and the expectation suggestion effect are restricted as a pre-reading effect restriction for the variation corresponding to a new start winning. Since processing table 2 is a table that is referenced when both the setting suggestion effect and the expectation suggestion effect are restricted as a pre-reading effect restriction for the variation corresponding to a new start winning, it is defined that no special processing is executed for the pre-reading effect in the variation corresponding to a new start winning, regardless of the type of jackpot in the previous variation.

Figure 175 is an example of processing table 3. Processing table 3 is a table that is referenced when only the expectation suggestion effect is executed in the previous fluctuation, and neither the setting suggestion effect nor the expectation suggestion effect is restricted as a pre-reading effect restriction for the fluctuation corresponding to a new starting winning.

Processing numbers 5 to 6 are processes related to a new start winning when the winning type of the previous variation is a jackpot with time reduction. One of the processes of processing numbers 5 to 6 can be selected by a flag. In processing numbers 5 to 6, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 1.

In the processing of process number 5, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning. Specifically, before the start of the fluctuation corresponding to the new start winning means, for example, during the fluctuation of the previous fluctuation, during the game of the jackpot won in the previous fluctuation, or while the reserved second special pattern is being consumed during the time-saving game associated with the jackpot won in the previous fluctuation. Processing number 5 makes it possible for the player to remember that a setting suggestion effect will be performed if the player is aware that the setting suggestion effect has started before the start of the previous fluctuation, etc.

In the process of process number 6, the peripheral control MPU executes a setting suggestion effect during the fluctuation corresponding to the new start winning. Since a jackpot with time-saving was won in the previous fluctuation, the fluctuation corresponding to the new winning is likely to start after the time-saving period ends (because during the time-saving period, when game balls frequently enter the second start hole 2004 and the first special pattern fluctuation and the second special pattern fluctuation are pending, the second special pattern fluctuation is executed in priority to the first special pattern fluctuation). Therefore, by processing process number 6, a setting suggestion effect is executed after the time-saving period ends, which reduces the player's disappointment due to the time-saving period ending.

The processes of process numbers 7 to 8 are processes related to a new start winning when the winning type of the previous variation is a jackpot without time reduction. One of the processes of process numbers 7 to 8 can be selected by a flag. In the processes of process numbers 7 to 8, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as the processing of process number 2.

In the process of process number 7, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning. Specifically, before the start of the fluctuation corresponding to the new start winning is, for example, during the previous fluctuation, during the jackpot game that was won in the previous fluctuation, etc. Although the player feels disappointed that he or she won the jackpot but did not win the time-saving feature, if the process of process number 7 causes the setting suggestion effect to start at the latest during the jackpot game, the player can enjoy the jackpot game with the disappointment reduced.

In the process of process number 8, the peripheral control MPU executes the setting suggestion effect during the fluctuation corresponding to the new start winning. By processing process number 8, the setting suggestion effect starts immediately after the end of the jackpot, which reduces the player's disappointment for not being granted the time-saving feature.

The processes of process numbers 9 to 10 are processes related to a new starting winning when the winning type of the previous variation is a small win. One of the processes of process numbers 9 to 10 can be selected by a flag. In the processes of process numbers 9 to 10, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new starting winning is the same as the processing of process number 3.

In the processing of process number 9, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new starting winning. Specifically, before the start of the fluctuation corresponding to the new starting winning means, for example, during the previous fluctuation, during the opening of a small win won in the previous fluctuation, or during the small win. In a small win, only a small bonus is given to the player, which can disappoint the player, but by processing number 9, the setting suggestion effect can be started at an early timing, reducing disappointment.

In processing step number 10, the peripheral control MPU executes a setting suggestion display during the fluctuation corresponding to the new starting winning. Since the series of consumption times associated with a small win is shorter than the series of consumption times associated with a big win, if the player is aware that the setting suggestion display has started before the start of the previous fluctuation, the player may feel distrustful if the setting suggestion display is not executed. Processing step number 10 can prevent the player from feeling distrustful in this way.

Processing numbers 11 to 13 are processes related to a new start winning when the winning type of the previous variation is a miss. One of the processes of processing numbers 11 to 13 can be selected by a flag. In processing numbers 11 to 13, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 4.

In processing step 11, the peripheral control MPU executes a setting suggestion display during the fluctuation corresponding to the new start winning.

In the process of process number 12, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect in the new start winning during the change corresponding to the new start winning only if the state of the reserved display in the reserved pre-reading effect of the previous change is a specific state (e.g., green or red) with a high expectation of a jackpot. The execution timing of the setting suggestion effect is not changed, i.e., no special processing is performed, but the execution timing of the setting suggestion effect may be controlled differently (for example, the timing at which the lines suggesting the setting by character B appear may be delayed a predetermined number of seconds (e.g., 2 seconds) from the normal time, or may be advanced a predetermined number of seconds (e.g., 2 seconds). The process of process number 12 can reduce the disappointment of a player who feels disappointed that a reserved display state with a high expectation of a jackpot appeared in the previous change but did not win. In FIG. 175 and FIG. 178 described later, the old reserved is the reserved corresponding to the previous change, and the new reserved is the reserved corresponding to the new start winning.

In the process of process number 13, if the pending display mode is a specific mode (e.g., green or red) that has a high expectation of a jackpot, the peripheral control MPU does not execute a setting suggestion effect as a pre-reading effect in the new start winning. By processing process number 13, even though a pending display mode with a high expectation of a jackpot appeared in the previous variation, it is missed, and furthermore, no setting suggestion effect as a pre-reading effect appears in the variation corresponding to the new start winning, so that the player can be prevented from becoming addicted to the game.

Figure 176 is an example of processing table 4. Processing table 4 is a table that is referenced when expectation suggestion effects and setting suggestion effects are executed in the previous fluctuation, and only setting suggestion effects are restricted as a pre-reading effect restriction for fluctuations corresponding to a new starting winning.

Processing number 14 is processing related to a new start winning when the winning type of the previous variation is a jackpot with time reduction. In processing number 14, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 1.

Processing number 15 is processing related to a new start winning when the winning type of the previous variation is a jackpot without time reduction. In processing number 15, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 2.

Processing number 16 is processing related to a new start winning when the winning type of the previous variation is a small win. In processing number 16, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 3.

Processing number 17 is processing related to a new start winning when the winning type of the previous variation is a miss. In processing number 16, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as processing number 4.

In addition, since processing table 4 is a table that is referenced when restricting only the setting suggestion effects as a pre-reading effect restriction for fluctuations corresponding to new starting winnings, it is defined that no special processing is executed for the setting suggestion effects in fluctuations corresponding to new starting winnings, regardless of the jackpot type of the previous fluctuation.

Figure 177 is an example of processing table 5. Processing table 5 is a table that is referenced when expectation suggestion effects and setting suggestion effects are executed in the previous variation, and both setting suggestion effects and expectation suggestion effects are restricted as a pre-reading effect restriction for a variation corresponding to a new start winning. Since processing table 5 is a table that is referenced when both setting suggestion effects and expectation suggestion effects are restricted as a pre-reading effect restriction for a variation corresponding to a new start winning, it is defined that no special processing is executed for the pre-reading effect in a variation corresponding to a new start winning, regardless of the type of jackpot in the previous variation.

Figure 178 is an example of a processing table 6. Processing table 6 is a table that is referenced when an expectation suggestion effect and a setting suggestion effect are executed in the previous fluctuation, and neither the setting suggestion effect nor the expectation suggestion effect is restricted as a pre-reading effect restriction for the fluctuation corresponding to a new starting winning.

The processes of process numbers 18 to 21 are processes related to a new start winning when the winning type of the previous variation is a jackpot with time reduction. One of the processes of process numbers 18 to 21 can be selected by a flag. In the processes of process numbers 18 to 21, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as the processing of process number 1.

In the processing of process number 18, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning. Specifically, before the start of the fluctuation corresponding to the new start winning means, for example, during the fluctuation of the previous fluctuation, during the game of the jackpot won in the previous fluctuation, or while the reserved second special pattern is being consumed during the time-saving period associated with the jackpot won in the previous fluctuation. Processing number 18 makes it possible to ensure that the player does not forget that a setting suggestion effect will be performed if the player is aware that the setting suggestion effect has started before the start of the previous fluctuation, etc.

In the process of process number 19, the peripheral control MPU executes the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion performance of the previous fluctuation (specifically, for example, if the setting suggestion performance of the previous fluctuation notifies that a setting of 4 or higher is confirmed, and the setting suggestion performance as a look-ahead performance notifies that a setting of 5 or higher is confirmed before the start of the fluctuation corresponding to the new start winning). Specifically, before the start of the fluctuation corresponding to the new start winning means, for example, during the fluctuation of the previous fluctuation, during the play of the jackpot won in the previous fluctuation, or during the consumption of the reserved second special pattern during the time-saving associated with the jackpot won in the previous fluctuation.

By processing the process number 19, the player can see the high setting suggestion effect at the latest during the time-saving jackpot, so that the player can get a double sense of elation from the time-saving jackpot and the high setting suggestion. Also, for example, if the setting suggestion effect of the previous variation notifies that the setting is 5 or higher, and the setting suggestion effect as a look-ahead effect notifies that the setting is 4 or higher before the start of the variation corresponding to the new start winning, the setting suggestion effect as a look-ahead effect before the start of the variation corresponding to the new start winning is a useless effect that does not provide new information to the player, and such a useless effect can be omitted by processing the process number 19. On the other hand, for example, if the setting suggestion effect of the previous variation notifies that the setting is 4 or higher is confirmed, the player is likely to continue playing even if the setting suggestion effect as a look-ahead effect does not notify that the setting is 5 or higher is confirmed before the start of the variation corresponding to the new start winning, so the setting suggestion effect is likely to be a useless effect, and such a useless effect can be omitted by processing the process number 19.

In the process of process number 20, the peripheral control MPU executes a setting suggestion effect during the fluctuation corresponding to the new start winning. By processing process number 20, the setting suggestion effect often starts immediately after the time-saving state ends, which can reduce the player's disappointment at the end of the time-saving state.

In the process of process number 21, the peripheral control MPU executes the setting suggestion effect during the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion effect of the previous fluctuation. By processing process number 21, it is possible to omit unnecessary setting suggestion effects such as those described in the process of process number 19, and to reduce the player's disappointment at the end of the time-saving state.

The processes of process numbers 22 to 25 are processes related to a new start winning when the winning type of the previous variation is a jackpot without time reduction. One of the processes of process numbers 22 to 25 can be selected by a flag. In the processes of process numbers 22 to 25, the processing of the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as the processing of process number 2.

In the process of process number 22, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning. Specifically, before the start of the fluctuation corresponding to the new start winning is, for example, during the previous fluctuation, during the jackpot game that was won in the previous fluctuation, etc. Although the player feels disappointed that he or she won the jackpot but did not win the time-saving feature, if the process of process number 22 starts the setting suggestion effect at the latest during the jackpot game, the player can enjoy the jackpot game with the disappointment reduced.

In the process of process number 23, the peripheral control MPU executes the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion performance of the previous fluctuation. Specifically, before the start of the fluctuation corresponding to the new start winning means, for example, during the previous fluctuation, during the jackpot game that was won in the previous fluctuation, etc. If the setting suggestion performance starts during the jackpot game at the latest by the process of process number 23, the jackpot game can be enjoyed with the disappointment reduced.

In the process of process number 24, the peripheral control MPU executes the setting suggestion effect during the fluctuation corresponding to the new start winning. By processing process number 24, the setting suggestion effect starts immediately after the end of the jackpot, so that the player's disappointment for not entering the time-saving mode can be reduced.

In the process of process number 25, the peripheral control MPU executes the setting suggestion effect during the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion effect of the previous fluctuation. The process of process number 21 makes it possible to omit unnecessary setting suggestion effects as described in the process of process number 19, and to reduce the player's disappointment for not entering the time-saving mode. In addition, if the setting suggested in the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning is not better than the setting suggested in the setting suggestion effect of the previous fluctuation, executing the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning would cause the player who is disappointed that the time-saving mode did not begin to be entered to see even more unnecessary setting suggestion effects, which may upset the player.

The processes of process numbers 26 to 29 are processes related to a new start winning when the winning type of the previous variation is a small win. One of the processes of process numbers 26 to 29 can be selected by a flag. In the processes of process numbers 26 to 29, the processing for the expectation suggestion effect as a pre-reading effect corresponding to a new start winning is the same as the processing of process number 3.

In the process of process number 26, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning. Specifically, before the start of the fluctuation corresponding to the new start winning means, for example, during the previous fluctuation, during the opening of a small win won in the previous fluctuation, or during the small win. In a small win, only a small bonus is given to the player, which can disappoint the player, but by processing number 26, the setting suggestion effect can start at an early timing, reducing disappointment.

In the process of process number 27, the peripheral control MPU executes the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion performance of the previous fluctuation. Specifically, before the start of the fluctuation corresponding to the new start winning is, for example, during the previous fluctuation, during the opening of the small win won in the previous fluctuation, or during the small win. By processing process number 27, it is possible to omit unnecessary setting suggestion performances as explained in the process of process number 19, and to reduce disappointment of the player due to only a small benefit being given in a small win.

In processing step number 28, the peripheral control MPU executes a setting suggestion effect during the fluctuation corresponding to the new starting winning. Since the series of consumption times associated with a small win is shorter than the series of consumption times associated with a big win, if the player is aware that the setting suggestion effect has started before the start of the previous fluctuation, the player may feel distrustful if the setting suggestion effect is not executed. Processing step number 28 can prevent the player from feeling distrustful in this way.

In the process of process number 29, the peripheral control MPU executes the setting suggestion effect during the fluctuation corresponding to the new start winning only if the setting suggested in the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion effect of the previous fluctuation. The process of process number 29 makes it possible to omit the unnecessary setting suggestion effect as described in the process of process number 19, and to reduce the player's disappointment that only a small benefit is given in a small win. In addition, if the setting suggested in the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning is not better than the setting suggested in the setting suggestion effect of the previous fluctuation, executing the setting suggestion effect as a look-ahead effect before the start of the fluctuation corresponding to the new start winning will cause a player who is disappointed that only a small benefit is given in a small win to see even more unnecessary setting suggestion effects, which may upset the player.

The processes of process numbers 30 to 34 are processes related to a new starting winning when the winning type of the previous variation is a miss. One of the processes of process numbers 30 to 34 can be selected by a flag. In the processes of process numbers 30 to 34, the process for the expectation suggestion effect as a pre-reading effect corresponding to a new starting winning is the same as the process of process number 4.

In the process of process number 30, the peripheral control MPU executes a setting suggestion effect during the fluctuation corresponding to the new starting winning. By processing process number 30, it is possible to reduce the disappointment of the player due to the failure of the previous fluctuation.

In the process of process number 31, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect in the new start winning during the change corresponding to the new start winning only if the state of the reserved display in the reserved look-ahead effect of the previous change is a specific state (e.g., green or red) with a high expectation of a jackpot. The execution timing of the setting suggestion effect is not changed, i.e., no special processing is performed, but the execution timing of the setting suggestion effect may be controlled differently (for example, the timing at which the lines suggesting the setting by character B appear may be delayed a predetermined number of seconds (e.g., 2 seconds) or advanced a predetermined number of seconds (e.g., 2 seconds) from normal). The process of process number 31 can reduce disappointment for a player who feels disappointed that a reserved display state with a high expectation of a jackpot appeared in the previous change but did not win.

In the processing of process number 32, the peripheral control MPU executes a setting suggestion performance as a look-ahead performance for the new start winning during the fluctuation corresponding to the new start winning only when the state of the reserved display in the reserved look-ahead performance of the previous fluctuation is a specific state (e.g., green or red) with a high expectation of a jackpot, and the setting suggested in the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion performance of the previous fluctuation. Processing number 32 makes it possible to reduce the player's disappointment when the previous fluctuation, which had a reserved display state with a high expectation of a jackpot, turned out to be a miss, through the setting suggestion performance.

In the process of process number 33, the peripheral control MPU executes a setting suggestion effect as a look-ahead effect in the new start winning during the change corresponding to the new start winning only if the state of the reserved display in the reserved look-ahead effect of the previous change is not a specific state (e.g., green or red) that has a high expectation of a jackpot. By processing process number 33, the setting suggestion effect can alleviate disappointment for players who have been disappointed because the reserved look-ahead effect of the previous change did not give them any expectation of a jackpot.

In the process of process number 34, the peripheral control MPU executes a setting suggestion performance as a look-ahead performance for the new start winning during the fluctuation corresponding to the new start winning only if the state of the pending display is not a specific state (e.g., green or red) with a high expectation of a jackpot, and the setting suggested in the setting suggestion performance as a look-ahead performance before the start of the fluctuation corresponding to the new start winning is better than the setting suggested in the setting suggestion performance of the previous fluctuation. The process of process number 34 makes it possible to prevent the occurrence of a situation that increases the player's frustration, such as the state of the pending display of the previous fluctuation being low expectation and the setting suggestion performance of the fluctuation corresponding to the new start winning suggesting a low setting.

In the above-mentioned process, even in a situation where the setting suggestion effect is not restricted as a pre-reading effect restriction of fluctuations corresponding to a new starting winning, the peripheral control MPU may not execute the setting suggestion effect in the following cases. For example, if the new starting winning occurs during a jackpot, the peripheral control MPU may not execute the setting suggestion effect. This is because immediately after a jackpot game, the player is likely to continue playing even without the incentive of a setting suggestion effect.

As in the examples of Processing Table 3 and Processing Table 6, the effect is achieved in each process related to the new start winning defined by each processing number, so by allowing the hall or the like to set the process related to the new start winning, it is possible to provide gaming machines that meet the needs of the hall or the like's business style.

In addition, for example, if the new start winning occurs just before the end of the ST state (a sure-change state that continues until a jackpot is won or a specified number of special symbol changes are performed) (specifically, for example, when the number of remaining special symbol changes until the end of the ST state is equal to or less than 4, which is the maximum number of reserved special symbols, or when the number of remaining special symbol changes until the end of the ST state is displayed on the main liquid crystal display device 1600), the peripheral control MPU does not need to execute the setting suggestion effect. Just before the end of the ST state, the player's biggest concern is whether or not he will win a jackpot in that ST. If a setting suggestion effect begins as a pre-reading effect related to a new start winning in such a state, the player may mistake the setting suggestion effect for an effect with a high probability of a jackpot, which may lead to a situation where the player gets too excited. The above-mentioned processing can prevent such a situation from occurring.

In addition, for example, if a new start winning occurs between the end of the ST state and the transition to the normal state and the time when a predetermined number of special symbol variations (specifically, for example, four special symbol variations, which is the maximum number of reserved special symbols, or a predetermined number of special symbol variations (for example, five) taking into consideration the fact that the second start port 2004 may be open immediately after the transition from the ST state to the normal state) is performed, the peripheral control MPU does not need to execute the setting suggestion effect. Immediately after the end of the ST state, the player's greatest concern is whether or not he will win a jackpot immediately. In particular, immediately after the end of the ST state, there is a high possibility that a variation corresponding to the reservation of a second special symbol, which is likely to win a type of jackpot that is of great benefit to the player, will be executed. In such a state, if a setting suggestion effect begins as a pre-reading effect related to a new start winning, the player may mistake the setting suggestion effect for an effect with a high probability of winning a jackpot, which may cause the player to get excited. The above-mentioned processing can prevent such a situation from occurring.

In addition, when it is determined that a setting suggestion effect that is complete in itself will be executed for multiple pending events, the setting suggestion effect for the previous change may be changed so that a single setting suggestion effect that spans the changes corresponding to the multiple pending events is executed.

[12-16. Alternative example 1 of setting change/confirmation processing]
Another embodiment of a pachinko machine with a setting change function will be described below. In the embodiment described below, the setting value can be selected by operating the RAM clear switch 954 without providing the setting change switch 972. However, in order to distinguish between the original function of the RAM clear switch 954 to initialize the main control RAM 1312 and the setting change function, the operation for changing the setting value will be described as the setting change switch 972.

Figures 179 and 180 are flowcharts of the power-on process executed by the main control MPU 1311 when the power is turned on. The power-on process shown in Figures 179 and 180 is another example of step S10 in Figure 21 to step S34 in Figure 22.

First, the main control MPU 1311 reads the signal level of the RAM clear switch 954 and the signal level of the setting key 971 from the input port, and stores the read-in level data in a register (step S201). The main control MPU 1311 determines whether the RAM clear switch 954 and the setting key 971 have been operated in steps S212 and S214 after the peripheral control board 1510 has been started up. For this reason, if a hall employee accidentally stops operating the RAM clear switch 954 or the setting key 971 while waiting for the peripheral control board 1510 to start up, the RAM clear switch 954 and the setting key 971 will be determined in a state not intended by the hall employee. For this reason, the input state (level) of the RAM clear switch 954 and the setting key 971 is stored in a temporary storage means such as a register at an early stage after the power-on process begins, and the state of the RAM clear switch 954 and the setting key 971 stored in the temporary storage means such as a register is determined after the standby state of the peripheral control board 1510 ends. This ensures that even if a hall employee accidentally stops operating the keys at an early stage after power-on, the operation of the RAM clear switch 954 and the setting key 971 during the power-on operation is detected reliably.

The ON level of the RAM clear switch 954 and the ON level of the setting key 971 may be different. For example, the logic of the RAM clear switch 954 and the setting key 971 may be changed to positive or negative, so that the RAM clear switch 954 is ON at a high level and the setting key 971 is ON at a low level. Also, the voltage at which the RAM clear switch 954 and the setting key 971 are determined to be ON may be different. By doing this, it is possible to change the signal level by irradiating the pachinko machine 1 with radio waves, making it difficult to commit fraud by activating the setting change mode. Also, as will be described later, there is no need to monitor the signal level of the fraud detection sensor in the setting change mode or setting confirmation mode.

Then, it is determined whether the setting value is within a predetermined range (step S202). For example, in a pachinko machine 1 where the settings can be selected from 1 to 6, if the work value in which the setting value is stored corresponds to 0 to 5 (setting 1 = 0, setting 6 = 5), if a value of 5 or less is stored, it is determined to be within the predetermined range.

If the setting value is not within the specified range, a value (08H) indicating a RAM abnormality is recorded in the setting status management area, and initialization by a reset signal from the pachinko machine 1 is awaited (step S203). The setting value is not within the range in which the checksum is calculated, and is not erased by a RAM clear operation, so an abnormal setting value is not corrected. For this reason, when the power is turned on, it is determined whether there is an abnormality in the setting value, and if there is an abnormality, processing related to normal play such as special and normal drawings is not executed.

The set value is not only determined when the power is turned on, but also when a certain condition is met, such as when a winning ball enters the starting hole, when a variable display game starts, or when the game state changes (from normal state to jackpot state, from low probability state to high probability state, from non-time-saving state to time-saving state, etc.). This prevents a lottery from being held based on an incorrect set value, even if the set value is mistakenly set to an abnormal value.

If the setting value is determined to be abnormal, gameplay will stop and the abnormal setting value (RAM abnormal) state will be maintained until the power is turned back on or the setting value is changed. If the setting value is determined to be abnormal, a predetermined value should be set. As the predetermined value, a value corresponding to setting 6 indicating the highest setting or a value corresponding to setting 1 indicating the lowest setting should be used to update the setting value storage area.

In the pachinko machine 1 of this embodiment, a RAM abnormality can only be cleared via the setting change mode, and cannot be cleared by simply turning the power back on. This is because RAM abnormalities can occur due to malfunctions as well as fraud, and if a RAM abnormality caused by fraud can be cleared by turning the power back on, the RAM abnormality can be easily cleared. In contrast, if a RAM abnormality cannot be cleared without going through the setting change mode, the RAM abnormality cannot be cleared without operating the power switch 932, setting key 971, and RAM clear switch 954, and this further includes the operation of the setting key 971, which can only be operated by hall employees who have a key, thereby improving security against fraudulent activities.

To deal with cheating by illegally changing the setting value to an indefinite value, if a setting value is determined to be abnormal, it can be updated to a value corresponding to setting 1, which indicates the lowest setting, which is an effective way of improving the security of the gaming machine.

The setting status management area, as shown in FIG. 201 (B), is a memory area in which the operating mode of the pachinko machine 1 is recorded, and for example, the normal game status (state in which game play can be started), the setting confirmation mode, the setting change mode, and abnormalities in the main control RAM 1312 are recorded.

On the other hand, if the set value is within the predetermined range, the system waits for the peripheral control board 1510 to start up (step S204).

Then, the checksum calculated from the data backed up in the main control RAM 1312 at the time of the previous power outage is compared (verified) with the checksum calculated at the time of the previous power outage and stored in step S48. Note that a fixed check code value may be used instead of the checksum. Furthermore, it is determined whether the value of the backup flag area is normal. If the value of the power outage flag, which indicates that the backup was successful, is stored in the backup flag area, the data in the RAM was backed up normally when the power outage occurred (step S205).

If the result of the determination is that either the checksum or the value in the backup flag area is abnormal, a value (08H) indicating a RAM abnormality is recorded in the setting status management area (step S206), all areas of the main control RAM 1312 (including the area in which the setting values are stored) are initialized (step S207), and the process proceeds to step S216. Note that the erasure of data stored in all areas or a specified area of the main control RAM 1312 is referred to as "initialization," but "RAM clear" is also used in the same sense.

On the other hand, if the checksum and backup flag area values are normal, it is determined whether a setting change operation has been performed (RAM clear switch 954 is ON, setting key 971 is ON) based on the value (contents) of the setting key stored in the register. If a setting change operation has not been performed (either or both of RAM clear switch 954 and setting key 971 are OFF), it is determined whether a value indicating that a setting is being changed (02H) is recorded in the setting status management area to determine whether the setting was being changed before the power was turned on (step S208).

As a result, if the register has stored information that a setting change operation has been performed, it can be determined that the RAM clear switch 954 and setting key 971 were used to enter setting change mode when the power was turned on, and that the setting change operation should be started. Also, if a value (02H) indicating that a setting is being changed is recorded in the setting status management area, it can be determined that the power was turned on after a power outage during a setting change operation. When it is determined to transition to setting change mode based on the value stored in the register or the value stored in the setting status management area, a value (02H) indicating the setting change state is recorded in the setting status management area (step S209), the clear area of the main control RAM 1312 that should be initialized when the RAM is normal is initialized (step S210), and the process proceeds to step S216.

When transitioning to the setting change mode based on the value stored in the setting state management area in step S208, a value indicating the setting change state (02H) is recorded in the setting state management area in step S209. However, since there is no need to set the same value (setting change state (02H)) again at this time, when it is determined to transition to the setting change mode based on the value stored in the setting state management area, it is not necessary to record the value indicating the setting change state (02H) in the setting state management area.

On the other hand, if the setting change operation is not set in the register and the value (02H) indicating that the setting is being changed is not recorded in the setting status management area, the setting change operation should not be started. Therefore, to determine whether the RAM was abnormal before the power was turned on, it is determined whether the value (08H) indicating a RAM abnormality is recorded in the setting status management area (step S211).

If a value indicating a RAM abnormality is recorded in the setting status management area, it is determined that the state before power was turned on is a RAM abnormality (the main control RAM 1312 is abnormal), and the process proceeds to step S216. On the other hand, if a value indicating a RAM abnormality is not recorded in the setting status management area, the state before power was turned on is not a RAM abnormality (the main control RAM 1312 is abnormal), so it is determined whether the ON level of the RAM clear switch 954 is stored in the register (step S212).

As a result, if the ON level of the RAM clear switch 954 is stored in the register, the RAM clear switch 954 was turned ON when the power was turned on, so the process proceeds to step S210 to initialize the RAM area (cleared area when RAM is normal) within the game control area excluding the setting value and setting status management area.

On the other hand, if the register does not store the ON operation level of the RAM clear switch 954, the RAM clear switch 954 was not operated when the power was turned on, so the power-on state buffer is set (step S213). The contents set in the power-on state buffer are sent from the main control board 1310 to the peripheral control board 1510 as a power-on state command to notify the game status managed by the main control MPU 1311 when the power is restored.

Then, it is determined whether the ON level of the setting key 971 is stored in the register (step S214). As a result, if the ON level of the setting key 971 is stored in the register, the setting key 971 was operated when the power was turned on and the setting confirmation operation should be started, so a value (01H) indicating the setting confirmation mode is recorded in the setting status management area (step S215).

Then, the devices built into the main control MPU 1311 are initialized (step S216), and a power-on operation command that notifies the operation of each part when power is turned on is sent to the peripheral control board 1510 (step S217). The power-on operation command is one of the power-on commands described in step S32 of FIG. 22. Then, the main control RAM 1312 is initialized to the state at power-on (step S218).

Then, it is determined whether a value (00H) indicating a state in which game can be started is recorded in the setting state management area (step S219). If a value indicating a state in which game can be started is recorded in the setting state management area, normal game can be started, so the process proceeds to step S220 and continues with the initial settings. On the other hand, if a value indicating a state in which game can be started is not recorded in the setting state management area, normal game cannot be started, so the initial settings are terminated and the process proceeds to step S224.

In step S220, the initial settings at the start of play or when power is restored are performed. After that, a power-on state command that notifies the state of each part when power is turned on is sent to the peripheral control board 1510 (step S221). Then, a power-on return destination command that notifies the state of the special pattern when power is restored is stored in a buffer for transmission to the peripheral control board 1510 (step S222). The power-on state command and power-on return destination command are one of the power-on commands described in step S32 of FIG. 22. The various commands stored in the buffer are sent during timer interrupt processing.

Furthermore, a setting value command notifying the setting value is sent to the peripheral control board 1510 (step S223), an interrupt is enabled (step S224), and the process proceeds to the normal main loop (e.g., step S36 in FIG. 22).

Figures 181 and 182 are flowcharts of the timer interrupt processing executed by the main control MPU 1311. The timer interrupt processing shown in Figures 181 and 182 differs from the timer interrupt processing shown in Figures 24, 75, 80, 104, and 155 in that the setting change processing is executed within the timer interrupt processing.

First, the main control MPU 1311 updates the LED common counter (LED_CT) (step S230). The LED common counter is a counter that determines which common terminal of the base display 1317 is turned on, i.e., which digit is to be displayed. Note that in this embodiment, an example is described in which the base display 1317 and the setting display 974 are used together, but the base display 1317 and the setting display 974 may be provided separately. In this case, it is preferable to provide the same number of LED common counters as the number of displays.

Then, the switch input process is executed (step S231). The switch input process is the same as step S74 in FIG. 23.

Next, it is determined whether an initial value (a value indicating a state in which game play can be started) is recorded in the setting state management area (step S232). If an initial value (a value indicating a state in which game play can be started) is recorded in the setting state management area, there is no need to execute the setting change/confirmation process (step S234 and onwards) in the timer interrupt process, so normal timer interrupt process (for example, step S76 and onwards in Figure 23) is executed (step S233). In the normal timer interrupt process in step S233, a performance display process (Figure 183) described below is executed. On the other hand, if an initial value (a value indicating a state in which game play can be started) is not recorded in the setting state management area, normal game process is not executed in the timer interrupt process, and setting change/confirmation process is executed.

In the setting change/confirmation process, first, OFF is output from the LED common port, a security signal is output from the external terminal board 784, and the game interruption signal is set to ON (step S234). By turning the LED common signal OFF at an early stage of the timer interrupt process, the time until the LED common signal turns ON, i.e., the LED off time, is secured, the ghost phenomenon in which the display before and after the LED display change appears mixed, and LED flickering is prevented.

Then, it is determined whether a value (08H) indicating a RAM abnormality is recorded in the setting status management area (step S235). If a value indicating a RAM abnormality is recorded in the setting status management area, the process proceeds to step S245 without executing a process to change/check the setting value. On the other hand, if a value indicating a RAM abnormality is not recorded in the setting status management area, it is determined whether an operation to change/check the setting value has been performed (steps S236, S237). Specifically, it is determined whether a value (02H) indicating a setting change is recorded in the setting status management area (step S236).

If the setting change switch 972 has been operated, the setting value is incremented by 1 (step S238) and the process proceeds to step S245. If the incremented setting value exceeds the upper limit, the setting value is reset to the initial value. On the other hand, if a value indicating a setting change is not recorded in the setting status management area (a value indicating a setting confirmation is recorded in the setting status management area), or if the setting change switch 972 has not been operated, it is determined whether an OFF edge of the output level of the setting key 971 has been detected (step S239). If an OFF edge of the output level of the setting key 971 is detected, the setting key 971 has been operated to the normal position, and the setting change/confirmation mode termination process is executed (steps S240 to S244). On the other hand, if an OFF edge of the output level of the setting key 971 has not been detected, the setting change/confirmation mode is not terminated and the process proceeds to step S245.

In the setting change/confirmation mode termination process, as shown in FIG. 182, the initial value (value indicating a state in which play can be started) is recorded in the setting state management area (step S240), the initial setting at the start of play or the initial setting at the time of power recovery is performed (step S241), and the power-on state command notifying the state of each part at the time of power-on (play state such as low probability/high probability, time-saving/non-time-saving) is stored in the buffer to be sent to the peripheral control board 1510 (step S242). Then, the power-on return destination command notifying the state of the special pattern at the time of recovery after a power outage is stored in the buffer to be sent to the peripheral control board 1510 (step S243). Specifically, the counter value indicating the processing state regarding the special pattern/special electric role (the state of each process regarding the special pattern/special electric role (waiting, fluctuating, judgment, jackpot, etc.)) is sent as a command. As a result, the peripheral control board 1510 can determine the game state regarding the special pattern and the operating state of the special electric role when the power is restored. Then, the setting value command notifying the setting value is stored in a buffer for transmission to the peripheral control board 1510 (step S244), and the process proceeds to step S245.

The command to notify the setting value should be sent not only when the setting change/check mode is ended when the power is turned on, but also when a change starts or when the game state is changed. In that case, the setting value command sent when the power is turned on and the command sent during normal gameplay such as when a change starts may be the same command or different commands (for example, the value of the upper byte may be different).

If the setting value commands are different when the power is turned on and during normal play, when the peripheral control board 1510 receives a series of commands (variation pattern commands, pattern commands, etc.) including the setting values at the start of the special pattern variation display game, it determines whether any commands are missing. By varying the content of the commands depending on when the commands are sent (when the power is turned on, during normal play, etc.), the peripheral control board 1510 can determine whether the setting values were received correctly when the power was turned on, or whether a variation pattern command or pattern command other than the setting values was missing when the variation began.

In step S245, it is determined whether a value (08H) indicating a RAM abnormality is stored in the setting status management area. If a value indicating a RAM abnormality is recorded in the setting status management area, a setting is made to display an error on the base display 1317 (or the setting display 974 if separate) (step S246). On the other hand, if a value indicating a RAM abnormality is not recorded in the setting status management area, a setting is made to display the current setting value on the base display 1317 (or the setting display 974 if separate) (step S247).

Then, ON is output to the common terminal of the LED of the base display 1317, and the base display 1317 is lit by the segment signal output according to the setting in step S246 or S247 (step S248). In this way, after the timer interrupt process starts, the setting value change operation is determined (step S237), and then ON is output to the common terminal of the LED for each timer interrupt to display the setting value (switch the display of the setting value). The setting value is displayed without being triggered by the setting operation. Specifically, the process related to the setting change/confirmation is not performed as a process when the power is turned on, but is performed within the same timer interrupt process as when normal play is started. Even if a power outage occurs during the setting change/confirmation process and the power is restored after the setting key 971 is returned to its original state, the setting change/confirmation process can be returned to the state it was in when the power outage occurred without operating the setting key 971 or the setting change switch 972 to the same position as when the power outage occurred. Furthermore, in the setting change/confirmation process, the process executed in the normal game process, such as the command transmission process and the control of the dynamic lighting of the LED, can be shared.

Then, a command is sent to the peripheral control board 1510 (step S249), and the timer interrupt process ends. That is, in step S249, the commands stored in the buffer in steps S242, S243, S244, etc. are actually output as serial data from the main control board 1310.

In the timer interrupt process described above, the process branches depending on whether normal play is performed or the setting change mode (or setting confirmation mode) is performed (step S232 in FIG. 181), but multiple timer interrupt processes may be provided and different timer interrupt processes may be started in the normal play state and the setting change mode and/or the setting change mode. These multiple timer interrupt processes may include some common processes (for example, a common subroutine may be called in each timer interrupt process), or may all be composed of different routines. In other words, in the setting change mode and setting confirmation mode, timer interrupt process 1 (for setting change/confirmation) is called, and in the normal play state, timer interrupt 2 (for normal play) is called, and there are processes (modules) that are commonly executed in these two timer interrupt processes and dedicated processes (modules) that are executed only in one of the timer interrupt processes. Common processes include, for example, switch input processing that captures the output of various detection switches such as winning slot sensors and peripheral board command processing that transmits commands to the peripheral control board 1510.

The register bank may also be shared between the processes executed in normal play and the processes executed in the setting change mode. When bank 0 is used in the main control side main process, bank 1 is used for both timer interrupt processes. Since the two timer interrupt processes are not activated at the same time, one register bank can be shared. In other words, in the pachinko machine of this embodiment, the main control MPU 1311 has two or more registers that can be switched by bank, and has the main control side main process that is repeatedly executed, timer interrupt process 1 that is executed periodically (during normal play), and timer interrupt process 2 that is executed periodically (setting change mode), and at least two of the main control side main process, timer interrupt process 1, and timer interrupt process 2 use a common bank of registers.

The execution cycle of the timer interrupt processing executed in normal play and the timer interrupt processing executed in the setting change mode should be the same, but they may be executed with different cycles. Since the only switches sampled in the timer interrupt processing executed in the setting change mode are the RAM clear switch 954 and the setting key 971, the execution cycle of the timer interrupt processing in the normal play state is 4 ms, while the execution cycle of the timer interrupt processing executed in the setting change mode may be faster (e.g., 2 ms) or slower (e.g., 8 ms). Note that if the execution cycle of the timer interrupt processing executed in the setting change mode is slowed, the cycle of the dynamic lighting control of the LED that displays the setting value will be slower, and the display mode of the setting value will differ from the base display during normal play. If there are eight common LEDs, and the execution period of the timer interrupt process is 8 ms, the display period will be 64 ms (display ON 8 ms, OFF 56 ms), and if the execution period of the timer interrupt process is 4 ms, the display period will be 32 ms (display ON 4 ms, OFF 20 ms). The OFF time will be longer in proportion to the execution period of the timer interrupt process, and the LED will flicker more, making it possible to recognize the display mode as different from the base display during normal play.

In addition, when the setting change mode or setting confirmation mode is started at power-on, timer interrupt processing 1 for setting change/confirmation is permitted, and timer interrupt processing 2 for normal play is prohibited. On the other hand, when starting in normal play state at power-on (without transitioning to setting change/confirmation mode), timer interrupt processing 1 for setting change/confirmation is prohibited, and timer interrupt processing 2 for normal play is permitted. Then, when the setting change mode or setting confirmation mode is ended, timer interrupt processing 1 for setting change/confirmation is prohibited, and timer interrupt processing 2 for normal play is permitted.

Figure 183 is a flowchart of the performance display process executed by the main control MPU 1311. In the performance display process, the performance (e.g., base value) of the pachinko machine 1 is displayed on the base display 1317.

The performance display process is executed in the timer interrupt in the normal game mode described above. Specifically, it is executed in the normal interrupt process of step S233 of the timer interrupt process shown in FIG. 181, or in the base display output process of step S2087 of the timer interrupt process shown in FIG. 191.

First, the main control MPU 1311 saves the stack address in the game control area, sets a stack address outside the game control area (step S260), and saves the registers used in the game control area to the register save buffer (step S261). The save destination for the registers used in the game control area in step S261 is preferably a work area outside the game control area of the main control RAM 1312. Note that the save destination for the registers used in the game control area may also be a stack area outside the game control area of the main control RAM 1312.

Then, it is determined whether the first power-on flag is normal (step S262). The first power-on flag is a flag that indicates whether the areas outside the game control area of the main control RAM 1312 have been initialized (i.e., whether this is the first power-on), and is set to 5AH when the areas outside the game control area are initialized. In other words, if the value of the first power-on flag is 5AH, it can be determined that the main control RAM 1312 was initialized (i.e., the areas outside the game control area were also initialized) when the power was first turned on.

Then, it is determined whether the value of the parameter used to display the base value is within a predetermined range (step S263). For example, if the value of the LED common counter for switching the display digits of the base display 1317 is other than 0 to 3, it is determined that the parameter value is abnormal, and in step S264, the main control RAM 1312 outside the game control area is initialized.

If the power outage flag is not normal or the values of each parameter are not within the specified range, the main control RAM 1312 outside the game control area is initialized, the power outage flag is set to 5AH (step S264), and the process proceeds to step S265. On the other hand, if the power outage flag is normal and the values of each parameter are within the specified range, the various winning hole sensors 3015, 2114, 2554, 2557 and the ejected ball sensor 3060 are detected, and the base value is calculated (step S265).

Then, it is determined whether it is time to switch the base value calculation interval (step S266), and if the time has come to switch, the display mode is switched (step S267). Display data is then created according to the display mode and stored in a buffer (step S268). The display is then controlled for each interval. For example, display control for each interval may include displaying a test interval with fewer than 500 out balls, or flashing the display when the number of low probability/non-time-saving out balls is less than a predetermined number (e.g., 6,000) (step S269).

Then, the register values are restored from the register save buffer (step S270), the stack address in the game control area is restored (step S271), and the performance display process is terminated.

Next, the notification mode of the pachinko machine 1 of this embodiment will be described with reference to FIG. 184. As described above, in the pachinko machine of this embodiment, if there is an abnormality in the main control RAM 1312 when the power is turned on, or if the machine is in the setting change mode or setting confirmation mode, a notification is issued to inform hall employees of the status of the pachinko machine in an easy-to-understand manner.

The notification modes (for example, the display mode of the function display unit 1400) described below are output in the mode selected in the setting change mode or setting confirmation mode. These notifications are controlled by selecting a notification pattern in conjunction with the display settings on the base display 1317 in steps S246 and S247 of the timer interrupt process (FIG. 181). Specifically, this is executed in the setting display process of step S2069 of the timer interrupt process shown in FIG. 190. Note that the process may be executed by providing a dedicated module for displaying the operation mode of the pachinko machine 1.

First, if the main control RAM 1312 is abnormal, it is controlled by a command sent to the peripheral control board 1510 in step S249 of the timer interrupt process (FIG. 181). Note that an abnormality in the main control RAM 1312 is reported with priority over reporting of other abnormalities or conditions.
Function display unit 1400: All lights off, or all LEDs flash at high speed at the same cycle. Main LCD display unit 1600: Displays the words "RAM error". Sound (sound effect) Outputs a RAM abnormality alarm sound (the RAM abnormality alarm sound may be the same as the alarm sound for modes other than the setting change mode and setting confirmation mode).
Sound (audio): "RAM error" sound output volume: maximum volume independent of the volume of the peripheral control board box 1520 or the volume setting by the player Frame decoration LED: flashes red for a specific frame lamp (including the top lamp, excluding the bulb burnt out and stock notification LEDs) on the door frame 3 Display panel decoration LED: all lights off External output (security signal): output test signal (game machine error signal): output re-notification Cancellation conditions: RAM has been cleared by changing settings on the main control board 1310, or power has been reapplied to the peripheral control board 1510

Next, a description will be given of a setting change notification when the main control RAM 1312 is started in the setting change mode. The setting change notification is controlled by a command sent to the peripheral control board 1510 in step S249 of the timer interrupt process (FIG. 181).
Function display unit 1400 All lights up, or all LEDs blink at a medium speed at the same cycle Main LCD display device 1600 Displays the words "Settings being changed" Sound (sound effect) Outputs a sound to notify of setting change mode Sound (voice) Outputs the voice "Settings being changed" a specified number of times (for example, 16 times) Volume Maximum volume independent of the volume of the peripheral control board box 1520 or the volume setting by the player Frame decoration LED Blinks a specified frame lamp (including the top lamp, excluding bulb burnout and stock notification LEDs) provided on the door frame 3 in white All display panel decoration LEDs are turned off External output (security signal) Output test signal (game machine error signal) Output re-notification Release conditions The peripheral control board 1510 has received "A001H" as the power-on operation command.

Next, a description will be given of a setting check notification when the main control RAM 1312 is started in the setting check mode. The setting check notification is controlled by a command sent to the peripheral control board 1510 in step S249 of the timer interrupt process (FIG. 181).
Function display unit 1400: All lights on, or all LEDs flash slowly at the same cycle. Main LCD display unit 1600: Displays the words "Checking settings" Sound (sound effect) Outputs a sound to inform the user of the setting check mode (the sound to inform the user of the setting change mode may be the same as the sound to inform the user of the setting check mode).
Sound (audio): The voice "Checking settings" is played a predetermined number of times (e.g. 16 times). Output volume: Maximum volume, independent of the volume of the peripheral control board box 1520 or the volume setting by the player. Frame decoration LED: A predetermined frame lamp (including the top lamp, excluding the bulb burnt out and stock notification LEDs) on the door frame 3 flashes in white. Display panel decoration LED: All lights are turned off. External output (security signal): Output test signal (game machine error signal): Output re-notification. Release conditions: The peripheral control board 1510 receives "A001H" as the power-on operation command and a predetermined time (e.g. 30 seconds) has elapsed.

The above-mentioned three states are preferably notified in the order of the abnormality of the main control RAM 1312 with the highest priority, the setting change mode, and the setting confirmation mode. More specifically, the priority may be determined in the order shown in FIG. 185. Note that priority 1 is the highest priority of notification, and priority 9 is the lowest priority of notification. In other words, when multiple notifications should be made, the notification with the highest priority (lower number) is made. Also, when the conditions of multiple notifications with the same priority are established and the notifications compete, the competing notifications may be switched and notified, or the notification that was established first may be made, and if the competing notification satisfies the condition after the notification is released, the competing notification may be made. Specifically, in priority 3, the RAM clear notification and the setting confirmation notification do not occur at the same time, so the notifications do not compete. In priority 4, the excessive prize ball abnormality notification and the normal electric role winning abnormality notification may occur at the same time, and the two notifications may compete.
Priority 1: RAM error notification when a RAM abnormality is detected. Priority 2: Setting change notification in setting change mode. Priority 3: RAM clear notification when the main control RAM is initialized by operating the RAM clear switch 954 (excluding RAM clear due to setting change).
Priority 3: Setting confirmation notification in setting confirmation mode Priority 4: Excessive prize ball abnormality notification when more than a predetermined number of prize balls are paid out Priority 4: Normal electric device prize winning abnormality notification when a predetermined number or more of winnings are detected consecutively when a normal electric device is not in operation, or a predetermined number or more of winnings are detected during one operation of a normal electric grilling device Priority 5: Ejection abnormality notification when the difference between the number of winnings and the number of ejections at the large prize opening becomes a predetermined number or more Priority 6: Vibration sensor abnormality notification when vibration is detected Priority 7: Door open abnormality notification when the opening of the door frame 3 or the main body frame 4 is detected Priority 8: Magnetic sensor abnormality notification when the magnetic sensor detects magnetism Priority 9: Large prize opening prize winning abnormality notification when a predetermined number or more of winnings are detected consecutively when the large prize opening is not in operation, or a predetermined number or more of winnings are detected during one jackpot

Next, the details of the power-on process (FIGS. 179 and 180) described above will be explained. FIG. 186 and FIG. 187 are flowcharts of the power-on process executed by the main control MPU 1311 when the power is turned on.

First, when the power is turned on and the reset signal is released, the main control MPU 1311 starts processing address 8000, which is the start address of the program code. The main control MPU 1311 sets the protection of the main control RAM 1312 to be disabled and the prohibited area to be disabled in the RAM protection register (step S2000). The main control MPU 1311 has the function of designating the use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. In order to release the reset function due to access to the prohibited area of the main control RAM 1312, the prohibited area is set to be disabled, allowing access to all areas of the main control RAM 1312. Note that an unused area of the main control RAM 1312 may be designated as the prohibited area, the prohibited area may be enabled, and the main control MPU 1311 may be reset if access to the designated prohibited area is detected.

Next, a simple clear mode timer of a predetermined time is set to the watchdog timer (step S2001), and the watchdog timer is cleared (step S2002). After that, the power outage clear signal is set to ON (step S2003), and the power outage clear signal is set to OFF (step S2004). By first setting the power outage clear signal to ON and then to OFF, the power outage signal stored in the latch can be set to a normal value.

Next, the signal levels of the setting key 971 and the RAM clear switch 954 are read from the PF port and stored in a register (step S2005). The determination of whether the RAM clear switch 954 and the setting key 971 have been operated is performed by the main control MPU 1311 after the peripheral control board 1510 has been started up reliably. Therefore, if a hall employee accidentally stops operating the RAM clear switch 954 or the setting key 971 while waiting for the peripheral control board 1510 to start up, the RAM clear switch 954 and the setting key 971 will be determined to be in a state unintended by the hall employee. For this reason, the input state (level) of the RAM clear switch 954 and the setting key 971 is stored in a temporary storage means such as a register at an early stage after the power-on process begins, and the state of the RAM clear switch 954 and the setting key 971 stored in a temporary storage means such as a register is determined after the standby state of the peripheral control board 1510 ends. This ensures that even if a hall employee accidentally stops operating the keys at an early stage after power-on, the operation of the RAM clear switch 954 and the setting key 971 during the power-on operation is detected reliably.

Then, it is determined whether the power outage warning signal indicates that a power outage is occurring (step S2006). If a power outage warning signal has been detected, the power supply voltage of the pachinko machine is not normal, so in step S2006, the machine waits until the power supply voltage stabilizes.

Then, it is determined whether the setting value is within a predetermined range (step S2007). For example, in a pachinko machine 1 where the settings can be selected from 1 to 6, if the work value in which the setting value is stored corresponds to 0 to 5 (setting 1 = 0, setting 6 = 5), if a value of 5 or less is stored, it is determined to be within the predetermined range.

If the set value is not within the predetermined range, the set value is initialized to 0 (step S2023), a value (08H) indicating a RAM abnormality is recorded in the setting state management area (step S2024), and initialization by the reset signal of the pachinko machine 1 is awaited. The set value is not within the range in which the checksum is calculated, and is not erased by the RAM clear operation, so even if the set value is abnormal, it is not corrected. For this reason, when the power is turned on, it is determined whether there is an abnormality in the set value, and if there is an abnormality, normal game play is not started. In halls where pachinko machines are installed, the RAM clear operation may be performed when it is desired to initialize the game state while maintaining the set value (for example, to clear the latent probability change (high probability non-time shortening) and return to the normal state with low probability time shortening). If the set value is initialized by the RAM clear operation during business hours, it is necessary to cut off the power and start the setting change mode to reset the set value and continue business, and then reset the original set value. In order to avoid such trouble, the set value is maintained without being cleared by the RAM clear operation.

On the other hand, if the set value is within the predetermined range, a sub-startup waiting timer (e.g., about 2 seconds) is started, and the watchdog timer is continuously cleared until the timer times out, while waiting for the peripheral control board 1510 to start up (step S2008). The waiting for the peripheral control board 1510 to start up can be any time between power-on and the first transmission of a command to the peripheral control board 1510, and does not have to be after the set value has been determined.

Then, it is determined again whether the power outage warning signal indicates that a power outage is occurring (step S2009). If the power outage warning signal is detected, the power supply voltage of the pachinko machine 1 is abnormal, so the system waits in step S2009.

It also determines whether there is an abnormality in the game control area of the main control RAM 1312, and stores the determination result in a register (step S2010). Specifically, it compares a checksum calculated and stored from the data used as the game control area (excluding data saved in the stack) among the areas backed up in the internal RAM 1312 at the time of the previous power outage with a checksum calculated using the same area, and if the two are different, it determines that there is an abnormality in the main control RAM 1312. In addition, if the value of the power outage flag indicating that the data was backed up normally (the power outage processing was executed normally) is not stored in the backup flag area, it determines that the data in the main control RAM 1312 was not backed up normally at the time of the power outage (the power outage processing was not executed normally) and that there is an abnormality in the main control RAM 1312.

If an abnormality is found in the game control area of the main control RAM 1312, the information in the setting status management area is saved (step S2011), and a value (08H) indicating a RAM abnormality is provisionally recorded in the setting status management area (step S2012).

Then, among the register values in which the PF port value is recorded, the bits of the setting key 971 and the RAM clear switch 954 are masked (step S2013). After that, it is determined using the values stored in the register whether the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON when the power was turned on (step S2014). If the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON, it is determined that a setting change operation has been performed, and the process proceeds to step S2030 in FIG. 187.

On the other hand, if the setting key 971 has not been operated and the RAM clear switch 954 has not been operated, it is determined whether the setting change mode was active when the power outage occurred (step S2015). For example, if the value of the setting status management area saved in S2011 is the setting change mode (02H), it is determined that a power outage occurred during the setting change mode.

If it is determined that a power outage has occurred during the setting change mode, the process proceeds to step S2030 in FIG. 187.

On the other hand, if it is determined that no power outage has occurred during the setting change mode, it is determined whether there is an abnormality in the game control area of the main control RAM 1312 (step S2016). Specifically, this can be determined using the determination result stored in the register in step S2010 described above. If there is an abnormality in the game control area of the main control RAM 1312 as a result, the process proceeds to step S2031 in FIG. 187.

On the other hand, if there is no abnormality in the game control area of the main control RAM 1312, it is determined whether a power outage occurred during RAM abnormality processing (step S2017). For example, when the value of the saved setting state management area is a value (08H) indicating a RAM abnormality, it is determined that a power outage occurred during RAM abnormality processing.

If it is determined that a power outage has occurred during RAM abnormality processing, the process proceeds to step S2036 in FIG. 187. On the other hand, if it is determined that a power outage has not occurred during RAM abnormality processing, a value (00H) indicating a normal game state is recorded in the setting state management area (step S2018). By recording 00H in the setting state management area in step S2018, the value (08H) indicating a RAM abnormality that was provisionally recorded in the setting state management area in step S2012 is returned to a normal state. Also, by recording 00H in the setting state management area in step S2018, the values in the setting state management area when jumping from steps S2016 and S2019 to step S2031 are different, so that the program can be shared between the two, thereby reducing the program size.

Then, the value stored in the register is used to determine whether the RAM clear switch 954 was turned ON when the power was turned on (step S2019). If the RAM clear switch 954 was turned ON, it is determined that a RAM clear operation has been performed, and the process proceeds to step S2031 in FIG. 187.

In the pachinko machine of this embodiment, processing is allocated based on the operation of the RAM clear switch 954 and the setting key 971, and the value recorded in the setting status management area. For example, if it is determined that the main control RAM 1312 is abnormal, 08H is recorded in the setting status management area, and 08H is maintained until the power is cut off, so that normal game processing cannot be executed. In this case, if the power is cut off once, a setting change operation is performed, and then the power is turned on, the RAM abnormality can be canceled. That is, if it is determined in step S2014 that both the setting key 971 and the RAM clear switch 954 have been operated (setting change operation), the setting status management area is updated from a value indicating a RAM abnormality (08H) to a value indicating a setting change (02H) (step S2030), and the RAM abnormality state ends. In this way, recovery from a RAM abnormality is always via a setting change. In other words, before determining whether the state at the time of the power outage is a RAM abnormality, it is determined whether a setting change operation has been performed, so the RAM abnormality can only be resolved by changing the setting value.

On the other hand, if the RAM clear switch 954 has not been operated, the game status information at the time of the power outage is stored in the power-on status buffer in order to restore the state before the power outage occurred (step S2020).

Then, the value stored in the register is used to determine whether the setting key 971 was operated to ON when the power was turned on (step S2021). If the setting key 971 was operated to ON, it is determined that a setting confirmation operation has been performed, a value (01H) indicating the setting confirmation mode is recorded in the setting status management area (step S2022), and the process proceeds to step S2036 in FIG. 187. In other words, regardless of whether the state at the time of the power outage was during setting confirmation or not, if only the setting key 971 has been operated (if the RAM clear switch 954 has not been operated), the process transitions to the setting confirmation mode.

Since steps S2018 to S2022 are processes that are executed when at least one of the RAM clear switch 954 and the setting key 971 is not operated, it is possible to determine whether the RAM clear switch 954 is operated (step S2019) or whether the setting key 971 is operated (step S2021). That is, as shown in the figure, it is possible to determine whether the RAM clear switch 954 is operated (step S2019) and then determine whether the setting key 971 is operated (step S2021), or it is possible to determine whether the RAM clear switch 954 is operated (step S2019) and then determine whether the setting key 971 is operated (step S2021).

Next, we will explain Figure 187, which is a continuation of the power-on process (Figure 186).

If step S2014 or step S2015 returns YES, a value (02H) indicating the setting change mode is recorded in the setting state management area (step S2030). Then, the setting values in the game control area of the main control RAM 1312, areas other than the setting state management area, and the stack area in the game control area are initialized (step S2031). After that, it is determined whether there is an abnormality in the game control area of the main control RAM 1312 (step S2032). Specifically, since the determination result in step S2010 described above is stored in the register, in step S2032, a determination can be made based on the determination result stored in the register.

When it is determined that there is an abnormality in the game control area of the main control RAM 1312, the flag register is saved to the stack area in the game control area (step S2033), and the RAM (work area and stack area) of the main control RAM 1312 used outside the game control area is initialized by the RAM abnormality initialization process (step S2034). Details of the RAM abnormality initialization process will be described later in FIG. 189. Then, the flag register saved in the stack area in the game control area is restored (step S2035).

Then, the functions of the devices (CTC, SIO, etc.) built into the main control MPU 1311 are initialized (step S2036), and a hardware random number (e.g., a winning/losing random number) built into the main control MPU 1311 is started (step S2037). Then, the power-on setting process is executed (step S2038). The details of the power-on setting process will be described later with reference to FIG. 194.

Finally, the timer interrupt is set to enabled (step S2039), and the process proceeds to the main control side main processing (Figure 188).

Figure 188 is a flowchart of the main control side main processing executed by the main control MPU 1311. The main control side main processing is executed after step S2039 of the power-on processing (Figure 187).

First, the main control MPU 1311 acquires the power outage warning signal and determines whether a power outage has occurred based on whether the power outage warning signal is ON (step S2040). If the power outage warning signal is not ON, power is being supplied normally, so random number update process 2 is executed (step 2041). Details of random number update process 2 will be described later in FIG. 195. In random number update process 2, random numbers other than the random numbers used to determine whether a special lottery or regular lottery has been won are mainly updated.

On the other hand, if a power failure warning signal is detected, the power failure process (steps S2042 to S2046) is executed. In the power failure process, a process is executed to back up data to restore the state before the power failure. Specifically, interrupts are first prohibited (step S2042). This prevents the timer interrupt process described later from being performed, prohibits writing data to the main control built-in RAM 1312, and protects the game information from being overwritten. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of the devices controlled by the output from each port (step S2043). Specifically, the power failure clear signal OFF bit data is output to the solenoid, power failure clear, and ACK output ports. Note that not all output ports need to be cleared. For example, output ports for controlling solenoids and motors that consume a lot of power may be cleared. By clearing these output ports, the power consumption until the main board side power failure process is completed is reduced, and the main board side power failure process can be completed reliably.

Then, the main control MPU 1311 calculates a checksum to determine whether the data stored in the work area to be backed up has been held correctly, and stores the checksum in a specified checksum storage area of the main control RAM 1312 (step S2044). This checksum is used to determine whether the data backed up in the work area is correct. The area for which the checksum is calculated should be the work area in the game control area, excluding the setting state management (setting value and value of the setting state management area) that may be changed between when the power is turned on and when the main processing on the main control side is executed, the backup flag, and the value of the checksum area.

Furthermore, a value (5AH) indicating that the power failure process has been normally executed is stored in the backup flag area as a power failure flag (step S2045). This completes the storage of the game backup information. Finally, RAM protection is enabled (write prohibited) and the prohibited area is disabled is written to the RAM protection register, writing to a specified area of the main control RAM 1312 is prohibited (step S2046), and the system waits until the power failure is restored (infinite loop). The main control MPU 1311 has a function of designating a use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. In order to release the reset function due to access to the prohibited area of the main control RAM 1312, the prohibited area is set to disabled, thereby making it possible to access all areas of the main control RAM 1312. Note that an unused area of the main control RAM 1312 may be designated as a prohibited area, the prohibited area may be enabled, and the main control MPU 1311 may be reset if access to the designated prohibited area is detected.

Figure 189 is a flowchart of the RAM initialization process executed by the main control MPU 1311 when an abnormality occurs in the RAM. The RAM initialization process when an abnormality occurs is executed in step S2034 of the power-on process (Figure 187).

First, the main control MPU 1311 stores the value of the stack pointer in the SP save buffer outside the game control area (step S2050), sets the stack pointer value outside the game control area to the stack pointer (step S2051), and stores all register values in the register save buffer outside the game control area (step S2052).

After that, it is determined whether the initialization is at the first power-on based on the value of the first power-on flag at the time of power-on (step S2053). The first power-on refers to the first time the power is turned on as a pachinko machine, and the time the power is turned on from a state in which the backup power is interrupted and the data backed up in the main control RAM 1312 is erased. For example, if the connection wire between the main control board 1310 and the backup power supply (installed, for example, in the main body frame 4) is disconnected, the supply of backup power to the main control RAM 1312 is cut off, and the data in the main control RAM 1312 can no longer be retained.

If it is initialization at the first power-on, proceed to step S2056. On the other hand, if it is not initialization at the first power-on, it is determined whether the discharged ball for the base calculation is outside the predetermined range (step S2054). If the discharged ball for the base calculation is outside the predetermined range, proceed to step S2056. On the other hand, if the discharged ball for the base calculation is within the predetermined range, it is determined whether the display parameters of the performance display monitor are within the normal range (step S2055). Then, if the display parameters of the performance display monitor are within the normal range, the RAM abnormality initialization process is terminated and the process from which it was called is returned to.

On the other hand, if the display mode of the performance display monitor is outside the normal range, 00H is written to all work areas outside the used area of the main control RAM 1312 to initialize them (step S2056), 00H is written to all stack areas outside the used area to initialize them (step S2057), a predetermined value (e.g., 5AH) is set as the power-on initialization flag (step S2058), and the process returns to the calling process.

Figures 190 and 191 are flowcharts of the timer interrupt processing executed by the main control MPU 1311.

First, the main control MPU 1311 sets the register bank selection flag to 1 and switches the register bank (step S2060). The main control MPU 1311 has two register groups used for calculations, one of which is used as the register group of bank 0 and the other is available as the register group of bank 1, and is configured so that the registers of both banks cannot be used without switching the banks. Register bank 0 is used in the main processing on the main control side, and register bank 1 is used in the timer interrupt processing. For this reason, an instruction to switch the bank to 1 is executed at the start of the timer interrupt processing, but it is not necessary to execute an instruction to switch the bank to 0 at the end of the timer interrupt processing. This is because the main control MPU 1311 stores the state of the bank in a flag register (for example, a register in which the Z flag and C flag are set), and the flag register is saved in the stack area at the start of the interrupt and is restored from the stack area by executing the RET command. For this reason, the bank flag of the register stored in the flag register is also restored by executing the RET command. If the bank status is not stored in the flag register, a bank switch command is executed at the end of the timer interrupt process to return to bank 0.

The flag register also stores a flag that controls whether interrupts are enabled, so there is no need to set it to interrupt enabled before executing the RET instruction. The flag that controls whether interrupts are enabled is set to interrupt disabled state after the flag register is stacked at the start of timer interrupt processing. Therefore, unless interrupts are enabled during timer interrupt processing (by using the EI instruction, for example) or the RETI instruction is executed, the interrupts will not be enabled.

Next, the LED common counter is incremented by +1. If the LED common counter value exceeds the upper limit, it is reset to 0 (step S2061).

Next, switch input process 1 is executed (step S2062). In switch input process 1, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, an ON edge is created, and the resulting signal is stored as input information in the input information storage area of the main control RAM 1312.

Switch input process 1 in step S2062 is a process related to a winning signal, and switch input process 2 in step S2080, which will be described later, is a process related to input from a fraud detection sensor (magnetic sensor, radio wave sensor, vibration sensor, etc.). For this reason, in the timer interrupt process executed in the setting change mode or setting confirmation mode, a NO determination is made in step S2604, so winning is detected but fraud is not detected. Even if a winning is detected, prize balls are not paid out and no variable display is performed. This is because setting change operations and setting confirmation operations are performed by hall employees, and fraud is not committed in the setting change mode or setting confirmation mode, so it is considered desirable not to detect fraud.

Note that even in the setting change mode or setting confirmation mode, some fraud detection sensors (e.g., radio wave sensors) may be used to detect specific types of fraud in switch input process 1. In this way, it is possible to detect fraud where a cheater tries to forcibly start the setting change mode by irradiating radio waves, etc.

Next, random number update process 1 is executed (step S2063). In random number update process 1, the random numbers for determining a jackpot, the random numbers for a jackpot pattern, and the random numbers for a small jackpot pattern are updated. In addition to these random numbers, the random numbers for determining the initial values of the random numbers for determining the jackpot pattern and the random numbers for determining the small jackpot pattern, which are updated in random number update process 2 of the main control main process shown in FIG. 188, are also updated.

It is then determined whether a value (00H) indicating the start of play has been recorded in the setting state management area (step S2064). If a value indicating the start of play has been recorded in the setting state management area, the process proceeds to step S2080 in FIG. 191. On the other hand, if a value indicating the start of play has not been recorded in the setting state management area, the LED common port is turned OFF (step S2065). By turning OFF the LED common signal at an early stage of the timer interrupt process, the time until the LED common signal is turned ON, i.e., the LED off time, is secured, the ghost phenomenon in which the display before and after the LED display change appears mixed, and LED flickering is prevented.

After that, a security signal is output from the external terminal board 784 (step S2066), and a test signal is output (step S2067). In step S2067, it is preferable to turn only the game status error signal ON and turn the others OFF.

Then, the setting process is executed (step S2068). Details of the setting process will be described later with reference to FIG. 192.

Then, the setting display process is executed (step S2069). Details of the setting display process will be described later with reference to FIG. 193.

Furthermore, a peripheral board command transmission process is executed to output the value of the transmission information storage area to the serial communication circuit (step S2070). The transmission information storage area is a storage area that temporarily stores the generated transmission command. The value (command) stored in the transmission information storage area is read out in step 2070 and stored in the transmission information storage area of the serial communication circuit (SIO). The serial communication circuit has a transmission information storage area that is a multi-byte FIFO-type transmission buffer, and sequentially transmits the values stored in the transmission information storage area to the peripheral control board 1510.

Then, a predetermined value (18H) is set in the watchdog timer clear register WCL to clear the watchdog timer (step S2071). Note that since the watchdog timer uses the simple clear mode, the watchdog timer is cleared by setting one word. Then, a return instruction (e.g. RETI) is issued to switch the register bank (step S2072), and the process before the interrupt is resumed.

Next, FIG. 191 will be described. When it is determined in step S2064 of FIG. 190 that a value indicating the start of the game is recorded in the setting state management area, the main control MPU 1311 executes switch input process 2 to detect the state of the sensor (switch) for detecting fraud (step S2080). Specifically, the detection signal from the magnetic detection switch 3024 that detects fraud using a magnet is read, and if a predetermined level (ON level or OFF level) continues for a predetermined time, it is stored in the input information storage area. Based on the detection state of each fraud detection sensor generated in switch input process 2, it is determined whether or not fraud has been detected in the fraud detection process of step S2084. In addition to fraud detection by the fraud detection sensor, the fraud detection process (step S2084) also determines winning abnormalities such as excessive winnings in the large winning hole and ordinary electric role.

Then, the timer update process is executed (step S2081). In the timer update process, for example, in addition to the time during which the special symbol display 1185 is lit according to the variable display pattern determined by the special symbol and special electric role control process, and the time during which the normal symbol display 1189 is lit according to the normal symbol variable display pattern determined by the normal symbol and normal electric role control process, the ACK signal input judgment time, which is set as a judgment condition when judging whether or not the payer ACK signal that informs the payout control board 951 that various commands transmitted by the main control board 1310 (main control MPU 1311) have been normally received, is managed. Specifically, when the variable display pattern or normal symbol variable display pattern has a variable time of 5 seconds, the timer interrupt period is set to 4 ms, so that the variable time is subtracted by 4 ms each time this timer subtraction process is performed, and the variable time of the variable display pattern or normal symbol variable display pattern is accurately measured by the subtraction result becoming a value of 0.

Next, the prize ball control process is executed (step S2082). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and the result is written to the main control RAM 1312. In addition, based on the result of the calculation of the number of prize balls, a prize ball command for paying out game balls is created, and a self-check command for checking the connection status between the main control board 1310 and the payout control board 951 is created. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data.

Next, the slot command reception process is executed (step S2083). In the dispensing control board 951, the dispensing control program transmits various 1-byte (8-bit) commands classified as status display (for example, slot status 1 command, error release navigation command, and slot status 2 command). On the other hand, as described below, the dispensing control program outputs an error occurrence command when an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the slot command reception process, when various commands are normally received as payer serial data, information to inform the payer control board 951 of this fact is stored in the output information storage area of the main control built-in RAM 1312. In addition, the main control MPU 1311 formats the command normally received as payer serial data into a 2-byte (16-bit) command (for example, slot status display command, error release notification command, etc.) and stores it in the above-mentioned transmission information storage area. Specifically, in the slot command reception process, in order to issue a notification corresponding to the command received from the dispensing control board 951, the command received from the dispensing control board 951 is modified to conform to the system of commands to be sent to the peripheral control board 1510, and stored in the transmission information storage area of the serial communication circuit (SIO) in the same way as other generated commands. In addition, when a command from the dispensing control board 951 is received normally, a signal is generated to control the output of the main ACK signal. The main ACK signal is output directly to the dispensing control board 951 from the output port, not from the serial communication circuit.

Next, a fraud detection process is executed (step S2084). In the fraud detection process, abnormal conditions related to fraud (magnetism, vibration, winning abnormality, etc.) are checked. For example, when the input information is read from the input information storage area described above, and the count switch detects that a game ball has entered the big winning slots 2005, 2006 when the big winning game state is not in progress, the main control program creates a winning abnormality display command that is classified as a notification display as an abnormal condition, and stores it in the transmission information storage area described above as transmission information.

Next, a switch passing command output process is executed to create a corresponding command when the passing of various switches related to the winning switch and the starting switch is detected, and set the command in the transmission information storage area (step S2085).

Then, the flag register is saved to a stack area in the game control area (step S2086), and the base display output process is executed (step S2087). Unlike other processes, the base display output process is executed using a second area outside the game control area, and is a common process that is not affected by the specifications of the pachinko machine 1. Therefore, to ensure the independence of the base display output process, predetermined data such as the flag register is saved to a stack area in the game control area before and after the execution of the base display output process, so that it is not updated by the base display output process. After that, the flag register saved in the stack area in the game control area is restored (step S2088).

Next, the special symbol and special electric device control process is executed (step S2089). In the special symbol and special electric device control process, it is determined whether the random number value for the big win matches the winning judgment value previously stored in the main control built-in ROM, and it is determined whether to transition to a probability variation state based on the random number value of the big win symbol. Then, if the random number value for the big win matches the winning judgment value, it is determined whether to open or close the big prize openings 2005 and 2006. If the big prize openings 2005 and 2006 are opened or closed by this decision, the big prize openings 2005 and 2006 are opened (or expanded), and the big prize openings 2005 and 2006 are in a game state in which game balls can be received, and the game state transitions to a game state that is advantageous to the player. In addition, if the probability variation transition condition is established, the game state transitions to a probability variation state, while if the probability variation transition condition is not established, the game state transitions to a game state other than the probability variation state. Here, the "variable probability state" refers to a state (high probability state) in which the probability of winning the special lottery described above is set relatively high compared to the normal game state (low probability state).

Next, the normal symbol and normal electric device control process is executed (step S2090). In the normal symbol and normal electric device control process, the input information is read from the input information storage area described above, and it is determined whether or not a detection signal from the gate switch 2352 has been input to the input terminal. If a detection signal has been input to the input terminal, a random number for determining whether or not a normal symbol has been hit is extracted, and it is determined whether or not it matches the normal symbol hit determination value previously stored in the main control built-in ROM (called a "normal lottery"). Then, depending on the result of the normal lottery, it is determined whether or not to open or close the second start port door member 2549. If the opening and closing operation is performed based on this determination, the second start port door member 2549 is opened (or expanded), and the game state becomes one in which the game ball can be received by the start port 2004, and the game state transitions to one that is advantageous to the player.

Next, the output data setting process is executed (step S2091). In the output data setting process, various signals are output from the output terminals of the various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are normally received from the output terminal of a predetermined output port of the main control MPU 1311 based on the output information, a main payout ACK signal is output to the payout control board 951, and when a jackpot game is in progress, a drive signal is output to the attacca solenoids (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556) that open and close the opening and closing members 2107 of the large winning openings 2005 and 2006, and a drive signal is output to the start port solenoid 2550 that opens and closes the start port (second start port door member 2549). In addition, various information (game information) signals related to the game, such as probability fluctuation information output signal, special pattern display information output signal, normal pattern display information output signal, time reduction information output signal, start port winning information output signal, etc., and security signals are output to the external terminal board 784 as output information to the hall computer.

In addition, in the output data setting process, a signal corresponding to the number of out balls counted in switch input process 2 (step S2080) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 for every predetermined number of out balls (e.g., 10 balls).

The output data setting process also sets test signals to be output to an inspection device connected to the pachinko machine 1. Test signals include, for example, signals indicating the game status and signals indicating the stopping patterns of normal and special symbols.

Then, proceed to step S2070 in FIG. 190.

Figure 192 is a flowchart of the setting process. The setting process is executed in step S2068 of the timer interrupt process when the setting status management area is not a value (00H) indicating the normal game status, and mainly executes processing to change the setting value.

First, the main control MPU 1311 determines whether a value (08H) indicating a RAM abnormality is recorded in the setting status management area (step S2100). If a value indicating a RAM abnormality is recorded in the setting status management area, the process returns to the calling process without executing the setting process.

If a RAM abnormality is detected, the setting process will be executed repeatedly, and processing related to special and normal symbols will not be executed, making it impossible to play. This RAM abnormality can be resolved by turning the power off to perform power outage processing, and then using the setting key 971 and RAM clear switch 954 to start the setting change mode when the power is turned back on, which will put the machine into the setting change state and clear the RAM abnormality. The setting change mode can then be ended by returning the setting key 971 to its original position, allowing normal play to begin.

In addition, when the power is turned back on, if any operation other than starting the setting change mode with the setting key 971 and RAM clear switch 954 is performed, the value (08H) indicating a RAM abnormality in the setting status management area will be maintained, the RAM abnormality state will continue, and normal gameplay cannot be started. In other words, in order to resolve the RAM abnormality and return to normal gameplay, it is necessary to go through the setting change mode.

On the other hand, if no value indicating a RAM abnormality is recorded in the setting status management area, it is determined whether the setting key 971 has returned to the OFF position (step S2101). Specifically, it detects whether a predetermined period of time has passed since the setting key 971 changed from ON to OFF or from ON to OFF.

When it is determined that the setting key 971 has returned to the OFF position, the output time is set in the security signal output timer (step S2102), the setting status management area is initialized (step S2103), the power-on setting process is executed (step S2104), and the process returns to the caller.

When an operation to end the setting change mode is performed (setting key 971 is turned OFF), an output time value is set in the security signal output timer, providing a delay time until the security signal is turned OFF after the setting change mode ends. Therefore, even if the setting change mode or setting confirmation mode ends in a short time (for example, within a single timer interrupt process), the shortest output signal of the security signal can be secured for the amount of time set as the output time value in the security signal output timer, and the hall computer can reliably detect the security signal.

In addition, if fraud is detected during the delay time until the security signal is turned OFF, it is advisable to maintain the security signal and output the security signal for a period or time corresponding to the newly detected fraud.

Furthermore, if a power outage occurs during the delay time until the security signal is turned OFF, when a hot start is performed in normal game mode when power is restored, a security signal for the remaining time is output, but when the RAM is cleared by operating the RAM clear switch or due to a RAM abnormality, the security signal for the remaining time is not output. This is because the initialization of the main control RAM 1312 resets the security signal output timer value, and the output of the security signal stops.

When power is turned on after a power outage occurs while a security signal is being output, the device will enter one of five modes: hot start, RAM clear, setting change mode, setting check mode, or continued RAM abnormal state.

When switching to setting change mode or setting confirmation mode, the activated mode ends and a security signal is output until the delay time has elapsed. If the RAM abnormality continues, a security signal is output due to the continuing RAM abnormality, since no setting changes have been made even after power is restored. In the case of a hot start, a security signal is output for the remaining time.

Even when the security signal is continuously output, the output of the security signal is stopped by a power-on reset signal when the power is turned on, and after a predetermined time (e.g., during the startup waiting time of the peripheral control board 1510) has elapsed, the process shifts to timer interrupt processing, and the output of the security signal is resumed. In other words, even when the security signal is continuously output after a power outage occurs in the following cases, a predetermined period of time after the power is restored is set during which the output of the security signal is stopped.
- When a power outage occurs while a security signal is being output due to fraud detection, etc., and then power is restored with a hot start; - When a power outage occurs while a security signal is being output due to a RAM abnormality, then power is restored and the RAM abnormality continues; - When a power outage occurs while a security signal is being output in setting change mode, then power is restored and the setting change mode continues; - When a power outage occurs while a security signal is being output in setting check mode, then power is restored and the setting check mode continues.In this way, even when the security signal continues to be output after a power outage occurs while a security signal is being output, by stopping the output of the security signal for a predetermined period of time after power is restored, the hall computer can determine whether there was an abnormality in the security signal or whether the state associated with the output of the security signal has been lifted.

In addition, in the setting confirmation mode where only the setting key 971 is operated, the security signal is output until the setting confirmation mode ends, regardless of the remaining time for which the security signal is output, and the output of the security signal stops after the setting confirmation mode ends and the delay time has elapsed. In the setting change mode where the setting key 971 and RAM clear switch 954 are operated, the same processing as in the setting confirmation mode may be performed.

On the other hand, if it is determined that the setting key 971 has not returned to the OFF position, it is determined whether a value (02H) indicating a setting change has been recorded in the setting status management area (step S2105), and whether the setting change switch 972 has been operated (step S2106). The setting change switch 972 may also be configured to double as the RAM clear switch 954. As a result, if a value indicating a setting change has been recorded in the setting status management area and it is determined that the setting change switch 972 has been operated, the setting value is updated by +1. If the setting value exceeds the upper limit of 6, it is set to 1 (step S2107). Thereafter, the process returns to the calling process.

On the other hand, if it is determined that no value indicating a setting change has been recorded in the setting status management area (i.e., the setting confirmation mode is active) or that the setting change switch 972 has not been operated, the setting value is not updated and the process returns to the calling process.

When determining whether the setting change switch 972 is operated (immediately before or immediately after), it may be determined whether the setting key 971 is operated to ON. In this way, by determining whether the setting key 971 is operated when the setting change switch 972 is operated, it is possible to prevent the setting from being changed by operating the setting change switch 972 even if the setting change mode is set when a power outage occurs and the setting key 971 is not operated to ON when the power is restored.

Figure 193 is a flowchart of the setting display process. The setting display process is executed in step S2069 of the timer interrupt process.

First, the main control MPU 1311 determines whether a value (08H) indicating a RAM abnormality is recorded in the setting status management area (step S2110). If a value indicating a RAM abnormality is not recorded in the setting status management area, the output of the LED segment terminal is set so that the current setting value is displayed on the base display 1317 (step S2111). On the other hand, if a value indicating a RAM abnormality is recorded in the setting status management area, the output of the LED segment terminal is set so that an error is displayed on the base display 1317 (step S2112).

Then, an LED common signal corresponding to the LED common counter is output (step S2113), and the driver is driven to output display data (segment signal) corresponding to the set value or error display to the base display 1317 (step S2114), and the process returns to the calling process.

Figure 194 is a flowchart of the power-on setting process. The power-on setting process is a subroutine that is called and executed in step S2038 of the power-on process (Figure 187) and in step S2104 of the setting process.

First, the main control MPU 1311 creates a power-on operation command and sets the created command in the transmission information storage area (step S2120). The power-on operation command is a command that notifies the contents recorded in the setting status management area, as shown in FIG. 202 (A).

Next, the bit corresponding to the setting key 971 in the input level data 2 area and the bit corresponding to the setting change switch 972 are set to their initial value of 1. It is advisable to set other bits to 0 (step S2121). The bit corresponding to the setting key 971 in the input level data 2 area and the bit corresponding to the setting change switch 972 are set to 1 so that the bit of the switch is detected as 1 at the time of the next timer interrupt, preventing an ON edge from being created by mistake.

Then, it is determined whether a value (00H) indicating a state in which game play can be started is recorded in the setting status management area (step S2122). If a value indicating a state in which game play can be started is not recorded in the setting status management area, the device is in setting change mode, setting confirmation mode, or has a RAM abnormality, so the power-on setting process is terminated and the process returns to the calling device.

On the other hand, if a value (00H) indicating a state in which game play can be started is recorded in the setting status management area, normal game play can be started, so the work area in the game control area is initialized depending on whether the main control RAM 1312 has been initialized (step S2123).

Then, a power-on state command is created, and the created command is stored in the transmission information storage area (step S2124). The power-on state command is a command that notifies whether or not normal play can be started based on the contents recorded in the setting state management area, as shown in FIG. 202 (B).

Then, a power-on return destination command is created, and the created command is set in the transmission information storage area (step S2125). The power-on return destination command is a command that notifies the game status related to the special symbol, as shown in FIG. 202 (C).

Furthermore, a setting value command is created and the created command is set in the transmission information storage area (step S2126). The setting value command is a command that notifies the setting value, as shown in FIG. 202 (D).

A special symbol pending number command indicating the number of pending special symbol variable display games may be sent together with the power-on state command, power-on return destination command, and setting value command to restore the pending number display on the function display unit 1400 and main LCD display device 1600 to the state it was in before the power outage. The special symbol pending number command may be sent after the power-on state command, power-on return destination command, and setting value command, before these commands, or during the transmission of these commands.

Then it returns to the calling process.

The power-on setting process is executed when the power is restored from a power outage and the mode is neither setting change mode nor setting confirmation mode, or when the setting change mode or setting confirmation mode ends. Therefore, the commands mentioned above (power-on operation command, power-on state command, power-on return destination command, and setting value command) are sent when the power is restored from a power outage and the mode is neither setting change mode nor setting confirmation mode, or when the setting change mode or setting confirmation mode ends.

Figure 195 is a flowchart of random number update process 2. Random number update process 2 is executed in step S2041 of the main process (Figure 188), and mainly updates random numbers other than the random numbers used to determine winnings in special lotteries and regular lotteries.

First, the main control MPU 1311 sets interrupt prohibition (step S2131), updates the initial value random number (step S2132), and sets interrupt permission (step S2133). The initial value random number is also updated in random number update process 1 in step S2063 of the timer interrupt process, so to prevent the initial value random number update process from being interrupted by the timer interrupt process, interrupts are prohibited before the initial value random number update process and interrupts are permitted after the initial value random number update process. The initial value random number is a random number for changing the initial value for each cycle, such as the random number for determining a jackpot for drawing a jackpot for a special pattern, the winning random number for drawing a jackpot for a normal pattern, and the random number that determines the type of pattern when a special pattern is hit (low probability/high probability/time-saving/non-time-saving, etc.).

Then, the random numbers other than the winning/losing random number (excluding the initial value random number) are updated (step S2134), and the process returns to the calling process.

Figure 196 is a flowchart of another example of timer interrupt processing executed by the main control MPU 1311. Note that the same processing steps as those in the timer interrupt processing described above in Figures 181 and 182 are given the same reference numerals, and detailed explanations thereof are omitted.

In the modified example 1 described below, the main control RAM 1312 may be initialized in the setting confirmation mode as well as in the setting change mode. In this modified example 1, if operation of the setting key 971 is detected when the power is restored, the main control RAM 1312 is initialized in both the setting change mode and the setting confirmation mode, so the RAM clear switch 954 does not switch between the setting change mode and the setting confirmation mode, but only has the function of changing the setting value.

First, the main control MPU 1311 sets the register bank selection flag to 1, switches the register bank (step S2060), and executes switch input process 3 (step S2141). Details of switch input process 3 will be described later in FIG. 197. Note that in step S2141, switch input process 1 of S2062 may be applied instead of switch input process 3 described in FIG. 197.

Then, random number update process 1 is executed (step S2063), and setting change/confirmation process is executed (step S2142). Details of the setting change/confirmation process will be described later with reference to FIG. 200.

Next, switch input process 2 is executed (step S2080), timer update process is executed (step S2081), and prize ball control process is executed (step S2082). Next, frame command reception process is executed (step S2083), fraud detection process is executed (step S2084), and switch passing command output process is executed (step S2085).

Then, the flag register is saved to the stack area in the game control area (step S2086), the base display output process is executed (step S2087), and the flag register saved to the stack area in the game control area is restored (step S2088). Next, the special symbol and special electric device control process is executed (step S2089), the normal symbol and normal electric device control process is executed (step S2090), and the output data setting process is executed (step S2091). Furthermore, the peripheral board command transmission process is executed (step S2070), the watchdog timer is cleared (step S2071), and the register bank is switched by a return command (e.g., RETI) (step S2072), and the process before the interrupt is restored.

Figure 197 is a flowchart of switch input processing 3. Switch input processing 3 is executed in step S2141 of the timer interrupt processing, and reads various signals input to the input terminals of various input ports of the main control MPU 1311, creates an ON edge, and stores it as input information in the input information storage area of the main control RAM 1312.

First, the main control MPU 1311 sets the top address of the switch winning information data (step S2160), and obtains the number of times the process is to be repeated from the switch winning information data (step S2161). The number of times the process is to be repeated is the number n of blocks in the switch winning information data table. Then, the input port address specified in the switch winning information data is obtained (step S2162), and the input level data area address specified in the switch winning information data is obtained (step S2163). Furthermore, the input information is read from the obtained input port address (step S2164), and the read input information is corrected using the logical correction value specified in the switch winning information data (step S2165).

Then, by referring to the value recorded in the setting status management area, it is determined whether the mode is the setting change mode or the setting confirmation mode (step S2166). Then, if the mode is not the setting change mode or the setting confirmation mode, the correction value is masked with the mask value during normal play specified in the switch winning information data (step S2167). This mask makes it possible to obtain the bit of the input port to be used during normal play.

On the other hand, if the mode is the setting change mode or the setting confirmation mode, the correction value is masked with the mask value during the setting change/confirmation specified in the switch winning information data (step S2168). This mask makes it possible to obtain only the bits of the input port that are used in the setting change mode or the setting confirmation mode.

Then, input level data is generated from the bits obtained by the masking process, and the input level data area specified by the switch winning information data is updated (step S2169).

Then, edge data for the change from OFF to ON is generated from the input level data, and the input edge data area specified by the switch winning information data is updated (step S2170).

Then, the switch winning information data is set in the next block (step S2171), and it is determined whether processing of all switch input ports has been completed (step S2172). If it is determined that processing of all switch input ports has not been completed, the process returns to step S2162 and the next input port is processed. On the other hand, if it is determined that processing of all switch input ports has been completed, switch input processing 3 is terminated and processing returns to that before the interrupt.

Figure 198 (A) shows an example of the configuration of a switch winning information data table.

The switch winning information data table shown in FIG. 198 (A) is divided into n blocks (n is the number of times the process is repeated), and each block contains an input port address, a logical correction value, a mask value during normal play, a mask value during setting change/confirmation, and an address of the input level data area.

Figure 198 (B) shows an example of the configuration of the switch input level/edge data area.

The switch input level/edge data area contains n pairs of addresses of the input level data area and the input edge data area.

The address of the input edge data area is set to the next address of the input level data area as shown in the figure, so it is not specified in the switch winning information data. If the input level data area and the input edge data area are not placed consecutively, the address of the input edge data area will be set in the same table along with the input level data area. The addresses of the input level data area and the input edge data area are 16-bit (2-byte) values, but the value set as the address of the input level data area and the input edge data area set in the switch winning information data table may be the lower 8-bit (1-byte) value. In other words, since the upper byte of the address is a fixed value that does not change with the value of the input level data area or the input edge data area, the upper byte is the upper byte of the address of the RAM area, and since only the lower byte needs to be set, the data capacity can be reduced.

Figure 199 shows another example of the configuration of the switch winning information data table, where Figure 199(A) shows an example of the configuration of the switch winning information data table used in normal gameplay, and Figure 199(B) shows an example of the configuration of the switch winning information data table used in setting change mode and setting confirmation mode.

The switch winning information data table shown in FIG. 199 is divided into n blocks (n is the number of times the process is repeated), and each block includes an input port address, a logical correction value, a mask value, and an address of the input level data area. The switch winning information data table used in the normal game state and the switch winning information data table used in the setting change mode and the setting confirmation mode include ports with different logical correction values and mask values. In other words, the switch winning information data table shown in FIG. 198(A) has different mask values in the setting change mode (and setting confirmation mode) and the normal game state, but the switch winning information data table shown in FIG. 199 uses different switch winning information data tables in the setting change mode (and setting confirmation mode) and the normal game state, making it possible to obtain different switch winning information data.

To accommodate this configuration, switch input process 3 (Fig. 197) is modified as follows. For example, in step S2160, it is determined whether the mode is the setting change mode (or the setting confirmation mode) or the normal game mode, and the top address of the switch winning information data is set according to the determination result. Then, in step S2166, without determining whether the mode is the setting change mode or the setting confirmation mode, in step S2167, the correction value is masked with the mask value specified in the switch winning information data.

Figure 200 is a flowchart of the setting change/confirmation process. The setting change/confirmation process is executed in step S2142 of the timer interrupt process. In the setting change/confirmation process shown in Figure 200, the same processing steps as in the timer interrupt process described above in Figures 181 and 182 are given the same reference numerals, and detailed explanations thereof are omitted.

First, the main control MPU 1311 determines whether a value (00H) indicating the start of play is recorded in the setting status management area (step S2064). If a value indicating the start of play is recorded in the setting status management area, the setting change/confirmation process is terminated and the process before the interruption is resumed. On the other hand, if a value indicating the start of play is not recorded in the setting status management area, the LED common port is turned OFF (step S2065), a security signal is output from the external terminal board 784 (step S2066), and a test signal is output (step S2067). Then, the setting process (Figure 192) is executed (step S2068), and the setting display process (Figure 193) is executed (step S2069).

Figure 201 (A) shows an example of the configuration of switch input port 2.

The switch input port 2 is one of a group of ports to which the outputs of various switches and sensors are input, and is composed of 8 bits. In the example shown, bit 7 detects an acknowledgement signal (ACK) from the dispensing control board 951 at level 1. Bit 6 detects a power outage warning signal from the power outage monitoring circuit at level 0. Bit 5 changes the signal level to 1 when the RAM clear switch 954 is operated. Bit 4 changes the signal level to 0 when the setting key 971 is turned ON. Bit 3 changes the signal level to 1 when the door open sensor detects the opening of the door frame 3. Bit 2 changes the level to 0 when the magnetic detection switch (magnetic detection sensor) detects magnetism. Bits 1 and 0 are not used.

Figure 201 (B) shows an example of the configuration of the setting status management area.

As shown in FIG. 201(B), the setting status management area is a 1-byte memory area in which the operating mode of the pachinko machine 1 is recorded, and for example, the lower 4 bits are used and the upper 4 bits are undefined. Specifically, 00H is recorded in normal game mode, 01H in setting confirmation mode, 02H in setting change mode, and 08H if there is an abnormality in the main control RAM 1312.

The setting status management area is not updated to 00H by the RAM clear process performed by operating only the RAM clear switch 954, and the current value is maintained. It is also updated from 01H to 00H when the setting confirmation mode ends, and from 02H to 00H when the setting change mode ends. Furthermore, if there is an abnormality in the main control RAM 1312, it is updated from 08H to 02H when the setting change mode is entered by a setting change operation at the next power-on, and is updated from 02H to 00H when the setting change mode ends.

Figure 202 (A) is a diagram showing an example of the configuration of a power-on operation command. The power-on operation command is a command that notifies the contents recorded in the setting state management area. For example, the power-on operation command is composed of two bytes, with the upper byte being A0H and the lower byte indicating the contents recorded in the setting state management area. The value of the lower byte stores the value of the setting state management area plus 1. This is because during normal play, the value of the setting state management area is 00H, and so if the value sent as a command is 00H, it cannot be distinguished from a hardware abnormality that results in an output of 0, so one of the bits is set to 1.

The power-on operation command is generated at least once during power-on processing. Specifically, it is generated once for hot start, RAM clear, and RAM abnormality, and twice in setting change mode and setting confirmation mode, once during power-on processing and once when setting change/confirmation is completed.

When the peripheral control board 1510 receives the power-on operation command, it issues a notification in the manner described above depending on the status of the setting confirmation mode, setting change mode, or RAM abnormality (see FIG. 184).

If the peripheral control board 1510 receives a game command during normal play without receiving A001H as a power-on operation command, the game state may be inconsistent, so the received game command is determined to be invalid and no game action (such as a performance) for that game command is initiated. However, if a certain condition is met (for example, a game command during normal play is sent a certain number of times in succession), the peripheral control board 1510 may have missed the power-on operation command (A001H), so it is advisable to cancel the invalidation of the received game command and perform a performance corresponding to the game command.

When the game command is disabled, the game command that satisfies a predetermined condition may be performed (for example, the movement of the symbols, the lamps, the movable body, the sound, etc. may be performed according to the received command), and the background of the display device or a predetermined lamp may be used to notify that an inconsistency in the game state has occurred. The game state inconsistency may also be notified at a low volume. This is to prevent possible trouble in the hall, as players who do not understand that an inconsistency in the game state has occurred unless any performance is performed until the predetermined condition is met may think that the pachinko machine 1 is broken, such that the special symbol variable display game does not start even if the starting hole is won. Note that even if the peripheral control board 1510 disables the game command, the main control board 1310 is executing normal game processing, so the function display of the special symbols, normal symbols, etc. on the function display unit 1400 is displayed normally.

Figure 202 (B) is a diagram showing an example of the configuration of a power-on state command. The power-on state command is a command that notifies whether normal play can be started based on the contents recorded in the setting state management area. For example, the power-on state command is composed of two bytes, and if the upper byte is 30H and the lower byte is 01H, it indicates that normal play can be started. The lower byte of the power-on state command may be used to notify the series code for each type of pachinko machine. For example, using bits 6 to 4, eight types of series can be identified. The power-on state command may be another example shown in Figure 220 (C). By using the power-on state command shown in Figure 220 (C), the information recorded in the power-on buffer (the game state before the power outage) can be notified to the peripheral control board 1510.

Figure 202 (C) is a diagram showing an example of the configuration of a power-on return destination command. The power-on return destination command is a command that notifies the game status related to the special symbol. For example, the power-on return destination command is composed of two bytes, with the upper byte being 31H and the lower byte indicating the game status related to the special symbol. The power-on return destination command notifies the state of the special symbol and the operating state of the special electric device at the time of the power outage. The power-on return destination command is sent once when the power is turned on.

Figure 202 (D) is a diagram showing an example of the configuration of a setting value command. The setting value command is a command that notifies the setting value. For example, the setting value command is composed of two bytes, with the upper byte being A1H and the lower byte indicating the setting value. The setting value command is transmitted when the power is restored when the setting change mode or setting confirmation mode is not in effect, when the setting change mode or setting confirmation mode is ended, and when the power is restored when the setting change mode or setting confirmation mode is ended. The setting value command is also transmitted when the special pattern starts to change or when the game state changes (when a jackpot, a probability hit, a time reduction, etc. starts and ends). As a result, even if the peripheral control board 1510 misses receiving the setting value command transmitted when the power is turned on, the setting value is changed to the correct setting value in the subsequent game (for example, when the special pattern starts to change), so that a performance based on an incorrect setting value is not performed. A performance based on a setting value is a performance that suggests a setting value using a performance device such as a display, lamp, sound, or movable object, and suggests a setting value by generating a performance mode that is difficult to occur (or does not occur) under normal circumstances with a predetermined probability. This setting value suggestion effect may be other than the effects exemplified below, and may also include false effects. As a setting value suggestion effect, the main liquid crystal display device 1600, which is an example of a display device, may display a notice or the like corresponding to the setting value, or the pattern change mode may be changed from normal (for example, the timing at which the left, right, and center patterns start to change or are confirmed may be different from normal (normally, each pattern starts to change at the same time, and in the case of a high setting, the patterns start to change in the order left, center, and right)), or, when audio is used, a notification sound corresponding to the setting value may be generated with a certain probability when the starting hole is won, or a different sound may be generated during the effect than normal (such as a male voice during normal times and a female voice at a high setting), etc.

Figure 203 shows commands sent from the main control board 1310 to the peripheral control board 1510 in various states. In the following explanation, n is a counter value indicating the processing state related to the special symbol/special electric role, and m is a value corresponding to the set value.

As shown in the figure, in a hot start where the normal game mode is activated, the following commands are sent in this order: power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (310nH) → setting value command (A10mH).

When the main control RAM 1312 is initialized by operating only the RAM clear switch 954, the following commands are sent in this order: power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (3101H) → setting value command (A10mH).

In addition, in the setting change mode, first the power-on operation command (A003H) is sent, then the setting value is changed in the setting change mode, and after the setting key 971 is returned to its normal position, the power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (3101H) → setting value command (A10mH) are sent in this order.

In addition, in the setting confirmation mode, first the power-on operation command (A002H) is sent, then the setting value is confirmed and the setting key 971 is returned to its normal position, after which the following are sent in the order of power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (310nH) → setting value command (A10mH).

In addition, in the event of a RAM abnormality, first the power-on operation command (A009H) is sent, and when power is restored after a power outage, the setting change mode is activated by a setting change operation (setting key 971 and RAM clear switch 954 are on), and the power-on operation command (A003H) is sent. Then, after returning the setting key 971 to its normal position, the following are sent in this order: power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (3101H) → setting value command (A10mH).

When a RAM abnormality occurs, first the power-on operation command (A009H) is sent, and if no setting change operation is performed when power is restored after a power cut, the RAM abnormal state continues and the power-on operation command (A009H) is sent. After that, after returning the setting key 971 to its normal position, the following are sent in this order: power-on operation command (A001H) → power-on state command (3001H) → power-on return destination command (3101H) → setting value command (A10mH).

As explained above, when the main control board 1310 starts up in the normal game mode, a group of commands (a combination of multiple commands in a predetermined order) indicating the return of power is sent to the peripheral control board 1510 at a predetermined timing. Therefore, after the entire series of commands from A001H to A10mH has been received, it is determined that the normal game mode can be started, and if some of the commands in the series cannot be received (missed), it is determined that the normal game mode cannot be started, and a notification is issued that the normal game mode cannot be started.

In other words, similar to the presentation when the game command is disabled as described above, presentations that satisfy predetermined conditions among the received game commands are presented (for example, presentations that correspond to the received command in terms of the movement of symbols, lamps, movable objects, sounds, etc.), and the background of the display device or predetermined lamps may be used to notify that an inconsistency has occurred in the game state.

If the peripheral control board 1510 does not receive a setting value command, it may start normal play by using the setting value command sent at the start of the special pattern change display game to make up for the setting value command that was missed when the power was turned on.

In addition, if the peripheral control board 1510 does not receive a setting value command, it may set the setting value to a predetermined initial value (e.g., setting 1) when the peripheral control board 1510 is powered on, and when it receives a setting value command, it may update the setting value to the setting value corresponding to the received command.

Note that the power-on operation command (A0001H) and power-on status command (3001H) both notify the user that normal gameplay can begin, and are usually sent consecutively, so it is sufficient to send either one of them to the main control board.

Figure 204 shows the state transition of the values set in the setting status management area from the state before power was cut off to the state after power is restored.

The behavior of a pachinko machine with a setting function when it is turned on varies depending on whether the RAM clear switch 954 is operated and whether the setting key 971 is operated, and there are several patterns that take into consideration measures to prevent fraud and the convenience of users (hall employees).

<Pattern 1>
An example of operation will be described below in the case shown in Fig. 204 (A) where the normal game state (VALID_PLAY = 00H) was observed at the time of the previous power outage and the main control RAM 1312 is normal when the power is restored. First, if the RAM clear switch 954 is turned ON when the power is turned on and the setting key 971 is turned ON, the main control RAM 1312 initializes the area used as the game control area including the entire stack area other than the setting value and the base value. The main control MPU 1311 also starts up in the setting change mode and the value of the setting status management area is updated to 02H. The base display 1317 also displays the setting value associated with the setting change.

If the RAM clear switch 954 is not operated (OFF) when the power is turned on and the setting key 971 is operated ON, the contents stored in the main control RAM 1312 are not initialized. The main control MPU 1311 also starts up in setting confirmation mode, and the value in the setting status management area is updated to 01H. The base display 1317 also displays the current setting value to confirm the setting.

When the RAM clear switch 954 is turned ON and the setting key 971 is not operated (OFF) when the power is turned on, the main control RAM 1312 initializes the area used as the game control area, including the entire area stack area other than the setting value and base value. The main control MPU 1311 also starts up in a normal game state, and the value of the setting state management area is maintained at 00H. The base display 1317 also displays a display indicating that it has been switched to performance display as the initial display when the power is turned on (for example, all flashes for 5 seconds), and then displays the base value that represents the performance of the pachinko machine.

When the RAM clear switch 954 is not operated (OFF) and the setting key 971 is not operated (OFF) when the power is turned on, the contents stored in the main control RAM 1312 are maintained as they were before the power outage. Even if all the contents stored in the game control area of the main control RAM 1312 are not maintained, at least the areas storing information for returning to the game state before the power outage (storage areas storing information about the game (areas related to special patterns, normal patterns, areas related to prize balls, random numbers generated by the program (variable pattern random numbers, initial value random numbers, etc.))) are maintained, and the areas storing information not necessary for returning to the game state before the power outage may be in a different state from before the power outage after the power is restored. In addition, the main control MPU 1311 starts up in the normal game state, and the value of the setting state management area is maintained at 00H. The same value (00H) may be set regardless of the original value. In addition, the base display 1317 displays a display indicating that it has been switched to performance display as the initial display when the power is turned on (for example, blinking for 5 seconds), and then displays a base value that represents the performance of the pachinko machine.

<Pattern 2-1>
As shown in FIG. 204(B), in operation example 1 in which the setting change mode was active at the time of the most recent power outage and the main control RAM 1312 is normal when the power is restored, the main control RAM 1312 initializes the area used as the game control area including the stack area other than the setting value and the base value, regardless of whether the RAM clear switch 954 is operated or not when the power is turned on, or whether the setting key 971 is operated or not. Also, the main control MPU 1311 starts up in the setting change mode, and the value of the setting status management area is maintained at 02H. Note that the same value (02H) may be set regardless of the original value. Also, the base display 1317 displays the setting value associated with the setting change.

In the initialization of the main control RAM 1312 in pattern 2-1, it is sufficient to initialize the area used as the game control area including the stack area in addition to the memory area initialized by the initialization process already executed when the power outage occurred. For example, if the power is cut off during the initialization process of the main control RAM 1312, it is sufficient to initialize the remaining memory area for which the initialization process has not been completed. On the other hand, regardless of the progress of the initialization process at the time of the power outage, it is also possible to initialize the area used as the game control area including the stack area of the main control RAM 1312 after the power is restored.

If a power outage occurs during the initialization process, it is advisable to provide an area (e.g., a RAM clearing process in progress flag) that stores whether the main control RAM 1312 is undergoing initialization process, and to prohibit writing data to the memory area that is the target of the initialization process while the RAM clearing process in progress flag is set.

The process of monitoring for power outages may also be executed repeatedly in the setting change mode or setting confirmation mode. For this reason, in addition to the main loop (steps S36 to S40 in FIG. 22), the power outage warning signal may be monitored, for example, by a timer interrupt.

The power outage monitoring process and power cut process may be executed by a common process in the setting change mode, the setting confirmation mode, and the normal game mode, or may be executed by separate processes, or may be executed by a common process in the setting change mode and the setting confirmation mode and by separate processes in the normal game mode. In other words, the power outage monitoring process and power cut process may be common in at least two of the three or more states (operation modes) in the operation of the pachinko machine.

As explained above, in pattern 2-1, when power is cut off in setting change mode and the main control RAM 1312 is normal when power is restored, the device always starts in setting change mode regardless of whether the setting key 971 or RAM clear switch 954 is operated. For example, if a power outage occurs while a setting change is being performed in a hall, it is desirable for the setting change mode to start when power is restored. However, it is possible that the setting key 971 or RAM clear switch 954 to start the setting change mode is not operated when power is restored. For this reason, by controlling as in pattern 2-1, it is possible to prevent an unintended state (different from the setting change mode) from occurring when power is restored.

For example, if only the setting key 971 is operated (RAM clear switch 954 is not operated) when the power is restored, the machine will start up in setting confirmation mode rather than setting change mode, or if only the RAM clear switch 954 is operated (setting key 971 is not operated), the main control RAM 1312 will be initialized and the normal game mode will start up, or if no switches are operated, the normal game mode will start up. However, if controlled as in pattern 2-1, the machine will always start up in setting change mode regardless of whether the setting key 971 or RAM clear switch 954 is operated.

<Pattern 2-2>
If the setting change mode was selected when the power was shut off immediately before, and the main control RAM 1312 is normal when the power is restored, the main control RAM 1312 may operate in a different pattern shown in FIG. 204(C) instead of the pattern 2-1. If the RAM clear switch 954 is turned ON when the power is turned on, and the setting key 971 is turned ON, the main control RAM 1312 initializes the area used as the game control area, including the stack area other than the setting value and the base value. The main control MPU 1311 also starts up in the setting change mode, and the value of the setting status management area is maintained at 02H. The same value (02H) may be set regardless of the original value. The base display 1317 also displays the setting value associated with the setting change.

In cases other than those described above, where at least either the RAM clear switch 954 or the setting key 971 is not operated (OFF) when the power is turned on, the contents stored in the main control RAM 1312 do not change. The main control MPU 1311 also starts up in a game stop state, and the value in the setting state management area is updated to 08H, which indicates an abnormality in the main control RAM 1312. The base display 1317 also displays an error (e.g., an error code). The game stop state may be a game stop caused by the main control MPU 1311 executing an infinite loop, or a game stop caused by not executing normal game processing.

In other words, in pattern 2-1, the setting change mode is entered unconditionally regardless of the state of the setting key and RAM clear switch after power is restored, but in pattern 2-2, if the setting change mode is activated by the setting key 971 and RAM clear switch 954 when the power is restored, the setting change mode is activated, and if the setting key 971 and RAM clear switch 954 are in any other state, the game cannot be played (RAM abnormality). In other words, in pattern 2-2, even if at least one of the setting key 971 and RAM clear switch 954 is operated when the power is restored, normal game play is not started as the RAM is in an abnormal state, and normal game play is started after going through the setting change mode. For this reason, when the setting change mode is not activated, normal game play is not executed in a state other than the setting change mode or setting confirmation mode such as a RAM abnormality, and a game stop state is notified, so that the hall employee can be prompted to activate the setting change mode.

If a value (08H) indicating a RAM abnormality is recorded in the setting status management area, the game control area of the main control RAM 1312 and the stack area within the game control area will not be initialized, and the game will wait in a game stop state until the next setting change operation is performed. The game stop state may be a game stop caused by executing an infinite loop in the main control MPU 1311, or a game stop caused by not executing normal game processing. After that, the power is cut off once, the setting key and RAM clear switch are operated to the setting change mode, and the power is turned on, which updates the value of the setting status management area to 02H, clears the game control area of the main control RAM 1312 and the stack area within the game control area, and starts the setting change mode.

<Patterns 3-1 and 3-2>
An example of operation when the setting confirmation mode was selected at the time of the previous power cut and the main control RAM 1312 is normal when the power is restored, as shown in Fig. 204 (D), will be described. First, when the RAM clear switch 954 is turned ON and the setting key 971 is turned ON at the time of power-on, the main control RAM 1312 initializes the area used as the game control area including the stack area other than the setting value and the base value. In addition, the main control MPU 1311 starts up in the setting change mode and the value of the setting status management area is updated to 02H. In addition, the base display 1317 displays the setting value associated with the setting change.

If the RAM clear switch 954 is not operated (OFF) when the power is turned on and the setting key 971 is operated ON, the contents stored in the main control RAM 1312 do not change. The main control MPU 1311 also starts up in setting confirmation mode, and the value in the setting status management area is maintained at 01H. Note that the same value (01H) may be set regardless of the original value. The base display 1317 also displays the current setting value to confirm the setting.

When the RAM clear switch 954 is turned ON and the setting key 971 is not operated (OFF) when the power is turned on, the main control RAM 1312 initializes the area used as the game control area, including the stack area other than the setting value and the base value. The main control MPU 1311 also starts up in a normal game state, and the value of the setting state management area is updated to 00H. The base display 1317 also displays a display indicating that it has been switched to performance display as the initial display when the power is turned on (for example, all flashes for 5 seconds), and then displays the base value that represents the performance of the pachinko machine.

When the RAM clear switch 954 is not operated (OFF) and the setting key 971 is not operated (OFF) when the power is turned on, the contents stored in the main control RAM 1312 do not change. The main control MPU 1311 also starts up in a normal game mode, and the value of the setting status management area is updated to 00H. The base display 1317 also displays a display indicating that it has been switched to performance display as the initial display when the power is turned on (for example, a full flash for 5 seconds), and then displays a base value that represents the performance of the pachinko machine. In this case, as shown in pattern 3-2 in FIG. 204(E), the main control MPU 1311 may start up in a setting confirmation mode, and the value of the setting status management area may be maintained at 01H (the same value (01H) may be set regardless of the original value), and the base display 1317 may display the current setting value for setting confirmation.

<Pattern 4>
As shown in Fig. 204(F), an example of operation when there is an abnormality in the main control RAM 1312 when power is restored will be described. First, when the RAM clear switch 954 is turned ON when the power is turned on and the setting key 971 is turned ON, the main control RAM 1312 initializes the area used as the game control area including the entire area stack area other than the setting value and the base value. In addition, the main control MPU 1311 starts up in the setting change mode, and the value of the setting status management area becomes 02H. In addition, the base display 1317 displays for changing the setting.

If the RAM clear switch 954 and setting key 971 are operated other than as described above when the power is turned on, that is, if at least either the RAM clear switch 954 or the setting key 971 is not operated (OFF) when the power is turned on, the contents stored in the main control RAM 1312 do not change. In addition, the main control MPU 1311 starts up in a game stop state, and the value of the setting state management area is maintained as 08H. Note that the same value (08H) may be set regardless of the original value. In addition, the base display 1317 displays an error (e.g., an error code).

If there is an abnormality in the main control RAM 1312 at the time of the previous power outage, if the main control RAM 1312 was initialized before the power outage, the main control RAM 1312 will not be initialized again when the power is restored, and instead (1) the device built into the main control MPU 1311 will be initialized, (2) the hardware random number will be restarted, and (3) the main loop will be executed after at least one of the following is executed: (1) the hardware random number generator will be restarted, and (2) interrupt permission will be set.

Also, even if there was an abnormality in the main control RAM 1312 at the time of the previous power outage, when the power is turned on, the presence or absence of operation of the RAM clear switch 954 and the setting key 971 is determined before determining whether the state before the power outage was a RAM abnormality (step S211 in FIG. 179). Then, if a setting change operation (RAM clear switch 954 and setting key 971 are on) is detected at power-on, the setting change mode is started, but even if no setting change operation is performed at power-on (even if an operation to start the setting confirmation mode is performed, only the RAM clear switch 954 is operated, or neither is operated), the RAM abnormality state is maintained. In other words, when the setting change mode is started and when the setting confirmation mode is started, the setting change mode processing and the setting confirmation mode processing are normally executed within the timer interrupt processing, but when the power is turned on again from a RAM abnormality state, different processing is executed in the setting change mode and the setting confirmation mode. In other words, when the power is turned back on to recover from a RAM abnormality, if the device is started in setting change mode, the setting change mode processing is executed within the timer interrupt processing as usual, but if the device is started in setting check mode, the timer interrupt processing executes processing that is different from normal.

In this way, when a value (08H) indicating a RAM abnormality is recorded in the setting status management area, the game cannot be started even if the power is turned back on. However, since the main control RAM 1312 has already been initialized, there is no need to initialize the main control RAM 1312 again.

Next, the operation of the pachinko machine 1 and its variations will be described using a time chart. The outline of the time chart described below is as follows.
・Time chart for normal setting changes (Figure 205)
・Time chart for normal setting confirmation (Figure 206)
A time chart (FIG. 207) showing a case where the setting change mode is entered during a power outage and the setting key 971 and the RAM clear switch 954 are both OFF after the power is restored and the mode is changed to the setting change mode.
A time chart (FIG. 208) showing a case where the setting change mode is selected during a power outage and the setting key 971 is turned ON and the RAM clear switch 954 is turned OFF after the power is restored.
A time chart (FIG. 209) showing a case where the setting confirmation mode is entered during a power outage and the setting key 971 and the RAM clear switch 954 are both OFF after the power is restored and the mode is switched to the setting confirmation mode.

Figure 205 is a time chart showing the start and end of the setting change mode.

In the time chart shown in FIG. 205, when the power is turned on, the RAM clear switch 954 is turned ON and the setting key 971 is turned ON, so the main control MPU 1311 starts up in setting change mode.

First, power is supplied to the main control board 1310, and when the 5V power supply starts up (T1), a reset signal is output from the reset circuit 1335, and the main control MPU 1311 starts up (T2).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T3. Then, at timing T4, it stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register and waits until timing T5 for the peripheral control board 1510 to start up.

When the peripheral control board 1510 is started by starting the power supply, it starts the customer waiting performance. Note that the peripheral control board 1510 may start the customer waiting performance after receiving a command from the main control board 1310.

At timing T5 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, records 02H in the setting status management area, and transitions to setting change mode. The main control MPU 1311 also turns on all LEDs of the function display unit 1400. Furthermore, the main control MPU 1311 starts outputting a security signal. The display mode of the function display unit is as described above in FIG. 184.

In addition, the main control MPU 1311 creates a power-on operation command (A003H) indicating a transition to setting change mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the presentation (notification) in the setting change mode shown in FIG. 184 above in accordance with the received power-on command.

When the RAM clear switch 954 (also used as the setting change switch 972) is operated during the setting change mode, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value from N to N+1, and the base display 1317 displays the updated setting value N+1 (T6). Furthermore, when the RAM clear switch 954 (also used as the setting change switch 972) is operated a second time, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value from N+1 to N+2, and the base display 1317 displays the updated setting value N+2 (T7). That is, in the setting change mode, the setting value is changed within the range of 1 to 6 each time the RAM clear switch 954 (also used as the setting change switch 972) is operated, and is updated to 1 if the setting value exceeds 6.

After changing the setting value, the hall employee operates the setting key 971 to the OFF position. When the main control MPU 1311 detects the OFF edge of the setting key 971, it ends the setting change mode, records 00H in the setting status management area, creates a power-on operation command (A0001H), and transitions to normal game mode (T8). The created power-on operation command (A0001H) is sent to the peripheral control board 1510 at a predetermined timing. By recording 00H in the setting status management area, it becomes possible to execute processing during normal game mode in the timer interrupt processing. The main control MPU 1311 also stops all lighting of the function display unit 1400 and starts displaying in normal game mode. Furthermore, the base display 1317 flashes all LEDs for a predetermined time (e.g., 5 seconds), and then displays the base value in normal game mode. In this way, by displaying the base display 1317 in a predetermined manner at the start of the normal game state, the end of the setting change mode can be clearly understood, and the occurrence of operational errors at the end of the setting change mode can be reduced. Furthermore, the main control MPU 1311 transmits the power-on state command (3001H), the power-on return destination command (3101H), and the setting value command (A10mH) to the peripheral control board 1510. In the setting change mode, the main control RAM 1312 is initialized, so the lower byte of the power-on return destination command becomes 01H. The m in the setting value command (A10mH) is a number from 1 to 6 according to the setting value, as shown in FIG. 202 (D). Note that the power-on operation command (A0001H) and the power-on state command (3001H) both notify the normal game start possible state, and are usually transmitted consecutively, so it is sufficient to transmit either one to the main control board.

The peripheral control board 1510 knows from the received power-on state command that normal play can be started, and executes the presentation in the normal play state (for example, a customer waiting presentation). Note that the peripheral control board 1510 may switch the presentation so that the notification presentation during the setting change is stopped and the presentation in the normal play state (for example, a customer waiting presentation) is started after a predetermined delay time has elapsed since the peripheral control board 1510 knew from the power-on state command that normal play can be started. Note that during the predetermined delay time, it is preferable for some presentation devices to perform the notification presentation during the setting change. For example, the main liquid crystal display device 1600 and sound return to the presentation in the normal play state, and the decorative lamps continue the notification presentation during the setting change. Also, the continuation of the notification presentation by the decorative lamps may be such that some decorative lamps (for example, the frame side) continue the notification presentation, and other decorative lamps (for example, the panel side) return to the presentation in the normal play state.

The main control MPU 1311 also stops outputting the security signal after a predetermined delay (e.g., 50 milliseconds) from the end of the setting change mode (T9). This is to ensure a minimum output time for the security signal, because if the setting change mode ends in an extremely short time and the security signal is not output at all or only for a short time, the hall computer will not be able to detect the transition to the setting change mode.

Figure 206 is a time chart showing the start and end of the setting confirmation mode.

In the time chart shown in FIG. 206, the machine was in normal game mode or setting confirmation mode when the power was shut off immediately before, and the RAM clear switch 954 was not operated when the power was turned on, and the setting key 971 was turned ON, so the main control MPU 1311 starts up in setting confirmation mode.

First, power is supplied to the main control board 1310, and when the 5V power supply starts up (T1), a reset signal is output from the reset circuit 1335, and the main control MPU 1311 starts up (T2).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T3. Then, at timing T4, it stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register and waits until timing T5 for the peripheral control board 1510 to start up.

When the peripheral control board 1510 is started by starting the power supply, it starts the customer waiting performance. Note that the peripheral control board 1510 may start the customer waiting performance after receiving a command from the main control board 1310.

At timing T5 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, records 01H in the setting status management area, and transitions to setting confirmation mode. The main control MPU 1311 also lights up all the LEDs of the function display unit 1400. Furthermore, the main control MPU 1311 starts outputting a security signal.

In addition, the main control MPU 1311 creates a power-on operation command (A002H) indicating a transition to setting confirmation mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting confirmation mode according to the power-on command received.

After checking the setting value, the hall employee operates the setting key 971 to the OFF position. When the main control MPU 1311 detects the OFF edge of the setting key 971, it ends the setting change mode, records 00H in the setting status management area, and transitions to normal game mode (T6). When the value of the setting status management area becomes 00H, it becomes possible to execute processing during normal game mode in the timer interrupt processing. In addition, the base display 1317 flashes all LEDs for a predetermined time (e.g., 5 seconds), and then displays the base value in normal game mode.

Furthermore, the main control MPU 1311 sends a power-on state command (3001H), a power-on return destination command (310nH), and a setting value command (A10mH) to the peripheral control board 1510. The m in the setting value command (A10mH) is a number between 1 and 6 according to the setting value, as shown in FIG. 202 (D). In the setting confirmation mode, the main control RAM 1312 is not initialized as a general rule, so the state before the power outage is sent as the lower byte of the power-on return destination command.

The peripheral control board 1510 knows from the received power-on state command that normal play can be started, and executes the presentation in the normal play state (for example, a customer waiting presentation). Note that the peripheral control board 1510 may switch the presentation so that the notification presentation during the setting change is stopped and the presentation in the normal play state (for example, a customer waiting presentation) is started after a predetermined delay time has elapsed since the peripheral control board 1510 knew from the power-on state command that normal play can be started. Note that during the predetermined delay time, it is preferable for some presentation devices to perform the notification presentation during the setting change. For example, the main liquid crystal display device 1600 and sound return to the presentation in the normal play state, and the decorative lamps continue the notification presentation during the setting change. Also, the continuation of the notification presentation by the decorative lamps may be such that some decorative lamps (for example, the frame side) continue the notification presentation, and other decorative lamps (for example, the panel side) return to the presentation in the normal play state.

The main control MPU 1311 also stops outputting the security signal after a predetermined delay (e.g., 50 milliseconds) from the end of the setting confirmation mode (T7).

Figure 207 is another time chart showing the start and end of the setting change mode.

In the time chart shown in FIG. 207, since the setting change mode was active at the time of the most recent power outage, the main control MPU 1311 starts up in the setting change mode. Note that, as shown in FIG. 204 (B), if the setting change mode was active at the time of the most recent power outage, the main control MPU 1311 starts up in the setting change mode regardless of the operation of the RAM clear switch 954 or the setting key 971 when the power is turned on.

First, power is supplied to the main control board 1310, and when the 5V power supply starts up (T1), a reset signal is output from the reset circuit 1335, and the main control MPU 1311 starts up (T2).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T3. Then, at timing T4, it stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register and waits until timing T5 for the peripheral control board 1510 to start up.

When the peripheral control board 1510 is started by starting the power supply, it starts the customer waiting performance. Note that the peripheral control board 1510 may start the customer waiting performance after receiving a command from the main control board 1310.

At timing T5 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, records 02H in the setting status management area, and transitions to setting change mode. The main control MPU 1311 also lights up all the LEDs of the function display unit 1400. Furthermore, the main control MPU 1311 starts outputting a security signal.

In addition, the main control MPU 1311 creates a power-on operation command (A003H) indicating a transition to setting change mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting change mode according to the power-on command it receives. When the power is cut off, the peripheral control board 1510 resets its operating state and returns to its initial state, so when the power is restored, it receives the power-on operation command sent by the main control board 1310 and continues the setting change state.

When the RAM clear switch 954 (also used as the setting change switch 972) is operated during the setting change mode, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value from N to N+1, and the base display 1317 displays the updated setting value N+1 (T6).

After that, when the power supply to the main control board is stopped, the main control MPU 1311 detects the power outage and executes power-off processing (T7). Then, the reset circuit 1335 stops outputting the reset signal, the display of the set value by the base display 1317 disappears, and the output of the security signal stops (T8). Note that in the power-off processing, the output of the security signal may be stopped and the base display 1317 may be turned off. For example, the power-off processing program may turn off the output port of the security signal and the output port to the base display 1317, thereby stopping the output of the security signal and turning off the base display 1317.

By turning off the output port during power-off processing, power consumption during power-off processing can be reduced, and a reset caused by a drop in the power supply (5V) before the power-off processing is completed can be prevented. For example, it is effective to turn off the output port before calculating the checksum during power-off processing. It is also advisable to turn off the output port for signals to the solenoids that control the opening and closing of the large prize openings 2005, 2006 and the second start opening 2004, etc., to stop the drive signal for the solenoids.

After that, power is supplied to the main control board 1310, and when the 5V power supply starts up (T9), a reset signal is output from the reset circuit 1335 and the main control MPU 1311 starts up (T10).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T11, then stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register at timing T12, and waits until timing T13 for the peripheral control board 1510 to start up.

The main control MPU 1311 refers to the value of the setting status management area. In the example shown in FIG. 207, since 02H is recorded in the setting status management area, regardless of the operation of the setting key 971 or the RAM clear switch 954, the setting change mode is entered at timing T13 when the peripheral control board startup waiting time has elapsed. When entering the setting change mode, the game control area of the main control RAM 1312 and the stack area in the game control area are initialized again, as in the case of entering the normal setting change mode. Note that the main control RAM 1312 is monitored for a power outage after initialization is completed, and then the power outage processing is executed, so the RAM clear processing is not interrupted by the power cut processing. Therefore, if the setting change mode is in effect at the time of the power outage, the game control area of the main control RAM 1312 has already been initialized, so the RAM clear processing may be executed when the power is restored so as not to initialize the game control area. After reinitialization, the main control MPU 1311 turns on all the LEDs of the function display unit 1400 and starts outputting a security signal.

In addition, the main control MPU 1311 creates a power-on operation command (A003H) indicating a transition to setting change mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting change mode according to the power-on command it receives. When the power is cut off, the peripheral control board 1510 resets its operating state and returns to its initial state, so when the power is restored, it receives the power-on operation command sent from the main control board 1310 and continues the setting change state.

When the RAM clear switch 954 (also used as the setting change switch 972) is operated during the setting change mode, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value, and displays the updated setting value on the base display 1317.

After changing the setting value, the hall employee operates the setting key 971 to the OFF position. When the main control MPU 1311 detects the OFF edge of the setting key 971, it ends the setting change mode, records 00H in the setting status management area, and transitions to normal game mode (T14). By recording 00H in the setting status management area, the timer interrupt process can execute normal game processing. In addition, the base display 1317 displays all LEDs blinking for a predetermined time (e.g., 5 seconds), and then displays the base value in normal game mode. In addition, the main control MPU 1311 sends a power-on state command (3001H), a power-on return destination command (3101H), and a setting value command (A10mH) to the peripheral control board 1510. The m in the setting value command (A10mH) is a number from 1 to 6 according to the setting value, as shown in FIG. 202 (D).

The peripheral control board 1510 knows from the received power-on state command that normal play can be started, and executes the presentation in the normal play state (for example, a customer waiting presentation). Note that the peripheral control board 1510 may switch the presentation so that the notification presentation during the setting change is stopped and the presentation in the normal play state (for example, a customer waiting presentation) is started after a predetermined delay time has elapsed since the peripheral control board 1510 knew from the power-on state command that normal play can be started. Note that during the predetermined delay time, it is preferable for some presentation devices to perform the notification presentation during the setting change. For example, the main liquid crystal display device 1600 and sound return to the presentation in the normal play state, and the decorative lamps continue the notification presentation during the setting change. Also, the continuation of the notification presentation by the decorative lamps may be such that some decorative lamps (for example, the frame side) continue the notification presentation, and other decorative lamps (for example, the panel side) return to the presentation in the normal play state.

The main control MPU 1311 also stops outputting the security signal after a predetermined delay (e.g., 50 milliseconds) from the end of the setting change mode (T15). This is to ensure a minimum output time for the security signal, because if the setting change mode ends in an extremely short time and the security signal is not output at all or only for a short time, the hall computer will not be able to detect the transition to the setting change mode.

Figure 208 is another time chart showing the start and end of the setting change mode.

In the time chart shown in FIG. 208, even if the setting change mode was selected at the time of the most recent power outage, the main control MPU 1311 starts up in a different operating mode depending on the operation of the RAM clear switch 954 or the setting key 971 when the power is turned on.

First, power is supplied to the main control board 1310, and when the 5V power supply starts up (T1), a reset signal is output from the reset circuit 1335, and the main control MPU 1311 starts up (T2).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T3. Then, at timing T4, it stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register and waits until timing T5 for the peripheral control board 1510 to start up.

When the peripheral control board 1510 is started by starting the power supply, it starts the customer waiting performance. Note that the peripheral control board 1510 may start the customer waiting performance after receiving a command from the main control board 1310.

At timing T5 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, records 02H in the setting status management area, and transitions to setting change mode. The main control MPU 1311 also starts outputting a security signal.

In addition, the main control MPU 1311 creates a power-on operation command (A003H) indicating a transition to setting change mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting change mode according to the power-on command it receives. When the power is cut off, the peripheral control board 1510 resets its operating state and returns to its initial state, so when the power is restored, it receives the power-on operation command sent by the main control board 1310 and continues the setting change state.

When the RAM clear switch 954 (also used as the setting change switch 972) is operated during the setting change mode, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value from N to N+1, and the base display 1317 displays the updated setting value N+1 (T6).

After that, when the power supply to the main control board is stopped, the main control MPU 1311 detects the power outage and executes power-off processing (T7). Then, the reset circuit 1335 stops outputting the reset signal, the display of the set value by the base display 1317 disappears, and the output of the security signal stops (T8). Note that in the power-off processing, the output of the security signal may be stopped and the base display 1317 may be turned off. For example, the power-off processing program may turn off the output port of the security signal and the output port to the base display 1317, thereby stopping the output of the security signal and turning off the base display 1317.

By turning off the output port during power-off processing, power consumption during power-off processing can be reduced, and a reset caused by a drop in the power supply (5V) before the power-off processing is completed can be prevented. For example, it is effective to turn off the output port before calculating the checksum during power-off processing. It is also advisable to turn off the output port for signals to the solenoids that control the opening and closing of the large prize openings 2005, 2006 and the second start opening 2004, etc., to stop the drive signal for the solenoids.

After that, power is supplied to the main control board 1310, and when the 5V power supply starts up (T9), a reset signal is output from the reset circuit 1335 and the main control MPU 1311 starts up (T10).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T11, then stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register at timing T12, and waits until timing T13 for the peripheral control board 1510 to start up.

At timing T13 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, and changes the operation mode according to the signal level of the setting key 971 and the signal level of the RAM clear switch 954. In the example shown in FIG. 208, the RAM clear switch 954 is turned OFF and the setting key 971 is turned ON so that the setting confirmation mode will be set when the power is turned back on, but since the state before the power outage recorded in the setting status management area is a value (02H) indicating a setting change, at timing T13 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 restarts in the setting change mode, and the value of the setting status management area is maintained as 02H. Note that the same value (02H) may be set regardless of the original value. When switching to the setting change mode, the game control area of the main control RAM 1312 and the stack area in the game control area are reinitialized in the same way as when switching to the normal setting change mode. In addition, since the power failure is monitored after the initialization of the main control RAM 1312 is completed and the power failure process is executed after that, the RAM clear process is not interrupted by the power failure process. Therefore, if the setting change mode is in effect at the time of the power failure, the game control area of the main control RAM 1312 has already been initialized, so the RAM clear process may be executed when the power failure is restored so as not to initialize the game control area. For example, in the above-mentioned FIG. 186, if the state before the power failure was during the setting change, the result is YES in step S2015, and the process branches to RESET_P_5A (step S2030 in FIG. 187) to execute the RAM abnormality initialization process (step S2034), but if the process branches to RESET_P_7 (S2036 in FIG. 187), the state before the power failure is continued without executing the RAM abnormality initialization process step S2034. After reinitialization, the main control MPU 1311 turns on all the LEDs of the function display unit 1400 and starts outputting a security signal. That is, in the time chart shown in FIG. 208, the setting change mode can be started even if the setting key 971 is not turned ON. In other words, the setting change mode is started by the setting key 971 and the RAM clear switch 954 being turned ON when the power is turned on, and further, the setting change mode can be started even if the setting key 971 and the RAM clear switch 954 are not ON when the power is turned on.

Note that, as indicated by the dashed line at timing T12, if the RAM clear switch 954 is OFF and the setting key 971 is operated to OFF when the power is restored, unlike the time chart shown in FIG. 207, 00H may be recorded in the setting status management area and the machine may be restarted in a state in which normal game play cannot be performed (e.g., RAM abnormality) without returning to the setting change mode. In other words, in the operating pattern shown in FIG. 208, even if the machine was in setting change mode during a power outage, if no setting change operation has been performed when the power is restored, the machine will be restarted in a RAM abnormality state. In other words, if the power is cut off during setting change mode, normal game play cannot be started unless the setting change mode is normally ended at some point.

In addition, the main control MPU 1311 creates a power-on operation command (A003H) indicating a transition to setting change mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting change mode according to the power-on command it receives. When the power is cut off, the peripheral control board 1510 resets its operating state and returns to its initial state, so when the power is restored, it receives the power-on operation command sent by the main control board 1310 and continues the setting change state.

When the RAM clear switch 954 (also used as the setting change switch 972) is operated during the setting change mode, the main control MPU 1311 detects that the RAM clear switch 954 is ON, updates the setting value, and displays the updated setting value on the base display 1317 (T14).

After the hall employee has finished changing the setting value, he or she operates the setting key 971 to the OFF position. When the main control MPU 1311 detects the OFF edge of the setting key 971, it ends the setting change mode, records 00H in the setting status management area, and transitions to normal game mode (T15). By recording 00H in the setting status management area, the timer interrupt process can execute the process during normal game mode. In addition, the base display 1317 displays all LEDs blinking for a predetermined time (e.g., 5 seconds), and then displays the base value in normal game mode. In addition, the main control MPU 1311 transmits a power-on state command (3001H), a power-on return destination command (3101H), and a setting value command (A10mH) to the peripheral control board 1510. In the setting change mode, the main control RAM 1312 is initialized, so the lower byte of the power-on return destination command becomes 01H. The m in the setting value command (A10mH) is a number between 1 and 6 according to the setting value, as shown in FIG. 202 (D). Note that the power-on operation command (A0001H) and the power-on status command (3001H) both notify the user that normal gameplay can begin, and are usually sent consecutively, so it is sufficient to send either one of them to the main control board.

The peripheral control board 1510 knows from the received power-on state command that normal play can be started, and executes the presentation in the normal play state (for example, a customer waiting presentation). Note that the peripheral control board 1510 may switch the presentation so that the notification presentation during the setting change is stopped and the presentation in the normal play state (for example, a customer waiting presentation) is started after a predetermined delay time has elapsed since the peripheral control board 1510 knew from the power-on state command that normal play can be started. Note that during the predetermined delay time, it is preferable for some presentation devices to perform the notification presentation during the setting change. For example, the main liquid crystal display device 1600 and sound return to the presentation in the normal play state, and the decorative lamps continue the notification presentation during the setting change. Also, the continuation of the notification presentation by the decorative lamps may be such that some decorative lamps (for example, the frame side) continue the notification presentation, and other decorative lamps (for example, the panel side) return to the presentation in the normal play state.

The main control MPU 1311 also stops outputting the security signal after a predetermined delay (e.g., 50 milliseconds) from the end of the setting change mode (T16). This is to ensure a minimum output time for the security signal, because if the setting change mode ends in an extremely short time and the security signal is not output at all or only for a short time, the hall computer will not be able to detect the transition to the setting change mode.

Figure 209 is another time chart showing the start and end of the setting confirmation mode.

In the time chart shown in FIG. 209, if the setting confirmation mode was selected when the power was shut off immediately before, the main control MPU 1311 will start up in the setting confirmation mode regardless of whether the RAM clear switch 954 or the setting key 971 is operated when the power is turned on.

First, power is supplied to the main control board 1310, and when the 5V power supply starts up (T1), a reset signal is output from the reset circuit 1335, and the main control MPU 1311 starts up (T2).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T3. Then, at timing T4, it stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register and waits until timing T5 for the peripheral control board 1510 to start up.

When the peripheral control board 1510 is started by starting the power supply, it starts the customer waiting performance. Note that the peripheral control board 1510 may start the customer waiting performance after receiving a command from the main control board 1310.

At timing T5 when the peripheral control board startup waiting time has elapsed, the main control MPU 1311 reads the signal level of the setting key 971 and the signal level of the RAM clear switch 954 from the register, records 02H in the setting status management area, and transitions to setting change mode. The main control MPU 1311 also starts outputting a security signal.

In addition, the main control MPU 1311 creates a power-on operation command (A002H) indicating a transition to setting confirmation mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the performance in the setting confirmation mode according to the received power-on operation command.

After that, when the power supply to the main control board is stopped, the main control MPU 1311 detects the power outage and executes power-off processing, and the main control MPU 1311 stops operating (T7). Then, the reset circuit 1335 stops outputting the reset signal, the display of the set value by the base display 1317 disappears, and the output of the security signal stops (T8). Note that in the power-off processing, the output of the security signal may be stopped and the base display 1317 may be turned off. For example, the power-off processing program may turn off the security signal output port and the output port to the base display 1317, thereby stopping the output of the security signal and turning off the base display 1317.

By turning off the output port during power-off processing, power consumption during power-off processing can be reduced, and a reset caused by a drop in the power supply (5V) before the power-off processing is completed can be prevented. For example, it is effective to turn off the output port before calculating the checksum during power-off processing. It is also advisable to turn off the output port for signals to the solenoids that control the opening and closing of the large prize openings 2005, 2006 and the second start opening 2004, etc., to stop the drive signal for the solenoids.

After that, power is supplied to the main control board 1310, and when the 5V power supply starts up (T9), a reset signal is output from the reset circuit 1335 and the main control MPU 1311 starts up (T10).

The main control MPU 1311 executes the program from the first address of the program code in response to a reset signal. Specifically, the main control MPU 1311 executes a security check and starts the main control program at timing T11, then stores the signal level of the setting key 971 and the signal level of the RAM clear switch 954 in a register at timing T12, and waits until timing T13 for the peripheral control board 1510 to start up.

The main control MPU 1311 refers to the value in the setting status management area. In the example shown in FIG. 209, the RAM clear switch 954 is turned OFF and the setting key 971 is turned ON so that the setting check mode will be activated when the power is turned back on. However, since the state before the power failure recorded in the setting status management area is a value (01H) indicating setting check, the device restarts in the setting check mode at timing T13 when the peripheral control board startup waiting time has elapsed, and the value in the setting status management area is maintained at 01H. Note that the same value (01H) may be set regardless of the original value. After that, the main control MPU 1311 starts outputting a security signal. In other words, in the time chart shown in FIG. 209, the setting check mode can be activated even if the setting key 971 is not turned ON. In other words, the setting check mode is activated by the setting key 971 being turned ON and the RAM clear switch 954 being turned OFF when the power is turned on, and the setting check mode can be activated even if the setting key 971 is not ON when the power is turned on.

In addition, the main control MPU 1311 creates a power-on operation command (A002H) indicating a transition to setting confirmation mode, and sends it to the peripheral control board 1510 at a specified timing.

The peripheral control board 1510 executes the effects in the setting confirmation mode according to the power-on command received.

When in the setting confirmation mode, even if the RAM clear switch 954 (also used as the setting change switch 972) is operated and the main control MPU 1311 detects that the RAM clear switch 954 is ON, the setting value is not updated and continues to be displayed on the base display 1317.

After checking the setting value, the hall employee operates the setting key 971 to the OFF position. When the main control MPU 1311 detects the OFF edge of the setting key 971, it ends the setting check mode, records 00H in the setting status management area, and transitions to normal game mode (T15). By recording 00H in the setting status management area, normal game mode processing can be executed in the timer interrupt processing. In addition, the base display 1317 blinks all LEDs for a predetermined time (e.g., 5 seconds), and then displays the base value in normal game mode. In addition, the main control MPU 1311 sends a power-on state command (3001H), a power-on return destination command (310nH), and a setting value command (A10mH) to the peripheral control board 1510.

The peripheral control board 1510 knows that the normal game can be started from the received power-on state command, and executes the performance in the normal game state (for example, a customer waiting performance). The peripheral control board 1510 may start the performance in the normal game state (for example, a customer waiting performance) after a predetermined delay time has elapsed since the peripheral control board 1510 knew that the normal game can be started from the power-on state command. The peripheral control board 1510 may also switch the performance so that the notification performance during the setting change is stopped and the performance in the normal game state (for example, a customer waiting performance) is started after a predetermined delay time has elapsed since the peripheral control board 1510 knew that the normal game can be started from the power-on state command. During the predetermined delay time, it is preferable to perform a notification performance during the setting change by some of the performance devices. For example, the main liquid crystal display device 1600 and the sound return to the performance in the normal game state, and the decorative lamp continues the notification performance during the setting change. In addition, the notification effect by the decorative lamps may continue in such a way that some of the decorative lamps (e.g., on the frame side) continue the notification effect, while other decorative lamps (e.g., on the panel side) return to the normal game state effect.

The main control MPU 1311 also stops outputting the security signal after a predetermined delay (e.g., 50 milliseconds) from the end of the setting check mode (T16). This is to ensure a minimum output time for the security signal, because if the setting change mode ends in an extremely short time and the security signal is not output at all or only for a short time, the hall computer will not be able to detect the transition to the setting change mode.

Figures 210 to 212 are diagrams showing examples of the configuration of a jackpot determination threshold table. The jackpot determination threshold table stores the jackpot determination thresholds for the random number values for jackpot determination used to draw jackpots with special patterns.

The jackpot threshold judgment table shown in FIG. 210 is composed of an address table for setting value table selection and a judgment threshold table for each setting value. The jackpot judgment threshold table shown in FIG. 210 is an example in which a jackpot is judged to have occurred when the random number value for jackpot judgment is greater than the threshold defined in the table.

The address table for setting value table selection defines the pointer address of the judgment threshold table selected for each setting value, and each data should be configured as a 2-byte value. If the upper byte is a fixed value, only the lower byte may be defined. Each setting value judgment threshold table stores the threshold for low probability (normal state) and the threshold for high probability (high probability state).

When determining whether or not a jackpot has occurred, the pointer address defined in the address table for selecting the setting value table is obtained, and this value is used as an offset to select the threshold value determination table for the current setting value. Then, the threshold value for jackpot determination is obtained from the selected threshold value determination table, using the probability bonus state flag (0: low probability, 1: high probability) as an offset. Then, if the random number value for jackpot determination obtained when the ball enters the starting hole is equal to or greater than the obtained threshold value, it is determined to be a jackpot, and if it is less than the threshold value, it is determined to be a miss.

The jackpot determination threshold table shown in FIG. 211 is composed of an address table for setting value table selection and a determination threshold table for each setting value. The jackpot determination threshold table shown in FIG. 211 is an example in which a jackpot is determined to have occurred when the random number value for jackpot determination is in the range from the lower limit to the upper limit defined in the table.

The address table for setting value table selection defines the pointer address of the judgment threshold table selected for each setting value, and each data should be configured as a 2-byte value. If the upper byte is a fixed value, only the lower byte may be defined. The judgment threshold table for each setting value stores the lower threshold for low probability (normal state), the upper threshold for low probability (normal state), the lower threshold for high probability (high probability state), and the upper threshold for high probability (high probability state).

When determining whether a jackpot has occurred, the pointer address defined in the address table for selecting the setting value table is obtained, and this value is used as an offset to select the threshold value determination table for the current setting value. Then, using the probability bonus state flag (0: low probability, 1: high probability) as an offset, it is determined whether the selected threshold value determination table has a low probability block or a high probability block, and the lower and upper thresholds for jackpot determination are obtained. Then, if the random number value for jackpot determination obtained when the starting hole is entered is equal to or greater than the obtained lower threshold value and equal to or less than the upper threshold value, it is determined to be a jackpot, and if it is outside the range between the lower threshold value and the upper threshold value, it is determined to be a miss.

The jackpot determination threshold table shown in FIG. 212 is composed of an address table for selecting a setting value table for low probability, a determination threshold table for each setting value for low probability, an address table for selecting a setting value table for high probability, and a determination threshold table for each setting value for high probability. The jackpot determination threshold table shown in FIG. 211 is composed of a table for low probability and a table for high probability that are integrated, but the jackpot determination threshold table shown in FIG. 212 is composed of a table for low probability and a table for high probability that are separate.

The address table for selecting a setting value table for low probability defines the pointer address of the judgment threshold table selected for each setting value of low probability (normal state), and the address table for selecting a setting value table for high probability defines the pointer address of the judgment threshold table selected for each setting value of high probability (high probability state). The data defined in each address table for selecting a setting value table may be configured as a 2-byte value. If the upper byte is a fixed value, only the lower byte may be defined. The judgment threshold table for each setting value for low probability stores the lower limit threshold for low probability (normal state) and the upper limit threshold for low probability (normal state). The judgment threshold table for each setting value for high probability stores the lower limit threshold for high probability (normal state) and the upper limit threshold for high probability (normal state).

When determining whether a jackpot has occurred, the system determines whether the address table is for selecting the low probability setting value table or the high probability setting value table based on the probability change state flag (0: low probability, 1: high probability), obtains the setting value as an offset from the determined address table for selecting the setting value table, and selects the determination threshold table corresponding to the current setting value based on the obtained offset. Then, if the random number value for jackpot determination obtained when the starting hole is entered is equal to or greater than the obtained lower threshold value and equal to or less than the upper threshold value, it determines that a jackpot has occurred, and if it is outside the range between the lower threshold value and the upper threshold value, it determines that a miss has occurred.

[12-17. Alternative example 2 of setting change/confirmation processing]
Next, another embodiment of a pachinko machine with a setting change function will be described. In the embodiment described below, the setting value can be selected by operating the RAM clear switch 954 without providing the setting change switch 972. However, in order to distinguish between the original function of the RAM clear switch 954 to initialize the main control RAM 1312 and the setting change function, the operation for changing the setting value may be described as the setting change switch 972.

Figures 213 and 214 are flowcharts of the power-on processing executed by the main control MPU 1311 when the power is turned on.

First, when the power is turned on and the reset signal is released, the main control MPU 1311 starts processing address 8000, which is the start address of the program code. The main control MPU 1311 sets the protection of the main control RAM 1312 to be disabled and the prohibited area to be disabled in the RAM protection register (step S2200). The main control MPU 1311 has the function of designating the use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. In order to release the reset function due to access to the prohibited area of the main control RAM 1312, the prohibited area is set to be disabled, making it possible to access all areas of the main control RAM 1312. Note that an unused area of the main control RAM 1312 may be designated as a prohibited area, the prohibited area may be enabled, and the main control MPU 1311 may be reset if access to the designated prohibited area is detected.

Next, a simple clear mode timer of a predetermined time is set to the watchdog timer (step S2201), and the watchdog timer is cleared (step S2202). After that, the power outage clear signal is set to ON (step S2203), and the power outage clear signal is set to OFF (step S2204). By first setting the power outage clear signal to ON and then to OFF, the power outage signal stored in the latch can be set to a normal value.

Next, the signal levels of the setting key 971 and the RAM clear switch 954 are read from the PF port and stored in the register (step S2205). The register may be any of a number of general-purpose registers (storage means for temporarily storing information related to calculations during processing calculations) provided in advance in the main control MPU 1311. The general-purpose registers are divided into bank 0 and bank 1, and the register of bank 0 is used in step S2205. The register is provided in the main control RAM 1312, and is erased without retaining information during a power outage, and is different from the area of the RAM where information is backed up during a power outage. The main control MPU 1311 determines whether the RAM clear switch 954 and the setting key 971 are operated after the peripheral control board 1510 has been started up, so if a hall employee mistakenly interrupts the operation of the RAM clear switch 954 or the setting key 971 while waiting for the peripheral control board 1510 to start up, the RAM clear switch 954 and the setting key 971 will be determined in a state not intended by the hall employee. For this reason, the input state (level) of the RAM clear switch 954 and the setting key 971 is stored in a temporary storage means such as a register at an early stage after the power-on process begins, and the state of the RAM clear switch 954 and the setting key 971 stored in a temporary storage means such as a register is determined after the standby state of the peripheral control board 1510 ends. This ensures that even if a hall employee accidentally stops operating the keys at an early stage after power-on, the operation of the RAM clear switch 954 and the setting key 971 during the power-on operation is detected reliably.

Then, it is determined whether the power outage warning signal indicates that a power outage is occurring (step S2206). If a power outage warning signal has been detected, the power supply voltage of the pachinko machine is not normal, so in step S2206, the machine waits until the power supply voltage stabilizes.

Then, a sub-startup waiting timer (e.g., about 2 seconds) is started, and the watchdog timer is continuously cleared until the timer times out, while waiting for the peripheral control board 1510 to start up (step S2207). The waiting for the peripheral control board 1510 to start up can be any time between the time the power is turned on and the time the first command is sent to the peripheral control board 1510.

Then, it is determined again whether the power outage warning signal indicates that a power outage is occurring (step S2208). If the power outage warning signal is detected, the power supply voltage of the pachinko machine 1 is abnormal, so the system waits in step S2208.

Then, a setting value confirmation process is executed to determine whether the setting value is within the normal range, and whether the value in the setting status management area is within the normal range (step S2209). Details of the setting value confirmation process will be described later with reference to FIG. 215.

Then, the flag register is saved to the stack area within the game control area (step S2210). This is to ensure the independence of the processing outside the game control area from the processing within the game control area, and to prevent information used in one processing from affecting the other processing. Then, a power-on RAM outside game area confirmation process is executed to determine whether there is an abnormality outside the game control area of the main control RAM 1312 (step S2211). Details of the power-on RAM outside game area confirmation process will be described later in FIG. 216. Then, the flag register saved in the stack area within the game control area is restored (step S2212).

Then, the RAM abnormality determination result value is provisionally set in the C register (step S2213), and the RAM abnormality value (03H) in the setting status management area is provisionally set in the B register (step S2214). The B register and C register used in steps S2213 and S2214 are general-purpose registers. Note that the general-purpose register in bank 0 is used in the power-on process.

The value set in the setting status management area in Alternative Example 2 differs from that shown in FIG. 201(B) in the previously described embodiment, and as shown in FIG. 220(A), if there is an abnormality in the main control RAM 1312, 03H is recorded. That is, the setting status management area in Alternative Example 2 is a 1-byte memory area in which the operation mode of the pachinko machine 1 is recorded, and for example, the lower 4 bits are used and the upper 4 bits are not defined. Specifically, 00H is recorded in the normal game state, 01H in the setting confirmation mode, 02H in the setting change mode, and 03H is recorded if there is an abnormality in the main control RAM 1312.

The setting status management area is not updated to 00H by the RAM clear process performed by operating only the RAM clear switch 954, and the current value is maintained. It is also updated from 01H to 00H when the setting confirmation mode ends, and from 02H to 00H when the setting change mode ends. Furthermore, if there is an abnormality in the main control RAM 1312, it is updated from 03H to 02H when the setting change mode is entered by the setting change operation at the next power-on, and is updated from 02H to 00H when the setting change mode ends.

Furthermore, it is determined whether there is an abnormality in the game control area of the main control RAM 1312, the determination result is stored in the C register (steps S2215, S2216), and the process proceeds to step 2219. Specifically, a checksum calculated and stored from the data used as the game control area (excluding data saved in the stack) among the areas backed up in the internal RAM 1312 at the time of the previous power outage is compared with a checksum calculated using the same area, and if the two are different, it is determined that there is an abnormality in the main control RAM 1312. Furthermore, if the value of the power outage flag indicating that the data was backed up normally (the power outage processing was executed normally) is not stored in the backup flag area, it is determined that the data in the main control RAM 1312 was not backed up normally at the time of the power outage (the power outage processing was not executed normally), and that there is an abnormality in the main control RAM 1312.

If no abnormality is found either inside or outside the game control area of the main control RAM 1312, the RAM normality judgment result value is provisionally set in the C register (step S2217), the information in the setting status management area is set in the B register (step S2218), and the process proceeds to step 2219.

Then, a value (03H) indicating a RAM abnormality is provisionally recorded in the setting status management area (step S2219).

Then, among the register values in which the PF port value is recorded, the bits of the setting key 971 and the RAM clear switch 954 are masked (step S2220). The register in which the PF port value is stored is a general-purpose register different from the register provisionally set in S2213 and S2214. After that, it is determined using the values stored in the register whether the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON when the power was turned on (step S2221). If the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON, it is determined that a setting change operation has been performed, and the process proceeds to step S2230.

On the other hand, if the setting key 971 has not been operated and the RAM clear switch 954 has not been operated, it is determined whether the setting change mode was active when the power outage occurred (step S2222). For example, when the value in the setting status management area is the setting change mode (02H), it is determined that a power outage occurred during the setting change mode.

If it is determined that a power outage has occurred during the setting change mode, the process proceeds to step S2230.

On the other hand, if it is determined that no power outage has occurred during the setting change mode, it is determined whether there is an abnormality inside or outside the game control area of the main control RAM 1312 (step S2223). For example, the determination results stored in the C register in steps S2213 and S2217 described above can be used to determine whether there is an abnormality inside the game control area. If there is an abnormality either inside or outside the game control area of the main control RAM 1312 as a result, the process proceeds to step S2236.

On the other hand, if there is no abnormality either inside or outside the game control area of the main control RAM 1312, it is determined whether a power outage occurred during RAM abnormality processing (step S2224). For example, if the value of the saved setting state management area is a value (03H) indicating a RAM abnormality, it is determined that a power outage occurred during RAM abnormality processing.

If it is determined that a power outage has occurred during RAM abnormality processing, the process proceeds to step S2236. On the other hand, if it is determined that no power outage has occurred during RAM abnormality processing, a value (00H) indicating a normal game state is recorded in the setting state management area (step S2225). By recording 00H in the setting state management area in step S2225, the value (03H) indicating a RAM abnormality that was provisionally recorded in the setting state management area in step S2214 is returned to a normal state. Also, by recording 00H in the setting state management area in step S2225, the value of the setting state management area when jumping from step S2226 to step S2231 is different from that when jumping to step S2235 from step S2226 and S2231. In this way, since the value of the setting state management area is different between the normal RAM clear processing and the RAM clear processing associated with the setting change processing, the call source can be distinguished even if the program for both RAM clear processings is the same, and there is no need to provide separate programs, which allows the program size to be reduced.

Then, the value stored in the register is used to determine whether the RAM clear switch 954 was turned ON when the power was turned on (step S2226). If the RAM clear switch 954 was turned ON, the process proceeds to step S2235.

In the pachinko machine of this embodiment, processing is allocated based on the operation of the RAM clear switch 954, the operation of the setting key 971, and the value recorded in the setting status management area. For example, if it is determined that the main control RAM 1312 is abnormal, 03H is recorded in the setting status management area, and 03H is maintained until the power is cut off, so that normal game processing cannot be executed. In this case, if the power is cut off once, and then a setting change operation is performed and the power is turned on, the RAM abnormality can be canceled. That is, if it is determined in step S2221 that both the setting key 971 and the RAM clear switch 954 have been operated (setting change operation), the setting status management area is updated from a value indicating a RAM abnormality (03H) to a value indicating a setting change (02H) (step S2230), and the RAM abnormality state ends. In this way, recovery from a RAM abnormality is always via a setting change. In other words, before determining whether the state at the time of the power outage is a RAM abnormality, it is determined whether a setting change operation has been performed, so that the RAM abnormality can be eliminated only by changing the setting value.

On the other hand, if the RAM clear switch 954 has not been operated, the game status information at the time of the power outage is stored in the power-on status buffer in order to restore the state before the power outage occurred (step S2227).

Then, the value stored in the register is used to determine whether the setting key 971 was operated to ON when the power was turned on (step S2228). If the setting key 971 was operated to ON, it is determined that a setting confirmation operation has been performed, a value (01H) indicating the setting confirmation mode is recorded in the setting status management area (step S2229), and the process proceeds to S2236. In other words, even if the state when the power outage occurred was the setting confirmation mode, if the setting key 971 was not operated when the power was turned on, the game will enter the normal game state. Note that if the state when the power outage occurred was the setting confirmation mode and the setting key 971 was not operated when the power was turned on, the game may transition to the same power outage confirmation mode as before the power outage, rather than the normal game state.

Because steps S2225 to S2229 are processes that are executed when at least one of the RAM clear switch 954 and the setting key 971 has not been operated, it is possible to determine whether the RAM clear switch 954 has been operated (step S2226) or whether the setting key 971 has been operated (step S2228), either first. That is, as shown in the figure, it is possible to determine whether the RAM clear switch 954 has been operated (step S2226) and then determine whether the setting key 971 has been operated (step S2228), or it is possible to determine whether the RAM clear switch 954 has been operated (step S2226) and then determine whether the setting key 971 has been operated (step S2228).

If step S2221 or step S2222 returns YES, a value (02H) indicating the setting change mode is recorded in the setting status management area (step S2230). Then, it is determined whether there is an abnormality outside the game control area of the main control RAM 1312 (step S2231). For example, an abnormality outside the game control area can be determined based on the RAM abnormality determination result set in the RAM abnormality determination area outside the game area in step S2266 described above. If there is no abnormality outside the game control area of the main control RAM 1312 as a result, the process proceeds to step S2235.

On the other hand, if there is an abnormality outside the game control area of the main control RAM 1312, a RAM clear process outside the game control area is executed. That is, the flag register is saved to a stack area within the game area (step S2232), and a process for RAM abnormality outside the game area is executed (step S2233). Details of the process for RAM abnormality outside the game area will be described later in FIG. 217. After that, the flag register saved to the stack area within the game area in step S2232 is restored (step S2234).

Then, the setting values in the game control area of the main control RAM 1312, the areas other than the setting state management area, and the stack area in the game control area are initialized (step S2235). In other words, the RAM clear process outside the game control area cannot be executed without going through a setting change. In the event of a RAM abnormality outside the game control area, 03H is recorded in the setting state management area, just as in the event of a RAM abnormality in the game control area, and game play stops, so it is not possible to return from the RAM abnormal state without going through a setting change. However, while the condition for clearing RAM outside the game control area is only a setting change, the conditions for clearing RAM in the game control area are a setting change and the operation of the RAM clear switch 954 (when the RAM is forcibly cleared by an employee even when no RAM abnormality has occurred).

In the RAM clearing process in the game area in step S2235, the setting value and setting status management area are excluded because if a player performs an illegal RAM clearing operation to set the setting value to a high value, the hall will suffer damages, and if a malfunction (RAM abnormality) occurs during play at a high setting and game play stops, the RAM clearing operation will cause the high setting to change to a low setting, causing damages to the player.

After that, all command buffers are initialized (step S2236). This is because if the power is turned off while commands are stored in the command buffer and then turned back on without clearing the RAM, the unsent commands stored in the command buffer are sent. For example, if the power is turned off while a variation command is being sent, the symbol command may be sent but the subsequent variation pattern command may not be sent. If only the variation pattern command is sent when the power is turned on, the peripheral control board 1510 may determine that an abnormality has occurred. Furthermore, if unsent commands in the process of changing settings are stored in the command buffer, the peripheral control board 1510 may set the game state based on the unsent command after the power is restored, resulting in a malfunction. To prevent such abnormalities from occurring, the command buffer is initialized in step S2236.

Note that while the command buffer is initialized in step S2236, the command buffer may be cleared only when the setting change process and the setting confirmation process are started. Note that in the setting change process, the command buffer is cleared along with the initialization of the main control RAM 1312, so there is no need to clear the command buffer separately; however, in the setting confirmation mode, since the main control RAM 1312 is not initialized, it is advisable to clear the command buffer when transitioning to the setting confirmation mode.

Then, the functions of the devices (CTC, SIO, etc.) built into the main control MPU 1311 are initialized (step S2237), and a hardware random number (e.g., a winning/losing random number) built into the main control MPU 1311 is started (step S2238). By starting the hardware random number in step S2238, the hardware random number is updated even in the setting change mode and setting confirmation mode, but the hardware random number may also be started when the setting change mode or setting confirmation mode ends. Then, the power-on setting process is executed (step S2239). Details of the power-on setting process will be described later in FIG. 219.

Finally, the timer interrupt is set to enabled (step S2240), and the process proceeds to the main control side main processing (Figure 221).

Figure 215 is a flowchart of the setting value confirmation process. The setting value confirmation process is executed in step S2209 of the power-on process (Figure 213), and determines whether the setting value in the setting status management area is within the normal range, and determines whether the value in the setting status management area is within the normal range. The setting value confirmation process may be executed when the power is turned on, or when the setting change mode or setting confirmation mode ends. It may also be executed when special patterns start to change, or when the game state changes (when a jackpot, special bonus, time-saving, etc., starts and ends).

In the setting value confirmation process, the main control MPU 1311 first determines whether a value other than the value that should be recorded in the setting status management area has been set (step S2250). As shown in FIG. 220 (A), the setting status management area records 00H to 03H, so if a value of 04H or higher has been set, this is an abnormality and the process proceeds to step S2252.

On the other hand, if a normal value (03H or less) is set in the setting status management area, it is determined whether the setting value is within a predetermined range (step S2251). For example, in a pachinko machine 1 where the settings can be selected from 1 to 6, if the work value in which the setting value is stored corresponds to 0 to 5 (setting 1 = 0, setting 6 = 5), if a value of 6 or more is stored, it is determined to be outside the predetermined range.

If the setting value is outside the specified range, a value (03H) indicating a RAM abnormality is recorded in the setting status management area (step S2252), the setting value is initialized to 0 (step S2253), and the process returns to power-on processing. On the other hand, if the setting value is within the specified range, the process returns to power-on processing.

Regarding the values and setting values recorded in the setting state management area, whether the main control RAM 1312 is abnormal is also determined while play is in progress (each time a change begins, when the game state is switched, etc.). For this reason, the conditions for determining a RAM abnormality related to the setting state management area and setting values during play are different from the conditions for determining a RAM abnormality (abnormality in the work area within the game area excluding the setting state management area and setting values, and in the work RAM outside the game area) when the power is turned on. Note that these two RAM abnormality determination conditions may be partially the same. For example, if it is determined whether the setting state management area and setting values are abnormal when the power is turned on, it can be said that the two determination conditions are partially the same.

The reason why the conditions for determining RAM abnormalities are different in this way is that if RAM abnormalities related to the setting values were determined only when the power was turned on, if the setting values were changed due to a malfunction caused by fraud or noise, etc., it would cause disadvantages to the hall and players, so it is desirable to detect abnormalities early and shorten the period during which disadvantages occur.

In addition, by making the RAM abnormality judgment process for the setting status management area and setting values during gameplay into a subroutine, the subroutine can be called as necessary while gameplay is in progress to judge RAM abnormalities, making it possible to reduce the size of the program without having to set up the same program in multiple places.

Although the setting state management area is excluded from the RAM abnormality judgment when the power is turned on, it may be treated as a RAM abnormality judgment target in the same way as other areas of the main control RAM 1312. By treating the setting state management area as a RAM abnormality judgment target when the power is turned on, if the setting change mode was in effect before the power outage and a RAM abnormality is judged when the power is restored, the RAM abnormality takes priority. For this reason, if an abnormality occurs in the value of the setting state management area (i.e., a RAM abnormality), it is desirable to initialize the value recorded in the setting state management area. Note that in this case, the memory area of the main control RAM 1312 in which the setting values are stored may be included in the RAM abnormality judgment when the power is turned on, but may be excluded from the RAM abnormality judgment.

The order of priority for judgment when the power is turned on is such that a RAM abnormality has the highest priority, and entering the normal game mode has the lowest priority. Furthermore, entering the setting change mode has a higher priority than entering the setting confirmation mode or executing the RAM clear process by a RAM clear operation. In this way, by executing the judgment process in the order of the priority of the derived state, it is possible to accurately derive the state with the highest priority, even if multiple conditions are met after the power is restored.

Figure 216 is a flowchart of the RAM outside the game area check process when power is turned on. The RAM outside the game area check process when power is turned on is executed in step S2211 of the power-on process (Figure 213) and determines whether there is an abnormality outside the game control area of the main control RAM 1312.

First, the main control MPU 1311 stores the value of the stack pointer in the SP save buffer outside the game control area of the main control RAM 1312 (step S2260), sets the stack pointer value outside the game area to the stack pointer (step S2261), and stores all register values of the bank (bank 0 or bank 1) used in the calling process in the register save buffer outside the game area (step S2262). Note that a stack area outside the game control area may be used as a save buffer to store all registers in processes executed outside the game control area.

Then, it is determined whether the outside of the game control area of the main control RAM 1312 has already been initialized by the first power-on, etc. (step S2263). Specifically, if the value of the power-down check area (EX_PDIND) is 5AH, it can be determined that the outside of the game control area of the main control RAM 1312 has been initialized by the first power-on, etc.

If the main control RAM 1312 has not been initialized when the power is turned on for the first time, etc., the process proceeds to step S2266 without executing steps S2264 to S2265. On the other hand, if the outside of the game control area of the main control RAM 1312 has already been initialized when the power is turned on for the first time, etc., a checksum for the outside of the game control area of the main control RAM 1312 is calculated (step S2264), and it is determined whether the calculated checksum is normal (step S2265).

If the calculated checksum is normal, proceed to step S2267. On the other hand, if the calculated checksum is abnormal, set the RAM abnormality judgment result value (01H) in the RAM abnormality judgment area outside the game area (step S2266), and proceed to step S2271. Note that a RAM abnormality outside the game control area is judged in S2231 based on the value set in the RAM abnormality judgment area outside the game area in S2266.

On the other hand, if it is determined that the checksum calculated in step S2265 is normal, the LED check timer is set to 5 seconds, the LED check timer is started (step S2267), the LED blinking cycle timer is set to a blinking cycle value (600 milliseconds) (step S2268), and the mode switching time timer is set to a mode switching time (5 seconds) (step S2269). The LED blinking cycle timer is a timer for blinking the top two digits (or all four digits) of the base display 1317, and one blinking cycle occurs when the LED blinking cycle timer times out. The mode switching time timer is a timer for controlling mode switching in the base display 1317, and when the mode switching time timer times out, the display switches to the base display mode.

Then, initialize the performance display monitor display management area by setting it to 0 (step S2270), and proceed to step S2271.

Then, the power down check area is initialized to 00H (step S2271).

Then, all register values of the bank (bank 0 or bank 1) used in the calling process that were saved in the register save buffer outside the play area are restored (step S2272), the stack pointer value saved in the SP save buffer outside the play area is restored (step S2273), and the process returns to power-on processing.

Figure 217 is a flowchart of the processing when an abnormality occurs in the RAM outside the game area. The processing when an abnormality occurs in the RAM outside the game area is executed in step S2233 of the power-on processing (Figure 214), and initializes the area outside the game control area of the main control RAM 1312.

First, the main control MPU 1311 stores the value of the stack pointer in the SP save buffer outside the game control area of the main control RAM 1312 (step S2280), sets the outside game area stack pointer value to the stack pointer (step S2281), and stores all register values of the bank (bank 0 or bank 1) used in the calling process in the register save buffer outside the game area (step S2282). Note that a stack area outside the game control area may be used as a save buffer to store all registers in processes executed outside the game control area.

Then, execute the RWM initialization process outside the area in use to initialize the area outside the game control area of the main control RAM 1312 (step S2283). Details of the RWM initialization process outside the area in use will be described later in FIG. 218.

Then, the RAM normality judgment value (00H) is set in the RAM abnormality judgment area outside the game area (EX_RWMERROR) of the main control RAM 1312 (step S2284). Based on the value set in the RAM abnormality judgment area outside the game area in step S2284, it is determined in step S2231 at the next power-on whether or not there is an abnormality outside the game control area of the main control RAM 1312.

Then, the LED check timer is set to 5 seconds, the LED check timer is started (step S2285), the LED blinking cycle timer is set to a blinking cycle value (600 milliseconds) (step S2286), and the mode switching time timer is set to a mode switching time (5 seconds) (step S2287). These timer values are the initial settings for displaying the base value on the base display 1317.

Then, all register values saved in the register save buffer outside the play area (register values of the bank (bank 0 or bank 1) used in the caller's process saved in step S2262) are restored (step S2288), the stack pointer value saved in the SP save buffer outside the play area is restored (step S2289), and the process returns to the power-on process of the caller.

Figure 218 is a flowchart of the RWM initialization process outside the area in use. The RWM initialization process outside the area in use is executed in step S2283 of the processing when an abnormality occurs in the RAM outside the game area, and initializes the area outside the game control area of the main control RAM 1312.

First, the main control MPU 1311 writes 00H into the work area outside the game control area of the main control RAM 1312 to initialize it (step S2290). Then, the main control MPU 1311 writes 00H into the stack area outside the game control area of the main control RAM 1312 to initialize it (step S2291). After that, the process returns to the processing for when the RAM outside the game area is abnormal.

Figure 219 is a flowchart of the power-on setting process. The power-on setting process is a subroutine that is executed in step S2239 of the power-on process (Figure 214) to perform the initial settings when the power is turned on.

First, the main control MPU 1311 creates a power-on operation command and sets the created command in the transmission information storage area (step S2300). The power-on operation command is a 2-byte command that notifies the contents recorded in the setting status management area, as described later in FIG. 220 (B), with the upper byte being A0H and the lower byte being the value of the setting status management area plus 1.

Next, the bit corresponding to the setting key 971 in the input level data 2 area and the bit corresponding to the setting change switch 972 are set to their initial value of 1. It is recommended that other bits be set to 0 (step S2301). The bit corresponding to the setting key 971 in the input level data 2 area and the bit corresponding to the setting change switch 972 are set to 1 so that the bit of the switch is detected as 1 at the time of the next timer interrupt, preventing an ON edge from being created by mistake.

Next, the backup flag is cleared (step S2302).

Then, it is determined whether a value (00H) indicating a state in which game play can be started is recorded in the setting status management area (step S2303). If a value indicating a state in which game play can be started is not recorded in the setting status management area, the device is in setting change mode, setting confirmation mode, or has a RAM abnormality, so the power-on setting process is terminated and the process returns to the calling device.

On the other hand, if a value (00H) indicating a state in which game play can be started is recorded in the setting status management area, normal game play can be started, so the work area in the game control area is initialized depending on whether the main control RAM 1312 has been initialized (step S2304).

Then, a power-on state command is created and stored in the transmission information storage area (step S2305). As shown in FIG. 220 (C), the power-on state command is a two-byte command, with the upper byte being 30H and the lower byte indicating the state before the power outage.

Then, a power-on return destination command is created, and the created command is set in the transmission information storage area (step S2306). The power-on return destination command is a 2-byte command that notifies the game status related to the special symbol, as shown in FIG. 202 (C), with the upper byte being 31H and the lower byte indicating the status of the special symbol and the operating status of the special electric device at the time of the power outage. The power-on return destination command is transmitted once when the power is turned on.

Furthermore, a setting value command is created and the created command is set in the transmission information storage area (step S2307). As shown in FIG. 202 (D), the setting value command is a 2-byte command that notifies the setting value, with the upper byte being A1H and the lower byte indicating the setting value.

A special symbol reserved number command indicating the reserved number of special symbol variable display games may be sent together with the power-on state command, power-on return destination command, and setting value command to restore the reserved number display on the main LCD display device 1600 to the state it was in before the power outage occurred. The special symbol reserved number command may be sent after the power-on state command, power-on return destination command, and setting value command, before these commands, or during the transmission of these commands.

Then it returns to the calling process.

The power-on setting process is always executed regardless of whether the device is in setting change mode. The power-on setting process is also called from the setting process (Fig. 224) when the setting key 971 is detected as OFF and the setting change/confirmation process is terminated. At this time, 00H is recorded in the setting status management area, so all processes from S2300 to S2307 are executed.

When the setting change/confirmation process is executed, the power-on setting process is called from step S2239 of the power-on process and from step S2355 of the setting process, and so the power-on operation command is sent twice. On the other hand, when the setting change/confirmation process is not executed, the power-on operation command is sent once only by the power-on setting process called from step S2239 of the power-on process. The power-on operation command is sent to allow the peripheral control board 1510 to identify the state of the main control board 1310 (setting change mode, setting confirmation mode, RAM abnormality, etc.). By receiving this command, the peripheral control board 1510 issues a notification corresponding to the state, such as setting change mode, setting confirmation mode, or RAM abnormality.

In addition, in the setting/check/change mode, the setting adjustment function by the player (for example, adjusting the volume or brightness by operating the buttons on the door frame 3) may be stopped, while adjustments by hall employees (adjusting the volume or brightness by using the volume controls on the peripheral board box 1520) may be enabled. Specifically, the setting adjustment function by the player may be stopped until a power-on operation command indicating the normal game mode is received.

In addition, in both the setting change mode and the setting confirmation mode, the entire screen of the main LCD display device 1600 may be used to display whether the mode is the setting change mode, the setting confirmation mode, or a RAM abnormality state. In this case, a voice message indicating whether the mode is the setting change mode or the setting confirmation mode may be output. Furthermore, some or all of the lamps (which may include the lamps provided on the door frame 3) may be used to notify the user.

Figure 220 (B) is a diagram showing an example of the configuration of a power-on operation command. The power-on operation command is a command that notifies the contents recorded in the setting status management area, and the value stored in the lower byte is the value in the setting status management area plus 1. Therefore, unlike what was shown in Figure 202 (A) in the embodiment described above, in Alternative Example 2, when a RAM abnormality occurs, the lower byte becomes 04H.

Specifically, the power-on operation command consists of two bytes, with the upper byte being A0H, and the lower byte indicating the contents recorded in the setting status management area. The value of the lower byte stores the value of the setting status management area plus 1. This is because during normal play, the value of the setting status management area is 00H, and so if the value sent as a command were 00H, it would be indistinguishable from a hardware abnormality that would result in an output of 0, so one of the bits is set to 1.

The power-on operation command is generated at least once during power-on processing. Specifically, the A001H or A004H command is generated once in response to hot start, RAM clear, and RAM abnormality, and in the setting change mode and setting confirmation mode, the A002H or A003H command is generated during power-on processing, and then the A001H command is generated twice when the setting change/confirmation is completed.

When the peripheral control board 1510 receives the power-on operation command, it issues a notification in the manner described above according to the state in which normal game play can be started (A001H), the setting confirmation mode (A002H), the setting change mode (A003H), or the RAM abnormality state (A004H) (see FIG. 184). Note that the notification of the state in which normal game play can be started is not shown in FIG. 184, but it displays a demo screen or produces a standby state that explains the game content.

If the peripheral control board 1510 receives a game command during normal play without receiving A001H as a power-on operation command, the game state may be inconsistent, so the received game command is determined to be invalid and no game action (such as a performance) for that game command is initiated. However, if a certain condition is met (for example, a game command during normal play is sent a certain number of times in succession), the peripheral control board 1510 may have missed the power-on operation command (A001H), so it is advisable to cancel the invalidation of the received game command and perform a performance corresponding to the game command.

When the game command is disabled, the game command that satisfies a predetermined condition may be performed (for example, the movement of the symbols, the lamps, the movable body, the sound, etc. may be performed according to the received command), and the background of the display device or a predetermined lamp may be used to notify that an inconsistency in the game state has occurred. The game state inconsistency may also be notified at a low volume. This is to prevent possible trouble in the hall, as players who do not understand that an inconsistency in the game state has occurred unless any performance is performed until the predetermined condition is met may think that the pachinko machine 1 is broken, such that the special symbol variable display game does not start even if the starting hole is won. Note that even if the peripheral control board 1510 disables the game command, the main control board 1310 is executing normal game processing, so the function display of the special symbols, normal symbols, etc. on the function display unit 1400 is displayed normally.

Figure 220 (C) is a diagram showing an example of the configuration of a power-on state command. Unlike the one shown in Figure 202 (B) in the above-mentioned embodiment, the power-on state command in the second example defines four states: 01H, 02H, 03H, and 04H. That is, the power-on state command is a command that notifies whether the state is ready to start normal play based on the recorded contents of the power-on state buffer, and further notifies the state before the power outage. For example, the power-on state command is composed of two bytes, and if the upper byte is 30H and the lower byte is 01H, it indicates that the main control RAM 1312 is in a state where it has been initialized to notify RAM clearing. Also, if the lower byte is 02H, it indicates that the state before the power outage was a low probability/non-time-saving state, the main control RAM 1312 has returned without being initialized, and the normal game can be started. Also, if the lower byte is 03H, it indicates that the state before the power outage was a high probability/time-saving state, the main control RAM 1312 has returned without being initialized, and the normal game can be started. Furthermore, if the lower byte is 04H, it indicates that the state before the power outage was a low probability/time-saving state, the main control RAM 1312 returned without being initialized, and normal play can begin.

As mentioned above, the power-on state buffer is a memory area that stores information about the game state at the time of a power outage in order to restore the state before the power outage, and the power-on state command stores a value obtained by adding 1 to the value of the power-on state buffer. For example, in a low-probability non-time-saving mode, the power-on state buffer stores 1, and this value is added by 1 to store 2 in the power-on state command. Also, when the main control RAM 1312 is initialized, the power-on state buffer is set to 0, so 1 is stored in the power-on state command, and it is possible to notify that the main control RAM 1312 has been initialized.

Figure 221 is a flowchart of the main control side main processing executed by the main control MPU 1311. The main control side main processing is executed after step S2240 of the power-on processing (Figure 214).

First, the main control MPU 1311 acquires the power outage warning signal and determines whether a power outage has occurred based on whether the power outage warning signal is ON (step S2310). In alternative example 2, power outages are monitored in the main processing, but power outages may also be monitored in timer interrupt processing, and power outage processing may be executed if a power outage is detected. For example, it may be determined whether the power outage warning signal is ON at least one of the start and end times of the timer interrupt, the period during which the power outage warning signal is continuously output, and a power outage may be determined to have occurred if the count result reaches a predetermined value.

If the power outage warning signal is not ON, power is being supplied normally, so random number update process 2 is executed (step S2311). Random number update process 2 may be the same as that described in FIG. 195, and mainly updates random numbers other than the random numbers used to determine whether or not a winner has been selected in a special or regular lottery.

On the other hand, if a power outage warning signal is detected, the power outage process (steps S2312 to S2319) is executed. In the power outage process, a process is executed to back up data to restore the state before the power outage occurred. Specifically, first, interrupts are prohibited (step S2312). This prevents the timer interrupt process described later from being performed. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of the devices controlled by the output from each port (step S2313). Specifically, the power outage clear signal OFF bit data is output to the solenoid, power outage clear, and ACK output ports. Note that it is not necessary to clear all output ports. For example, output ports for controlling solenoids and motors that consume a lot of power may be cleared. Clearing these output ports reduces the power consumption until the main board side power outage process is completed, and ensures that the main board side power outage process is completed.

Then, the flag register is saved to a stack area in the play area (step S2314), and power-off processing is executed to execute any processing required before the power is cut off (step S2315). Details of the power-off processing are described later in FIG. 222. Then, the flag register saved in the stack area in the play area is restored (step S2316).

Then, the main control MPU 1311 calculates a checksum of the work area in the game control area of the main control RAM 1312 to determine whether the data stored in the work area to be backed up has been properly stored, and stores the checksum in a specified checksum storage area of the main control RAM 1312 (step S2317). This checksum is used to determine whether the data backed up in the work area is normal. The areas for which the checksum is calculated should preferably exclude the setting state management (setting value and value of the setting state management area) that may be changed between the time the power is turned on and the execution of the main processing on the main control side, the backup flag, and the value of the checksum area, among the work areas in the game control area.

Furthermore, a value (5AH) indicating that the power failure process has been normally executed is stored in the backup flag area as a power failure flag (step S2318). This completes the storage of the game backup information. Finally, RAM protection is enabled (write prohibited) and the prohibited area is disabled is written to the RAM protection register, writing to a specified area of the main control RAM 1312 is prohibited (step S2319), and the system waits until recovery from the power failure (infinite loop). The main control MPU 1311 has a function of designating a use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. For this reason, the reset function due to access to the main control RAM 1312 is released (not reset) by setting the prohibited area of the RAM protection register to invalid, thereby enabling access to all areas. Note that an unused area of the main control RAM 1312 may be designated as a prohibited area, the prohibited area is enabled, and the main control MPU 1311 may be reset if access to the designated prohibited area is detected.

Figure 222 is a flowchart of the power-off processing. The power-off processing is executed in step S2315 of the main control main processing (Figure 221), and executes the necessary processing before the power is cut off.

First, the main control MPU 1311 stores the value of the stack pointer in the SP save buffer outside the game control area of the main control RAM 1312 (step S2320), sets the stack pointer value outside the game area to the stack pointer (step S2321), and stores all register values in the register save buffer outside the game area (step S2322).

Next, the checksum outside the game control area of the main control RAM 1312 is calculated and stored in the outside game area checksum storage area of the main control RAM 1312 (step S2323). After that, 5AH is set in the power down check area (EX_PDIND) to record that the RAM area outside the game area of the main control RAM 1312 has been initialized (step S2324). If 5AH is recorded in the power down check area, the power outage processing has been performed normally. In this sense, the power down check area and the backup flag of the RAM in the game control area are essentially the same. Since the power outage processing has been performed normally, it has already been determined that the area outside the game control area of the main control RAM 1312 is normal, and if 5AH is set in the power down check area as a result, the initialization of the area outside the game control area of the main control RAM 1312 has been completed.

In this way, in the pachinko machine 1 of this embodiment, two types of flags indicating that power outage processing has been executed normally are provided inside and outside the game control area of the main control RAM 1312. This is to make a double judgment inside the game control area and outside the game control area, and because the game control area and outside the game control area do not share a single memory area, it is desirable to process them independently. For example, if there is only one flag indicating that power outage processing has been executed normally, that flag will be erroneously set to 5AH, and when power returns without performing power outage processing, it will be erroneously judged that power outage processing has been executed normally. By making a double judgment in this way, the possibility of an erroneous judgment is reduced.

In addition, by providing the two flags in separate areas (for example, areas where the lower bytes (**00H to **FFH) or upper bytes (00**H or 01**H) of the address do not overlap), data can be restored correctly even if it is rewritten due to noise or other malfunctions.

Then, all register values of the bank (bank 0 or bank 1) used in the caller's process that were saved in the register save buffer outside the play area are restored (step S2325), the stack pointer value saved in the SP save buffer outside the play area is restored (step S2326), and the process returns to the caller.

Figure 223 is a flowchart of the timer interrupt processing executed by the main control MPU 1311.

First, the main control MPU 1311 sets the register bank selection flag to 1 and switches the register bank (step S2330). The main control MPU 1311 has two register groups used for calculations, one of which is used as the register group of bank 0 and the other is available as the register group of bank 1, and is configured so that the registers of both banks cannot be used without switching the banks. Register bank 0 is used in the main processing on the main control side, and register bank 1 is used in the timer interrupt processing. For this reason, an instruction to switch the bank to 1 is executed at the start of the timer interrupt processing, but it is not necessary to execute an instruction to switch the bank to 0 at the end of the timer interrupt processing. This is because the main control MPU 1311 stores the state of the bank in a flag register (for example, a register in which the Z flag and C flag are set), and the flag register is saved to the stack area at the start of the interrupt and is restored from the stack area by executing the RET command. For this reason, the bank flag of the register stored in the flag register is also restored by executing the RET command. If the bank status is not stored in the flag register, a bank switch command is executed at the end of the timer interrupt process to return to bank 0.

The flag register also stores a flag that controls whether interrupts are enabled, so there is no need to set it to interrupt enabled before executing the RET instruction. The flag that controls whether interrupts are enabled is set to interrupt disabled state after the flag register is stacked at the start of timer interrupt processing. Therefore, unless interrupts are enabled during timer interrupt processing (by using the EI instruction, for example) or the RETI instruction is executed, the interrupts will not be enabled.

Next, the LED common counter is incremented by +1. If the LED common counter value exceeds the upper limit, it is reset to 0 (step S2331).

Next, switch input process 1 is executed (step S2332). In switch input process 1, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, an ON edge is created, and the resulting signal is stored as input information in the input information storage area of the main control RAM 1312.

Note that the switch input process 1 in step S2332 is a process related to the winning signal, and the switch input process 2 in step S2080 in FIG. 191 is a process related to the input of the fraud detection sensor (magnetic sensor, radio wave sensor, vibration sensor, etc.). For this reason, in the timer interrupt process executed in the setting change mode or setting confirmation mode, since the result is NO in step S2335, winning detection is performed, but fraud by the fraud detection sensor is not detected. Note that even if a winning is detected, the payout of prize balls and the variable display are not executed. This is because the setting change operation and setting confirmation operation are performed by the hall employee, and it is considered that fraud is not performed in the setting change mode or setting confirmation mode, and it is preferable not to detect fraud. For example, since the setting change operation and setting confirmation operation are performed with the door open, the door frame 3 and the main frame 4 connected to the outer frame 2 by the hinge member are in a state where they are easily shaken, and there is a possibility that the vibration sensor will erroneously detect vibration. For this reason, by stopping the detection of fraud by the fraud detection sensor in the setting change mode or setting confirmation mode, such false alarms can be prevented. In addition, hall employees carry magnets to retrieve balls that have fallen to the floor, and false alarms caused by magnets held by employees when changing settings or checking settings can be prevented. In other words, the pachinko machine 1 of this embodiment has a means for disabling (or restricting, regulating, suppressing, etc.) fraud detection, and after transitioning to normal game processing (for example, after the initial setting processing at power-on is completed), the fraud detection is enabled, and in a specific game state (for example, during the setting processing), the fraud detection is disabled (or restricted, regulated, suppressed, etc.) by the means.

Note that even in the setting change mode or setting confirmation mode, some fraud detection sensors (e.g., radio wave sensors) may be used to detect specific types of fraud in switch input process 1. In this way, it is possible to detect fraud where a cheater tries to forcibly start the setting change mode by irradiating radio waves, etc.

Next, the random number update process 1 is executed (step S2333). In the random number update process 1, the random numbers for jackpot determination, jackpot pattern random numbers, and small jackpot pattern random numbers are updated. In addition to these random numbers, the random numbers for initial value determination are updated to change the initial values of the random numbers for jackpot pattern determination and small jackpot pattern determination, which are updated in the random number update process 2 of the main control side main process shown in FIG. 221. In the timer interrupt process shown in FIG. 223, the random numbers are updated even when the setting process for changing the setting value is executed. This is because the hardware random numbers for determining whether or not a win has been won are updated regardless of whether or not the setting change or setting confirmation process is in progress, so the random numbers generated by the software are also updated at the same timing as the start of the hardware random numbers, that is, by updating them during the setting change or setting confirmation process, inconsistencies between the hardware random numbers and the software random numbers are less likely to occur, and the expected value of the performance in the game and the expected value of the jackpot derived during a specific performance can be suppressed from deviating from the design value.

Then, the set value confirmation process (FIG. 215) is executed to determine whether the set value is within the normal range (step S2334). The set value confirmation process is executed periodically in the timer interrupt process, but even if the set value confirmation process is not executed in the timer interrupt process, it may be executed when a specific condition is met, such as when the fluctuation starts, when the game state is switched (e.g., when the jackpot probability is switched, when the jackpot game starts or ends, when the time-saving state starts or ends), or when fraud is detected (e.g., when a door is opened, when a magnetic field is detected). Even if the determination is not made periodically at short intervals as in the execution of the timer interrupt process, by making the determination when a specific condition is met, the consumption of resources of the main control MPU 1311 can be reduced.

Then, it is determined whether a value (00H) indicating the start of a game is recorded in the setting state management area (step S2335). By checking the value in the setting state management area after the setting value confirmation process (step S2334, FIG. 215), if the setting value is determined to be abnormal, the normal game process is not executed by checking the value in the setting state management area immediately after (S2335). If a value indicating the start of a game is recorded in the setting state management area, the process proceeds to step S2080 in FIG. 191. On the other hand, if a value indicating the start of a game is not recorded in the setting state management area, the LED common port is turned OFF (step S2336). By turning OFF the LED common signal at an early stage of the timer interrupt process, the time until the LED common signal is turned ON, i.e., the LED is turned off, is secured, and the ghost phenomenon in which the display before and after the LED display switching appears mixed is suppressed, and LED flickering is prevented.

After that, a security signal is output from the external terminal board 784 (step S2337), and the flag register is saved to the stack area in the game area (step S2338). Then, a test signal output process is executed to output a test signal (step S2339). Then, the flag register is saved to the stack area in the game area (step S2340). Before and after the start of the process to output the test signal, the stack pointer and register are saved as in other processes outside the game area, and are restored after the process is completed. The test signal process does not control the progress of the game, so it is executed as a process outside the game control area. Note that the test signal process may be executed as a process within the game control area if it does not affect the game. When the test signal process is executed as a process within the game control area, the saving and restoration of the flag register (steps S2337, S2340) executed before and after the test signal output process (step S2339) is not necessary.

Then, the setting process is executed (step S2341). Details of the setting process will be described later with reference to FIG. 224.

Then, the setting display process is executed (step S2342). Details of the setting display process will be described later in FIG. 225.

Furthermore, a peripheral board command transmission process is executed to output the value of the transmission information storage area to the serial communication circuit (step S2343). The transmission information storage area is a storage area that temporarily stores the generated transmission command. The value (command) stored in the transmission information storage area is read out in step 2070 and stored in the transmission information storage area of the serial communication circuit (SIO). The serial communication circuit has a multi-byte FIFO-format transmission information storage area. This transmission information storage area stores the command generated each time a command is generated, and the values (commands) stored in the transmission information storage area are sequentially transmitted to the peripheral control board 1510. Note that the generated command may be directly stored in the FIFO-format transmission information storage area of the serial communication circuit each time a command is generated.

Then, a predetermined value (18H) is set in the watchdog timer clear register WCL to clear the watchdog timer (step S2344). Note that since the watchdog timer uses the simple clear mode, the watchdog timer is cleared by setting one word. Then, a return instruction (e.g., RETI) is issued to switch the register bank (step S2345), and the process returns to that before the interrupt.

The processing that follows after it is determined in step S2335 that a value indicating the start of play has been recorded in the setting status management area is the same as the processing described above in FIG. 191. After the output data setting processing is executed in step S2091, the processing proceeds to step S2343 in FIG. 223.

Figure 224 is a flowchart of the setting process. The setting process is executed in step S2341 of the timer interrupt process (Figure 223) when the setting status management area is not a value (00H) indicating the normal game status, and mainly executes processing to change the setting value.

First, the main control MPU 1311 determines whether a value (03H) indicating a RAM abnormality is recorded in the setting status management area (step S2350). If a value indicating a RAM abnormality is recorded in the setting status management area, a power-on command is created (step S2351) and the process returns to the calling process.

As a result, in the event of a RAM abnormality, a power-on operation command (A004H) indicating a RAM abnormality is sent at each timer interrupt until the RAM abnormality is resolved. This is because if a power-on operation command indicating a RAM abnormality is sent only once, the RAM abnormality will not be notified again if the command is missed, and the peripheral control board 1510 will not be able to know the status of the gaming machine. Also, since the function display unit 1400 is completely turned off, if the peripheral control board 1510 does not know the status of the gaming machine, no abnormality notification will be made, and this is to prevent the status of the gaming machine from being unable to be confirmed from the outside. Also, when a RAM abnormality occurs, no game is played, and therefore no commands other than the power-on operation command are sent to the peripheral control board 1510, so the power-on operation command is repeatedly sent as long as the RAM abnormality continues.

In other words, the pachinko machine of this embodiment includes a first case in which commands of the same system (e.g., power-on operation commands) are sent a predetermined number of times (e.g., a small number of times such as once, twice, or three times) in response to the execution of a periodic process (timer interrupt process) that is executed at a predetermined cycle, and a second case in which commands are sent repeatedly at a predetermined cycle without limiting the number of times while the pachinko machine is in operation, and in the second case, the same command is sent repeatedly regardless of whether it has been received correctly by the peripheral control board 1510, and is a command that is sent even when no other game-related commands are being sent when normal play is stopped.

When the peripheral control board 1510 receives a command related to a RAM abnormality, it issues an alert regarding the RAM abnormality. If the same command is received again while an alert is being issued regarding a RAM abnormality, it is preferable to invalidate the received command related to the RAM abnormality and continue the current alert. By invalidating subsequent commands, for example, it is possible to prevent the alert from being repeated from the beginning by audio, and to issue a normal alert.

The command regarding the RAM abnormality may always be the same, but may be different depending on the timing of transmission. The consistency of the command may be determined by changing the command regarding the RAM abnormality depending on the timing of transmission. For example, by using a power-on operation command (A004H) that is transmitted when the RAM is abnormal when the power is turned on, and a power-on operation command (A005H) that is transmitted when the RAM is abnormal during a normal timer interrupt, the peripheral control board 1510 can determine that the RAM abnormality at power-on continues when it receives the power-on command (A005H) after the power-on command (A004H). On the other hand, when it receives the power-on command (A005H) without receiving the power-on command (A004H), it can determine that the setting value or setting state management area recorded in the main control RAM 1312 has become abnormal after the power is restored (for example, during normal play). In this way, the notification mode can be made different for each of the two states to be determined. For example, if a RAM abnormality continues when the power is turned on, it can be reported as a RAM abnormality, and if a RAM abnormality occurs after the power is restored, it can be reported as a setting value abnormality.

Note that while a RAM abnormality is being notified, the player's ability to adjust settings (for example, adjusting the volume or brightness by operating the buttons on the door frame 3) may be stopped. This is because any setting adjustment operation by the player while a RAM abnormality is being notified is considered an incorrect operation. Specifically, the player's ability to adjust settings should be stopped until a power-on operation command indicating a normal game mode is received.

If a RAM abnormality is detected, the setting process will be executed repeatedly, and processing related to special and normal symbols will not be executed, making it impossible to play. This RAM abnormality can be resolved by turning the power off to perform power outage processing, and then using the setting key 971 and RAM clear switch 954 to start the setting change mode when the power is turned back on, which will put the machine into the setting change state and clear the RAM abnormality. The setting change mode can then be ended by returning the setting key 971 to its original position, allowing normal play to begin.

In addition, when the power is turned back on, if any operation other than starting the setting change mode with the setting key 971 and RAM clear switch 954 is performed, the value (03H) indicating a RAM abnormality in the setting status management area will be maintained, the RAM abnormality state will continue, and normal gameplay cannot be started. In other words, in order to resolve the RAM abnormality and return to normal gameplay, it is necessary to go through the setting change mode.

On the other hand, if no value indicating a RAM abnormality is recorded in the setting status management area, it is determined whether the setting key 971 has returned to the OFF position (step S2352). Specifically, it detects whether a predetermined period of time has passed since the edge of the setting key 971 from ON to OFF, or from ON to OFF.

When it is determined that the setting key 971 has returned to the OFF position (determining that the setting change or setting confirmation has ended), the output time is set in the security signal output timer (step S2353), the setting status management area is initialized (step S2354), the power-on setting process shown in FIG. 219 is executed (step S2355), and the process returns to the caller.

When an operation to end the setting change mode is performed (setting key 971 is turned OFF), an output time value is set in the security signal output timer, providing a delay time until the security signal is turned OFF after the setting change mode ends. Therefore, even if the setting change mode or setting confirmation mode ends in a short time (for example, within a single timer interrupt process), the shortest output signal of the security signal can be secured for the amount of time set as the output time value in the security signal output timer, and the hall computer can reliably detect the security signal.

In addition, if fraud is detected during the delay time until the security signal is turned OFF, it is advisable to maintain the security signal and output the security signal for a period or time corresponding to the newly detected fraud.

Furthermore, if a power outage occurs during the delay time until the security signal is turned OFF, when a hot start is performed in normal game mode when power is restored, a security signal for the remaining time is output, but when the RAM is cleared by operating the RAM clear switch or by changing settings, the security signal for the remaining time is not output. This is because the initialization of the main control RAM 1312 resets the security signal output timer value, and the output of the security signal associated with the initialization of the main control RAM 1312 begins.

When power is turned on after a power outage occurs while a security signal is being output, the device will enter one of five modes: hot start, RAM clear, setting change mode, setting check mode, or continued RAM abnormal state.

When the setting change mode or setting check mode is entered, the activated mode ends and a security signal is output until the delay time has elapsed. If the RAM abnormality continues, a security signal is output due to the continuing RAM abnormality since no setting change operation has been performed even when power is restored. If a power outage occurs after the setting change mode or setting check mode ends and before the delay time has elapsed, a security signal is output for the remaining time if a hot start is performed after power is restored.

Even when the security signal is continuously output, the output of the security signal is stopped by a power-on reset signal when the power is turned on, and after a predetermined time (e.g., during the startup waiting time of the peripheral control board 1510) has elapsed, the process shifts to timer interrupt processing, and the output of the security signal is resumed. In other words, even when the security signal is continuously output after a power outage occurs in the following cases, a predetermined period of time after the power is restored is set during which the output of the security signal is stopped.
- When a power outage occurs while a security signal is being output due to fraud detection, etc., and then power is restored with a hot start; - When a power outage occurs while a security signal is being output due to a RAM abnormality, then power is restored and the RAM abnormality continues; - When a power outage occurs while a security signal is being output in setting change mode, then power is restored and the setting change mode continues; - When a power outage occurs while a security signal is being output in setting check mode, then power is restored and the setting check mode continues.In this way, even when the security signal continues to be output after a power outage occurs while a security signal is being output, by stopping the output of the security signal for a predetermined period of time after power is restored, the hall computer can determine whether there was an abnormality in the security signal or whether the state associated with the output of the security signal has been lifted.

In addition, in the setting confirmation mode where only the setting key 971 is operated, the security signal is output until the setting confirmation mode ends, regardless of the remaining time for which the security signal is output, and the output of the security signal stops after the setting confirmation mode ends and the delay time has elapsed. In the setting change mode where the setting key 971 and RAM clear switch 954 are operated, the same processing as in the setting confirmation mode may be performed.

On the other hand, if it is determined in step S2352 that the setting key 971 has not returned to the OFF position, it is determined whether a value (02H) indicating a setting change is recorded in the setting status management area (step S2356), and if it is determined that the setting change mode is active, it is determined whether the setting change switch 972 has been operated (step S2357). The setting change switch 972 may also be configured to double as the RAM clear switch 954. As a result, if a value indicating a setting change is recorded in the setting status management area and it is determined that the setting change switch 972 has been operated, the setting value is updated by +1 (step S2358). If the setting value exceeds the upper limit of 6, it is set to 0 (steps S2359, S2360). Thereafter, the process returns to the calling process.

On the other hand, if it is determined that no value indicating a setting change has been recorded in the setting status management area (i.e., the setting confirmation mode is active) or that the setting change switch 972 has not been operated, the setting value is not updated and the process returns to the calling process.

When determining whether the setting change switch 972 is operated (immediately before or immediately after), it may be determined whether the setting key 971 is operated to ON. In this way, by determining whether the setting key 971 is operated when the setting change switch 972 is operated, it is possible to prevent the setting from being changed by operating the setting change switch 972 even if the setting change mode is set when a power outage occurs and the setting key 971 is not operated to ON when the power is restored.

Figure 225 is a flowchart of the setting display process executed by the main control MPU 1311. The setting display process is executed in step S2342 of the timer interrupt process (Figure 223) when the setting status management area is not a value (00H) indicating the normal game status, and executes a process to display the setting value.

First, the main control MPU 1311 clears the LED segment port (step S2370).

Then, it is determined whether a value (03H) indicating a RAM abnormality is recorded in the setting status management area (step S2371). If a value indicating a RAM abnormality is not recorded in the setting status management area, the output of the LED segment terminal is set so that the current setting value is displayed on the base display 1317 (step S2372). On the other hand, if a value indicating a RAM abnormality is recorded in the setting status management area, the output of the LED segment terminal is set so that an error is displayed on the base display 1317 (step S2373).

Then, an LED common signal corresponding to the LED common counter is output (step S2374), and the driver is driven to output display data (segment signal) corresponding to the set value or error display to the base display 1317 (step S2375), and the process returns to the calling process.

[12-18. Alternative example 3 of setting change/confirmation processing]
Next, another embodiment of a pachinko machine having a setting change function will be described. In the following described Example 3, the main difference from the above-mentioned Example 2 is that the timer interrupt processing for the setting change processing is provided separately from the timer interrupt processing for normal play. The processing other than that described below is the same as that of the above-mentioned Example 2.

In addition, in the third example, similar to the second example, the setting change switch 972 is not provided, and the setting value can be selected by operating the RAM clear switch 954. However, in order to distinguish between the original function of the RAM clear switch 954 to initialize the main control RAM 1312 and its setting change function, the operation for changing the setting value may be described as the setting change switch 972.

Figures 226 and 227 are flowcharts of the power-on processing executed by the main control MPU 1311 when the power is turned on.

First, when the power is turned on and the reset signal is released, the main control MPU 1311 starts processing from address 8000, which is the start address of the program code. The main control MPU 1311 sets the protection of the main control RAM 1312 to be disabled and the prohibited area to be disabled in the RAM protection register (step S2400). The main control MPU 1311 has the function of designating the use area of the main control RAM 1312, and determining that an access to a prohibited area other than the designated area is an abnormality and resetting it. In this modification example 3, in order to release the reset function due to access to the prohibited area of the main control RAM 1312, the prohibited area is set to be disabled, thereby making it possible to access all areas of the main control RAM 1312. Note that it is also possible to designate an unused area of the main control RAM 1312 as a prohibited area, enable the prohibited area, and reset the main control MPU 1311 when access to the designated prohibited area is detected.

In other words, in the pachinko machine 1 of this embodiment, if the power is turned on with the RAM clear switch 954 operated, a specified area of the main control RAM 1312 is immediately initialized. However, if the checksum does not match or the backup flag is not set correctly, a RAM abnormality is detected and the gaming machine is stopped, rendering it unable to be played. After that, unless a setting change operation is performed, the main control RAM 1312 is not initialized and no game can be played.

For this reason, if the prohibited area of the RAM protect register is set to enabled, a reset will occur due to incorrect access to the prohibited area of RAM caused by a malfunction or defect, and when the main control MPU 1311 executes power-on processing, it will determine that there is a RAM abnormality because power outage processing has not been executed, the checksum has not been calculated, and the backup flag has not been set. If a RAM abnormality is determined, not only will gameplay be initialized by a RAM clear process, but gameplay cannot be resumed unless an employee of the hall clears the RAM abnormality (changes settings), so it is desirable to set the prohibited area of the RAM protect register to "disabled."

The prohibited area may be set to enabled. By setting the prohibited area to enabled, if there is any unauthorized access to the prohibited area of the main control RAM 1312, the game cannot be resumed unless a hall attendant clears the RAM abnormality (changes the settings), improving resistance to fraudulent activity.

Next, a simple clear mode timer of a predetermined time is set to the watchdog timer (step S2401), and the watchdog timer is cleared (step S2402). After that, the power outage clear signal is set to ON (step S2403), and the power outage clear signal is set to OFF (step S2404). By setting the power outage clear signal to ON and then to OFF, the power outage warning signal stored in the latch can be set to a normal state (a state where there is no power outage).

Next, the signal levels of the setting key 971 and the RAM clear switch 954 are read from the PF port and stored in a register (step S2405). The determination of whether the RAM clear switch 954 and the setting key 971 have been operated is performed by the main control MPU 1311 after the peripheral control board 1510 has been started up, so if a hall employee accidentally stops operating the RAM clear switch 954 or the setting key 971 while waiting for the peripheral control board 1510 to start up, the RAM clear switch 954 and the setting key 971 will be determined to be in a state unintended by the hall employee. For this reason, the input state (level) of the RAM clear switch 954 and the setting key 971 is stored in a temporary storage means such as a register at an early stage after the power-on process begins, and the state of the RAM clear switch 954 and the setting key 971 stored in a temporary storage means such as a register is determined after the standby state of the peripheral control board 1510 ends. This ensures that even if a hall employee accidentally stops operating the keys at an early stage after power-on, the operation of the RAM clear switch 954 and the setting key 971 during the power-on operation is detected reliably.

Then, it is determined whether the power outage warning signal indicates that a power outage is occurring (step S2406). If the power outage warning signal has been detected, the power supply voltage of the pachinko machine is not normal, so in step S2406, the process waits until the power supply voltage stabilizes. In the loop of step S2406, the watchdog timer is not cleared, so the watchdog timer will generate a reset if the power outage is not resolved. In this watchdog timer reset, the program is started immediately from the start address without performing a security check as in a system reset, and power-on processing is executed. For this reason, the loop will not be exited unless the power outage warning signal is released in the loop of step S2406.

In this way, the power outage determination process that detects the power outage warning signal is executed in two places: first, in steps S2406 and S2408 during power-on processing, and second, in step S2450 of the main control side main processing during normal play. In the latter (step S2450), power outage processing from step S2462 onwards is executed upon detecting a power outage, but in the former (steps S2406 and S2408), power outage processing is not executed even if a power outage is detected. Note that, since the checksum value and backup flag value are maintained during the loop period, it is possible to correctly return to the state at the time of the power outage without executing power outage processing.

In the pachinko machine 1 of this embodiment, there are two types of resets: a system reset generated by the reset circuit, and a user reset generated by a watchdog timer or access outside the designated area of the game control RAM 1312. In a system reset, a program is started after a security check of several hundred milliseconds is performed, but in a user reset, a program is started immediately when the reset is released without performing a security check.

For this reason, for example, if a reset occurs due to the watchdog timer during normal game processing, a RAM abnormality is determined because power outage processing is not executed, the checksum is not calculated, and the backup flag is not set. If a RAM abnormality is determined, the game state is initialized by a RAM clear process, and game play cannot be resumed unless a store attendant clears the RAM abnormality (changes settings). On the other hand, even if a reset occurs due to the watchdog timer in steps S2406 and S2408 during power-on processing, the state at the time of the power outage can be correctly restored without a store attendant clearing the RAM abnormality (changing settings).

In this way, the reason why resets caused by the watchdog timer are divided into cases where a setting change operation is required to cancel the RAM abnormality in order to restart the pachinko machine 1 and cases where it is not required is that when a reset occurs due to the watchdog timer during normal play, it occurs when a software malfunction occurs, and it is highly likely that the data stored in the main control RAM 1312 has been destroyed and that the contents stored are different from the gaming state at the time of the power outage, so it is desirable to initialize the main control RAM 1312. On the other hand, when a reset occurs due to the watchdog timer during power-on processing, it occurs when a hardware malfunction occurs, and it is unlikely that the data stored in the main control RAM 1312 has been destroyed, so there is little need to initialize the main control RAM 1312.

The above describes a reset caused by a watchdog timer, but similar processing is also performed for other types of user resets other than those caused by a watchdog timer. In other words, in the pachinko machine 1 of this embodiment, there are multiple reset factors, and the above-mentioned processing can be performed by a reset caused by one of these reset factors (for example, a user reset caused by a watchdog timer).

Then, a sub-startup waiting timer (e.g., about 2 seconds) is started, and the watchdog timer is continuously cleared until the timer times out, while waiting for the peripheral control board 1510 to start up (step S2407). The waiting for the peripheral control board 1510 to start up can be any time between when the power is turned on and when the first command is sent to the peripheral control board 1510, and does not have to be after the setting value is determined.

Then, it is again determined whether the power outage warning signal indicates that a power outage is occurring (step S2408). If the power outage warning signal has been detected, the power supply voltage of the pachinko machine 1 is abnormal, so the machine waits in step S2408. Note that the determination of whether the power outage warning signal indicates that a power outage is occurring can be made in either step S2406 or S2408, rather than in both steps.

Then, the setting value confirmation process shown in FIG. 215 is executed to determine whether the setting value is within the normal range (step S2409).

Then, the flag register is saved to the stack area in the game control area (step S2410), and the power-on RAM outside game area confirmation process shown in FIG. 216 is executed to determine whether there is an abnormality outside the game control area of the main control RAM 1312 (step S2411). Then, the flag register saved in the stack area in the game control area is restored (step S2412).

Then, the RAM abnormality determination result value is provisionally set in the C register (step S2413), and the RAM abnormality value (03H) in the setting status management area is provisionally set in the B register (step S2414).

The value set in the setting status management area in Alternative Example 3 differs from that shown in FIG. 201(B) in the previously described embodiment, and as shown in FIG. 220(A), 03H is recorded if there is an abnormality in the main control RAM 1312. In other words, the setting status management area in Alternative Example 3 is a 1-byte memory area in which the operation mode of the pachinko machine 1 is recorded, and for example, the lower 4 bits are used and the upper 4 bits are not defined. Specifically, 00H is recorded in the normal game state, 01H in the setting confirmation mode, 02H in the setting change mode, and 03H is recorded if there is an abnormality in the main control RAM 1312.

The setting status management area is not updated to 00H by the RAM clear process performed by operating only the RAM clear switch 954, and the current value is maintained. It is also updated from 01H to 00H when the setting confirmation mode ends, and from 02H to 00H when the setting change mode ends. Furthermore, if there is an abnormality in the main control RAM 1312, it is updated from 03H to 02H when the setting change mode is entered by the setting change operation at the next power-on, and is updated from 02H to 00H when the setting change mode ends.

Furthermore, it is determined whether there is an abnormality in the main control RAM 1312 (steps S2415, S2416). Specifically, a checksum calculated and stored from the data used as the game control area (excluding data saved in the stack) among the areas backed up in the internal RAM 1312 at the time of the previous power outage is compared with a checksum calculated using the same area, and if the two are different, it is determined that there is an abnormality in the main control RAM 1312. Furthermore, if the value of the power outage flag indicating that the data was backed up normally (the power outage processing was executed normally) is not stored in the backup flag area, it is determined that the data in the main control RAM 1312 was not backed up normally at the time of the power outage (the power outage processing was not executed normally) and that there is an abnormality in the main control RAM 1312.

If there is an abnormality either within the game control area of the main control RAM 1312 or outside the game control area, the program proceeds to step S2419. On the other hand, if there is no abnormality either within the game control area of the main control RAM 1312 or outside the game control area, the RAM normality judgment result value is provisionally set in the C register (step S2417), the information in the setting state management area is set in the B register (step S2418), and the program proceeds to step 2219. As a result, the judgment result as to whether the main control RAM 1312 is abnormal or not is set in the C register, so that in subsequent processing, there is no need to execute the process of judging the RAM abnormality again (the process of judging whether the checksum and backup flag match) to judge whether there is a "RAM abnormality" or "game state before power outage", and the program size can be reduced.

In addition, the B register is set with the value of the setting state management area at the time of a power outage or the judgment result of the main control RAM 1312 at the time of power recovery (RAM abnormal value), and by provisionally setting the RAM abnormal value in the setting state management area in step S2419, unnecessary processing can be eliminated and the program size can be reduced. For example, if the RAM abnormal value is not provisionally set in the setting state management area in step S2419, when the judgments in steps S2423 and S2424 are judged as YES, it is necessary to set the RAM abnormal value in the setting state management area and execute a JUMP command to step S2436. However, since the RAM abnormal value has already been provisionally set in the setting state management area in step S2419, by specifying S2436 as the JUMP destination when making the judgment in step S2423, the number of JUMP commands can be reduced, as shown in the source code example below.

Example of source code when RAM abnormal value is not provisionally set in step S2419
AND A,30H ;S2420
CP A,30H ;S2421 (bit5: setting key, bit4: RAM clear SW)
J R Z,RESET_P_6 ;

CP B,02H ;S2422
J R Z,RESET_P_6 ;

CP C,00H ;S2423
J.R. Z, $111 ;
$000:
LD W,03H ; equivalent to S2419
LD ( VALID_PALY ), W ;
JR S2436 ;Jump command to S2436
$111:
CP B,03H ;S2424
J.R. Z,$000 ;

XOR W,W ;S2425
LD ( VALID_PALY ), W ;
Example of source code when provisionally setting RAM abnormal value in step S2419
LD W,03H ;S2419
LD ( VALID_PALY ), W ;
AND A,30H ;S2420
CP A,30H ;S2421
J R Z,RESET_P_6 ;

CP B,02H ;S2422
J R Z,RESET_P_6 ;

CP C,00H ;S2423
JR NZ,S2436 ;

CP B,03H ;S2424
J.R. Z,S2436 ;

XOR W,W ;S2425
LD ( VALID_PALY ), W ;

Then, in step S2419, a value (03H) indicating a RAM abnormality is provisionally recorded in the setting status management area (step S2419).

Then, among the register values in which the PF port value is recorded, the bits of the setting key 971 and the RAM clear switch 954 are masked (step S2420). After that, it is determined using the values stored in the register whether the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON when the power was turned on (step S2421). If the setting key 971 was operated to ON and the RAM clear switch 954 was operated to ON, it is determined that a setting change operation has been performed, and the process proceeds to step S2430.

On the other hand, if the setting key 971 has not been operated and the RAM clear switch 954 has not been operated, it is determined whether the setting change mode was active when the power outage occurred (step S2422). For example, when the value of the B register set in step S2418 is the setting change mode (02H), it is determined that a power outage occurred during the setting change mode.

If it is determined that a power outage has occurred during the setting change mode, the process proceeds to step S2430.

On the other hand, if it is determined that no power outage has occurred during the setting change mode, it is determined whether there is an abnormality inside or outside the game control area of the main control RAM 1312 (step S2423). For example, the determination result stored in the C register in the above-mentioned step S2413 can be used to determine whether there is an abnormality inside the game control area. As a result, if there is an abnormality either inside or outside the game control area of the main control RAM 1312, the process proceeds to step S2436.

On the other hand, if there is no abnormality either inside or outside the game control area of the main control RAM 1312, it is determined whether a power outage occurred during RAM abnormality processing (step S2424). For example, if the value of the setting status management area set in the B register in S2418 is a value (03H) indicating a RAM abnormality, it is determined that a power outage occurred during RAM abnormality processing.

If it is determined that a power outage has occurred during RAM abnormality processing, the process proceeds to step S2436. On the other hand, if it is determined that a power outage has not occurred during RAM abnormality processing, a value (00H) indicating a normal game state is recorded in the setting state management area (step S2425). By recording 00H in the setting state management area in step S2425, the value (03H) indicating a RAM abnormality provisionally recorded in the setting state management area in step S2419 is reset to 00H as a provisional setting value. Also, by recording 00H in the setting state management area in step S2425, the value of the setting state management area when jumping from step S2426 to step S2431 is different from that when jumping to step S2435 from step S2426 and S2431. Therefore, since the value of the setting state management area is different between the normal RAM clear processing and the RAM clear processing associated with the setting change processing, even if the program for both RAM clear processing is common, the call source can be distinguished, and there is no need to provide separate programs, which reduces the program size.

As shown in the source code example below, at the timing of step S2425, it has not been determined whether 01H or 00H will be recorded in the setting state management area. The setting state management area should be set to the determined value at the time of determination, but if this is done, a process is required to record 00H in the setting state management area after the RAM clear process when it is determined that the RAM clear switch 954 has been turned ON. For this reason, since the process content differs between the process at power-on and the RAM clear process when the settings are changed, dedicated processes are required for each except for the process that initializes the main control RAM 1312. For this reason, 00H is provisionally set in step S2425 to make the process of initializing the main control RAM 1312 common between when the settings are changed and when only the RAM clear switch 954 is operated.

Example of source code when 00H is not temporarily set in the setting status management area in step S2425
CP A,10H; S2426 (PF port information is stored in the A register)
JR NZ,$000 ;(bit5: setting key bit4: RAM clear switch)

LD A,(JOTAI_BF) ;S2427
LD ( POWER_BF ), A ;

CP A,20H ;S2428
JR NZ, $111 ;

LD W,01H ;S2429
LD ( VALID_PALY ), W ;
JR S2436 ;

$000:
XOR W,W ;equivalent to S2425
LD ( VALID_PALY ), W ;
JR S2435 ;Increase

$111:
XOR W,W ; increment
LD (VALID_PALY), W ; Increment
JR S2436 ;Increase

S2430:
LD W,02H ;S2430
LD ( VALID_PALY ), W ;
....
S2435:
[RAM clear processing] ;S2435
S2436:
[Initialize all command buffers]; S2436
Example of source code when provisionally setting 00H in the setting status management area in step S2425
XOR W,W ;S2425
LD ( VALID_PALY ), W ;

CP A,10H ;S2426
JR NZ,S2435 ;

LD A,(JOTAI_BF) ;S2427
LD ( POWER_BF ), A ;

CP A,20H ;S2428
J.R. Z,S2436 ;

LD W,01H ;
LD ( VALID_PALY ), W ;
JR S2436 ;
S2430:
LD W,02H ;S2430
LD ( VALID_PALY ), W ;
....
S2435:
[RAM clear processing] ;S2435
S2436:
[Initialize all command buffers]; S2436

Then, the value stored in the register is used to determine whether the RAM clear switch 954 was turned ON when the power was turned on (step S2426). If the RAM clear switch 954 was turned ON, the process proceeds to step S2435.

In the pachinko machine of this embodiment, processing is allocated based on the operation of the RAM clear switch 954, the operation of the setting key 971, and the value recorded in the setting status management area. For example, if it is determined that the main control RAM 1312 is abnormal, 03H is recorded in the setting status management area, and 03H is maintained until the power is cut off, so that normal game processing cannot be executed. In this case, if the power is cut off once, a setting change operation is performed, and then the power is turned on, the RAM abnormality can be canceled. That is, if it is determined in step S2421 that both the setting key 971 and the RAM clear switch 954 have been operated (setting change operation), the setting status management area is updated from a value indicating a RAM abnormality (03H) to a value indicating a setting change (02H) (step S2430), and the RAM abnormality state ends. In this way, recovery from a RAM abnormality is always via a setting change. In other words, before determining whether the state at the time of the power outage is a RAM abnormality, it is determined whether a setting change operation has been performed, so that the RAM abnormality can be eliminated only by changing the setting value.

If a RAM abnormality is determined, the work area and stack area in the area inside the game control area and the area outside the game control area may be initialized and game processing may be started. In this way, even if the main control RAM 1312 is determined to be abnormal, the normal game state can be automatically restored.

In addition, if a RAM abnormality is determined, game play may be stopped, and if the work areas in the areas within the game control area and the areas outside the game control area are determined to be normal when the power is restored after a power cut, the work areas and stack areas in the areas within the game control area and the areas outside the game control area may be initialized and game processing may be started. In this way, the normal game state can be restored by turning the power switch ON/OFF.

In addition, if a RAM abnormality is determined, game play may be stopped, and if the work areas in the game control area and outside the game control area are determined to be normal when the power is restored after a power cut, and the RAM clear switch is operated, the work areas and stack areas in the game control area and outside the game control area may be initialized and game processing may be started. In this way, the normal game state can be restored by operating the RAM clear switch 954 after the power is cut.

In addition, if a RAM abnormality is determined, game play is stopped, and if the work areas in the game control area and outside the game control area are determined to be normal when the power is restored after a power cut, and the setting key 971 is operated, the work areas and stack areas in the game control area and outside the game control area may be initialized and game processing may be started. In this way, the normal game state can be restored by operating the setting key 971 after the power is cut.

On the other hand, if the RAM clear switch 954 has not been operated, information on the game state at the time of the power outage is stored in the power-on state buffer in order to restore the game state before the power outage occurred (step S2427). In this way, preparations are made on the peripheral control board 1510 side to restore the effects (background, decorative pattern appearance (different decorative patterns are used for low probability and high probability)) corresponding to each game state (for example, low probability state or high probability state, time-saving state or non-time-saving state). This is used when creating the power-on operation command in step S2300 of the power-on setting process (INITIAL_SET) executed in step S2439.

Then, the value stored in the register is used to determine whether the setting key 971 was operated to ON when the power was turned on (step S2428). If the setting key 971 was operated to ON, it is determined that a setting check operation has been performed, and a value (01H) indicating the setting check mode is recorded in the setting status management area (step S2429), and the process proceeds to S2436. In other words, regardless of whether the state at the time of the power outage was the setting check mode or not, if only the setting key 971 has been operated (if the RAM clear switch 954 has not been operated), the mode transitions to the setting check mode.

Because steps S2425 to S2429 are processes that are executed when at least one of the RAM clear switch 954 and the setting key 971 is not operated, it is possible to determine whether the RAM clear switch 954 is operated (step S2426) or whether the setting key 971 is operated (step S2428), either first. That is, as shown in the figure, it is possible to determine whether the RAM clear switch 954 is operated (step S2426) and then determine whether the setting key 971 is operated (step S2428), or it is possible to determine whether the RAM clear switch 954 is operated (step S2426) and then determine whether the setting key 971 is operated (step S2428).

If step S2421 or step S2422 returns YES, a value (02H) indicating the setting change mode is recorded in the setting status management area (step S2430). Then, it is determined whether there is an abnormality in the work area outside the game control area of the main control RAM 1312 (step S2431). For example, the determination result stored in the C register in the above-mentioned step S2413 can be used to determine whether there is an abnormality outside the game control area. If there is no abnormality outside the game control area of the main control RAM 1312 as a result, the process proceeds to step S2435.

On the other hand, if there is an abnormality outside the game control area of the main control RAM 1312, the flag register is saved to the stack area in the game area (step S2432), and the RAM abnormality outside the game area process shown in Fig. 217 is executed (S2433). After that, the flag register saved to the stack area in the game area in step S2432 is restored (step S2434).

Then, the work area other than the setting value and setting status management area in the game control area of the main control RAM 1312 and the stack area in the game control area are initialized (step S2435). Note that unused areas provided between the work area and stack area may also be initialized.

After that, all command buffers are initialized (step S2436). This is because if the power is turned off while commands are stored in the command buffer and then turned back on without clearing the RAM, the unsent commands stored in the command buffer are sent. For example, if the power is turned off while a variation command is being sent, the symbol command may be sent but the subsequent variation pattern command may not be sent. If only the variation pattern command is sent when the power is turned on, the peripheral control board 1510 may determine that an abnormality has occurred. Furthermore, if unsent commands in the process of changing settings are stored in the command buffer, the peripheral control board 1510 may set the game state based on the unsent command after the power is restored, causing a malfunction. To prevent such abnormalities from occurring, the command buffer is initialized in step S2436.

Although the command buffer is initialized in step S2436, the command buffer may be cleared when starting the setting change process or the setting confirmation process. In the setting change process, the command buffer is cleared when the main control RAM 1312 is initialized, so there is no need to clear the command buffer separately. However, in the setting confirmation process, since the main control RAM 1312 is not initialized, it is a good idea to clear the command buffer when moving to setting confirmation.

Then, the functions of the devices (CTC, SIO, etc.) built into the main control MPU 1311 are initialized (step S2437). Specifically, the timer interrupt period time is set in CTC0 for setting change processing, and CTC0 is set to interrupt permission. Note that the time of CTC1, which controls the timer interrupt processing in the normal game state, is not set, and the interrupt of CTC1 for normal gameplay remains set to prohibited.

Then, the hardware random number (e.g., the winning/losing random number) built into the main control MPU 1311 is started (step S2438) to start updating the hardware random number, and the power-on setting process shown in FIG. 219 is executed (step S2439).

Finally, the timer interrupt is set to enabled (step S2440), and the process proceeds to the main control side main processing (Figure 228).

Figure 228 is a flowchart of the main control side main processing executed by the main control MPU 1311. The main control side main processing is executed after step S2440 of the power-on processing (Figure 227).

First, the main control MPU 1311 executes the first main loop process (steps S2450 to S2453) for the setting change process. In the first main loop process, the main control MPU 1311 first acquires a power outage warning signal and determines whether a power outage has occurred based on whether the power outage warning signal is ON (step S2450). In the third example, the main process monitors the power outage, but the timer interrupt process may monitor the power outage and execute the power outage process when a power outage is detected. For example, the timer interrupt process may determine whether the power outage warning signal is ON at least at one of the start and end of the timer interrupt, count the period during which the power outage warning signal is continuously output, and determine that a power outage has occurred when the count result reaches a predetermined value. In the third example, the timer interrupt process for the setting process and the timer interrupt process for the normal game process are provided separately, so that the power outage may be monitored by either timer interrupt process, or by both timer interrupt processes. Therefore, by making the power outage monitoring process and power outage processing into subroutines and executing these subroutines (power outage monitoring process, power outage processing) in each of the two timer interrupt processes, there is no need to incorporate the same program (code) for the power outage monitoring process and power outage processing into each timer interrupt process, and the program size can be reduced.

If a power outage warning signal is detected, power outage processing (steps S2462 to S2469) is executed.

On the other hand, if the power outage warning signal is not ON, power is being supplied normally, so interrupts are set to prohibited (step S2451), and it is determined whether a value indicating the start of play (00H) is recorded in the setting status management area (step S2452). If a value indicating the start of play is recorded in the setting status management area, proceed to step S2454 to start normal play. On the other hand, if a value indicating the start of play is not recorded in the setting status management area, interrupts are set to permitted (step S2453), and the process returns to step S2450, and the first main loop process for setting change processing is repeatedly executed.

When it is determined in step S2452 that a value indicating the start of play has been recorded in the setting state management area, the interrupt timer is switched to normal play, and then the second main loop process for normal play (steps S2457 to S2458) is executed. Before executing the second main loop process, the timer interrupt period time is first set in CTC1 for normal play (step S2454), the CTC0 interrupt (timer interrupt for setting process) is stopped, and the CTC1 interrupt (timer interrupt for normal play process) is started (step S2455), and the interrupt is set to permitted (step S2456).

Then, a power outage warning signal is acquired, and it is determined whether a power outage has occurred depending on whether the power outage warning signal is ON (step S2457). If a power outage warning signal is detected, power off processing (steps S2462 to S2469) is executed. On the other hand, if the power outage warning signal is not ON, power is being supplied normally, so random number update processing 2 is executed (step S2458). Random number update processing 2 may be the same as that described in FIG. 195, and mainly updates random numbers other than the random numbers used to determine whether a special lottery or normal lottery has been won. Then, the process returns to step S2457, and the second main loop processing for normal play is repeatedly executed.

When a power failure warning signal is detected in steps S2450 and S2457, power failure processing (steps S2462 to S2469) is executed. In the power failure processing in the main processing on the main control side shown in FIG. 228, a process is executed to back up data for restoring the state before the power failure occurred. Specifically, first, interrupts are prohibited (step S2462). This prevents the timer interrupt processing described later from being performed. Furthermore, the main control MPU 1311 clears the output ports and stops the operation of the devices controlled by the output from each port (step S2463). Specifically, the power failure clear signal OFF bit data is output to the solenoid, power failure clear, and ACK output ports. Note that it is not necessary to clear all output ports. For example, output ports for controlling solenoids and motors that consume a lot of power may be cleared. By clearing these output ports, the power consumption until the main board side power failure processing is completed is reduced, and the main board side power failure processing can be completed reliably.

Then, the flag register is saved to a stack area within the play area (step S2464), and power-off processing is executed to execute necessary processing before power is cut off for the work area outside the play area (step S2465). Details of the power-off processing are as shown in FIG. 222. Then, the flag register saved in the stack area within the play area is restored (step S2466).

Then, the main control MPU 1311 calculates a checksum of the work area in the game control area of the main control RAM 1312 to determine whether the data stored in the work area to be backed up has been properly retained, and stores the checksum in a specified checksum storage area of the main control RAM 1312 (step S2467). This checksum is used to determine whether the data backed up in the work area is correct. The areas for which the checksum is calculated should exclude the setting state management (setting value and value of the setting state management area) that may be changed between the time the power is turned on and the execution of the main processing on the main control side, the backup flag, and the value of the checksum area, among the work areas in the game control area.

Furthermore, a value (5AH) indicating that the power failure processing has been normally executed is stored in the backup flag area as a power failure flag (step S2468). This completes the storage of the game backup information. Finally, a setting value that enables RAM protection (write prohibited) and disables the prohibited area is written to the RAM protect register, prohibiting writing to the main control RAM 1312 (step S2469), and waiting until recovery from the power failure (infinite loop). The main control MPU 1311 has a function of designating a use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. In this embodiment, the reset function due to access to this prohibited area is released, making access to all areas possible. Note that it is also possible to designate an unused area of the main control RAM 1312 as a prohibited area and set the prohibited area as valid in the RAM protect register, so that the main control MPU 1311 is reset when access to the designated prohibited area is detected.

In the above-mentioned process, the steps are executed in the following order: clearing the output port (step S2463), processing when the power is turned off (step S2465), calculating the checksum (step S2467), and setting the backup flag (step S2468). However, the execution order of these four steps is not limited to that shown in the figure, and other orders may also be used.

In the third example, the occurrence of a power outage is monitored by the main processing on the main control side, but the occurrence of a power outage may be monitored by timer interrupt processing, and power outage processing may be executed based on the monitoring results. For example, in each of the two main loops, the power outage signal may be checked at least at the start and end, the period during which the power outage signal is continuously output may be measured, and the occurrence of a power outage may be detected when the measurement result reaches a predetermined value.

In the main control main processing shown in FIG. 228, two main loops are provided corresponding to the timer interrupt processing for the setting change processing and the timer interrupt for normal play, and there is always one opportunity to execute the timer interrupt processing for the setting change processing. In addition, at this execution opportunity, the timer interrupt processing for the setting change processing may not be executed (for example, when branching to YES in step S2454). By providing two main loops in this way, it is possible to switch between executing the processing to calculate the base value in the main loop for normal play (timer interrupt processing) and executing the processing to calculate the base value so as not to execute the processing to calculate the unnecessary base value in the timer interrupt processing for the setting change processing. In the alternative example 3, since the timer interrupt processing for the setting processing and the timer interrupt processing for normal play processing are provided separately, power outages may be monitored in either timer interrupt processing, or power outages may be monitored in both timer interrupt processing. Therefore, by making the power outage monitoring process and power outage processing into subroutines and executing these subroutines (power outage monitoring process, power outage processing) in each of the two timer interrupt processes, there is no need to incorporate the same program (code) for the power outage monitoring process and power outage processing into each timer interrupt process, and the program size can be reduced.

Figure 229 is a flowchart of the timer interrupt processing for the setting processing executed by the main control MPU 1311.

First, the main control MPU 1311 sets the register bank selection flag to 1 and switches the register bank (step S2470). The main control MPU 1311 has two register groups used for calculations, one of which is used as the register group of bank 0 and the other is available as the register group of bank 1, and is configured to be able to use either bank by switching the bank. In this embodiment, register bank 0 is used in the main processing on the main control side, and register bank 1 is used in the timer interrupt processing for setting processing or normal play. For this reason, an instruction to switch to bank 1 is executed at the start of the timer interrupt processing, but it is not necessary to execute an instruction to switch to bank 0 at the end of the timer interrupt processing. This is because the main control MPU 1311 stores the state of the bank in a flag register (for example, a register in which the Z flag and C flag are set), and the flag register is saved to the stack area at the start of the interrupt and is restored from the stack area by executing the RET command. For this reason, the bank flag of the register stored in the flag register is also restored to its original state by executing the RET command. If a configuration is adopted in which the bank state is not stored in the flag register, it is necessary to execute a bank switching command at the end of the timer interrupt process to return to bank 0.

The flag register also stores a flag that controls whether interrupts are enabled, so there is no need to set it to interrupt enabled before executing the RET instruction. The flag that controls whether interrupts are enabled is set to interrupt disabled state after the flag register is stacked at the start of timer interrupt processing. Therefore, unless interrupts are enabled during timer interrupt processing (by using the EI instruction, for example) or the RETI instruction is executed, the interrupts will not be enabled.

Next, the LED common counter is incremented by +1. If the LED common counter value exceeds the upper limit, it is reset to 0 (step S2471).

Next, switch input process 1 is executed (step S2472). In switch input process 1, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, an ON edge is created, and the input information is stored in the input information storage area of the main control RAM 1312.

Note that because switch input process 1 in step S2472 is processing related to a winning signal, in the timer interrupt process executed in setting change mode or setting confirmation mode, a NO determination is made in step S2473, so winning is detected, but cheating is not detected. Note that even if a winning is detected, prize balls are not paid out, and no variable display is performed. This is because setting change operations and setting confirmation operations are performed by hall employees, and cheating is not performed in setting change mode or setting confirmation mode, so it is considered desirable not to detect cheating.

Note that even in the setting change mode or setting confirmation mode, some fraud detection sensors (e.g., radio wave sensors) may be detected by switch input process 1 to monitor specific types of fraud. In this way, it is possible to detect fraud where a person attempting to commit fraud (a cheater) forcibly activates the setting change mode by emitting radio waves, etc. For example, while an employee of the hall is changing settings or checking settings, the door is open and the sensor attached to the door is in a position close to the adjacent pachinko machine. Therefore, while a setting change operation or setting confirmation is being performed, cheating using radio waves, etc., at the adjacent pachinko machine can be detected.

Then, it is determined whether a value (00H) indicating the start of play is recorded in the setting status management area (step S2473). Note that in the timer interrupt process for the setting change process, since the value in the game status management area is normally other than 00H (01H to 03H), it is not necessary to determine whether a value (00H) indicating the start of play is recorded in the setting status management area; however, the determination is made in order to prevent fraudulent behavior such as illegally switching to setting change mode during normal play.

If a value indicating the start of play is recorded in the setting status management area, the process proceeds to step S2479 without executing the process for changing the setting value and displaying the setting (steps S2474 to S2478). On the other hand, if a value indicating the start of play is not recorded in the setting status management area, a specific output port is cleared (step S2474). For example, the signals cleared as specific output ports in step 2474 include the power outage clear signal, the solenoid signals for the big prize opening and electric chute, and the response signal (ACK) when a command is received by the payout control board 951. Then, the LED common port is turned OFF (step S2475). By turning OFF the LED common signal at an early stage of the timer interrupt process, the time until the LED common signal is turned ON, that is, the LED off time, is secured, and the ghost phenomenon in which the display before and after the LED display change appears mixed is suppressed, and the LED flickering is prevented.

Then, a security signal is output from the external terminal board 784 (step S2476), and the setting process shown in FIG. 224 is executed (step S2477). Then, the setting display process shown in FIG. 225 is executed (step S2478).

Furthermore, a peripheral board command transmission process is executed to output the value of the transmission information storage area to the serial communication circuit (step S2479). The transmission information storage area is a storage area that temporarily stores the generated transmission command. The value (command) stored in the transmission information storage area is read and stored in the transmission information storage area of the serial communication circuit (SIO). The serial communication circuit has a transmission information storage area that is a multi-byte FIFO-type transmission buffer, and sequentially transmits the values stored in the transmission information storage area of the serial communication circuit to the peripheral control board 1510. Note that since the capacity of the transmission information storage area of the serial communication circuit is finite, if there are unsent commands remaining in the transmission information storage area of the serial communication circuit and the transmission information storage area of the serial communication circuit is full or close to full, it is preferable to control whether to store the command in the transmission information storage area of the serial communication circuit according to the free space state of the transmission information storage area of the serial communication circuit. For example, it may be determined whether the free space in the transmission information storage area of the serial communication circuit is larger than the size (number of bytes) of the command to be stored in the transmission information storage area of the serial communication circuit, and if the free space is larger, the command may be stored in the transmission information storage area of the serial communication circuit. Also, a predetermined upper limit may be set for the size of the command to be stored in the transmission information storage area of the serial communication circuit each time a command transmission process to the peripheral control board 1510 is executed, and if the size of the command to be stored in the transmission information storage area of the serial communication circuit exceeds the predetermined upper limit without determining the free space in the transmission information storage area of the serial communication circuit, even if not all the commands can be stored in the transmission information storage area of the serial communication circuit, the remaining commands may be stored in the transmission information storage area of the serial communication circuit in the peripheral board command transmission process executed in the next timer interrupt process, and transmitted to the peripheral control board 1510.

The upper limit should be set to the same amount as or less than the amount of data that the serial communication circuit (SIO) can transmit in one timer interrupt period. For example, if the communication speed of the serial communication circuit is 20 kbps and the timer interrupt period is 4 ms, approximately 80 bits of serial communication are possible in one timer interrupt period. If one command consists of 20 bits, 80÷20=4, so a limit of 4 commands should be set. In practice, the upper limit may be set to 5 commands, which is one more. This is because, although the maximum length of a command is assumed to be 20 bits, there are many commands that are shorter than the maximum length.

Regardless of whether or not a specified upper limit is set on the amount of command data stored in the transmission information storage area in one command transmission process, it is advisable to set the capacity of the storage area in which commands are stored before being stored in the transmission information storage area to be smaller than or equal to the capacity of the transmission information storage area so that the transmission information storage area does not become full.

Then, a predetermined value (18H) is set in the watchdog timer clear register WCL to clear the watchdog timer (step S2480). Note that since the watchdog timer uses the simple clear mode, the watchdog timer is cleared by setting one word. Then, a return instruction (e.g. RETI) is issued to switch the register bank (step S2481), and the process returns to that before the interrupt.

The timer interrupt processing for the setting change processing shown in FIG. 229 differs from other timer interrupt processing in that the random number update processing (R_ATART_K) is not executed, but since the hard random number has already been started in S2438, the random number update processing may be executed in the timer interrupt processing for the setting change processing in the same way as the hard random number.

In addition, in the third example, the test signal output process may be executed in a timer interrupt process for normal play (for example, the output data setting process S2505 in FIG. 230), or may be called within a timer interrupt process for setting change processing.

Figure 230 is a flowchart of the timer interrupt processing for normal play executed by the main control MPU 1311.

First, the main control MPU 1311 sets the register bank selection flag to 1 and switches the register bank (step S2490). The main control MPU 1311 has two register groups used for calculations, one of which is used as the register group of bank 0 and the other is available as the register group of bank 1, and is configured to be able to use either bank by switching the bank. In this embodiment, register bank 0 is used in the main processing on the main control side, and register bank 1 is used in the setting processing or timer interrupt processing for normal play. For this reason, an instruction to switch to bank 1 is executed at the start of the timer interrupt processing, but it is not necessary to execute an instruction to switch to bank 0 at the end of the timer interrupt processing. This is because the main control MPU 1311 stores the state of the bank in a flag register (for example, a register in which the Z flag and C flag are set), and the flag register is saved in the stack area at the start of the interrupt and is restored from the stack area by executing the RET command. For this reason, the bank flag of the register stored in the flag register is also restored to its original state by executing the RET command. If a configuration is adopted in which the bank state is not stored in the flag register, it is necessary to execute a bank switching command at the end of the timer interrupt process to return to bank 0.

The flag register also stores a flag that controls whether interrupts are enabled, so there is no need to set it to interrupt enabled before executing the RET instruction. The flag that controls whether interrupts are enabled is set to interrupt disabled state after the flag register is stacked at the start of timer interrupt processing. Therefore, unless interrupts are enabled during timer interrupt processing (by using the EI instruction, for example) or the RETI instruction is executed, the interrupts will not be enabled.

Next, the LED common counter is incremented by +1. If the LED common counter value exceeds the upper limit, it is reset to 0 (step S2491).

Next, switch input process 1 is executed (step S2492). In switch input process 1, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, an ON edge is created, and the resulting signal is stored as input information in the input information storage area of the main control RAM 1312.

Next, random number update process 1 is executed (step S2493). In random number update process 1, the random numbers for determining a jackpot, the random numbers for the jackpot symbol, and the random numbers for the small jackpot symbol are updated. In addition to these random numbers, the random numbers for determining the initial values of the random numbers for determining the jackpot symbol and the random numbers for determining the small jackpot symbol, which are updated in random number update process 2 of the main control main process shown in FIG. 221, are also updated.

Then, execute special switch input processing (step S2494).

Then, the timer update process is executed (step S2495). In the timer update process, for example, in addition to the time during which the special symbol display 1185 is lit according to the variable display pattern determined by the special symbol and special electric role control process, and the time during which the normal symbol display 1189 is lit according to the normal symbol variable display pattern determined by the normal symbol and normal electric role control process, the ACK signal input judgment time, which is set as a judgment condition when judging whether or not the payer ACK signal that informs the payout control board 951 that various commands transmitted by the main control board 1310 (main control MPU 1311) have been normally received, is managed. Specifically, when the variable display pattern or normal symbol variable display pattern has a variable time of 5 seconds, the timer interrupt period is set to 4 ms, so that the variable time is subtracted by 4 ms each time this timer subtraction process is performed, and the variable time of the variable display pattern or normal symbol variable display pattern is accurately measured by the subtraction result becoming a value of 0.

Next, the prize ball control process is executed (step S2496). In the prize ball control process, input information is read from the input information storage area, the number of game balls (prize balls) to be paid out is calculated based on the read input information, and written to the main control RAM 1312. Also, based on the calculation result of the number of prize balls, a prize ball command for paying out game balls is created, and a self-check command for checking the connection status between the main control board 1310 and the payout control board 951 is created. The main control MPU 1311 transmits the created prize ball command and self-check command to the payout control board 951 as main payout serial data. The main control MPU 1311 has a serial communication circuit for output of two channels, and transmits commands to the peripheral control board 1510 through one channel and to the payout control board 951 through the other channel. The transfer rate (baud rate) of the serial communication can be set for each channel, and for example, in step S2437, the transfer rate of the serial communication circuit is set. For example, the transfer rate may be set lower on the payout control board 951 side than on the peripheral control board 1510 side. This is because the prize balls controlled by the payout control board 951 have game value, so they are less susceptible to noise and are transferred at a slow speed to prevent abnormal prize ball commands due to command garbling or missing. However, since the peripheral control board 1510 transmits commands for performance that do not have game value, the performance can be restored with the next command. Furthermore, it is desirable to transmit commands quickly to the peripheral control board 1510 so that a large number of commands are transmitted and the performance is performed responsively and does not give the player a sense of incongruity. Note that if the response of the performance is poor (for example, even if a game ball enters the start winning hole and the special pattern display on the function display unit 1400 starts to change, the decorative pattern does not start to change on the main liquid crystal display device 1600), the player will feel uneasy that there may be a malfunction.

Next, the slot command reception process is executed (step S2497). In the dispensing control board 951, the dispensing control program transmits various 1-byte (8-bit) commands classified as status display (for example, slot status 1 command, error release navigation command, and slot status 2 command). On the other hand, as described below, the dispensing control program outputs an error occurrence command when an error occurs in the dispensing operation, and outputs an error release notification command based on the detection signal of the operation switch. In the slot command reception process, when various commands are normally received as payer serial data, information to inform the payer control board 951 of this fact is stored in the output information storage area of the main control built-in RAM 1312. In addition, the main control MPU 1311 formats the command normally received as payer serial data into a 2-byte (16-bit) command (for example, slot status display command, error release notification command, etc.) and stores it in the above-mentioned transmission information storage area. Specifically, in the frame command reception process, in order to issue a notification corresponding to the command received from the dispensing control board 951, the command received from the dispensing control board 951 is modified to conform to the system of commands to be sent to the peripheral control board 1510, and stored in the transmission information storage area of the serial communication circuit (SIO) in the same way as other generated commands. In addition, when a command from the dispensing control board 951 is received normally, a signal is generated to control the output of a main ACK signal. The main ACK signal is output directly to the dispensing control board 951 from an output port, not from the serial communication circuit. The main ACK signal may also be output as a command from the serial communication circuit.

Next, a fraud detection process is executed (step S2498). In the fraud detection process, abnormal conditions related to fraud (magnetism, vibration, winning abnormality, etc.) are checked. For example, when the input information is read from the input information storage area described above, and the count switch detects that a game ball has entered the big winning slots 2005, 2006 when the big win game state is not being played, the main control program creates a winning abnormality display command that is classified as a notification display as an abnormal condition, and stores it in the transmission information storage area described above as transmission information.

Next, a switch passing command output process is executed to create a command corresponding to the detection of the passing of various switches related to the winning switch and the starting port switch, and set the command in the transmission information storage area (step S2499).

Then, the flag register is saved to a stack area in the game control area (step S2500), and the base display output process is executed (step S2501). Unlike other processes, the base display output process is executed using a second area outside the game control area, and is a common process that is not affected by the specifications of the pachinko machine 1. Therefore, to ensure the independence of the base display output process, predetermined data such as the flag register is saved to a stack area in the game control area before and after the execution of the base display output process, so that it is not updated by the base display output process. After that, the flag register saved in the stack area in the game control area is restored (step S2502).

Next, the special symbol and special electric device control process is executed (step S2503). In the special symbol and special electric device control process, it is determined whether the random number value for the big win matches the winning judgment value previously stored in the main control built-in ROM, and it is determined whether to transition to a probability variation state based on the random number value of the big win symbol. Then, if the random number value for the big win matches the winning judgment value, it is determined whether to open or close the big prize openings 2005 and 2006. If the big prize openings 2005 and 2006 are opened or closed by this decision, the big prize openings 2005 and 2006 are opened (or expanded), and the big prize openings 2005 and 2006 are in a game state in which game balls can be received, and the game state transitions to a game state that is advantageous to the player. In addition, if the probability variation transition condition is established, the game state transitions to a probability variation state, while if the probability variation transition condition is not established, the game state transitions to a game state other than the probability variation state. Here, the "variable probability state" refers to a state (high probability state) in which the probability of winning the special lottery described above is set relatively high compared to the normal game state (low probability state).

Next, the normal symbol and normal electric device control process is executed (step S504). In the normal symbol and normal electric device control process, the input information is read from the input information storage area described above, and it is determined whether or not a detection signal from the gate switch 2352 has been input to the input terminal. If a detection signal has been input to the input terminal, a random number for determining whether or not a normal symbol has been hit is extracted, and it is determined whether or not it matches the normal symbol hit determination value previously stored in the main control built-in ROM (called a "normal lottery"). Then, depending on the result of the normal lottery, it is determined whether or not to open or close the second start port door member 2549. If the opening and closing operation is performed based on this determination, the second start port door member 2549 is opened (or expanded), and the game state becomes one in which the game ball can be received by the start port 2004, and the game state transitions to one that is advantageous to the player.

Next, an output data setting process is executed (step S2505). In the output data setting process, various signals are output from the output terminals of various output ports of the main control MPU 1311. For example, when various commands from the payout control board 951 are normally received based on the output information, a main payout ACK signal is output to the payout control board 951 from the output terminal of a predetermined output port of the main control MPU 1311, and when a jackpot game is in progress, a drive signal is output to the attacca solenoids (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556) which open and close the opening and closing members 2107 of the large prize winning ports 2005, 2006, and a drive signal is output to the start port solenoid 2550 which opens and closes the start port (second start port door member 2549).In addition, various information (game information) signals related to the game, such as a probability fluctuation information output signal, a special pattern display information output signal, an ordinary pattern display information output signal, a time-saving information output signal, and a start port winning information output signal, as well as a security signal are output to the external terminal board 784 as output information to the hall computer. Additionally, in the output data setting process, a test signal output process may be executed to output a test signal.

In addition, in the output data setting process, a signal corresponding to the number of out balls counted in the switch input special process (step S2494) is output from the external terminal board 784. For example, a pulse signal of a predetermined length may be output from the external terminal board 784 for every predetermined number of out balls (e.g., 10 balls).

The output data setting process also sets test signals to be output to an inspection device connected to the pachinko machine 1. Test signals include, for example, signals indicating the game status and signals indicating the stopping patterns of normal and special symbols.

Furthermore, a peripheral board command transmission process is executed to output the value of the transmission information storage area to the serial communication circuit (step S2506). The transmission information storage area is a storage area that temporarily stores the generated transmission command. The value (command) stored in the transmission information storage area is read out in step 2070 and stored in the transmission information storage area of the serial communication circuit (SIO). The serial communication circuit has a transmission information storage area that is a multi-byte FIFO-type transmission buffer, and sequentially transmits the values stored in the transmission information storage area of the serial communication circuit to the peripheral control board 1510.

Then, a predetermined value (18H) is set in the watchdog timer clear register WCL to clear the watchdog timer (step S2507). Note that since the watchdog timer uses the simple clear mode, the watchdog timer is cleared by setting one word. Then, a return instruction (e.g., RETI) is issued to switch the register bank (step S2508), and the process before the interrupt is resumed.

[12-18. Alternative example 4 of setting change/confirmation processing]
Next, another embodiment of a pachinko machine with a setting change function will be described. In the following example 4, the setting change process is executed by the main control main process, not the timer interrupt process. The process other than that described below is the same as the above-mentioned example 3.

In addition, in the variant 4, as in the variant 2, the setting value can be selected by operating the RAM clear switch 954 without providing a setting change switch 972. However, in order to distinguish between the original function of the RAM clear switch 954 to initialize the main control RAM 1312 and its setting change function, the operation for changing the setting value may be described as the setting change switch 972.

Figure 231 is a flowchart of the main control side main processing executed by the main control MPU 1311. The main control side main processing is executed after step S2440 of the power-on processing (Figure 227). The main control side main processing of variant 4 executes steps S2481 to S2484 instead of step S2452 of the main control side main processing of variant 3 (Figure 228). Executing the processing of setting changes and setting confirmations in the main control side main processing is applicable not only to cases where a timer interrupt processing for setting processing and a timer interrupt processing for normal game processing are provided separately as in variant 4, but also to variants 1 and 2. For example, the main control main process shown in FIG. 231 includes a first main loop process for setting (steps S2450 to S2453) and a second main loop process for normal play (steps S2457 to S2458), and in each main loop process, one timer interrupt process (FIG. 196 in Variant Example 1, FIG. 223 in Variant Example 2) is executed, and within the timer interrupt process, setting process (step 2068 in FIG. 190, step S2341 in FIG. 223) and normal play process are executed. In this case, since there is only one timer interrupt process executed in the main loop, there is no need to switch the CTC in steps S2454 and S2455 described below.

In the main processing on the master control side shown in FIG. 231, the same processes as those in the main processing on the master control side of Alternative Example 3 (FIG. 228) are given the same reference numerals.

First, the main control MPU 1311 executes the first main loop process for the setting process (steps S2450 to S2453). In the first main loop process, the main control MPU 1311 first acquires a power outage warning signal and determines whether a power outage has occurred based on whether the power outage warning signal is ON (step S2450). In the alternative example 4, the power outage is monitored in the main process, but the power outage may be monitored in the timer interrupt process, and the power outage process may be executed when a power outage is detected. For example, it may be determined whether the power outage warning signal is ON at least at the start and end of the timer interrupt, the period during which the power outage warning signal is continuously output, and when the count result reaches a predetermined value, it may be determined that a power outage has occurred. In the alternative example 4, since the timer interrupt process for the setting process and the timer interrupt process for the normal game process are separately provided, the power outage may be monitored in either timer interrupt process, or in both timer interrupt processes. Therefore, by making the power outage monitoring process and power outage processing into subroutines and executing these subroutines (power outage monitoring process, power outage processing) in each of the two timer interrupt processes, there is no need to incorporate the same program (code) for the power outage monitoring process and power outage processing into each timer interrupt process, and the program size can be reduced.

If a power outage warning signal is detected, power outage processing (steps S2462 to S2469) is executed.

On the other hand, if the power outage warning signal is not ON, power is being supplied normally, so interrupts are set to prohibited (step S2451) and the setting process shown in FIG. 224 is executed (step S2482). After that, the setting display process shown in FIG. 225 is executed (step S2483).

After that, it is determined whether the setting change/setting confirmation process has ended based on whether the setting key 971 has returned to the OFF position (step S2484). Specifically, it detects whether the edge of the setting key 971 from ON to OFF, or whether a predetermined period has passed since the change from ON to OFF. If an operation to end the setting change/setting confirmation process has been performed, the process proceeds to step S2454 to start normal play. On the other hand, if the setting change/setting confirmation process has not ended, the edge information of the RAM clear switch 954 and the setting key 971 is cleared (step S2485). By clearing the edge information, multiple changes to the setting value with one operation are prevented. This is to prevent the setting from being changed using the same edge information as the previous time in the first main loop process executed after one setting change, since the first main loop process may be executed multiple times while the timer interrupt process that detects the edge of the RAM clear switch 954 or the setting key 971 is executed once. Note that it is also possible to clear only the edge information of the RAM clear switch 954 without clearing the edge information of the setting key 971. After that, interrupts are enabled (step S2453), and the process returns to step S2450, and the first main loop process for the setting change process is repeatedly executed. Interrupts are disabled in steps S2482 to S2485 to prevent the setting change process and setting confirmation process from being interrupted by a timer interrupt.

In addition, in the first main loop process for setting processing (steps S2450 to S2453), the edge information of the RAM clear switch 954 and the setting key 971 continues to be cleared, and when normal play is switched to (while the second main loop process is being executed), the edge information of the RAM clear switch 954 and the setting key 971 is not referenced.

When it is determined in step S2484 that the setting change/setting confirmation processing has ended, the second main loop processing for normal play (steps S2457-S2458) is executed. When executing the second main loop processing, first, the timer interrupt period time is set in CTC1 for normal play (step S2454), the CTC0 interrupt is stopped, the CTC1 interrupt is activated (step S2455), and CTC1 is set to interrupt permitted (step S2456).

After that, the power outage warning signal is acquired, and it is determined whether a power outage has occurred depending on whether the power outage warning signal is ON (step S2457). If a power outage warning signal is detected, the power outage processing (steps S2462 to S2469) is executed. On the other hand, if the power outage warning signal is not ON, the power is being supplied normally, so the random number update processing 2 is executed (step S2458). The random number update processing 2 may be the same as that described in FIG. 195, and mainly updates random numbers other than the random numbers for determining whether or not a win has been made in a special lottery or a normal lottery. Then, the process returns to step S2457, and the second main loop processing for normal play is repeatedly executed. Note that if the setting key 971 is detected to be operated ON during normal play (after entering the second main loop), the main control MPU 1311 may generate a command to notify the fact, and the peripheral control board 1510 may perform a notification performance on the display device. Since this notification is performed during normal gameplay, it is desirable that it be in a form that does not interfere with the progress of normal gameplay. For example, only specific LEDs may be lit, letters or specific symbols may be displayed in a small area of the main LCD display device 1600, or a specific character indicating that the setting key 971 has been turned ON may be displayed as the game progresses.

If a power outage warning signal is detected in steps S2450 and S2457, power outage processing (steps S2462 to S2469) is executed.

In the power failure processing, a process is executed to back up data to restore the state before the power failure occurred. Specifically, interrupts are first prohibited (step S2462). This prevents the timer interrupt processing described below from being performed. Furthermore, the main control MPU 1311 clears the output ports to stop the operation of the devices controlled by the output from each port (step S2463). Specifically, power failure clear signal OFF bit data is output to the solenoid, power failure clear, and ACK output ports. Note that it is not necessary to clear all output ports; for example, output ports for controlling solenoids and motors that consume a lot of power may be cleared. Clearing these output ports reduces the power consumption until the main board side power failure processing is completed, and ensures that the main board side power failure processing is completed reliably.

Then, the flag register is saved to a stack area within the play area (step S2464), and power-off processing is executed to execute necessary processing before power is cut off for the work area outside the play area (step S2465). Details of the power-off processing are as shown in FIG. 222. Then, the flag register saved in the stack area within the play area is restored (step S2466).

Then, the main control MPU 1311 calculates a checksum of the work area in the game control area of the main control RAM 1312 to determine whether the data stored in the work area to be backed up has been properly retained, and stores the checksum in a specified checksum storage area of the main control RAM 1312 (step S2467). This checksum is used to determine whether the data backed up in the work area is correct. The areas for which the checksum is calculated should exclude the setting state management (setting value and value of the setting state management area) that may be changed between the time the power is turned on and the execution of the main processing on the main control side, the backup flag, and the value of the checksum area, among the work areas in the game control area.

Furthermore, a value (5AH) indicating that the power failure processing has been normally executed is stored in the backup flag area as a power failure flag (step S2468). This completes the storage of the game backup information. Finally, a setting value that enables RAM protection (write prohibited) and disables the prohibited area is written to the RAM protect register, prohibiting writing to the main control RAM 1312 (step S2469), and waiting until recovery from the power failure (infinite loop). The main control MPU 1311 has a function of designating a use area of the main control RAM 1312, and determining that an abnormality has occurred and resetting if there is access to a prohibited area other than the designated area. In this embodiment, the reset function due to access to this prohibited area is released, making access to all areas possible. Note that it is also possible to designate an unused area of the main control RAM 1312 as a prohibited area and set the prohibited area as valid in the RAM protect register, so that the main control MPU 1311 is reset when access to the designated prohibited area is detected.

In the above-mentioned process, the steps are executed in the following order: clearing the output port (step S2463), processing when the power is turned off (step S2465), calculating the checksum (step S2467), and setting the backup flag (step S2468). However, the execution order of these four steps is not limited to that shown in the figure, and other orders may also be used.

In the fourth example, the occurrence of a power outage is monitored by the main processing on the main control side, but the occurrence of a power outage may be monitored by the timer interrupt processing and the power outage processing may be executed based on the monitoring result. For example, in each of the two main loops, the power outage signal may be checked at least at the start and end, the period during which the power outage signal is continuously output may be measured, and the occurrence of a power outage may be detected when the measurement result reaches a predetermined value. In the fourth example, the timer interrupt processing for the setting processing and the timer interrupt processing for the normal game processing are separately provided, so that the power outage may be monitored by either timer interrupt processing, or by both timer interrupt processing. For this reason, the power outage monitoring processing and the power outage processing are made into subroutines, and by executing these subroutines (power outage monitoring processing, power outage processing) in each of the two timer interrupt processing, it is not necessary to incorporate the same program (code) for the power outage monitoring processing and the power outage processing into each timer interrupt processing, and the program size can be reduced.

In the main processing on the main control side shown in FIG. 231, two main loops are provided, one for the timer interrupt processing for the setting change processing and one for the timer interrupt for normal play, and there is always one opportunity to execute the timer interrupt processing for the setting change processing. In addition, at this execution opportunity, the timer interrupt processing for the setting change processing may not be executed (for example, when branching to YES in step S2454). By providing two main loops in this way, it is possible to switch between executing the processing to calculate the base value in the main loop for normal play (timer interrupt processing) and executing the processing to calculate the base value so that the processing to calculate the unnecessary base value is not executed in the timer interrupt processing for the setting change processing.

Figure 232 is a flowchart of the timer interrupt processing for the setting change processing executed by the main control MPU 1311. In variant 4, the setting change and setting confirmation processing is repeatedly executed in the main loop for the setting processing. For this reason, the timer interrupt processing for the setting change processing in variant 4 is the timer interrupt processing for the setting change processing in variant 3 (Figure 229) with the setting change and setting confirmation processing (steps S2477 to S2478) deleted.

First, the main control MPU 1311 sets the register bank selection flag to 1 and switches the register bank (step S2470). The main control MPU 1311 has two register groups used for calculations, one of which is used as the register group of bank 0 and the other is available as the register group of bank 1, and is configured so that the registers of both banks cannot be used without switching the banks. Register bank 0 is used in the main processing on the main control side, and register bank 1 is used in the timer interrupt processing. For this reason, an instruction to switch the bank to 1 is executed at the start of the timer interrupt processing, but it is not necessary to execute an instruction to switch the bank to 0 at the end of the timer interrupt processing. This is because the main control MPU 1311 stores the state of the bank in a flag register (for example, a register in which the Z flag and C flag are set), and the flag register is saved to the stack area at the start of the interrupt and is restored from the stack area by executing the RET command. For this reason, the bank flag of the register stored in the flag register is also restored by executing the RET command. If the bank status is not stored in the flag register, a bank switch command is executed at the end of the timer interrupt process to return to bank 0.

The flag register also stores a flag that controls whether interrupts are enabled, so there is no need to set it to interrupt enabled before executing the RET instruction. The flag that controls whether interrupts are enabled is set to interrupt disabled state after the flag register is stacked at the start of timer interrupt processing. Therefore, unless interrupts are enabled during timer interrupt processing (by using the EI instruction, for example) or the RETI instruction is executed, the interrupts will not be enabled.

Next, the LED common counter is incremented by +1. If the LED common counter value exceeds the upper limit, it is reset to 0 (step S2471).

Next, switch input process 1 is executed (step S2472). In switch input process 1, various signals input to the input terminals of various input ports of the main control MPU 1311 are read, an ON edge is created, and the input information is stored in the input information storage area of the main control RAM 1312.

Incidentally, since switch input process 1 in step S2472 is a process related to a winning signal, in the timer interrupt process executed in the setting change mode or setting confirmation mode, even if a winning is detected, processing related to the progress of the game, such as the payout of prize balls or the variable display of special and normal symbols, is not executed. Also, although winning is detected in relation to the progress of the game, detection of tampering with magnets or impact (vibration) is not executed. This is because setting change operations and setting confirmation operations are performed by hall employees, and tampering with magnets or impact (vibration) is not performed in the setting change mode or setting confirmation mode, so it is considered desirable not to detect tampering caused by magnetism, vibration, etc.

Note that even in the setting change mode or setting confirmation mode, some fraud detection sensors (e.g., radio wave sensors) may be used to detect specific types of fraud in switch input process 1. In this way, it is possible to detect fraud where a cheater tries to forcibly start the setting change mode by irradiating radio waves, etc.

Then, it is determined whether a value (00H) indicating the start of play is recorded in the setting state management area (step S2473). Note that the value in the game state management area does not have to be determined in the timer interrupt process for the setting change process. This is to deal with fraudulent behavior that involves illegally transitioning to the setting change process. Also, the determination of whether a value (00H) indicating the start of play is recorded in the setting state management area may be made before switch input process 1 (step S2472), and if a value indicating the start of play is recorded in the setting state management area, the process may proceed to after the peripheral board command transmission process (step S2479).

If a value indicating the start of play is recorded in the setting state management area, the process proceeds to step S2479 without executing the process for changing and displaying the setting value (steps S2474 to S2476). Note that if a value indicating the start of play is recorded in the setting state management area, an abnormality notification command may be generated to notify that an abnormal timer interrupt process is being executed. This is because if a value indicating the start of play is recorded in the setting state management area, the timer interrupt process for the setting change process shown in FIG. 232 is not executed, and some abnormality has occurred. This abnormality notification may be a notification using a liquid crystal, lamp, or sound, such as a magnet, radio wave, or vibration notification, or a security signal may be output from the external terminal board 784. One or more of these notification modes may be adopted to notify one or a combination of them.

On the other hand, if a value indicating the start of play is not recorded in the setting status management area, a specific output port is cleared (step S2474). For example, signals that are cleared as specific output ports in step 2474 include a power outage clear signal, solenoid signals for the big prize opening and electric chute, and a response signal (ACK) when a command is received by the payout control board 951. Then, the LED common port is turned OFF (step S2475). By turning OFF the LED common signal at an early stage of the timer interrupt processing, the time until the LED common signal is turned ON, i.e., the time for the LED to be turned off, is secured, the ghost phenomenon in which the display before and after the LED display change appears mixed, and LED flickering is prevented.

Then, a security signal is output from the external terminal board 784 (step S2476). Note that the process of outputting the security signal may be executed in the main loop for the setting change process of the main control side main process shown in FIG. 231, similar to the setting change and setting confirmation process.

Furthermore, a peripheral board command transmission process is executed to output the value of the transmission information storage area to the serial communication circuit (step S2479). The transmission information storage area is a storage area that temporarily stores the generated transmission command. The value (command) stored in the transmission information storage area is read out in step 2070 and stored in the transmission information storage area of the serial communication circuit (SIO). The serial communication circuit has a transmission information storage area that is a multi-byte FIFO-type transmission buffer, and sequentially transmits the values stored in the transmission information storage area of the serial communication circuit to the peripheral control board 1510. The peripheral board command transmission process may be executed after the end of the processing of S2480 or S2481 of the main processing, instead of the timer interrupt processing.

Then, a predetermined value (18H) is set in the watchdog timer clear register WCL to clear the watchdog timer (step S2480). Note that since the watchdog timer uses the simple clear mode, the watchdog timer is cleared by setting one word. Then, a return instruction (e.g. RETI) is issued to switch the register bank (step S2481), and the process returns to that before the interrupt.

The timer interrupt process for the setting change process shown in FIG. 232 differs from other timer interrupt processes in that it does not execute a random number update process (R_ATART_K). This is because there is no need to update the random numbers generated by software when a RAM abnormality occurs, but the random number update process may be executed.

[13. Pachinko machine equipped with light guide plate]
Next, an embodiment of a pachinko machine equipped with a light guide plate will be described. Recent pachinko machines are equipped with a light guide plate that emits light when illuminated on the front side of the main liquid crystal display device 1600, and perform a special symbol variation display game together with the main liquid crystal display device 1600. In this type of pachinko machine, a complex performance can be performed by, for example, superimposing images using the liquid crystal display device and the light guide plate. In addition, since the light guide plate is provided on the front side of the liquid crystal display device, a three-dimensional performance is displayed in combination with the image displayed on the liquid crystal display device. In addition, there is a light guide plate that allows stereoscopic vision using the parallax between the left and right eyes, and displays a performance with even greater three-dimensionality.

However, the presentations using light guide plates have become monotonous, and there is a need to increase interest with new light-emitting presentations. Furthermore, there are light guide plates that can display multiple images on a single sheet, and there is a demand for more diverse images to display and create more interesting presentations.

[13-1. Structure]
Fig. 233 is an exploded perspective view of the center gadget 2500 and the front performance unit 2600 of the front unit 2000 of the game board 5, as viewed from the front. Fig. 234 is a front view showing a state in which the first image is illuminated and displayed on the front performance unit. Fig. 235 is a front view showing a state in which the second image is illuminated and displayed on the front performance unit.

The front performance unit 2600 of the front unit 2000 is attached to the center role 2500 so as to close the inside of the frame of the frame-shaped center role 2500. The front performance unit 2600 is attached to the rear side of the center role 2500. The front performance unit 2600 has a transparent flat light guide plate 2610 that closes the inside of the frame of the center role 2500, and a first pattern board 2611 and a second pattern board 2612 that are attached to the rear side of the center role 2500. The first pattern board 2611 is equipped with a plurality of light guide plate LEDs 2613 that can irradiate light to the right side of the light guide plate 2610, and the second pattern board 2612 is equipped with a plurality of light guide plate LEDs 2614 that can irradiate light to the upper side of the light guide plate 2610.

The first picture board 2611 and the second picture board 2612 are arranged perpendicular to the light guide plate 2610 so that light can be irradiated onto the side of the light guide plate 2610. As a result, only the sides of the first picture board 2611 and the second picture board 2612 are visible from the front side of the pachinko machine 1, making it difficult for the player to see the first picture board 2611 and the second picture board 2612, improving the appearance of the game area 5a.

In this embodiment, the light guide plate (front light guide plate) 2610 is described, but another rear light guide plate may be provided between the light guide plate 2610 and the liquid crystal display device 1600.

The light guide plate 2610 has a first pattern 2621 (see FIG. 234) formed by a number of uneven first reflecting parts that reflect light from above to the front side, and a second pattern 2622 (see FIG. 235) formed by a number of uneven second reflecting parts that reflect light from the side to the front side. In other words, when the light guide plate LED 2613 of the first pattern board 2611 is illuminated, the front performance unit 2600 can illuminate the first pattern 2621 on the light guide plate 2610, and when the light guide plate LED 2614 of the second pattern board 2612 is illuminated, the light guide plate 2610 can illuminate and display the second pattern 2622. The multiple LEDs 2613 and 2614 mounted on the first pattern board 2611 and the second pattern board 2612 are preferably full-color LEDs, and are preferably light sources (lens-equipped LEDs) with high directivity that irradiate light in a narrow range. By using a full-color LED, the first pattern 2621 and the second pattern 2622 can be projected onto the light guide plate 2610 in any single color or multiple colors (e.g., seven rainbow colors).

The light guide plate 2610 is finely formed with unevenness that forms a plurality of first reflective portions for reflecting the first pattern 2621, and unevenness that forms a plurality of second reflective portions for reflecting the second pattern 2622. When the light guide plate LEDs 2613 on the first pattern substrate 2611 and the light guide plate LEDs 2614 on the second pattern substrate 2612 are not emitting light, the light guide plate 2610 transmits light, allowing good visibility of the various decorative elements of the rear unit 3000 arranged at the rear side and the performance images displayed on the performance display device 1600. The light guide plate 2610 is provided with a transparent region through which the liquid crystal display device 1600 provided on the back side can be seen through even when the light guide plate LEDs 2613, 2614 are in an emitting state, a matte region that does not reflect the light irradiated to the light guide plate 2610 and is processed like frosted glass, a glitter region in which a reflective pattern is formed that reflects the transmitted light regardless of the direction of travel of the light within the light guide plate 2610, and a moving region in which a reflective pattern is formed so that the emission of light changes depending on the light emitting location of the light guide plate LEDs 2613 (i.e., the direction of travel of the light within the light guide plate 2610).

As shown in FIG. 234, the first pattern 2621 becomes part of the presentation of the special pattern variation display game together with the image displayed on the liquid crystal display device 1600 as described below. The first pattern 2621 is composed of moving areas 2621a and 2621c, glitter areas 2621b and 2621d, and matte area 2621e. The outside of the first pattern 2621 is a transparent area 2621f. The moving areas 2621a and 2621c are formed by turning on some of the light guide plate LEDs 2613 on the first pattern substrate 2611, and switching the lit areas, so that the moving area 2621a emits light or the moving area 2621c emits light. Therefore, by flashing the light guide plate LEDs 2613, the size of the first pattern 2621 can be made to appear to change.

In the first pattern 2621 shown in FIG. 234, the moving area and the glitter area are arranged so as to be repeated twice, but the repetition may be any number of times. By forming the first pattern 2621 by repeating the moving area and the glitter area multiple times, the first pattern 2621 can express complex movements. Also, in the first pattern 2621 shown in FIG. 234, the moving area and the glitter area are repeated alternately, but moving areas with different characteristics (i.e., the position of incidence of light for the moving area to emit light) may be arranged adjacent to each other without sandwiching a glitter area between the moving areas.

By illuminating the LEDs 2613 for the light guide plate so that the emitted color changes depending on the LEDs 2613 for the light guide plate, it is possible to make each moving area 2621a emit a different color. Then, by sequentially changing the emitted color of the LEDs 2613 for the light guide plate (for example, repeating the sequence of red → orange → yellow → green → blue → indigo → purple → red), it is possible to make the image appear to move as the color changes.

As shown in FIG. 235, the second pattern 2622 is a pattern in which multiple light streaks extend diagonally downward. The second pattern 2622 is formed so that the diagonally extending light streaks correspond to the positions of the light guide plate LEDs 2614 mounted on the second pattern substrate 2612. In other words, when one light guide plate LED 2614 is made to emit light, a light streak is emitted that extends diagonally downward from the portion of the light guide plate 2610 on the upper edge of the light guide plate 2610 where the emitted light guide plate LED 2614 is located.

The further this second pattern 2622 is downward on the light guide plate 2610, the farther it is from the light guide plate LED 2614, so the brightness of the light streak becomes darker the further it is downward on the light guide plate 2610. As a result, when the second pattern 2622 is viewed from the front (the player's side), the further it is downward on the light guide plate 2610, the further the light streak appears to extend backward, creating the illusion that light is being emitted three-dimensionally, allowing the player to enjoy the light-emitting effects provided by the light guide plate 2610.

Furthermore, it is advisable to position the reflecting parts so that stereoscopic vision due to the parallax between the left and right eyes is possible. For example, when focusing on one light streak that constitutes the second image 2622, by positioning the second reflecting parts that emit light to form an image of the light streak on the player's retina at different positions on the light guide plate 2610 for the left and right eyes, it is possible to create parallax between the left and right eyes of the player, and to make the second image appear to have depth.

As shown in FIG. 234, the light guide plate 2610 of this embodiment forms a first pattern 2621 that is projected by irradiating light from one direction, and is made up of a matte area 2621e that does not reflect the irradiated light, glitter areas 2621b and 2621d in which a reflective pattern that reflects transmitted light is formed regardless of the direction of travel of the light, and moving areas 2621a, 2621c, and 2622a in which a reflective pattern that reflects light traveling in a specific direction is formed, so that the first pattern can be made up of a moving pattern area (dynamic pattern) that appears to move and a still pattern area (static pattern) that appears to be stationary.

In addition, a single light guide plate 2610 can project a first pattern 2621 shown in FIG. 234 and a second pattern 2622 shown in FIG. 235 by changing the illumination direction. Therefore, by irradiating a single color (e.g., single-wavelength red or white with a mixture of multiple wavelengths of light) from the side and irradiating multiple colors of light (e.g., adjacent LED groups 2614 emit light at different wavelengths) from above, a single light guide plate 2610 can produce an effect with a rainbow pattern (rainbow beam) shining in seven colors and a single-color pattern.

In the light guide plate 2610 of this embodiment, a still pattern is projected in the matte area 2621e and glitter areas 2621b, 2621d of the first pattern 2621 by shining light from the side, and a moving pattern that appears to move is projected in the moving areas 2621a, 2621c, 2622a. In other words, the first pattern 2621, which is irradiated with light from the side, creates a light guide plate presentation with both a still pattern and a moving pattern. In this case, the still pattern and moving pattern of the first pattern 2621 are projected simultaneously.

Unlike the above, the first pattern 2621 may be composed of a matte area and a glitter area, and the first pattern 2621 may not include a moving pattern. In this case, the light guide plate produces a still pattern by the first pattern 2621 irradiated with light from the side and the second pattern 2622 irradiated with light from above. In this case, the still pattern by the first pattern 2621 and the moving pattern by the second pattern 2622 can be projected at different times. That is, the moving pattern may be projected after the still pattern, or the still pattern may be projected after the moving pattern. In this way, by projecting the still pattern and the moving pattern at different times, a variety of effects can be produced. In particular, by displaying a rainbow pattern as a moving pattern and then displaying a specific character as a still pattern, an effect in which the character descends can be produced. On the other hand, by displaying a background as a still pattern and then displaying a character as a moving pattern, an effect in which the character moves in a specific location can be produced.

In the light guide plate 2610 of this embodiment, the first pattern 2621 and the second pattern 2622 may be arranged to overlap each other. When light is irradiated from the side and from above, the reflection patterns of the two patterns are mixed in the area on the light guide plate 2610 where the two patterns overlap, so that both patterns can be recognized. However, if the first pattern 2621 is a pattern that is viewed in a plane and the second pattern 2622 is a pattern that is viewed in a stereoscopic manner, stereoscopic viewing may be difficult in the area where the two patterns are mixed. For this reason, a transparent area 2621f is provided in which the reflection pattern of the first pattern 2621 is not provided and the back side (liquid crystal display device 1600) is visible through, and a pattern based on the reflection pattern of the second pattern 2622 is projected, so that the player can easily view the second pattern 2622 in a stereoscopic manner.

In the light guide plate 2610 of this embodiment, the first pattern 2621 and the second pattern 2622 may be arranged in separate areas without being superimposed. If the first pattern 2621 is a pattern that is viewed in a plane and the second pattern 2622 is a pattern that is viewed in a stereoscopic manner, stereoscopic viewing may be difficult in an area where the two patterns are mixed. For this reason, by separating the area where the reflective pattern of the first pattern 2621 is provided from the area where the reflective pattern of the second pattern 2622 is provided and projecting the image based on the reflective pattern of the second pattern 2622, the player can easily view the second pattern in stereoscopic view.

[13-2. Configuration of light guide plate]
Next, a specific configuration of the reflecting portion will be described. Fig. 236 is a diagram showing the structure of a light guide plate 2610 (particularly, the arrangement of the reflecting portion).

As described above, the light guide plate 2610 is provided with a transparent area 2621f through which the back side (liquid crystal display device 1600) is visible, a matte area 2621e that does not reflect the irradiated light, glitter areas 2621b and 2621d in which a reflective pattern is formed that reflects the transmitted light regardless of the light's traveling direction, and moving areas 2621a, 2621c, and 2622a in which a reflective pattern is formed that reflects light traveling in a specific traveling direction.

Figure 237 shows the structure of the reflecting part.

The reflecting portion is formed by a recess provided on the back side of the light guide plate 2610, and by reflection of light at the boundary surface (reflective surface 2651), the light traveling inside the light guide plate 2610 is reflected to the front side of the light guide plate 2610, causing the image portion of the light guide plate 2610 to emit light, allowing the player to view the image. Inside the light guide plate 2610, the light incident from the light guide plate LED 2614 travels inside the light guide plate 2610 with a certain degree of spread (e.g. ±30 degrees). The light streaks that make up the second image 2622 are visible when the light traveling in the direction of the light streaks is reflected by the reflecting portion 2650 described below.

The reflecting portion of the moving area 2622a shown in FIG. 237(A) has multiple reflecting portions 2650 arranged along the light streaks. The size of the reflecting portion 2650 is preferably several hundred micrometers to several millimeters, which is much smaller than the light streaks that appear on the light guide plate 2610, but is shown larger in the figure.

The reflecting section 2650 is composed of a reflecting surface 2651 that reflects light, an inclined surface 2652 on the back side of the reflecting surface 2651, and a side surface 2653 formed by a curved surface. The reflecting surface 2651 is arranged at an angle of approximately 45 degrees to the surface of the light guide plate 2610, and the perpendicular line of the reflecting surface 2651 and the incident direction of the reflected light are approximately 45 degrees. Therefore, the light that travels inside the light guide plate 2610 and hits the reflecting surface 2651 of the reflecting section 2650 is reflected toward the front side of the light guide plate 2610, as shown in FIG. 237(B).

In addition, light traveling in a direction perpendicular to the streaks of light appearing in the moving area 2622a, i.e., light traveling parallel to the reflective surface 2651 along the reflective surface 2651, does not hit the reflective surface 2651, but is reflected by the reflective section 2650 and does not exit from the surface of the light guide plate 2610. Similarly, light traveling in a direction at an angle (especially an acute angle) to the streaks of light appearing in the moving area 2622a hits the reflective surface 2651 in small amounts, so that only a small amount of light is reflected by the reflective section 2650 and only weak light exits from the surface of the light guide plate 2610. For this reason, the light of the wavelengths that reach it in large amounts is visible to the player's eyes, and the image can be shown in the color of the light guide plate LED 2614 that emits light at a specific position.

At this time, the direction of reflected light may be shifted slightly to the left or right from the perpendicular direction to the light guide plate 2610 by slightly tilting the reflecting surface 2651. Since the light source that irradiates the light guide plate 2601 of this embodiment irradiates light with strong directionality, the reflected light from the reflecting portion 2650 also reaches the player as a directional light beam. This can create parallax between the left and right eyes of the player, allowing the player to see a second image with depth. In other words, since the reflecting portion 2650 that reflects the light that reaches the right eye and the reflecting portion 2650 that reflects the light that reaches the left eye are located in different positions, the virtual intersection point between the light that reaches the right eye and the light that reaches the left eye is not on the light guide plate 2610. In other words, if the virtual intersection of the light reaching the right eye and the light reaching the left eye is behind the light guide plate 2610, the image will appear to be in a recessed position, and if the virtual intersection of the light reaching the right eye and the light reaching the left eye is in front of the light guide plate 2610, the image will appear to be in a closer position.

The inclined surface 2652 provided on the opposite side of the reflecting surface 2651 may be provided at an angle of approximately 45 degrees with respect to the surface of the light guide plate 2610, similar to the reflecting surface 2651, or may be formed at an angle (e.g., perpendicular to the surface of the light guide plate 2610) that prevents the light traveling inside the light guide plate 2610 from being reflected toward the front side of the light guide plate 2610.

The side surface 2653 is curved. By processing the side surface 2653 into a curved surface rather than a flat surface, it is possible to prevent the light incident from one direction from being strongly reflected, and to prevent the pattern from being displayed by light coming from any direction other than that specified.

The reflecting portion 2660 of the glitter areas 2621b and 2621d shown in FIG. 238 is formed by a spherical recess provided on the back side of the light guide plate 2610, and reflects the light that travels through the light guide plate 2610 and arrives at the reflecting portion 2660 from multiple directions (i.e., multiple paths), and emits it to the front side of the light guide plate 2610. The reflecting portion 2660 of the glitter area reflects light from multiple light guide plate LEDs 2614, so when the light guide plate LEDs 2614 blink at different times, the glitter area 2621b will shine sparklingly. Also, when the light guide plate LEDs 2614 emit light in different colors, the glitter area 2621b will shine with a mixture of multiple colors. Furthermore, when the light guide plate LEDs 2614 blink in different colors, the glitter area 2621b will shine with a mixture of multiple colors.

The matte area 2621e does not have a reflecting portion, but is processed to have irregular irregularities like frosted glass, so that the light traveling through the light guide plate 2610 is not reflected to the front side.

So far, we have explained the light guide plate 2610 that displays the first and second patterns. Next, we will explain an example of a light guide plate that displays a different pattern. Figure 239 is a schematic diagram showing the relationship between the LEDs and the reflecting parts in the light guide plate that configures the patterns shown in Figures 240 to 242.

The light guide plate 2610 shown in FIG. 239 has a plurality of minute reflecting portions 2670 formed on its back surface, which reflect light incident from any of the plurality of specific light entrance portions 2630 on the upper side of the light guide plate 2610 and emit it to the front side of the light guide plate 2610. The plurality of specific light entrance portions 2630 of the light guide plate 2610 introduce light so that the light travels through the light guide plate 2610 from a plurality of positions. The plurality of specific light entrance portions 2630 are illustrated as four, the first specific light entrance portion 2630a, the second specific light entrance portion 2630b, the third specific light entrance portion 2630c, and the fourth specific light entrance portion 2630d, but the first specific light entrance portion 2630a to the seventh specific light entrance portion are provided. This is because seven specific light entrance sections 2630 (LED groups 2614) are provided repeatedly to create a rainbow effect in which the light guide plate is illuminated in seven colors, and the number of specific light entrance sections can be determined depending on the type of light emission color. The first specific light entrance section 2630a to the seventh specific light entrance section (not shown) are arranged in sequence from left to right in the longitudinal direction (left to right direction in the figure) on the upper side surface of the light guide plate 2610 (after the seventh specific light entrance section, the first specific light entrance section 2630a is placed back at the beginning).

The reflecting portion 2670 has a boundary surface that extends perpendicular to the straight line (the direction in which the light incident from the specific light incident portion 2630 travels through the light guide plate 2610) connecting with the corresponding specific light incident portion 2630 and is inclined at 45 degrees with respect to the rear surface of the light guide plate 2610. The reflecting portion 2670 is recessed into a pent roof-shaped triangle. The reflecting portion 2670 reflects the light incident from the corresponding specific light incident portion 2630 and emits it in a direction approximately perpendicular to the front surface of the light guide plate 2610. The reflecting portion 2670 also reflects the light incident from the non-corresponding specific light incident portion 2630 and emits it in a direction inclined with respect to the perpendicular line of the front surface of the light guide plate 2610.

As a result, as shown by the dashed line in FIG. 239, light incident from the corresponding specific light entrance section 2630 is reflected by the reflecting section 2670 in a direction other than the front of the light guide plate 2610 (perpendicular to the paper), and the reflecting section 2670 appears to be emitting light to a player seated in front of the pachinko machine 1. In contrast, as shown by the dashed line in FIG. 239, light incident from an uncorresponding specific light entrance section 2630 is reflected by the reflecting section 2670 in a direction other than the front of the light guide plate 2610, and the reflecting section 2670 appears not to be emitting light to a player seated in front of the pachinko machine 1.

In this embodiment, the reflecting portion 2670 is shown to be recessed in a triangular shape and extending perpendicular to the line connecting the corresponding specific light entrance portion 2630, but this is not limited thereto, and any reflecting portion may be used as long as it extends perpendicular to the line connecting the corresponding specific light entrance portion 2630.

The multiple reflective portions 2670 correspond to any of the multiple specific light entrance portions 2630, and include multiple first reflective portions 2670a corresponding to the first specific light entrance portion 2630a, multiple second reflective portions 2670b corresponding to the second specific light entrance portion 2630b, multiple third reflective portions 2670c corresponding to the third specific light entrance portion 2630c, and multiple fourth reflective portions 2670d corresponding to the fourth specific light entrance portion 2630d.

The light guide plate 2610 is capable of displaying a plurality of patterns 2623 that can be illuminated in different ways by reflecting light forward from a specific one of the plurality of reflecting portions 2670. The plurality of patterns 2623 include a pattern 2623a made up of a plurality of first reflecting portions 2670a, a pattern 2623b made up of a plurality of second reflecting portions 2670b, a pattern 2623c made up of a plurality of third reflecting portions 2670c, and a pattern 2623d made up of a plurality of fourth reflecting portions 2670d.

The images are arranged in a circular pattern from the center to the outside, as shown in Figures 240 to 242.

The second pattern board 2612 is a strip extending from side to side, and LEDs 2614 are mounted at positions corresponding to each specific light entrance portion 2630. The multiple LEDs 2614 are composed of a first LED group 2614a corresponding to the first specific light entrance portion 2630a, a second LED group 2614b corresponding to the second specific light entrance portion 2630b, a third LED group 2614c corresponding to the third specific light entrance portion 2630c, a fourth LED group 2614d corresponding to the fourth specific light entrance portion 2630d, a fifth LED group (not shown) corresponding to the fifth specific light entrance portion (not shown), a sixth LED group (not shown) corresponding to the sixth specific light entrance portion (not shown), and a seventh LED group (not shown) corresponding to the seventh specific light entrance portion (not shown). In addition, in FIG. 239, the first LED group 2614a to the fourth LED group 2614d are illustrated, and the fifth LED group to the seventh LED group are omitted. Each LED group is formed by dividing the multiple LEDs 2614 arranged in a row in the longitudinal direction (left and right direction in the figure) on the second pattern board 2612 in the left and right direction of the second pattern board 2612, and repeatedly arranging them in order from left to right (after the seventh LED group, it returns to the beginning and becomes the first LED group 2614a). In this embodiment, each LED group has six LEDs 2614.

Next, the light-emitting effect by the front effect unit 2600 of this embodiment will be described in detail. When the first LED group 2614a of the second pattern board 2612 is illuminated, light enters the light guide plate 2610 from the first specific light entrance portion 2630a, is reflected to the front of the light guide plate 2610 by the first reflecting portion 2670a, and is reflected to a direction other than the front by the other reflecting portions 2670b, 2670c, 2670d, etc., so that only the first reflecting portion 2670a appears to be lit up to a player seated in front of the pachinko machine 1, and the pattern composed of the multiple first reflecting portions 2670a can be illuminated.

When the second LED group 2614b of the second pattern board 2612 is illuminated, light enters the light guide plate 2610 from the second specific light entrance portion 2630b, is reflected to the front of the light guide plate 2610 by the second reflecting portion 2670b, and is reflected in a direction other than the front by the other reflecting portions 2670a, 2670c, 2670d, etc., so that only the second reflecting portion 2670b appears to be lit up to a player seated in front of the pachinko machine 1, and the pattern composed of the multiple second reflecting portions 2670b can be illuminated.

When the third LED group 2614c of the second pattern board 2612 is illuminated, light enters the light guide plate 2610 from the third specific light entrance portion 2630c, is reflected to the front of the light guide plate 2610 by the third reflecting portion 2670c, and is reflected in a direction other than the front by the other first reflecting portion 2670a, second reflecting portion 2670b, fourth reflecting portion 2670d, etc., so that only the third reflecting portion 2670c appears to be lit up to a player seated in front of the pachinko machine 1, and the pattern composed of multiple third reflecting portions 2670c can be illuminated.

When the fourth LED group 2614d of the second pattern board 2612 is illuminated, light enters the light guide plate 2610 from the fourth specific light entrance portion 2630d, is reflected to the front of the light guide plate 2610 by the fourth reflecting portion 2670d, and is reflected in a direction other than the front by the other first reflecting portion 2670a, second reflecting portion 2670b, third reflecting portion 2670c, etc., so that only the fourth reflecting portion 2670d appears to be lit up to a player seated in front of the pachinko machine 1, and the pattern composed of the multiple fourth reflecting portions 2670d can be illuminated.

Similarly, when each LED group from the fifth LED group to the seventh LED group 2614 is illuminated, light enters the light guide plate 2610 from the corresponding specific light entrance portion 2630, is reflected by the corresponding reflecting portion 2670 to the front of the light guide plate 2610, and is reflected by the other reflecting portions 2670 in directions other than the front, so that only the corresponding reflecting portion 2670 appears to be illuminated to a player seated in front of the pachinko machine 1, and the image composed of the corresponding reflecting portion 2670 can be illuminated.

As described above, in the pachinko machine 1 of this embodiment, the LED groups can be switched to emit light, allowing each of the multiple images 2623 to emit light, and the multiple images can be illuminated in sequence to create a moving, animation-like light-emitting effect. In particular, as shown in FIG. 240, in the light guide plate 2610 in which similar images are superimposed, a moving effect can be created in which the images emit light like an animation with a movement that spreads from the center outward or shrinks from the outside to the center.

Figure 240 shows an example of an image displayed in a moving effect using a light guide plate. In the example shown in Figure 240, the position of the emitting LED group is switched over time to create a moving effect in which the size of the image changes.

As described above, the light guide plate 2610 is provided with the first specific light entrance portion 2630a to the seventh specific light entrance portion 2630g, and the first LED group 2614a to the seventh LED group 2614g are arranged corresponding to each of the specific light entrance portions 2630a to 2630g. Note that in FIG. 240, the position corresponding to each specific light entrance portion is indicated by the last alphabetical character of the code.

As shown in FIG. 240(A), when the sixth LED group 2614f and the seventh LED group 2614g are lit and light is incident from the sixth specific light entrance portion 2630f and the seventh specific light entrance portion 2630g, the sixth reflecting portion 2670f and the seventh reflecting portion 2670g reflect the light incident on the light guide plate 2610, and the images on which the sixth reflecting portion 2670f and the seventh reflecting portion 2670g are arranged emit light, which can be recognized by the player.

Then, the fifth LED group 2614e and the sixth LED group 2614f are lit up, and when light is incident from the fifth specific light entrance section 2630e and the sixth specific light entrance section 2630f, the fifth reflecting section 2670e and the sixth reflecting section 2670f reflect the light incident on the light guide plate 2610, and the images on which the fifth reflecting section 2670e and the sixth reflecting section 2670f are arranged emit light, which can be recognized by the player.

Furthermore, as shown in FIG. 240(B), when the fourth LED group 2614d and the fifth LED group 2614e are lit and light is incident from the fourth specific light entrance portion 2630d and the fifth specific light entrance portion 2630e, the light incident on the light guide plate 2610 is reflected by the fourth reflecting portion 2670d and the fifth reflecting portion 2670e, and the image on which the fourth reflecting portion 2670d and the fifth reflecting portion 2670e are arranged emits light, which can be recognized by the player.

Then, the third LED group 2614c and the fourth LED group 2614d light up, and when light enters from the third specific light entrance portion 2630c and the fourth specific light entrance portion 2630d, the light that entered the light guide plate 2610 is reflected by the third reflecting portion 2670c and the fourth reflecting portion 2670d, and the images on which the third reflecting portion 2670cd and the fourth reflecting portion 2670d are arranged emit light, which can be recognized by the player.

Furthermore, as shown in FIG. 240(C), when the second LED group 2614b and the third LED group 2614c are lit and light is incident from the second specific light entrance portion 2630b and the third specific light entrance portion 2630c, the light incident on the light guide plate 2610 is reflected by the second reflecting portion 2670b and the third reflecting portion 2670c, and the image on which the second reflecting portion 2670b and the third reflecting portion 2670c are arranged emits light, which can be recognized by the player.

In this way, by changing the position of the illuminating LED groups (LED elements) without changing the number of them, the size of the image can be changed, and a moving effect can be created in which the image is illuminated as if moving from the center outwards. In this case, the LED groups can emit light in a single color, or each group (i.e., depending on the position) can emit a different color.

Figure 241 is a diagram showing an example of an image displayed in another moving effect using a light guide plate. In the example shown in Figure 241, a moving effect in which the size of the image changes is performed by changing the number of emitting LED groups over time.

As described above, the light guide plate 2610 is provided with the first specific light entrance portion 2630a to the seventh specific light entrance portion 2630g, and the first LED group 2614a to the seventh LED group 2614g are arranged corresponding to each of the specific light entrance portions 2630a to 2630g. Note that in FIG. 241, the position corresponding to each specific light entrance portion is indicated by the last alphabetical character of the code.

As shown in FIG. 241(A), the second LED group 2614b to the seventh LED group 2614g are lit up, the light incident from the second specific light entrance portion 2630b to the seventh specific light entrance portion 2630g is reflected by the second reflecting portion 2670b to the seventh reflecting portion 2670g, and the images arranged on the second reflecting portion 2670b to the seventh reflecting portion 2670g emit light, which can be recognized by the player.

Then, the third LED group 2614c to the seventh LED group 2614g light up, the light incident from the third specific light entrance portion 2630c to the seventh specific light entrance portion 2630g is reflected by the third reflecting portion 2670c to the seventh reflecting portion 2670g, and the images arranged on the third reflecting portion 2670c to the seventh reflecting portion 2670g emit light, which can be recognized by the player.

Furthermore, as shown in FIG. 241(B), the fourth LED group 2614d to the seventh LED group 2614g are lit up, the fourth reflecting portion 2670d to the seventh reflecting portion 2670g reflect the light incident from the fourth specific light entrance portion 2630d to the seventh specific light entrance portion 2630g, and the images arranged on the fourth reflecting portion 2670d to the seventh reflecting portion 2670g emit light, which can be recognized by the player.

Then, the fifth LED group 2614e to the seventh LED group 2614g light up, the fifth reflecting portion 2670e to the seventh reflecting portion 2670g reflect the light incident from the fifth specific light entrance portion 2630e to the seventh specific light entrance portion 2630g, and the images arranged on the fifth reflecting portion 2670e to the seventh reflecting portion 2670g emit light, which can be recognized by the player.

Furthermore, as shown in FIG. 241(C), the sixth LED group 2614f to the seventh LED group 2614g are lit up, the sixth reflecting portion 2670f to the seventh reflecting portion 2670g reflect the light incident from the sixth specific light entrance portion 2630f to the seventh specific light entrance portion 2630g, and the images arranged on the sixth reflecting portion 2670f to the seventh reflecting portion 2670g emit light, which can be recognized by the player.

In this way, by changing the number of LED groups (LED elements) that emit light, the size of the image (light-emitting range) can be changed, creating a moving effect in which the image emits light as if it is shrinking. In this case, the LED groups can emit light in a single color, or each group (i.e., depending on the position) can emit a different color.

Figure 242 shows an example of an image displayed in another moving effect using a light guide plate. In the example shown in Figure 242, the color of the light emitted by the LED group is changed over time to create a moving effect in which the color of the image changes.

As described above, the light guide plate 2610 is provided with the first specific light entrance portion 2630a to the seventh specific light entrance portion 2630g, and the first LED group 2614a to the seventh LED group 2614g are arranged corresponding to each of the specific light entrance portions 2630a to 2630g. The first LED group 2614a to the seventh LED group 2614g are composed of full-color LEDs and can emit light in multiple colors. In FIG. 242, the position corresponding to each specific light entrance portion is indicated by the last alphabetical character of the code.

As shown in FIG. 242(A), the first LED group 2614a lights up in red, the red light incident from the first specific light entrance portion 2630a is reflected by the first reflecting portion 2670a, the pattern on which the first reflecting portion 2670a is arranged emits red light, and the player recognizes the red pattern. Similarly, the second LED group 2614b lights up in orange, the orange light incident from the second specific light entrance portion 2630b is reflected by the second reflecting portion 2670b, and the pattern emits orange light. Also, the third LED group 2614c lights up in yellow, the yellow light incident from the third specific light entrance portion 2630c is reflected by the third reflecting portion 2670c, and the pattern emits yellow light. Also, the fourth LED group 2614d lights up in green, and the green light incident from the fourth specific light entrance portion 2630d is reflected by the fourth reflecting portion 2670d, and the pattern emits green light. The fifth LED group 2614e lights up in blue, and the blue light incident from the fifth specific light entrance portion 2630e is reflected by the fifth reflector 2670e, causing the pattern to emit blue light. The sixth LED group 2614f lights up in indigo, and the indigo light incident from the sixth specific light entrance portion 2630f is reflected by the sixth reflector 2670f, causing the pattern to emit indigo light. The seventh LED group 2614g lights up in purple, and the purple light incident from the seventh specific light entrance portion 2630g is reflected by the seventh reflector 2670g, causing the pattern to emit purple light.

After that, as shown in Fig. 242(B), the first LED group 2614a to the seventh LED group 2614g light up in purple, red, orange, yellow, green, blue, and indigo, respectively, and the color of the pattern changes. After further time has passed, as shown in Fig. 242(C), the first LED group 2614a to the seventh LED group 2614g light up indigo, purple, red, orange, yellow, green, and blue, respectively, and the color of the pattern changes.

In this way, the light color of the LEDs that make up the LED group is changed, and the color of the pattern is changed sequentially (for example, every 0.5 seconds). Because the human eye focuses on patterns that emit the same color, a moving effect can be created by making the patterns emit light inward.

Figure 243 shows the arrangement of the images on the light guide plate 2610 and the arrangement of the LED group 2614.

In this embodiment, multiple LED groups 2614 correspond to the reflecting portion 2670 that constitutes one picture, and the multiple LED groups 2614 emit light in a predetermined pattern to display one picture. Specifically, seven LED groups are treated as a repeating unit, and the light emission pattern of the LED groups 2614 (specific light entrance portion 2630) is controlled to be repeated. In addition, the LEDs emit light with directionality, and are configured to illuminate a predetermined angular range from the front of the LEDs.

In other words, as shown in FIG. 243, the illumination range of the LEDs that emit light in the same pattern (the light source that constitutes one picture) is the range shown in the sector in the figure, and there is a range near the second picture substrate 2612 where the light from the LED does not reach.

For this reason, the pattern is provided at a position a predetermined distance away from the end where light enters the light guide plate 2610. For example, when the illumination range of the LED is 60 degrees (full angle at half maximum θ = ±30 degrees), the range where the light from the LED does not reach forms an equilateral triangle, so the pattern is provided at a distance of 0.87 times the length of the repeating unit of the LED group (the distance between LEDs that emit light in the same pattern) α from the end of the light guide plate 2610.

In general, if the length of the repeating unit of the LED group is α, the illumination angle of the LED is θ, and the distance from the edge of the light guide plate 2610 to the pattern is L, the following relationship is obtained.
L = tan θ × α / 2

In this way, when the moving image that appears to move is composed of light from multiple LED groups, the moving image must be placed at a position a predetermined distance away from the end of the light guide plate 2610. In other words, the moving image area that projects the image that appears to move is smaller than the still image area that projects the still image. If the light guide plate 2610 is the same size as the display area of the liquid crystal display device 1600, the moving effect by the light guide plate 2610 can be achieved in an area smaller than the display area of the liquid crystal display device 1600. Therefore, in the performance of the variable display game, the player can be made aware of the progress of the variable display game without obstructing the visibility of the special pattern that is usually displayed near the end of the display area of the liquid crystal display device 1600. In addition, by performing the moving effect in the center of the liquid crystal display device 1600 where the player is watching, the player's excitement caused by the moving effect can be prevented from decreasing the player's interest.

In the above-mentioned embodiment, an example was explained in which the light guide plate 2610 was attached to the center role 2500 of the front unit 2000. In this case, however, within the inner frame of the center role 2500 (the opening window portion visible to the player located at the front of the pachinko machine 1), an area within a specified distance from the end of the light guide plate 2610 where moving effects are not possible is created, and the area where moving effects are not possible is visible to the player. Furthermore, the area where moving effects are possible becomes narrower, reducing the effect of the effects.

Therefore, unlike the above, the light guide plate 2610 may be attached to the back unit 3000. In this case, the light guide plate 2610 can be made larger than the inner frame of the center role device 2500, so that the area where moving effects are not possible is hidden by the center role device 2500 and the area where moving effects are not possible is placed outside the display area of the main liquid crystal display device 1600, making it possible to perform moving effects in all (or most) of the area of the inner frame of the center role device 2500. In other words, when the pachinko machine 1 is viewed from the front, the end of the light guide plate 2610 is located away from the periphery of the main liquid crystal display device 1600 and the outer periphery of the center role device 2500.

Since the back unit 3000 is equipped with various decorative bodies (decorative unit 3050, movable performance units 3100, 3200, 3300, 3400, 3500, etc.), the light guide plate 2610 can be positioned so that its end is located behind these decorative bodies, and the light emitting devices (first pattern board 2611, second pattern board 2612) can be positioned behind the decorative bodies. This allows the boards that serve as light sources to be positioned in a position that is not visible to the player, ensuring decorativeness.

Furthermore, the LEDs for the light guide plate 2610 (LEDs 2613, 2614 for the light guide plate) and the LEDs that illuminate the decorative body may be mounted on a single board.

In this way, by attaching the light guide plate 2610 to the rear unit 3000, the entire display area of the main LCD display device 1600 can be used for moving effects, preventing the player from noticing the unnaturalness caused by the limited moving effect area.

Figure 244 is a diagram showing an example of an image displayed in another moving effect using a light guide plate. In the example shown in Figure 244, the color of the light emitted by the LED group is changed over time to create a moving effect in which the color of the image changes.

As described above, the light guide plate 2610 is provided with the first specific light entrance portion 2630a to the seventh specific light entrance portion 2630g, and the first LED group 2614a to the seventh LED group 2614g are arranged corresponding to each specific light entrance portion. The first LED group 2614a to the seventh LED group 2614g are composed of full-color LEDs and can emit light in multiple colors. In FIG. 244, the position corresponding to each specific light entrance portion is indicated by the last alphabetical character of the code.

As shown in the figure, the first LED group 2614a lights up in red, the first reflector 2670a reflects the red light incident from the first specific light entrance portion 2630a, the image on which the first reflector 2670a is arranged emits red light, and the player recognizes the red image. Similarly, the second LED group 2614b lights up in orange, the second reflector 2670b reflects the orange light incident from the second specific light entrance portion 2630b, and the image emits orange light. Also, the third LED group 2614c lights up in yellow, the third reflector 2670c reflects the yellow light incident from the third specific light entrance portion 2630c, and the image emits yellow light. Also, the fourth LED group 2614d lights up in green, and the fourth reflector 2670d reflects the green light incident from the fourth specific light entrance portion 2630d, and the image emits green light. The fifth LED group 2614e lights up in blue, and the fifth reflector 2670e reflects the blue light incident from the fifth specific light entrance portion 2630e, causing the pattern to emit blue light. The sixth LED group 2614f lights up in indigo, and the sixth reflector 2670f reflects the indigo light incident from the sixth specific light entrance portion 2630f, causing the pattern to emit indigo light. The seventh LED group 2614g lights up in purple, and the seventh reflector 2670g reflects the purple light incident from the seventh specific light entrance portion 2630g, causing the pattern to emit purple light.

After that, the first LED group 2614a to the seventh LED group 2614g light up in purple, red, orange, yellow, green, blue, and indigo, respectively, and the color of the pattern changes. After further time has passed, the first LED group 2614a to the seventh LED group 2614g light up indigo, purple, red, orange, yellow, green, and blue, respectively, and the color of the pattern changes.

In this way, the light color of the LEDs that make up the LED group is changed, and the color of the pattern is changed sequentially (for example, every 0.5 seconds). Because the human eye focuses on patterns that emit the same color, a moving effect is created in which the patterns emit light with flowing streaks of seven colors.

Although a detailed explanation is omitted, even with the light guide plate 2610 having a pattern of two intersecting light streaks as shown in FIG. 235, by changing the light emission color of each LED group 2614 in the same manner as described in FIG. 244, the color of the pattern (light streaks) can be changed, and a moving effect can be created in which the pattern is illuminated as if flowing seven-color light streaks. In addition, by using left-right parallax to make the light streaks appear to move further back or closer as they move away from the light source, a three-dimensional image can be displayed.

Next, we will explain the stereoscopic and planar image patterns produced by the light guide plate 2610.

Figure 245 shows how an image is displayed in a planar view by the light guide plate 2610.

As shown in FIG. 245(B), the reflecting portion 2660 provided on the back surface of the light guide plate 2610 has a curved reflecting surface, so that the light traveling inside the light guide plate 2610 is reflected in multiple directions and reaches the player's right eye 10R and left eye 10L. The reflecting portion 2660 also reflects the light traveling inside the light guide plate 2610 and arriving at the reflecting portion 2660 from multiple directions (i.e., multiple paths) and emits it to the front side of the light guide plate 2610. Therefore, as shown in FIG. 245(A), the image 2621 formed by the reflecting portion 2660 does not cause parallax between the left and right eyes, so the player sees the image 2621 as a flat image located at the position of the light guide plate 2610.

Figure 246 shows how an image is displayed in plan view by the light guide plate 2610.

As shown in FIG. 246(B), the reflecting portion 2650L provided on the back surface of the light guide plate 2610 reflects the light traveling through the light guide plate 2610 in the direction of the player's left eye 10L, and the reflecting portion 2650R reflects the light traveling through the light guide plate 2610 in the direction of the player's right eye 10R. However, since the reflecting portion 2650L and the reflecting portion 2650R are arranged close to each other (for example, within 1 mm), as shown in FIG. 246(A), the parallax between the left and right eyes of the pattern 2621 formed by the reflecting portions 2650L and 2650R is small, and it can be said that the pattern for the left eye formed by the reflecting portion 2650L and the pattern for the right eye formed by the reflecting portion 2650R are arranged in the same position. Therefore, the player sees the pattern 2621 as a flat pattern located at the position of the light guide plate 2610.

Figure 247 shows how a stereoscopic image is displayed by the light guide plate 2610.

As shown in FIG. 247(B), the reflecting surface 2651 of the reflecting portion 2650L provided on the back surface of the light guide plate 2610 is set at an angle to reflect the light traveling in the light guide plate 2610 in the direction of the player's left eye 10L, and the reflecting surface 2651 of the reflecting portion 2650R is set at an angle to reflect the light traveling in the light guide plate 2610 in the direction of the player's right eye 10R. Therefore, as shown in FIG. 247(A), the left eye image 2621L and the right eye image 2621R are shifted by the distance between the reflecting portion 2650L and the reflecting portion 2650R on the light guide plate 2610, and the player recognizes the right eye image and the left eye image with left-right eye parallax. In the state shown in FIG. 247, the light reaching the player's left eye 10L and the light reaching the player's right eye 10R intersect at point 2621C on the back surface side of the light guide plate 2610. As a result, the player will see the image 2621 formed by the reflecting portions 2650L and 2650R as a three-dimensional image located behind the light guide plate 2610.

Figure 248 shows how a stereoscopic image is displayed by the light guide plate 2610.

As shown in FIG. 248(B), the reflecting surface 2651 of the reflecting portion 2650L provided on the back surface of the light guide plate 2610 is set at an angle to reflect the light traveling in the light guide plate 2610 in the direction of the player's left eye 10L, and the reflecting surface 2651 of the reflecting portion 2650R is set at an angle to reflect the light traveling in the light guide plate 2610 in the direction of the player's right eye 10R. Therefore, as shown in FIG. 248(A), the left eye image 2621L and the right eye image 2621R are shifted by the distance between the reflecting portion 2650L and the reflecting portion 2650R on the light guide plate 2610, and the player recognizes the right eye image and the left eye image with left-right eye parallax. In the state shown in FIG. 248, the light reaching the player's left eye 10L and the light reaching the player's right eye 10R intersect at point 2621C on the front surface side of the light guide plate 2610. As a result, the player will see the image 2621 formed by the reflecting portions 2650L and 2650R as a three-dimensional image in front of the light guide plate 2610.

In this way, according to the front presentation unit 2600, since a single light guide plate 2610 can emit light to show multiple different pictures, there is no need to provide multiple light guide plates for each picture in order to display animations, etc., and the thickness of the front presentation unit 2600 in the front-to-rear direction can be made as thin as possible. Also, since the light guide plate 2610 is attached to the center gimmick 2500, the light guide plate 2610 can be positioned as close as possible to the player, making it easier to secure a large space behind the light guide plate 2610. Therefore, since a large space can be secured behind the light guide plate 2610, the lower movable presentation unit 3100, the upper rear movable presentation unit 3200, and the upper front movable presentation unit 3300, etc. can be arranged behind the light guide plate 2610, which improves the appearance within the play area 5a and makes the pachinko machine 1 more appealing to players. In addition to the presentation by the light-emitting display of the image 2623, a variety of presentations can be provided to the player by performing movable presentations by the lower movable presentation unit 3100, the upper rear movable presentation unit 3200, and the upper front movable presentation unit 3300, etc., which entertains the player and prevents a decline in interest.

In addition, by placing a light guide plate 2610 in front of the performance unit, decoration, and performance display device 1600, multiple translucent images appear due to the light emitted by multiple reflectors 2670, creating an illuminating decoration that moves like an animation. This can have a strong impact on players who are accustomed to illuminating performances using conventional light guide plates, surprising and entertaining the players, and making them think that something good is about to happen, increasing the players' expectations for the game and preventing a decline in interest.

In addition, only players seated directly in front of the pachinko machine 1 can clearly see the illuminated image displayed by the light guide plate 2610, so other players who are away from the front will have difficulty seeing the illuminated image 2623. This makes it difficult for other players to notice that a special effect is being performed using the light guide plate 2610, preventing other players from paying attention to the effect. Players can play the game without worrying about other players, allowing them to enjoy the game and preventing a decline in interest.

Furthermore, since the light guide plate 2610 is attached within the frame of the center device 2500, which is attached to the center of the front-view play area 5a, even if the images 2621, 2622 are illuminated and displayed by the LEDs 2613, 2614, the illuminated images do not interfere with play within the play area 5a, and the area in which the game is actually played can be clearly seen from the player's side, preventing the player from feeling distrustful due to difficulty in seeing the game, and allowing the player to enjoy the game in a good state.

In addition, since the light guide plate 2610 is attached to the frame-shaped center gadget 2500, the periphery of the light guide plate 2610 and the frame of the center gadget 2500 are aligned, making it difficult for the player to see the periphery of the light guide plate 2610 (the first picture substrate 2611 and the second picture substrate 2612). This makes it difficult for the player to notice the presence of the light guide plate 2610, so that when the pictures are illuminated, it can have a strong impact and surprise the player who thought the light guide plate 2610 did not exist, and it is possible to enjoy the illuminated display of multiple pictures by the light guide plate 2610 and suppress a decline in interest.

Furthermore, since the device is equipped with a performance display device 1600 capable of displaying performance images behind the light guide plate 2610, the player can be shown a performance that combines the light-emitting display of multiple different images by the light guide plate 2610 and the performance images by the performance display device 1600. By appropriately combining these, a variety of performances can be created, making it less likely for the player to become bored, and the performances by the light guide plate 2610 and the performance display device 1600 can entertain the player, preventing a decline in the player's interest in the game.

In addition, since the performance display device 1600 is positioned behind the light guide plate 2610, the distance from the player seated in front of the pachinko machine 1 to the light guide plate 2610 is different from the distance to the performance display device 1600. This makes it possible to display performance images related to the multiple images 2623 illuminated and displayed by the light guide plate 2610, giving the illuminated images 2623 a sense of depth and three-dimensionality, and allowing the player to see a performance (display performance) that can strongly attract the player's attention, entertaining the player and preventing a decline in interest in the game.

LEDs 2613 and 2614 may be single-color LEDs or full-color LEDs. The number of specific light-receiving sections, reflecting sections, and LED groups can be appropriately selected according to the number, shape, and size of the patterns.

[13-3. Production examples]
Next, an example of the effect display using a light guide plate in the special symbol variation display game will be described. Figures 249 to 254 are diagrams showing an example of the effect using a light guide plate.

In the effect display shown in FIG. 249, the light guide plate 2610 is illuminated so that a predetermined image is reflected on the light guide plate 2610, and a moving effect in which an image moves toward the predetermined image is displayed on the liquid crystal display device 1600. This effect display may be executed in a specific special symbol change display game (for example, as a specific reach effect or advance notice effect).

Specifically, first, as shown in FIG. 249(A), nothing is displayed on the liquid crystal display device 1600, and the entire screen goes dark (blacks out). This blackout makes the player focus his or her attention on the liquid crystal display device 1600.

After that, as shown in FIG. 249(B), the LED 2613 mounted on the first pattern board 2611 is turned on, and the first pattern 2621 is projected on the light guide plate 2610. This allows the player to focus on the first pattern 2621. Then, as shown in FIG. 249(C), a moving effect is performed in which an image moving toward the first pattern 2621 is displayed on the liquid crystal display device 1600. Also, as shown in FIG. 249(D), the moving effect may move the image 1611 toward the first pattern 2621 from multiple locations (i.e., multiple directions) on the liquid crystal display device 1600. The image 1611 that is moved to the liquid crystal display device 1600 and displayed may be the same color as the first pattern 2621 or a different color. Also, the image 1611 that is moved to the liquid crystal display device 1600 and displayed may be the same shape (similar shape) as the first pattern 2621, as shown in FIG. 249, or may be a different shape, as shown in FIG. 250. In addition, the moving and displayed image 1611 and the first pattern 2621 may be images of the same character (the pose and face may be the same or different), or the same characters (for example, the name of the character) with the same or different font and color. In the pachinko machine 1 of this embodiment, the light guide plate 2610 is disposed on the front side of the liquid crystal display device 1600, so that an image may be displayed by the liquid crystal display device 1600 on the back of the first pattern 2621 projected on the light guide plate 2610 as shown in FIG. 249 (D).

After that, as shown in FIG. 249(E), in the movement performance, the number of images 1611 moving toward the first image 2621 and the proportion of the display area of the liquid crystal display device 1600 that the moving images 1611 occupy may be changed over time.

During the movement performance, the appearance of the first pattern 2621 projected on the light guide plate 2610 may be changed. For example, as shown in FIG. 251, the color or brightness of the first pattern 2621 projected on the light guide plate 2610 may be changed during the movement performance. The color or brightness of the first pattern 2621 may be changed continuously (gradually) or in stages (in steps).

Also, as shown in FIG. 252, the size of the first pattern 2621 projected on the light guide plate 2610 may be changed during the movement performance. In this case, it is preferable to provide multiple light guide plates and project patterns of different sizes using other light guide plates. Also, since the light guide plate 2610 can project multiple different patterns by irradiating it with light from different directions, it is possible to project the first pattern 2621 of different sizes (large or small) by irradiating it with light from a direction (e.g., diagonal direction) different from the irradiation direction (horizontal direction) for projecting the first pattern 2621 of the initial size.

After the movement effect has been performed for a prescribed period of time, as shown in FIG. 249(F), the LED 2613 mounted on the first image board 2611 is turned off, and the first image 2621 is removed from the light guide plate 2610. Furthermore, the image displayed on the liquid crystal display device 1600 is also turned off, and the screen goes completely black (blacks out). This blackout makes the player focus his or her attention on the liquid crystal display device 1600, creating a pause to heighten anticipation for the next effect.

After that, as shown in FIG. 249(G), an image 1612 (e.g., a character with a high probability of winning) different from the first image 2621 or the moving image is displayed on the liquid crystal display device 1600. Furthermore, as shown in FIG. 249(H), the size of the character image 1612 is changed. For example, if the size of the character image 1612 is increased, the player's expectation of winning increases, but if the size of the character image 1612 is decreased, the player's expectation of winning decreases. The color or expression of the character image 1612 may be changed. The character image 1612 may be displayed in an area overlapping the display area of the first image 2621. Furthermore, together with the display of the character image 1612, the light guide plate 2610 may be illuminated from above to project a rainbow image (see FIG. 235).

This character image may be projected onto light guide plate 2610. As described above, light guide plate 2610 can project multiple different images by irradiating it with light from different directions, so the character image may be projected by irradiating it with light from a direction (e.g., diagonal) different from the irradiation direction (horizontal) for projecting first image 2621. Also, multiple light guide plates may be provided, and character images may be projected using the other light guide plates. If character images of different sizes and expressions are projected using light guide plates provided in addition to light guide plate 2610, a presentation with a sense of depth can be achieved, unlike the flat liquid crystal display device 1600.

In the moving effect in which the image moves toward the first pattern 2621 as described above, the image on the liquid crystal display device 1600 moves after the first pattern 2621 is displayed, but the first pattern 2621 may be displayed after the image on the liquid crystal display device 1600 starts to move. Specifically, as shown in FIG. 253, after a blackout (FIG. 253(A)), as shown in FIG. 253(B), before the first pattern 2621 is displayed, a moving effect is started in which an image moving toward the position where the first pattern 2621 is displayed is displayed on the liquid crystal display device 1600. Then, as shown in FIG. 253(C), the LED 2613 mounted on the first pattern board 2611 is turned on, and the first pattern 2621 is displayed on the light guide plate 2610. Then, as shown in FIG. 253(D), the moving effect in which the image moves toward the first pattern 2621 continues.

In this way, the time during which the first image 2621 is displayed (the time of the light guide plate performance) and the performance time during which the image 1611 moves (the time during which the moving image is displayed on the liquid crystal display device 1600) are such that the light guide plate performance during which the first image 2621 is displayed may start before or after the performance during which the image 1611 moves. Also, the time during which the light guide plate performance during which the first image 2621 is displayed may be longer or shorter than the performance time during which the image 1611 moves.

Also, as shown in FIG. 254, the image to which the images are gathered may be switched between a moving image, in which the image appears to move, and a still image, in which the image appears to not move, to produce the effect of a variable display game.

In the light guide plate effect shown in FIG. 254, when a moving image appears, the expectation of a big win is high, and when only a still image appears, the expectation of a big win is low. Specifically, as shown in FIG. 254(A), a still image 2621 is displayed on the light guide plate 2610 according to the progress of the variable display game, and as shown in FIG. 254(B), a moving effect is performed in which an image 1611 moving toward the displayed still image 2621 is displayed on the liquid crystal display device 1600. Also, as the variable display game progresses, as shown in FIG. 254(C), the still image 2621 is switched to a moving image. Furthermore, as shown in FIG. 254(D), a moving effect may be performed in which the image 1611 moves toward the first image 2621 from multiple locations (i.e., multiple directions) on the liquid crystal display device 1600.

On the other hand, as shown in FIG. 254(E), a still picture 2621 is displayed on the light guide plate 2610 in accordance with the progress of the variable display game, and as shown in FIG. 254(F), a moving effect is performed in which an image 1611 moving toward the displayed still picture 2621 is displayed on the liquid crystal display device 1600. Also, as the variable display game progresses, as shown in FIG. 254(G), a moving effect may be performed in which the image 1611 moves toward the picture 1613 from multiple locations (i.e., multiple directions) on the liquid crystal display device 1600. Thereafter, as shown in FIG. 254(H), the variable display game ends with a miss, without switching the still picture 2621 to a moving picture.

In the presentation shown in FIG. 254, when a specific display presentation (for example, a specific reach presentation, a pseudo consecutive presentation, or a specific look-ahead presentation) is selected in the special pattern change display game, the specific image 1611 displayed in the specific display presentation is presented in conjunction with the moving presentation of the first pattern 2621, and in other cases the first pattern does not need to present a moving presentation.

In this way, in the presentation of the variable display game shown in FIG. 254, a still image and a moving image are selectively displayed by the light guide plate 2610, so that the player has a sense of anticipation for the development of the variable display game, and a decline in interest in the game can be prevented.

Next, we will explain an example of a special symbol change display game that uses a light guide plate to add a moving object effect.

Figures 255 and 256 show examples of effects using a light guide plate 2610 and a movable body 3601.

In the presentation shown in FIG. 255, a single image is composed of the image displayed on the light guide plate 2610 and the movable body 3601 that appears in front of the liquid crystal display device 1600. Specifically, as shown in FIG. 255(A), part of the movable body 3601 appears and disappears from the top of the display screen of the liquid crystal display device 1600 in short cycles according to the progress of the variable display game, raising the player's hopes of a big win. Then, as shown in FIG. 255(B), the entire movable body 3601 appears in front of the display screen of the liquid crystal display device 1600.

After that, as shown in Fig. 255(C), a picture 2621 superimposed on the movable body is displayed by emitting light from the light guide plate 2610, and a movement effect is performed in which an image 1611 moving toward the movable body 3601 is displayed on the liquid crystal display device 1600. Also, as the variable display game progresses, as shown in Fig. 255(D), a movement effect may be performed in which images move toward the picture 2621 from multiple locations (i.e., multiple directions) on the liquid crystal display device 1600.

The movable body 3601 may be illuminated when the movement effect starts or during the movement effect. The illumination mode (illumination color and illumination timing) of the movable body 3601 may be the same as or different from the illumination mode of the light guide plate 2610.

By selectively performing either the presentation display in which the movable body 3601 shown in FIG. 249 does not appear, or the presentation display in which the movable body 3601 shown in FIG. 255 appears, the player's expectations regarding the development of the variable display game can be heightened, resulting in a highly entertaining pachinko machine.

In the above example, the movable body 3601 appears in place of the image to which the images are directed, but a single character may be composed of the light guide plate 2610 and the movable body 3601. For example, if the torso is represented by the movable body 3601 and the face is represented by the light guide plate 2610, the facial expression can be changed by switching the image displayed on the light guide plate 2610. In this way, in addition to the effects provided by the liquid crystal display device 1600, a variety of effects can be achieved by the light guide plate 2610.

256, the light guide plate 2610 is used as a performance suggesting the appearance of the movable body 3601. Specifically, as shown in FIG. 256(A), the light guide plate 2610 emits light to display the pattern 2621 in accordance with the progress of the variable display game, and as shown in FIG. 256(B), a moving performance is performed in which the image 1611 moving toward the pattern displayed by the light guide plate 2610 is displayed on the liquid crystal display device 1600. In addition, as shown in FIG. 256(C), a moving performance may be performed in which the image 1611 moves toward the first pattern 2621 from multiple locations (i.e., multiple directions) of the liquid crystal display device 1600 in accordance with the progress of the variable display game. After that, as shown in FIG. 256(D), the movable body 3601 appears from the top of the display screen of the liquid crystal display device 1600 and stops at a position where it overlaps with the pattern 2621 of the light guide plate 2610.

On the other hand, as shown in FIG. 256(E), a picture 1613 is displayed on the liquid crystal display device 1600 in accordance with the progress of the variable display game, and as shown in FIG. 256(F), a movement effect is performed in which an image 1611 moving toward the displayed picture 1613 is displayed on the liquid crystal display device 1600. Also, as the variable display game progresses, as shown in FIG. 256(G), a movement effect may be performed in which the image 1611 moves toward the picture 1613 from multiple locations (i.e., multiple directions) on the liquid crystal display device 1600. After that, as shown in FIG. 256(H), the movable body does not appear and the variable display game ends with a loss.

In this way, in the presentation shown in FIG. 256, a light guide plate can be used to create a presentation that suggests a moving object is coming out.

[14. Pachinko machine using a main control MPU with serial communication function]
The main control MPU 1311 of the pachinko machine 1 of this embodiment has a synchronous serial communication function in addition to a communication function using a conventional 8-bit parallel bus.

In conventional pachinko machines, the input/output signals of the main control MPU 1311 in the main control board 1310 are transmitted using a parallel port, in which one signal is transmitted over one signal line, or an 8-bit bus, which means that it is possible to read data output from the main control MPU 1311 or input unauthorized signals to the main control MPU 1311 and commit fraud. For this reason, a configuration is required that makes it difficult to detect the input/output signals of the main control MPU 1311 from the outside, and if a serial communication function is used that transmits data continuously at a specified timing over a single signal line, it becomes difficult to read or input data in accordance with the timing of the serial communication line.

The main control board 1310 is also equipped with a test signal output circuit for the purpose of monitoring signals when an inspection agency inspects a pachinko machine. For example, when inspecting the operation of a special electric role, in order to monitor the output signal of a solenoid that opens and closes the special electric role, a signal (e.g., a 5V on/off signal) input to a solenoid driving driver (transistor) is branched and used as a test signal. If the serial signal transmitted within the main control board 1310 described above is output as a test signal, the inspection agency needs a device to analyze the serial signal, so it is difficult to use the serial signal as a test signal. For this reason, in pachinko machines that transmit signals via serial communication within the main control board 1310, some ingenuity is required for outputting the test signal. For this reason, in the pachinko machine of this embodiment, a test signal that changes level at the same timing as the signal for driving the solenoid is generated by inputting one serial signal to two serial-parallel conversion circuits connected in parallel. If the output transistor of the serial-parallel conversion circuit is configured as an open collector (or open drain), two synchronized signals with different voltage levels can be generated by changing the voltage (5V and 12V) applied to the two serial-parallel conversion circuits connected in parallel.

Furthermore, it is necessary to reduce the number of program steps for detecting input via serial communication and reduce the software load. In the pachinko machine of this embodiment, some of the signals input to the main control MPU 1311 are input to a parallel-serial conversion circuit, and some are input directly to the general-purpose port of the main control MPU 1311, so it is necessary to devise which port to use to accept the input signal. For example, a signal whose input level needs to be determined immediately after power-on should not be input to the parallel-serial conversion circuit, but should be input directly to the general-purpose port of the main control MPU 1311. This is because the level of a signal input to the general-purpose port of the main control MPU 1311 can be detected even before interrupt processing is executed, so the signal level can be detected even outside of timer interrupt processing, such as immediately after power-on.

In particular, in the pachinko machine 1 of this embodiment, depending on the number of signals directly input to the main control MPU 1311, it is not necessary to use an extended I/O using chip select, and the level of the signal input to the general-purpose port of the main control MPU 1311 can be captured in bit units for each clock, making it possible to detect the signal level in real time without waiting for the reception of a serial signal.

Figure 257 is a block diagram of the periphery of the synchronous serial interface of the main control board 1310, Figure 258 is a circuit diagram showing the connection between the serial-parallel conversion circuit and the LEDs, and Figure 259 is a diagram showing the layout of the main control MPU 1311 and peripheral components on the main control board 1310. Note that in Figures 257, 258, and 259, thick lines indicate parallel signal transmission lines, and thin lines indicate serial signal transmission lines.

The main control MPU 1311 in this embodiment has an asynchronous serial communication port (asynchronous serial communication function) for communicating with other boards (peripheral control board 1510, dispensing control board 951, etc.), a synchronous serial communication port (synchronous serial communication function) for communicating with an interface circuit within the main control board 1310, and a general-purpose port that outputs control signals for other devices (solenoids, etc.) and inputs signals output from abnormality detection sensors such as vibration detection sensors and magnetic detection sensors.

The synchronous serial communication function of the main control MPU 1311 has multiple transmission/reception ports and multiple transmission ports. The communication partner of the transmission/reception port is selected by the chip select signal output from the main control MPU 1311.

The transmit/receive port is composed of a serial signal transmit terminal (SERTX), a receive signal input terminal (SERRX), a chip select output terminal (SERS0 to SERS3), and a synchronization signal output terminal (SERCK). The transmit port is composed of a serial signal transmit terminal (SERTXT), a chip select output terminal (SERST), and a synchronization signal output terminal (SERCKT).

As shown in FIG. 257, one parallel-serial conversion circuit 1341 and two serial-parallel conversion circuits 1342 and 1343 are connected to the transmitting/receiving port. The number of parallel-serial conversion circuits connected to the transmitting/receiving port is not limited to that shown in the figure.

In addition, even more serial-parallel conversion circuits may be connected by making a connection like that of parallel-serial conversion circuit 1341 without using a chip select terminal. In this case, the number of types of signals output from the serial-parallel conversion circuits does not increase.

The parallel-serial conversion circuit 1341 connected to the transmission/reception port takes in the parallel data input when CLEAR/LOAD (negative logic) is at level 0, and outputs data from the serial port at a specified clock timing after CLEAR/LOAD (negative logic) rises to 1. Signals from game ball detection switches (start winning port, big winning port count switch, normal winning port, specific area switch, normal pattern gate switch, game board discharge switch) and photosensors are input to the parallel-serial conversion circuit 1341, and it mainly detects game balls flowing down the game area 5a. The parallel-serial conversion circuit 1341 has a configuration with a 16-bit input port, but it may also be configured as a 16-bit configuration by connecting integrated circuits with 8-bit input ports in parallel.

Specifically, the parallel-serial conversion circuit 1341 has a serial signal transmission terminal (SERTX) connected to its CLEAR/LOAD (negative logic) terminal, so that it captures the output signal of the game ball detection switch that is input when the serial transmission signal output by the main control MPU 1311 is at level 0, and outputs serial data according to the level of the game ball detection switch from the serial port at a specified clock timing after the serial transmission signal (SERTX) rises to 1. In this way, the parallel-serial conversion circuit 1341 captures the output signal of the game ball detection switch using the SERTX signal as a trigger, so it can capture data from the ball detection sensor at any timing.

The serial-parallel conversion circuits 1342 and 1343 connected to the transmission and reception ports both output signals for turning on LEDs (functional display unit 1400, base display 1317), and the destination of data transmission is selected by the chip select signal from the main control MPU 1311. The serial-parallel conversion circuits 1342 and 1343 take in serial data input when the chip select (CS) signal is at level 0 according to a specified clock signal, and output a signal from the parallel port when the chip select signal rises to level 1. The output level from the parallel port is latched within the serial-parallel conversion circuits 1342 and 1343, and is maintained until the next time the chip select signal rises to level 1.

Specifically, as shown in FIG. 258, serial-parallel conversion circuit 1342 is connected to the segment side of the LED, and serial-parallel conversion circuit 1343 is connected to the common side of the LED. The serial-parallel conversion circuit 1342 and serial-parallel conversion circuit 1343 output signals at a predetermined timing to dynamically light the LED. The serial-parallel conversion circuits 1342 and 1343 have a configuration with a 16-bit output port, but integrated circuits with 8-bit output ports may be connected in parallel to form a 16-bit configuration.

The main control MPU 1311 outputs a common signal at the same time as it outputs 0 from the chip select terminal (SERS0), sets the display digit of the 7-segment LED of the base display 1317, and outputs a segment signal at the same time as it outputs 0 from the chip select terminal (SERS1), turning on the LED.

In this embodiment, a 7-segment LED with the anode side of the LED as the common terminal is used for the base display 1317, and when the LED is turned on, a drive current flows from the common terminal on the anode side to the segment terminal on the cathode side. However, since the same integrated circuit is used for the serial-parallel conversion circuit 1342 and the serial-parallel conversion circuit 1343, the direction of the current output by the driver circuit in each conversion circuit 1342, 1343 (polarity of the output transistor of the driver circuit) is the same. For this reason, a driver circuit 1344 is provided after the serial-parallel conversion circuit 1343 so that a current can be supplied to the common terminal on the anode side. In other words, the driver circuit 1344 has the function of outputting a drive current for turning on the LED, and the serial-parallel conversion circuit 1343 has the function of absorbing the drive current for turning on the LED.

The parallel-serial conversion circuit 1341 and the serial-parallel conversion circuits 1342 and 1343 may be respectively an integrated circuit having only a parallel-serial conversion function and an integrated circuit having only a serial-parallel conversion function, or an integrated circuit capable of converting serial signals to and from parallel signals and vice versa, which can be switched between the parallel-serial conversion function and the serial-parallel conversion function.

Two serial-parallel conversion circuits 1345 and 1346 are also connected to the transmission port of the main control MPU 1311. Like the previously described serial-parallel conversion circuits 1342 and 1343, the serial-parallel conversion circuits 1345 and 1346 take in serial data input when the chip select (CS) is at level 0 in accordance with a specified clock signal, and output it from the parallel port when CS rises to level 1. The output of the parallel port is equipped with a driver transistor, which switches the voltage applied to the driver transistor to generate an output signal. In other words, output signals of various voltages can be generated depending on the voltage applied to the driver transistor.

The output ports (PA0 to PA7) of channel A of the serial-parallel conversion circuit 1345 are connected to the external terminal board 784, and signals (such as security signals and ball payout signals) are output from the external terminal board 784. Various solenoids are connected to the output ports (PB0 to PB7) of channel B of the serial-parallel conversion circuit 1345, and drive signals for the various solenoids are output. The output ports (PB0 to PB7) of channel B of the serial-parallel conversion circuit 1346 are connected to the inspection terminals 1348, and signals (such as special electric role release signals and normal electric role release signals) are output from the inspection terminals 1348. Nothing is connected to the output ports of channel A of the serial-parallel conversion circuit 1346.

The transmission port of the main control MPU 1311 can only control one channel (16 bits), and the same branched signal, including the chip select, is input to the serial-parallel conversion circuit 1345 and the serial-parallel conversion circuit 1346, so the same signal is output to the parallel side. Therefore, the serial-parallel conversion circuit 1345 and the serial-parallel conversion circuit 1346 generate a set of parallel signals that change at the same timing from one serial signal. In other words, the solenoid drive signal output from the output port (PB0 to PB7) of channel B of the serial-parallel conversion circuit 1345 and the inspection signal output from the output port (PB0 to PB7) of channel B of the serial-parallel conversion circuit 1346 change at the same timing. Therefore, the movement of the solenoid can be accurately output from the inspection terminal 1348. Note that +12V is applied to the serial-parallel conversion circuit 1345 to drive the solenoid with 12V, and +5V is applied to the serial-parallel conversion circuit 1346 to output a 5V inspection signal. In this way, by using two serial-to-parallel conversion circuits with different voltages applied, synchronized signals with different voltage levels can be generated.

Of the outputs from the serial-parallel conversion circuit 1345 and the serial-parallel conversion circuit 1346, the pattern on the output side of the solenoid drive signal, through which a relatively large current flows, may be made thicker, and the pattern on the output side of the inspection signal, through which only a relatively small current flows, may be made thin. Note that the pattern does not need to be made thicker as long as the resistance of the pattern is reduced, and the effective cross-sectional area may be increased by forming patterns on both the front and back sides, or by forming an inner layer pattern.

In addition, because the two serial-parallel conversion circuits 1345 and 1346 operate independently, even if the load on one conversion circuit increases, the waveform of the output signal of the other conversion circuit is not disturbed and the output signal is not affected. In other words, the serial-parallel conversion circuit 1346 can output an inspection signal with the same waveform as the original waveform of the solenoid drive signal, regardless of the operation of the solenoid connected to the serial-parallel conversion circuit 1345, which is useful for accurate inspection.

Next, referring to FIG. 259, the layout of the main control MPU 1311 and peripheral components on the main control board 1310 will be described.

As shown in FIG. 259, the main control board 1310 is equipped with the main control MPU 1311, and various interface circuits are arranged around it. In addition, the main control board 1310 is provided with an inspection circuit layout area, in which the serial-parallel conversion circuit 1346, the interface circuit 1347, and the inspection terminal 1348 are provided. The circuit components (serial-parallel conversion circuit 1346, interface circuit 1347, inspection terminal 1348, etc.) provided in the inspection circuit layout area are only installed in pachinko machines 1 that are inspected by an inspection agency, and are not installed in pachinko machines 1 that are generally sold on the market (patterns for mounting components are provided). In other words, in pachinko machines 1 that are generally sold on the market, a connector that relays the signal output from the serial-parallel conversion circuit 1345 to the solenoid is implemented, but the inspection terminal 1348 that relays the inspection signal output from the serial-parallel conversion circuit 1346 is not implemented. For this reason, commercially available pachinko machines 1 are designed so that the inspection signal cannot be detected by a cheater and used for cheating.

As mentioned above, in commercially available pachinko machines 1, no components are mounted in the inspection circuit layout area, but a printed pattern (for example, a data bus connected to interface circuit 1347) is provided. Because of this, there is a possibility that noise may be induced in the data bus and cause malfunction, so it is advisable to reduce the effects of noise by pulling up the wiring (printed pattern) in the inspection circuit layout area to the power supply (+5V) via a resistor (or pulling down to GND).

Furthermore, from the viewpoint of preventing unauthorized tampering, commercially available pachinko machines 1 do not use surface mount components, but since the circuit components provided in the inspection circuit layout area are not mounted on commercially available pachinko machines 1, surface mount components can be used. This allows the components of the inspection circuit to be made smaller, the inspection circuit layout area to be made smaller, and ultimately the main control board 1310 to be made smaller. Similarly, from the viewpoint of preventing unauthorized tampering, commercially available pachinko machines 1 do not use components on the back side of the main control board 1310, but since the circuit components provided in the inspection circuit layout area are not mounted on commercially available pachinko machines 1, components can be mounted on the back side of the main control board 1310.

Of the components of the inspection circuit, the serial-parallel conversion circuit 1346 and the inspection terminal 1348 may be provided on a separate board located near the main control board 1310. This separate board is only installed in pachinko machines 1 that are subject to inspection by an inspection agency, and is not installed in pachinko machines 1 that are generally sold commercially. In this case, too, the inspection signal is not output from pachinko machines 1 that are generally sold commercially.

In this way, by concentrating and arranging the circuit components used in the inspection of the pachinko machine 1 in the inspection circuit arrangement area, it becomes easier to find missing components in commercially available pachinko machines 1, and easier to find the attachment of additional components for fraudulent purposes. In addition, the serial-parallel conversion circuit 1346 and the interface circuit 1347 can be arranged near the inspection terminals 1348, making it possible to configure a main control board 1310 that is highly resistant to noise.

Furthermore, as shown in FIG. 259, the circuit components placed in the inspection circuit layout area may be arranged in a different orientation (e.g., rotated 180 degrees as shown) from the same type of circuit components placed in other locations on the main control board 1310. In this way, by arranging the circuit components in different orientations in the inspection circuit layout area and other locations on the main control board 1310, it becomes easy to distinguish between components used for normal play and components for inspection, and mis-implementation in which components are mistakenly placed in the inspection circuit layout area can be prevented during the manufacturing process of commercially available pachinko machines 1.

The symbols and numbers (or combinations thereof) of the circuit components mounted on the main control board 1310 are displayed, for example, by silk screen printing, but the symbols and numbers of the circuit components placed in the inspection circuit layout area can be given a symbol or number that follows the symbol or number of the circuit components used for game control. For example, the integrated circuits for game control are numbered IC1 to IC11, and the integrated circuits placed in the inspection circuit layout area are given symbols IC12 and onwards. In this way, the circuit components for game control implemented in commercially available pachinko machines 1 can be given symbols and numbers without gaps, making it easier to check the circuit components after they have been mounted on the main control board 1310.

Furthermore, if the symbols and numbers of the inspection terminals are on a different system from the symbols and numbers of the connectors connected to the game control components, it will be easy to distinguish between the connectors connected to the game control components and the inspection terminals, and it will be possible to prevent incorrect wiring resulting from incorrectly connecting cables. In particular, if the symbols and numbers of the inspection terminals are the same as the symbols and numbers of the connections of the other inspection device, it will be convenient to connect cables during inspection and connection errors can be reduced.

In addition, some of the general-purpose ports of the main control MPU 1311 are unused free ports, and it is preferable to arrange the free ports so that they are aggregated at adjacent terminals of the main control MPU 1311. In other words, regardless of whether the port numbers of the unused ports are consecutive, it is preferable to arrange the terminals of the free ports in an aggregated position. By arranging the free terminals in an aggregated manner, the areas on the main control board 1310 where no printed patterns are provided are aggregated, making it easier to discover missing parts and the attachment of additional parts for fraudulent purposes.

The terminals of the free ports are positioned in a position close to the connector through which a relatively large current flows (for example, to which a solenoid is connected) in relation to the connector. In other words, in the longitudinal direction of the main control MPU 1311, connectors for inputting and outputting game control signals are positioned on the left and right (top and bottom in the figure) of the side on which the terminals of the free ports are located. For this reason, when adding additional functions to the pachinko machine 1, the design of the main control board 1310 can be easily changed without having to run long patterns.

As explained above, by using serial communication for signal transmission within the main control board 1310, the wiring of the data bus can be reduced, making it easier to detect the installation of additional components for fraudulent purposes. In other words, by eliminating the numerous data buses connected to multiple parallel interface circuits and reducing them to just a few signal lines, including control lines, the circuit pattern of the numerous data buses is replaced by a simpler circuit pattern, rather than a complex arrangement of wiring. In addition, by shortening the routing distance of the data lines, a main control board 1310 that is resistant to noise can be constructed.

In addition, because the number of data lines is reduced, circuits can be arranged without being affected by the routing of data lines, so I/O ICs (parallel interface circuits, serial interface circuits) can be arranged close to the main control MPU 1311.

In addition, by reducing the circuit pattern, the ground pattern can be increased without changing the area of the main control board 1310, making the main control board 1310 more resistant to noise.

Figure 260 shows the arrangement of ports in the main control MPU 1311.

The parallel output port of address D2 (chip select SERS0) is the serial-parallel conversion circuit 1343, and as shown in FIG. 258, the output ports PA0 to PA3 of channel A are connected to the common side (anode terminal of the LED) of the function display unit 1400, and the output ports PA4 to PA7 are connected to the common side (anode terminal of the 7-segment LED) of the base display 1317. The output ports PB0 to PB7 of channel B of the serial-parallel conversion circuit 1343 are not used.

The parallel output port of address D3 (chip select SERS1) is a serial-parallel conversion circuit 1342, and as shown in FIG. 258, the output ports PA0 to PA7 of channel A are connected to the segment side (cathode terminal of the LED) of the functional display unit 1400, and the output ports PB0 to PB7 of channel B are connected to the segment side (cathode terminal of the 7-segment LED) of the base display 1317.

The common side of the LED (anode terminal of the LED) switches the output port to be turned on at a fixed cycle (for example, an interrupt every 4 ms). If we look at the output ports of channel A, only PA0 is turned on in the timer interrupt process, only PA1 is turned on in the next timer interrupt process (4 ms later), ... only PA7 is turned on in the next timer interrupt process (4 ms later), and this is repeated at a fixed cycle (4 ms x number of ports). In other words, if 8 ports are repeatedly switched, each port is turned on every 32 ms. Alternatively, if we look at the output ports of channel A, with the output ports PA0 to PA3 and PA4 to PA7 of channel A as groups, only PA0 and PA4 are turned on in the timer interrupt process, only PA1 and PA5 are turned on in the next timer interrupt process (4 ms later), ... only PA3 and PA7 are turned on in the next timer interrupt process (4 ms later), and this is repeated at a fixed cycle (4 ms x number of ports). By making this constant-cycle operation a serial communication, it becomes difficult to detect the operation timing of the main control MPU 1311.

The parallel input port at address D5 is a parallel-serial conversion circuit 1341, and switches (ball detection sensors) for detecting game balls are connected to inputs PA1 to PA7 and PB0 to PB7. The output of these ball detection sensors is input to the main control MPU 1311 as a serial signal and is read as a signal at address D5.

Furthermore, the general-purpose input ports INP0 to INP4 of the main control MPU 1311 input operation information from the setting key 971, operation information from the RAM clear switch 954, a power outage warning signal, a main pay ACK signal, and a detection signal from the frame open detection switch. These signals need to be monitored in real time (at the time requested by the program) or outside of timer interrupt processing (for example, immediately after power is turned on), so they are input directly to the main control MPU 1311 without going through a parallel-serial conversion circuit.

Furthermore, the general-purpose input/output ports (combined for input/output) IOP0 to IOP3 of the main control MPU 1311 are supplied with detection signals from the radio wave detection sensor, the vibration detection sensor, the magnetic detection switch, and the proximity error switch. These signals are output when an abnormality (fraudulent activity, malfunction, etc.) occurs in the pachinko machine 1, and since they need to be monitored in real time (when the program requests), they are input directly to the main control MPU 1311 without going through a parallel-serial conversion circuit. Furthermore, the detection signals from these sensors and switches notify the abnormality on the main liquid crystal display device 1600 or by voice. This abnormality notification will cause an employee of the hall to come and check the status of the pachinko machine, which will essentially stop the game. If this abnormality notification is a false alarm, it will cause discomfort to the player, so it is necessary to suppress false detection. For this reason, it is advisable to input these signals to the general-purpose input/output ports and detect them multiple times in a short period of time (so-called double reading) to suppress false detection due to the influence of noise.

This double read process is performed by executing read commands consecutively in one timer interrupt process to determine the signal level input to the general-purpose I/O port (or general-purpose input port) at short time intervals, executing multiple read commands with several commands in between to determine the signal level input to the general-purpose I/O port (or general-purpose input port) at short time intervals, or executing multiple read commands with several clock waits in between to determine the signal level input to the general-purpose I/O port (or general-purpose input port) at short time intervals. For this reason, when the port level is continuously determined via a parallel-serial conversion circuit, the level can only be detected at intervals of several tens of microseconds, whereas when the general-purpose port level is continuously determined, the level can be detected at intervals of one microsecond or less, allowing the signal level to be detected in a short cycle.

In this way, in the pachinko machine 1 of this embodiment, signals from various switches and sensors that require real-time performance can be directly input to the general-purpose input port and general-purpose output port without using extended I/O using chip select, and the level of the signal input to the general-purpose input/output port (both input and output) is captured in bit units for each clock, so the signal level can be detected in real time without waiting for the reception of a serial signal.

Although the general-purpose input/output ports (both input and output) IOP4 to IOP7 are not used, some of the signals input via the parallel-serial conversion circuit 1341 may be input to the general-purpose input/output ports (both input and output) IOP4 to IOP7.

Although not shown in the figure, the main control MPU 1311 may also have a general-purpose output port.

If the general-purpose input port is an unused terminal, it is recommended to either pull it up to 5V via a resistor or pull it down to GND to prevent the terminal from becoming an intermediate potential and reduce the effects of noise induced on the power supply line. Also, if the general-purpose output port is an unused terminal, it may be left open, but it is recommended to either pull it up to 5V via a dummy resistor or pull it down to GND to prevent level changes at the output port from causing noise.

As explained above, in the pachinko machine 1 of this embodiment, the inspection signal is output from the general-purpose port of the main control MPU 1311, and the signal used for game control is output via a serial-parallel conversion circuit. Therefore, the winning ball detection signal is collected and input to a single port, making it easier to handle with the game control program.

Furthermore, of the signals input to the main control MPU 1311, signals that need to be detected multiple times in a short period of time (so-called double reading) are input to a general-purpose port, and signals that do not need to be read twice are input to the main control MPU 1311 via a serial-parallel conversion circuit. The general-purpose port can check the signal level in real time, so the signal level can be detected multiple times in a short period of time and a judgment can be made while eliminating the effects of noise. If the general-purpose input port is free, the port can be assigned so that signals that do not need to be read twice are input to the general-purpose port.

A general-purpose input port can be assigned to a signal that is input to the main control MPU 1311, while a general-purpose input/output port (both input and output) can be assigned to both a signal that is input to the main control MPU 1311 and a signal that is output from the main control MPU 1311, so the general-purpose input/output port is highly versatile in terms of specification changes. For this reason, it is desirable to use a general-purpose input/output port (both input and output) as a port to be left as a spare for adding new functions, and it is desirable to give priority to allocating the general-purpose input port.

Next, using Figure 261, we will explain the timing of data output and input using a synchronous serial signal.

When the main control MPU 1311 outputs 0 (LOW) from the chip select terminal SERS0, the serial-parallel conversion circuit 1343 is selected, and the main control MPU 1311 outputs a selection signal for the common side of the base display 1317. In the figure, PA7 (COM4) is selected among PA7 to PA4. After that, the main control MPU 1311 outputs a selection signal for the common side of the function display unit 1400 from the serial signal transmission terminal SERTX. In the figure, PA3 (LED-C4) is selected among PA3 to PA0.

Since no output is assigned to the B channel port of the serial-parallel conversion circuit 1343, it would normally not output anything at the timing of data capture from PB7 to PB0, and would maintain 1 (HIGH). However, in the pachinko machine of this embodiment, the serial transmission signal SERTX output from the main control MPU 1311 is connected to the CLR/LOAD terminal that determines the data capture timing of the parallel-serial conversion circuit 1341, and when this signal is 0 (LOW), data is captured from PA0 to PB7. For this reason, the serial transmission signal SERTX is set to 0 (LOW) at any timing from PB7 to PB0, and data is captured from PA0 to PB7 of the parallel-serial conversion circuit 1341.

The parallel-serial conversion circuit 1341 takes in data, and after the serial transmission signal SERTX rises to 1 (HIGH), outputs serial data from the serial signal output terminal (Q8C) in accordance with the clock signal. During this time, the serial transmission signal SERTX is controlled to maintain 1 (HIGH) so that no new data is taken in.

In this way, in the pachinko machine of this embodiment, the transmission signal of an available output port is used as a trigger to capture the output of the game ball detection sensor, so data from the ball detection sensor can be captured at any time.

Next, using Figures 262 and 263, we will explain another arrangement of the main control board 1310 in the main control board box 1320.

It is desirable to use the main control board 1310 in common with multiple models without redesigning it. However, the input/output signals of the main control board 1310 may differ depending on the model and specifications. For this reason, in this embodiment, the input/output interfaces of the main control board 1310, which differ depending on the model, are mounted on a separate board (input/output board 1351), and the periphery of the main control MPU 1311, which is common to each model, is mounted on the main control board 1310. By making the main control board 1310 common to multiple models, that is, by making the board size, circuit design, artwork of the printed circuit board, component arrangement, etc. the same, the main control board 1310, which has been evaluated for performance (e.g., noise resistance performance) and has stable design quality, can be used in common with multiple models without redesigning it.

In addition, when the input/output interface of the main control board 1310 is implemented on a separate input/output board 1351, where to separate the circuits becomes an issue. One is a method of separating them with a serial signal line, and the second is a method of separating them with a parallel signal converted from a serial signal. In the former case, the number of wiring between the boards can be reduced more than in the latter case, which is preferable. In addition, even if the serial signal itself is acquired, it is difficult to know the order in which the data is transmitted, and it is unclear which data is transmitted at what timing. Furthermore, the serial signal is output at a speed synchronized with the clock for the serial signal, and this synchronous clock may be different from the operating clock of the main control MPU 1311 and can be changed. For this reason, it is difficult to guess the data rate from the outside, and even if the serial signal is acquired, it is difficult to know the contents of the data being transmitted. For this reason, it is preferable to connect the main control board 1310 and the input/output board 1351 with a serial signal line.

As shown in FIG. 262, an input/output board 1351 is provided to the main control board 1310, and the main control board 1310 and the input/output board 1351 are mounted in the main control board box 1320. The main control board box 1320 is made of transparent resin that houses the main control board 1310 and the input/output board 1351 in a sealable structure that cannot be opened without destruction once closed. The input/output board 1351 is provided with a parallel-serial conversion circuit 1341 and a serial-parallel conversion circuit 1345. The main control board 1310 and the input/output board 1351 (the main control MPU 1311 and the parallel-serial conversion circuit 1341 and the serial-parallel conversion circuit 1345) are connected by a serial communication line, and the boards can be connected with fewer lines than when connecting with a parallel bus or a general-purpose port. The serial signal lines may be connected by electric wires or board-to-board connectors.

In addition, if serial communication is used between the boards, even if the signal is obtained, it is difficult to analyze the data, reducing the possibility that the contents of the transmitted data will be discovered by a fraudster. Also, the input/output board 1351 that inputs and outputs signals for game control is configured separately from the main control board 1310, and input/output signals that vary depending on the model are set on the input/output board 1351, so that the number of models that can be applied without modifying the main control board 1310 increases, improving the versatility of the main control board 1310.

Furthermore, by housing the main control board 1310 and the input/output board 1351 in a single main control board box 1320, the signal lines for serial communication can be shortened.

When using the main control board 1310 for another model, all that is required is to change the design of the input/output board 1351, and the relationship between the connectors of the main control board 1310 and the main control MPU 1311 does not change depending on the model, making it easier to design a pachinko machine and allowing the use of a main control board 1310 whose performance (e.g., noise resistance performance) has been evaluated and whose design quality is stable. Furthermore, if the size of the input/output board 1351 and the position of the mounting holes are not changed, the main control board box 1320 does not need to be redesigned and the conventional main control board box 1320 can be reused. Furthermore, noise countermeasures that change depending on the model can be performed in the input/output board 1351 rather than the main control board 1310.

The serial-parallel conversion circuits 1342, 1343 that output the drive signal for the base display 1317 may be arranged on the main control board 1310. If the base display 1317 is arranged on the input/output board 1351, the serial-parallel conversion circuits 1342, 1343 may be arranged on the input/output board 1351, and a signal for driving the functional display unit 1400 may be output from the input/output board 1351.

In addition, it is preferable to place serial-parallel conversion circuit 1346, which generates the inspection signal, on main control board 1310. In other words, it is preferable to provide the inspection circuit arrangement area and inspection terminals 1348 on main control board 1310. This is because a portion of the signal output from inspection terminals 1348 is output from main control MPU 1311 via a parallel bus, and therefore placing inspection terminals 1348 on input/output board 1351 would increase the number of connection lines between main control board 1310 and input/output board 1351.

Also, as shown in FIG. 263, the main control board 1310 may be housed in the main control board box 1320, and the input/output board 1351 may be mounted outside the main control board box 1320.

In the embodiment shown in FIG. 263, the input/output board 1351 is provided outside the main control board box 1320, so even if the size of the main control board box 1320 changes, the main control board box 1320 can be used in common. In addition, the input/output board 1351 and the main control board 1310 are housed in separate board boxes, so the freedom of board arrangement is improved. In addition, if the main control board box 1320 in which the main control board 1310 is housed and the input/output board box 1350 in which the input/output board 1351 is housed are provided separately, each board box becomes smaller, and the board installation position becomes more flexible. Furthermore, since the main control board 1310 is provided with the base display 1317, the LEDs that display error codes, and the setting keys 971, it is necessary for them to be visible on the back side of the pachinko machine 1, but the input/output board 1351 does not need to be visible from the back side of the pachinko machine 1, so the board installation position becomes more flexible. In this way, the embodiment shown in FIG. 263 can improve the freedom of design.

In the embodiment shown in FIG. 263, the serial signal output from the main control MPU 1311 is output to the outside of the main control board box 1320. The main control MPU 1311 outputs data from the data bus in addition to the serial signal. In a pachinko machine, it is desirable not to output the data bus output from the main control MPU 1311 to the outside of the sealed main control board box 1320 in order to prevent a fraudster from noticing the operation of the pachinko machine. However, even if the serial signal output from the main control MPU 1311 is output to the outside of the main control board box 1320, it is unlikely that a fraudster will be able to detect the operation status of the pachinko machine. This is because the data bus outputs data according to the operation clock of the main control MPU 1311 and the data rate is constant, so that the data rate is easily guessed from the outside, and as a result, the signal transmitted on the data bus may be obtained. However, the serial signal is output at a speed synchronized with the clock for the serial signal, and the speed of this synchronization clock may be different from the operation clock of the main control MPU 1311 and can be changed. For this reason, it is difficult to guess the data rate from the outside, and even if the serial signal is acquired, it is difficult to know the content of the data being transmitted.

The above describes an example in which the input/output board 1351 is provided separately from the main control board 1310, and input/output functions for model-dependent signals are mounted on the input/output board 1351. However, if there are other parts that do not decrease resistance to fraud or noise even if they are placed outside the main control board 1310, they may be mounted on the input/output board 1351. For example, the output of signals that require drive current such as solenoids and motors attached to the game board 5, the output of drive signals for the function display unit 1400, and the input of signals from various sensors (winning ball detection, radio wave sensor, magnetic sensor, vibration sensor) are functions that may be mounted on the input/output board 1351. In addition, communication with the payout control board 951, output of signals output from the external terminal board 784, power outage detection, input of the setting key 971 (the setting key 971 itself may be provided outside the main control board 1310), and output to the base display 1317 are functions that may be mounted on the main control board 1310.

In addition, it is recommended that the parallel-serial conversion circuit 1341 and serial-parallel conversion circuit 1345 mounted on the input/output board 1351 input a dummy signal (0V or 5V) to the free input terminal or connect a dummy resistor to the free output terminal. This is because if nothing is connected to the free terminal, noise may be introduced and the circuit may malfunction.

In particular, if some of the multiple signals that a fraudster attempts to obtain are transmitted via a parallel bus or general-purpose port and the other signals are transmitted as serial signals, it will be difficult to analyze the serial signals, so the fraudster will need to obtain signals from multiple locations, including the main control board 1310 and the input/output board 1351, which will increase the deterrent effect against fraud.

[15. Slot Machines]
Up to this point, the arrangement of programs and data stored in the ROM of a pachinko machine has been explained, and next, the arrangement of programs and data stored in the RAM and ROM of a slot machine (reel type gaming machine) will be explained. Note that, although the outline of a pachinko machine has been explained in FIG. 26, programs and data are arranged in the RAM and ROM in the same manner as in the case of the slot machine 4000 explained below.

[15-1. Structure]
First, a description will be given of the structure of the slot machine 4000 in this embodiment. Figure 264 is a perspective view of the slot machine 4000, and Figure 265 is a perspective view of the slot machine 4000 with the front member 4200 open.

As shown in Figures 264 and 265, the slot machine 4000 of this embodiment has various devices inside a box-shaped housing 4100 with an open front, and a front member 4200 is provided on the front of the housing 4100 in a one-way door format so that it can be opened and closed. The upper part of the front member 4200 is provided with an image display 4500 that displays effects and information according to the progress of the game, a speaker that displays effects using sound, and the like. The image display 4500 is composed of, for example, a liquid crystal display panel, and displays various information in addition to effects related to the game. The various effects and history information displays on the image display 4500 are controlled by a performance control board 4700. In other words, the image display 4500 constitutes a performance display means capable of displaying effects according to the progress of the game, and the performance control board 4700 constitutes a display control means capable of controlling the display of the performance display means.

A front panel is disposed in the center of the front member 4200, which prevents the view behind it and has decorative patterns drawn on it, and a (for example, transparent) pattern display window 4401 is formed in the center of the front panel, allowing the view behind it to be seen. The front panel may be configured as a display device, and when no image is displayed in the pattern display window 4401, the reel 4301 is visible, and images that create a game effect are displayed mainly around the pattern display window 4401. In this case, it is also possible to display images that create a game effect in the pattern display window 4401.

Through the pattern display window 4401 (window portion), it is possible to see the patterns that change as the reels 4301 arranged inside the housing rotate. The reels 4301 are composed of a cylindrical left reel 4301a, a center reel 4301b, and a right reel 4301c arranged side by side in the horizontal direction. A rectangular sheet on which multiple patterns are drawn is wrapped around the outer periphery of these reels 4301a, 4301b, and 4301c in the longitudinal direction, so that the multiple patterns are arranged in a predetermined sequence.

Each reel 4301a, 4301b, 4301c is provided with a reel drive motor 4341a, 4341b, 4341c (see FIG. 266), which is a stepping motor, and each reel 4301a, 4301b, 4301c can be driven and stopped independently. That is, the reel drive motors 4341a, 4341b, 4341c form the drive source of each reel 4301a, 4301b, 4301c. Furthermore, the reel drive motors 4341a, 4341b, 4341c are controlled by a two-phase excitation method, similar to the payout motor 839 of the pachinko machine 1 described above, to increase the drive torque and static torque. This makes it possible to use a small motor as the drive source, thereby reducing costs.

Note that in the following, where necessary, the reels 4301a, 4301b, and 4301c will be referred to as the left reel 4301a, center reel 4301b, and right reel 4301c, respectively. The corresponding reel stop buttons 4211a, 4211b, and 4211c will be referred to as the left reel stop button 4211a, center reel stop button 4211b, and right reel stop button 4211c. Furthermore, the reel drive motors 4341 corresponding to each reel will be referred to as the left reel drive motor 4341a, center reel drive motor 4341b, and right reel drive motor 4341c.

In addition, by rotating the reel 4301 with the reel drive motor 4341, the multiple types of symbols visible through the symbol display window 4401 are changed, for example, circulating from top to bottom (changing display). On the other hand, when the reel 4301 is stopped, a predetermined number of consecutive symbols (for example, three) for each reel 4301a, 4301b, 4301c, that is, a total of nine symbols of 3 x 3, can be seen through the symbol display window 4401. In other words, the active display portions of the reels 4301a, 4301b, 4301c that derive and display the stopped results of the game can be seen through the symbol display window 4401.

Predetermined activation possible lines are set for the 3x3 pattern matrix visible through the pattern display window 4401. In this embodiment, the activation possible lines are a line that crosses the patterns in the middle row of each reel 4301a, 4301b, 4301c (middle row line), a line that crosses each reel 4301a, 4301b, 4301c diagonally from the bottom row of the left reel 4301a to the middle row of the middle reel 4301b to the top row of the right reel 4301c (upward right line), and a line that crosses each reel 4301a, 4301b, 4301c diagonally from the top row of the left reel 4301a to the middle row of the middle reel 4301b to the bottom row of the right reel 4301c (downward right line). The player inserts a medal or inputs a credit (hereafter referred to as a "betting operation") to activate an active line, and the formation or non-formation of a winning combination (handling) is determined based on the pattern combination (outcome) formed on this active line.

When a win is achieved, three predetermined symbols may line up on an active line, or three predetermined symbols may line up on other lines. Such lines include lines (upper lines) that cross the symbols on the upper row of each reel 4301a, 4301b, 4301c. Note that the symbols may be lined up on imaginary lines that cross the front part (visible part) of each reel 4301a, 4301b, 4301c that faces the symbol display window 4401 other than the above. Hereinafter, the activation possible lines (middle, right-upward, right-downward lines), the lines on which symbols can be aligned when a win is achieved (upper lines), and other lines (lower lines, etc.) are collectively referred to as symbol stop lines (symbol alignment lines).

The top, middle, bottom, upward-right and downward-right lines are considered as possible activation lines, and a certain number of possible activation lines are activated according to the bet amount, and the establishment or non-establishment of a winning combination (handling) is determined based on the pattern combination pattern formed on this effective line. For example, for a bet amount of 1, the middle line is considered as the effective line, for a bet amount of 2, the middle line as well as the upper and lower lines are considered as effective lines, and for a bet amount of 3, the upper, middle and lower lines as well as the upward-right and downward-right lines are considered as effective lines. Also, all lines may be considered as effective regardless of the bet amount (even if the bet amount is 1 or 2), or may be considered as the only lines for betting 3 coins.

A payout number display LED 4562 that displays the number of medals paid out by the game is provided around (for example, below) the symbol display window 4401. A credit display that displays the number of medals stored in the slot machine 4000 and a count display that displays the number of games remaining during the special prize period may also be provided.

Below the symbol display window 4401, a step is formed that protrudes forward, and the upper surface of this step forms the operation section 4202 that slopes downward toward the front side. The operation section 4202 is provided with a medal insertion slot 4203, a one-coin insertion button 4205 as a progression operation section for progressing the game, and a max bet button 4206.

The medal insertion slot 4203 is disposed on the right side of the operation unit 4202 when viewed from the front side of the slot machine 4000. A game can be played when a player inserts a medal into this medal insertion slot 4203 and performs a betting operation. An insertion sensor 4207b that detects the passage of a medal inserted from the medal insertion slot 4203 is provided in the path along which the medal passes, and the number of inserted medals is counted based on the detection information from the insertion sensor 4207b.

The insert one coin button 4205 and max bet button 4206 are located on the left side of the operation unit 4202 when viewed from the front side of the slot machine 4000. The insert one coin button 4205 can be pressed once to input one coin from the credits. The max bet button 4206 can be pressed once to input up to the upper limit of the number of credits to bet (e.g., three coins), but if the number of credits is less than the upper limit, the number of credits is input as the number of credits to bet.

Below the operation unit 4202, a payout button 4209, a start lever 4210, a return button 4208, a reel stop button 4211, a key device 4215, etc. are provided. The payout button 4209 is used to give a command to return to the medal tray 4201 medals inserted from the medal insertion slot 4203, medals (bet medals) input as the number of bets using the 1-coin insertion button 4205 or the max bet button 4206, or medals (reserved medals) paid out upon the establishment of a winning prize and stored as credits. In addition, when medals are inserted from the medal insertion slot 4203 after an automatic betting operation based on the establishment of a replay winning prize (replay winning prize), or medals exceeding the predetermined number that can be stored as credits are also returned to the medal tray 4201 via the medal selector 4207.

The start lever 4210 is an operating lever for starting a game at one stage. The key device 4215 is for inserting a key when opening the front member 4200 or when resetting an error (e.g., a hopper error) state of the slot machine 4000. The return button 4208 is used to return medals inserted through the medal insertion slot 4203 and stuck inside the medal selector 4207 to the medal receiving tray 4201.

The reel stop button 4211 is composed of a left reel stop button 4211a, a middle reel stop button 4211b, and a right reel stop button 4211c, which are provided in one-to-one correspondence with the left reel 4301a, the middle reel 4301b, and the right reel 4301c, respectively, and is used to stop the rotation of the corresponding reels 4301a, 4301b, and 4301c in response to a stop operation.

In addition, below the area where these operation buttons are provided, a decorative plate (decorative panel) that constitutes the lower area of the front member 4200 is provided. Furthermore, below the decorative plate, at the bottom of the front member 4200, there are provided a medal tray 4201 for storing medals, a medal payout outlet, a speaker 4512 for outputting sound, and the like.

At the top of the inside of the cabinet, a main board (game control device) 4600 (see FIG. 266) that controls the entire slot machine 4000 is arranged. A bonus ratio display 1317 and a display switch 1318 are provided on the main board 4600. The bonus ratio display 1317 is configured, for example, by a four-digit seven-segment LED, similar to the pachinko machine described above. The bonus ratio display 1317 may also be configured by a liquid crystal display device provided on the main board 4600.

The bonus feature ratio display 1317 may not be provided on the main board 4600, but may be used in conjunction with another display provided on the front of the slot machine 4000 (e.g., the payout number display LED 4562 or the image display 4500), and the bonus feature ratio may be displayed on the payout number display LED 4562 or the image display 4500.

When the display switch 1318 is operated, the feature ratio display 1317 displays the feature ratio. It is advisable to indicate (by printing, engraving, sticker, etc.) on the printed circuit board near the display switch 1318 or on the housing 4100 that the switch is for operating the feature ratio display. It is preferable that the display switch 1318 is provided near the feature ratio display 1317, but it may be provided on another board (e.g., the performance control board 4700, the power supply unit 4112), the housing 4100, or the front member 4200, not necessarily on the main control unit 1300, as long as it is in a place where it is easy to operate. In addition, as described later, the display switch 1318 may also be used as a RAM clear switch. By providing the display switch 1318 in a position where it cannot be operated by the player, it is possible to prevent the player from operating it by mistake.

Also, a symbol-changing display device 4300 is provided in the approximate center of the inside of the housing, and rotatable reels 4301a, 4301b, and 4301c are mounted on it. Also, an external relay terminal board 4131 is provided inside the housing of the slot machine 4000 for outputting signals from the main board 4600 to an external device.

Furthermore, a medal payout device (hopper) 4110 is disposed at the bottom inside the housing. The medal payout device 4110 receives and stores medals inserted from the medal insertion port 4203 and guided by the medal selector 4207, and when a predetermined pattern combination is formed on the active line and a winning is established, it pays out the number of medals (payout medals) corresponding to this winning or the amount of medals that exceed the credit upper limit due to the addition associated with the winning to the medal receiving tray 4201. The medal payout device 4110 pays out the credit amount to the medal receiving tray 4201 by operating the payout button 4209. In addition, an overflow tank is provided to the right of the medal payout device 4110 to store medals that overflow and flow in from the medal payout device 4110 and to guide the medals that flow in to the medal collection mechanism of the installation island on which the slot machine 4000 is installed.

[15-2. Internal structure of slot machine]
266 is a block diagram showing the configuration of various mechanical elements, electronic devices, operating members, etc. provided in a slot machine 4000. The slot machine 4000 has a main board 4600 for overall control of the progress of the game, and the main board 4600 is equipped with a CPU 4601, a ROM 4602, a RAM 4603, an input/output interface 4604, etc.

As described above, the main board 4600 is provided with a reel ratio display 1317 that displays the reel ratio calculated by the CPU 4601, and a display switch 1318 that switches the display of the reel ratio display 1317. The display switch 1318 may be configured as a push button switch that performs a momentary operation, but may be a switch of another type. When the display switch 1318 is operated, the reel ratio may be displayed on the reel ratio display 1317.

The aforementioned one coin insertion button 4205, max bet button 4206, start lever 4210, reel stop buttons 4211a, 4211b, 4211c, payout button 4209, etc. are all connected to the main board 4600, and these operation buttons are operated by the player using sensors (not shown), which output the detected operation signals to the main board 4600. Specifically, when the start lever 4210 is operated, an operation signal that starts the aforementioned variable pattern display device 4300 (starts the rotation of reels 4301a, 4301b, 4301c) is output to the main board 4600, and when the reel stop buttons 4211a, 4211b, 4211c are operated, an operation signal that stops reels 4301a, 4301b, 4301c is output to the main board 4600.

The slot machine 4000 also houses a main board 4600 and other devices, and various signals are input from these devices to the main board 4600. The devices include a symbol-changing display device 4300 and a medal payout device 4110, etc.

As described above, the variable symbol display device 4300 is equipped with reel drive motors 4341a, 4341b, and 4341c for rotating the reels 4301a, 4301b, and 4301c, respectively (left reel drive motor 4341a, center reel drive motor 4341b, and right reel drive motor 4341c). The reel drive motor 4341 is a stepping motor, and each of the reels 4301a, 4301b, and 4301c can rotate and stop independently, and during rotation, multiple types of symbols are displayed in the symbol display window 4401, changing continuously from top to bottom.

The reels 4301a, 4301b, and 4301c also have position sensors 4331a, 4331b, and 4331c for detecting the reference position of the rotation of each reel 4301a, 4301b, and 4301c, and each reel 4301a, 4301b, and 4301c has a corresponding position sensor 4331a, 4331b, and 4331c provided therein (left reel position sensor 4331a, center reel position sensor 4331b, right reel position sensor 4331c). Detection signals (index signals) from these position sensors are input to the main board 4600, allowing the main board 4600 to obtain information on the stop position of each reel.

The medal selector 4207 contains the solenoid 4207a and insertion sensor 4207b described above. The insertion sensor 4207b detects medals inserted from the medal insertion slot 4203 and outputs a medal detection signal to the main board 4600. When the solenoid 4207a is OFF, the inserted medal is detected by the insertion sensor 4207b. Conversely, when the solenoid 4207a is ON, the passage leading to the insertion sensor 4207b in the medal selector 4207 is locked out, and medal insertion is not accepted. Even if a player inserts a medal, the medal that flows through the medal selector 4207 and into the return gutter returns to the medal tray 4201. At the same time, the function of the insertion sensor 4207b is disabled, so that neither betting by inserting a medal nor storing the medal is performed.

The medal payout device 4110 has a payout sensor 4110e in the discharge port that detects each medal paid out, and a payout medal signal for each medal is input from the payout sensor 4110e to the main board 4600. In addition, the auxiliary storage box for game medals is provided with a medal full sensor 4111a, and when the number of medals stored inside exceeds a predetermined number, a detection signal that the number of medals has exceeded the predetermined number is output to the main board 4600. At this time, an error message is displayed on the image display 4500, error lamp 4554, etc. to notify the player and hall employees that an abnormality has occurred in the medal storage.

On the other hand, the main board 4600 outputs control signals to the symbol variable display device 4300 and the medal payout device 4110. That is, the main board 4600 outputs drive pulse signals for controlling the start and stop of each of the reel drive motors 4341a, 4341b, 4341c described above. In addition, the medal payout device 4110 receives drive signals from the main board 4600 according to the type of combination of symbols stopped on the active line, and in response to this, the medal payout device 4110 performs a medal payout operation. At this time, if the medal payout device 4110 does not have enough medals required for payout or if there are no medals at all in the medal payout device 4110, the payout sensor 4110e will not be able to detect the number of medals. After a predetermined time (e.g., 3 seconds) has elapsed, the payout sensor 4110e outputs an abnormality signal for the payout medals to the main board 4600, and in response, the main board 4600 displays information on the error lamp 4554 or image display 4500, etc., informing the player or hall staff that an abnormality has occurred in the payout of medals.

The slot machine 4000 is equipped with a main board 4600 and a performance control board 4700, which is equipped with a CPU 4701, a ROM 4702, a RAM 4703, an input/output interface 4707, a VDP (Video Display Processor) 4704, an AMP (audio amplifier) 4705, a sound source IC 4706, etc. The performance control board 4700 receives various command signals from the main board 4600 and controls the display of the image display 4500, the light emission (or lighting, blinking, extinguishing, etc.) of the lighting device 4502, etc., and the operation of the speaker 4512.

In addition, an external relay terminal board 4131 is provided, and the slot machine 4000 is connected to the hall computer 4800 of the gaming center via the external relay terminal board 4131. The external relay terminal board 4131 serves to relay various signals (inserted medal signal, paid out medal signal, game status, etc.) transmitted from the main board 4600 to the hall computer 4800.

The power supply device 4112 creates multiple types of DC power from the 24 volt AC (24V) power supplied from the island equipment. For example, three types of power are created: DC +5V (hereinafter, "+5V"), DC +12V (hereinafter, "+12V"), and DC +24V (hereinafter, "+24V"). The three types of power, +5V, +12V, and +24V, created by the power supply device 4112 are supplied to each component included in the slot machine 4000, and for example, the two types of power, +5V and +12V, are supplied to the variable pattern display device 4300 equipped with the reel 4301 and the reel drive motor 4341.

The power supply unit 4112 is also equipped with a setting change key switch 4112t, a reset switch 4112u, a power switch 4112v, and the like. None of these switches are exposed on the outside of the slot machine 4000, and can only be operated by opening the front member 4200. The power switch 4112v is used to turn the power supply to the slot machine 4000 on and off, and the setting change key switch 4112t is used to change the settings of the slot machine 4000 (for example, settings 1 to 6). The reset switch 4112u is used to cancel errors that occur in the slot machine 4000, and is also operated together with the setting change key switch 4112t when changing settings.

The main board 4600 is also provided with a reel drive motor voltage switching circuit 4605. When driving the output shaft of the reel drive motor 4341 to rotate and obtain a drive torque for rotating the reel 4301, the CPU 4601 sets the logic of the voltage switching signal (e.g., HI) and outputs it to the reel drive motor voltage switching circuit 4605, thereby controlling the supply of +12V as the motor drive voltage to the reel drive motor 4341. On the other hand, when obtaining a stationary torque for maintaining the output shaft of the reel drive motor 4341 in a stopped state, the CPU 4601 sets the logic of the voltage switching signal (e.g., LOW) and outputs it to the reel drive motor voltage switching circuit 4605, thereby controlling the supply of +5V as the motor drive voltage to the reel drive motor 4341.

The above is an example of the configuration of the slot machine 4000. In a game using the slot machine 4000, when the player operates the start lever 4210 after deciding the number of medals to be bet on, each of the reels 4301a, 4301b, and 4301c spins, and then when the player operates the reel stop button 4211a, 4211b, or 4211c, the corresponding reel 4301a, 4301b, or 4301c is controlled to stop, and when all of the reels 4301a, 4301b, and 4301c have stopped, the game result is determined from the combination of symbols on the pay line, and a specified number of medals corresponding to the applicable winning combination is awarded as necessary.

As described above, each of the reels 4301a, 4301b, and 4301c has a reel band with a pattern drawn on it. When all the reels 4301a, 4301b, and 4301c are stopped, it is determined whether or not a pattern combination (pattern combination) corresponding to a predetermined winning combination is displayed from the display content (pattern combination displayed on the winning line) displayed in the pattern display window 4401. Specifically, it is determined whether or not a pattern combination corresponding to a predetermined winning combination is displayed on the aforementioned winning line in the pattern display window 4401. It is determined whether or not a pattern combination corresponding to a winning combination is displayed on each of the multiple winning lines. As a result, if it is determined that a pattern combination of multiple winning combinations is displayed, the amount of medals that is the sum of the payout amounts corresponding to each displayed winning combination is paid out.

[15-3. Storage area configuration]
Next, the memory area provided by the ROM 4602 and RAM 4603 provided on the main board 4600 will be described. The memory area of the pachinko machine has been outlined in Fig. 24, but is configured in the same manner as in the slot machine 4000 shown in Figs. 267 to 270. Fig. 267 is a diagram showing the access area in game control of the slot machine 4000 in this embodiment, and details of the ROM area 4910 which is the memory area corresponding to the ROM 4602.

The memory area in this embodiment is provided by media such as ROM 4602 and RAM 4603, and is provided as a single access area with addresses from "0000H" to "FFFFH". The access area in this embodiment is divided into predetermined areas corresponding to the media providing the access area, and includes a ROM area 4910, a RAM area 4920, an I/O area 4930, and a parameter information setting area 4940. Note that each area does not necessarily need to correspond to the media providing the access area, and a single area may be provided by multiple media, or a single medium may provide multiple areas.

The access area of this embodiment is configured as described above, so that the CPU 4601 can specify an address to access programs and data without being aware of the medium that actually provides the access area. The details of the access area are described below.

[15-3-1. ROM area]
First, the configuration of the ROM area 4910 will be described. The ROM area 4910 corresponds to a storage area provided by the ROM 4602. The ROM 4602 is a non-volatile memory that retains the stored contents even when the power of the pachinko machine 1 is cut off. The ROM 4602 is a volatile storage medium, and the stored data can be read, but cannot be updated or deleted. The data stored in the ROM area 4910 may be updatable.

The ROM area 4910 is assigned addresses from "0000H" to "1FFFH". The CPU 4601 can access data stored in the ROM 4602 by specifying addresses from "0000H" to "1FFFH".

The ROM area 4910 includes a first control area, a first isolation area, a first data area, a second control area, a second isolation area, a second data area, a third control area, a third isolation area, and a fourth isolation area. A start address and an end address are set for each area.

The first control area is a game control area in which programs for game control and the like are stored. The first data area is a game data area in which data necessary for game control is stored. In other words, the program stored in the first control area is executed, and game control is performed while referring to the data stored in the first data area. The areas used for game control (first control area, first data area) are referred to as game control areas (first memory area).

The second control area stores programs for debugging (functionality testing) the control program, etc. The second data area is an area for storing data for debugging (functionality testing). The second data area is not necessarily required, and debugging data may be stored in the second control area. The area (second control area, second data area) in which programs and data for debugging (functionality testing) the game control program that are not used for game control are stored is referred to as the debugging (functionality testing) area (second storage area).

The third control area stores a program for calculating and displaying the bonus feature ratio. The third control area also stores data for bonus feature ratio calculation. A third data area may be provided for storing data for bonus feature ratio calculation. The area (third control area) in which the program and data for calculating the bonus feature ratio are stored without being used for game control is referred to as a bonus feature ratio calculation area (third storage area). In this way, by designing the bonus feature ratio calculation/display code 13135 separately from the game control code 13131 and storing them in separate areas, the bonus feature ratio calculation/display code 13135 and the game control code 13131 can be inspected separately, reducing the effort required for inspecting the slot machine 4000. The bonus feature ratio calculation/display code 13135 can be used in common with multiple models, regardless of the model.

The first, second, third and fourth isolation areas are areas allocated between the control area and the data area, and are areas to which access is prohibited. In the processing by the CPU 4601, if an isolation area is accessed, a reset process is forcibly executed. The first, second, third and fourth isolation areas are areas that are continuous with the areas before and after. For example, the start address of the first isolation area is the address next to the end address of the first control area ("0A00H"), and the end address of the first isolation area is the address immediately before the first data area ("0AFFH"). The third isolation area is also arranged between the game control area and the debug (function inspection) area, and although it is treated as the game control area in FIG. 30, it may be treated as the debug (function inspection) area. Similarly, the fourth isolation area is arranged between the debug (function inspection) area and the role ratio calculation area, and although it is treated as the debug (function inspection) area in FIG. 267, it may be treated as the role ratio calculation area.

[15-3-2. RAM area]
Next, the configuration of the RAM area 4920 will be described. Fig. 268 is a diagram showing details of the RAM area 4920 in this embodiment. The RAM area 4920 corresponds to a storage area provided by the RAM 4603. The RAM 4603 is a pachinko The RAM area 4920 is a volatile storage medium whose contents are erased when the power supply to the machine 1 is turned off, and the stored data can be read and written. The RAM 4603 temporarily stores the above-mentioned data, and stores data derived by executing the program. The RAM 4603 may be a non-volatile storage medium as long as data can be read and written. The backup power supply makes it possible for data stored in the RAM 4603 to be retained for a predetermined period of time.

RAM area 4920 is assigned addresses from "3000H" to "31FFH". The CPU 4601 can access data stored in RAM 4603 by specifying addresses from "3000H" to "31FFH".

RAM area 4920 includes a work area for game control, a work area for debugging (test function), a save area, and an isolation area. A start address and an end address are set for each area.

The game control work area is a work area (temporary area) used when executing game control (first control). The debug (inspection function) work area is a work area used when executing debug control (second control) of the program. The role ratio calculation work area is an area that stores data for calculating role ratios and calculated role ratios (role ratio, continuous role ratio, advantageous zone role ratio, etc.). It is not necessary to secure a dedicated work area for the debug (inspection function) work area or the role ratio calculation work area, and the game control work area may be used, or the debug (inspection function) work area or the role ratio calculation work area may be assigned to the game control work area. In this case, the independence of the game control area, the debug (inspection function) control area, and the role ratio calculation work area is reduced. However, if the program is configured so that the debug (inspection function) work area or the role ratio calculation work area is not used, the debug (inspection function) work area or the role ratio calculation work area is not necessarily used.

The save area is an area that temporarily stores data used in game control, debug (inspection function) control, or bonus ratio calculation. For example, when an interrupt occurs and a specified process is executed, the values of the CPU's various registers (arithmetic registers, flag registers, stack pointer, etc.) are copied to the save area before the specified process is executed, and the copied values are returned to the CPU's various registers after the process is completed. The save area may be used in common for game control, debug (inspection function), and bonus ratio calculation, but like the work area, it may also be divided into game control, debug (inspection function), and bonus ratio calculation. This allows for greater independence between game control, debug (inspection function) control, and bonus ratio calculation.

The isolated areas are allocated between the game control work area, the debug (inspection function) work area, and the role ratio calculation work area, and between the debug (inspection function) work area, the evacuation area, and the role ratio calculation evacuation area, and are areas that are continuous with each area (the area before and after). For example, the start address of the isolated area between the game control work area and the debug (inspection function) work area is the address next to the end address of the game control work area ("3076H"), and the end address is the address just before the debug (inspection function) work area ("307FH"). In addition, the isolated areas are areas that are prohibited from being accessed, and are configured to forcibly execute a reset process if accessed during processing by the CPU 4601.

Figure 268 shows the details of the work area for calculating the ratio of features on the right side. The work area for calculating the ratio of features may be provided with a main area in which the calculation result of the ratio of features is stored, as well as a backup area 1 and a backup area 2 in which copies of the data stored in the main area are stored. There may be one or more backup areas. A check code for detecting errors in the data is added to each area. The check code may be a checksum of the data in each area or a predetermined value. The check code may be set in the initialization process when the slot machine 4000 is turned on, or may be set each time the data in the main area is updated in the ratio of features calculation/display process, or may be set in the initialization process (step S1020 in Figure 271). In particular, if the check code is a fixed value, the check code may be initialized when the initialization process determines that the data is normal or erases the data, and the fixed value may be set in the initialization process (step S1020 in Figure 271). The check code may also be used as a power failure flag. In other words, if a predetermined value is set in the check code in the main area, it may be determined that the power failure flag is set. Also, if a predetermined value is set in the power interruption flag, it may be determined that the check code in each area is the correct value (i.e., the data in each area is normal).

In the initialization process (step S1020 in FIG. 271), it is determined whether the data in the backup area is normal, and data in the backup area that is determined to be normal may be copied to the main area. Also, in the power-off process that is executed when the power is cut off, values in the main area may be copied to each backup area.

Unused space is provided between the main area and backup area 1, and between backup area 1 and backup area 2. By providing unused space between each area, the addresses of each area can be separated, and each area can be distinguished by the upper digits of the address.

Figure 269 shows the specific structure of the work area for storing each data in the work area for calculating the role ratio.

Figure 269 (A) shows the structure of the work area in the simplest way. In the work area structure shown in Figure 269 (A), the number of feature payouts, the number of consecutive feature payouts, the total number of payouts, the feature ratio, the consecutive feature ratio, the number of advantageous zone plays, the number of non-advantage zone plays, and the advantageous zone ratio are stored. The number of feature payouts is the number of medals paid out while the feature is in operation (e.g., during a regular bonus). The number of consecutive feature balls acquired is the number of medals paid out while consecutive feature functions are in operation (e.g., during a big bonus). The total number of payouts is the total number of medals paid out by the game. The feature ratio can be calculated by dividing the number of feature payouts by the total number of payouts. The consecutive feature ratio can be calculated by dividing the number of consecutive feature payouts by the total number of payouts. The number of games played in advantageous zones is the number of games played in a game state that is advantageous to the player (for example, a game state such as ART (Assist Replay Time) in which the player's medals are less likely to be lost), and the number of games played in non-advantageous zones is the number of games played in a game state other than an advantageous zone. The advantageous zone ratio can be calculated by the number of games played in advantageous zones / (number of games played in advantageous zones + number of games played in non-advantageous zones).

Of the work area structure shown in Figure 269 (A), the number of feature payouts, number of consecutive feature payouts, total payouts, number of advantageous zone plays, and number of non-advantage zone plays correspond to the total cumulative totals in Figure 269 (B) described below, and each is a 3 or 4 byte memory area that can store values up to 16777215 or 4294967295 in decimal. Since this data is not erased unless an abnormality occurs in the data, a large memory area is provided so that data can be stored for a long period of time. Additionally, the feature ratio, consecutive feature ratio, and advantageous zone ratio are 1 byte memory areas that can store values up to 255 in decimal.

The number of reel payouts, number of consecutive reel payouts, total number of payouts, number of plays in the advantageous zone, and number of plays in the non-advantageous zone are updated in the reel ratio calculation area update process (step S1038 in FIG. 271), and the reel ratio, consecutive reel ratio, and advantageous zone ratio are calculated and stored in the reel ratio calculation/display process (step S1119 in FIG. 272).

Figure 269 (B) shows the structure of a work area using a ring buffer. In the structure of the work area shown in Figure 269 (B), the number of replays, the number of winning payouts, the number of feature payouts, the number of consecutive feature payouts, the number of plays, the feature ratio, the consecutive feature ratio, the number of games played in the advantageous zone, the number of games played in the non-advantageous zone, and the advantageous zone ratio are stored. In addition, the storage area for each data is configured by a ring buffer having n storage areas for each predetermined number of games (for example, 15 storage areas for each 400 games), and when the number of games played reaches the predetermined number (400 times), the write pointer for all data moves and the storage area in which the data is updated changes. Then, after the data for the predetermined number of games is stored in the nth storage area, the write pointer moves to the first storage area and the data is stored in the first storage area.

The write pointer and read pointer of the ring buffer are common to all data, and the write pointer of all data moves for every specified number of winning balls. In addition, the read pointer also moves along with the movement of the write pointer. The read pointer points to a memory area one step behind the write pointer. This is because the ratio of winning devices is calculated using data from 400 games.

The cumulative total of each data is the cumulative value of the data stored in the n memory areas of the ring buffer, and the cumulative values of the reel ratio and continuous reel ratio are values calculated from the cumulative values of each data, and when the ring buffer goes through one cycle and is cleared to one memory area of the ring buffer to write new data, the cumulative value is calculated excluding the data in that cleared area. The total cumulative total of each data is the cumulative value of data collected in the past, and the cumulative values of the reel ratio and continuous reel ratio are values calculated from the cumulative values of each data, and even when the ring buffer goes through one cycle and is cleared to one memory area of the ring buffer to write new data, the total cumulative value is calculated including the data in that cleared area.

In the structure of the work area shown in FIG. 269(B), the number of replays, number of winning payouts, number of special feature payouts, number of consecutive special feature payouts, and number of plays in the ring buffer are each 2-byte storage areas, and can store values up to 65535 in decimal. The cumulative total of the number of replays, number of winning payouts, number of special feature payouts, number of consecutive special feature payouts, and number of plays is each 3-byte storage areas, and can store values up to 16777215 in decimal. The cumulative total is, for example, the sum of data for 400 games x n (6000 games when n = 15), so a large storage area is provided. The total cumulative total of the number of replays, number of winning payouts, number of special feature payouts, number of consecutive special feature payouts, and number of plays is each 3 or 4-byte storage areas, and can store values up to 16777215 or 4294967295 in decimal. Since the total cumulative total is not erased unless an abnormality occurs in the data, a larger memory area is provided to allow data to be stored for a long period of time. In addition, the cumulative total and total cumulative total of the feature ratio and consecutive feature ratio each occupy a 1-byte memory area and can store values up to 255 in decimal. The number of plays in the advantageous zone and the number of plays in the non-advantageous zone each occupy a 3-byte memory area and can store values up to 16777215 in decimal. The advantageous zone ratio occupies a 1-byte memory area and can store values up to 255 in decimal.

Note that by increasing the number of games corresponding to the data stored in each memory area that makes up the ring buffer (for example, 600 games), it is possible to store the same cumulative data for 6,000 games even if the number (n) of consecutive memory areas for storing time-series data is reduced to 10. This allows the size of the memory area used as the ring buffer to be reduced.

Of the work area structure shown in Figure 269 (B), the number of feature payouts, number of consecutive feature payouts, feature ratio, consecutive feature ratio, number of advantageous zone plays, number of non-advantage zone plays, and advantageous zone ratio are the same as those explained in Figure 269 (A). The number of replays is the number of games that were replayed. The number of winning payouts is the total number of medals paid out by a game. The number of plays is the number of games that have been played, and when this value reaches a specified number, the write pointer moves.

The number of replays, number of winning payouts, number of feature payouts, number of consecutive feature payouts, total payouts, number of plays in favorable zones, and number of plays in non-favorable zones are updated in the feature ratio calculation area update process (step S1038 in FIG. 271), and the feature ratio, consecutive feature ratio, and favorable zone ratio are calculated and stored in the feature ratio calculation/display process (step S1119 in FIG. 272).

In the data structure shown in FIG. 269(A), if the stored value is determined to be abnormal, the data in the work area for calculating the ratio of features is erased in the initialization process (step S1020 in FIG. 271), but the data is not erased due to other triggers. For this reason, the data in the work area for calculating the ratio of features may be erased every predetermined period (e.g., one day, one week, one month, etc.). Similarly, the total cumulative value in FIG. 269(B) may be erased every predetermined period.

In addition, if the data in the work area for calculating the ratio of features or the calculated ratio of features is an abnormal value (for example, the ratio of features is over 100%, the calculation result of the ratio of features has changed significantly from the previous calculation value, the number of features paid out is greater than the total number of features paid out, etc.), the abnormal value may be erased. Not only the abnormal value but also all data in the work area for calculating the ratio of features may be erased. In addition, if the data in the work area for calculating the ratio of features or the calculated ratio of features is an abnormal value, an abnormality may be notified. In addition, the data in the backup area may be inspected using a check code, and the normal data in the backup area may be copied to the main area, after which the ratio of features is calculated again.

[15-3-3. I/O Area Configuration]
Next, the I/O area 4930 will be described. The I/O area 4930 corresponds to an input/output port, and the CPU 4601 can access each input/output port by accessing the I/O area 4930. The input/output port corresponds to, for example, a port related to input such as a switch, or a port related to output such as a large prize opening solenoid or an LED drive signal. The settings of the input/output port (settings related to use/unuse of input settings, output settings, etc.) are set based on the setting values of the parameter information setting area 4940.

[15-3-4. Parameter information setting area]
Next, the parameter information setting area 4940 will be described. FIG. 270 is a diagram showing the details of the parameter information setting area 4940 of this embodiment. The parameter information setting area 4940 is an area where various settings can be made. For example, as shown in FIG. 270, the various settings include the start/end addresses of each control area and data area. In FIG. 270, the definitions of the start and end addresses of each area of the third control area, the work area for calculating the ratio of the role, and the evacuation area for calculating the ratio of the role are omitted from the illustration, but the start setting of the third control area and the end setting of the third control area are defined in the same way as the start and end settings of the other control areas, the start setting of the work area for calculating the ratio of the role and the end setting of the work area for calculating the ratio of the role are defined in the same way as the start and end settings of the other work areas, and the start setting of the evacuation area for calculating the ratio of the role and the end setting of the evacuation area for calculating the ratio of the role are defined in the same way as the start and end settings of the other evacuation areas. Areas other than the areas set here are unused (unset) areas. As a result, when the CPU 4601 accesses an unused area, a reset signal is forcibly input to the CPU 4601. Although the parameters are set in a continuous area in FIG. 270, the set areas do not have to be continuous. For example, the parameters may be grouped and placed at a predetermined interval.

In addition, in this embodiment, when an area other than the setting area (the first to fourth isolated areas of the ROM 4910, the isolated area of the RAM 4920) is accessed, a reset is forcibly generated. Therefore, it is possible to perform initial startup of the program by intentionally accessing the isolated area to cause a reset. Since processes are executed sequentially in a slot machine, the program can be executed from the startup process by accessing the isolated area after the last game process is completed, and the initial settings can be executed again. This makes it possible to reset the normal value by executing the initial settings again, even if the initial setting function is set to a value different from the setting value due to noise or the like during play. Furthermore, in the initial setting process, the power failure flag is used to determine whether the RAM should be cleared, but it is possible to forcibly clear the RAM by accessing the isolated area without setting the power failure flag. On the other hand, since the pachinko machine described above is played in parallel, if the game itself is initialized, it becomes impossible to continue playing, but in the case of a slot machine, it is necessary to initialize the RAM information that is no longer necessary after the game ends, so the process of initializing the RAM information can be made unnecessary by accessing the isolated area.

The values set in the parameter information setting area 4940 are not set sequentially by user program processing such as the initial settings of the CPU 4601, but by setting the address and setting value of the parameter area in the ROM 4602 separately from the program, the parameter information set in the ROM 4602 is set sequentially in each function setting register of the CPU before the CPU 4601 starts the control program at startup. This allows various parameters to be set when the pachinko machine 1 is powered on. The setting values of various parameters are information managed (determined) by the user, and are therefore set in the ROM 4602 in which the game control program is stored.

[15-4. Game control]
[15-4-1. System reset startup process]
Next, the control of the slot machine of this embodiment will be described. Fig. 271 is a flow chart for explaining the procedure of the system reset start-up process executed when the slot machine 4000 is reset. The system reset start-up process is executed when the slot machine 4000 is powered on or when a power outage occurs, and is started when a reset signal is input to the CPU 4601.

When the system reset start process is started, the CPU 4601 first executes a parameter setting process to set various parameters necessary for executing the game (step S1010). Specifically, the CPU 4601 sets the setting values stored in the parameter information setting area 4940 included in the memory area to each function setting register of the CPU 4601, and sets the address of each area allocated to the access area as a setting value. By setting the address of each area as a setting value, for example, a work area or a save area is allocated as a used area in the RAM area 4920, and an area not allocated as a used area (isolated area in FIG. 268) is allocated as an unused area. In addition, the work area and the save area are each divided into game control and debug (inspection function) (or other use). In addition, in the ROM area 4910, an area for storing programs and data is allocated as a used area, similar to the RAM area 4920, and an area not allocated as a used area is allocated as an unused area.

Next, the CPU 4601 executes a security check process (step S1012). The security check process is a process for determining whether the data stored in the ROM 4602 is normal or not. If the data stored in the ROM 4602 is not normal, for example, there is a risk that the ROM 4602 has been replaced with an unauthorized ROM, and therefore the startup of the slot machine 4000 is halted. Furthermore, the CPU 4601 waits until the time required for the security check has elapsed (step S1014).

The processing from when the slot machine is powered on until the security check is completed (the processing up to step S1014) is not processing defined by a user program, but is processing configured by hardware within the CPU that cannot be changed by the developer.

Next, the CPU 4601 executes a device initialization setting process to perform initialization (step S1016). In the device initialization setting process, processing such as setting the start of periodic processing (Fig. 272, timer interrupt processing) that periodically executes a predetermined process is executed. In this embodiment, the parameter setting process executes functions such as setting the random number function and other functions that prevent settings related to game lotteries from being rewritten by a user program after a security check, and the device initialization setting process executes functions other than these. In this way, by dividing the initialization of the CPU 4601 into a parameter setting process and a device initialization setting process, the degree of freedom of game control is increased and cheating in games is made more difficult.

The CPU 4601 further determines whether to initialize the RAM 4603 (step S1018). In the process of step S1018, it determines whether to perform a cold start to initialize the RAM 4603, or a hot start to return to play using the backed-up contents of the RAM 4603.

When performing a cold start to initialize the RAM 4603 (the result of step S1018 is "Yes"), the CPU 4601 executes an initialization process to initialize the RAM 4603 (step S1020). A cold start is performed when a setting change operation is performed on the pachinko machine 1, an abnormality occurs in the contents of the RAM 4603, the power failure flag is not set, etc.

On the other hand, when the CPU 4601 performs a hot start to return to play based on the contents of the RAM 4603 (the result of step S1018 is "No"), it executes a process to return to play based on the backed up contents of the RAM 4603 (step S1022). At this time, the return process returns to the process that was interrupted when the power was interrupted. Specifically, the process returns to the process that was interrupted when the power was interrupted by either the process from step S1024 to step S1042 of the system reset start process described below or the process from step S1110 to step S1130 of the periodic process (FIG. 272).

In the slot machine 4000 of this embodiment, the checksum is calculated based on the information stored in the RAM 4603 when a power outage occurs and when the recovery process is executed. At this time, the checksum may be calculated only in the game control work area, excluding the debug (inspection function) work area, among all areas used as work (game control work area and debug (inspection function) work area). The reason for calculating the checksum only in the game control work area is that the debug (inspection function) process is designed to maintain its independence from the game control process and is a process that does not affect the results of the game, so it is possible that some bugs may remain due to insufficient verification. In this case, using the debug (inspection function) work area, which holds the information obtained by executing such a process, as the target for calculating the checksum may undermine the reliability of normal recovery from a power outage. On the other hand, since the game control process is directly related to the game, if it is installed in a product with bugs remaining, it will cause major problems in the market. In some cases, sales may be halted and the product may need to be recalled, which would be extremely likely to cause significant financial and other damage to the manufacturer and the hall, so thorough verification is carried out, and the game control work area is therefore more reliable than the debugging (inspection function) work area.

When the initialization process is completed or when the series of games is completed, the CPU 4601 executes a game initial setting process in order to start a new game (step S1024). In the game initial setting process, the CPU 4601 executes a process to temporarily return information in the RAM 4603 that is no longer necessary for performing a series of game controls to the initial setting state.

When the game initial setting process is completed, the CPU 4601 executes information signal 1 output process for outputting a debug (inspection function) signal at the start of the game (step S1026). In the information signal 1 output process, the debug (inspection function) signal is set to the initial state, and other processes are performed. The information signal output process defines information signal 1 to N output processes, and the necessary modules are called at the timing of outputting the information signal. For example, when a debug (inspection function) signal (information on the start of reel rotation, the ON of the start lever, and winning combination) is output during the game start process, when a debug (inspection function) signal (stop operation signal, stopped combination information, etc.) regarding the stop of each reel is output during the pattern stop process, and when a debug (inspection function) signal (determined combination displayed on each reel, payout number information associated with the determined combination, information on the output signal regarding the payout number at the time of payout (number of medals paid out), etc.) regarding the determined combination is output during the winning determination process, the "information signal N output process" module required for the process is appropriately called and executed.

Then, the CPU 4601 executes a standby process (step S1028) to carry out processing prior to the player operating the start lever 4210. In the stage prior to operating the start lever 4210, for example, it is determined whether or not a command to execute a replay has been given, whether or not a medal has been inserted, whether or not a medal has been settled, and further, the setting values of the game are confirmed, etc.

When the start lever 4210 is operated, the CPU 4601 executes a game start process to start the game (step S1030). In the game start process, a random number value for a game lottery is obtained, a winning combination is determined, and the reel 4301 starts to rotate. After that, the CPU 4601 executes a wait process to wait until the reel 4301 reaches a normal rotation speed (step S1032).

When the reels 4301 reach a normal rotation speed, the CPU 4601 enables input from the reel stop button 4211 and executes a pattern stop process that continues processing until all reels 4301 have stopped (step S1034).

Furthermore, when all reels 4301 have stopped, the CPU 4601 executes a winning combination determination process to determine a winning combination based on the stopped symbols (step S1036). In the winning combination determination process, a winning combination is determined, and if a winning combination is determined, settings corresponding to the winning combination are made, and settings are made to execute a payout process corresponding to the winning combination.

Then, the CPU 4601 determines the current game state, adds the number of prize medals to be paid out as the game value to an area corresponding to the current game state, and updates the work area for calculating the ratio of the game elements in the RAM area 4920 (see Figures 268 and 269) (step S1038). The processing of step S1038 can be skipped if there are no prize medals to be paid out in step S1036, thereby reducing the load on the CPU 4601.

Even if the slot machine 4000 detects fraud and stops playing, it still executes the reel ratio calculation area update process (step S1038). By executing these processes, regardless of whether fraud has been detected or not, data for reel ratio calculation can be collected even during a fraud alert.

Finally, the CPU 4601 executes a game end process that performs processing at the end of the game (step S1042). In the game end process, a payout process corresponding to the winning combination is executed, and if no winning combination is won or if a winning combination without a payout is won, this process is skipped. When the game end process is completed, the process returns to the game initial setting process, and the main loop process from step S1024 to step S1038 is executed.

[15-4-2. Periodic processing]
Next, a description will be given of periodic processing, which is an interrupt processing started at a predetermined cycle while the main loop processing of the system reset initial startup processing is being executed. Fig. 272 is a flow chart showing the procedure of the periodic processing.

When periodic processing is executed, the CPU 4601 first saves the values stored in all registers (step S1110). At this time, the saved data is stored in the game control save area shown in FIG. 268. As mentioned above, periodic processing is an interrupt process that is started while the main loop processing is being executed, so it is necessary to save the CPU registers used in the main loop processing so that processing can be continued after returning.

Then, the CPU 4601 resets the watchdog timer built into the CPU (step S1112). This allows the watchdog timer to be periodically cleared.

Next, the CPU 4601 executes a switch input process to sample input signals from various switches (step S1114). Furthermore, the CPU 4601 executes a game status check process (step S1116). In the game status check process, the CPU 4601 performs processes related to the drive control of the drive body (stepping motor) that rotates the reel 4301. Specifically, the CPU 4601 performs pulse output of the stepping motor, detection of the origin position, etc.

Next, the CPU 4601 executes a timer measurement process to update various timers used in game control (step S1118). Since the periodic process is executed periodically, the set time is the execution interval of the periodic process multiplied by the set number of times.

Then, the CPU 4601 determines whether the display switch 1318 has been operated, and if so, calls up the feature ratio calculation and display process, and calculates the feature ratio by referring to the number of medals paid out stored in the feature ratio calculation work area. The calculated feature ratio is then displayed on the feature ratio display 1317 (step S1119). The feature ratio calculation and display process is the same as the feature ratio calculation and display process (FIGS. 24 and 25) described in the embodiment of the pachinko machine 1. The specific method of calculating the feature ratio and the specific method of displaying the feature ratio are the same as those described in the embodiment of the pachinko machine 1. In this way, the feature ratio calculation and display process is called up in the timer interrupt process to calculate the feature ratio, and the feature ratio (the gambling nature of the slot machine 4000) based on the most recent data can be confirmed.

When the display switch 1318 is operated, all types of values (function ratio, consecutive function ratio, cumulative total, total cumulative total) may be calculated, but only the displayed value may be calculated each time the display switch 1318 is operated. Also, the function ratio may be calculated regardless of whether the display switch 1318 is operated, and the calculated function ratio may be displayed on the function ratio display 1317 in response to the operation of the display switch 1318.

Then, the CPU 4601 executes an LED output process to control the LEDs (step S1120). The LEDs to be controlled are those controlled by the main board 4600, for example the payout number display LED 4562. The CPU 4601 also outputs data to display the ratio of the reels on the LEDs.

The CPU 4601 executes an information output process to output a signal to the external relay terminal board 4131 (step S1122). The output signal is transmitted to the hall computer 4800 via the external relay terminal board 4131. Furthermore, the CPU 4601 outputs the command stored in the command buffer to the performance control board 4700 (step S1124).

The CPU 4601 executes a random number update process to update the random numbers used in the game (step S1126). In the random number update process, updates are performed for random numbers to be generated by software processing. Here, in addition to random numbers generated by software alone, an update process is performed for software random numbers built into the CPU. For software random numbers built into the CPU, the counting itself is performed by hardware, but the trigger for the update is determined by this process. By configuring in this way, it is possible to reduce the program processing related to random number updates.

When the random number update process is completed, the CPU 4601 performs processing to return to the interrupted process (main loop processing). Specifically, the register values saved in the process of step S1110 are restored (step S1128). Furthermore, the execution of the interrupt is permitted (step S1130). Even if a new timer interrupt occurs during execution of periodic processing (timer interrupt processing), the new timer interrupt is pending and is executed after the previously executed timer interrupt process has normally ended and the interrupt is permitted. For this reason, the system is configured to prevent multiple executions of periodic processing (timer interrupt processing).

[15-4-3. Information signal output processing]
Next, the information signal output process executed in the system reset start process and the like will be described. The information signal output process is provided for each function (1 to N) of the output signal, and is composed of multiple modules. For example, there are "condition device output signal (signal output related to condition device operation)" and "lottery judgment process (signal output related to lottery)". Although the signals to be output are different, the configuration of each information output process is basically the same, so the description of each flow will be omitted. Figure 273 is a flowchart showing the procedure of the information signal output process of this embodiment.

When the information signal output process is started, the CPU 4601 first saves the values of all of the CPU's registers (step S1210). This is to prevent the values set in the registers from being destroyed by executing the information signal output process (to ensure that the values are restored even if destroyed), and all register values are saved to a stack area. The stack area used at this time is assigned to a save area for debugging (test function), and is assigned to a different area that is separated from the save area for game control.

Next, the CPU 4601 obtains from the RAM 4603 information to be referenced in order to select (ON/OFF) the information signal (debug (inspection function) signal) to be output (step S1212). In each information signal output process, the information stored in the RAM 4603 is only referenced, and no data is written to the RAM 4603 during that process. If writing is required, a work area dedicated to information output is provided in the debug (inspection function) work area, and that work area is configured not to be used (including reference) in any process other than the information signal output process. This makes it possible to ensure independence from other game control programs without using a common area, even if the program that executes the information signal output process is located in a different location from other game control programs.

Next, the CPU 4601 generates an information signal to be output based on the information acquired in the processing of step S1212 (step S1214), and outputs the generated signal to the corresponding port (step S1216). Furthermore, it waits until the information signal output time, which is the time for maintaining the output signal, has elapsed (step S1218). The information signal output time is predetermined, and by setting a sufficient time, it is possible to reliably transmit a debug (test function) signal to the destination. Thereafter, it restores the values of all registers that were saved in the processing of step S1210 (step S1220), and ends this processing.

As described above, the information signal (debug (inspection function) signal) is generated and output by the process from step S1210 to step S1220. Then, the process from step S1210 to step S1220 is executed for the number of debug (inspection function) signals to be output. Different types and numbers of signals are output for each output signal function (1 to N). Note that, in this embodiment, multiple types of information signal output processing are defined for each function, but the information signal output processing may be standardized by preparing a table that defines the output signals corresponding to the functions in the second data area of the debug (inspection function) area and configuring it to select and output a signal corresponding to the function specified by the caller.

As described above, in this embodiment, by providing an area (debug (inspection function) area) for storing a program (signal output program) that executes information signal output processing, etc., in an area clearly distinguished from an area (game control area) for storing a game control program, it is possible to independently place a program for the purpose of debugging (inspection function) of the pachinko machine 1. The signal output program is used for the purpose of debugging (inspection function) of the pachinko machine 1, and is a process that does not affect the outcome of the game and does not harm the fairness of the game. In addition, programs are not placed in the debug (inspection function) area for other purposes (for example, to place a game control program or a general-purpose program to make up for a lack of capacity in the game control area).

The signal output program is executed after being statically called from the game control program, and the address of the call destination is specified. Furthermore, the signal output program is modularized for each function, and when it is called, all registers used in the game control area are protected. Also, as described above, when program processing in the game control area is being executed, access to the debug (inspection function) work area is prohibited, and when program processing in the debug (inspection function) area is being executed, only reference to the game control work area is permitted and writing is prohibited. Furthermore, it is configured to prohibit calling modules (including subroutines) placed in the game control area from the debug (inspection function) area. Programs placed in the debug (inspection function) area, including the signal output program, are always called in subroutine format, and after the subroutine ends, a return command is issued to return to the state immediately after the call. The modules stored in the debug (inspection function) area are configured for each purpose. By configuring in this way, it is configured so that the execution of the game control program is not affected by the execution of the signal output program (program placed in the debug (inspection function) area).

In the embodiment of the slot machine 4000, the timing of erasing the RAM (work area for game control, work area for calculating the ratio of game features) may be the same as steps S18 to S26 in FIG. 21 in the embodiment of the pachinko machine 1. Note that the slot machine 4000 does not have a RAM clear switch, and erases the backup data of the game state when the setting change key switch 4112t is operated.

As described above, according to this embodiment, in addition to the effects described in the pachinko machine example above, it is possible to accurately calculate the ratio of the features of a slot machine in operation, and to confirm the gambling nature of the gaming machine in operation.

The present invention has been described in detail above with reference to the attached drawings, but the present invention is not limited to such specific configurations, and includes various modifications and equivalent configurations within the spirit of the appended claims.

Among the inventions disclosed in this specification, the following are representative aspects of the invention other than those described in the claims:

(0) A gaming machine that provides a gaming value to a player,
A main control device that executes a program that controls the progress of a game;
and a bonus ratio display that displays information about the awarded game value;
The role ratio display device has a display device and a driver circuit that drives the display device,
The main control device includes:
Data to be displayed on the character ratio display is transmitted to the driver circuit via serial communication;
The gaming machine described in each of the preceding paragraphs is characterized in that after power is turned on, the synchronization method, communication rate, whether to use parity, and whether to use stop bits are set for serial communication with the driver circuit.

(1) The gaming machine described in each of the preceding paragraphs is characterized in that the communication between the main control device and the driver circuit is slower than the communication between the main control device and the peripheral control device.

This helps prevent inaccurate display of the ratio of game elements caused by data corruption during communication.

(2) The main control device is
A work RAM is provided for storing data on game progress and data for calculating the ratio of special features even when the power is cut off.
The gaming machine described in each of the preceding paragraphs is characterized in that the settings for the serial communication are executed after the work RAM is cleared.

This prevents the display of incorrect reel ratios due to incorrect RAM data being used.

(3) The main control device is
The data stored in the FIFO buffer is transmitted by serial communication.
The gaming machine described in each of the preceding paragraphs is characterized in that after power is turned on, a data accumulation amount is set which determines the timing for sending data from the FIFO buffer.

This allows data to be sent from the FIFO buffer in any number of bits.

(4) A gaming machine that provides a gaming value to a player,
A main control device that executes a program that controls the progress of a game;
and a bonus ratio display that displays information about the awarded game value;
The role ratio display device has a display device and a driver circuit that drives the display device,
The gaming machine described in each of the preceding paragraphs is characterized in that the main control device, the display device and the driver circuit are arranged so that the length of the signal line connecting the main control device and the driver circuit is longer than the length of the signal line connecting the driver circuit and the display device.

By lengthening the signal line connecting the main control unit and the driver circuit, unauthorized modifications can be easily detected without placing components around the main control unit. Furthermore, by making the signal line connecting the driver circuit and the display device shorter than the signal line connecting the main control unit and the driver circuit, the effects of noise are reduced and the ratio of the features can be displayed more accurately.

(5) The gaming machine described in the preceding paragraphs, in which the main control device and the role ratio display are housed in a single case.

This makes it easier to detect unauthorized tampering without placing other components around the main control device, and also reduces the effects of noise.

(6) The gaming machine described in each of the preceding paragraphs, in which the main control device and the role ratio display are arranged on a single printed circuit board.

This makes it easier to detect unauthorized tampering without placing other components on the printed circuit board around the main control device, and also reduces the effects of noise.

(7) The gaming machine described in each of the preceding paragraphs, in which the feature ratio display is configured by housing the display device and the driver circuit in a single package.

This reduces the effect of noise on the signal lines connecting the driver circuit and the display device. It also shortens the signal lines connecting the driver circuit and the display device.

(8) The gaming machine described in each of the preceding paragraphs has a guard pattern (ground pattern or power supply pattern) provided along the signal line connecting the main control device and the driver circuit.

This reduces the effect of noise on the signal lines connecting the main control unit and the driver circuit.

(9) The gaming machine described in each of the preceding paragraphs, in which the display direction of the feature ratio display is the same as the display direction of the model number on the surface of the main control device.

This makes it easy to check whether the main control unit needs to be replaced and the displayed role ratio without having to assume an awkward position.

(10) The driver circuit has a standby mode in which characters and numbers are not displayed on the display device and power consumption is reduced,
The gaming machine described in each of the preceding paragraphs is characterized in that the main control device sets the driver circuit to a standby state when the feature ratio display is in a closed state where it is not visible when the gaming machine is installed.

This prevents the gaming machine from wasting power when the device ratio display is not required.

(11) A gaming machine that awards a prize ball as a gaming value to a player by a game ball shot toward a game area entering a predetermined winning hole,
A main control device that controls the progress of a game;
and a role ratio display that displays information about the winning ball;
The winning openings include a general winning opening whose shape does not change depending on the game state, and an electric winning opening whose shape opens or expands depending on the game state.
The main control device counts the number of prize balls paid out to the player by dividing the number of first prize balls paid out in response to a win in the general prize opening and the number of second prize balls paid out in response to a win in the electric prize opening;
The gaming machine described in each of the preceding paragraphs, wherein the feature ratio display displays information regarding the ratio between the number of the first prize balls and the number of the second prize balls.

(12) The main control device stores the counted number of winning balls in a memory,
The memory stores a check code for verifying the number of winning balls stored,
The gaming machine described in each of the preceding paragraphs, wherein the main control device erases the number of winning balls stored in the memory if the check code is not normal.

This allows abnormalities in the number of prize balls stored in the memory to be detected, and prevents the display of an incorrect ratio of prize balls (the ratio between the number of first prize balls and the number of second prize balls).

(13) The main control device includes:
The memory has a first backup area and a second backup area in which stored contents are retained even when the power is cut off,
storing game control data in the first backup area;
The data of the number of winning balls for calculating the ratio of the winning balls is stored in the second backup area.
The gaming machine according to any one of the preceding paragraphs, wherein the data stored in the first backup area and the data stored in the second backup area are erased under different conditions.

This means that if at least one of the data for game control and the data on the number of winning balls used to calculate the ratio of winning devices is normal, only the abnormal data is erased and the normal data remains.

(14) The main control device includes:
The memory has a first backup area and a second backup area in which stored contents are retained even when the power is cut off,
storing game control data in the first backup area;
The data of the number of winning balls for calculating the ratio of the winning balls is stored in the second backup area.
A gaming machine as described in any of the preceding paragraphs, in which if a RAM clear switch is operated when the power of the gaming machine is turned on, the data stored in the first backup area is erased, but the data stored in the second backup area is not erased.

If the device ratio calculation and display data 13136 can be erased by operating the RAM clear switch, the device ratio calculated by the gaming machine can be erased at any time. Therefore, by operating the RAM clear switch, the backed up device ratio calculation and display data 13136 is not erased, preventing the device ratio calculation and display data 13136 from being erased by an amusement center attendant and preventing the concealment of a high device ratio. Therefore, gaming machines that have been modified to have a high device ratio can be easily detected, and the concealment of a high device ratio can be prevented.

(15A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The gaming machine according to any one of the preceding paragraphs, wherein the control means updates information relating to the gaming value to be displayed on the display means in response to input/output of a predetermined signal.

(15B) The information regarding the gaming value is a base,
The control means
Controlling the progress of a game by switching between a special game state in which a player can obtain a large amount of game value and a normal game state other than the special game state;
A gaming machine as described in each of the preceding paragraphs, characterized in that the base is calculated by dividing the number of winning balls paid out to the player in the normal gaming state by the number of balls consumed by the player in the normal gaming state (for example, the sum of the number of gaming balls shot into the gaming area, the number of gaming balls ejected from the gaming machine, the number of gaming balls that have passed through the outlet, and the number of winning balls).

(15C) The gaming machine described in each of the preceding paragraphs is characterized in that the control means updates the number of prize balls used to calculate the base for display on the display means when the predetermined signal is received, such as a winning detection signal that detects a winning ball entering a winning slot, a prize ball payout command reception confirmation signal or a prize ball payout completion signal, or when a prize ball payout command that instructs the payout of prize balls is sent.

(15D) The control means
The total number of winning balls used to calculate the base is stored,
In the normal game state, when a signal is received indicating that a game ball has entered a winning hole provided in a game area, a number of winning balls determined corresponding to the winning hole is calculated;
updating the total number of winning balls using the calculated number of winning balls;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by dividing the updated total number of winning balls by the number of balls consumed in the normal gaming state.

(15E) a payout control means for controlling the payout of prize balls to players,
The control means
The total number of winning balls used to calculate the base is stored,
In the normal game state, when it is detected that a game ball has entered a winning hole provided in the game area, a number of winning balls determined corresponding to the winning hole is calculated;
instructing the payout control means to pay out the calculated number of winning balls to the player;
The total number of winning balls is updated using the number of winning balls instructed to the payout control means;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by dividing the updated total number of winning balls by the number of balls consumed in the normal gaming state.

(15F) a payout control means for controlling the payout of prize balls to a player is provided;
The control means
The total number of winning balls used to calculate the base is stored,
In the normal game state, when it is detected that a game ball has entered a winning hole provided in the game area, a number of winning balls determined corresponding to the winning hole is calculated;
instructing the payout control means to pay out the calculated number of winning balls to the player;
receiving a confirmation of receipt of the instruction from the dispensing control means;
updating the total number of prize balls using the number of prize balls corresponding to the instruction for which the receipt confirmation was received;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by dividing the updated total number of winning balls by the number of balls consumed in the normal gaming state.

(15G) a payout control means for controlling the payout of prize balls to a player,
The control means
The total number of winning balls used to calculate the base is stored,
In the normal game state, when it is detected that a game ball has entered a winning hole provided in the game area, a number of winning balls determined corresponding to the winning hole is calculated;
instructing the payout control means to pay out the calculated number of winning balls to the player;
Receive a completion of the payout of the prize balls according to the instruction from the payout control means;
updating the total number of prize balls using the number of prize balls corresponding to the instruction received indicating completion of the payout;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by dividing the updated total number of winning balls by the number of balls consumed in the normal gaming state.

(15H) The gaming machine described in each of the preceding paragraphs is characterized in that the control means includes an information update means for updating information relating to the game value to be displayed on the display means in response to input/output of a predetermined signal, and a processing/display means for processing (statistically processing) the results of the calculation performed when updating the information and displaying the updated information relating to the game value on the display means.

According to inventions 15A to 15H, processing related to the acquisition of gaming media can be executed accurately.

(16A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The gaming machine described in each of the preceding paragraphs is characterized in that the control means updates information regarding the gaming value to be displayed on the display means in relation to the gaming situation satisfying a predetermined condition.

(16B) The information about the gaming value is a base,
The control means
Controlling the progress of a game by switching between a special game state in which a player can obtain a large amount of game value and a normal game state other than the special game state;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated when the number of prize balls paid out to the player in the normal gaming state reaches a predetermined number.

(16C) The control means
The total number of winning balls used to calculate the base is stored,
In the normal game state, when it is detected that a game ball has entered a winning hole provided in the game area, the number of winning balls determined corresponding to the winning hole is calculated and stored in a buffer;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by moving the specified number from the buffer to the total number of winning balls at a specified timing, and dividing the total number of winning balls by the number of balls consumed by the player in the normal gaming state (for example, the number of gaming balls shot into the gaming area, the number of gaming balls ejected from the gaming machine, the number of balls passing through the outlet, and the number of winning balls).

(16D) The predetermined timing is a timing when the number of winning balls in the buffer exceeds the predetermined number,
The gaming machine described in each of the preceding paragraphs is characterized in that, when the number of prize balls in the buffer exceeds the predetermined number, the control means moves the predetermined number from the buffer to the total number of prize balls by subtracting the predetermined number from the buffer and adding the predetermined number to the total number of prize balls.

(16E) The gaming machine described in each of the preceding paragraphs is characterized in that the control means has an information update means for updating information relating to the game value to be displayed on the display means in response to input/output of a predetermined signal, and a processing/display means for processing (statistically processing) the results of the calculation processing performed when updating the information and displaying the updated information relating to the game value on the display means.

The inventions 16A to 16E allow accurate execution of processes that are different from the gameplay while maintaining the gameplay within the constraints of the main control device based on the rules.

(17A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The control means
Counting the number of balls consumed by the player;
A gaming machine as described in any of the preceding paragraphs, characterized in that information regarding the gaming value to be displayed on the display means is updated in relation to the counted number of consumed balls satisfying a predetermined condition.

(17B) The control means
Controlling the progress of a game by switching between a special game state in which a player can obtain a large amount of game value and a normal game state other than the special game state;
The gaming machine described in each of the preceding paragraphs is characterized in that information regarding the gaming value is calculated at the timing when the number of balls consumed in the normal gaming state reaches a predetermined number.

(17C) The gaming machine described in each of the preceding paragraphs is characterized in that the control means counts the number of consumed balls by the sum of the number of gaming balls shot into the gaming area, the number of gaming balls ejected from the gaming machine, or the number of gaming balls that have passed through the outlet and the number of winning balls.

(17D) the information on the gaming value is a base,
The control means
The total number of balls out used to calculate the base is stored,
Calculate the number of balls consumed in the normal game state and store it in a buffer;
The gaming machine described in each of the preceding paragraphs is characterized in that the base is calculated by moving a predetermined number from the buffer to the total number of out balls at a predetermined timing, and dividing the number of prize balls paid out to the player in the normal game state by the total number of out balls.

(17E) The predetermined timing is a timing when the number of balls consumed in the buffer exceeds the predetermined number,
The gaming machine described in each of the preceding paragraphs is characterized in that, when the number of balls consumed in the buffer exceeds the predetermined number, the control means moves the predetermined number from the buffer to the total number of out balls by subtracting the predetermined number from the buffer and adding the predetermined number to the total number of out balls.

(17F) The control means
A special symbol variation display game is executed to derive the special game state when a winning ball is won at the start winning port.
A gaming machine as described in each of the preceding paragraphs, characterized in that when the reserved memory of the special pattern change display game is at its upper limit value, the winning of the start winning hole is not stored, and the number of winning balls is counted.

(17G) The gaming machine described in each of the preceding paragraphs is characterized in that the control means has an information update means for updating information relating to the game value to be displayed on the display means in response to input/output of a predetermined signal, and a processing/display means for processing (statistically processing) the results of the calculation processing performed when updating the information and displaying the updated information relating to the game value on the display means.

The inventions 17A to 17G allow accurate execution of processes that are not related to the gameplay while maintaining the gameplay.

(18A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A main frame to which a game board having a game area in which the game is played is detachably attached;
The gaming machine according to any one of the preceding paragraphs, wherein the display means displays information regarding the gaming value even when the main body frame is in a closed state.

(18B) The main body frame is rotatably attached to an outer frame attached to an island equipment of the game center,
The gaming machine described in each of the preceding paragraphs is characterized in that the display means is provided on the back side of the gaming machine which is visible when the main body frame is opened.

(18C) The control means is attached to the main body frame,
The gaming machine described in each of the preceding paragraphs, wherein the display means is provided within a case of the control means so as to be visible from the back side of the gaming machine.

The inventions 18A to 18C can prevent a decline in pachinko parlor sales.

(19A)
A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The control means
an information updating means for updating information on a game value to be displayed on the display means in association with satisfaction of a predetermined condition in a game;
a game execution means for executing a special symbol variation display game in response to a winning entry into a start winning slot;
The gaming machine described in each of the preceding paragraphs is characterized in that the information regarding the game value is updated even when the predetermined condition is satisfied while the special pattern variation display game is being played by the game execution means.

(19B) The information regarding the gaming value is a base,
The gaming machine described in each of the preceding paragraphs is characterized in that the control means updates the number of prize balls used to calculate the base for display on the display means at any one of the following timings, as the specified condition: detection of a prize at a prize opening, sending a prize ball payout command, receiving confirmation of receipt of the prize ball payout command, and receiving a prize ball payout completion signal.

The inventions 19A and 19B make it possible to provide a gaming machine that provides sufficient protection against fraud even during variable display games.

(20A) A gaming machine that provides a gaming value to a player,
A main control means for executing a program for controlling the progress of a game;
A presentation control means for controlling the presentation of a special symbol variation display game which is triggered by winning at a starting port;
a game value information display means for displaying information regarding the awarded game value,
The performance control means includes:
Controlling a transition to a low power mode in which the power consumption of the gaming machine is reduced from a normal mode;
The gaming machine according to any one of the preceding paragraphs, wherein during the low power mode, the display mode of the gaming value information display means is not changed so as to reduce power consumption.

(20B) A performance display means is provided which displays the performance of the special symbol variation display game and is composed of a liquid crystal display means having a backlight,
The effect display means reduces the brightness of a backlight during the low power mode,
The gaming machine according to any one of the preceding paragraphs, wherein the gaming value information display means is constituted by a light-emitting diode, and the brightness is not reduced even during the low power mode.

(20C) A presentation display means for displaying the presentation of the special symbol variation display game is provided,
the effect display means controls the display mode to the low power mode when a predetermined time has elapsed after the reserved memory of the special symbol variation display game has been consumed,
The gaming machine described in each of the preceding paragraphs is characterized in that the gaming value information display means does not change the display mode to reduce power consumption even after a predetermined time has passed after the reserved memory of the special pattern change display game has been consumed.

The inventions 20A to 20C make it possible to provide a gaming machine with a wide range of energy saving modes.

(21A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The control means
A game state control means is provided for controlling a game state to one of a normal game state and a plurality of advantageous game states which are more advantageous to a player than the normal game state,
A gaming machine as described in any of the preceding paragraphs, characterized in that information regarding the gaming value is calculated and updated by dividing the number of winning balls in the normal gaming state by the number of balls consumed by the player in the normal gaming state.

(21B) The gaming machine described in each of the preceding paragraphs is characterized in that the control means counts the number of balls consumed in the normal gaming state by either the number of gaming balls shot into the gaming area, the number of gaming balls ejected from the gaming machine, or the sum of the number of gaming balls that have passed through the outlet and the number of winning balls.

(21C) The control means
When the special symbol variation display game is a big win, the advantageous game state is derived, and a winning hole through which the player can obtain a large amount of game value is opened.
A gaming machine as described in each of the preceding paragraphs, characterized in that the period from the confirmation of a jackpot in the special pattern change display game to the start of the next special pattern change display game is considered to be the advantageous gaming state, and the number of winning balls and the number of consumed balls during this period are excluded from the calculation of information regarding the gaming value.

(21D) The control means
In the advantageous gaming state, a winning slot through which a player can obtain a large amount of gaming value is opened,
The gaming machine described in each of the preceding paragraphs is characterized in that the number of game balls consumed in the normal gaming state is counted by excluding the number of game balls that have entered the winning slot from the number of game balls that have been shot into the gaming area.

According to inventions 21A to 21D, accurate information can be output outside the gaming machine.

(22A) A gaming machine that awards gaming balls when a predetermined condition is met,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the provided game balls,
In a game area in which the released game balls roll, at least a start port which is a trigger for deriving a special game state that makes it easy to acquire a large number of game balls, and a passage port which is a trigger for deriving an open state from a closed state of the start port are provided;
The control means
It is also possible to control the special game state in which the opening state of the starting hole is easily derived,
A gaming machine as described in any of the preceding paragraphs, characterized in that when controlled in either the special gaming state or the special game state, information regarding the gaming balls is calculated and updated by excluding the number of prize balls awarded to the player and the number of balls consumed by the player, and dividing the number of prize balls awarded to the player by the number of balls consumed by the player.

(22B) The gaming machine described in each of the preceding paragraphs is characterized in that the control means counts the number of balls consumed in the normal state by either the number of gaming balls shot into the gaming area, the number of gaming balls ejected from the gaming machine, or the sum of the number of gaming balls that have passed through the outlet and the number of winning balls.

(22C) The gaming machine described in each of the preceding paragraphs is characterized in that the control means sets the period between the confirmation of a win in the normal pattern change display game and the start of the next normal pattern change display game as the expanded state, and excludes the number of winning balls and the number of consumed balls during this period from the calculation of information related to the gaming balls.

(22D) The gaming machine described in each of the preceding paragraphs is characterized in that the control means counts the number of balls consumed in the normal state by excluding the number of game balls that have entered the starting hole from the number of game balls that have been shot into the game area.

According to inventions 22A to 22D, accurate information can be output outside the gaming machine.

(23A) a launching device that is operable by a player and launches a game ball toward a game area;
a prize ball awarding means for awarding a predetermined number of prize balls when the game ball is detected at a prize winning hole provided in the game area;
a main control means for executing a lottery to determine whether or not to grant a game state advantageous to a player when the game ball is detected in a predetermined one of the winning holes;
A peripheral control means for determining a performance to be displayed based on information transmitted from the main control means,
The main control means has an information updating means capable of updating information regarding the provided game balls to either increase or decrease the information,
There is at least a first state in which the information updating means can update the information about the given game balls to either increase or decrease, and a second state in which the information updating means can update the information about the given game balls to either increase or decrease, but the rate at which the information about the given game balls is updated to an increase is suppressed compared to the first state,
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means determines the appearance of a special effect indicating a transition from the first state to the second state.

(23B) The information regarding the gaming value is a base,
The main control means
Controlling the progress of a game by switching between a special game state in which a player can obtain a large amount of game value and a normal game state other than the special game state;
Calculating the base by dividing the number of winning balls in the normal gaming state by the number of balls consumed by the player in the normal gaming state;
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means determines the appearance of the adversity presentation by setting the timing when the base is likely to drop as the second state.

(23C) The main control means
writing information about the game balls into a memory area at any one of a predetermined time interval, a predetermined number of winning balls, and a predetermined number of consumed balls;
comparing the information about the game ball written in the memory area with the information about the game ball stored in the memory area before the writing to determine an increase or decrease in the information about the game ball;
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means determines whether or not the adverse situation presentation will occur depending on the determined increase or decrease.

The inventions 23A to 23C prevent a decline in interest even if the variable display game is interrupted for a long period of time.

(24A) A gaming machine that provides a gaming value to a player,
A control means for repeatedly executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A prize ball number acquisition means for acquiring the number of prize balls acquired by a player at a predetermined timing;
a consumed ball detection means for detecting consumed balls consumed by a player;
The control means
If the predetermined timing and the detection of consumed balls by the consumed ball number detection means occur within the same repetition, the number of winning balls acquired at the predetermined timing and the detected number of consumed balls are counted within the same repetition;
The gaming machine described in each of the preceding paragraphs is characterized in that information regarding the gaming value is calculated using the counted number of winning balls and the number of consumed balls.

(24B) The information regarding the gaming value is a base,
The control means
Controlling the progress of a game by switching between a special game state in which a player can obtain a large amount of game value and a normal game state other than the special game state;
Counting the total number of winning balls in the normal game state and the number of game balls consumed by the player in the normal game state within the same repetition;
The gaming machine described in each of the preceding paragraphs is characterized in that the information regarding the gaming value is calculated by dividing the total number of winning balls in the normal gaming state by the number of gaming balls consumed by the player in the normal gaming state.

According to inventions 24A and 24B, information on the number of gaming media acquired by a player can be quickly displayed.

(25A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
An outlet detection means for detecting a gaming ball passing through an outlet provided at a lower portion of the gaming area;
A winning ball detection means for detecting a winning ball entering a predetermined winning hole is provided.
The control means
a game state control means for controlling a game state to one of at least a normal game state and a special game state in which a player can obtain more game value than in the normal game state;
Counting the number of game balls that have passed through the outlet from the output of the outlet detection means;
Counting the number of winning balls from the output of the winning ball detection means;
Counting the number of balls consumed by the player by adding the number of game balls that have passed through the outlet and the number of winning balls,
The gaming machine described in each of the preceding paragraphs is characterized in that, at a predetermined timing, information regarding the gaming value is calculated by dividing the number of prize balls paid out to a player in the normal gaming state by the number of balls consumed in the normal gaming state.

(25B) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A detection means for counting the number of game balls shot into the game area,
The control means
a game state control means for controlling a game state to one of at least a normal game state and a special game state in which a player can obtain more game value than in the normal game state;
Counting the number of game balls that have been shot into the game area from the output of the detection means, and counting the game balls that have been consumed by the player;
The gaming machine described in each of the preceding paragraphs is characterized in that, at a predetermined timing, information regarding the gaming value is calculated by dividing the number of prize balls paid out to a player in the normal gaming state by the number of balls consumed in the normal gaming state.

(25C) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A detection means for counting the number of game balls dispensed from the game machine,
The control means
a game state control means for controlling a game state to one of at least a normal game state and a special game state in which a player can obtain more game value than in the normal game state;
Counting the number of game balls discharged from the gaming machine from the output of the detection means, and counting the number of balls consumed by the player;
The gaming machine described in each of the preceding paragraphs is characterized in that, at a predetermined timing, information regarding the gaming value is calculated by dividing the number of prize balls paid out to a player in the normal gaming state by the number of balls consumed in the normal gaming state.

According to inventions 25A to 25C, processing related to the acquisition of gaming media can be executed accurately.

(26A) A gaming machine that provides a gaming value to a player,
A control means for executing a program for controlling the progress of a game;
A display means for displaying information regarding the awarded game value,
The control means
a game state control means for controlling a game state to one of at least a normal game state and a special game state in which a player can obtain more game value than in the normal game state;
a prize ball counting means for counting the number of prize balls excluding the number of prize balls awarded when a game ball shot toward the right side of the game area enters a prize winning hole;
and a ball consumption counting means for counting the number of balls consumed by a player, excluding the number of game balls shot toward the right side of the game area;
The gaming machine described in each of the preceding paragraphs is characterized in that the control means updates information regarding the gaming value using the counted number of winning balls and number of consumed balls.

(26B) The information about the gaming value is a base,
Counting the number of prize balls in the normal game state, excluding the number of prize balls awarded when the game ball shot toward the right side of the game area enters a prize winning hole in which a prize can be won;
Counting the number of balls consumed in the normal game state, excluding the number of game balls shot toward the right side of the game area;
The gaming machine described in each of the preceding paragraphs is characterized in that the control means calculates information regarding the gaming value by dividing the counted number of winning balls in the normal gaming state by the number of balls consumed in the normal gaming state.

(26C) The gaming machine described in each of the preceding paragraphs is characterized in that the control means excludes the number of winning balls and the number of consumed balls from the count for a predetermined period of time after detecting the passage of a gaming ball through a gate section provided to the right of the gaming area or the entry of a winning ball into a winning hole provided to the right of the gaming area.

(26D) The gaming machine described in each of the preceding paragraphs is characterized in that the control means determines the predetermined period based on either the passage of a predetermined amount of time from the last detection, the time it takes for a predetermined number of gaming balls to be consumed, or the time it takes for a predetermined number of prize balls to be paid out.

(26E) The gaming machine described in each of the preceding paragraphs is characterized in that the control means counts the number of winning balls and the number of consumed balls, excluding the number of balls that pass through a gate section provided to the right of the gaming area and the number of winning balls that enter a winning hole provided to the right of the gaming area.

According to inventions 26A to 26E, accurate information can be output outside the gaming machine.

(27A) A gaming machine that provides a gaming value to a player,
A main control means for deriving a game state advantageous to a player based on the result of a lottery in a game;
a first data setting means for setting first data according to a result of a game;
A second data setting means for setting second data independent of the result of a game;
a third data setting means for setting third data according to a result of a game;
a first conversion means for obtaining first conversion data from the first data set by the first data setting means and the second data set by the second data setting means;
a second conversion means for obtaining second conversion data from the first conversion data obtained by the first conversion means and the third data set by the third data setting means;
and a display means for displaying the second conversion data without displaying the first conversion data.

(27B) The gaming machine described in each of the preceding paragraphs is characterized in that the display means does not display the second conversion data if the second conversion data is a numerical value within a predetermined range.

(27C) The gaming machine described in each of the preceding paragraphs is characterized in that the first conversion means is a multiplication means that multiplies the first data and the second data together to obtain first conversion data when a predetermined condition is met.

(27D) The gaming machine described in each of the preceding paragraphs is characterized in that the second conversion means is a division means that, when a predetermined condition is met, divides the first conversion data by the third data to obtain the second conversion data.

(27E) The first data is a game value (e.g., a number of winning balls) given to the player,
The third data is a game value consumed by the player (e.g., the number of out balls),
the second conversion means divides the first conversion data by the third data to obtain second conversion data, and obtains information regarding the awarded game value;
The gaming machine according to any one of the preceding paragraphs, wherein the display displays information (e.g., base) relating to the gaming value obtained by the second conversion means.

According to the inventions of 27A to 27E, information relating to game results can be displayed accurately and quickly. In particular, the base value required for evaluating a gaming machine can be displayed accurately in real time. Furthermore, by using the second conversion means (division means), information relating to game value (e.g., base value) can be displayed accurately in real time while suppressing an increase in the processing load of the control means.

(28A) A gaming machine that provides a gaming value to a player,
A control means for executing periodic processing for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A conversion means for calculating information regarding the gaming value,
The control means
Passing arguments to the conversion means at a predetermined timing, and obtaining a result of conversion by the conversion means based on the arguments from the conversion means;
A gaming machine characterized in that the process of passing the argument and the process of obtaining the result of the conversion can be executed within a single periodic process.

(28B) The conversion means
An arithmetic circuit that performs a division operation,
a divisor register for receiving a divisor, a dividend register for receiving a dividend, and a result register for outputting a quotient of the division operation;
The control means
writing arguments to said divisor register and said dividend register;
After a predetermined time has elapsed since the argument was written, the quotient is read from the result register;
The gaming machine described in each of the preceding paragraphs is characterized in that the process of writing arguments to the divisor register and the dividend register is executed before the specified time from the end of the repeatedly executed program.

(28C) a prize game medium counting means for counting the number of game media awarded to a player in a predetermined game state;
a consumed game media counting means for counting the game media consumed by the player in the predetermined game state,
The control means
writing a value obtained by multiplying the number of prize game media counted by said prize game media counting means by 100 into said dividend register;
writing the number of consumed game media counted by said consumed game media counting means into said divisor register;
The gaming machine described in each of the preceding paragraphs, wherein a base value is read from the result register.

According to the inventions of 28A to 28C, information regarding the results of a game can be displayed accurately and quickly. In particular, the process of passing arguments to the conversion circuit and the process of obtaining the conversion results from the conversion circuit are executed within a single repeated process (timer interrupt process), which makes it possible to suppress the complexity of control.

(29A) A gaming machine that provides a gaming value to a player,
A winning port into which the game ball can enter;
A control means for controlling the progress of a game;
A display means for displaying information regarding the awarded gaming value;
A consumed ball counting means for counting the consumed balls consumed by a player;
and a prize ball counting means for counting the prize balls to be awarded to a player.
At least one of the winning openings is a specific winning opening that can be switched between an open state in which it is easy for a game ball to win and a closed state in which it is difficult for a game ball to win,
The control means
updating information regarding the game value to be displayed on the display means based on the counted number of consumed balls and the number of winning balls;
A gaming machine characterized in that when a winning entry into a specific winning opening is detected even though the specific winning opening is in the closed state, it is determined that a winning abnormality has occurred, and when such a determination is made, the number of winning balls related to the winning abnormality is excluded from the number of balls consumed, and information regarding the game value to be displayed on the display means is updated.

(29B) At least one of the winning holes is a starting winning hole that triggers a special game state that makes it easier to win a large number of game balls;
The gaming machine described in each of the preceding paragraphs is characterized in that when a winning entry into the start winning entry is detected while the start winning entry is in a closed state, the control means determines that a winning abnormality has occurred, excludes the number of winning balls relating to the winning entry from the number of balls consumed, and updates information regarding the game value to be displayed on the display means.

(29C) At least one of the winning openings is a big winning opening that is opened in a special game state,
The gaming machine described in each of the preceding paragraphs is characterized in that when the control means detects a win in the large prize opening while the large prize opening is in a closed state, it determines that a winning abnormality has occurred, excludes the number of winning balls related to the win from the number of balls consumed, and updates information regarding the game value to be displayed on the display means.

(29D) having a consumed ball detection means for detecting consumed balls consumed by a player,
The gaming machine described in each of the preceding paragraphs is characterized in that the consumed ball counting means counts the number of consumed balls consumed by the player by subtracting the number of winning balls related to the winning abnormality from the number of consumed balls detected by the consumed ball number detection means.

(29E) The control means stores a total number of consumed balls used to calculate the information on the game value,
The gaming machine described in each of the preceding paragraphs, characterized in that the consumed ball counting means counts the consumed balls by adding the number of consumed balls detected by the consumed ball number detection means to the total number of consumed balls and subtracting the number of winning balls related to the winning abnormality from the total number of consumed balls.

(29F) The control means stores a total number of consumed balls used to calculate the information on the game value,
The gaming machine described in each of the preceding paragraphs is characterized in that the consumed ball counting means counts the consumed balls by subtracting the number of consumed balls related to the winning abnormality from the number of consumed balls detected by the consumed ball detection means and adding the result to the total number of consumed balls.

(29G) The winning hole can be switched between an open state in which it is easy for the game ball to win and a closed state in which it is difficult for the game ball to win,
The gaming machine described in each of the preceding paragraphs is characterized in that when a winning entry into the winning port is detected in a closed state and no prize balls are paid out in connection with the winning entry, the control means determines that a winning abnormality has occurred, excludes the number of winning balls relating to the winning entry from the number of balls consumed, and updates information regarding the game value to be displayed on the display means.

(29H) The gaming machine described in each of the preceding paragraphs is characterized in that, when an abnormality in the winning of the winning slot is detected multiple times within a predetermined period, the control means excludes the number of winning balls related to the abnormality from the number of balls consumed, and updates information related to the game value to be displayed on the display means.

According to the inventions 29A to 29H, information on the results of the game can be displayed accurately and quickly. In particular, the number of winning balls related to the winning abnormality is excluded from the number of out balls, and information on the game value (for example, the base value) can be displayed accurately in real time.

(30) A gaming machine that awards gaming media to a player as a prize, comprising:
a gaming area in which a plurality of winning slots are arranged;
a prize awarding means for awarding a specific prize, which is determined in advance, from among a plurality of prizes when a gaming medium is detected in each of the prize winning openings;
a calculation processing means for executing a predetermined calculation process using the number of game media flowing into the game area and the number of game media awarded as a prize by the prize awarding means;
a processing means for processing a result of the arithmetic processing executed by the arithmetic processing means;
a display means for displaying the result of the arithmetic processing processed by the processing means on a predetermined display device,
When a specific prize among the plurality of prizes occurs during a game, the prize awarding means awards the specific prize, and the display means displays the result of the arithmetic processing so as not to change.

According to the invention of 30, information on the results of a game can be displayed accurately and quickly. In particular, even if a prize (for example, prize balls paid out in connection with a win at a winning port that awards a high value prize (such as a general winning port or a large winning port that awards a large number of prize balls)) is awarded in conjunction with the occurrence of a specific prize, the results of the calculation process (calculated base value) can be displayed without changing, and it is easy to determine whether the gaming machine is performing as specified (for example, whether the ball payout rate is as set).

(31A) A gaming machine including a main control means including a lottery means for executing a lottery regarding winning or losing when a specific condition is satisfied, and a peripheral control means for controlling a predetermined presentation based on a signal from the main control means,
The peripheral control means includes:
a temporary storage means for storing information based on a signal received from the main control means;
an information storage means that is updated by the information stored in the temporary storage means;
and a first information output means for outputting at least a part of the information stored in the information storage means to an outside when a predetermined condition is satisfied,
A gaming machine characterized in that the status history of the gaming machine can be grasped.

(31B) A general winning hole is provided through which a game ball shot into the game area can win a prize even if the game is not in a special game state,
The signal transmitted from the main control means to the peripheral control means includes a signal indicating a win at the general winning port,
The gaming machine described in each of the preceding paragraphs is characterized in that the first information output means outputs information regarding a win at the general winning port to the outside when a predetermined condition is satisfied.

(31C) an external output means for outputting information based on a predetermined condition to an external terminal board when the predetermined condition is satisfied;
an information storage means for storing more detailed information than the information outputted to the external terminal board when the predetermined condition is satisfied;
4. The gaming machine according to any one of the preceding paragraphs, further comprising: information presentation means for presenting the information stored by the information storage means.

(31D) a first initialization means for initializing a state of the gaming machine;
The peripheral control means includes:
a storage means for storing information based on a signal received from the main control means;
The gaming machine described in each of the preceding paragraphs is characterized in that it has a limited initialization means that does not initialize part of the information stored in the memory means even when initialized by the first initialization means.

(31E) a first initialization means for initializing a state of the gaming machine;
A second initialization means for initializing the stored contents of the information storage means,
The information storage means is capable of retaining the stored contents even when the power supply to the gaming machine is cut off,
The gaming machine according to any one of the preceding paragraphs, wherein the first initialization means does not initialize the stored contents of the information storage means, but initializes the stored contents of the temporary storage means.

(31F) The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means stores the type of signal received from the main control means and the time at which the signal was received in the information storage means.

(31G) the signals transmitted from the main control means to the peripheral control means include a signal relating to a counting event that is counted according to the progress of a game, and a signal relating to a state change event that triggers a change in the state of the gaming machine,
The peripheral control means includes:
a temporary storage means for storing information based on a signal received from the main control means;
an information storage means that is updated by the information stored in the temporary storage means;
a first information output means for outputting at least a part of the information stored in the information storage means to an outside when a predetermined condition is satisfied,
The peripheral control means includes:
counting the count events based on a signal received from the main control means, and storing the count results in the temporary storage means;
A gaming machine as described in any of the preceding paragraphs, characterized in that when a signal regarding the status change event is received from the main control means, the status change event is stored in the information storage means, and the counting result of the counting event stored in the temporary storage means is stored in the information storage means.

(31H) the signals transmitted from the main control means include a signal relating to a counting event counted for managing the gaming machine, and a signal relating to a state change event which is a trigger for a change in the state of the gaming machine,
the information storage means stores a counting result of the counting event for each state of the gaming machine;
The peripheral control means includes:
counting the signals relating to the counting event received from the main control means and storing the counted signals in the temporary storage means;
A gaming machine as described in any of the preceding paragraphs, characterized in that when a signal regarding the status change event is received from the main control means, the type of signal regarding the status change event and the time when the signal was received are stored in the information storage means, and the counting result of the counting event stored in the temporary storage means is added to the counting result of the counting event stored in the information storage means.

(31I) the signals transmitted from the main control means include a signal relating to a counting event counted for managing the gaming machine, and a signal relating to a state change event which triggers a change in the state of the gaming machine;
the information storage means stores a counting result of the counting event for each state of the gaming machine;
The peripheral control means includes:
counting the signals relating to the counting event received from the main control means and storing the counted signals in the temporary storage means;
The gaming machine described in each of the preceding paragraphs is characterized in that when a signal regarding the state change event is received from the main control means, the counting result of the counting event stored in the temporary storage means is added to the counting result of the counting event stored in the information storage means.

The inventions 31A to 31I allow the user to know how the number of balls dispensed has changed. In particular, the inventions 31D and 31E allow the user to properly store information related to the game.

(32) A gaming machine that awards a prize gaming medium as a gaming value to a player,
A control means for executing periodic processing related to the progress of a game;
a consumed game media counting means for counting the consumed game media consumed by a player;
a prize game medium counting means for counting the prize game media awarded to a player;
a calculation means for calculating information regarding an awarded game value using the counted number of consumed game media and the counted number of prize game media;
A first light-emitting element group including a plurality of light-emitting elements for displaying information related to a game including a variation display of a pattern;
a second light-emitting element group including a plurality of light-emitting elements for displaying information regarding the awarded game value;
the first light-emitting element group has a first terminal to which one terminals of the plurality of light-emitting elements are commonly connected, and a plurality of second terminals to which the other terminals of the plurality of light-emitting elements are respectively connected,
the second light-emitting element group has a third terminal to which one terminals of the plurality of light-emitting elements are commonly connected, and a plurality of fourth terminals to which the other terminals of the plurality of light-emitting elements are respectively connected,
a first terminal of the first light-emitting element group and a third terminal of the second light-emitting element group are connected to one output driving means;
The control means outputs a selection signal to the first terminal and the third terminal at a common timing, but during the period in which the selection signal is being output, outputs a signal to the plurality of second terminals to light up at least one light-emitting element in the first group of light-emitting elements and a signal to the plurality of fourth terminals to light up at least one light-emitting element in the second group of light-emitting elements at different timings, thereby controlling the display of the first group of light-emitting elements and the second group of light-emitting elements within a single periodic processing.

According to the invention of 32, the circuit for displaying information about the awarded gaming value (e.g., base value and ratio of features) can be configured simply, and the information about the gaming value can be displayed quickly and accurately.

(33) A gaming machine that awards a prize gaming medium as a gaming value to a player,
A control means for executing periodic processing related to the progress of a game;
a consumed game media counting means for counting the consumed game media consumed by a player;
a prize game medium counting means for counting the prize game media awarded to a player;
a calculation means for calculating information on an awarded game value using the counted number of consumed game media and the counted number of prize game media;
A first light-emitting element group including a plurality of light-emitting elements for displaying information related to a game including a variation display of a symbol;
a second light-emitting element group including a plurality of light-emitting elements for displaying information regarding the awarded game value;
the first light-emitting element group has a first terminal to which one terminals of the plurality of light-emitting elements are commonly connected, and a plurality of second terminals to which the other terminals of the plurality of light-emitting elements are respectively connected,
the second light-emitting element group has a third terminal to which one terminals of the plurality of light-emitting elements are commonly connected, and a plurality of fourth terminals to which the other terminals of the plurality of light-emitting elements are respectively connected,
a selection signal output to the first terminal of the first group of light-emitting elements, a signal output to the plurality of second terminals for lighting at least one light-emitting element of the first group of light-emitting elements in response to the selection signal output to the first terminal, a selection signal output to the third terminal of the second group of light-emitting elements, and a signal output to the plurality of fourth terminals for lighting at least one light-emitting element of the second group of light-emitting elements in response to the selection signal output to the third terminal are output within the same periodic processing, but a process of outputting the selection signal output to the first terminal and the signals output to the plurality of second terminals corresponding to the selection signal, and a process of outputting the selection signal output to the third terminal and the signals output to the plurality of fourth terminals corresponding to the selection signal are output at different times within the same periodic processing.

According to the invention of 33, the circuit for displaying information about the awarded gaming value can be configured simply. This allows the information about the gaming value to be displayed quickly and accurately.

(34A) A gaming machine that awards a prize gaming medium as gaming value to a player,
A control means for controlling the progress of a game;
a consumed game media counting means for counting the consumed game media consumed by a player;
a prize game medium counting means for counting the prize game media awarded to a player;
a calculation means for calculating information regarding an awarded game value using the counted number of consumed game media and the counted number of prize game media;
a calculation result display means for displaying information about the game value calculated by the calculation means,
The control means
A control device that executes processing for game control;
A timing means for generating a signal (e.g., a clock signal or a reset signal) that determines the operation timing of the control device;
an output driving means controlled by the control device and outputting at least a control signal for displaying the calculation result on the calculation result display means;
A gaming machine characterized in that, on a board on which the control device is mounted, the timing means is arranged in one direction as viewed from the control device, and the output driving means and the calculation result display means are arranged in another direction different from the one direction, away from the timing means.

(34B) The gaming machine described in each of the preceding paragraphs is characterized in that the connection lines between the control device and the timing means and the connection lines between the control device and the output drive means are arranged on the board so as not to cross each other.

(34C) The timing means has a reset circuit that generates a reset signal input to the control device, and an oscillation circuit that generates a clock signal input to the control device,
The gaming machine described in each of the preceding paragraphs is characterized in that, on a printed circuit board on which the control means is realized, the reset circuit is arranged in the same direction as the oscillator circuit from the processor, and the driver circuit and the display device are arranged away from the reset circuit and the oscillator circuit.

The inventions 34A to 34C can suppress interference between signals related to game control and signals for displaying information related to the game. This suppresses the effect on game control and allows information related to the game value to be displayed quickly and accurately.

(35A) A gaming machine that awards a prize gaming medium as a gaming value to a player,
A control means for controlling the progress of a game;
a consumed game media counting means for counting the consumed game media consumed by a player;
a prize game medium counting means for counting the prize game media awarded to a player;
a calculation means for calculating information regarding an awarded game value using the counted number of consumed game media and the counted number of prize game media;
a display means controlled by the control means for displaying information regarding the game value;
The control means
A control device that executes processing for game control;
a memory that is accessed by the control device when the process is executed and that stores at least information regarding the game value;
the gaming machine is provided with an input means for instructing initialization of the memory,
The control means
a first initialization means for judging at a predetermined timing whether the data stored in the memory is normal or not, and initializing a predetermined first area of the memory when the data is judged to be abnormal;
a second initialization means for judging whether or not the input means is operated when power is turned on, and initializing a predetermined second area of the memory when it is judged that the input means is operated,
a first area initialized by the first initialization means and a second area initialized by the second initialization means include an overlapping area that is commonly initialized by both the first initialization means and the second initialization means;
At least the first region includes a region that does not overlap with the second region;
A gaming machine characterized in that information regarding the gaming value is stored in the first area other than the overlap area.

(35B) The first area stores data used to calculate the information about the gaming value,
The second area stores data used to control the progress of a game,
The control means
If it is determined that the data stored in the first area is abnormal, initializing the first area;
If it is determined that the data stored in the second area is abnormal, initializing the second area;
The gaming machine described in each of the preceding paragraphs, wherein when it is determined that the input means is being operated, the second area is initialized without initializing the first area.

(35C) the first area stores data used to calculate information about the gaming value,
The second area stores data used to control the progress of a game,
The control means
If it is determined that the data stored in the first area is abnormal, the first area and the second area are initialized;
If it is determined that the data stored in the second area is abnormal, initializing the first area and the second area;
The gaming machine described in each of the preceding paragraphs, wherein when it is determined that the input means is being operated, the second area is initialized without initializing the first area.

(35D) The gaming machine described in each of the preceding paragraphs is characterized in that the control means determines whether the data stored in the first area is abnormal each time a periodic process that is repeatedly executed at a predetermined time interval is executed.

(35E) The gaming machine described in each of the preceding paragraphs is characterized in that the control means determines whether the data stored in the first area is abnormal each time the information related to the gaming value is calculated.

(35F) The gaming machine described in each of the preceding paragraphs is characterized in that the control means determines whether the data stored in the first area is abnormal when the gaming machine is powered on.

According to the inventions 35A to 35F, the memory that stores information about the awarded game value (base value and ratio of features) can be appropriately controlled. This allows the information about the game to be displayed accurately and quickly.

(36A) A gaming machine that awards a prize gaming medium as a gaming value to a player,
A control means for controlling the progress of a game;
a consumed game media counting means for counting the consumed game media consumed by a player;
a prize game medium counting means for counting the prize game media awarded to a player;
a calculation means for calculating information on an awarded game value using the counted number of consumed game media and the counted number of prize game media;
A display means for displaying information regarding the gaming value;
An electric accessory operated by the control means,
A gaming machine characterized in that, under specific conditions, when multiple gaming media are won during the operation of an electric device triggered by a single win, some of the winning gaming media are used to calculate information related to the gaming value, while other gaming media are not used to calculate information related to the gaming value, but any of the winning gaming media can trigger a variable display game.

(36B) The control means
When a predetermined start condition is satisfied, a variable display game is executed.
Depending on the result of the variable display game, control is made to either a first game state (time reduction, high probability state, big win, etc.) which is advantageous to the player, or a second game state (normal state) which is less advantageous than the first game state;
A gaming machine as described in the preceding paragraphs, characterized in that when multiple gaming media are won during one operation of the electric role device, the gaming media won in the second gaming state are used in calculating information regarding the gaming value, and the gaming media won in the first gaming state are not used in calculating information regarding the gaming value, but any of the gaming media can trigger a variable display game.

(36C) The control means
Detecting multiple types of errors that occur in gaming machines,
A gaming machine as described in the preceding paragraphs, characterized in that when multiple gaming media are won during one operation of the electric device, the gaming media that were won while a specified type of error was detected are not used in calculating information regarding the gaming value, and the gaming media that were won while a specified type of error was not detected are used in calculating information regarding the gaming value, but any of the gaming media can trigger a variable display game.

According to inventions 36A to 36C, whether or not the gaming medium is used to calculate information about the gaming value is switched depending on the state of the gaming machine, so that information about the gaming value can be displayed quickly and accurately.

(37A) A gaming machine including an outer frame, a main frame supported by the outer frame so as to be openable and closable and on which a game board is provided, and a setting change operation unit for changing a setting state related to a game,
A gaming machine characterized by having a setting change difficulty making means for making it more difficult to operate the setting change operation unit when the main body frame is in a closed state relative to the outer frame compared to when the main body frame is in an open state relative to the outer frame.

(37B) A gaming machine including an outer frame, a main frame supported by the outer frame so as to be openable and closable and on which a game board is provided, and a setting state display unit that displays a setting state after a change is made when a setting change operation is performed to change a setting state related to a game,
A gaming machine characterized in that it has a visibility-obscuring means for making the contents displayed by the setting status display unit difficult to see when the main body frame is in a closed state relative to the outer frame.

(37C) A gaming machine including an outer frame, a main frame supported by the outer frame so as to be openable and closable and on which a game board is provided, and a setting determination operation unit for performing a setting determination operation for determining a setting state related to a game,
A gaming machine characterized by having a decision difficulty making means for making it difficult to operate the setting decision operation unit when the main body frame is in a closed state relative to the outer frame.

(37D) A gaming machine comprising an outer frame, a main frame supported by the outer frame so as to be openable and closable and on which a game board is provided, and a setting change operation unit for changing a setting state relating to a game,
the setting change operation unit has a setting key insertion unit into which a setting key is inserted,
A gaming machine characterized in that, when the main body frame is in a closed state relative to the outer frame, a specific portion of the outer frame is configured to prevent the setting key from being inserted into the setting key insertion portion.

The inventions 37A to 37D make it more difficult for fraudsters to fraudulently change the settings, thereby improving the reliability of the gaming machine.

(37E) A gaming machine that performs a variable display of a pattern based on the establishment of a start condition, and awards a predetermined gaming profit when a winning result is derived as a result of the variable display of the pattern,
A variation time determination means for determining a variation time of the symbol;
a setting information determination unit that determines one of a plurality of predetermined setting information related to a game based on an operation on the specific operation unit,
The variable time determination means is capable of determining a specific variable time when the setting information is determined to be specific information based on an operation on the specific operation unit.

(37F) A gaming machine that performs a variable display of a pattern based on the establishment of a start condition, and awards a predetermined gaming profit when a winning result is derived as a result of the variable display of the pattern,
A variation time determination means for determining a variation time of the symbol;
A probability determination unit that determines the probability of the winning result being derived to be one of a plurality of probabilities based on an operation on a specific operation unit,
The variable time determination means is capable of determining a specific variable time when a probability determined based on an operation on the specific operation unit is a specific probability.

(37G) A gaming machine that performs a variable display of a pattern based on the establishment of a start condition, and awards a predetermined gaming profit when a winning result is derived as a result of the variable display of the pattern,
A variation time determination means for determining a variation time of the symbol;
a setting information determination unit that determines one of a plurality of predetermined setting information related to a game based on an operation on the specific operation unit,
The variable time determination means may determine a common variable time regardless of the setting information, or may determine a different variable time depending on the setting information,
A gaming machine characterized in that the probability that a different variable time is determined according to the setting information is set lower than the probability that the common variable time is determined.

(37H) A gaming machine that performs a variable display of a pattern based on the establishment of a starting condition, and awards a predetermined gaming profit when a winning result is derived as a result of the variable display of the pattern,
A variation time determination means for determining a variation time of the symbol;
a setting information determination unit that determines one of a plurality of predetermined setting information related to a game based on an operation on the specific operation unit;
A performance control unit that performs a predetermined performance,
The variable time determination means is capable of determining different variable times according to the setting information,
The gaming machine is characterized in that, when a specific change time is determined by the change time determination means in response to specific setting information among the setting information, the effect control unit sequentially performs, within the specific change time, a result suggestion effect suggesting the result of the change display of the patterns and a setting suggestion effect suggesting the content of the setting information determined by the setting information determination unit.

The inventions 37E to 37H allow players to sense the setting status in a new way, enhancing the player's interest in the game.

(37I) A gaming machine including a main control board on which a game control unit that controls a game is provided, a separate control board connected to the main control board and on which a control unit separate from the game control unit is provided, and a setting-related operation unit for changing a setting state related to a game performed by the game control unit,
The game control unit has a setting change permission state generating means for permitting an operation related to a change of the setting state of the setting-related operation unit,
A gaming machine characterized in that the setting change allowing state generating means allows operations related to changing the setting state when the information transmitted from the separate control board to the main control board is specific information.

The invention of 37I makes it more difficult for fraudsters to fraudulently change the settings, thereby increasing the reliability of the gaming machine.

(37J) A gaming machine comprising a gaming control unit which controls games, and a setting change operation unit for changing a setting state related to the control performed by the gaming control unit, and which awards a gaming profit when a gaming ball shot toward a gaming area by a player operating a predetermined shooting operation unit enters a predetermined winning hole,
A gaming machine characterized in that it has a launch disabling means for disabling the launch of gaming balls by operating the launch operation unit for a predetermined period of time when the setting change operation unit is operated to change the setting state.

The invention of 37J makes it possible to prevent unauthorized changes to settings.

(38A) A gaming machine including a game control unit that controls a game and a setting operation unit for changing settings related to the control performed by the game control unit,
A gaming machine characterized in that a gaming control board constituting the gaming control unit and a setting board constituting the setting operation unit are housed within a single case.

(38B) The gaming machine described in each of the preceding paragraphs is characterized in that the case can accommodate a dummy unit, which cannot be operated to change settings, together with the gaming control unit, in place of the setting operation unit.

(38C) The setting operation unit is
a first operation unit for starting a setting state in which the setting can be changed;
a second operation unit for confirming the setting and terminating the setting state;
4. The gaming machine according to any one of the preceding paragraphs, further comprising a setting display for displaying the contents of the settings.

(38D) The gaming machine described in each of the preceding paragraphs, characterized in that the dummy unit does not have any of the first operation unit, the second operation unit, or the setting display.

According to inventions 38A to 38D, the specifications of gaming machines with and without a setting function can be standardized, allowing for efficient design and production.

(39A) a game control unit having a processor that executes a program for controlling a game and a memory that is accessed by the processor;
a clear switch for initializing a predetermined area of the memory;
A gaming machine including a setting operation unit for changing settings related to the control performed by the gaming control unit,
the setting operation unit has a setting change operation unit for starting a setting state in which the setting can be changed,
The game control unit includes:
When the power supply of the gaming machine is turned on, the operation of the clear switch and the operation of the setting change operation unit are detected,
A gaming machine characterized in that, when the clear switch is operated and the setting change operation unit is operated, the setting state is initiated.

(39B) The gaming machine described in each of the preceding paragraphs is characterized in that the gaming control unit initializes the first area of the memory after the setting state ends.

(39C) The gaming machine described in each of the preceding paragraphs is characterized in that the gaming control unit initializes the memory in a second area that is at least partially different from the first area when the clear switch is operated and the setting change operation unit is not operated.

The inventions 39A to 39C can prevent erroneous setting changes.

(40A) A gaming machine including a game control unit that controls a game and a setting operation unit for changing settings related to the control performed by the game control unit,
The game control unit has a game value display means for displaying information regarding the awarded game value,
the setting operation unit includes a setting change operation unit for starting a setting state in which the setting can be changed, and a setting display unit for displaying the contents of the setting,
The gaming machine according to the present invention is characterized in that, in the setting state, the gaming control unit displays the gaming value display means and the setting display means in a manner that does not confuse the two.

(40B) The gaming machine described in each of the preceding paragraphs, characterized in that the gaming control unit and the setting operation unit are housed in a single case.

(40C) The gaming machine described in each of the preceding paragraphs, characterized in that the gaming value display means and the setting display means are configured as a single display device.

(40D) the game value display means displays information on the awarded game value on the display device without delay in accordance with the progress of the game,
The gaming machine described in each of the preceding paragraphs is characterized in that, in the setting state, the setting display means displays information regarding the setting on the display device instead of information regarding the awarded gaming value.

(40E) The gaming machine described in each of the preceding paragraphs, characterized in that the gaming value display means and the setting display means are configured as separate displays.

(40F) The game value display means is
In a state other than the above setting state, information regarding the awarded game value is displayed without delay according to the progress of the game,
In the setting state, displaying any one of letters, numbers, and figures that is not displayed in the setting state,
The gaming machine according to any one of the preceding paragraphs, wherein the setting display means displays information relating to the setting in the setting state.

(40G) The game value display means
In a state other than the above setting state, information regarding the awarded game value is displayed without delay according to the progress of the game,
In the setting state, the lights are turned off or all lights are turned on,
The gaming machine according to any one of the preceding paragraphs, wherein the setting display means displays information relating to the setting in the setting state.

The inventions 40A to 40G make it possible to prevent confusion between multiple displays arranged on a substrate.

(41A) a lottery means for performing a lottery regarding a winning result based on the game medium passing through a starting hole;
An effect determination means for determining one of a plurality of effects based on a result of the lottery;
a performance execution means for executing the performance determined by the performance determination means;
a setting information determination means for determining, when a predetermined operation is performed on a predetermined operation unit, one of a plurality of predetermined setting information relating to a game;
a setting information confirmation means for displaying the setting information determined by the setting information determination means on a predetermined display unit when an operation other than the predetermined operation is performed,
The plurality of effects include a setting suggestion effect capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that it is possible to execute the setting suggestion effect even if the different operation is performed when the effect determination means has determined that the setting suggestion effect should be executed.

(41B) a lottery means for performing a lottery regarding a winning result based on the game medium passing through a starting hole;
a setting information determination means for determining, when a predetermined operation is performed on a predetermined operation unit, one of a plurality of predetermined setting information relating to a game;
An effect determination means for determining one of a plurality of effects based on a result of the lottery;
a performance execution means for executing the performance determined by the performance determination means;
An error detection means for detecting an error;
an error notification means for notifying an error detected by the error detection means;
The plurality of effects include a setting suggestion effect capable of suggesting the setting information determined by the setting information determination means,
The effect execution means is capable of executing the setting suggestion effect during a period in which the error notification means is notifying an error that satisfies a predetermined condition.

(41C) a lottery information acquisition means for acquiring lottery information based on the establishment of a start condition;
A determination means for determining whether or not a winning ticket has been awarded based on the lottery information acquired by the lottery information acquisition means;
A special symbol variation execution means for executing a special symbol variation based on the establishment of a start condition;
a holding means for storing and holding the lottery information up to a predetermined number when the establishment of the starting condition is satisfied but the establishment of the starting condition is not satisfied;
A setting information determination means for determining one of a plurality of predetermined setting information related to a game based on an operation on a predetermined operation unit;
A display means for displaying a predetermined effect,
The performance includes an expectation suggestion performance for the determination result by the determination means, and a setting suggestion performance capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that, when the start condition is newly established during the period of special pattern change during which it has been decided that the expectation suggestion effect will be executed, or while lottery information corresponding to the special pattern change is pending, the execution of the setting suggestion effect in the special pattern change corresponding to the newly established start condition is restricted.

(41D) a lottery information acquisition means for acquiring lottery information based on the establishment of a start condition;
A determination means for determining whether or not a winning ticket has been awarded based on the lottery information acquired by the lottery information acquisition means;
A special symbol variation execution means for executing a special symbol variation based on the establishment of a start condition;
a holding means for storing and holding the lottery information up to a predetermined number when the establishment of the starting condition is satisfied but the establishment of the starting condition is not satisfied;
A setting information determination means for determining one of a plurality of predetermined setting information related to a game based on an operation on a predetermined operation unit;
A display means for displaying a predetermined effect,
The performance includes an expectation suggestion performance for the determination result by the determination means, and a setting suggestion performance capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that, when the start condition is newly established during the period of special pattern change during which it has been decided that the expectation suggestion effect will be executed, or while lottery information corresponding to the special pattern change is pending, the expectation suggestion effect and the setting suggestion effect can be executed in the special pattern change corresponding to the newly established start condition.

(41E) a lottery information acquisition means for acquiring lottery information based on the establishment of a start condition;
A determination means for determining whether or not a winning ticket has been awarded based on the lottery information acquired by the lottery information acquisition means;
A special symbol variation execution means for executing a special symbol variation based on the establishment of a start condition;
a holding means for storing and holding the lottery information up to a predetermined number when the establishment of the starting condition is satisfied but the establishment of the starting condition is not satisfied;
A setting information determination means for determining one of a plurality of predetermined setting information related to a game based on an operation on a predetermined operation unit;
A display means for displaying a predetermined effect,
The performance includes an expectation suggestion performance for the determination result by the determination means, and a setting suggestion performance capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that, when the start condition is newly established during the period of special pattern change during which it has been decided that the expectation suggestion effect and the setting suggestion effect will be executed, or while lottery information corresponding to the special pattern change is pending, the execution of the setting suggestion effect in the special pattern change corresponding to the newly established start condition is restricted.

(41F) a lottery information acquisition means for acquiring lottery information based on the establishment of a start condition;
A determination means for determining whether or not a winning ticket has been awarded based on the lottery information acquired by the lottery information acquisition means;
A special symbol variation execution means for executing a special symbol variation based on the establishment of a start condition;
a holding means for storing and holding the lottery information up to a predetermined number when the establishment of the starting condition is satisfied but the establishment of the starting condition is not satisfied;
A setting information determination means for determining one of a plurality of predetermined setting information related to a game based on an operation on a predetermined operation unit;
A display means for displaying a predetermined effect,
The performance includes an expectation suggestion performance for the determination result by the determination means, and a setting suggestion performance capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that, when the start condition is newly established during the period of special pattern change during which it has been decided that the expectation suggestion effect and the setting suggestion effect will be executed, or while lottery information corresponding to the special pattern change is pending, the execution of the expectation suggestion effect and the setting suggestion effect is restricted in the special pattern change corresponding to the newly established start condition.

(41G) a lottery information acquisition means for acquiring lottery information based on the establishment of a start condition;
A determination means for determining whether or not a winning ticket has been awarded based on the lottery information acquired by the lottery information acquisition means;
A special symbol variation execution means for executing a special symbol variation based on the establishment of a start condition;
a holding means for storing and holding the lottery information up to a predetermined number when the establishment of the starting condition is satisfied but the establishment of the starting condition is not satisfied;
A setting information determination means for determining one of a plurality of predetermined setting information related to a game based on an operation on a predetermined operation unit;
A display means for displaying a predetermined effect,
The performance includes an expectation suggestion performance for the determination result by the determination means, and a setting suggestion performance capable of suggesting the setting information determined by the setting information determination means,
A gaming machine characterized in that, when the start condition is newly established during the period of special pattern change during which it has been decided that the expectation suggestion effect and the setting suggestion effect will be executed, or while lottery information corresponding to the special pattern change is pending, the expectation suggestion effect and the setting suggestion effect can be executed in the special pattern change corresponding to the newly established start condition.

The inventions 41A to 41G can increase the interest in playing games.

(42A) A gaming machine having a main control means for deriving a gaming state advantageous to a player based on the result of a lottery for winning or losing in a game,
The main control means
a program storage means for storing a first program and a second program;
A calculation means for performing required calculation processing according to the first program and the second program;
a first storage means having a plurality of storage areas for temporarily storing data in the arithmetic processing;
A second storage means having a storage area having the same configuration as that of the first storage means,
the first storage means and the second storage means are switchable between accessible and inaccessible states so that either one of them is accessible;
The calculation means includes:
The first storage means is used when the first program is executed;
A gaming machine, characterized in that the second storage means is used when the second program is executed.

(42B) A gaming machine characterized in that the first storage means and the second storage means are switchable between accessible and inaccessible by a single command input to the calculation means.

(42C) A gaming machine characterized in that the instruction for switching the first storage means to be accessible and the instruction for switching the second storage means to be accessible have different instructions (opcodes) and/or arguments (operands).

(42D) the first program is a program (in a game control area) for performing a lottery for a game,
The second program is a program (outside the game control area) that calculates information regarding the game value awarded in a game, and is called and executed from the first program, in this gaming machine.

(42E) A gaming machine having a main control means for deriving a gaming state advantageous to a player based on the result of a lottery for winning or losing in a game,
The main control means
a program storage means for storing a first program and a second program;
A calculation means for performing required calculation processing according to the first program and the second program;
a first storage means having a plurality of storage areas for temporarily storing data in the arithmetic processing;
A second storage means having a storage area having the same configuration as that of the first storage means,
the first storage means and the second storage means are switchable between accessible and inaccessible states so that either one of them is accessible;
The calculation means includes:
When the first program is executed, the first storage means is used;
at the start of the second program, switching the second program so that the first storage means is inaccessible and the second storage means is accessible;
A gaming machine, characterized in that the second storage means is used when the second program is executed.

(42F) A gaming machine characterized in that the calculation means switches the second program so that the second storage means is inaccessible and the first storage means is accessible when the second program is terminated.

(42G) A gaming machine having a main control means for deriving a game state advantageous to a player based on the result of a lottery in a game,
The main control means
a program storage means for storing a first program and a second program;
A calculation means for performing required calculation processing according to the first program and the second program;
a first storage means having a plurality of storage areas for temporarily storing data in the arithmetic processing;
A second storage means having a storage area having the same configuration as that of the first storage means,
the first storage means and the second storage means are switchable between accessible and inaccessible states so that either one of them is accessible;
The calculation means includes:
When the first program is executed, the first storage means is used;
when the second program is started, the first program is switched so as to be inaccessible to the first storage means and to be accessible to the second storage means;
A gaming machine, characterized in that the second storage means is used when the second program is executed.

(42H) A gaming machine characterized in that the calculation means switches the second storage means to be inaccessible and the first storage means to be accessible in the first program that has returned from the second program after the second program has ended.

According to inventions 42A to 42H, when transferring processing between programs, data can be quickly evacuated using simple commands, reducing the amount of care required when creating programs.

(43A) A gaming machine that provides a gaming value to a player,
A main control means for deriving a game state advantageous to a player based on the result of a lottery in a game;
A peripheral control means for controlling presentations in a game based on instructions from the main control means;
A display device which is controlled by the peripheral control means to perform a performance display;
A display panel for displaying a performance image;
a light-emitting device that is controlled by the peripheral control means to irradiate light from a plurality of positions on the sides of the display panel so as to travel within the display panel;
the display panel has a plurality of first reflecting sections that reflect light traveling through a specific path within the display panel toward a front surface of the gaming machine, and a plurality of second reflecting sections that reflect light traveling through a plurality of paths within the display panel toward the front surface of the gaming machine;
The peripheral control means includes:
causing the light emitting device to emit light in a predetermined pattern and changing the light reflected by the first reflecting portion to display a dynamic image on the display panel;
A gaming machine, characterized in that a static image is displayed on the display panel by the second reflecting portion reflecting light from the light emitting device.

(43B) The light-emitting device has a plurality of light-emitting elements that irradiate light from a plurality of positions toward a side of the display panel,
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means changes the light emission color of the multiple light-emitting elements over time, causes light of different colors to travel different paths within the display panel, and emits light of different colors from the multiple first reflective sections, thereby changing the color of the picture projected by the multiple first reflective sections over time.

(43C) The light-emitting device has a plurality of light-emitting elements that irradiate light from a plurality of positions toward the sides of the display panel,
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means changes the color of the image projected by the plurality of first reflective sections over time by switching the illumination of the plurality of light-emitting elements over time, controlling the path of light within the display panel, and causing light to be emitted from at least some of the plurality of first reflective sections.

(43D) The light-emitting device has a plurality of light-emitting elements that irradiate light from a plurality of positions toward a side of the display panel,
The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means changes the number of light-emitting elements that emit light among the plurality of light-emitting elements over time, controls the path of light within the display panel, and causes light to be emitted from at least some of the plurality of first reflective sections, thereby changing the color of the image projected by the plurality of first reflective sections over time.

According to inventions 43A to 43D, both moving and still images can be displayed on a single light guide plate, preventing a decline in interest in the game.

(44A) A gaming machine that provides a gaming value to a player,
A main control means for deriving a game state advantageous to a player based on the result of a lottery in a game;
A peripheral control means for controlling presentations in a game based on instructions from the main control means;
A display device which is controlled by the peripheral control means to perform a performance display;
A display panel for displaying a performance image;
a light-emitting device that is controlled by the peripheral control means to irradiate light from a plurality of positions on the sides of the display panel so as to travel within the display panel;
the display panel has a plurality of first reflecting sections that reflect light traveling through a specific path within the display panel toward a front surface of the gaming machine, and a plurality of second reflecting sections that reflect light traveling through a plurality of paths within the display panel toward the front surface of the gaming machine;
the first reflecting section includes a plurality of first right-eye reflecting sections that reflect light traveling along a specific path within the display panel in a direction that reaches the right eye of a player, and a plurality of first left-eye reflecting sections that reflect the light in a direction that reaches the left eye of the player;
the first right-eye reflecting portions are disposed on the display panel so as to form a right-eye image;
the first left-eye reflecting portions are disposed on the display panel so as to form a left-eye picture at a position different from the right-eye picture;
The peripheral control means includes:
by illuminating the light emitting device so that light emitted in the same pattern reaches the first right eye reflecting portion and the first left eye reflecting portion, the right eye pattern and the left eye pattern are displayed on the display panel, and a player is allowed to recognize a three-dimensional pattern that generates a parallax between the left and right eyes;
A gaming machine characterized in that a flat image that does not cause parallax between the left and right eyes is displayed on the display panel by reflecting light from the light emitting device by the second reflecting portion.

(44B) The gaming machine described in each of the preceding paragraphs is characterized in that the second reflecting section reflects light that travels through multiple paths within the display panel in a direction that reaches the player's right eye and a direction that reaches the player's left eye on the front side of the gaming machine, thereby displaying the flat image on the display panel.

(44C) the second reflecting portion includes a plurality of second right-eye reflecting portions that reflect light traveling along a specific path within the display panel in a direction that reaches the right eye of the player, and a plurality of second left-eye reflecting portions that reflect the light in a direction that reaches the left eye of the player,
the second right-eye reflecting portions are disposed on the display panel so as to form a right-eye image;
the second left-eye reflecting portions are disposed on the display panel so as to form a left-eye picture at the same position as the right-eye picture,
The gaming machine described in each of the preceding paragraphs, characterized in that the flat image is displayed on the display panel by light reflected by the second reflecting portion.

According to inventions 44A to 44C, three-dimensional and two-dimensional images can be displayed on a single light guide plate, preventing a decline in interest in the game.

(45A) A gaming machine that provides a gaming value to a player,
A main control means for deriving a game state advantageous to a player based on the result of a lottery in a game;
A peripheral control means for controlling presentations in a game based on instructions from the main control means;
A display device which is controlled by the peripheral control means to perform a performance display;
A display panel for displaying a performance image;
a light-emitting device that is controlled by the peripheral control means to irradiate light from a plurality of positions on the sides of the display panel so as to travel within the display panel;
The peripheral control means includes:
A dynamic image and a static image can be displayed on the display panel by illuminating the light emitting device,
A gaming machine characterized in that the dynamic picture display and the static picture display are combined to produce an effect suggesting the result of the lottery.

(45B) the display panel has a plurality of first reflecting sections that reflect light traveling through a specific path within the display panel and emit the light toward the front side of the gaming machine, and a plurality of second reflecting sections that reflect light traveling through a plurality of paths within the display panel and emit the light toward the front side of the gaming machine,
The peripheral control means includes:
a light path of the light traveling through the display panel is changed by causing the light emitting device to emit light in a predetermined pattern, and a changing image is displayed on the display panel by changing the light reflected by the first reflecting portion;
a stationary image is displayed on the display panel by reflecting the light from the light emitting device by the second reflecting portion;
The gaming machine described in each of the preceding paragraphs is characterized in that the display of the changing pictures and the display of the stationary pictures are combined to create an effect that suggests the result of the lottery.

According to inventions 45A and 45B, both moving and still images can be displayed on a single light guide plate, preventing a decline in interest in the game.

(46A) A gaming machine that provides a gaming value to a player,
A main control means for deriving a game state advantageous to a player based on the result of a lottery in a game;
A peripheral control means for controlling presentations in a game based on instructions from the main control means;
A display device that displays a performance image under the control of the peripheral control means;
A display panel for displaying a performance image;
a light-emitting device that is controlled by the peripheral control means to irradiate light from a plurality of positions on the sides of the display panel so as to travel within the display panel;
the display panel has a plurality of reflecting portions that reflect light traveling within the display panel toward a front side of the gaming machine,
The peripheral control means includes:
A target image is displayed on the display panel by causing the light emitting device to emit light;
A gaming machine characterized in that an image moving toward the target pattern is displayed on the display device.

(46B) The gaming machine described in each of the preceding paragraphs is characterized in that the picture displayed on the display panel and the image displayed on the display device represent the same character or letter.

(46C) The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means displays an image on the display device that moves toward the target image after the target image is displayed on the display panel.

(46D) The gaming machine described in each of the preceding paragraphs is characterized in that the peripheral control means displays an image on the display device that moves toward the target image, and then causes the target image to be displayed on the display panel.

According to inventions 46A to 46D, multiple images or images of different shapes can be displayed on a single light guide plate, preventing a decline in interest in the game.

(47A) a game control means for drawing a lottery for a special game beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means,
The game control means includes:
A power-on process is executed when the gaming machine is powered on, and a periodic process is executed at a predetermined interval.
When the power supply to the gaming machine is turned on in a state in which the setting operation means is operated, in the power-on processing, a setting corresponding to a setting change state in which the setting value can be changed or a setting confirmation state in which the setting value cannot be changed is executed according to the operation state of the setting operation means;
A gaming machine characterized in that, in the setting change state or the setting confirmation state, after executing a setting corresponding to the setting change state or the setting confirmation state, in the periodic processing, the processing corresponding to the setting change state or the setting confirmation state is made possible.

(47B) The gaming machine described in each of the preceding paragraphs, characterized in that the periodic processing includes processing related to changing the setting value, processing related to checking the setting value, processing related to normal play, and processing that is commonly executed in at least two of the multiple processing.

(47C) the periodic processing is composed of at least a first repetitive process for executing a process related to the normal game and a second repetitive process for executing a process related to a change in the setting,
The gaming machine described in each of the preceding paragraphs is characterized in that the gaming control means selectively executes the first repetitive process and the second repetitive process depending on the operation mode of the gaming machine.

(47D) The memory includes a setting state management area for recording the operating state of the gaming machine in an area where the memory contents are backed up when the power is cut off,
The game control means includes:
In the setting change mode, a setting state management area is set to indicate that the setting change mode is in effect, as the predetermined condition;
A gaming machine characterized in that, in the setting confirmation mode, the setting confirmation mode is set in the setting status management area as the predetermined condition.

(48) a game control means for drawing a lottery for a special game beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means,
The game control means includes:
A power-on process is executed when the gaming machine is powered on, and a periodic process is executed at a predetermined interval.
When the power supply to the gaming machine is turned on in a state in which the setting operation means is operated, in the power-on processing, a setting corresponding to a setting change state in which the setting value can be changed or a setting confirmation state in which the setting value cannot be changed is executed according to the operation state of the setting operation means;
The periodic processing can execute a normal game processing related to a normal game and a setting processing related to a setting change or a setting confirmation,
A gaming machine characterized in that the normal game processing is composed of a plurality of processes, and a specific process among the plurality of processes is a process that can be executed in common in the normal game and the setting processing.

(49A) a game control means for drawing a lottery for a special game that is beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means;
A gaming machine comprising:
the setting operation means is composed of at least a first setting operation means and a second setting operation means,
The game control means includes:
A storage means capable of storing information related to a game is provided,
In a power-on process executed when the gaming machine is powered on, an output signal of the setting operation means is stored and held in a specific storage means among the storage means;
in the power-on process, when determining whether or not the setting operation means has been operated, the determination is made based on information stored and held in the specific storage means without reading an output signal from the setting operation means;
the second setting operation means is means for initializing the storage means when the first setting operation means is not operated and only the second setting operation means is operated during the power-on process,
A gaming machine characterized in that, in the power-on processing, when the first setting operation means is not operated and only the second setting operation means is operated, when initializing the storage means, the specific storage means is not initialized.

(49B) A peripheral control means for controlling the performance on the display device is provided,
The gaming machine described in each of the preceding paragraphs is characterized in that the gaming control means determines the mode in which to start the gaming machine based on the output signal stored in the memory after the peripheral control means is started.

(50A) a game control means for drawing a lottery for a special game that is beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means;
A gaming machine comprising:
the setting operation means is composed of at least a first setting operation means and a second setting operation means,
The game control means includes:
A storage means having at least a first storage area capable of storing information related to a game and a second storage area different from the first storage area,
the first storage area is an area for storing the setting value,
The second memory area is an area for storing various parameters used in a game,
The game control means includes:
When it is determined that the setting value is not a normal value, the first storage area and the second storage area are initialized;
A gaming machine characterized in that, when it is determined that the first setting operation means among the setting operation means is not operated and the second setting operation means is operated, the first memory area is not initialized and the second memory area is initialized.

(50B) the memory further includes a third storage area;
The gaming machine described in each of the preceding paragraphs is characterized in that the game control means initializes the first memory area, the second memory area, and the third memory area when the third condition is met.

(50C) the third memory area is a memory area other than the area for storing various parameters used in normal games,
The gaming machine described in each of the preceding paragraphs is characterized in that when the data backed up in the memory is erased when a power outage occurs, the gaming control means determines that the third condition has been met and initializes the first memory area, the second memory area and the third memory area.

(51A) a game control means for drawing a lottery for a special game that is beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means;
A gaming machine comprising:
The game control means includes:
A storage means capable of retaining information related to a game even when the power is cut off is provided;
A power-on process is executed when the gaming machine is powered on, and a periodic process is executed at a predetermined interval.
When the power supply to the gaming machine is turned on in a state in which the setting operation means is operated, in the power-on processing, a setting corresponding to a setting change state in which the setting value can be changed or a setting confirmation state in which the setting value cannot be changed is executed according to the operation state of the setting operation means;
A gaming machine characterized in that the storage means includes a setting state management area in which a value that is set corresponding to the setting change state or the setting confirmation state is stored depending on the operation state of the setting operation means, at least during the power-on processing.

(51B) A setting operation means is provided for starting the game in a setting change mode in which a setting value related to the control performed by the game control means is changed,
The game control means includes:
When an operation is performed to start the gaming machine in the setting change mode while a RAM abnormality is stored in the setting state management area, the setting change mode is recorded in the setting state management area, and a predetermined area of the memory is initialized; when an operation is performed to end the setting change mode by the setting operation means, a normal gaming state is recorded in the setting state management area, and the gaming machine is started in a normal gaming state in which gaming balls can be shot;
A gaming machine as described in the preceding paragraphs, characterized in that when an operation is performed to start the gaming machine in the setting confirmation mode while a RAM abnormality is stored in the setting state management area, the RAM abnormality recorded in the setting state management area continues, and even if an operation is performed by the setting operation means to end the setting confirmation mode, the normal gaming state is not recorded in the setting state management area.

(52) a game control means for drawing a lottery for a special game beneficial to a player when a predetermined condition is satisfied;
A setting operation means for changing or confirming a setting value related to the control performed by the game control means;
A gaming machine comprising:
The game control means includes:
a power-on process which is executed when the gaming machine is powered on, a first periodic process which is executed at a first predetermined cycle, and a second periodic process which is executed at a second predetermined cycle;
In the power-on process, it is determined whether or not an operation associated with a setting operation is being performed on the setting operation means;
When it is determined that an operation associated with a setting operation is being performed on the setting operation means, a setting corresponding to a setting change state in which the setting value can be changed or a setting confirmation state in which the setting value cannot be changed is executed according to the operation state;
When it is determined that no operation associated with the setting operation has been performed in the setting operation means, a normal game start process can be executed without performing a setting corresponding to a setting change state in which the setting value can be changed or a setting confirmation state in which the setting value cannot be changed;
the first periodic process is executed after a setting corresponding to the setting change state or the setting confirmation state is executed in the power-on process,
The second periodic process is executed after a normal game start process is made executable during the power-on process.

(53A) a game control means for controlling the progress of a game;
A role-playing device controlled according to a control signal output from the game control means;
A first driver circuit outputs a drive signal for driving the character.
A gaming machine capable of mounting an inspection signal generating circuit for outputting an inspection signal used for inspecting the gaming machine,
The inspection signal generating circuit includes:
a second driver circuit that receives the same control signal as that of the first driver circuit and generates a test signal from the control signal;
an inspection connector that outputs the generated inspection signal;
The first driver circuit converts a control signal output as a serial signal from the game control means into a drive signal for driving the role-playing device,
The second driver circuit converts a control signal output as a serial signal from the game control means into the inspection signal.

(53B) The first driver circuit and the second driver circuit each have an output transistor that switches an input power supply to generate an output signal,
The gaming machine described in each of the preceding paragraphs, wherein the first driver circuit and the second driver circuit are input with different voltages and independently generate signals of different voltages that change at the same timing.

(53C) A gaming machine as described in any of the preceding paragraphs, characterized in that a connector that is connected to the first driver circuit is implemented, and a connector that is connected to the second driver circuit is not implemented.

(53D) The gaming machine described in each of the preceding paragraphs, characterized in that the connector connected to the first driver circuit is a discrete component, and the connector connected to the second driver circuit is a surface-mounted component.

(53E) a game control means for executing periodic processing at a predetermined cycle in order to control the progress of a game;
A first detection means for detecting an event that is captured by the game control means in the periodic processing among events related to the progress of the game;
A second detection means for detecting an event that is captured by the game control means in a process other than the periodic process among the events related to the progress of the game,
The game control means includes:
a conversion means for converting a signal from the first detection means into a serial signal;
a serial input port to which a serial signal is input;
a general-purpose input port to which the signal of the first detection means or the signal of the second detection means is individually input,
a signal from the first detection means is input to either the general-purpose input port or, via the conversion means, to the serial input port;
A gaming machine characterized in that the signal of the second detection means is input to the general-purpose input port.

(53F) The first detection means is a ball detection means for detecting a game ball launched toward the game area,
The gaming machine described in each of the preceding paragraphs is characterized in that the second detection means is a setting operation means that is operated to change or confirm a setting value related to the control performed by the gaming control means.

(53G) a role-playing device driven according to a control signal output from the game control means;
A first driver circuit outputs a drive signal for driving the character.
The serial input port is a serial input/output port capable of inputting and outputting a serial signal,
The game control means outputs a control signal for driving the role from the serial input/output port,
The gaming machine described in each of the preceding paragraphs, wherein the first driver circuit converts the control signal into the drive signal.

(53H) a game control means for executing periodic processing at a predetermined cycle in order to control the progress of a game;
A gaming machine comprising a first detection means and a second detection means for detecting an event related to the progress of the game,
The game control means includes:
a conversion means for converting a signal from the first detection means into a serial signal;
a serial input port for inputting a serial signal;
a general-purpose input port to which the signal of the first detection means or the signal of the second detection means is individually input,
the first detection means detects a signal once during one of the periodic processes and determines a signal level based on the result,
the second detection means detects a signal a plurality of times during one of the periodic processes and determines a signal level based on the result,
a signal from the first detection means is input to either the general-purpose input port or, via the conversion means, to the serial input port;
a signal from the second detection means is input to the general-purpose input port;
The gaming machine is characterized in that the gaming control means detects the signal of the second detection means a plurality of times during one of the periodic processing and determines the signal level.

(53I) The first detection means is a ball detection means for detecting a game ball launched toward the game area,
The gaming machine described in each of the preceding paragraphs is characterized in that the second detection means is a setting operation means that is operated to change or confirm a setting value related to the control performed by the gaming control means.

(53J) a game control means for controlling the progress of a game;
A display device that is driven in accordance with a control signal output from the game control means;
A gaming machine comprising: a first driver circuit that outputs a drive signal for driving the gambling device;
The game control means is mounted on a first printed circuit board,
the first driver circuit converts a control signal output as a serial signal from the game control means into a drive signal for driving the display device, and is mounted on a second printed circuit board;
A gaming machine characterized in that the first printed circuit board and the second printed circuit board are connected by a serial communication line that transmits a serial signal converted from the signal that repeats at a predetermined period from the first printed circuit board side.

(53K) A test signal generating circuit for outputting a test signal used for testing the gaming machine can be mounted,
The inspection signal generating circuit includes:
a second driver circuit that receives the same control signal as that of the first driver circuit and generates a test signal from the control signal;
an inspection connector that outputs the generated inspection signal;
The second driver circuit converts a control signal output as a serial signal from the game control means into the inspection signal, and is mounted on the first printed circuit board.

(53L) The gaming machine described in the preceding paragraphs, characterized in that the first printed circuit board and the second printed circuit board are housed in a single board box.

(53M) The first printed circuit board and the second printed circuit board are housed in different board boxes;
The gaming machine described in each of the preceding paragraphs, wherein the first printed circuit board is sealed by a crimping mechanism.

(53N) The first driver circuit and the second driver circuit each have an output transistor that switches an input power supply to generate an output signal,
The gaming machine described in each of the preceding paragraphs, wherein the first driver circuit and the second driver circuit are input with different voltages and independently generate signals of different voltages that change at the same timing.

[16. Communication with various boards when executing setting function]
As described above, in gaming machines with a setting function, the setting function (checking ("checking settings") and changing ("changing settings")) can be executed by operating a specific operation unit. The method of starting up the setting function has been described above, but the processing on the main control board when the power is turned on and the timer interrupt processing will be explained using separate examples.

In this embodiment, when the gaming machine is powered on or when the setting information is changed, main control recognition information, which is information for recognizing the main control board 1310, is sent to the ball information control board (payout control board 951). The main control recognition information includes, for example, the chip ID number of the main control MPU 1311. This allows the ball information control board to determine whether the main control MPU 1311 (main control board 1310) installed in the gaming machine is genuine, and if it is not determined to be genuine, the ball information control board can stop operations related to prize balls, making it possible to prevent fraud such as tampering with the main control MPU 1311 (main control board 1310), and to reflect changes to the setting information on the main control board 1310 in the ball information control board at the appropriate time.

[16-1. Initialization process]
First, the initialization process (another example 5) in this embodiment will be described. Figures 274 and 275 are flowcharts showing the initialization process of the other example 5. The initialization process of the other example 5 is a process that adds a process related to the setting function in addition to the initialization process described in Figures 21 and 22, and omits the process related to the role ratio calculation, but the process related to the role ratio calculation does not need to be omitted, and has been omitted for simplification.

When the power is turned on to the gaming machine 1, the main control MPU 1311 of the main control board 1310 performs power-on processing. Specifically, first, the stack pointer is set (step P10). The stack pointer, for example, indicates an address stored in the stack to temporarily store the contents of a memory element (register) in use, or indicates an address stored in the stack to temporarily store the return address of this routine when a subroutine is terminated and the routine is returned to, and the stack pointer advances each time a stack is added. In step P10, the stack pointer is set to an initial address, and the contents of the register, the return address, etc. are added to the stack from this initial address. Then, the stack pointer returns to the initial address by reading the stack from the last stacked stack to the first stacked stack in order. The power-on processing corresponds to the processing in steps P10 to P52.

Following step P10, the main control MPU 1311 performs wait timer process 1 (step P12) and determines whether a power outage warning signal has been input (step P14). Note that the voltage does not rise immediately from when the power is turned on until it reaches the specified voltage. On the other hand, when a power outage or momentary power outage (a phenomenon in which the power supply is suddenly stopped) occurs, the voltage drops and, when it becomes smaller than the power outage warning voltage, a power outage warning signal is output from the power outage monitoring circuit of the ball information control board as a power outage warning and input to the main control MPU. Similarly, when the voltage becomes smaller than the power outage warning voltage from when the power is turned on until it reaches the specified voltage, a power outage warning signal is input from the power outage monitoring circuit of the ball information control board.

The wait timer process 1 in step P12 is a process for waiting until the voltage becomes greater than the power failure warning voltage and stabilizes after power is turned on, and in this embodiment, the waiting time (wait timer) is set to 200 milliseconds (ms). The judgment in step P14 is based on the power failure warning signal from the power failure monitoring circuit of the ball information control board. After power is turned on, when the voltage becomes greater than the power failure warning voltage and stabilizes, the power failure warning signal from the power failure monitoring circuit is no longer output, and the process proceeds to step P16.

When the process proceeds to step P16, the main control MPU 1311 determines whether or not the RAM clear switch (Figure 76) has been operated (step P16). This determination is made based on whether or not the RAM clear switch on the main control board 1310 has been operated and its operation signal (detection signal) has been input to the main control MPU. When a detection signal has been input, it is determined that the RAM clear switch has been operated, whereas when a detection signal has not been input, it is determined that the RAM clear switch has not been operated.

If it is determined in step P16 that the RAM clear switch has been operated, the main control MPU 1311 sets the RAM clear notification flag RCL-FLG to a value of 1 (step P18) and proceeds to step P30. On the other hand, if it is determined in step P16 that the RAM clear switch has not been operated, it sets the RAM clear notification flag RCL-FLG to a value of 0 (step P19) and proceeds to step P20.

This RAM clear notification flag RCL-FLG is a flag that indicates whether or not to erase game information related to the game, such as probability fluctuations and unpaid prize balls, stored in the RAM built into the main control MPU 1311 (hereinafter referred to as the "main control built-in RAM"), and is set to a value of 1 when the game information is to be erased, and a value of 0 when the game information is not to be erased. The value of the RAM clear notification flag RCL-FLG set in steps P18 and P19 is stored in a general-purpose memory element (general-purpose register) of the main control MPU.

When proceeding to step P20, the main control MPU 1311 executes a combination authentication process to determine whether or not the combination of the main control MPU 1311 and the MPU of the ball information control board is appropriate. The frame maker identification information output from the ball information control board is stored in the frame maker identification information storage unit of the main control MPU 1311, and it is authenticated whether or not appropriate frame maker identification information has been output. If the authentication is performed appropriately, the process proceeds to step P30, whereas if it is determined to be inappropriate, an abnormality is reported using a speaker, liquid crystal display device, etc.

When the main control MPU proceeds to step P30, it performs wait timer processing 2 (step P30). In this wait timer processing 2, it waits until the system that controls the drawing of the liquid crystal display device 1600 by the liquid crystal control unit of the peripheral control board 1510 starts up (boots). In this embodiment, the time until booting (boot timer) is set to 2 seconds (s).

When the wait timer process 2 (step P30) is completed, in this embodiment, the main control MPU 1311 determines whether or not an operation to change the setting information has been performed (step P3031). An operation to change the setting information is not an operation to confirm the setting information, but an operation to change the setting information.

If an operation to change the setting information is performed (the result of step P3031 is "YES"), the main control MPU 1311 executes the processing from step P44 onwards to clear the game information in the memory area, so that game play after power-on can proceed based on the new setting information.

On the other hand, if there has been no operation to change the setting information (the result of step P3031 is "NO"), the main control MPU 1311 determines whether the RAM clear notification flag RCL-FLG is 0 or not, and branches the process based on the value of the RAM clear notification flag RCL_FLG (step P32). As described above, the RAM clear notification flag RCL-FLG is set to a value of 1 when game information is erased, and to a value of 0 when game information is not erased. If it is determined in step P32 that the RAM clear notification flag RCL-FLG is 0, that is, when game information is not erased, a checksum is calculated (step P34). This checksum is calculated by treating the game information stored in the main control built-in RAM as a numerical value.

Following step P34, the main control MPU 1311 determines whether the calculated checksum value (sum value) matches the checksum value (sum value) stored during the power-off process (when power is off) described below (step P36). If they match, it determines whether the backup flag BK-FLG is set to a value of 1 (step P38). This backup flag BK-FLG is a flag that indicates whether backup information such as game information, the checksum value (sum value), and the value of the backup flag BK-FLG was stored and retained in the main control built-in RAM during the power-off process described below, and is set to a value of 1 when the power-off process has been completed normally, and to a value of 0 when the power-off process has not been completed normally.

When the backup flag determination process (step P38) is completed, the main control MPU 1311 determines whether or not an operation to check the setting information has been performed (step P3038). If an operation to check the setting information has been performed (the result of step P3038 is "YES"), setting confirmation information indicating that the setting information is being confirmed is set (step P3039). In order to prevent the game from continuing while the setting information is being confirmed, the setting confirmation information can be set to control not to execute processing related to the game or winning balls. If there is no operation to check the setting information (the result of step P3039 is "NO"), or after the setting confirmation information has been set (step P3039), the working area of the main control built-in RAM is set as the time of power recovery (step P40). In addition to setting the value 0 to the backup flag BK-FLG, this setting reads the power recovery time information from the ROM built into the main control MPU (hereinafter referred to as the "main control built-in ROM") and sets this power recovery time information in the working area of the main control built-in RAM. In addition, "power restoration" includes not only the state in which power is turned on after being cut off, but also the state in which power is restored after a power outage or momentary power outage, and the state in which high-frequency radiation is detected, reset, and then restored.

Following step P40, the main control MPU 1311 performs a power-on command creation process (step P42). In this power-on command creation process, game information is read from the backup information and various commands corresponding to this game information are stored in a specified storage area of the main control built-in RAM.

On the other hand, if it is determined in step P32 that the RAM clear notification flag RCL-FLG is not 0 (is 1), i.e., when erasing game information, or if the checksum values (sum values) do not match in step P36, or if it is determined in step P38 that the backup flag BK-FLG is not 1 (is 0), i.e., when power-off processing has not ended normally, the main control MPU 1311 clears the entire area of the main control's built-in RAM (step P44). Specifically, this is done by writing the value "00h" to the main control's built-in RAM (note that a predetermined value may be read from the main control's built-in ROM as the initial value and set). In addition, when the RAM clear switch is operated to erase game information, when the sum value does not match, or when the power-off process has not ended normally, a unique ID code previously stored in the non-volatile RAM of the main control MPU is retrieved, and an initial value derivation process is executed to always derive the same fixed value from the fixed numerical range of the counter that updates the random number for jackpot determination based on this retrieved ID code, and this fixed value is set as the initial value.

On the other hand, when the RAM clear switch is operated (RAM clear operation, the result of step P32 is "NO"), when information is not stored normally in the RAM (RAM abnormality, the result of step P36 is "NO", the result of step P38 is "NO"), or when the setting is changed (the result of step P3031 is "YES"), the entire area of the main control built-in RAM is cleared (step P44). Specifically, this is done by writing the value "00h" to the main control built-in RAM (note that a predetermined value may be read from the main control built-in ROM as the initial value and set). In addition, when the RAM clear switch is operated to erase the game information, when the sum value does not match, or when the power-off process has not ended normally, the random number for determining the initial value for the jackpot determination is used to determine the initial value of the random number for the jackpot determination, a unique ID code previously stored in the non-volatile RAM of the main control MPU is retrieved, and an initial value derivation process is executed to always derive the same fixed value from the fixed numerical range of the counter that updates the random number for the jackpot determination based on this retrieved ID code, and this fixed value is set as the initial value.

It is also possible to clear different areas of the main control built-in RAM depending on the situation, rather than clearing all areas. For example, when a RAM clear operation is performed, everything except the setting values and work areas related to settings (including some RAM areas related to game processing) is cleared, when a RAM abnormality occurs, all areas in the RAM are cleared, and when a setting is changed, only some RAM areas related to game processing are cleared. In other words, when a RAM abnormality occurs, all areas are cleared, but in other cases, the corresponding areas are cleared depending on the operation content, and for example, the setting values and work areas related to setting processing are not cleared unless a RAM abnormality is determined.

In addition, when clearing an area, in addition to setting each area to "00h," it is also possible to set an initial value that is not detrimental to the player or the game center (hall). For example, if the setting value is "00h," which is the most advantageous setting for the player (high setting), and 00h is set when the RAM is cleared and play starts from the high setting, which is advantageous for the player but detrimental to the hall, then when the setting value work area is cleared, the minimum setting (for example, "05h") is set.

When the processing of step P42 or step P48 is completed, the main control MPU 1311 determines whether or not there is a setting process, i.e., whether or not there is a setting confirmation or setting change (step P3048). If there is no setting process (the result of step P3048 is "NO"), a setting is made to notify the ball information control board of the main control recognition information (step P3049). If there is a setting process (the result of step P3048 is "YES"), the processing from step P50 onwards is executed without making a setting to notify the ball information control board of the main control recognition information. In this case, after the setting confirmation or setting change is completed in the timer interrupt processing, a setting is made to notify the ball information control board of the main control recognition information.

In addition, when setting the notification of the main control recognition information, the main control MPU 1311 clears the memory area for storing the information to be sent to the ball information control board. For example, if the area for storing unsent information is in the form of a ring buffer, the read counter and write counter indicating the read position and write position in the buffer are initialized (both are set to 0), and the buffer for SIO communication is also cleared. If information remains in these buffers, the remaining information will be sent first when the power is restored, so this is configured to ensure that the main control recognition information is always sent to the ball information control board first after power is turned on. When the ball information control board receives the main control recognition information from the main control board 1310, it executes the corresponding process and sends a response signal to the main control board 1310. From the time the notification of the main control recognition information is set until the response signal is received, the main control board 1310 is in a state of waiting to receive the main control recognition information response signal. When the response signal of the main control recognition information is received, the state of waiting to receive the main control recognition information response signal is released.

Then, the main control MPU 1311 allows the execution of timer interrupt processing by executing interrupt-related processing (steps P50 and P52). Note that in this embodiment, when the setting is made to notify the ball information control board of the main control recognition information, the processing for normal play is not executed until a response signal is received from the ball information control board. For example, the timer interrupt processing described below determines whether or not a response signal has been received, and if not, the processing is skipped. By configuring in this manner, it is possible to start play after ensuring that the ball information control board is started.

When execution of the timer interrupt process is permitted, the main control MPU 1311 executes the main loop process. Specifically, first, the watchdog timer clear register WCL is set to value A (step P54). The watchdog timer is cleared by sequentially setting values A, B, and C in this watchdog timer clear register WCL.

The main control MPU 1311 then determines whether a power outage warning signal has been input (step P56). As described above, when the power supply to the gaming machine 1 is cut off, or when a power outage or momentary interruption occurs, if the voltage falls below the power outage warning voltage, a power outage warning signal is input from the power outage monitoring circuit of the ball information control board as a power outage warning. The determination in step P56 is made based on this power outage warning signal.

When no power outage warning signal is input in step P56, the main control MPU 1311 performs a non-win/lose random number update process (step P58). In this non-win/lose random number update process, for example, the random number for reach determination, the random number for the variable display pattern, the random number for determining the initial value for the jackpot pattern, and the random number for determining the initial value for the small jackpot pattern are updated. In this way, the non-win/lose random number update process updates random numbers that are not related to win/lose determination (jackpot determination). Note that the random number for normal pattern win determination, the random number for determining the initial value for normal pattern win determination, and the random number for the normal pattern variable display pattern are also updated by this non-win/lose random number update process.

Following step P58, the process returns to step P54, where the watchdog timer clear register WCL is set to value A, and in step P56 it is determined whether a power outage warning signal has been input. If no power outage warning signal has been input, in step P58 a non-win/lose random number update process is performed, and steps P54 to P58 are repeated. The process of steps P54 to P58 corresponds to the "main loop process."

On the other hand, when a power outage warning signal is input in step P56, the main control MPU 1311 sets interrupt prohibition (step P60). This setting disables the timer interrupt process described below, prevents writing to the main control's built-in RAM, and protects game information from being overwritten.

Following step P60, the main control MPU 1311 stops the drive signals output to the start port solenoid 2550, the large prize port solenoid (attacca solenoid (first attacca solenoid 2113, second upper attacca solenoid 2553, second lower attacca solenoid 2556), special symbol display (first special symbol display, second special symbol display) 1185, special symbol memory display, normal symbol display 1189, normal symbol memory display, game status display, round display, etc. (step P62).

Following step P62, the main control MPU 1311 calculates a checksum and stores the calculated value (step P64). This checksum is calculated by treating the game information in the working area of the main control internal RAM, excluding the storage area for the checksum value (sum value) and the backup flag BK-FLG value, as numerical values.

Following step P64, the main control MPU 1311 sets the backup flag BK-FLG to a value of 1 (step P66). This completes the storage of the backup information.

Following step P66, the main control MPU 1311 clears the watchdog timer (step P68). As described above, this clearing is performed by sequentially setting values A, B, and C in the watchdog timer clear register WCL.

Following step P68, the main control MPU 1311 enters a loop process in which it repeats a state of executing nothing. The processes from step P60 to step P68 and the loop process are referred to as "power-off processing." In this loop process, the watchdog timer is not cleared because values A, B, and C are not set in the watchdog timer clear register WCL in that order. As a result, the watchdog timer times out and outputs a time-out signal, which resets the main control MPU, after which the main control MPU performs this power-on processing again from the beginning.

The gaming machine 1 (main control MPU 1311) is reset when there is a power outage or momentary power outage, and performs power-on processing when power is subsequently restored.

In step P36, it is checked whether the backup information stored in the main control's built-in RAM is normal, and then in step P38 it is checked whether the power-off process has been completed normally. In this way, by double-checking the backup information stored in the main control's built-in RAM, it is checked whether the backup information was stored due to fraudulent activity.

[16-2. Timer interrupt processing]
Next, the timer interrupt process (variant example 5) in the main control board 1310 will be described. Fig. 276 is a flowchart showing the timer interrupt process of variant example 5. The timer interrupt process of variant example 5 is repeatedly performed at every interrupt period (4 ms in this embodiment) set in the power-on process shown in Fig. 274. In the timer interrupt process in this embodiment, a process for checking and changing the setting information is added.

When the timer interrupt process is started, the main control MPU 1311 of the main control board 1310 first determines whether or not it is in a standby state for receiving a main control recognition information response signal (step P3070). As described above, the standby state for receiving a main control recognition information response signal is a state in which the main control MPU 1311 waits until it receives a response signal output from the ball information control board after the notification setting of the main control recognition information. If the main control MPU 1311 is in a standby state for receiving a main control recognition information response signal (the result of step P3070 is "YES"), it skips the subsequent processing and ends the timer interrupt process. In addition, in the processing of step P3070, it is possible to not only determine whether or not it is in a standby state for receiving a main control recognition information response signal, but also to execute a process for communicating with the ball information control board. For example, in the processing of step P3070, various signals transmitted from the ball information control board are received, and if the response signal for the main control recognition information is included, the standby state for receiving the main control recognition information response signal is canceled, and in the case of other signals, the processing corresponding to the received signal is executed. When the main control recognition information response signal reception standby state is released, a launch permission signal is input to the ball information control board, enabling the ball launcher to launch the game ball and allowing play to begin.

If the main control MPU 1311 is not in a standby state to receive a main control recognition information response signal (the result of step P3070 is "NO"), it sets the value B in the watchdog timer clear register WCL (step P70). At this time, the value B is set in the watchdog timer clear register WCL following the value A that was set in step P54 of the main loop processing.

Following step P70, the main control MPU 1311 clears the interrupt flag (step P72). By clearing this interrupt flag, the interrupt period is initialized, and the next interrupt period is timed from the initial value.

Following step P72, the main control MPU 1311 performs switch input processing (step P74). In this switch input processing, various signals input to the input terminals of the main control I/O port 1314 are read and stored as input information in the input information storage area of the main control built-in RAM.

Following step P74, the main control MPU 1311 performs timer subtraction processing (step P76). In this timer subtraction processing, for example, the time during which the special symbol display device (first special symbol display device, second special symbol display device) 1185 is lit according to the variable display pattern determined by the special symbol and special electric role control processing described later, the time during which the normal symbol display device 1189 is lit according to the normal symbol variable display pattern determined by the normal symbol and normal electric role control processing described later, as well as the time of the ACK signal input determination time set as a determination condition when determining whether or not a ball information main ACK signal that informs the ball information control board that various commands transmitted by the main control board 1310 (main control MPU) have been input. Specifically, when the change time of the change display pattern or normal pattern change display pattern is 5 seconds, the timer interrupt period is set to 4 ms, so each time this timer subtraction process is performed, the change time is subtracted by 4 ms, and the subtraction result becomes a value of 0, thereby accurately measuring the change time of the change display pattern or normal pattern change display pattern.

In this embodiment, the ACK signal input judgment time is set to 100 ms. Each time this timer subtraction process is performed, the ACK signal input judgment time is subtracted by 4 ms, and the ACK signal input judgment time is accurately measured when the subtraction result becomes a value of 0. These various times and the ACK signal input judgment time are stored as time management information in the time management information storage area of the main control built-in RAM.

Following step P76, the main control MPU 1311 performs a random number update process (step P78). In this random number update process, the random numbers for jackpot determination, jackpot pattern random numbers, and small jackpot pattern random numbers are updated. In addition to these random numbers, the random numbers for jackpot pattern initial value determination and small jackpot pattern initial value determination, which are updated in the non-win/lose random number update process of step P58 in the initialization process (main loop process) shown in FIG. 274, are also updated. These random numbers for jackpot pattern initial value determination and small jackpot pattern initial value determination random numbers are updated in the main loop process and this timer interrupt process, respectively, to further increase randomness. In contrast, the random numbers for jackpot determination, jackpot pattern random numbers, and small jackpot pattern random numbers are random numbers related to win/lose determination (jackpot determination), so the respective counters are counted up only each time this win/lose random number update process is performed. For example, as described above, the counter that updates the random number for jackpot determination is an initial value updating type counter that is updated within a predetermined fixed numerical range from the minimum value to the maximum value (in this embodiment, the minimum value is 0 and the maximum value is 32767), and counts up this range from the minimum value to the maximum value by adding 1 each time this timer interrupt processing is performed. It counts up from the random number for determining the initial value for jackpot determination toward the maximum value (value 32767), and then counts up from the minimum value (value 0) toward the random number for determining the initial value for jackpot determination. When the counter that updates the random number for jackpot determination has finished counting up the range from the minimum value to the maximum value of the random number for jackpot determination, the random number for determining the initial value for jackpot determination is updated by this win/lose random number updating processing. At this time, the updated value is set by the main control MPU fetching an ID code from its built-in non-volatile RAM, executing an initial value derivation process that always derives the same fixed value from the fixed numerical range of the counter that updates the random number for jackpot determination based on this fetched ID code, and setting this derived fixed value as the initial value. In other words, the random number for determining the initial value for jackpot determination is always overwritten and updated as the initial value with the same fixed value derived based on the ID code by executing the initial value derivation process. The random number for determining whether a normal symbol is a hit and the random number for determining the initial value for a normal symbol are also updated by this win/lose random number update process. The method for updating the random number for determining whether a normal symbol is a hit is the same as the method for updating the random number for jackpot determination described above, so a description of this will be omitted.

When the winning/losing random number update process in step P78 is completed, the main control MPU 1311 determines whether or not processing related to the setting information (setting process) is being executed (step P3080). Specifically, it determines whether or not the setting information is being changed or confirmed. For example, it may be determined whether or not the setting confirmation information is set.

When the main control MPU 1311 is not processing the setting information (the result of step P3080 is "NO"), it performs the prize ball control process (step P80). In this prize ball control process, it reads the input information from the input information storage area described above and creates a prize ball command to be sent to the ball information control board based on this input information, or creates a self-check command to check the connection status between the boards of the main control board 1310 and the ball information control board. Then, it sends the created prize ball command or self-check command to the ball information control board as main ball information serial data. For example, when one game ball enters the big prize hole, it creates a prize ball command representing 15 balls as the number of prize balls and sends it to the ball information control board, and when the ball information main ACK signal that informs the ball information control board that the prize ball command has been received normally is not input within a predetermined time, it creates a self-check command to check the connection status between the boards of the main control board 1310 and the ball information control board and sends it to the ball information control board.

Following step P80, the main control MPU 1311 performs frame command reception processing (step P82). The ball information control board transmits various 1-byte (8-bit) commands that are classified as status indications. In the frame command reception processing of step P82, when the various commands are normally received as ball information main serial data, information informing the ball information control board of this fact is stored as output information in the output information storage area of the main control built-in RAM. In addition, the command normally received as ball information main serial data is reshaped into a 2-byte (16-bit) command and stored as transmission information in the transmission information storage area described above.

Following step P82, the main control MPU 1311 performs a fraud detection process (step P84). In this fraud detection process, an abnormal condition related to the winning ball is confirmed. For example, input information is read from the input information storage area described above, and when a detection signal is input from the count switch when the game is not in a jackpot game state (when a game ball enters the jackpot winning hole), etc., a winning abnormality display command classified as a notification display as an abnormal condition is created, and stored as transmission information in the transmission information storage area described above.

Following step P84, the main control MPU 1311 performs special symbol and special electric device control processing (step P86). In this special symbol and special electric device control processing, the value of the counter that updates the random number for determining the jackpot described above is taken out and judged whether it matches the jackpot determination value pre-stored in the ROM built in the main control (judging whether a jackpot game state is generated (called a "special lottery")), or the value of the counter that updates the random number for the jackpot symbol is taken out and judged whether it matches the probability hit determination value pre-stored in the ROM built in the main control (judging whether a probability fluctuation is generated). Here, "probability fluctuation" refers to the probability of winning a jackpot changing to a high probability (probability fluctuation) that is set higher than normal (low probability). In this embodiment, the range of the jackpot determination value (jackpot determination range) described above is set to values 32668 to 32767 at low probability and is read from the normal time determination table, while the range is set to values 32438 to 32767 at high probability and is read from the probability change determination table. In this way, in the special symbol and special electric device control process of step P86, when determining whether the value of the counter that updates the random number for jackpot determination matches the jackpot determination value previously stored in the main control built-in ROM, this is done based on whether the value of the counter that updates the random number for jackpot determination is included in the jackpot determination range.

If these judgment results are from the first start hole sensor 2104, various commands related to the special pattern 1 synchronization performance are created, while if the lottery result is from the second start hole sensor 2511, various commands related to the special pattern 2 synchronization performance are created and stored in the transmission information storage area as transmission information. In addition, the output of a lighting signal to the special pattern display 1185 is set to light up the special pattern display 1185 according to the determined special pattern variable display pattern, and stored as output information in the output information storage area mentioned above.

In addition, depending on the game state to be generated, for example, when a jackpot game state is reached, various commands classified as jackpot-related are created and stored in the transmission information storage area as transmission information, the output of a drive signal to the jackpot opening solenoid is set to open and close the opening and closing member, and stored in the output information storage area as output information, when the number of times (rounds) that the jackpot opening goes from a closed state to an open state is 2, the output of a lighting signal to the 2 round indicator lamp is set to light the 2 round indicator lamp of the round indicator, and stored in the output information storage area as output information, when the number of rounds is 15, the output of a lighting signal to the 15 round indicator lamp is set to light the 15 round indicator lamp of the round indicator, and stored in the output information storage area as output information, and the output of a lighting signal to the game state indicator is set to light a predetermined color to indicate whether or not a probability fluctuation has occurred, and stored in the output information storage area as output information.

Following step P86, the main control MPU 1311 performs normal symbol and normal electric role control processing (step P88). In this normal symbol and normal electric role control processing, input information is read from the input information storage area described above, and gate winning processing is performed based on this input information. In this gate winning processing, it is determined from the input information whether or not a detection signal from the gate switch 2352 has been input to the input terminal. Based on the result of this determination, when a detection signal has been input to the input terminal, the counter value for updating the random number for determining whether or not the normal symbol has been hit is extracted, and stored as gate information in the gate information storage area of the main control built-in RAM.

On the other hand, if processing related to the setting information is being executed (the result of step P3080 is "YES"), the main control MPU 1311 stops the progress of the game by skipping processes such as the prize ball control process (step P80). Then, a setting change/confirmation process is executed to change or confirm the setting information (step P3082). In the setting change/confirmation process, the setting information is displayed on the touch panel or liquid crystal display device 1600, or changes to the setting information are accepted from an input device such as a touch panel.

The main control MPU 1311 then determines whether the setting process (setting change/confirmation process) has been completed (step P3083). If the setting process has not been completed (the result of step P3083 is "NO"), the subsequent process is executed. On the other hand, if the setting change/confirmation process is completed (the result of step P3083 is "YES"), the main control recognition information is sent to the ball information control board (step P3084) and the process from step P92 onwards is executed. At this time, the memory area (work area) temporarily used to execute the setting process is initialized, and the setting confirmation in progress information is cancelled and other settings are made so that the setting process will not be executed thereafter. After that, the main control board 1310 enters a standby state for receiving the main control recognition information response signal until a response signal for the main control recognition information is received from the ball information control board.

As described above, when the setting information is changed or confirmed, the main control recognition information is sent to the ball information control board after the setting process is completed, whereas when the setting information is not changed or confirmed, the main control recognition information is sent to the ball information control board in the power-on process (step P3039). In this way, in this embodiment, the main control recognition information is sent to the ball information control board only once when the power is turned on. Also, when the setting process is executed, the main control recognition information is sent to the ball information control board only once after completion. This prevents the ball information control board from unnecessarily executing processing related to the setting information multiple times, and reduces the load at the time of starting up the gaming machine, thereby allowing the start-up to be completed quickly. Also, until a response signal for the main control recognition information is received from the ball information control board, the main control board 1310 is in a standby state for receiving the main control recognition information response signal (step P3070), so that the processing on the main control board side can be executed after the setting change is reliably notified.

Here, in the timer interrupt processing shown in FIG. 276, the processing from step P80 to step P90 was skipped during the setting processing, but the switch input processing (step P74), timer subtraction processing (step P76), and winning/losing random number update processing (step P78) may be skipped. Also, the port output processing (step P90) may be skipped. Since the processing for normal play is not executed during the setting processing, there is no problem with subsequent play even if these processing are not executed. Therefore, the load on the gaming machine during the setting processing may be reduced by skipping random number-related processing, or the random number-related processing may be executed while the setting processing is being executed by an employee of the gaming facility, etc., to progress the update of the random numbers and increase the randomness of the random numbers. Also, for the switch input processing and port output processing, the processing may be skipped during the setting change to reduce the load on the gaming machine, or the processing may be continued during the setting change to immediately reflect the results of the switch input received during the setting change after returning from the setting processing, or the port output may be continuously executed to prevent processing at the output destination from being delayed.

When the processing of step P88 or step P3084 is completed, the main control MPU 1311 performs port output processing (step P90). In this port output processing, output information is read from the output information storage area described above through the output terminal of the main control I/O port 1314, and various signals are output based on this output information. For example, when various commands from the ball information control board have been successfully received based on the output information, the output terminal of the main control I/O port 1314 outputs a main ball information ACK signal to the ball information control board, and when in a jackpot game state, a drive signal is output to the large prize opening solenoid that opens and closes the opening and closing member of the large prize opening, and a drive signal is output to the start opening solenoid 2550 that opens and closes the movable piece. In addition, various information (game information) signals related to the game, such as a 15-round jackpot information output signal, a 2-round jackpot information output signal, a probability fluctuation information output signal, a special pattern display information output signal, a normal pattern display information output signal, time-saving information output information, and a start opening winning information output signal, are output to the ball information control board.

Following step P90, the main control MPU 1311 performs a peripheral control board command transmission process (step P92). In this peripheral control board command transmission process, the transmission information is read from the transmission information storage area described above and transmitted to the peripheral control board 1510 as main circuit serial data. This transmission information includes various commands classified as related to special chart 1 synchronization performance, various commands classified as related to special chart 2 synchronization performance, various commands classified as related to big wins, various commands classified as power-on, various commands classified as related to normal chart synchronization performance, various commands classified as related to normal electric role performance, various commands classified as notification display, various commands classified as status display, various commands classified as test-related, and various commands classified as other, all of which were created in the timer interrupt process, which is this routine. The main circuit serial data is configured so that one packet is 3 bytes.

Specifically, the main serial data is composed of a status indicating the type of command with a memory capacity of 1 byte (8 bits), a mode indicating the variation of the presentation with a memory capacity of 1 byte (8 bits), and a sum value calculated by treating the status and mode as numerical values and adding them up, and this sum value is created at the time of transmission. The processing from step P74 to step P92 is referred to as the "game control processing."

Following step P92, the main control MPU 1311 sets the value C in the watchdog timer clear register WCL (step P94). By setting the value C in the watchdog timer clear register WCL in step P94, the value C is set in the watchdog timer clear register WCL following the value B set in step P70. As a result, the values A, B, and C are set in the watchdog timer clear register WCL in that order, and the watchdog timer is cleared.

Following step P94, the main control MPU 1311 switches (restores) the registers (step P96) and ends this routine. When the timer interrupt processing, which is this routine, begins, the main control MPU 1311 saves the contents of the general-purpose registers by stacking them in hardware. This prevents the contents of the general-purpose registers used in the initialization processing from being destroyed. In step P96, the contents saved in the stack are read out and written to the original registers. Note that the main control MPU 1311 sets interrupt permission after returning in step P96.

[16-3. Data transmission to ball information control board]
In the above-mentioned gaming machine, the transmission of data (main ball information serial data) from the main control board 1310 to the ball information control board was executed by the port output process of the timer interrupt process. As described above, the main ball information serial data includes information on the prize ball (prize ball command) and information for checking the connection status (self-check command), and also includes the main control recognition information in this embodiment.

Because the timer interrupt process is executed every 4 ms, the main ball information serial data was frequently sent to the ball information control board, but as long as the total number of prize balls is not incorrect and the player does not feel uncomfortable, it is not necessary to pay out the prize balls in the order of the winning balls at the winning ports. If multiple winning ports have won in a short period of time, for example, if a winning port set to "4" prize balls wins and then a winning port (large winning port) set to "15" prize balls wins, there is no problem with processing in the order of "15" prize balls and then "4" prize balls. Therefore, when a situation occurs in which prize ball commands are frequently created, such as during a jackpot game state, there is a risk of a temporary increase in the load.

Here, in this embodiment, the interval for transmitting data from the main control board 1310 to the ball information control board is set to be longer than the execution interval (4 ms) of the timer interrupt process (e.g., 100 ms), and the number of communications is reduced, thereby reducing the load of transmitting data from the main control board 1310 to the ball information control board. Also, instead of generating a prize ball command for each winning, prize ball information is aggregated for each communication cycle to the ball information control board, thereby reducing the amount of data communicated and further reducing the load. Below, an example of the configuration of the prize ball data to be sent to the ball information control board is explained.

Figure 277 is a diagram explaining an example of winning information transmitted from the main control board 1310 to the ball information control board. In this embodiment, as shown in Figure 277, the number of winning entries for each winning port including the gate is counted and stored as winning information. Then, each time a communication cycle arrives, the stored winning information is transmitted to the ball information control board. At this time, if the number of winning entries is 0, it is possible to choose not to transmit the information.

When the ball information control board receives winning information from the main control board 1310, it checks the number of winning balls against the prize ball number table shown in Figure 278. In the example shown in Figures 277 and 278, the number of winning balls at the gate is 1, the number of winning balls at the upper starting gate is 2, the number of winning balls at general winning gate 1 is 1, and the number of winning balls at general winning gate 2 is 1, so the number of winning balls at the gate is 1 x 0 = 1, the number of winning balls at the upper starting gate is 2 x 3 = 6, the number of winning balls at general winning gate 1 is 1 x 1 = 1, and the number of winning balls at general winning gate 2 is 1 x 1 = 1, and the total number of winning balls is 0 + 6 + 1 + 1 = 8.

In addition, the ball information control board may not hold a prize ball number table, but may include the number of prize balls in the winning information and send it. Furthermore, as with general winning ports, if the number of prize balls is the same even if they are located in multiple play areas, they may be aggregated. Figure 279 shows an example of when the number of prize balls is included in the winning information, where (A) is the case when the number of winning balls is tallied for each general winning port, and (B) is the case when the number of winning balls is tallied by aggregating the general winning ports. This eliminates the need to hold a prize ball number table on the ball information control board, and allows for centralized management on the main control board 1310.

In the example described in Figures 277 to 279, the winning information was created ignoring the winning order within a communication cycle, but in the past, the winning order was known by generating commands one by one when a prize was won. Figure 280 shows an example in which winning information is sent collectively for each communication cycle, while information regarding the winning order is added. Figure 280 shows an example in which winning information is stored in the order of winning.

In the example shown in FIG. 280, the sequence counter is incremented by 1 each time a game ball enters a winning port, and a record is generated consisting of the sequence, type of winning (winning port), number of winning balls, and number of winning balls. The number of winning balls may be omitted if it is stored in the ball information control board. Also, the number of winning balls may be omitted as it is usually one, but if consecutive winnings occur in the same winning port, the number of winning balls may be incremented by the number of consecutive winning balls.

In the example shown in Figures 277 to 279, the number of winning prizes is incremented by 1 for each win, and winning information to be sent is created at the same time as sending the winning information to the ball information control board, but in the example shown in Figure 280, each record of the winning information is generated for each win, and the generated winning information is sent for each communication cycle. In either case, the winning information sent is discarded, and in the examples shown in Figures 277 to 279, the number of winning prizes is cleared to 0. Also, in the example shown in Figure 280, records that have already been sent can be deleted.

As shown in the examples of Figs. 277 to 279, the processing load at the time of winning can be reduced by counting only the number of winning balls while ignoring the winning order. On the other hand, as shown in the example of Fig. 280, the winning order can be maintained by creating winning information at the time of winning, and since the winning information does not need to be created again when transmitting the winning information and the generated winning information can be transmitted as is, the load at the time of transmitting the winning information can be reduced. In addition, the number of winning balls can be reduced by adding the number of winning balls when the same winning hole is continuously won. Normally, in a jackpot game state, the game ball is shot aiming at the big winning hole, and in the case where a winning hole that can win only in a specific game state (for example, a high probability state) is arranged, the game ball is shot aiming at this winning hole when the specific game state is reached, so that the increase in the number of winning information can be suppressed, especially in a state where the number of winning balls is large.

The above describes the configuration for transmitting winning information from the main control board 1310 to the ball information control board. The information transmitted from the main control board 1310 to the ball information control board includes not only winning information (prize ball information, prize ball command), but also game status signals and self-check commands for checking the connection status between the main control board 1310 and the ball information control board, and furthermore, in this embodiment, main control recognition information is transmitted when the power is turned on or during the setting process (setting change/check).

Here, the game status signal needs to be sent to the ball information control board at least every time the game status changes. Therefore, by sending the winning information in the same communication cycle as the winning information, and aggregating the winning information, game status signal, and other information sent to the ball information control board as game information in a common format, the transmission process can be standardized and control can be simplified.

Figure 281 shows an example of game information sent from the main control board 1310 to the ball information control board, where (A) is an example of winning information and (B) is an example of main control recognition information. In the example shown in Figure 281, in order to distinguish the type of data to be sent, a major classification of "data type" and minor classifications of "type 1" and "type 2" are defined. The items for distinguishing the types of data can be changed as necessary. For example, the data types can be defined in detail to exclude other types, or items can be added to enable more detailed classification. Note that in Figure 281, the names of the items for distinguishing the types of data are written as they are for ease of understanding, but in reality, pre-coded information is set. Also, in the example shown in Figure 281, two types of data can be stored, and the size of each data is 1 byte.

Figure 281 (A) shows data corresponding to winning information, and the data type is set to "winning" (or "prize balls"), which indicates that the data is winning information (prize ball data). In addition, type 1 is set to the type of winning port, and type 2 is set to information that identifies the winning port. In this case, if only the information that identifies the winning port is set, one of the items may be left blank. In the example shown in Figure 281, two types of data can be set, and in the example shown in (A), the number of prize balls and the number of winning balls can be set. Note that, since the number of prize balls and the number of winning balls do not actually exceed 100, the number of prize balls may be set in the upper 4 bits and the number of winning balls in the lower 4 bits, and the number of prize balls and the number of winning balls may be set in one item. In addition, if there is no winning, data indicating that there is no winning and that the number of prize balls is 0 may be transmitted.

In FIG. 281(A), five types of prize ball information (prize ball commands) are transmitted in one data (command) transmission cycle, but more (for example, 10 types) of prize ball information may be transmitted in one cycle. On the other hand, if the number of data (commands) transmitted becomes too large, such as when a large number of prize balls are generated, the load per unit time on the data (command) transmission side (main control board 1310) and the reception side (ball information control board 110) will be high, so an upper limit may be set for the amount of data (commands) transmitted in one cycle. In this case, the amount of data (commands) that could not be transmitted in one cycle (exceeding the upper limit) is transmitted in the next cycle. In addition, when a large number of prize balls are generated, such as during a jackpot, a time lag occurs between the actual winning and the amount of prize balls added, which may cause the player to feel uncomfortable. However, in reality, since the firing cycle is 600 ms and the data (command) transmission cycle is about 100 ms, even if the upper limit is temporarily exceeded, the upper limit is immediately exceeded, so the player is less likely to feel uncomfortable. Also, while the firing cycle is fixed (600 ms), the command transmission cycle can be set arbitrarily, so the more the data (command) transmission cycle is set shorter than the firing cycle, the more likely it is that the number of data (commands) being transmitted will exceed the upper limit, preventing time lags from occurring.

Figure 281 (B) is an example of a case where a chip ID for identifying the main control MPU 1311 of the main control board 1310 included in the main control recognition information is transmitted. Here, the data length of the chip ID is set to 4 bytes, and it is stored as data for two records. The chip ID is recorded in the main control MPU 1311, and can be defined in a specific register, for example, and read out from a program. In this embodiment, it is possible to transmit data (commands) of multiple types of data types in one cycle, but if the upper limit of the number of data (commands) that can be transmitted in one cycle is exceeded, a priority order may be set for each data type, and data (commands) with a higher priority may be transmitted preferentially. For example, as described above, it is easy to generate a large amount of data for prize ball information compared to other data, but as described above, even if a slight time lag occurs, the player is unlikely to feel uncomfortable, so data (commands) of other data types may be transmitted preferentially. Note that, regardless of the data type, the data (commands) may be transmitted up to the upper limit in the order in which they are generated.

In the example shown in Figure 281, the data size is fixed, so when transmitting large amounts of data, there is a problem that the number of records becomes large. For example, if the chip ID included in the main control recognition information shown in Figure 281 (B) is 9 bytes, five records of data must be transmitted, and all information such as the data type must be set in each record. Therefore, by setting the data length in each record and making the data variable length, it is possible to accommodate many types of data. Figure 282 is a diagram showing another example of game information transmitted from the main control board 1310 to the ball information control board.

In the example shown in FIG. 282, an item indicating the data length is added, and data of any size within the allowable range can be stored in the item indicating the data. In the example shown in FIG. 282, since there is no need to divide the data, the number of items indicating detailed classification is reduced from two to one. Note that since the data to be sent is of variable length and may be large in volume, an item for checking such as a checksum may be added.

Next, the communication between the main control board 1310 and the ball information control board will be described. Figure 283 is a diagram explaining the communication between the main control board 1310 and the ball information control board when the gaming machine is started. In the gaming machine 1 of this embodiment, when the power is turned on and the main control board 1310 is started, the main control recognition information is notified to the ball information control board by initialization processing or timer interrupt processing (main control recognition information notification). As described above, the main control recognition information is information for identifying the main control board 1310, and the ball information control board judges whether the received main control recognition information is normal or not. If the main control recognition information notification is not normal, for example, if the main control board 1310 is not genuine but has an illegal MPU installed, it is notified that the main control board 1310 is abnormal.

In addition, if the time from when the power is turned on until the main control recognition information notification is sent exceeds a predetermined time (e.g., 200 seconds), it is determined that an abnormality has occurred and the abnormality is notified. At this time, the startup of the main control board 1310 may be continued, and if the startup process is completed during the abnormality notification, the alarm output may be stopped at that point, or the notification may be continued. If the notification is to be continued, an employee of the gaming facility or the like may check the situation and decide whether or not to continue using the gaming machine.

When the ball information control board receives a main control recognition information notification from the main control board 1310, it transmits a response signal (main control recognition information response notification) to the main control board 1310. When the main control board 1310 receives the main control recognition information response notification from the ball information control board, it becomes ready to start normal play.

Then, the main control board 1310 periodically transmits game information to the ball information control board (game information notification). As mentioned above, the transmission interval of game information is 100 milliseconds. A specific example of game information is prize ball information (prize ball command). When the ball information control board receives game information from the main control board 1310, it transmits a response signal (game information response notification) to the main control board 1310. In this way, by transmitting a response signal from the ball information control board in response to the game information notification from the main control board 1310, it is possible to ensure that communication is being carried out normally. Note that when the ball information control board notifies the main control board 1310, a response signal is also transmitted from the main control board 1310 to the ball information control board.

Next, we will explain what happens when an abnormality occurs in the communication between the main control board 1310 and the ball information control board. Figure 284 is a diagram showing a case in which there is no response from the ball information control board to a notification from the main control board 1310 in the communication between the main control board 1310 and the ball information control board of a gaming machine.

In the example shown in FIG. 284, the main control board 1310 notifies the ball information control board of game information at a predetermined communication cycle, and if there is no response from the ball information control board a predetermined number of times in a row, it is determined that an abnormality has occurred, communication is cut off, and the occurrence of the abnormality is reported. Here, the predetermined number is set to eight times, and the same game information is notified a maximum of eight times. Even after communication from the main control board 1310 is cut off, if a response signal is received from the ball information control board, it is determined that the board has returned to a normal state, the communication cutoff is lifted, and processing is resumed. In the example shown in the figure, if a response signal cannot be received within one communication cycle, a notification is made again, but it is also possible to stop the notification for the next cycle and wait for a response, and determine that one communication has failed if a response signal cannot be received after the end of the next cycle. By configuring in this way, it is possible to avoid missing a response signal.

In addition, when there is no response from the ball information control board, in addition to the case where game information has not reached the ball information control board from the main control board 1310, there is also the case where game information has reached the ball information control board from the main control board 1310 but the response signal has not reached the main control board 1310 from the ball information control board. Here, in the latter case when the game information is prize ball information (prize ball command), there is a risk that prize balls will be paid out consecutively based on the same prize ball information, and there is a risk of a discrepancy occurring between the game lottery result and the number of prize balls paid out. Therefore, in order to avoid such a malfunction, an example will be described in which the next game information is sent without resending the game information even if the response signal cannot be received normally.

Figure 285 is a diagram showing another example of communication between the main control board 1310 of a gaming machine and the ball information control board, in which there is no response from the ball information control board to a notification from the main control board 1310. Here, similar to the example shown in Figure 284, gaming information is transmitted at each communication cycle, and even if a response signal is not received, the next gaming information is transmitted. Then, if a response signal is not received the maximum number of consecutive transmissions (e.g., eight times), it is determined that an abnormality has occurred, communication is cut off, and the occurrence of the abnormality is notified. By configuring in this way, it is possible to reduce the possibility of a discrepancy in the number of prize balls occurring when the gaming information is prize ball information.

In addition, retransmitting the same game information may cause newly generated game information during the progress of the game to accumulate in the buffer and become unable to be stored, but this can be prevented. Note that processing may differ depending on the type of data, such as sending the next information without retransmission only in the case of winning ball information, for which a large amount of data may be generated, while retransmitting other information for which a relatively small amount of data is generated, as shown in FIG. 284. In this case, the number of times a response signal cannot be received consecutively (number of transmission failures) is counted, and when a predetermined number of times is reached, communication is cut off and an abnormality is notified.

[17. Edge Buffer for Fraud Detection]
In the gaming machine of this embodiment, a predetermined gaming value (prize balls) can be obtained by winning a game medium in a prize-winning device. The winning of a game medium is detected by a sensor or a switch provided in the prize-winning device, and the detection results are input at a predetermined interval and stored in a predetermined memory area.

In addition, winning game media is subject to a valid period during which the winning device can accept winnings. However, to detect malfunctions or fraudulent activity, winnings outside the valid period are also counted, and if the number of winnings outside the valid period reaches or exceeds a predetermined value, it is determined that an abnormality has occurred, and a security signal is output to the outside or an abnormality is reported.

In this way, when paying out prize balls, etc., it is necessary to detect only winnings within the valid period, but when detecting abnormalities, it is necessary to detect winning of gaming media regardless of the valid period. This could lead to a complex input judgment process for various signals input by sensors, switches, etc.

In this embodiment, there is provided a buffer 1 (first storage area) that constantly counts and stores various signals input by sensors, switches, etc., and a buffer 2 (second storage area, edge buffer for fraud determination) that counts and stores various signals input depending on the state, such as whether or not it is within the valid period (or outside the valid period). This makes it possible to standardize most of the processing associated with input determination simply by switching the location that specifies the area to be referenced depending on the state when the input determination process is executed, and to simplify the entire processing associated with winning determination.

[17-1. Buffer structure]
First, the structure of the buffer that temporarily stores information to execute various processes will be described. This buffer is assigned to a RAM (main control built-in RAM) built into the main control MPU 1311 as an input information storage area. The input information storage area may be assigned to a RAM provided outside the main control MPU 1311. The input information storage area stores various signals input to the input terminals of various input ports of the main control MPU 1311. In addition to the input information storage area, the main control built-in RAM is assigned an area for storing information such as backup flags and checksums for determining whether the contents of the RAM are normal or not when the power is turned on, random numbers for various lotteries, and commands to be sent to the peripheral control board 1510 and the payout control board 951.

Figure 286 is a diagram showing an example of memory areas allocated to the main control built-in RAM in game control by the gaming machine of this embodiment. Each memory area includes a backup flag area, checksum area, input level data area, input edge data area, prize ball determination area, etc., and also includes areas for storing various random number values used in lotteries and commands to be transmitted. Each area is divided into 1-byte units, and is an area of 1 byte or multiple bytes.

Next, the configuration of the input information storage area will be explained. Here, the configuration of the input information storage area that stores input information indicating the detection of a game ball entering a winning slot, specifically, the input edge data 1 area (INPUT_EDG1) and the prize ball determination area (PAY_JDG_AR) will be explained. Figure 287 is a diagram showing an example of a data area included in the input information storage area of this embodiment, where (A) shows the input edge data 1 area (INPUT_EDG1) and (B) shows the prize ball determination area (PAY_JDG_AR).

As shown in (A), the input edge data 1 area (INPUT_EDG1) is composed of 1 byte (8 bits), and the input information of the switch (sensor) corresponding to each bit is stored. Specifically, Bit 0 is the first start port sensor 2104 that detects the entry of a ball into the first start port 2002, Bit 1 is the second start port sensor 2511 that detects the entry of a ball into the second start port 2004, Bit 2 and Bit 3 are the general prize port sensor 3015 that detects the entry of balls into the general prize ports 2001 and 2201, Bit 4 is the count switch (large prize port sensor) that detects the entry of balls into the large prize port 2005, Bit 5 is unused, and Bit 6 is the input information from a sensor that detects the entry of balls into the discharge port. In addition to the start prize port and the large prize port, the gaming machine in this embodiment has a probability change area (V area of V-AT), and Bit 7 is the input information from a sensor that detects the passage of a game ball through the probability change area. The probability change area sensor is a sensor that detects only the passage into the V area, and unlike other sensors, it is not a sensor that includes a prize ball. The arrangement of the bits may be any arrangement, for example, bit 0 may correspond to the second start hole 2004, bit 1 may correspond to the big prize hole 2005, and the sensors that are the subject of the judgment as to whether or not the valid period is in progress may be arranged consecutively.

As shown in (B), the prize ball determination area (PAY_JDG_AR) is composed of one byte (8 bits) like the input edge data 1 area (INPUT_EDG1), and the input information of the switch (sensor) corresponding to each byte is stored. Each bit of the prize ball determination area corresponds to each bit of the input edge data 1 area, but the second start port (Bit 1), the big prize port (Bit 4), and the probability change area (Bit 7) are set to "1" (ON) only when the sensor detects them during the valid period. In other words, the input information from each sensor is set as is in each bit of the input edge data 1 area, but among the bits of the prize ball determination area, the bits corresponding to the winning device (winning area) for which a valid period is set for receiving game balls are set to "1" only when they are detected by the sensor during the valid period.

The valid period of the second starting opening 2004 is set to a period from when the normal electric device is opened by the passage of the game ball through the gate 2003 and the second starting opening 2004 is ready to receive the game ball until the normal electric device is closed (normal electric device opening time), plus a validity determination period (OFF delay, for example, 1000 ms) that takes into account the time the game ball stays inside the second starting opening 2004 after the normal electric device is closed. Similarly to the second starting opening 2004, the validity determination period of the large winning opening 2005 is set to a period (OFF delay, for example, 1994 ms) that takes into account the time lag between the time the large winning opening 2005 is opened (large winning opening opening time) and the time the large winning opening 2005 stays inside the large winning opening 2005 and the time it is detected by the count sensor. On the other hand, in the special probability area (the V area of the V-AT), the special probability area valid period is set when the V attacker (the large prize opening) is opened, and the validity determination period after the special probability area valid period ends is not set.

[17-2. Switch input processing]
Next, the procedure for setting data in the buffer described above will be described. Fig. 288 is a flow chart showing an example of the procedure for switch input processing for acquiring information detected by a sensor or the like provided in the gaming machine of this embodiment. The switch input processing is executed in the processing of step S74 in the timer interrupt processing shown in Fig. 23.

The procedure shown in FIG. 288 is an excerpt of the procedure for storing winning information for the start winning slot and the large winning slot in the input edge data 1 area (INPUT_EDG1, buffer 1) and the prize ball determination area (PAY_JDG_AR, buffer 2), and similar processing is possible when storing information such as the detection signal of the magnetic detection sensor 4024 and the payer ACK signal from the payout control board 951. Also, in the switch processing shown in FIG. 288, an example is described in which data for one port (one byte) of the input edge data 1 area (INPUT_EDG1) and the prize ball determination area (PAY_JDG_AR) is processed, but this is not limited to this, and if the input port of the switch is two bytes or more, processing is performed for the corresponding number of bytes.

The main control MPU 1311 of the main control board 1310 first determines whether each switch has changed from OFF to ON from the switch input port, and generates switch edge information (step P6001). It then stores the generated switch edge information in the input edge data 1 area (step P6002), and sets the number of valid winning determinations (step P6003). The switch edge information is data that compiles individual input information (switch input information) corresponding to each switch in byte units. The number of valid winning determinations may correspond to the number of switch input information included in the switch edge information, or may be the number of bits of the switch edge information.

Then, the main control MPU 1311 determines whether or not the switch corresponding to the winning judgment is within its valid period (step P6004), and clears the update of the switch input information outside the valid period. Specifically, if the switch corresponding to the winning judgment is not within its valid period (the result of step P6004 is "no"), the switch edge information corresponding to the winning judgment of the input edge data 1 area is cleared (step P6005).

Then, after clearing the updates of the switch input information that is outside the valid period, or if it is within the valid period (the result of step P6004 is "yes"), the main control MPU 1311 updates the number of valid winning judgments by -1 to change the switch input information to be judged (step P6006). Furthermore, it updates the valid period of the switch corresponding to the winning judgment by -1 (step P6007). Note that for switches for which a valid period is not set, the process from step P6006 onwards is executed without clearing the switch input information. In this case, the judgment of the valid period may be such that the process is unconditionally skipped for switch input information for which a valid period is not set, or, for example, the valid period may be set to a large value so that it is always within the valid period.

Then, the main control MPU 1311 judges whether the number of valid winning judgments has reached 0, i.e., whether the valid winning judgments have been completed for all switch input information included in the switch edge information (step P6008). If the valid winning judgments for all switch input information have not been completed (the result of step P6008 is "no"), the process is executed again from step P6004. Note that in this process, the timer that judges the valid period is updated after judging whether it is within the valid period, but it may also be updated together with other timers in various timer update processes executed at each timer interrupt.

When the main control MPU 1311 has completed the winning validity determination for the switch input information included in the switch edge information for which a validity period is set and the number of winning validity determinations becomes 0 (the result of step P6008 is "yes"), it stores the switch edge information reflecting whether or not the switch input information for which a validity period is set is within the validity period in the prize ball determination area (step P6009).

As described above, by storing the switch input information in the input edge data 1 area as it is and storing the switch input information in the prize ball determination area taking into account the valid period, the processing can be simplified by referring to the area corresponding to the processing. For example, in the prize ball control processing executed when paying out prize balls (step S80 of the timer interrupt processing (FIG. 23)), when determining whether or not there is a prize ball, it is not necessary to perform processing such as judging whether or not there is a prize ball by a sensor that only awards balls during the valid period, or judging whether or not to execute a prize ball depending on whether or not it is during the valid period, and when paying out prize balls, it is possible to pay out prize balls by simply referring to the information in the prize ball determination area, and it is possible to simplify the prize ball payout processing. In addition, when counting the number of game balls that entered outside the valid period for a sensor that does not win outside the valid period by the fraud detection processing (step S84 of the timer interrupt processing (FIG. 23)), it is possible to detect fraudulent winning by counting the number of winnings that entered outside the valid period (the number that is thought to be fraudulent winning) by referring to the information in the input edge data 1 area. In addition, it is possible to count illegal wins by calculating the difference between the number of wins detected by the input edge data 1 area and the number of wins detected by the winning ball determination area.

[17-3. Large prize opening process]
Next, the large prize opening process that controls the large prize opening 2005 that is opened by winning the lottery will be described. In the large prize opening process, when a game ball enters the large prize opening 2005, it is detected by a count switch (large prize opening sensor), and the number of game balls that entered the large prize opening 2005 is counted by the switch input process described above. FIG. 289 is a flowchart explaining the procedure of the large prize opening process of this embodiment. The large prize opening process is called from the special symbol/special electric device control process (step S86) in the timer interrupt process. In addition, the special symbol/special electric device control process calls a process corresponding to the special symbol/electric device operation number including the large prize opening process after each start opening pass process is executed. In the large prize opening process, the number of game balls that entered the large prize opening is counted based on the information of the large prize opening (count) switch generated by the switch input process described above.

The main control MPU 1311 of the main control board 1310 first obtains the number of winnings in the large prize opening from the prize ball judgment area (PAY_JDG_AR) (step P6011). Specifically, the number of large prize opening count switches is set as the number of loops, and one bit of the large prize opening count switch is set as the judgment bit value. The presence or absence of a winning is judged from the value of the large prize opening count switch in the prize ball judgment area and the judgment bit value for the number of loops, and the number of winnings in the large prize opening is counted. Furthermore, it is judged whether the acquired number of winnings in the large prize opening is less than the maximum number of winnings in the large prize opening (step P6012). The maximum number of winnings in the large prize opening is the specified number of winnings for closing the large prize opening 2005 after it is opened in one round. Even if the game balls do not win the maximum number of winnings in the large prize opening, the large prize opening 2005 closes after a predetermined period has passed.

In the process of step P6011, the number of winning entries in the large prize entry port is counted by looping the number of count switches of the large prize entry port 2005. At this time, if there is a single count switch, the number of loops is set to 1, and the number of winning entries in the large prize entry port in the prize ball judgment area is counted for one loop. In a configuration with multiple large prize entry ports, the number of loops is set to the number of count switches, and the number of winning entries in the large prize entry port in the prize ball judgment area is counted for the number of loops. In the case of a single count switch, the number of winning entries in the large prize entry port may be counted only once without setting the number of loops, but since the number of count switches in the large prize entry port 2005 differs depending on the gaming machine, it is necessary to provide two types of large prize entry port opening processing for one count switch and multiple count switches. Therefore, in order to enable the large prize entry port opening processing to be executed in common without affecting the number of large prize entry port switches, the number of loops is set to 1 even in the case of a single count switch.

In addition, for over-entries during a jackpot (entering the large prize opening 2005 with game balls exceeding the maximum number of entries for the large prize opening), the determination is made based on the value of the prize ball determination area since the large prize opening 2005 is within its valid period (note that the determination can also be made based on the value of the input edge data 1 area). On the other hand, for illegal entries other than a jackpot (illegal entries into the large prize opening 2005), illegal entries are determined based on the value of the input edge data 1 area, since they cannot be counted using the value of the prize ball determination area.

When the number of winnings at the large prize opening is equal to or greater than the maximum number of winnings at the large prize opening (the result of step P6012 is "no"), the main control MPU 1311 sets the large prize opening over winning flag to the large prize opening over winning flag since an over winning has occurred at the large prize opening (step P6013). Note that the number of winnings at the large prize opening is obtained from buffer 2 (the prize ball determination area) to determine an over winning, but the number of winnings at the large prize opening may be counted in buffer 1 (the input edge data 1 area) to determine an over winning. In addition, the number of winnings at the large prize opening continues to be counted even while the large prize opening 2005 is closed, and when the number of winnings at the large prize opening exceeds the maximum number of winnings at the large prize opening, the large prize opening over winning flag is set to the large prize opening over winning flag. The main control MPU 1311 then sets the special prize opening open status number to "00H" and then closes the special prize opening 2005 (step P6015).

On the other hand, if the number of winnings in the large prize opening is less than the maximum number of winnings in the large prize opening (the result of step P6012 is "yes"), the main control MPU 1311 refers to the value of the timer that measures the opening time of the large prize opening and determines whether the opening time of the large prize opening has ended (step P6014). If the opening time of the large prize opening has not ended (the result of step P6014 is "no"), this process ends and the large prize opening 2005 continues to accept game balls.

When the opening time of the large prize opening 2005 has ended (the result of step P6014 is "yes"), the main control MPU 1311 performs settings to close the opened large prize opening 2005 (step P6015). In the processing of step P6015, the data required to close the large prize opening 2005 is set.

When the processing of step P6015 is completed, the main control MPU 1311 sets the operation of the large prize opening 2005 (step 6016). Specifically, the large prize opening opening/closing time data is obtained from the selected large prize opening opening pattern and set in the special power operation signal output timer. The special power operation signal output timer is set with a time (valid period) for determining whether the large prize opening switch is valid or not. The valid period is the interval time between large prize opening openings (large prize opening closing time) -α. Note that if the valid period is longer than the large prize opening closing time, a time longer than the closing period will be set, so that a new value is set by opening the large prize opening 2005 before the timer reaches 0. The opening time corresponding to the large prize opening opening pattern at the start of opening the large prize opening 2005 is set in the special power operation signal output timer. For example, if the opening pattern of the large prize slot 2005 is 29 seconds for rounds 1-7 and 9-16, and 5 seconds for round 8, the special signal operation output timer will be set to 29 seconds before the start of rounds 1-7 and 9-16, and 5 seconds before the start of round 8.

Then, the main control MPU 1311 judges whether or not to continue opening the large prize opening 2005, that is, whether or not it is the final round (step P6017). If the large prize opening 2005 is to continue to be opened (it is not the final round) (the result of step P6017 is "yes"), this process is terminated. If the large prize opening 2005 is not to be opened (it is the final round) (the result of step P6017 is "no"), processing after the end of the large prize is executed, such as setting an ending command for setting the ending (step P6018). In the processing after the end of the large prize, a validity determination period (OFF delay period) corresponding to the ending time in which the detection of the game ball by the count switch is valid after closing the large prize opening 2005 is set. The validity determination period corresponding to the ending time may be the same as the time for each large prize opening opening interval, but may also be a different time (for example, a time corresponding to the ending period, etc.).

[17-4. Timing chart (big prize gate)]
Next, the process of detecting the entry of a gaming ball into the big prize opening 2005 will be described in chronological order. Fig. 290 is a timing chart for explaining the process of each component when a gaming ball enters the big prize opening 2005 in the gaming machine of this embodiment. Note that the numerical information and time values, etc., described on the timing chart are merely examples, and are not limited to these values.

In the example shown in FIG. 290, as described above, the effective time is set at the start of the jackpot. For example, the effective time is the opening time of the jackpot when it is open, and the closing interval period -4 ms when it is closed. The initial value of the fraudulent count value is set to a value (L) corresponding to the type of jackpot, and is subtracted sequentially when a game ball is detected entering the jackpot 2005 regardless of whether it is within or outside the valid period, and it is considered that fraud has occurred when it reaches 0. The initial value of the fraudulent count value is, for example, 16 x (10 + 3) = 208 for jackpot 1 with 16 rounds and 10 counts, and 4 x (9 + 3) = 48 for jackpot 2 with 4 rounds and 9 counts. In addition, in the case of jackpot 3 with 12 rounds (effectively 2 rounds and 5 counts), it is set to 2 x (5 + 3), and the total is determined to be 26, assuming that at most one prize is won in 10 rounds (10 x 1). The timing chart is explained below.

First, at time t1, a win occurs in the large prize opening 2005 during the valid period (winning sensor (count switch) OFF → ON), and the corresponding bit (large prize opening count switch) in buffer 1 (input edge data 1 area (INPUT_EDG1)) is set to "1", and similarly, the corresponding bit (large prize opening count switch) in buffer 2 (prize ball determination area (PAY_JDG_AR)) is also set to 1. At this time, "1" is added to the number of large prize opening wins N based on the value of buffer 2. Furthermore, "1" is subtracted from the fraud count based on the value of buffer 1 (M-1). Furthermore, a performance command related to a large prize opening win, such as a large prize opening win command, is sent to the peripheral control board 1510, and a prize ball number command for the large prize opening win is sent to the payout control board 951.

At time t2, just like time t1, a win occurs at the large prize slot during the valid period, and the corresponding bits (large prize slot count switches) of buffer 1 and buffer 2 are set to "1". Furthermore, "1" is added to the number of wins at the large prize slot based on the value of buffer 2 (N+2), and "1" is subtracted from the fraud count based on the value of buffer 1 (M-2). Furthermore, corresponding commands are sent to the peripheral control board 1510 and the payout control board 951.

At time t3, the big win game ends, and the initial value (15) of the fraudulent count value is set. As described above, the effective time of the big win opening 2005 is the time during which the big win opening is open plus the time during which winning detection is permitted. The initial value of the fraudulent count may be set at the end timing of the big win ending, for example, during the special symbol change waiting process (not shown) in the special symbol and special electric device control process.

After that, from time t4 to t6, an illegal entry occurs in which a game ball enters the large prize opening 2005 in a state other than a jackpot (large prize opening not activated), and the corresponding bit (large prize opening count switch) of buffer 1 corresponding to the input edge data 1 area is set to "1" (valid, ON), while the corresponding bit (large prize opening count switch) of buffer 2 corresponding to the prize ball determination area is set to "0" (invalid, OFF). The illegal count is then decremented by "1" based on the value of buffer 1. Performance commands and prize ball commands are sent based on the value of buffer 2, but because the value of buffer 2 is "0" (invalid, OFF) at this time, these commands are not sent in the case of an illegal entry.

At time t8, another illegal win occurs, and the illegal count is subtracted by 1, causing it to reach "0". This starts the output of a security signal (external output signal) (output at 30 seconds). Furthermore, to start an illegality alert, an alert command is sent to the peripheral control board 1510. In this case as well, no prize ball command is sent. Note that it is possible to output either the illegality alert or the security signal, but not both.

Furthermore, at time t9, the fraud count number is set to 1. This allows the security signal (external output signal) to be output and the fraud notification to be continued even if fraudulent winning continues to occur. Note that times t8 and t9 are executed within the same timer interrupt.

At time t10, another illegal win occurs, and the illegal count is decremented by "1". Because the illegal count was set to "1" at time t9, it becomes "0" again, and the security signal (external output signal) starts to be output again (output for 30 seconds). Furthermore, to start the illegal alert again, an alert command is sent to the peripheral control board 1510. Note that if another illegal win is detected while the security signal is being output, the output time is reset (extended) while the security signal continues to be output. Then, at time t11, the illegal count is set to "1" again. The processing at times t10 and t11 is executed within the same timer interrupt.

After that, at time t12, the lottery results in a jackpot, and the valid time and the number of illegal counts during the jackpot are set to their initial values (L). At time t13, just like time t2, a win occurs in the large prize slot during the valid period, and the corresponding bits (large prize slot count switches) of buffer 1 and buffer 2 are set to "1". Then, based on the value of buffer 2, "1" is added to the number of wins in the large prize slot (1), and based on the value of buffer 1, "1" is subtracted from the illegal count (L-1). Furthermore, a prize ball command is sent to the peripheral control board 1510, and a performance command is sent to the payout control board 951.

In the gaming machine described above, the large prize opening 2005 (game medium receiving means), which pays out prize balls based on the result of the display of the changing patterns by lottery based on the fact that the game ball (game medium) has been accepted (passed through) the start opening (start area), becomes able to accept the game ball (game value imparting means). The accepted game ball is detected by a count switch (large prize opening sensor, game medium detection means) provided in the large prize opening 2005, and stored in an input information storage area (game medium detection information storage means). The input information storage area is assigned a buffer 1 (first storage means) that constantly stores input information (game medium detection information) when the large prize opening 2005 accepts a game ball, and a buffer 2 (second storage means) that stores input information (game medium detection information) when the game ball is accepted during a valid period (predetermined period) based on the result of the display of the changing patterns (lottery result). By configuring it in this way, it is possible to refer to buffer 2 when paying out winning balls, and to refer to buffer 1 (and buffer 2) to detect illegal wins (occurrence of abnormalities), and to count the number of illegal wins, etc.

[17-5. Timing chart (second starting port)]
The above describes the case where a game ball wins the big winning hole 2005. Next, the process of detecting the winning of a game ball in the second starting hole 2004 equipped with a normal electric device will be described in chronological order. FIG. 291 is a timing chart for explaining the process of each component when a game ball wins in the second starting hole 2004 equipped with a normal electric device in the gaming machine of this embodiment. Note that the numerical information and time values described on the timing chart are merely examples and are not limited to these values.

First, at time t1, the valid time is set when the normal electric device starts to open. The valid time is, for example, the operation time (=open time) of the normal electric device. In addition, an initial value for the fraud count is set (for example, "15"). The initial value for the fraud count is, for example, the maximum number of winnings when the normal electric device is in operation + α.

At time t2, a winning entry into the second start port 2004 occurs during the valid period, and the corresponding bits (second start port switch) of buffer 1 (input edge data 1 area) and buffer 2 (prize ball determination area) are set to "1". Furthermore, "1" is added to the reserved memory number N based on the value of buffer 2, and "1" is subtracted from the fraud count based on the value of buffer 1. A lottery is then executed based on the winning entry, and various performance commands (e.g., a look-ahead command, a reserved number increase command) are sent to the peripheral control board 1510 based on the lottery result and the increase in the reserved number. Furthermore, a prize ball command corresponding to the winning entry into the second start port 2004 is sent to the payout control board 951. At time t3, a winning entry into the second start port 2004 occurs during the valid period, so it is treated as a normal winning entry in the same way as at time t2.

At time t4, the effective time for the second starting port 2004 to receive game balls has elapsed (ended), and the initial value of the fraud count value (fraudulent judgment number: "10") is set. As described above, the effective time for the second starting port 2004 to receive game balls is the operation time of the normal electric role, plus the time from when the normal electric role is closed to when winning detection is permitted. Note that the fraud judgment number is set to a different value when the normal electric role is opened and after it is closed, but it may be the same, or a larger value may be set when the normal electric role is opened than after it is closed. Also, if there are multiple types of opening times for the normal electric role, the fraudulent winning number may be switched according to the opening time. For example, the fraudulent winning number is set to 3 for a short opening and 15 for a long opening (or multiple openings).

After that, from time t5 to t8, when an illegal winning occurs in which a game ball enters the second start hole 2004 while the normal electric device is not in operation, the corresponding bit (second start hole switch) of buffer 1 corresponding to the input edge data 1 area is set to "1" (valid, ON), and the corresponding bit (second start hole switch) of buffer 2 corresponding to the prize ball determination area is set to "0" (invalid, OFF). Then, the illegal count is decremented by "1" based on buffer 1. At this time, since the illegality is determined based on the value of buffer 1, no performance command or prize ball command is sent in the case of an illegal winning. In other words, if the winning of the second start hole 2004 is determined to be valid, processing is performed based on the value of buffer 2, and if the illegality is determined (the illegal count is counted), processing is performed based on the value of buffer 1.

As described above, if a winning entry (normal winning entry) occurs in the second start port 2004 during the valid period, the corresponding bit (second start port switch) of buffer 1 and buffer 2 is set to "1", and various commands are sent to the peripheral control board 1510 and the payout control board 951. If a winning entry occurs in the second start port 2004 outside the valid period, only the corresponding bit of buffer 1 is set to "1", and the fraud count is updated without sending various commands that are sent in normal cases. Note that instead of updating the fraud count when setting the value of each buffer, the fraud count may be updated based on the value of each buffer after updating the value of each buffer. This makes it possible to separate the module that updates the value of each buffer from the module that updates the fraud count, and the process from switch input to setting the value of the corresponding buffer can be shared. The fraud count can be updated based on the value of each buffer, for example, in cases other than when the corresponding bit values of buffer 1 and buffer 2 are both "1", or when the corresponding bit value of buffer 1 is "1" and the corresponding bit value of buffer 2 is "0".

At time t9, another illegal win occurs, and the illegal count is subtracted by "1", causing it to reach "0". This starts the output of a security signal (external output signal) (output at 30 seconds). Furthermore, to start an illegality alert, an alert command is sent to the peripheral control board 1510. In this case as well, no prize ball command is sent. Note that it is possible to output either the illegality alert or the security signal, but not both.

Furthermore, at time t10, the fraudulent count number is set to "1". This allows for an immediate notification when a security signal (external output signal) is output and a fraudulent win occurs, even if fraudulent wins continue to occur. Note that it is not necessary to set the fraudulent count number to "1", but it is preferable to set a value smaller than the initial value ("15") so that it is possible to recognize that fraudulent wins are continuing. Also, a value larger than "1" may be set to prevent frequent fraud notifications being made even when there is no fraud due to false detection of noise, etc. Times t9 and t10 are executed within the same timer interrupt.

At time t11, another illegal win occurs, and the illegal count is decremented by "1". Because the illegal count was set to "1" at time t10, it becomes "0" again, and the security signal (external output signal) starts to be output again (output for 30 seconds). Furthermore, to start the illegal alert again, an alert command is sent to the peripheral control board 1510. Note that if another illegal win is detected while the security signal is being output, the output time is reset while continuing to output the security signal. Then, at time t12, the illegal count is set to "1" again. The processing at times t11 and t12 is executed within the same timer interrupt.

After that, at time t13, in the same way as at time t1, the valid time is set with the opening of the normal electric device. The valid time is, for example, the operation time (= opening time) of the normal electric device. In addition, an initial value for the fraud count (for example, "15") is set.

At time t14, as at time t2, a winning entry into the second start port 2004 occurs during the valid period, and the corresponding bits (second start port switches) of buffer 1 and buffer 2 are set to "1". "1" is added to the reserved memory number N based on the value of buffer 2, and "1" is subtracted from the fraud count based on the value of buffer 1. Then, as the reserved number increases, various presentation commands are sent to the peripheral control board 1510. Furthermore, a prize ball command corresponding to the winning entry into the second start port 2004 is sent to the payout control board 951. At time t15, as at time t4, the valid time during which the second start port 2004 can accept a game ball has elapsed, and the initial value ("10") of the fraud count value is set.

Incidentally, since the first starting port 2003 is always capable of accepting game balls, when a game ball enters the port, it is sufficient to simply set bit 0 of buffer 1 (input edge data 1 area) and buffer 2 (prize ball determination area) to "1", and there is no need to count the illegal count. In other words, for winning ports that have a valid period during which a winning ball can be won, such as the starting port and the big winning port, the condition of whether or not it is an illegal winning port is set in buffer 2, and for winning ports that are always capable of accepting balls, the contents of buffer 1 can be set directly in buffer 2, or buffer 1 can be used as a reference.

In the gaming machine of this embodiment, when a gaming ball (gaming medium) enters the starting hole, a lottery is executed based on the occurrence of a win. The lottery need only be executed if a win occurs within the valid period (in the case of a normal win), but it may be determined whether or not to execute the lottery based on the values of the corresponding bits in buffer 1 and buffer 2, regardless of whether the win occurs within or outside the valid period. In other words, after setting the values of the corresponding bits in each buffer, the lottery is executed by referring to the values of the corresponding bits in buffer 1 and buffer 2, without determining whether the win occurs within the valid period. Below, a modified example in which the lottery is executed based on the values set in each buffer is described.

First, if the values of the corresponding bits in buffer 1 and buffer 2 are different, it is possible to send a dedicated command to the peripheral control board 1510 without executing the lottery, as it is an invalid prize due to some abnormality (high possibility of abnormality). When the peripheral control board 1510 receives this dedicated command, it is possible to notify that an abnormality may have occurred in the prize. In this embodiment, as described above, in order to notify the occurrence of fraud when multiple prizes are won outside the valid period, a command different from this dedicated command may be sent when the fraud count reaches "0", so as to clearly notify the occurrence of an abnormality. The dedicated command may also include the value of the fraud count, in which case the peripheral control board 1510 determines whether the fraud count is "0" or not, and if the fraud count is "0", clearly notifies the occurrence of an abnormality.

Furthermore, one of the buffers may be given priority, and a lottery may be executed if the value of the corresponding bit of the prioritized buffer is set to "1". For example, the importance of the validity of the win may be emphasized, and the lottery may be executed based on the value of buffer 2 (with priority given to the value of buffer 2). On the other hand, the importance of the fact that the game ball has entered the winning slot may be emphasized, and the lottery may be executed based on the value of buffer 1 (with priority given to the value of buffer 1). At this time, a dedicated command indicating that the values of the corresponding bits of buffer 1 and buffer 2 are different may be sent to the peripheral control board 1510. If this dedicated command is received a predetermined number of times in succession, or if it is received a predetermined number of times within a predetermined period, an abnormality may be detected and an abnormality notification may be issued.

The prioritized buffer may also be determined when the lottery process is executed based on parameters, etc. For example, a table containing information specifying the prioritized buffer is stored in advance, and the table is referenced when the lottery process is executed to identify the prioritized buffer. This makes it possible to switch the prioritized buffer by changing the data value in the table, without modifying the program code. By configuring in this way, it becomes possible to use common program code even if the prioritized buffer differs for each model, increasing the versatility of the program and improving development efficiency.

Furthermore, the procedure for designating a priority buffer will be described. At the start of the lottery process, the top address of a table that stores data values indicating the priority buffer is stored in a specified register. The table is identified from the address stored in this specified register, and the necessary information is retrieved to identify the priority buffer. The information stored in the table is the address of buffer 1 when the lottery is executed based on the value of buffer 1, and the address of buffer 2 when the lottery is executed based on the value of buffer 2. When the lottery process is executed, the address of the buffer specified in the table is referenced, so it is possible to switch the reference destination just by changing the data value stored in the table, and this can be configured as a common process. It is also possible to switch the reference destination depending on the game state, etc. For example, in a game state in which a game ball can be received by the second start opening 2004, priority may be given to buffer 1, with emphasis on the fact that the game ball has entered the winning opening, since there is a high possibility that the winning is valid, and in a game state in which a game ball cannot be received by the second start opening 2004, priority may be given to buffer 2, with emphasis on the validity of the winning.

In addition, when a lottery is executed with the corresponding bit values of buffer 1 and buffer 2 being different, a command based on the lottery result (such as a variation pattern command, a design type command, etc., which is the same as the command sent when normal variation begins) is sent, and a dedicated command indicating the difference is sent to the peripheral control board 1510. The order in which the command based on the lottery result and the dedicated command are sent may be such that the command based on the lottery result is sent first, or the dedicated command is sent first. Also, instead of sending a dedicated command, information indicating that the corresponding bit values of buffer 1 and buffer 2 are different may be added to the command based on the lottery result. In this case, information indicating that the corresponding bit values of buffer 1 and buffer 2 are different may be added to all commands based on the lottery result, or may be added to only one (part) of the commands (for example, the command sent first). Information indicating that the corresponding bit values of buffer 1 and buffer 2 are different is added, for example, by setting the normal (match) fluctuation pattern command to "3001h" to "30FFh" and the abnormal (difference) fluctuation pattern command to "B001h" to "B0FFh." Specifically, by changing the first bit of the fluctuation pattern command, the most significant byte of the fluctuation pattern command is changed from "30h" ("00110000b") to "B0h" ("10110000b").

In addition, if the values of the corresponding bits in both buffer 1 and buffer 2 are set to "1" (valid), the lottery is drawn based on the (corresponding) information stored in buffer 2, which is set if a prize is won within the valid period, without using the (corresponding) information stored in buffer 1. This allows the lottery to be drawn based on information whose validity is guaranteed. On the other hand, the lottery may be drawn based on the (corresponding) information stored in buffer 1, rather than the (corresponding) information stored in buffer 2. In this case, buffer 2 only needs to hold the minimum amount of information related to switch input, which can reduce the required storage capacity, etc.

In the gaming machine described above, a lottery is executed based on the acceptance (passage) of a gaming ball (gaming medium) at the start port (start area), and the display of changing patterns is started (lottery execution means), and a state in which a gaming value can be given to a player, such as paying out a prize ball, is entered (special gaming state) according to the result of the lottery. The accepted gaming ball is detected by a start port switch (gaming medium detection means) provided at the start port, and stored in an input information storage area (gaming medium detection information storage means). The input information storage area is assigned to a buffer 1 (input edge data 1 area, first storage means) that constantly stores input information (gaming medium detection information) when a gaming ball is accepted at the start port, and a buffer 2 (prize ball determination area, second storage means) that stores input information (gaming medium detection information) during a period (valid period) during which a gaming ball can be accepted only when a normal electric role is opened (when the acceptance condition for a gaming ball is established) such as the second start port 2004. By configuring it in this way, it is possible to execute a lottery based on the input information stored in buffer 2, and to detect improper winnings (occurrence of an abnormality) by referring to buffer 1 (and buffer 2), and to count the number of improper winnings, etc.

[17-6. Timing chart (probability change area switch)]
The above describes the case where a gaming ball enters the second starting hole 2004. Next, the process of detecting the entry of a gaming ball into a probability variable area that transitions to a probability variable state after the end of a jackpot when the gaming ball enters at a specific timing (specific round) during a jackpot game will be described in chronological order. FIG. 292 is a timing chart that describes the process of each component when a gaming ball enters a probability variable area (V-AT area) in the gaming machine of this embodiment. Note that the numerical information and time values, etc. described on the timing chart are merely examples and are not limited to these values.

First, at time t1, the passage of the game ball through the probability change area switch is detected. This causes the probability change area switch to turn from OFF to ON. At this time, since it is a specific round (V passing round) (valid period), the corresponding bit (probability change area switch) of buffer 1 (input edge data 1 area (INPUT_EDG1)) is set to "1", and the corresponding bit (probability change area switch) of buffer 2 (prize ball determination area (PAY_JDG_AR)) is also set to "1", and if the corresponding bit is set to 1 based on the value of buffer 2, the probability change determination flag is set. After the big win ends, if the probability change determination flag is set, the game moves to the probability change state. Also, if the corresponding bit of buffer 1 and the corresponding bit of buffer 2 are set to the same value, the probability change determination flag may be set. At this time, the AND value (logical product) may be calculated between the corresponding bit of buffer 1 and the corresponding bit of buffer 2, and if the value is 1, the probability change determination flag may be set. At time t1, it is determined to be normal, so a presentation command for the V-passing presentation is sent to the peripheral control board 1510. The specific round (the V-passing round) ends at time t2, but multiple specific rounds may occur during one jackpot game.

Next, at time t3, the passage of the game ball through the probability change area switch is detected in the same manner as at time t1. At this time, since it is not within a specific round (within a valid period), the corresponding bit (probability change area switch) of buffer 1 corresponding to the input edge data 1 area is set to "1", and the corresponding bit (probability change area switch) of buffer 2 corresponding to the prize ball determination area is set to "0" (invalid, OFF). Since the corresponding bit of buffer 1 and the corresponding bit of buffer 2 have different values, it is determined to be an abnormality, that is, a V passage outside of a specific round, and there is no transition to a high probability (advantageous state) after the jackpot, and a security signal is output as a V passage abnormality notification until time t4, and a V passage abnormality notification command is sent to the peripheral control board 1510. Note that the security signal may be the same as the signal at the time of an abnormality in the large prize winning port 2005 or the second starting port 2004, or may be a different external output. In addition, the output time may be a predetermined time, and does not have to be the same time as the large prize winning port winning abnormality, etc. Furthermore, the V passage abnormality notification and the security signal output may be either one or the other.

In addition, if the passage of the probability change area switch is detected outside of the specific round after the passage of the probability change area switch is detected in the specific round, only the abnormality notification is executed (the abnormality notification command is sent) when passing outside of the specific round, but the probability may be shifted to a high probability (advantageous state) after the jackpot (the value of the probability change determination flag is maintained), or the probability may not be shifted to a high probability (advantageous state) after the jackpot (the value of the probability change determination flag is cleared). Also, when the passage of the probability change area switch is detected outside of the specific round, the abnormality notification command is sent, but the security signal is not output, and only the abnormality notification on the peripheral control board 1510 side such as a lamp or sound may be performed, or the notification command may be sent but the peripheral control board 1510 may not issue an abnormality notification in response to the command.

In the timing chart shown in FIG. 292, an abnormality is judged by judging whether the corresponding bits of buffer 1 and buffer 2 match, but a method of setting the count number in advance may be used, as in the case of judging an abnormality in winning at the large prize slot. For example, the fraud judgment counter is set to "2" at the start of a specific round, and the fraud judgment counter is subtracted based on the information of buffer 1. Also, it may be set to "1" at the end of a specific round, and if the result of subtracting the fraud count becomes 0, it may be judged as fraud. Note that the initial value of the fraud count set at the start of a specific round does not need to be limited to "2" because it can be set to a value that does not occur under normal circumstances, and 2 can be set if two or more game balls cannot pass. Also, since it is necessary to judge fraud if even one game ball passes outside of the specific round, "1" is set at the end of the specific round, and after the subtraction results in "0" and fraud is notified, it is set to "1".

In the gaming machine described here, the game machine transitions to the probability variable state when the game ball enters the probability variable area at a specific timing (during a specific round) during a jackpot game. If the probability variable area is not in a state where the game ball can be received, it is difficult (or impossible) for the game ball to enter, and if the game ball is received in the probability variable area in such a state, it is determined that an illegal entry has occurred. Therefore, as described above, a bit corresponding to the probability variable area switch is provided in buffer 1 (input edge data 1 area) and buffer 2 (prize ball determination area), and buffer 1 is set regardless of whether it is valid or invalid, and buffer 2 is set only when it is valid. This simplifies the process because it is only necessary to refer to buffer 2 in the process of transitioning to the probability variable state without determining whether an illegal entry has occurred. On the other hand, it is possible to determine whether an illegal entry has occurred and count the number of illegal entries by referring to buffers 1 and 2.

[17-7. Summary and Modifications]
As described above, the gaming machine of this embodiment is equipped with a gaming medium detection means that detects the receipt of a gaming ball (gaming medium) at a large prize opening, a starting opening, etc. using a detection sensor (switch) (detects that the gaming medium has passed through a specified area), and a gaming medium detection information storage means (input information storage area) that can store detection information (gaming medium detection information) of these gaming balls (gaming media). The gaming medium detection information storage means has a buffer 1 (first storage means, edge buffer for fraud determination, input edge data 1 area) that can always store gaming medium detection information, and a buffer 2 (second storage means, prize ball determination area) that stores gaming medium detection information within a valid period (when a specified condition is met). For example, when a gaming ball enters a prize within the valid period and a prize ball is paid out (when processing based on the establishment of a specified condition is executed), the processing is executed by referring to the gaming medium detection information stored in the prize ball determination area (second storage means).

In addition, when a valid period is set for the acceptance of game balls in a winning slot or a probability change area, an abnormality can be determined by counting the number of times switch input information (game medium detection information) is stored only in buffer 1 (number of illegal wins). The number of illegal wins can be counted by subtracting 1 each time an illegal win occurs from an initial value set as a threshold for determining an abnormality, and determining that an abnormality has occurred when the count reaches 0, or by adding 1 each time with the initial value set as 0, and determining that an abnormality has occurred when the threshold for determining an abnormality has been reached.

Therefore, according to this embodiment, by switching the area to be referenced when executing the input judgment process, the processing associated with the input judgment can be standardized, and the entire processing can be simplified. As described above, it is possible to pay out prize balls based on information detected within the valid period, and to perform abnormality judgment by counting the number of game balls that have entered outside the valid period, thereby improving the development efficiency of gaming machines. For example, when judging whether or not a prize has been won at the large prize winning port 2005, in the above-mentioned embodiment, the judgment is based on the value of the prize ball judgment area, but the counting of prizes at the large prize winning port 2005 in a jackpot state may be judged by the value of the input edge data area 1, and only the prize winning judgment associated with the prize ball may refer to the value of the prize ball judgment area.

In this embodiment, a configuration has been described in which there are two types of buffers: Buffer 1, which stores input at all times, and Buffer 2, which stores input within a valid period. However, the configuration may be such that there are two or more types of buffers, such as a buffer for each game state.

In addition, in the embodiment described so far, the winning port has a valid period set at the time of winning, but the first starting port 2002, which can always accept game balls, sets the corresponding bit (first starting port switch) of buffer 1 (input edge data 1 area) and buffer 2 (prize ball determination area) to "1" (valid) when a game ball enters the winning port without determining the valid period. Therefore, for the first starting port 2002, a prize ball may be awarded based on the value of buffer 1, or, as with the second starting port 2004, a prize ball may be awarded based on the value of buffer 2. In addition, since the value of buffer 1 and the value of buffer 2 match and the result of the determination process of the valid period at the second starting port 2004 is always normal, for example, the processing of the prize ball when the first starting port 2002 wins may be the same as the processing of the prize ball at the second starting port 2004.

Buffer 1 and buffer 2 are included in the input information storage area allocated to RAM (main control built-in RAM), but these buffers may be placed in a contiguous area or in separate areas. If buffer 1 and buffer 2 are allocated to a contiguous area, when storing values in each buffer, it is possible to set each buffer simply by executing the INC command/DEC command, simplifying the process. On the other hand, if buffer 1 and buffer 2 are allocated to separate areas, each buffer can be freely placed, allowing greater freedom in designing the storage area and improving development efficiency.

[18. Bit Transfer Instructions]
In recent gaming machines, complex game control is required to enhance the interest of the game. On the other hand, certain restrictions are imposed on the game control device that actually controls the game to ensure the fairness of the game and to prevent excessive gambling, so that the game is played within a predetermined framework.

As a result, there was a risk that problems would arise, such as malfunctions occurring due to the complex structure of the program in order to achieve complex game control. To address this issue, efforts were made to simplify the program by converting game control into data. For example, the program structure is simplified by having the program sequentially process data in which the control content is defined, and it also becomes easier to respond to specification changes by modifying the data.

On the other hand, the digitization of game control has led to a high reliance on data, and the complexity of gaming machine specifications has led to an increase in data volume. Also, since there is a limit to the capacity for storing data for controlling gaming machines, it has been necessary to curb the increase in data volume.

The gaming machine of this embodiment has been developed in consideration of the above circumstances, and aims to provide a gaming machine that makes it possible to reduce the amount of data used by the gaming machine by compressing and storing the data in order to suppress an increase in the amount of data used by the gaming machine.

According to the gaming machine of this embodiment, by compressing data, it becomes possible to hold more data, making it possible to provide games incorporating complex specifications and increasing the interest of the game. In addition, by further digitizing the game control, it becomes possible to further simplify the program, suppressing the complexity of the game control and reducing the probability of malfunctions. Furthermore, it becomes easier to respond to changes in the specifications of the gaming machine, and by replacing some of the data, it becomes possible to easily provide a variety of variations of gaming machines.

Specifically, in the gaming machine of this embodiment, the command for reading game data is improved to increase the degree of freedom in the structure of the table that holds the game data, and the process for reading game data is simplified to compress the size of the game data and simplify the game control that accompanies reading data. The configuration and procedure for reading data in this embodiment are described below.

[18-1. Bit transfer procedure overview]
First, an overview of the configuration and procedure for reading data in this embodiment will be described. In the data transfer procedure in this embodiment, data can be read in units of bits from a specified bit position in a table, rather than reading data in units of bytes from a specified address.

Figure 293 is a diagram outlining the bit transfer procedure of this embodiment. The bit transfer procedure of this embodiment is configured to identify the location (address) from which data is read based on an index (index information) that specifies the source from which the data is read, and to read the specified number of bits of data. When this procedure is executed, the index, extraction specification information corresponding to the number of bits of the data to be read, and the storage destination of the read data are specified as parameters. The index may specify a register in which the index information is stored, or a value may be specified directly.

In this embodiment, the index is composed of 2 bytes (16 bits). The upper 13 bits store information indicating the top address of the data table (table position information), and the lower 3 bits indicate information indicating the position from which data is read from the specified data table (data relative position information). In this embodiment, the specified index is corrected to identify the address of the specified data table and obtain the read position of the data in the data table. Specifically, the upper 13 bits of the index before correction are made the lower 13 bits, and "000" is added to the upper part to make it 2 bytes (16 bits), thereby creating the corrected index.

Next, the reference address (N) of the data to be obtained is calculated by adding the value set in "TP (register)," which indicates the address that is the reference for the data storage location (table arrangement), to the corrected index, and the table storage location (address) is identified. Furthermore, the read position (read start bit position) of the data at the reference address (N) is identified from the value of the lowest 3 bits of the index before correction. In the example shown in FIG. 293, the value of the lowest 3 bits of the index before correction (hatched area slanting downward to the left) is the read start bit position of the reference address (N). For example, if the value of the lowest 3 bits is set to "100," the read start bit position of the reference address (N) will be the 4th bit ("100").

In this way, in this embodiment, the address of the area where the data is stored can be specified by adding the value set in the TP register to the index value, so it is only necessary to specify the lower address of the data storage location, and the area for storing the upper address can be used for other purposes. Specifically, it is used as an area for specifying the data read start bit position (the lower 3 bits of the corrected index). By configuring it as described above, in this embodiment, it is possible to specify the address of the data storage area and the data read start bit position with a 2-byte index. In other words, it is possible to specify the storage location of data in bit units and read the data without increasing the capacity compared to when data is read by specifying an address as in the conventional load command.

In addition, in the bit transfer procedure of this embodiment, extraction specification information corresponding to the number of bits of data to be read as a parameter at execution time is specified. The value of the number of bits of data to be acquired minus 1 is set to the extraction specification information. In the example shown in FIG. 293, 6 bits (when extraction specification information = 5) of data are read from the 5th bit of the table indicated by the reference address (address N) and stored in the specified storage destination.

In this embodiment, the address where the data is actually stored is the value obtained by adding the corrected index to the value of the top address (reference address) of the data area previously set in the TP register. In addition, when the CPU is reset, such as when the power is turned on, the value set in the TP register is set to the top address of the data area as the default value (initial value). Furthermore, the TP register can be rewritten to any value by a program. By configuring it in this way, it is possible to change the data reference destination without changing the program code by appropriately rewriting the value of the TP register depending on the game status, etc., simplifying the program code and improving the development efficiency of the gaming machine. Details of the bit transfer procedure will be described later with reference to FIG. 299 and subsequent figures.

The TP register is a dedicated register for specifying an index that is a base address among the registers held by the CPU. The general-purpose registers used in calculations, etc., are composed of two or more banks, but the TP register is composed of one register, not a bank configuration like the flag register. Note that a TP register may be provided for each bank like the general-purpose register, and the TP register of one bank may be used each time the bank is switched, like the general-purpose register. For example, if bank 0 is used in the initialization process and the general-purpose register of bank 1 is used in the timer interrupt process, the TP register used in the initialization process is the one set as bank 0, and the TP register used in the timer interrupt process is the one set as bank 1. This makes it possible to switch the value of the TP register depending on the process, and for example, the data reference destination can be switched for each process. Note that even if a TP register is provided for each bank, it can be rewritten by a program in the same way as when a TP register is not provided for each bank, and a default value is set at reset. Also, the default value may be a common value regardless of the bank, or a different value may be set for each bank.

[18-2. Types of bit transfer instructions]
Next, the instruction code (command) for executing the above procedure (bit transfer instruction) will be described. In this embodiment, the case where the bit transfer instruction is executed in assembler (mnemonic) will be described, but the same applies to other development languages. Figure 294 is a diagram showing an example of the configuration of the instruction code for executing the bit transfer instruction in this embodiment.

The bit transfer instruction consists of the instruction code "RBT" and parameters. The parameters are the storage destination of the referenced data, an index indicating the referenced address, and extraction specification information corresponding to the number of bits of the data to be extracted. In this embodiment, the storage destination of the referenced data is a register, but it may also be written directly to a memory area on the RAM. The index value specifies the address of the table storing the data to be read and the position of the data to be read, as in the example shown in Figure 293.

Next, an example of actually using an instruction code will be described. Figure 295 is a diagram showing an example of a type of bit transfer instruction in this embodiment. As described above, the instruction code is "RBT", and the acquired data is stored in register r. Register r is specified to be, for example, the general-purpose registers W register, A register, B register, C register, D register, H register, and L register. Note that if the data to be read is 2 bytes, a pair of registers such as the WA register, BC register, and DE register can be specified.

In addition, the parameters (storage destination of the referenced data, reference address, and extraction specification information) can be specified either by directly specifying the index (address) value mm or by specifying a register rr for address specification. When register rr is specified, the value stored in that register is read and processed. A 2-byte value is stored in the register rr for address specification, so it corresponds to the DE register, HL register, index register (IX register, IY register), etc. An example of the bit transfer instruction code shown in Figure 295 is explained below.

"RBT r, (mm).n" directly specifies the address mm of the table that stores the data, reads out the number of bits of data based on the extraction specification information n, and stores it in register r. The extraction specification information n directly specifies a number in the range of 0 to 7 or 0 to 15, or specifies register A. If register A is specified, the data corresponding to the number stored in register A is read out.

Furthermore, to explain the specific operation (procedure) of "RBT r, (mm).n", as explained in FIG. 293, since it corresponds to the address of the table specified by the upper 13 bits of the 16-bit index mm, mm/8 corresponds to the corrected index. The corrected index is added to the value set in the TP register described above to calculate the actual address of the referenced table. Furthermore, the lower 3 bits of the index mm are extracted (mm^07H) to specify the bit position at which to start reading data from the referenced table. Then, n+1 bits of data of the extraction specification information are extracted from the specified position and stored in register r. At this time, the cycles for processing the instruction are 11, and the capacity for storing the instruction is 5 bytes. In addition, even after the instruction is executed, the J flag and Z flag of the flag register become zero, and the other flags retain the values before the instruction is executed. The change in the flag register is the same for the instruction codes described below.

"RBT r, (rr).n" specifies the register rr that stores the address of the table, reads out the number of bits of data based on the extraction specification information n from the table, and stores it in the register r. The other parameters are the same as those of "RBT r, (mm).n". Specifically, the address of the table to be referenced is stored in the HL register, and "RBT A, (HL).n" is used when storing the read data in the A register. The specific operation of "RBT r, (rr).n" is omitted because it is the same as when the address mm of "RBT r, (mm).n" is replaced with the value stored in the register rr, but the detailed procedure will be described later in Figure 300. In this case, the cycles for processing the instruction are 9, and the capacity for storing the instruction is 3 bytes. Note that if the target to be read is larger than 8 bits (1 byte), the capacity is increased by 1 byte to 4 bytes in order to specify a register such as the DE register, HL register, or index register (IX register, IY register) as the storage destination. The detailed procedure for the bit transfer command in this case will be described later in Figure 302.

After "RBT r, (rr+).n" is executed with the same operation as "RBT r, (rr).n", the address value stored in register rr is incremented by n+1. In this case, the cycles for processing the command are 10, and the capacity for storing the command is 3 bytes. This allows the specified area to be read continuously. For example, by executing "RBT A, (HL+).n" and then "RBT W, (HL).m", n bits of data can be read from the specified position of the table of the address stored in the HL register first and stored in the A register, and then m bits of data can be read from the next area and stored in the W register. In this way, by executing "RBT r, (rr+).n" continuously, multiple data can be read from consecutive areas, simplifying the process of reading the same number of bits of data as needed or reading records (data groups) composed of data of multiple types of bits. The detailed procedure for reading multiple data from consecutive areas will be described later in FIG. 301.

"RBT r, (rr+d).n" reads data from the location obtained by adding the value d to the address of the table stored in register rr. This makes it possible to specify any data in a specified table and read the data. In this case, the cycles to process the instruction will be 10, and the capacity for storing the instruction will be 4 bytes.

"RBT r, (rr+W).n" reads data from the location obtained by adding the value stored in register W to the address of the table stored in register rr. This makes it possible to specify any data in a specified table and read the data. Also, by updating the value of register W, it is possible to read data from consecutively specified locations using a common code. "RBT r, (rr+A).n" can be processed in the same way by simply changing register W to register A. The cycles for processing these instructions are 10, and the capacity for storing instructions is 3 bytes.

[18-3. Program example]
Next, an application example of the bit transfer command "RBT" described above will be described. FIG. 296 is a diagram showing an example of a flowchart of a process using the bit transfer command "RBT" in this embodiment. FIG. 297 is a diagram showing an example of a program corresponding to the flowchart (FIG. 296) of the process using the bit transfer command "RBT" in this embodiment. The steps of the corresponding flowchart are described as program comments. The process shown in FIG. 296 and FIG. 297 is a process of reading data from a table in 6-bit units. This process is executed by the main control MPU 1311 of the main control board 1310.

The main control MPU 1311 of the main control board 1310 first sets the index value obtained by subtracting the top address of the data area from the top address of the reference table as the initial value of the reference address (step P8001). Specifically, as shown in the program in FIG. 297, the address of the table to be referenced is stored in the HL register ("LD HL, table_Top"). The address of the table to be referenced is specified by the label "table_Top", and the contents of the table are defined at the end of the program. In this table, the number of bits assigned to one data (total number of bits in the basic configuration block) is 6, and four data items ("25, 48, 32, 63") are stored. Note that, for the top address of the data area, the "top address of the data area" is set in the TP register as a default value every time a reset signal is input, such as when the power is restored. Therefore, when the TP register is not rewritten, that is, when the top address of the data area remains stored, the value of the TP register may be subtracted instead of the value of the top address of the data area.

Next, the main control MPU 1311 extracts the pointer information (pointa_a) of the data to be referenced from the reference table (step P8002). As shown in the program, the address of the pointer information is stored in the A register ("LD A, (pointa_a)").

The main control MPU 1311 multiplies the extracted pointer information by the total number of bits of the basic building blocks of the reference table (step P8003). A basic building block refers to an area for storing one unit of data (record) stored in the reference table. The total number of basic building blocks is the number of bits of the area for storing data, and corresponds to the data capacity of each record. For example, in a table that stores integer values in the range from 0 to 30, a 5-bit area is required to store each piece of data, so the total number of basic building blocks is 5. In this embodiment, the total number of bits of the basic building blocks is 6. The result of the multiplication is stored in the A register as shown in the program ("MUL A, 6").

The main control MPU 1311 divides the multiplied value by the number of basic units (step P8004). The number of basic units of data handled by the arithmetic device of the gaming machine of this embodiment (the main control MPU 1311 of the main control board 1310) is 8 (the number of bits in 1 byte). The result of the arithmetic operation is stored in the WA register as shown in the program ("LD C, 8 -> DIV WA, C"). Note that when the "DIV" command is executed, the quotient is stored in the A register and the remainder is stored in the W register.

The main control MPU 1311 adds the quotient of the division result calculated in step P8004 to the index value (step P8005). As shown in the program, the index value is stored in the HL register, and the value stored in the WA register is added to it ("ADD HL, WA"). Note that, referring to the program, before adding the value stored in the WA register to the value stored in the HL register, "PUSH WA" is executed to save the WA register to the stack area. This is because the value stored in the W register, which holds the remainder, is cleared ("XOR W") and the remainder is then used as the calculation value ("POP WA→LD A, W→...").

The main control MPU 1311 then multiplies the calculation result of step P8005 by N (8 in this embodiment) (step P8006). In the program, the value of the HL register is multiplied by 8 by performing a left shift (SLA HL) three times (shifting 3 bits).

The main control MPU 1311 adds the remainder of the division in step P8005 to the calculation result of step P8006 and sets it as the reference address information (step P8006). The remainder stored in the W register is the start bit position for reading reference data from the first address of the reference table. In the program, the remainder is calculated ("POP WA" → "LD A, W" → "XOR W"), and the remainder (the value stored in the WA register) is added to the HL register in which the index value is stored ("ADD HL, WA"). Through these processes, the index (pre-correction index) shown in FIG. 293 can be created.

Finally, the main control MPU 1311 specifies the extraction specification information based on the number of pieces of information to be acquired (the number of bits of the referenced data, 6 in this embodiment), and sets it to the storage destination of the referenced data by a bit transfer command from the reference address information (step P8009). In the program, the value stored in the HL register is set as the pre-correction index, and data for the number of bits (6 bits) corresponding to the extraction specification information n is stored in the A register ("RBT A, (HL).n").

[18-4. Modifications]
As described above, the procedure for executing a bit transfer command in this embodiment is (1) specifying the data to be referenced, (2) creating an index (pre-correction index), and (3) reading/storing the data. Here, a modified example will be described in which processes that can be executed independently of the process for executing the bit transfer command are separated as subroutines to simplify the program structure.

(1) Specifying the data to be referenced involves setting information for identifying data (reference data) required for the processing currently being performed, and in the flowchart in FIG. 296, this corresponds to the process of specifying information corresponding to the table to be referenced in step P8001, and specifying information corresponding to the data read location in step P8002. These processes are specialized for the content currently being performed (caller), and are specified individually when various functions are executed. (3) The same applies to the process of reading/storing data, which is executed in subsequent processing based on the obtained data.

On the other hand, when creating an index (pre-correction index) (2), by specifying the total number of bits in the basic configuration block in addition to the address of the referenced table specified in (1) and the pointer information of the data reference position, it is possible to create a pre-correction index independently of the ongoing process. Therefore, the index creation process (2) can be made into a subroutine.

Figure 298 is an example of a flowchart in which the index creation process in this embodiment has been made into a subroutine, where (A) is the process that calls the index creation process, and (B) is the subroutine index creation process. The flowchart shown in Figure 298 (A) executes the same process as Figure 296. The index creation process flowchart in Figure 298 (B) is a subroutine of the processes from step P8003 to step P8008 in Figure 296. In this way, by making the index creation process a subroutine, it is possible to simplify the process that calls it, improving development efficiency.

The input parameters for the index creation process are the "index value" which is the top address of the reference table, the "pointer information" of the data to be referenced, and the "total number of bits of the basic building blocks" of the stored data. In this embodiment, the result of subtracting the top address of the data area from the top address of the reference table is set as the "index value" in the HL register (step P8001), and the "pointer information" is set in the A register (step P8002). Furthermore, the "total number of bits of the basic building blocks" is set as a parameter (step P8013). Therefore, when setting the "index value" and "pointer information" as input parameters for the index creation process, they are set (specified) in the registers that are treated as the "index value" and "pointer value" in the index creation process. For the "total number of bits of the basic building blocks", the numerical value itself may be specified, or it may be set (specified) in the register that is treated as the "total number of bits of the basic building blocks".

[18-5. Compressed Data]
In the conventional data read command, data storage is managed in a predetermined basic unit (byte unit), so it is necessary to read data from the table in this unit. In the conventional table structure managed in 1 byte (8 bits) units like the gaming machine of this embodiment, even data that does not require 1 byte (8 bits) of capacity must be stored in byte units. For example, for numbers in the range of 0 to 63, it is necessary to secure 6 bits of capacity for each data, but it is necessary to allocate 1 byte of capacity to each data and hold it.

On the other hand, the bit transfer instruction of this embodiment can read a specified number of bits of data from a specified position in the referenced table. Therefore, it is only necessary to allocate an area for the data as needed, and the data can be compressed and stored. The structure for compressing and storing data is explained below with reference to FIG. 299.

Figure 299 is a diagram for explaining an example of a table structure in this embodiment. The table shown in Figure 299 holds four records (data): "25, 48, 32, 63". When converted to hexadecimal, these data become "19h, 30h, 20h, 3Fh", and when converted to binary (bit conversion), they become "00011001b, 00110000b, 00100000b, 00111111b". Since the basic unit of data handled by the arithmetic device of the gaming machine is 8, conventionally, the table structure holds data in 8-bit units, such as the 4771 area indicated by the dotted line, and the upper two bits of each record are "0".

The bit transfer command described above allows data to be read from any bit of a specified address, so in this embodiment, by consecutively storing 6 bits of data for each record, i.e., the data contained in area 4772, it is possible to arrange the data as shown in area 4773. This causes "19h, 0Ch, FEh" to be stored.

As described above, conventional table structures required a capacity of 4 bytes (32 bits), but by reading data using the bit transfer command of this embodiment, unnecessary bits can be deleted to create a compressed table structure of 3 bytes (24 bits). In this way, this embodiment makes it possible to minimize the area in which data is stored, making it possible to save on memory capacity. This makes it possible to manage more data and perform more detailed game control.

[18-6. Detailed procedure of bit transfer instructions]
Next, typical patterns of detailed procedures of the bit transfer command of this embodiment will be explained. Here, the case of reading a single specified data (RBT A, (HL).5), the case of reading consecutive data from a table ([1] RBT A, (HL+).5 → [2] RBT B, (HL).5), and the case of reading data of a capacity larger than 1 byte (RBT DE, (HL).9) will be explained. In the examples described below, the value of the TP register is set to "8000h", which is the top address of the data area.

[18-6-1. Reading of Single Data]
Fig. 300 is a diagram for explaining the detailed procedure of the bit transfer instruction of this embodiment, and is a diagram for explaining the case where a single piece of data is read from a reference table. The reference table is the same as the table shown in Fig. 299. The bit transfer instruction to be executed is "RBT A, (HL).5".

As shown in Figure 300, the pre-correction index "4C6E" is stored in the HL register. The address of the referenced table is "898Dh", and the example described here shows the case where the second piece of data stored in the referenced table (30h) is transferred. As mentioned above, the total number of bits in the basic constituent block of the referenced table is 6, and the basic unit is 8 bits (1 byte). The pre-correction index "4C6E" can be calculated by executing the index creation process (Figure 298 (B)) based on this information.

When the bit transfer instruction "RBT A, (HL).5" is executed, the reference address for reading data is first identified. Specifically, the pre-correction index "4C6E" is divided by the number of basic units (8) ("098Dh"), and the TP "8000h" is added to calculate the reference address ("898Dh").

Furthermore, the lower 3 bits ("110b") are obtained by calculating the logical product of the pre-correction index "4C6E" and "07h", and the read start position (bit) of the reference address is identified. In the example shown in FIG. 300, this is the 6th (="110b") bit of the reference address. Then, by extracting 6(n+1) bits of data from the 6th bit of the reference address "898Dh", "110000b" (=48 ("30h")) can be obtained. The upper 2 bits of the obtained value are complemented with "00" to match the number of basic units (8), and the value is stored in the A register.

[18-6-2. Continuous reading of data]
Fig. 301 is a diagram for explaining the detailed procedure of the bit transfer instruction of this embodiment, and is a diagram for explaining the case where data is read continuously from a reference table. The reference table is the table shown in Fig. 299, as in the case of Fig. 300. Also, a case where a bit transfer instruction [1] "RBT A, (HL+).5" is executed, and then [2] "RBT B, (HL).5" is executed will be explained. Note that [1] and [2] correspond to the execution order of each bit transfer instruction, and correspond to the arrows of the reference address in Fig. 301.

The execution process of the bit transfer instruction "RBT A, (HL+).5" is the same as "RBT A, (HL).5" (Fig. 300) until the data to be transferred is stored in the A register. In the bit transfer instruction "RBT A, (HL+).5", after storing the acquired data in the A register, the value of the extraction specification information n+1 (5+1) is added to the index value "4C6Eh" stored in the HL register. Note that the value stored in the HL register (index before correction) is not changed from the value set before the bit transfer instruction is executed, even after the bit transfer instruction is executed (after data is read). In this way, by executing the index update process that updates the index value to the storage location of the next data, the storage location of the next data of the read data can be specified. In the example shown in Fig. 301, it becomes "4C74h".

Then, in the same way as when reading a single piece of data as described in FIG. 300, the reference address and the read start position (bit) are identified. In the example shown in FIG. 301, 6 bits of data are read from the 4th (="100b") bit of the reference address "898Eh" and stored in the B register.

In this way, when reading data continuously from a specified table, the index value is calculated by first executing the index creation process, and thereafter the index value is updated sequentially by adding the number of bits of the read data to the index value.

In addition, when each record in a table is composed of a combination of data with different bit numbers, data can be acquired for each record by specifying the extraction specification information according to the number of bits that make up the record. For example, if a record is composed of 4-bit, 6-bit, and 10-bit data, data for one record can be acquired by specifying 4, 6, and 10 as the extraction specification information and executing the bit transfer command in sequence. In this case, if the data is composed of 4-bit, 6-bit, and 10-bit data, the total number of basic configuration blocks (number of bits) is 20 (= 4 + 6 + 10). In this case, for example, by configuring the program to execute the bit transfer command in the order of "RBT A, (HL +). 4", "RBT B, (HL +). 6", and "RBT DE, (HL). 10", it is possible to acquire each data that makes up the record. With the above configuration, it is no longer necessary to acquire data while creating index values individually, so the program for acquiring data on a record-by-record basis can be simplified and the execution time can be increased.

[18-6-3. Reading Data Larger than 1 Byte]
FIG. 302 is a diagram for explaining a bit transfer command for data larger than 1 byte in this embodiment, where (A) is a diagram showing the table to be referenced and (B) is a diagram for explaining the procedure.

The table shown in FIG. 302(A) stores values from 0 to 1000, and as an example, holds three records (data) "55, 258, 942". When this data is converted into hexadecimal, it becomes "37h, 102h, 3AEh", and when converted into binary (bit conversion), it becomes "0000110111b, 0100000010b, 1110101110b".

However, the table shown in FIG. 302(A) can store 10 bits because the upper limit is 1000. As mentioned above, the basic unit of data handled by the arithmetic device of the gaming machine is 8, so data must be stored in 8-bit (1-byte) units, and a capacity of 16 bits is required to actually store the data. For this reason, the table structure shown by the dotted line in 4801 was conventionally used, and the upper 6 bits of each unused record were assigned "0". Therefore, as in the example shown in FIG. 299, the data of 10 bits of each record, that is, the data in area 4802, is stored consecutively, and the data is arranged as shown in 4803. As a result, "37h, 08h, E4h, 3Ah" is stored. In this way, data with a capacity exceeding 8 bits (1 byte) can also be compressed and stored in the same way.

The total number of basic building blocks can be specified by the number of bits of the maximum value of the data that is configured. For example, as in the above example, if the upper limit of the data that is configured is 1000 (3E8h), the total number of basic building blocks is the number of bits, 10. If the total number of basic building blocks is 10, the range of values that can be stored is 0h to 3FFh (1023). As described above, if each record in the table is composed of a combination of data with different numbers of bits (for example, first data, second data, third data), the number of bits of the maximum value of the first data, the number of bits of the maximum value of the second data, and the number of bits of the maximum value of the third data are the total number of basic building blocks of the first data, the total number of basic building blocks of the second data, and the total number of basic building blocks of the third data, respectively.

As mentioned above, FIG. 302(B) is a diagram explaining the procedure for executing a bit transfer command for data larger than 1 byte in size, and executes the bit transfer command "RBT DE, (HL).9". The HL register stores the pre-correction index "4C72h". The top address of the referenced table is "898Dh", and this shows an example of transferring the second data in the referenced table. In addition, the total number of bits in the basic constituent blocks of the referenced table is 10, and the basic unit is 8. The pre-correction index "4C72h" can be calculated by executing the index creation process (FIG. 298(B)) based on this information.

The reference address is identified in the same manner as in FIG. 300, and "898Eh" is calculated. Furthermore, the read start position ("010b") of the reference address is identified in the same manner. Then, by extracting 10 (n+1) bits of data from the 2nd ("010b") bit, which is the read start position of the reference address "898Eh", it is possible to obtain "0100000010b" (=258 ("102h")). Since the obtained value exceeds the number of basic units (8), the upper two bits ("01b") of the obtained value are extracted, and the upper six bits of the extracted value are complemented with "000000" ("00000001b") and stored in the D register. Furthermore, the remaining lower eight bits ("00000010b") are stored in the E register.

As described above, according to this embodiment, even data that requires a capacity of more than 8 bits (1 byte) can be compressed and stored, and the data can be read using a simple procedure.

[18-7. Application examples]
Next, an example of applying the bit transfer command of this embodiment to game control will be described. Here, a process of extracting a random number and selecting a variation pattern of the variable display (dynamic display) of the pattern in game control based on the extracted random number will be described as an example. In this process, the extracted random number is sequentially compared with a threshold value obtained from the variation pattern table, and if the extracted random number is equal to or greater than the threshold value, the variation pattern number corresponding to this threshold value is selected as the lottery result. The following description will be given with reference to the drawings of FIG. 303 to FIG. 305.

[18-7-1. Configuration of fluctuation pattern table]
First, the variation pattern table in this embodiment will be described. Figure 303 is a diagram for explaining an application example of the bit transfer command of this embodiment, (A) is a diagram for explaining the relationship between the variation pattern and the corresponding range, (B) is a program code showing the variation pattern table, and (C) is a diagram for explaining an example of the structure of the table before and after compression for the variation pattern table corresponding to (B).

In this embodiment, the range of the extracted random numbers is 0 to 63 (integer value), and as shown in FIG. 303(A), when the extracted random number is included in the range corresponding to each variation pattern, the corresponding variation pattern number is selected. In this embodiment, variation patterns from pattern 1 (PT1) to pattern 5 (PT5) are defined, and when the random number value is 0 to 32, pattern 1 is selected, when it is 33 to 45, pattern 2 is selected, when it is 46 to 54, pattern 3 is selected, when it is 55 to 60, pattern 4 is selected, and when it is 61 to 63, pattern 5 is selected. In addition, the larger the pattern number, the higher the expectation of moving to a state advantageous to the player (the lottery result will be a jackpot) becomes a variation performance. Note that the expectation may not be higher for larger pattern numbers, but may be higher for smaller pattern numbers, and the pattern numbers may be set based on criteria other than the expectation level for management.

Also, as shown in FIG. 303 (B), the fluctuation pattern table (hp_table) defines one record as a pair of a random number threshold and a pattern number. The random number threshold and the fluctuation pattern number are stored consecutively in the same table.

As mentioned above, the range of the extracted random numbers is 0 to 63, and the threshold requires a maximum capacity of 6 bits. Similarly, the variation pattern number is defined in the range of 1 to 5, so a maximum capacity of 3 bits (0 to 7) is required. When storing data using the conventional method, the gaming machine of this embodiment requires a capacity of 1 byte (8 bits) to store one piece of data, so as shown on the left side of FIG. 303(C), if the number of records consisting of the random number threshold and the variation pattern number is 5, a total capacity of 10 bytes is used. On the other hand, as shown on the right side of FIG. 303(C), by adopting the data compression technology of this embodiment, it is sufficient to secure a capacity of 6 bits for the threshold and 3 bits for the variation pattern number, and since these data are stored consecutively, if the number of records is 5, the data can be stored with a total capacity of 45 bits (6 bytes), which is a reduction of more than 40%.

Note that the table shown in FIG. 303 is just an example, and the compression rate of the table changes depending on the random number threshold and the range of the variation pattern number. For example, if the capacity of the random number threshold is in bytes (8 bits), the data cannot be compressed, but if the capacity of the random number threshold is not in bytes, that is, if there is a fraction of 1 to 7 bits, the capacity can be reduced by the fractional bit from 8 bits for each data. In particular, if the data capacity is 9 bits or 17 bits, such as 1 bit of fractional bit, it is possible to reduce the capacity by 7 bits for one data, achieving the maximum effect.

[18-7-2. Procedure for selecting a variation pattern]
Next, an outline of the procedure for selecting a variation pattern in this embodiment will be described. Note that, when multiple types of variation pattern tables are defined, a variation pattern table is selected in advance according to the game state, etc.

First, a random number in the range of 0 to 63 is extracted as a random number for the lottery of the variation pattern. Next, the random number threshold and the variation pattern number are sequentially obtained from the variation pattern table, record by record, starting from the top of the table. Furthermore, the obtained random number threshold is compared with the extracted random number, and if the value of the random number is equal to or greater than the obtained threshold, the corresponding variation pattern is selected as the lottery result. On the other hand, if the value of the random number is less than the obtained threshold, the next record is obtained from the variation pattern table, and a variation pattern is selected by comparing it with the threshold in the same procedure. In this way, the threshold corresponds to the lower limit of the range of random numbers for selecting the corresponding variation pattern. In addition, since the threshold of the last record in the variation pattern table is 0, the variation pattern is always selected in the last record. To give a numerical example of the procedure for selecting a variation pattern, if the extracted random number is "48", it is first compared with the threshold "60" corresponding to the first record in the table, and is therefore less than the threshold, so it is compared with the threshold "54" of the next record. Similarly, when compared with the threshold "45" of the next record, the extracted random number "45" is equal to or greater than the threshold, so the corresponding last right-hand side same pattern "PT3" (variation pattern number 3) is selected.

Here, the procedure for obtaining the fluctuation pattern number from the fluctuation pattern table (fluctuation pattern selection process) will be specifically described. Figure 304 is a flowchart showing an example of the procedure for selecting a fluctuation pattern in this embodiment. Figure 305 is a diagram showing an example of a program for selecting a fluctuation pattern in this embodiment. The flowchart in Figure 304 corresponds to the program in Figure 305. This process is executed by the main control MPU 1311 of the main control board 1310.

The basic procedure for the fluctuation pattern selection process is to first identify a fluctuation pattern table for selecting a fluctuation pattern (number). Next, an index is created to obtain data from the identified fluctuation pattern table using a bit transfer command in this embodiment. Next, a random number for selecting a fluctuation pattern is extracted. Finally, a random number threshold and the corresponding fluctuation pattern number are obtained from the fluctuation pattern table using a bit transfer command, and the random number threshold and the random number are compared to select a fluctuation pattern number.

The main control MPU 1311 of the main control board 1310 first obtains the address of the fluctuation pattern table (Hp_no_table) (step P8021). In this embodiment, one fluctuation pattern table is defined, but if multiple fluctuation pattern tables are defined depending on the game status, etc., the fluctuation pattern table is identified at this timing.

Next, the main control MPU 1311 sets parameters for creating an index to execute the bit transfer command RBT of this embodiment (step P8022). The procedure for creating the index is as described in Figures 296 and 297, etc.

To be more specific, the main control MPU 1311 first subtracts the start address of the data area from the start address of the fluctuation pattern table identified in the processing of step P8021 as the initial value of the index and sets this value in the HL register as the index value ("LD HL, Hp_no_table-9000h", "9000h" corresponds to "TP" in the program code shown in FIG. 297 and is the value stored in the TP register).

Next, the main control MPU 1311 sets parameters for index creation (step P8022). Specifically, first, the pointer information of the referenced data (records in the fluctuation pattern table) is extracted and set as a parameter. Here, data is obtained from the beginning of the fluctuation pattern table, so the pointer information of the data is 0. Furthermore, the total number of basic building blocks is set as a parameter. As described above, the total number of basic building blocks corresponds to the data capacity of the area for storing one unit of data (record) stored in the reference table. In this application example, the random number threshold is 6 bits and the fluctuation pattern number is 3 bits, so a capacity of 9 bits is required to store one record, and the total number of basic building blocks is 9.

Then, the main control MPU 1311 executes an index creation process to create an index for executing the bit transfer command RBT based on the set parameters (step P8023). In the index creation process, first, the pointer information (0) of the referenced data (variation pattern table) is multiplied by the total number of bits (9) of the basic configuration block. The result of the multiplication is 0, which is stored in the A register.

Next, the main control MPU 1311 clears the W register (storing 0) and divides the value of the WA register by the number of basic units (8). At this time, the quotient is stored in the A register (0) and the remainder in the W register (0). The main control MPU 1311 then clears the W register and adds the value of the WA register to the HL register. As mentioned above, the value before the W register is cleared is saved in the stack area in advance for use in subsequent calculations. The main control MPU 1311 then shifts the value of the HL register 3 bits to the left (multiplying it by 8). The saved value of the W register is then added to the HL register, completing the creation of the index.

When the index creation is complete and preparations are complete to obtain the fluctuation pattern number from the fluctuation pattern table, the main control MPU 1311 obtains a random number for drawing a fluctuation pattern (step P8024). As described above, the extracted random number is a 6-bit integer ranging from 0 to 63, and is stored in the D register (LD D, (Rnd)).

Then, the extracted random number value is compared with the threshold value stored in the fluctuation pattern table to identify the fluctuation pattern number. The main control MPU 1311 first uses a bit transfer command to obtain the random number threshold value from the fluctuation pattern table based on the index created in the processing of step P8023 (step P8025). Specifically, 6 bits of data are obtained from the position specified by the index and stored in the A register (RBT A, (HL+).5). Furthermore, the fluctuation pattern number stored in the consecutive area is obtained by a bit transfer command (step P8026). The fluctuation pattern number is 3 bits and is stored in the W register (RBT W, (HL+).2).

Next, when the main control MPU 1311 obtains the random number threshold and the fluctuation pattern number from the fluctuation pattern table, it determines whether the threshold is 0 or not (step P8027). In this embodiment, the threshold for the final record in the fluctuation pattern table is set to 0, so the determination of whether the threshold is 0 or not is made by determining whether the final record has been detected (AND A, FFh→JR Z, hp_select_2). If the threshold is 0 (the result of step P8027 is "yes"), the main control MPU 1311 terminates this process with the fluctuation pattern number obtained in the processing of step P8026 as the lottery result (step P8029).

On the other hand, if the random number threshold is not 0 (the result of step P8027 is "no"), the main control MPU 1311 determines whether the random number threshold is smaller than the random number for selecting a variation pattern (step P8028). If the random number threshold is larger than the random number for selecting a variation pattern (the result of step P8028 is "yes"), the process returns to step P8025 to select the next record and obtain the threshold and the corresponding variation pattern number.

In addition, if the random number threshold is equal to or less than the random number for selecting a variation pattern (the result of step P8028 is "no"), the main control MPU 1311 terminates this process by using the variation pattern number obtained in the processing of step P8026 as the lottery result (step P8029).

In the fluctuation pattern selection process of this embodiment, the process from step P8025 to step P8028 is looped to sequentially compare the thresholds of the first record to the last record in the fluctuation pattern table with the acquired random number value to identify the fluctuation pattern, and the loop is exited when the fluctuation pattern is identified. In terms of the program, the process from tag "hp_select_1" to tag "hp_select_2" corresponds to this loop, as shown in FIG. 305.

In addition, in the variation pattern selection process of this embodiment, an index is created with the top address of the table as the data reading start position, and the bit transfer instructions "RBT A, (HL+).5" and "RBT W, (HL+).2" are executed sequentially. This starts reading data from the top of the table, making it possible to read the next data consecutively without recalculating the index. In this way, data can be obtained without resetting parameters even when obtaining data consecutively, making it possible to simplify the program.

[18-8. Other application examples]
Here, the application example shown in Fig. 303 uses the bit transfer command in this embodiment for a table for selecting a variation pattern, but it is not necessary to limit the use to this, and it can be applied to tables for other uses. For example, it can be applied to a table for identifying input information from various ports of the main control MPU 1311 of the main control board 1310, which is composed of port addresses, logical correction values, mask values, data area addresses, etc. for each port. In this case, if all the data constituting the table is not in byte units, the effect of the data transfer command in this embodiment can be obtained.

As another example, it can also be applied to data for creating commands to be sent to various boards, for example data specifying parameters of the command to be sent. Specifically, if the command is for specifying the number of prize balls in a prize ball command that indicates the number of prize balls to be paid out, then if the number of prize balls is between 1 and 15, it can be specified with a capacity of 4 bits. In this case, a capacity of 5 bits can be reserved to allow the specification of a number of prize balls greater than 16, or the first bit can be fixed to "1" to specify the number of prize balls, and the number of prize balls can be specified with the lowest 4 bits.

As yet another example, it can be applied to a table for identifying areas in which various data are stored. Specifically, it is a table made up of records including information for identifying data (information for identifying data) and information for identifying the address of the area in which the data is stored. Rather than storing the address itself, the information for identifying the address of the area in which the data is stored may be such that a base address is stored in another area beforehand, and the table stores the difference value from the base address (difference address). This makes it possible to reduce the capacity required to store addresses. It also makes it possible to flexibly respond to cases where there is a large amount of data or data capacity, or when the data capacity changes.

As another example of a table for identifying an area in which various data is stored, the address (2 bytes) of the area in which data is stored may be identified by combining an upper address (1 byte) and a lower address (1 byte). In this case, the upper address is stored in a separate area in advance as reference address information, and only the lower address is stored in the table. By allowing the lower address to be stored in an area smaller than 1 byte, the data volume can be reduced. Furthermore, since the address in which data is stored can be identified without calculation (or with a simple calculation), the process for identifying the address can be simplified. Furthermore, since the address in which data is actually stored can be easily identified by referring to the table, maintenance can be facilitated, such as when reviewing the address in which data is stored.

In addition, as described above, the data compression technology in this embodiment makes it possible to obtain data of a specified number of bits, so it can be applied even when data of different sizes are stored consecutively. However, when data of different sizes are stored consecutively, it is necessary to specify the size of each piece of data, and there is a possibility that the data volume cannot be efficiently reduced by storing the size of each piece of data individually. Therefore, by reserving an area for the data volume corresponding to the maximum value of a series of data and storing each piece of data, it is possible to obtain data without specifying the size of each piece of data, and the entire process can be simplified. Note that, as described above, when storing multiple types of data as one record in a table, first, the size of each piece of data constituting the record is specified, and then each record of the table is obtained based on the specified size of the data, thereby reducing the data volume and simplifying the process at the same time.

In addition, if the tables have the same configuration, compressed data can be obtained using common processing, so it is a good idea to standardize the structure of similar tables. For example, if multiple fluctuation pattern tables are defined according to the game status, as described above, even if it is possible to reduce the amount of data for each table because there are a small number of fluctuation pattern types, by making them a common structure, it becomes possible to obtain data from the fluctuation pattern tables using common processing regardless of the game status, and the overall processing can be simplified.

[18-9. Effects, etc.]
As described above, by reading data using the bit transfer command of this embodiment, unnecessary bits can be deleted to create a compressed table structure, making it possible to minimize the area in which data is stored. This makes it possible to manage more data and perform more detailed game control.

In addition, since it is possible to separate the process of creating an index for executing the bit transfer command of this embodiment, it is possible to prevent the original game control from becoming complicated. Therefore, it is possible to prevent an increase in data capacity while preventing the conventional game control from becoming complicated.

In addition, according to this embodiment, it is possible to read multiple data from consecutive areas by continuously executing bit transfer commands while incrementing the index, which simplifies the process of reading the required amount of data with the same number of bits or reading records (data groups) composed of data with multiple types of bit numbers.

In addition, according to this embodiment, even data that requires a capacity of more than 8 bits (1 byte) can be compressed and stored, and the data can be read using the same procedure as data of less than 8 bits, making it possible to provide a highly versatile means of reading data.

The data structure that can be read by the bit transfer command of this embodiment is effective when the size of the data is not in bytes, and the more data there is, the more capacity is saved. Therefore, it is particularly useful when there are many types of defined data, such as data used in processing related to special and normal symbols, such as variable patterns. Note that, when the data is composed of bytes, it is more efficient to use a normal load command ("LD") or the like. On the other hand, since the bit transfer command of this embodiment requires more procedures for reading data than the load command, when it is necessary to quickly perform standard processing such as processing at power-on or power outage processing, or when the number of data to be handled is small, the load command may be used in preference to the bit transfer command of this embodiment. In this way, when controlling a game based on a wide variety of data, such as control related to the variable display of special and normal symbols, it is possible to reduce the data capacity by using a bit transfer command that can acquire data in bits. On the other hand, when it is necessary to quickly process standard procedures, it is possible to simplify and speed up the processing by using a load command that can access data stored in a directly specified address without the need to create an index.

[19. Improvement of instructions for invoking processing]
Above, the means for reducing the capacity by compressing the area for storing data has been described. Next, the means for speeding up the processing by shortening the word length of the instructions (commands) constituting the program, thereby reducing the procedure (number of clocks, number of steps) processed by the calculation means (main control MPU 1311), and for simplifying the program by executing instructions that are frequently combined and executed together will be described. Here, an instruction that is an improvement of an instruction (INV instruction) for executing a predefined process will be described. Since the INV instruction is executed very frequently, it is possible to speed up the entire game control process by speeding up the execution of the INV instruction. In addition, it is possible to simplify the program by implementing an instruction that integrates the processes that are combined and executed when the INV instruction is executed.

[19-1. INV command]
First, an outline of a normal INV command will be described. The word length of the INV command differs depending on the type of MPU (processor). So it is 4 bytes.

The INV instruction specifies the address where the process to be executed is stored. At this time, the return address that will be used to return to the calling process after the called process has completed is stored in the stack area. This means that by executing a return instruction in the called process, the program counter value is rewritten to the return address stored in the stack area, returning to the caller and allowing processing to continue from the instruction following the INV instruction that was executed.

In addition, the INV instruction can specify all addresses in the memory area, making it possible to call all processes stored in memory. This allows the placement of programs and data to be set freely. However, this high degree of freedom can increase the procedure for calling processes (number of clocks required), which can result in overhead; it is therefore desirable to reduce this and thereby reduce the overall processing load.

In order to solve the above problem, a prior art has been proposed that reduces the load required to call frequently executed processes by defining a table in advance that stores the addresses of the processes to be called, and that makes it possible to call processes while reducing the load required to identify the placement of the processes based on the table (for example, JP 2016-174833 A). Below, we will provide an overview of the INVD instruction, which has a function similar to that of the prior art.

[19-2. INVD command]
As described above, in the INVD instruction, a processing address table including addresses where frequently executed processes are stored is created in advance, and the process to be called when the INVD instruction is executed is specified based on the processing address table. An index (1 byte) is assigned to each process, and it is possible to call a specific process by simply specifying the index (1 byte) without directly specifying the address (2 bytes). By shortening the instruction word length, it is possible to speed up processing and simplify the program structure. In addition, even if the program layout in memory (the storage location of the processing) is changed, Since it is only necessary to change the data defined in the processing address table, it is possible to flexibly respond even when the program layout or configuration is changed, thereby improving the efficiency of program development.

Here, we will explain the configuration of the memory area that stores the processing address table. Figure 306 is a diagram showing an example of an address map that shows the configuration of the memory area of the main control board 1310 of the gaming machine of this embodiment. The memory area is provided by RAM 1312 and ROM 1313.

The areas accessed by game control in the main control board 1310 of the gaming machine of this embodiment include the RAM area (0000h-03FFh), internal function register area (1300h-13DFh, 1400h-14DFh), ROM area (8000h-C12Fh) and expansion ROM area (C130h-FDFFh). Areas other than these are unused areas (outside of the area in use) and are generally prohibited from being accessed by the game control program.

Regarding each area, the RAM area is an area that temporarily stores data to be read and written when a program is executed. The internal function register area stores the setting values of various registers for controlling internal functions. In this embodiment, the internal function register area is located in two places, but it may be one area, or it may be divided into three or more areas. Note that the internal function register area is similar to the RAM area in that it stores information, but unlike the RAM area, values are not stored during the process of calculations, etc. of the main control MPU 1311, but rather specify the functions to be executed by the main control MPU 1311. In other words, once the value of the internal function register area is set when the power is turned on, the set information cannot be changed, unlike the information stored in the RAM area.

The ROM area includes a program/data area (8000h-BFFFh), a ROM comment area (C000h-C07Fh), a processing address table area (C080h-C0FFh), and a HW parameter area (C100h-C12Fh). The program/data area stores read-only data and programs. The ROM comment area stores data such as the program title and version. The processing address table area stores data related to the process (subroutine) that is called when a specific process call command (for example, the INVD command described below) is executed. The HW parameter area stores hardware-related parameters for executing the internal functions of the main control board 1310.

The expansion ROM area (C130h-FDFFh) is allocated as an unused (access prohibited) area in normal (mass-produced) gaming machines, but in development gaming machines it is an area that can be allocated as a program/data area, and is allocated to a ROM separate from the ROM in which the programs/data are stored. By doing this, mass-produced gaming machines do not have an expansion ROM, and programs/data placed in the expansion ROM area for development purposes will not function by mistake.

The expansion ROM area may be stored in the same ROM as the ROM in which the programs/data are stored. In this case, the expansion ROM area is set as an inaccessible area in mass-produced gaming machines, so that even if development programs/data are mistakenly left in the expansion ROM area, the HW parameters should be set so that the programs/data will not function.

Next, the configuration of the processing address table will be explained. Figure 307 is a diagram showing an example of program implementation of a processing address table in which the addresses of processes (subroutines) are stored. In the implementation example shown in Figure 307, in addition to the INVD instruction processing address table in which the addresses of processes executed by the INVD instruction are stored, an interrupt processing address table in which the addresses of processes executed when various interrupts occur may also be included. In the following explanation, unless otherwise specified, "processing address table" refers to the INVD instruction processing address table used by the INVD instruction.

The process address table stores the addresses of processes that are executed frequently and are used generally. Examples of frequently executed processes include timer interrupt processes and processes executed within the main loop process of the initialization process on the main control board. Examples of generally used processes include processes that read signals from specified ports and processes that perform specified calculations on specified numerical values, which will be described in detail later. In order to maintain versatility, these processes are very simplified (for example, processes with small program capacity and short processing times) compared to processes specialized for game control (for example, jackpot determination processes and variation pattern selection processes).

As shown in FIG. 306, the processing address table is stored in an area different from the area where the program is stored. As mentioned above, the processing called by the INVD command is highly versatile, and may be used as a common processing in the development of other gaming machines. By separating and arranging the areas in this way, it is possible to manage the processing separately from the program of the model-dependent processing, and the development efficiency of the gaming control program can be improved. In addition, since a ROM comment area is arranged between the area where the processing address table is stored and the area where the program is stored, even if a malfunction occurs during program execution and processing is executed beyond the program/data area, data that does not match the program code, such as the program title, is stored in the ROM comment area, so that unexpected processing can be prevented from being executed without reaching the area stored in the processing address table.

In the example shown in Figure 307, 16 types of processing are defined, INVD0 to INVD15. For example, INVD0 includes a port read processing (PORT_RD), and INVD1 includes a data setting processing (DAT_SET). When executing the INVD command, simply specify the number (processing index) that corresponds to the processing to be called.

Here, the process index will be explained with reference to FIG. 308. FIG. 308 is a diagram showing an example of program code that defines an index that identifies a process stored at an address stored in a process address table. In the program code shown in FIG. 308, a process index that can be called with the INVD command is predefined. Within the program, rather than directly specifying a numerical value, a variable corresponding to the process name (function name) can be specified. For example, when executing a port read process (PORT_RD), rather than directly specifying the constant "0", it is sufficient to specify it with a label (_PORT_RD). This improves the readability of the program and improves the development efficiency of game control programs.

In addition, in the above-mentioned prior art (JP Patent Publication 2016-174833), the upper address is set in advance and the lower address is specified, rather than specifying a number (processing index) as in this embodiment. Therefore, when the address of a process is changed, the command that executes that process must be modified each time, and development efficiency cannot be improved compared to when a number is specified.

In contrast, in this embodiment, the process index is set to 0 to 15, and the number of processes defined in the process address table is set to 16, so the index capacity is 4 bits. This makes it possible to reduce the memory capacity required to identify the process to be executed by the INVD instruction compared to specifying a (lower) address. Furthermore, since the instruction portion (opcode) of the INVD instruction is composed of 4 bits, it can be configured with a total of 8 bits (1 byte) including the index capacity (operand). Therefore, the word length of the INVD instruction is 1 byte, and compared to calling a process with a normal call instruction (INV instruction), the number of clocks required for the main control MPU 1311 to call the process specified by the INVD instruction can be reduced, and the program capacity can also be reduced.

In this embodiment, the INVD command is frequently used in processes executed when the power is turned on and processes during gameplay (main control side main processing, timer interrupt processing, etc.), but is used less frequently in processes during power interruption. This is to prevent an increase in overhead when calling processes by increasing the number of reference points in memory while the power is cut off, and to reduce power consumption as much as possible. Furthermore, since processes during power interruption are executed less frequently than processes during gameplay, and their specifications do not change frequently, and there is a limit to the number of processes that can be called by the INVD command, processes called when the power is cut off are configured not to be executed by the INVD command, except for general-purpose processes. In this way, the processes during power interruption are configured to simplify control and reduce the execution load of processes, rather than using the INVD command to reduce program capacity.

Next, the procedure for executing processing by the INVD instruction will be described. Figure 309 is a diagram for explaining the operation when the INVD instruction is executed in this embodiment. Figure 309 explains the changes in the program counter and stack pointer when the INVD instruction stored at address "80A4h" is executed.

When the INVD instruction is executed, the address to which the program will return after the processing executed by the INVD instruction is completed is first saved to the stack. In the example in FIG. 309, the INVD instruction stored at address "80A4h" is executed, and since the word length of the INVD instruction is 1 byte, the value saved to the stack is "80A5h".

Next, the 2-byte data (call destination address) corresponding to the number (operand, process index) specified by the INVD instruction is retrieved from the process address table. The retrieved 2-byte data (call destination address) is set in the program counter, and the specified process is called. Here, the procedure for calling the specified process is explained with reference to Figure 310.

Figure 310 is a diagram explaining the procedure for identifying the process to be called by the INVD command in this embodiment. Here, the procedure for executing the port read process (PORT_RD) is explained. As shown in Figure 307, the port read process (PORT_RD) is defined at the top (0th) of the process address table.

The number specified by the INVD command shown in Figure 310 is "_PORT_RD", and referring to the INVD command processing address number definition, the actual value of "_PORT_RD" is "0". Next, the processing address table is referenced to identify the command corresponding to the specified number. Specifically, "PORT_RD" is identified. Note that the left column of the processing address table in Figure 310 corresponds to the row number and is added for explanation purposes. As shown in Figure 307, it is not included in the actual processing address table. The INVD command identifies the command corresponding to the specified number. "PORT_RD" is a label indicating the processing address ("80D4h").

When the address of the process specified by the INVD instruction is identified, the program counter is updated to the address of the specified process. Returning to the explanation of Figure 309, when the INVD instruction is executed, the program counter is updated to "80D4h", which is the starting address of the port read process "PORT_RD". At this time, the value of the stack pointer moves two bytes because the address at the time of return of the calling process was stored in the stack area, and is updated from "01F8h" to "01F6h".

Then, the called process (port read process "PORT_RD") is executed, and instructions are executed sequentially from the called address ("80D4h"). Then, to return to the caller with a return command, the return address saved in the stack area is returned to the program counter, and subsequent processes are executed sequentially. At this time, the value of the program counter is updated from the address of the return command, "80E8h", to the address saved in the stack area, "80A5h". Furthermore, by changing the stack pointer from "01F6h" to "01F8h", the area in the stack area where the return address was stored becomes available again. After returning to the caller process, sequential processes are executed from address "80A5h".

As described above, the INVD instruction in this embodiment makes it possible to call a process in fewer clocks than a normal process call instruction, i.e., at higher speed, and furthermore, it is possible to compress the program capacity. In particular, as described above, by configuring frequently called processes to be callable with the INVD instruction, it is possible to speed up the entire control process. In this embodiment, 16 types of processes are defined, as defined in the process address table (Figure 307). Specifically, these are port read processing (PORT_RD), data setting processing (DAT_SET), work area setting processing 1 (WORK_AD), work area setting processing 2 (WORK_AD_INC_HL), 2-byte data search processing (LD_HLA_HL), command buffer setting processing 1 (CMBF_SET1), command storage processing (COM_SET), output judgment common processing 1 (OHAN_SUB1), output judgment common processing 2 (OHAN_SUB2), output port data setting processing (PORT_DAT_SET), variable information number search processing (TI_SRCH), fraud notification setting processing (ILG_OUTSET), data search processing (HLA_SRCH), multiplication value addition address acquisition processing (MUL_WA_HL), and SPI 2-byte output processing (SPI_TX_WA).

In the following, each process executed by the INVD command in this embodiment will be described. Examples of programs (modules) for each process are shown in Figures 311 to 324. The comments at the beginning of each program describe the input register, output register, protection register, and caller. The input register is a register in which a value set in the caller module is stored. The called module is executed using the value set in the input register. The output register is a register in which a value set in the called module is stored. The execution result of the process, etc. is stored. The protection register is a register whose use is restricted in the called module. Note that it may be used if the value at the start and end of execution of the called module is the same. For example, it is acceptable to use the register if it is temporarily stored in a stack or the like when it is destroyed (used), and then restored after use. The caller is the module that calls the module. If the number of modules listed here is large, it can be recognized that the module is used frequently. Note that the actual number of executions depends on the frequency of calling the caller module itself, so even if the number of modules is small, it does not necessarily mean that the module is used less frequently.

Figure 311 is a diagram showing an example program for the port read process (PORT_RD) of this embodiment. The port read process is a process for reading the input signal of a specified port. Specifically, the port read process (PORT_RD) reads the input signal of the port corresponding to the port address specified in the W register (input register) and outputs the port data to the A register (output register). At this time, the port input signal is read multiple times, and a specific flag (e.g., J flag, Z flag) included in the PSW (processor status word, status register; output register) is updated depending on whether the acquired signals match. This makes it possible not only to read the input signal from the specified port, but also to determine whether the signal is being input normally.

Figure 312 is a diagram showing an example of a program for the data setting process (DAT_SET) of this embodiment. The data setting process is a process for setting a series of data defined in a table specified by a setting data address set in the HL register in a work area (for example, the DE register) all at once. The first data (record) of the table specified in the data setting process defines the number of data settings (the number of data in the table), and the subsequent data (records) are composed of the (lower) address of the work area that stores the setting value and the setting value stored in the work area. The setting values are read out sequentially by calling the work area setting process 2 (WORK_AD_INC_HL) described later with the INVD command. As described above, when the data setting process is started, the number of data settings stored in the address specified in the input register is first obtained, and then the number of data (records) corresponding to the number of data settings is obtained, making it possible to obtain a series of data regardless of the number of data.

Figure 313 is a diagram showing an example of a program for the work area setting process 1 (WORK_AD) of this embodiment. The work area setting process 1 is a process for setting a work area that is temporarily used when the program is executed. In this embodiment, the address of the work area is stored in the DE register. The address of the work area is determined by the data of the table specified by the address stored in the HL register. The work area setting process 1 (WORK_AD) is also called from processes executed by other INVD instructions. In this way, the processes executed by the INVD instruction are composed of very short programs that realize general-purpose functions, and can be called multiple times. This allows the overall game control to be speeded up by combining and configuring the processes called by the INVD instruction. In addition, since duplication of program code can be avoided, the program capacity can be compressed.

Figure 314 is a diagram showing an example program of work area setting process 2 (WORK_AD_INC_HL) in this embodiment. In work area setting process 2, after work area setting process 1 is executed, the specified setting data address is set to the next address, making it possible to simplify the process of setting consecutive work areas.

Here, we will explain an example of using data setting process, work area setting process 1, and work area setting process 2, and the process of retrieving data from a table consisting of the (lower) address of the work area and the setting value to be stored in the work area and storing the data in the work area, in accordance with the data setting process program shown in Figure 312.

In the data setting process, the number of records stored in the first row of the table specified by the setting data address is obtained, and the setting of a work area by work area setting process 2 and the setting of data in that work area are repeated for the number of records (loop processing). In the loop processing, first the setting data address is updated (incremented) to move to the next row, and then the INVD command is used to call work area setting process 2.

In work area setting process 2, a work area is set by the address specified by the set data address in work area setting process 1. The set data address is then updated (incremented) to the address of the data storage area. After that, the process returns from work area setting process 2 to the data setting process, and the data specified by the set data address (value set in the HL register) is stored in the work area (value set in the DE register). When data for the number of records in the table is set in the corresponding work area, the process exits from the loop process and ends the data setting process.

By configuring it as described above, the data setting process, work area setting process 2, and work area setting process can be called hierarchically using the INVD command, simplifying the program structure and reducing the program capacity.

Figure 315 is a diagram showing an example program for the 2-byte data search process (LD_HLA_HL) of this embodiment. The 2-byte data search process is a process that selects an address set in a data table specified by the HL register (input register) and sets it in the HL register. Since the address value is 2 bytes, the address of the target data table is identified by doubling (adding 2) the selection value A register (input register), and the address is then reset to the HL register (output register). For example, it is used when executing a process to select a destination address based on a job number (selection value) based on a jump table when transitioning to various processes in special symbol/special electric role control processing.

Figure 316 is a diagram showing example programs for the jackpot information command setting process (TDINF_CMBF_SET), command buffer setting process 1 (CMBF_SET1), and command storage process (COM_SET) of this embodiment. Normally, in a process called by an INVD command or the like, a return (BK) command or the like is placed at the end, and the process returns to the original process. Since the jackpot information command setting process (TDINF_CMBF_SET) and command buffer setting process 1 (CMBF_SET1) shown in Figure 316 do not have an instruction for returning to the original process, after the jackpot information command setting process is completed, command buffer setting process 1 is executed, and then command storage process is executed. Then, the return command placed at the end of the command storage process returns to the original process.

When trying to call command buffer setting process 1 with the INVD command in the jackpot information command setting process, as explained in Figure 309, processing such as storing the return address in the stack area is required, but by placing the programs contiguously, this processing can be omitted, and the program size can be reduced. In addition, since the stack area is not used, there is also the effect of reducing memory usage.

The jackpot information command setting process (TDINF_CMBF_SET) is a process for setting a jackpot information command that specifies the action to be taken when a jackpot occurs. It sets the corresponding jackpot information command according to the situation, such as the opening and closing action of the jackpot entry port during a jackpot. After that, the command is sent from the transmission buffer to the destination by the command buffer setting process 1 and the command storage process, which are executed continuously.

The command buffer setting process 1 (CMBF_SET1) identifies the command to be actually sent using the reference command data (MODE value) and the command addition data for specifically identifying the command, and stores it in the transmission buffer using the command storage process described below. The command stored in the transmission buffer is sent to the destination as appropriate. The "reference command data" consists of two bytes, and for example, in the case of the variation pattern of special chart 1, it is "1001h" (upper byte: variation pattern type, lower byte: command reference value (starting from 01h)). When variation pattern 5 (05h) is selected as the variation pattern of special chart 1, the result ("1006h") obtained by adding the value of variation pattern 5 (05h) to the lower 8 bits of the above reference command "1001h" becomes the command to be sent.

The command storage process (COM_SET) is a process for storing commands, etc., in the transmission buffer. The specific procedure is as follows: first, the state of the transmission buffer is judged to determine whether or not there is a certain number of bytes or more of free space. If there is no free space in the transmission buffer, the process is terminated. On the other hand, if there is free space in the transmission buffer, the status and mode constituting the command stored in the HL register are set in the transmission buffer. Furthermore, a sum value obtained by adding the values of the H register and L register is set in the transmission buffer. In the case of the command "1006h" which selects variation pattern 5 (05h) as the variation pattern of the special diagram 1 mentioned above, the sum value is "10h" + "06h" = "16h". Note that the sum value does not necessarily have to be set in the transmission buffer.

In addition, the commands stored in the transmission buffer consist of two bytes (excluding the sum value), with the first byte indicating the type of command being sent (variation pattern, symbol stop, reserved memory, jackpot, etc.), and the second byte indicating the specific action for that type (if it is a variation pattern type, the specific variation pattern number).

The transmission buffer is a FIFO memory for serial communication built into the main control MPU 1311, and is a separate memory from the RAM 1312. The transmission buffer is configured to be able to store multiple bytes of information (it has a capacity of 64 bytes). Commands stored in the transmission buffer are serially output to the destination by the hardware in the order in which they were stored.

Figure 317 is a diagram showing an example of a program for the output judgment common process 1 (OHAN_SUB1) of this embodiment. The output judgment common process 1 acquires data from the information judgment output data (value indicated by the HL register), judges whether a flag is set in the work area (lower address) set in the information judgment output data, and if the flag is set, sets the information set corresponding to the flag (work area) in the A register (port output calculation value). The above work is looped the number of times set in the information judgment output data, and the value output to the port is stored in the A register. For example, when the information judgment output data is "solenoid information judgment output data", the number of loops is set to 3, and the contents of the large prize opening 1 solenoid flag (DSOL1_FG) are judged first, and if 1 (flag value) is set in DSOL1_FG, _TDSOL1_PB (large prize opening solenoid 1 bit data) set corresponding to DSOL1_FG is set as the output value (the large prize opening solenoid 1 is turned ON by outputting this value). This process is repeated the number of times (three times) set in the solenoid information determination output data.

Figure 318 is a diagram showing an example program for the output judgment common process 2 (OHAN_SUB2) of this embodiment. The output judgment common process 2 acquires data from the status judgment output data and processes the LED port output value, etc. The status judgment output data, like the information judgment output data, has a table structure, acquires the number of records in the table, and processes that number of pieces of data.

Figure 319 is a diagram showing an example program for the output port data setting process (PORT_DAT_SET) of this embodiment. The output port data setting process is a process for setting information in the I/O area to an output port or built-in register, and outputs the setting value set corresponding to the output destination (output port, built-in register) to the output destination set in the table (setting data address).

Figure 320 is a diagram showing an example program of the variable information number search process (TI_SRCH) of this embodiment. The variable information number search process is a process for searching a specified data area for an information number that matches a specified comparison value, and is used when selecting variable pattern information based on a variable pattern random number. For example, the comparison value is stored in the W register, the address of the data area is stored in the HL register, and the search result is written to the A register. Specifically, the contents of the W register (random number value, etc.) are compared with the information set in the table specified by the HL register (value to be compared with the random number (judgment value)), and the process is repeated until a condition (for example, random number value < judgment value) is satisfied. When the condition is satisfied, the information set corresponding to the judgment value (search result (for example, variable pattern number, etc.) is stored in the A register and the process returns to the caller.

Figure 321 is a diagram showing an example program for the fraud notification setting process (ILG_OUTSET) of this embodiment. The fraud notification setting process is a process for issuing a notification when an abnormality occurs. Specifically, the specified abnormality display command is set by the command storage process, and the time for issuing the fraud notification is set.

Figure 322 is a diagram showing an example of a program for the data search process (HLA_SRCH) of this embodiment. The data search process is a process for searching for specified data from specified search data. In the data search process, first, data matching the comparison value is searched from the area (address) storing the specified search data. At this time, the data to be searched is the address of the area to be searched next. Furthermore, a search is performed based on the specified selection value from the area of the searched address. The data search process is performed by combining multiple search processes, and the subsequent search process is performed based on the search result of the preceding search process. In this embodiment, the first search is performed by the 2-byte data search process (LD_HLA_HL), and the next search is performed by the variable information number search process (TI_SRCH). This makes it possible to identify multiple tables defined according to the game state, etc. in the first search, and to obtain a specific variable information number in the next search. By implementing it in this way, it is possible to make it easier to perform multi-stage searches, and to reduce the amount of data by storing data in stages.

As described above, in this embodiment, a single process is constructed by combining multiple processes that can be called by the INVD instruction, which has a shorter word length than other call instructions. By calling processes configured in this way with the INVD instruction, it is possible to speed up the entire process while reducing the program size. In addition, this can be applied to processes that are executed in multiple stages, not just data search processes. For example, if multiple arithmetic processes that can be called by the INVD instruction are defined, these can be combined to realize more complex arithmetic processes.

Figure 323 is a diagram showing an example program for the multiplication value addition address acquisition process (MUL_WA_HL) of this embodiment. The multiplication value addition address acquisition process multiplies a specified base value by a multiplication value and adds the result to a specified base address value. This process consolidates commonly performed standard operations, allowing the program to be simplified.

Figure 324 is a diagram showing an example program for the SPI 2-byte output process (SPI_TX_WA) of this embodiment. The SPI 2-byte output process is a process for setting output data to the SPI port when outputting 2 bytes of data by SPI (Serial Peripheral Interface) communication. SPI communication is used when transmitting data to light-emitting elements such as LEDs or drivers such as motors and solenoids.

As described above, the process called by the INVD command in this embodiment is made up of short processes of a few to several tens of bytes, which increases its versatility, and the INVD command can call processes with a word length of 1 byte, which speeds up the entire game control program and reduces the program size.

[19-3. INVS Command]
The INVD command makes the procedure of calling a process (subroutine) more efficient by storing the address in a process address table in advance. However, since only predefined processes can be called, adding new processes to be called is not possible. When changing the address, the contents of the processing address table and the definition information of the processing address table number had to be updated. Also, the word length was reduced by limiting the number of processes that could be called by the INVD instruction to 16. However, if an attempt is made to apply this to 17 or more types of processing, the processing speed will decrease, and there is a risk that the effect of using the INVD instruction will be lost.

Therefore, in this embodiment, we propose the INVS instruction, which has a shorter word length than the normal INV instruction but has more flexibility than the INVD instruction. By storing a process (subroutine) in a specific area, the INVS instruction reduces the overhead (procedures, number of clocks) required to call the process, and can achieve equivalent processing with a smaller word length than the INV instruction. Furthermore, if the process is stored in a specific area, any number of processes (subroutines) can be defined, allowing for more flexibility than the INVD instruction. Note that the specific area (third area) is included in the program/data area of the ROM area described in FIG. 306.

Next, the INVS command will be further explained. FIG. 325 is a diagram of an excerpt of a part of a program that calls a process by the INVS command of this embodiment, where (A) is an excerpt of a program that calls a solenoid drive process and a motor drive process, (B) is an example program (part) of the solenoid drive process, and (C) is an example program (part) of the motor drive process. The example program shown in FIG. 325 is composed of "address", "program", "mnemonic", and "comment". "Address" is the location where the program is stored. "Program" is so-called machine language, and is an instruction that can be directly interpreted and executed by the main control MPU 1311. "Mnemonic" is a simplified memory symbol that makes it easier to program the machine language (a string of numbers) for executing the program. The value of "program" corresponds to the value of "mnemonic". "Comment" is an explanation to make the program easier to read, and is ignored when the process is executed.

In the example shown in FIG. 325, solenoid drive processing ("89A6h") and motor drive processing ("89CCh") are called by the INVS command. The upper 4 bits of the INVS command ("Ch") constitute a command to access the first area (8000h to 8BFFh) of the specific area, and the lower 12 bits indicate the address of the process to be called. Specifically, the lower 12 bits ("9A6h") of the program "C9A6" that calls the solenoid drive processing specify the address where the solenoid drive processing is stored, and since the upper 4 bits of the first area are fixed to "8***h", the address of the storage location of the solenoid drive processing, combined with the lower 12 bits of the program, is "89A6h", as shown in FIG. 325 (B). Similarly, the lower 12 bits of the motor drive processing are "9CCh", so the address of the storage location is "89CCh". As described above, in this embodiment, by storing processing in a specific area, the process (steps, number of clocks) required to identify the processing to be called is reduced, and it is possible to execute the processing stored in the first area with a 2-byte command.

It is also possible to access the second area (8C00h to 93FFh) of the specific areas, but in this case, unlike when accessing the first area, the most significant byte is the opcode of the INVS instruction and the least significant 2 bytes are the call destination address, making the instruction 3 bytes long.

The game control program is designed with address 8000h as the starting address, and the frequency of access to the first area is much higher than the frequency of access to the second area. Therefore, by shortening the word length when accessing a frequently used area, it is possible to compress the program capacity and reduce the processing time (number of clocks) for the command.

On the other hand, the INV instruction, which executes processing stored in any area in memory, has a four-byte instruction length, with the upper two bytes being the INV instruction's code information (opcode) and the lower two bytes being the callee address (operand). Therefore, in this embodiment, by using the INVS instruction, which executes processing stored in a specific area, it becomes possible to execute processing with a smaller word length than the INV instruction, which executes processing stored in any area in memory.

In this embodiment, frequently called processes (subroutines) are placed in specific areas (particularly the first area), and less frequently called processes (e.g., error processing and processing for outputting a test signal) and data are placed in areas other than the specific area, thereby making it possible to speed up overall processing. If there is a limit to the capacity of the program code due to regulations, etc., the first area is given priority for placing the program. If possible, such as when the capacity limit of the program code is smaller than the capacity of the first area, all processes called by the INVS instruction are stored in the first area. It is also possible to configure the system so that all processes (programs) called by the INVS instruction are stored in the first area, and no programs are stored in the second area. By clearly defining the area in which the programs are stored, the configuration can be simplified and management can be made easier.

In addition, at least processes directly related to game control are placed in the first area, and error processing and display of the role ratio monitor (base monitor), which are not directly related to game control, are placed in the second area. As mentioned above, by placing processes that are frequently called in the first area, the entire game control processing can be accelerated, but related processes may be arranged to improve the readability of the entire program and increase development efficiency by consolidating them. Since processes that can be called with the INVS command can be freely placed in a specific area, for example, when there are multiple specifications for the same model, controls common to each specification are consolidated in a specified area, and processes whose controls differ for each specification (depending on the specification) are consolidated and placed in another area. Specifically, special chart related processes, special electric role related processes, normal chart related processes, normal electric role related processes, etc. are not distributed and placed, but related processes (for example, special chart related processes such as fluctuation start processing, fluctuation processing, pattern determination processing, and fluctuation stop processing) are consolidated and placed. Furthermore, even in the consolidated and placed area, programs may be placed in an order according to the execution timing, for example, in accordance with the control executed in normal play. Specifically, in special chart-related processing, the symbols should be arranged in an order that corresponds to the timing of the initial winning, the start of the change, the end of the change, etc.

On the other hand, error processing and display processing of the role ratio monitor (base monitor) that can be used universally even for different gaming machines and are not affected by the game specifications are also consolidated and placed. Since these processes may be used for multiple types of machines, it is convenient to manage them separately. For example, if there is a team developing multiple types of machines in parallel, the above-mentioned processing that depends on the game specifications is shared within the team, while processing that is common to these machines is shared between the teams, which makes it possible to improve the overall development efficiency of gaming machine development. Furthermore, since processing that depends on the game specifications may differ for each machine even if the capacity upper limit is set, by placing the program (module) of the processing that can be used universally even for different gaming machines in the second area, it is possible to share the address even when the processing is called from the game control program of a different machine.

As described above, the INVS command makes it possible to place programs (modules) of any process within a specific area in accordance with development efficiency and management efficiency (maintenance efficiency). While the INVD command prioritizes general-purpose processes such as port reading and data reading in order to limit the number of processes that can be defined, it is now possible to place processes that depend on the game content together, making management easier by aggregating processes by function and improving development efficiency.

It is also possible to execute processing by the INVD command within a module called by the INVS command. This configuration makes it possible to further speed up processing called by the INVS command and compress the program size, and furthermore to speed up the entire game control program and compress the program size. It is also possible to call a module by the INVS command within a module called by the INVD command. Since there is a limit to the number of processes that can be defined in a processing address table, it is possible to call highly versatile processes that could not be defined in the processing address table by the INVS command. In this way, it is configured so that processing can be called mutually within modules called by the INVD command and the INVS command.

In addition, processes that are executed at regular intervals and are executed very frequently, such as timer interrupt processes, are placed in a specific area (first area), while processes that can be called from timer interrupt processes but are actually called less frequently, such as setting operation processes, are placed outside the scope of the specific area. By configuring in this way, it is possible to secure the capacity of the specific area without reducing the processing speed.

Furthermore, the program may be placed only in the first area where the speed-up effect of the INVS instruction is more pronounced, and the second area may not be accessed from the INVS instruction. This simplifies the management of memory areas, such as program placement. For example, by placing a program that defines a process that can be shared between different models outside a specific area with fewer constraints rather than in the second area, the degree of freedom in program placement is increased, and constraints that arise from differences in program capacity when sharing programs can be reduced. Furthermore, even if the specifications of the INVS instruction change due to a change in the specifications of the main control MPU 1311, it is easy to respond if there is only one area accessible by the INVS instruction, and there is no need to significantly change the basic configuration of the game control program, so existing programs and data can be utilized, improving development efficiency.

[19-4. INVI Command]
So far, we have described ways of speeding up instructions that call processes. Now, we will describe means for simplifying programs by implementing instructions that integrate processes that are frequently executed in combination.

When a specific program is executed to control a game, if information in memory is rewritten by other processes executed in parallel, this may cause problems in the progress of the game. For this reason, a method is generally used to prohibit interrupts until the process is completed so that information stored in an area commonly accessed by multiple processes is not rewritten. In particular, a procedure is frequently used in which interrupts are prohibited when a specific process is executed, and the prohibition of interrupts is released after the specific process is completed.

In game control, procedures such as disabling interrupts, calling a process, and lifting the interrupt ban are frequently executed, but because there is a limit to the size of the program area, it has been desirable to reduce the size of the program by omitting common procedures. Therefore, in this embodiment, the INV command that calls a process is extended, and an INVI command that disables interrupts before the process is called is proposed.

The INVI instruction specifies the process to be called and executes it, so the execution procedure is the same as the INV instruction. However, the internal processing when the INVI instruction is executed involves storing the necessary data in the stack area and disabling interrupts before moving the program counter to the specified address. The called process is then executed. At the end of the called process, a BKI instruction is executed, which returns to the caller's process while restoring the process to the interrupt state before it was called. In other words, if the interrupt state of the INVI instruction is in an interrupt disabled state, the interrupt disabled state is maintained, and if the interrupt state of the INVI instruction is in an interrupt enabled state, the interrupt prohibition is released. Below, the sequence of steps for the INVI instruction is explained with reference to Figure 326.

Figure 326 is a diagram explaining the procedure for the INVI command in this embodiment. The procedure when the INVI command stored at address "8200h" is executed is explained.

Because the storage destination for the process specified by the INVI command is "A800h," the value of the program counter changes from "8200h" to "A800h." At this time, the address "8202h" (the next address of the caller, the return address after the callee process is completed) indicating the location to return to after the process is executed is stored in the stack area, along with the PSW (Program Status Word) used when the process was called. Therefore, the stack pointer changes from "01F8h" to "01F5h." In the example in Figure 326, the return addresses are stored at "01F6h" and "01F7h," and the PSW is stored at "01F8h."

The PSW is a control word (status register) that controls the order in which instructions are executed in the main control MPU 1311 and indicates and retains the state of the computer system related to a specific program, including the status of the main control MPU 1311 during execution. In addition, the contents of the flag register, the state of interrupts, etc. are stored together in one byte. The PSW will be explained with reference to Figure 327.

Figure 327 shows an example of a PSW in this embodiment, where (A) shows the configuration of the PSW and (B) explains each component. The PSW is composed of a jump status flag (JF), a zero flag (ZF), a carry flag (CF), a half carry flag (HF), a sign flag (SF), an overflow flag (VF), a register bank flag (RES), and an interrupt master enable flag (IMF).

The jump status flag (JF) is a flag used to determine the operating conditions of jump instructions and subroutine instructions. ZF or CF is set depending on the executed instruction.

The zero flag (ZF) is set to 1 if the operation result or transfer data is "00H (0000H)", and is cleared to 0 in other cases. In addition, in bit/flag manipulation instructions, if the specified bit is 0, it is set to 1, and if the specified bit is 1, it is cleared to 0.

The carry flag (CF) sets the carry/borrow during carry flag calculations. It also sets the execution content of a shift/rotate instruction or a bit/flag manipulation instruction. The half carry flag (HF) sets the carry/borrow of the 4th bit in 8-bit calculations.

The sign flag (SF) is set to 1 when the MSB (most significant bit) of the operation result is 1, and is cleared to 0 otherwise. When the most significant bit indicates a positive or negative sign, the sign can be identified by the sign flag. The overflow flag (VF) is set to 1 when an overflow occurs in the operation result, and is cleared to 0 otherwise.

The register bank flag (RES) indicates the selected bank of the general-purpose register. It is set to 0 for bank 0 and 1 for bank 1.

When the interrupt master enable flag (IMF) is 0, interrupts are disabled, and when it is 1, interrupts are enabled. When the DI (disable interrupt) command is executed, IMF = 0 and interrupts are disabled. When the EI (enable interrupt) command is executed, IMF = 1 and interrupts are enabled. An interrupt that can be disabled/enabled in this way is called a maskable interrupt.

Now, let us return to the explanation of FIG. 326. When the INVI instruction is executed, the value of IMF included in the PSW is set to "0" to disable interrupts. At this time, interrupts are disabled with the execution of the INVI instruction without executing the interrupt disable instruction (DI instruction). Furthermore, the value of the program counter is set to "A800h", and processing is executed sequentially from the address "A800h". Then, when processing is executed up to the address "A80Eh", the BKI instruction is executed to return to the caller. In the BKI instruction, the return address stored in the stack area is set to the value of the program counter, and the contents of the PSW are restored to the contents of the PSW saved in the stack area. Specifically, the value of the program counter is set from "A800h" to "8202h", which is the return address. In addition, in order to restore the contents of the PSW to the contents of the PSW before the execution of the INVI instruction, if the value of the IMF (interrupt master enable flag) before the execution of the INVI instruction is 1 (interrupt enabled), the interrupt disable is released. When the INVI command is executed, the value stored in the stack area is erased, so the value of the stack pointer is set from "01F5h" to "01F8h".

As described above, when a process is executed by the INVI instruction, it is possible to disable interrupts until the execution of the specified process is completed without explicitly executing an interrupt disable instruction (DI instruction). Furthermore, by returning to the caller by executing the BKI instruction, if the interrupts were enabled before the INVI instruction was executed, it is possible to disable interrupts without explicitly executing an interrupt disable release instruction (EI instruction), and if the interrupts were enabled before the INVI instruction was executed, the interrupt disable state is maintained. It can also be used not only by executing the INVI instruction, but also when returning to the original process after executing a process in a state in which interrupts were disabled by a DI instruction or the like. In addition, the BKI instruction is not an instruction that directly disables interrupts, but simply returns the interrupt master enable flag (IMF) to the value before the INVI instruction was executed by returning the PSW to the state before the INVI instruction was executed, so if the interrupts were enabled before the INVI instruction was executed, the interrupts are returned from the disabled state to the enabled state, while if the interrupts were disabled before the INVI instruction was executed, the interrupts remain disabled after the return. In addition, since there is no need to execute the interrupt disable instruction and the interrupt disable release instruction, the control can be simplified and the program capacity can be compressed. This allows processing to be performed without the data being changed by other processes.

As mentioned above, in the gaming machine of this embodiment, the area (use area, game area) where a program can be implemented is predefined, and it is generally prohibited to execute a program outside the use area. However, some processes such as test signal processing are not directly related to game control and therefore allowed to be executed outside the use area. In addition, the role ratio monitor (base monitor) and error-related processes are also not directly related to game control and therefore allowed to be executed outside the use area. When executing such processes, the impact on other processes can be suppressed by prohibiting interrupts with the INVI command and saving the PSW (status register) before executing the process.

When calling a process stored in an area outside the area of use with the INVI command, it is possible to specify the storage destination using a process address table, as with the INVD command described above, but this can cause inconvenience because the process in the area of use is called by directly specifying an address outside the area. Therefore, a temporary area that must be passed through for the execution of the INVI command may be set. In this case, the process called from the INVI command is defined in a limited temporary area (for example, the range from "A800h" to "A8FFh"). However, since it is not possible to define all processes within this limited range, an address within the temporary area is specified from the calling process, but the process that is actually stored outside the area of use is executed from that address. Specifically, the address specified from the area of use is moved to the address where the process specified by a jump command or the like is stored. A specific example is shown in Figure 328.

Figure 328 shows an example program that explains the placement of the process called by the INVI command of this embodiment, where (A) shows an example program of the area from which the process is read, and (B) shows an example program of the actual process. Here, the area up to address "A8FFh" is the used area, and addresses from "A900h" onwards are outside the area.

As shown in FIG. 328 (A), the process called by the INVI command is defined by a combination of a label indicating the process and a jump command (JP). For example, when calling the performance display monitor process by the INVI command, "INVI _EX_MONITOR_OUT" is written. The label "_EX_MONITOR_OUT" is predefined in another area. The value of "_EX_MONITOR_OUT" is "A900h".

When the instruction "INVI_EX_MONITOR_OUT" is executed, the value of the program counter is updated to the address "A800h" corresponding to the defined label, and the PSW is saved to the stack area. In addition, the value of the IMF (interrupt master enable flag) of the PSW is set to 0 (interrupts disabled). After that, the performance display monitor process ("EX_MONITOR_OUT") defined at the address "A900h", which is the jump destination set in the operand of the jump instruction, is executed.

Since the performance display monitor process is a process outside the area of use, the register contents are saved so as not to affect the process within the area of use (in-area register save process). After that, the performance display monitor process itself is executed. Finally, the saved register contents are restored, and the process that called it is returned to by the BKI command, and the interrupt state before the process was executed is restored.

The above configuration makes it easier to separate processes outside the area of use, facilitating program management. In addition, because interrupts are prohibited when the INVI command is executed, interrupts are prohibited while a process outside the area of use is being executed, ensuring independence from processes stored in the area of use and ensuring safety. Note that in the example described with reference to FIG. 328, the area that stores the process called by the INVI command is limited, but this is not necessary. This makes it possible to simplify the calling of processes stored in any area to be executed with interrupts prohibited.

[19-5. Example of application of extended process call command]
A specific application example of the various commands (INVD command, INVS command, INVI command) for calling the above-described processes (subroutines) will be described. Here, they are applied to timer interrupt processing executed by the main control MPU 1311 of the main control board 1310. A specific application example of the process call command will be described for the game stop processing included in the timer interrupt processing, together with the program code.

Figure 329 is a flowchart showing timer interrupt processing using various process call instructions of this embodiment. The basic functions of timer interrupt processing are the same as those described above.

The main control MPU 1311 first specifies register bank 1 (step P101). As described above, the main control MPU 1311 has two types of register groups, bank 0 and bank 1, and switches between banks to use one of them. Bank 1 is used in timer interrupt processing, and bank 0 is used in main processing on the main control side. Note that it is not necessary to switch banks in timer interrupt processing; for example, the register values may be saved in a stack area and restored after processing is completed.

Next, the main control MPU 1311 executes switch input processing (step P102). In the switch input processing, as described above, various signals input to the input terminals of the various input ports of the main control MPU 1311 are read and stored as input information in the input information storage area of the main control internal RAM 1312. Next, the main control MPU 1311 executes setting value confirmation processing to determine whether the value in the setting status management area is within the normal range (step P103).

When the setting value confirmation process is completed, the main control MPU 1311 judges whether the gaming machine is in a playable state (step P104). If the gaming machine is not in a playable state (the result of step P104 is "NO"), that is, if a setting operation is to be performed (setting change mode, setting confirmation mode), the main control MPU 1311 executes a setting operation process (step P105).

In the setting operation process, processing is executed to change or confirm the settings of the gaming machine. Setting data for the setting operation is loaded and set to the corresponding output port. Specifically, the power outage clear signal is output as OFF, and the ACK output port is cleared. Furthermore, the LED common port and LED cathode port are output as OFF, the motor port and solenoid port are cleared, and a security signal is output. After that, the setting display process and setting confirmation/change process are executed.

On the other hand, if the gaming machine is in a playable state (the result of step P104 is "YES"), the main control MPU 1311 determines whether or not there is a factor that would cause a game to stop (step P106). If there is a factor that would cause a game to stop (the result of step P106 is "YES"), the main control MPU 1311 executes a game stop processing (step P107). In the game stop processing, the processing required to stop the gaming machine is executed. Details will be described later with reference to FIG. 330.

Furthermore, if there is no cause for stopping the game (the result of step P106 is "NO"), the main control MPU 1311 executes the process when play is possible in order to continue the game (step P108). The process when play is possible is a process for performing normal play. Specifically, it performs processes such as special switch input processing, timer update processing, prize ball control processing, frame command reception processing, fraud detection processing, switch passing command output processing, performance display monitor processing, special symbol/special electric role control processing, solenoid drive processing, motor drive processing, and output data setting processing. Each process is as described above.

When the game ready processing or the game stopped processing is completed, the main control MPU 1311 executes the display LED output processing (step P109). Furthermore, after the display LED output processing or the setting operation processing is completed, the main control MPU 1311 executes the test signal output processing (step P110). In the test signal output processing, processing is performed to output a test signal to be output to an inspection device connected to the gaming machine. Finally, the main control MPU 1311 executes processing such as setting a predetermined value (18H) in the watchdog timer clear register WCL to clear the watchdog timer (step P111) and resetting the register bank to 0, and then ends the timer interrupt processing.

Above, we have explained an overview of timer interrupt processing. Next, we will explain processing using various processing call commands. As mentioned above, we will explain an excerpt of the timer interrupt processing when game play stops. First, we will explain the procedure for processing when game play stops, and then, with reference to the program code, we will explain appropriate examples of application of various processing call commands.

Figure 330 is a flow chart showing the procedure for processing when a game is stopped in the timer interrupt processing of this embodiment. Figure 331 is a program code for processing when a game is stopped in the timer interrupt processing of this embodiment. The processing when a game is stopped is a process for stopping a game when an abnormality such as a magnetic anomaly or a vibration anomaly is detected or when a setting change is performed. In addition to magnetic anomalies and vibration anomalies, there are also cases where the door/main frame is open, radio wave anomalies, and winning anomalies, and there are also cases where the setting is being confirmed in addition to a setting change. Depending on the type of gaming machine, only an error notification may be issued or the game may be stopped. In particular, in types where a jackpot can be won by passing through a specific area (V area) in the role, a jackpot can be won by an illegal winning, so the game is configured to be stopped as a fraudulent act when an abnormality is detected.

When the game stop processing starts, the main control MPU 1311 first sets a game stop command (step P121). The game stop command is a command that notifies the outside that the gaming machine will be stopped. Referring to the program code, the game stop command is set by first setting a command addition value (game stop cause; PLAY_STOP_NO) in the A register when determining whether or not there is a game stop cause in the processing of step P106 described above, and in this state setting the standard command data (_ILG_MAG2_CM-1) in the HL register, and then executing command buffer setting processing 1 (CMBF_SET1).

Command buffer setting process 1 is a process that is called by the INVD command. The variable "_CMBF_SET1" specified by the INVD command is a number corresponding to the address of command buffer setting process 1 (CMBF_SET1) defined in the processing address table, and in this embodiment is "4" (INVD4). When a processing address table number is specified by the INVD command, the main control MPU 1311 refers to the processing address table and executes the process corresponding to the specified number. This makes it possible to execute processing without directly specifying an address, which makes it possible to speed up processing invocation and compress program capacity.

As described above, in command buffer setting process 1, a game stop command is identified based on the reference command data (value of the HL register) and the command addition data (value of the A register, a value corresponding to the game stop cause), and the game stop command is stored in the transmission buffer by the command storage process, and the game stop command is output.

After storing the game stop command in the transmission buffer, the main control MPU 1311 executes an external output process (GAIB_OUT) to output external output information (step P123). The external output information includes, for example, pattern determination data, start gate data, big prize gate winning data, main prize ball data, security data, etc.

The external output process (GAIB_OUT) is executed by the INVS command. As mentioned above, the INVS command stores the process in a specific area, allowing it to be called more quickly than if it were stored at an arbitrary address. The external output process (GAIB_OUT) is stored in a specific area because it is frequently executed, such as being called from the output data setting process (PORT_SET) during play (when gameplay is possible and processing is being executed). In addition to the external output process (GAIB_OUT), the output data setting process (PORT_SET) is configured to call many processes that are called by the INVD command defined in the processing address table, such as output judgment common process 1 (OHAN_SUB1) and output judgment common process 2 (OHAN_SUB2), and processes that are called by the INVS command stored in a specific area, in order to speed up the entire process.

Next, the main control MPU 1311 executes SPI communication processing to output various signals to be transmitted to actuators such as solenoids or to the outside via SPI communication (step P124). In the SPI communication processing, the data to be output is set in the WA register, the address to which the data set in the WA register is to be output is set in the E register, and then the SPI 2-byte output processing (SPI_TX_WA) is executed. The SPI 2-byte output processing (SPI_TX_WA), like the command buffer setting processing 1 (CMBF_SET1), is a process called by the INVD command, and the variable "SPI_TX_WA" specified by the INVD command is "14" (INVD14).

The main control MPU 1311 then sets game stop data to stop the game (step P125). It then executes an output port data setting process (PORT_DAT_SET) to set the set game stop data to an output port (step P126). The game stop data is, for example, data for turning off the power outage clear signal, LED common port, LED cathode port, etc., and clearing the motor port, ACK output port, etc.

The output port data setting process (PORT_DAT_SET), like the command buffer setting process 1 (CMBF_SET1), is a process that is called by the INVD command, and the variable "_PORT_DAT_SET" specified by the INVD command is "10" (INVD10).

Finally, the main control MPU 1311 executes a performance display monitor process that displays various information related to the game on the performance display monitor (step P127). The performance display monitor process only displays various information, and does not execute any process directly related to game control, nor is the performance display monitor itself intended for reference by the player. Therefore, the performance display monitor process of this embodiment is stored outside the usage area, and interrupts are prohibited while the process of displaying performance information on the performance display monitor is executed by the INVI command, so that it can be executed independently of the game control process. Note that at the end of the performance display monitor process, the BKI command is used to return to the interrupt state before the process was called, and then the process returns to the caller, so that even if the interrupt state before the process was called was interrupt permitted, it is not necessary to release the interrupt prohibition at the caller.

The test signal output process in the timer interrupt process is also stored outside the usage area because it is a process that is called during testing and not during normal play to output game information. Processing when the power is turned off, initialization processing for executing processing outside the usage area, and backup processing may also be stored outside the usage area.

When executing an interrupt process such as a timer interrupt process, interrupts may be set to disabled to prevent multiple interrupts, but the interrupts may be set to enabled within the timer interrupt process by designing it so that no problems occur even if multiple interrupts occur. The INVI command of this embodiment returns to the interrupt state before the process was executed, so in either case, it can be used without problems regardless of whether multiple interrupts are allowed or not.

[19-6. Placement of programs called from extended process call instructions]
Next, the arrangement of the programs that define the processes executed by the various call commands in the game control of the gaming machine of this embodiment will be described in detail. The programs are stored in the program/data area (8000h to BFFFh) included in the ROM area of the memory area provided by the main control board 1310.

Figure 332 is a diagram showing an example of a memory map of the program/data related area of the ROM area shown in Figure 306. The left side of Figure 332 shows the configuration of the program/data related area, and the right side of Figure 332 shows the details of the configuration of the first area of the program/data area.

The program/data areas in the main control board 1310 of the gaming machine of this embodiment include a first area (8000h-8BFFh) and a second area (A800h-BFFFh) (left side of Figure 332). Areas other than these are unused areas (outside of the area in use), and access by the gaming control program is prohibited in principle. Furthermore, data 00H is set in these areas as unused data, and 00H is a NOP (non operation instruction) CPU instruction, so that unnecessary control is not executed even if the area is mistakenly accessed. Note that if the area is mistakenly accessed, a reset signal is input to the CPU, allowing it to immediately return to gaming processing.

As shown in FIG. 332, the first area is located at the top address side of the area related to the program/data, the second area is located at the last address side of the area related to the program/data, and an unused area (outside the area in use) is located between the first and second areas. As described later, the first area contains programs that define processes for executing main game control, including processes related to the game result, and the second area contains programs that define processes that are not directly related to the game result, such as error processing, test firing processing, and processes related to the calculation of the ratio of the game devices. By placing an unused area between the first and second areas, the independence of each area can be increased. For example, even if the first area is expanded, the impact of specification changes can be minimized by ensuring a sufficient amount of unused area so that the address of the second area does not need to be changed.

Next, each area will be explained. The first area stores processes (programs) related to game control, including processes (programs) called by various call commands. As shown in FIG. 332 (right), the start process is located at the top address (8000h) of the first area. The start process is a process that is executed when the gaming machine is started, and is not easily dependent on the model. Specifically, it corresponds to the process when the power is turned on (FIG. 213, etc.). Also, if the start process is located at the top of the area and the initial value of the program counter is set to "8000h", it becomes possible to automatically start the start process at initialization. Note that initialization is when a reset signal is input to the core of the main control MPU 1311 of the main control board 1310. Specifically, it is when a reset signal is input from the reset terminal of the main control MPU 1311 when the power is turned on, or when a reset signal is input due to detection of a malfunction inside the main control MPU 1311 (execution of an illegal command, access to a ROM/RAM outside the designated area, watchdog timer, etc.).

Following the area where the start process is stored is an area where the process group called by the INVD instruction is stored. Because the capacity of the area where the start process is stored is small, the area where the process group called by the INVD instruction is stored is an area close to the top address of the first area (a relatively low address). The process group called by the INVD instruction is the process defined in the process address table, and this area stores the actual process (program) defined in the process address table. Note that it is preferable that the process called by all INVD instructions are concentrated in the area where the process group called by the INVD instruction is stored, but this area may also include processes called by instructions other than the INVD instruction.

As mentioned above, the processing group called by the INVD command is a general-purpose processing, and like the start processing, it is a processing that is not (is not) dependent on the model. In this embodiment, by arranging the processing that is not dependent on the model, such as the start processing and the processing called by the INVD command, in an area closer to the top address (8000h) of the first area than the area that stores the processing that is dependent on the model, such as the game control processing described later, it is possible to make the location (address) common to different models. This makes it easier to reuse these general-purpose processes, and makes it possible to improve the development efficiency of gaming machines. In addition, by identifying the content and location (address) of the general-purpose processing at the early stage of development of the gaming machine, it is possible to make the creation of development materials more efficient and to start the game control processing for each model earlier. Furthermore, even when multiple teams are developing a gaming machine, it is easy to share each process (program), and the development period can be shortened.

The remaining area of the first area following the area storing the process group called by the INVD command is an area where the program that defines the game control process is stored, and is the area on the final address side of the first area. The game control process is various processes for controlling the progress of the game, and includes processes that are dependent on the machine type. Specifically, it includes processes called from timer interrupt processes (Fig. 190, Fig. 329, etc.) that control the game, such as processes for controlling the variable display (dynamic display) of patterns (special pattern/special electric role control process (TOK_JOB; step S2089 in Fig. 190), normal pattern/normal electric role control process (FUT_JOB; step S2090 in Fig. 190), etc.).

The program that defines the process called by the INVS instruction is included in the area that stores the program that defines the game control process. As mentioned above, by calling a process based on a program located in a specific area with the INVS instruction, it is possible to execute it with a word length (2 or 3) that is shorter than the word length of a normal INV instruction (4). Note that the word length refers to the combined length of the opcode and operand that make up the instruction. The opcode is the part that is decoded by the instruction decoder after being fetched by the processor, and specifies the type of operation to be performed. The operand specifies the value or variable to be operated on.

The second area (A800h to BFFFh) stores processes that are not directly related to the results of the game (variable display and dynamic display of symbols), such as error processing, test firing test processing, and processing related to the calculation of the ratio of game features. Examples of processes that are not directly related to the results of the game include test signal processing (step S2067 in FIG. 190, step P109 in FIG. 329) that performs processing such as outputting a test signal to an inspection device connected to the gaming machine in the process of controlling the game in timer interrupt processing (FIG. 190, FIG. 191, FIG. 329, etc.) and performance display monitor processing that displays various information related to the game on the performance display monitor. The performance display monitor processing is called and executed in the game available processing (step P108 in FIG. 329) and game stop processing (step P107 in FIG. 329, step P127 in FIG. 330). In addition, the game feature ratio calculation and display processing (step S89 in FIG. 23) in the timer interrupt processing (FIG. 23) is also included in the processing that is not directly related to the results of the game. In the bonus feature ratio calculation and display process, the bonus feature ratio is calculated by referring to the number of winning balls stored in the bonus feature ratio calculation area 13128, and the calculated bonus feature ratio is displayed on the bonus feature ratio display 1317, allowing the gambling nature of the gaming machine to be confirmed. Although the performance display monitor process and the bonus feature ratio display process use different terminology, they are common in that they display information for confirming the gambling nature of the gaming machine, and display information required depending on the type of gaming machine. For example, in a pachinko gaming machine, the base (total number of winning balls entering the winning slot during non-time-saving (excluding balls dispensed during a jackpot) / total number of shots during non-time-saving) is displayed, and in a reel gaming machine, the bonus feature ratio is displayed.

In addition, when calling another process from a process stored in the second area, only the INV instruction is used. The INV instruction (4 bytes) has a longer word length than the extended process call instructions (INVS instruction (2 bytes), INVD instruction (1 byte), INVI instruction (2 bytes)), but the specifications of the extended process call instructions may differ depending on the arithmetic device (main control MPU 1311 of the main control board 1310), while the INV instruction, which calls a specified process without any special constraints, ensures compatibility even if the arithmetic device is changed. Therefore, by configuring a program using only the INV instruction when calling another process in a process defined in the second area, the independence of the processes defined in the second area is guaranteed, and the program can be easily reused even if there is a major change in the specifications of the gaming machine, such as not only a change (update) of the model but also a hardware update such as a change of the arithmetic device.

In contrast, the processes stored in the first area are programmed using not only the INV instruction, but also the improved process call instructions INVD, INVS, and INVI. In addition, the processes called by the INVD and INVS instructions are programmed to be placed only in the first area. As a result, in processes called by the INVS instruction, it is possible to call processes by the INVS or INVD instruction as necessary (any number of times), which allows for faster processing and further simplification of programs.

For example, in the setting operation process (step P105 in Fig. 329) which executes the process for changing and confirming the settings of the gaming machine, as described above, the setting data for the setting operation is loaded and set to the corresponding output port, and then the setting confirmation/change process (setting process, SET_PROCESS, Fig. 192) and the setting display process (SET_DISPLAY, Fig. 193) are executed. The setting confirmation/change process and the setting display process are programmed to be called by the INVS command from the game control process (timer interrupt process; Fig. 190, etc.).

The setting confirmation/change process (setting process, SET_PROCESS) is programmed to call the power-on setting process (step S2104 in FIG. 192, FIG. 194, etc.) to determine the state at the start of play using the INVS command if the setting key 971 returns from the ON position to the OFF position without detecting a RAM abnormality.

In the power-on setting process, the program is configured to execute a command buffer setting process (CMBF_SET1, FIG. 316) by an INVD command to set the power-on operation command (step S2120 in FIG. 194). Next, in order to initialize the work in the play area, the program is configured to set the power-on initial data specified by the data setting process (DAT_SET, FIG. 312) in the work area all at once by an INVD command (step S2123 in FIG. 194). Then, if the game is in a start state, the program is configured to set the power-on state command and the power-on return destination command by the INVD command by specifying the game start data at the time of RAM initialization or the game start data at the time of power recovery (steps 2124 and 2125 in FIG. 194). Furthermore, the program is configured to execute a setting value command transmission process to transmit a setting value command by an INVS command (step 2126 in FIG. 194).

In the setting display process (SET_DISPLAY), first, it is determined whether the setting status is abnormal or not, and if it is normal, the current setting value is set to be displayed on the base display 1317 (step S2111), while if it is abnormal, an error is set to be displayed on the base display 1317 (step S2112 in FIG. 193). After that, an LED common signal is output to the LED common output port (step S2113 in FIG. 193), and display data (segment signal) corresponding to the setting value or error display is output to the base display 1317 (step S2114 in FIG. 193). In the process of outputting to the base display 1317, first, in order to obtain the LED port output value (LED common signal) based on the LED status judgment output data address table, the program is configured to execute the output judgment common process 2 (_OHAN_SUB2; FIG. 318) by the INVD command. Furthermore, the program is configured to execute SPI 2-byte output processing (SPI_TX_WA; Figure 324) using the INVD command to send output data to the base display 1317 by setting the LED common signal to the SPI port (LED common output port) via SPI communication.

In addition to the setting confirmation/change process (setting process, SET_PROCESS) and setting display process (SET_PROCESS) described above, various other processes are executed by extended process call commands in the timer interrupt process. The processes called by the timer interrupt process are listed below. Note that some of the processes are consolidated in the timer interrupt process shown in Figure 329, so it will be explained in relation to the timer interrupt process in Figures 190 and 191.

The processes executed by the INVS command include switch input process 1 (SW_INPUT; step S2062), random number update process 1 (R_ATAR_K; step S2063), peripheral board command transmission process (SCM_JOB; step S2070), setting process (SET_PROCESS; step S2068), setting display process (SET_DISPLAY; step S2069), switch input process 2 (SW_INPUT2; step S2080), timer update process (TIM_DEC ; step S2081), prize ball control process (PAY_JOB; step S2082), frame command reception process (WK_CM_JOB; step S2083), switch passing command output process (SW_COMSET_JOB; step S2085), special symbol/special electric device control process (TOK_JOB; step S2089), normal symbol/normal electric device control process (FUT_JOB; step S2090), output data setting process (PORT_SET; step S2091). These processes are modules with a relatively large amount of processing, and cannot be reused due to the specifications of the gaming machine, so the program is deliberately structured to be called by the INVS command.

As mentioned above, in the processing executed by the INVS instruction, various processes are executed internally by the INVS or INVD instruction, which aims to compress the program size and increase the processing speed.

The processes executed by the INVI command include a process for outputting a test signal (KENIG_OUT; step S2067), a fraud detection process (ILG_ACT_JUDG; step S2084), and a base display output process (EX_MONITOR_OUT; step S2087). As described above, the programs that define these processes are stored in the second area, and the processes based on the programs stored in the second area are configured not to be called by the INVS or INVD command. These processes are easy to reuse regardless of the specifications of the gaming machine, and do not affect the outcome of the game, so the programs are intentionally configured to be called by the INVI command.

As described above, the program is configured so that the process called by the INVS command and the process called by the INVI command are mixed in one timer interrupt process. By configuring in this way, it is possible to simplify the structure of the program code while compressing the program capacity. In addition, the program may be configured by consolidating the calls of processes by the INVS command and the calls of processes by the INVI command, respectively. For example, the calls of processes by the INVI command may be consolidated and placed at the beginning or end or at a specific location in the program that defines the timer interrupt process. Since the INVI command returns to the interrupt state before execution, by consolidating the calls of processes by the INVI command at a specific location in the program, the interrupt state is maintained while the processes consolidated at the specific location are being executed, and the interrupt state is easily grasped, making debugging easier. In addition, since the processes called by the INVI command are processes that are not related to the result of the game, by consolidating the calls of processes by the INVI command at a specific location in the program, it is possible to easily determine whether the processes called at the specific location are related to the result of the game.

As with the timer interrupt processing, the program is also configured to execute various processes using extended process call instructions for power-on processing (start processing). Processes called in the power-on processing of Figs. 213 and 214 include setting value confirmation processing (SET_LV_CHK; step S2209) and power-on setting processing (INITIAL_SET; step S2239) executed by the INVS instruction. Processes executed by the INVI instruction include RAM outside the game area at power-on confirmation processing (EX_RWMSUMCK; step S2211) and RAM abnormality processing outside the game area at power-on (EX_INITIAL_RWM; step S2233; Fig. 217).

In this way, the program is configured so that various processes are called by the INVS, INVD, and INVI commands not only for timer interrupt processing, but also for power-on processing (start processing). In particular, by using general-purpose processing called by the INVS command in timer interrupt processing, etc., for power-on processing (start processing), it is possible to compress the size of the entire game control program, and processing can be performed faster than with an INV command, making it possible to speed up the startup of the gaming machine. Also, even if interrupts are prohibited to ensure that various initialization processes are executed when the gaming machine is started, there is no need to add interrupt control to the program code by the INVI command, making it possible to compress the size of the program and improve program readability.

In the INV, INVS, and INVD commands, the BK command is used to return to the process that called the command, but in the INVI command, the BKI command is used to return to the process that called the command and to return to the interrupt state before the command was executed. In other words, if the interrupt state is in the interrupt disabled state when the INVI command is executed, the interrupt disabled state is maintained, and if the interrupt state is in the interrupt enabled state when the INVI command is executed, the interrupt disable state is released. The BKI command is a return command that can also be used to return from timer interrupt processing, and is designed to maintain the interrupt enabled/disabled state before the timer interrupt processing was executed. For example, the power-on RAM abnormality processing outside the game area (EX_INITIAL_RWM; step S2233) is called by the INVI command during the power-on processing, so that, as shown in FIG. 217, the processing from step S2280 onwards is executed in the interrupt disabled state, and the INV command is used to call the RWM initialization processing outside the game area (EX_EXRWMCLR) to execute processing other than game control. Furthermore, by returning with a RET command (equivalent to a BKI command) after the processing of step S2289 is executed, the system is configured to return to the interrupt state before the processing for RAM abnormality outside the game area when power is turned on (EX_INITIAL_RWM) is called.

In the process executed following the start process (Fig. 221, etc.), the process is also called by the INVS command or the INVI command. In the main loop that repeats the process of step S2310 and the process of step S2311, the random number update process (R_OTHE_K; step S2311) is repeatedly executed by the INVS command, and the process waits until the next timer interrupt process is started. In addition, in the power failure process (processing after step S2312), the power OFF process (EX_POWER_DOWN) is executed by the INVI command, and the checksum calculation process (S2317) is called by the INVS command, so that the process (power OFF process) located in the second area is called by the INVI command, and the process (located in the first area) of calculating the checksum (inspection value of the work RAM) of the work RAM used in the process outside the play area in the power failure process and the work RAM used in the process inside the play area can be executed by the INVS command. In this way, the power outage processing is configured to be able to call up processing based on the program placed in the first area and processing based on the program placed in the second area as needed, making it easy to configure a program by combining processing related to gaming with processing unrelated to gaming, allowing for greater freedom in program placement and improved management efficiency.

In addition, a process for calculating a checksum within the play area and a process for calculating a checksum outside the play area may be provided separately, with the process for calculating the checksum within the play area being placed in a first area and the process for calculating the checksum outside the play area being placed in a second area. In this case, the process for calculating the checksum within the play area placed in the first area may be called by an INVS command, and after the power-off process is called by an INVI command, the process for calculating the checksum outside the play area placed in the second area may be called by an INV command. By configuring in this way, it is possible to increase the independence of the processes for the areas outside the play area.

The game control process also includes a process for selecting a variation pattern when executing a varying display (dynamic display) of the pattern, and is called by the INVS command within the timer interrupt process. In the variation pattern selection process (Hp_select), the variation pattern number is specified by using the bit transfer command described above. Figure 333 is a diagram showing an example of program code for the variation pattern selection process (Hp_select). Note that the process using the program code shown in Figure 333 achieves the same functions as the process using the program code shown in Figure 305, and uses a process call command with some functions expanded, and corresponds to the flowchart of the variation pattern selection process shown in Figure 304, just like the program code shown in Figure 305.

Referring to FIG. 333, when selecting a variation pattern, it is first necessary to identify a variation pattern table corresponding to parameters such as the special symbol (type of dynamic display result) and game status (step P8021). To explain the process of step P8021 in more detail, first, the identification information of the special symbol (dynamic display result) is set as the selection value, the address of the selected data address table is set as the search data address (step P8021-1), and the 2-byte data search process (FIG. 315, LD_HLA_HL) is executed by the INVD command (step P8021-2). The selected data address table corresponding to the identification information of the special symbol (dynamic display result) is identified by the 2-byte data search process, the identified selected data address table is set as the search table (step P8021-3), and the status flag is set as the selection value. After that, the variation pattern selection table can be identified by executing the 2-byte data search process by the INVD command (step P8021-4).

Furthermore, an index for using a bit transfer command is created by executing an index creation process (step S8023; GEN_IDX) that creates an index for data transfer based on the address of the identified fluctuation pattern selection table. At this time, the index creation process is configured to be executed by the INVS command. Finally, a bit transfer command is used to obtain a fluctuation pattern number that corresponds to the fluctuation pattern selection random number extracted from the identified fluctuation pattern selection table (step P8028). In this way, by combining extended process call commands (INVD command, INVS command) and bit transfer commands to configure a program, it is possible to speed up processing and compress capacity.

The process using the extended process call instruction in combination with the bit transfer instruction is not limited to the process of selecting a variation pattern, but may be any process stored in the first area. Also, by configuring a program so that the index creation process required for executing the bit transfer instruction is defined in the process address table and called by the INVD instruction, it is possible to simultaneously compress data volume and speed up processing. In this way, by consolidating the processes required for executing the bit transfer instruction, it becomes possible to use the bit transfer instruction in a general-purpose manner.

On the other hand, it is preferable that the process stored in the second area is prohibited from interruption when the process is called. For example, this is to prevent the progress of the game from being stopped when an error occurs, or to prevent the number of acquired balls from changing during the calculation of the ratio of the game equipment from being unable to calculate an accurate ratio of the game equipment. For this reason, in this embodiment, the program is configured to call the process stored in the second area by the INVI command, thereby simplifying the interrupt control (control to prohibit interrupts when the process is executed and to return to the interrupt state before the process is executed after the process is executed). In addition, when the INVI command is executed, the PSW including the interrupt prohibition/permission information is stored and saved in the stack area, and when returning from the called process, the PSW stored in the stack area is returned to the state before the return, and the control can be simplified because it is necessary to use commands to save/return the PSW to the stack area individually. By configuring in this way, it is possible to simplify the game control while managing the program arrangement by consolidating and storing processes that are not directly related to the result of the game (variable display/dynamic display of the pattern) in a specific area.

[19-7. Usage frequency of programs called from extended process call instructions]
Although there is concern that the increase in program capacity will increase with the complication of game control due to the improvement of game interest, the extended process call instruction can compress the program capacity. In particular, the INVD instruction has a shorter word length than the INVS instruction and the INVI instruction, and by replacing it with the INV instruction, the most compression of the program capacity can be expected. However, since the number of processes that can be called by the INVD instruction is limited to 16 that can be defined in the process address table, in this embodiment, the particularly frequently used processes are defined. Therefore, in this embodiment, the program is configured so that the three types of extended process call instructions are used most frequently. For example, in the game control process in this embodiment, the frequency of use of the extended process call instructions in the program code (number of lines of process call instructions/total number of lines of the program) is about 8% for the INVD instruction, about 4% for the INVS instruction, and about 0.3% for the INVI instruction. The frequency of use of the extended processing call commands varies depending on the type of gaming machine, etc., and is not limited to the above numerical values, but by setting the frequency of use to be INVD command, INVS command, and INVI command in that order, it is possible to compress data volume and speed up processing.

On the other hand, the frequency of use of an extended process call instruction in program code (number of lines of the process call instruction/total number of lines in the program) differs from the frequency of execution (number of executions) of the extended process call instruction when the program is executed. For example, when used in a process that is called many times, such as a periodically executed timer interrupt process, the actual execution frequency is high because the process is executed periodically and repeatedly even if the frequency of use in the program code is low. In the timer interrupt process of this embodiment (Figure 329), the INVD instruction is configured to be executed more frequently within one cycle than the INVS instruction. In this way, by increasing the number of executions of the INVD instruction, which has a shorter word length than the INVS instruction, it is possible to not only compress the program size but also speed up program processing.

As mentioned above, the processes that can be called by the INVD instruction are highly versatile and consist of programs with a relatively small number of bytes (short number of steps) compared to processes called by the INVS instruction. Programs with a small number of bytes can speed up processing because they incur less overhead when executed by the arithmetic unit, so calling them with the frequently used INVD instruction can speed up the entire game control.

On the other hand, processes called by the INVS instruction are subject to restrictions on program storage area, but compared to processes that can be called by the INVD instruction, there are fewer restrictions on the number of processes and capacity, making them models-dependent processes that are called frequently. The INVI instruction calls processes stored in the second area, so the program is structured so that it is used less frequently than the INVD and INVS instructions.

[19-8. Summary of process call instructions]
In the gaming machine of this embodiment, a main control MPU (CPU) 1311 of a main control board 1310 controls the progress of a game by executing a program stored in a ROM 1313. The program defines processes for realizing various functions necessary for controlling the gaming machine, and is executed by a process call command. In the gaming machine of this embodiment, multiple types (four types) of process call commands are implemented.

The INVD instruction, which is the first process call instruction (first specific process execution instruction), differs from other process call instructions in that it does not take a value that directly indicates the address where the process to be called is stored, but rather takes an identification value between 1 and 16 as its operand. The INVD instruction calls a process (first specific process) selected from the process address table based on the identification information set as an operand when executed.

The processing address table used by the INVD command is information stored in the same ROM (storage means) as the program/data area, but although it is used as an address table within the program, it is stored in an area different from the program/data area in which the programs and data are stored. Specifically, it is stored in an area (C080h-C0FFh) with a higher address than the program/data area (8000h-BFFFh).

The INVS command, which is a second process call command (second specific process execution command), is a command that calls a process (second specific process) specified in the identification information set as a parameter. The INVS command is also a command whose word length changes to 2 or 3 depending on the area in which the program that defines the process to be called is stored; specifically, if the area in which the program is stored is between addresses 8000h and 8BFFh, the word length is 2 bytes, and if the area is between addresses 8C00h and 93FFh, the word length is 3 bytes.

The INVI command, which is a third process call command (third specific process execution command), stores and saves a PSW containing interrupt disable/enable information in the stack area when the command is executed, sets the interrupt disable state, and then calls the process (third specific process) specified in the identification information set as a parameter.

Furthermore, unlike other process call instructions, the INVI instruction uses the same return instruction (BKI instruction) as when executing the timer interrupt process when returning from the called process, making it possible to return the interrupt disable/enable state to the state before the INVI instruction was executed. Specifically, the interrupt disable/enable information (PSW in Figures 326 and 327(B)) stacked in the stack area when the INVI instruction is executed is saved to the stack area, and then the IMF value of the PSW is set to 0 (interrupts disabled) to disable the interrupts, and the PSW saved when the BKI instruction is executed is restored to its original state, making it possible to return the interrupt disable/enable state to the state before the INVI instruction was executed.

The fourth process call instruction, the INV instruction, is an instruction that calls a process specified in the identification information set as a parameter. The INV instruction has a longer word length than the INVS instruction.

In this embodiment, the game control program for the gaming machine uses at least the first to third process call instructions (INVD instruction, INVS instruction, INVI instruction). The word length of the INV instruction is longer than the word length of the INVD instruction, INVS instruction, or INVI instruction. By using the INVD instruction and INVS instruction (INVI instruction) in preference to the INV instruction, it is possible to compress the program capacity and speed up process calls, and by simplifying the program code, it is possible to improve the development efficiency of the gaming machine.

The program process (module) called by the INVD command, which is the first process call command, is located at the top address (8000h value), which is the relative top address, of the program/data area (8000h to BFFFH). The INVD command is a process that is not very model-dependent, and by placing it in an area close to the top address of the program storage area, it is possible to make the location (address) common across different models. This makes it easier to reuse these general-purpose processes, and improves the development efficiency of gaming machines. In addition, by identifying the content and location (address) of the general-purpose process at the early stage of development of the gaming machine, it is possible to make the creation of development materials more efficient and to start game control processing for each model earlier. Furthermore, even when multiple teams are developing a gaming machine, it is easier to share each process (program), which shortens the development period.

Also, unlike program processing called by the INVD instruction, the program processing (module) called by the INVS instruction, which is the second processing call instruction, can be placed anywhere in the program/data area. Furthermore, as mentioned above, with the INVS instruction, the word length changes to 2 or 3 depending on the area in which the program defining the processing to be called is stored, but it is shorter than the word length of the INV instruction (4) and can be processed faster. Therefore, the INVS instruction allows programs to be placed more flexibly than the INVD instruction, while also being able to be called faster than the INV instruction, allowing for faster processing and smaller capacity.

The program process (module) called by the third process calling command, the INVI command, is a command for calling a process that is not related to the game result and is placed in the second area as described above, and can be reused in different types of gaming machines, thereby improving the development efficiency when developing new gaming machines. Therefore, by placing the program that defines the process called by the INVI command relatively close to the end address (number BFFFh) of the program/data area (8000h to BFFFh), the impact is minimized even when ported to another model. Also, the program is configured to call the process by the INV command, not the extended process calling command such as the INVD command, so that compatibility is maintained even if the hardware configuration of the gaming machine is changed. By configuring it in this way, it is possible to easily reuse the program even if the specifications of the gaming machine are changed.

In contrast, for processes stored in the first area (the area on the top address side), it is possible to use not only the INV instruction, but also the improved process call instructions INVD, INVS, and INVI. Furthermore, the program structure places processes called by the INVD and INVS instructions only in the first area. For this reason, for processes called by the INVS instruction, it is possible to call processes by the INVS or INVD instruction as necessary (any number of times), which allows for faster processing and further simplification of programs.

In the game control program of this embodiment, the first process call instruction, the INVD instruction, the second process call instruction, the INVS instruction, and the third process call instruction, the INVI instruction, are configured so that the frequency of use (number of times used; number of times executed) increases in the order of the INVD instruction, the INVS instruction, and the INVI instruction. Of these process call instructions, the INVD instruction has the shortest word length, so by configuring it in this way, it is possible to compress the program capacity and speed up program processing.

As described above, according to this embodiment, by improving the existing command that calls a defined process, it is possible to speed up the entire game control process and reduce the program capacity. In addition, it is possible to simplify the program by implementing a command that combines interrupt control and a process call command, such as the INVI command.

[20. Layout of Electronic Components on Main Control Board]
The procedure of SPI communication in the game stop processing has been described above. Incidentally, in the gaming machine of this embodiment, by adopting serial communication such as SPI communication for signal transmission within the main control board 1310, it is possible to reduce the wiring of the data bus. In other words, it is possible to simplify the circuit pattern by eliminating a large number of data buses connected to a plurality of parallel interface circuits and performing communication with a small number of signal lines including control lines. This makes it possible to easily arrange various electronic components such as the main control MPU 1311, a connector for outputting external information, and a serial-parallel conversion circuit (first electronic component) for performing serial communication on the main control board 1310. Below, an example of the arrangement of electronic components on the main control board 1310 will be described with reference to FIG. 334.

Figure 334 is a diagram showing an example of an implementation diagram of the main control board 1310 of the gaming machine of this embodiment. Note that the implementation diagram shown in Figure 334 corresponds to the circuit diagrams shown in Figures 93, 259, etc., and the symbols and descriptions of each electronic component are as described above.

In the main control board 1310 of this embodiment, the main control MPU 1311 is disposed near the center of the board. The main control board 1310 has a first area 6100 centered around the main control MPU 1311 and a second area 6200 other than the first area (outside the first area). The main control MPU 1311 is disposed so as to secure a predetermined distance from the end of the main control board 1310 and to secure the first area 6100 and the second area 6200.

The first area 6100 includes a non-mounting area 6101 in which no electronic components other than the main control MPU 1311, such as logic components (logic ICs, integrated circuits) or discrete components, are placed, and a component mounting area 6102 in which discrete components that need to be placed close to the main control MPU 1311 are placed. Discrete components are basically electronic components that have one circuit function. By providing the non-mounting area 6101 around the main control MPU 1311, it is possible to prevent heat generated by the operation of the main control MPU 1311 from affecting other electronic components, and prevent heat generated by other electronic components from affecting the operation of the main control MPU 1311.

Various logic components (logic ICs, integrated circuits) are arranged in the second area 6200. Components that need to be placed close to the main control MPU 1311 (e.g., components that are easily affected by noise) are placed in an area of the second area 6200 close to the main control MPU 1311, and other logic components are placed in an area further out. Below, a typical arrangement of electronic components mounted on the main control board 1310 is described.

The reset circuit 1335 is placed in an area of the second area 6200 close to the main control MPU 1311 (close to the component mounting area 6102 of the first area 6100). Specifically, it is placed as close as possible to the main control MPU 1311, and the number of electronic components placed between it and the main control MPU 1311 is reduced so that it does not cross other wiring. This makes it possible to configure the circuit so that erroneous signals are not input due to factors such as noise caused by crosstalk, and it is possible to prevent an erroneous signal being input to the reset circuit 1335, which would cause the game to be interrupted and significantly impede the progress of the game.

The clock oscillator 1336 (second electronic component) is placed in the component mounting area 6102 of the first area 6100. If the wiring distance between the main control MPU 1311 and the clock oscillator 1336 is long or if it crosses other wiring, noise is likely to occur, causing variation in the frequency of the clock signal output from the clock oscillator 1336, which may hinder the progress of the game. On the other hand, if the distance between the main control MPU 1311 and the clock oscillator 1336 is too close, the clock oscillator 1336 may not operate normally due to heat generated by the main control MPU 1311, etc., causing frequency variation. Therefore, in the main control board 1310 of this embodiment, a non-mounting area 6101 is provided around the main control MPU 1311 to suppress the effects of heat generation from the main control MPU 1311, while a clock oscillator 1336 is placed in the component mounting area 6102 of the first area 6100 to prevent the main control MPU 1311 and the clock oscillator 1336 from becoming separated, thereby suppressing the generation of noise.

As described above, the parallel-serial conversion circuit 1341 receives signals from game ball detection switches (start winning port, big winning port count switch, normal winning port, specific area switch, normal symbol gate switch, game board discharge switch) and photosensors, and mainly detects game balls flowing down the game area 5a. The switches and sensors that output these input signals are distributed and arranged in the game area, so multiple parallel-serial conversion circuits 1341 are provided (in this embodiment, parallel-serial conversion circuits 1341a to 1341c). In addition, these input signals are once input to a buffer and then input to the parallel-serial conversion circuit 1341. The parallel-serial conversion circuit 1341 is arranged in the second area 6200, but since signals for providing game value such as winning detection for the start winning port and big winning port are input, it is arranged so as to be as unlikely to be affected by noise as possible.

As described above, the serial-parallel conversion circuit 1342 and the serial-parallel conversion circuit 1343 output signals for turning on the LEDs (functional display unit 1400, base display 1317). Since the displays of the functional display unit 1400 and base display 1317 do not directly affect the outcome of the game, they may be located relatively far away from the main control MPU 1311, allowing for greater freedom in placement. For example, the serial-parallel conversion circuit 1343 is located on the end side of the main control board 1310. In addition, a drive circuit 1344 is provided after the serial-parallel conversion circuit 1343, which receives a signal and then outputs it to the LEDs (functional display unit 1400, base display 1317).

The base display 1317 is disposed in the outer region of the second region 6200 (the end side of the main control board 1310), that is, in a position relatively far from the main control MPU 1311. The base display 1317 displays a base value, but even if an incorrect base value is displayed or the base value is not displayed due to the influence of noise or the like, the display of the base value itself does not affect the outcome of the game. In addition, it is possible to output information on the base value from the external terminal board 784 to a hall computer installed in the game center, or to display the base value on a liquid crystal display device, and alternative means can also be secured. Therefore, the base display 1317 is disposed in a position far from the main control MPU 1311 in order to prioritize other logic components (first logic components) that may affect the game in the event of a malfunction and to place them near the main control MPU 1311. In addition, logic components that are less likely to affect gameplay, such as those that output signals to the base display 1317 (serial-parallel conversion circuit 1342 and serial-parallel conversion circuit 1343, second logic component) may be placed away from the main control MPU 1311 and in the vicinity of the base display 1317.

As described above, the serial-parallel conversion circuit 1345 has an external terminal board 784 connected to the output ports (PA0 to PA7) of channel A, and various solenoids connected to the output ports (PB0 to PB7) of channel B. The various solenoids include a large prize opening solenoid and the like, which affect the game value awarded to the player, so the serial-parallel conversion circuit 1345 is placed in an area of the second area 6200 close to the first area 6100. This allows the signal lines connecting the main control MPU 1311 and the serial-parallel conversion circuit to be shortened. Furthermore, the number of data lines can be reduced by transmitting and receiving the solenoid drive signal from the main control board 1310 via serial communication (SPI communication), which makes it easier to route the data lines when arranging electronic components, and reduces the possibility of malfunctions caused by noise and other factors.

The serial-parallel conversion circuit that outputs signals to control motors other than solenoids outputs the output signal directly without passing through a buffer, transistor, etc., and therefore needs to be placed near the main control MPU 1311 and the output destination connector (e.g., connector 13103).

As described above, the serial-parallel conversion circuit 1346 has an inspection terminal 1348 connected to the output port of channel B, and outputs a signal (e.g., a special electric role open signal, a normal electric role open signal, etc.) from the inspection terminal 1348. The serial-parallel conversion circuit 1346 is arranged in the inspection component mounting area (inspection circuit arrangement area) 6300, and in addition to the serial-parallel conversion circuit 1346, an interface circuit 1347 and an inspection terminal 1348 are provided. The electronic components provided in the inspection component mounting area 6300 are only installed in gaming machines that are inspected by an inspection agency, and are not generally installed in gaming machines that are commercially available. However, since the inspection component mounting area 6300 does not have components mounted therein but has a print pattern (e.g., a data bus connected to the interface circuit 1347), noise may be induced in the data bus and cause malfunction, so the inspection component mounting area 6300 is arranged away from other electronic components (first logic components) that affect the game. For example, the serial-parallel conversion circuit 1342 and the serial-parallel conversion circuit 1343 that perform LED display are positioned closer to the inspection component mounting area 6300 (serial-parallel conversion circuit 1346) than the serial-parallel conversion circuit 1345 that outputs a signal to control a solenoid that opens and closes the large prize opening.

In the main control board 1310 shown in FIG. 334, the setting key 971 is provided on the main control board 1310 and is arranged at the end of the main control board 1310 (outside the second area). Since the setting key 971 is directly operated by a game machine employee, etc., it is arranged at a position away from the main control MPU 1311 and various electronic components (first logic components) such as a serial-parallel conversion circuit that performs the main control of the game to avoid influences from vibrations during operation. In addition, the control based on the signal input by operating the setting key 971 includes changes to the settings of the game machine, and therefore may directly affect the progress of the game. Therefore, the wiring between the setting key 971 and the main control MPU 1311 is reduced to reduce the influence of noise, etc.

As described above, in the main control board 1310 of the gaming machine in this embodiment, the layout of each area is specified according to the function and characteristics of each electronic component, making it possible to clarify basic guidelines for circuit design. This makes it possible to maintain and improve quality without reducing development efficiency even when there are changes in the organization due to the design of a new gaming machine or the transfer of developers, etc.

[21. Control of serial communication (SPI communication)]
Here, the serial communication function (SPI communication) for outputting signals from the main control board 1310 in the gaming machine of this embodiment will be further explained. The serial communication function has been explained in Figures 257 to 263, but here, the procedure of SPI communication will be explained in more detail with reference to the program code.

As mentioned above, the gaming machine of this embodiment uses serial communication for signal transmission within the main control board 1310. Typical types of serial communication include I2C communication and SPI communication. SPI communication has the advantage of faster communication speeds, although it requires more signal lines than I2C communication. In the gaming machine of this embodiment, SPI communication is used when the main control MPU 1311 receives signals from various switches and when the main control MPU 1311 transmits control signals for various LEDs, solenoids, etc.

In addition, not all signals are input/output by SPI communication, but some signals, such as signals for detecting fraudulent behavior against the gaming machine during the initial setting process when the power is turned on, are input to the main control MPU 1311 by parallel communication. For example, signals such as the "setting key switch", "main RWM erase/setting change signal", and "power failure warning signal" are directly input by parallel communication from the general-purpose input terminal of the main control MPU 1311. The "setting key switch", "main RWM erase/setting change signal", and "power failure warning signal" are signals that need to be confirmed during the initial setting process when the gaming machine is turned on (for example, the initialization process of Figures 21 and 22, etc.), and if the input signal is taken in through the SPI circuit, it takes time to take in and judge the signal, so it is taken in by parallel communication. In this way, parallel communication can communicate faster than serial communication, so it is possible to speed up the initial setting process compared to when various signals are sent and received only by serial communication, and the time until the game process starts can be shortened.

In addition, by transmitting some input and output signals by parallel communication and other signals by serial communication (SPI communication), when a cheater tries to obtain a signal to control the game, he or she must obtain the signal from multiple locations including the main control board 1310 and the input/output board 1351, thereby enhancing the deterrent effect against cheating.

SPI communication outputs signals based on information stored in the SPI communication buffer register. For example, when a stop signal is output to a solenoid during game stop processing in timer interrupt processing, or when a signal is output to an LED cathode port or LED common port during display LED output processing or setting display processing, in the gaming machine of this embodiment, the signals transmitted from the main control MPU 1311 via SPI communication are mainly signals for controlling light-emitting elements such as LEDs and drivers such as motors and solenoids.

In addition, signals input from various sensors via SPI communication are input to a calculation device such as the main control MPU 1311. For example, when a game ball enters the start winning hole, the winning is detected by the start winning hole switch, and a signal is input to the main control MPU 1311. Below, the configuration and procedure for sending and receiving signals input and output to the main control MPU 1311 via SPI communication will be described.

[21-1. Control configuration of serial communication (SPI communication)]
First, the configuration for realizing SPI communication will be described. The basic configuration has been described in Fig. 257 to Fig. 263, but furthermore, the configuration and the setting of parameters required for control will be described with reference to Fig. 335 to Fig. 337, and the startup procedure such as the initialization of various parameters at the start of SPI communication will be supplemented with reference to Fig. 338.

Figure 335 is a block diagram of the configuration for performing SPI communication with the main control MPU 1311 of the gaming machine of this embodiment. In the gaming machine of this embodiment, the main control MPU 1311 constitutes the master that controls communication, and various ICs arranged on the main control board 1310 constitute the slaves. Specifically, the slaves are serial-parallel conversion circuits (1342, 1343, 1346, 1349) and parallel-serial conversion circuit 1341. Note that some of the slaves may be arranged on relay boards connected to the main control board 1310, rather than on the main control board 1310.

In this embodiment, two types of communication are possible from the master (main control MPU 1311): SPI transmission/reception (CHA) and SPI transmission (CHB). Communication via SPI transmission/reception (CHA) is performed with slaves 1 to 4. Communication via SPI transmission/reception (CHA) is basically communication for normal game control, and involves inputting signals from various switches and sensors, controlling the solenoid that opens and closes the big prize opening, and outputting signals for controlling the illumination of various LEDs. On the other hand, communication via SPI transmission (CHB) is performed with slave 5, and is mainly used for communication to output test signals.

When communicating using SPI send/receive (CHA), it is possible to start communication with all slaves (1 to 4) at the same time, and communication is started with each slave in a specified order. In this case, the enable setting of all slaves (SPENBAn; n corresponds to an individual slave) is set to start communication ("1"). If no data is stored in the communication (send) buffer, communication with the next slave is started without communicating with the corresponding slave.

It is also possible to start communication by specifying individual slaves. For example, to light up the LEDs connected to slave 1 and slave 3, the enable settings for slave 1 and slave 3 are set to start communication ("1"), while the enable settings for slave 2 and slave 4 are fixed at ("0"), so that communication for slave 3 will start after communication for slave 1 is completed.

As mentioned above, each slave is capable of inputting and outputting signals, and is configured to capture an input signal when outputting an output signal. In addition, each slave may be controlled by limiting (specifying) its function as output-only or input-only, and in the SPI transmission/reception (CHA) communication of this embodiment, slaves 1 to 3 are output-only, and slave 4 is input-only. For this reason, input-only slaves are configured to capture an input signal while transmitting dummy data. The procedure by which the master (main control MPU 1311) captures signals received from the slaves will be described later.

Next, the SPI communication of this embodiment will be further explained. As mentioned above, in the SPI communication in the main control MPU 1311 of the gaming machine of this embodiment, there are two channels, SPI transmission/reception (CHA) and SPI transmission (CHB). The number of channels for SPI transmission/reception (CHA) is four. In addition, the communication speed can be set for each channel, and a 16-byte transmission/reception buffer is provided for each channel. There are four types of operation modes for SPI communication, which are common to each channel. The bit direction can be set to LSB first or MSB first, and can be set for each channel. LSB first starts communication from the least significant bit, and LSB first starts communication from the most significant bit. In addition, SPI transmission (CHB) is dedicated to transmission, and the number of channels is one. Other settings are the same as those for SPI transmission/reception (CHA), but all reception-related settings are unused (fixed to "0"). Below, the registers for setting the operation mode and each parameter will be explained with reference to Figures 336 and 337.

First, the operation mode of SPI communication will be described. FIG. 336 is a diagram explaining the operation mode of SPI communication in the gaming machine of this embodiment. Four types of operation modes are defined for SPI communication, and as shown in FIG. 336, they are specified by whether the initial state of the clock is "Low" or "High", whether the timing of the data change is "at the falling edge" or "at the rising edge" of the clock, and whether the sampling timing is "at the falling edge" or "at the rising edge". The initial state of the clock is a state in which communication has not started, and one bit of data is transmitted between the timing of the data change and the timing of the sampling. The operation mode is set according to the specifications of the slave (serial-parallel conversion circuit), and the master (main control MPU 1311) outputs a signal according to the set operation mode.

Next, the configuration of the registers for setting parameters to control SPI communication in this embodiment will be described. Here, the case of SPI transmission/reception (CHA) will be described, but the same applies to the case of SPI transmission (CHB). Figure 337 is a diagram explaining the configuration of various registers for setting SPI communication in the gaming machine of this embodiment, where (A) is control register 1 (SPICPSA0), (B) is control register 2 (SPICPSA1), and (C) is prescaler registers (SPICPSA0, SPICPSA1, SPICPSA2, SPICPSA3).

The control register 1 shown in (A) is composed of 8 bits, and includes a bit shift setting (SPBSFAn), an operation mode (SPMODA), and an initialization setting (SPRSTA). The bit shift setting (SPBSFAn) and operation mode (SPMODA) are set when the power is turned on (initialization), and the initialization setting (SPRSTA) executes initialization for all slaves when the power is turned on or when it is determined that communication cannot be performed normally in each slave. When initialization is executed, the bit shift setting (SPBSFAn) and operation mode (SPMODA) are reset. This makes it possible to quickly recover from an abnormality even if one occurs in the SPI communication circuit, and prevents the abnormality from interfering with the progress of the game.

The bit shift setting (SPBSFAn) specifies whether data is sent from the most significant bit ("0": MSB first) or the least significant bit ("1": LSB first). The bit shift setting (SPBSFAn) can be specified for each slave, and in this embodiment, 4 bits equivalent to the number of slaves are assigned and can be set individually (bits 6 to 3). Specifically, bit 6 corresponds to slave 4, bit 5 to slave 3, bit 4 to slave 2, and bit 3 to slave 1.

The operating mode (SPMODA) specifies the four operating modes mentioned above, and is set commonly for each slave. Since there are four operating modes, a 2-bit area is allocated, with "00" being mode 1, "01" being mode 2, "10" being mode 2, and "11" being mode 4 (bits 2, 1).

The initialization setting (SPRSTA) has different functions when reading and writing, and is set commonly to each slave. When reading the initialization setting, a set value of "0" indicates that initialization is complete, and "1" indicates that initialization is in progress. On the other hand, when "1" is written to the initialization setting, control is performed to initialize the SPI communication, and when "0" is written, control continues without doing anything in particular. For example, if it is determined that communication cannot be performed normally, "1" is written to the initialization setting and initialization is performed. It is also possible to initialize the communication circuit by writing "1" to the initialization setting regardless of the communication state, such as whether communication is in progress or not. When the communication circuit is initialized, various parameters must be reconfigured.

When the initialization setting (SPRSTA) is read, it is possible to determine whether it is being initialized or not, and it may be possible to check whether it is being initialized ("1") based on the value of the bit before executing the initialization or starting communication. The initialization time when the initialization setting (SPRSTA) is initialized (bit 0 is set to "1") can be shorter than the time it takes to execute one command, and the initialization is completed when the next command is executed after the initialization is set. Therefore, if the initialization setting (SPRSTA) is still being initialized ("1") even after being set to initialization, it is possible that some abnormality has occurred in the SPI communication circuit, and in that case, the main control MPU 1311 may be reset (reset by watchdog timer) by forcibly switching to game stop, abnormality notification, or power cut processing. This makes it possible to quickly recover even if the SPI communication circuit becomes abnormal.

Note that there is no need to initialize each slave as it starts up in an initialized state when the power is turned on. On the other hand, when a reset is caused by a watchdog timer reset, illegal opcode reset, out-of-area access reset, etc., the state before the reset is maintained. For this reason, regardless of whether a system reset, watchdog timer reset, illegal opcode reset, out-of-area access reset, or any other reset cause starts the program, the SPI circuit is not initialized and initial settings other than the initialization settings are made. Note that if a watchdog timer reset, illegal opcode reset, or out-of-area access reset occurs, it is possible that the game process is not being executed normally, which may have changed the settings of the SPI circuit. For this reason, when starting a program from a reset, it is determined whether a watchdog timer reset, illegal opcode reset, or out-of-area access reset has occurred, and if it is determined that a reset has occurred due to a watchdog timer reset, illegal opcode reset, or out-of-area access reset, the SPI circuit is initialized (writing "1" to SPRSTA), thereby improving the stability of game control after the reset and minimizing disruption to game progress as much as possible.

The control register 2 (SPICNA1) shown in (B) consists of 8 bits, and is set each time communication starts. The control register 2 contains the receive status (SPRVSAn) and enable (SPENBAn) of each slave. The receive status is set for each slave (bits 7-4), and is set to "1" if there is receive data, and "0" if there is no receive data.

Enable is set for each slave, and its function differs when reading and writing (bits 3 to 0). When reading, "1" is set if communication is in progress, and "0" is set if communication has ended. On the other hand, writing "1" to Enable enables communication with the corresponding slave, and communication begins. It is possible to determine the communication status by obtaining the value of Enable when communication begins; if the value is "0" (communication ended), "1" is set to start communication, and if the value is "1" (communicating), it is possible to wait until communication ends.

The prescaler register shown in (C) is made up of 16 bits and is provided for each slave. The prescaler register is made up of 5 bits for the transmit buffer status (bits 15 to 11) and 10 bits for the baud rate setting (bits 9 to 0) (note that bit 10 is an unused bit).

The transmit buffer status stores the number of bytes of data to be sent; "00h" indicates that there is no data to be sent, and "01h" to "10h" indicates that there is 1 to 16 bytes of data to be sent in the transmit buffer. The transmit buffer status can also be used to check the amount of data remaining in the transmit buffer. If the transmit buffer status value is "10h", all data is stored in the transmit buffer (full state), so any data written will be ignored. Note that whether communication is in progress can be determined by looking up the value of the corresponding slave enable in control register 2.

The baud rate setting corresponds to the communication speed during communication, and is set once when the power is turned on. The setting value can be set to a value between "000h" and "3FFh", and in this embodiment, the actual baud rate can be calculated by system clock (20 MHz) / (setting value x 4). If the setting value is "000h", it is calculated as "001h". Note that it must be reset when initializing SPI communication (when the initialization setting of control register 1 is set to "1").

[21-2. Control at the start of SPI communication]
Next, the control from when the gaming machine is started (initialized) to when the SPI communication can be started will be described. Fig. 338 is a time chart showing the state from when the gaming machine of this embodiment is initialized to when the SPI communication can be started.

In FIG. 338, at time a, a reset signal is input by turning on the gaming machine, etc., and the gaming machine is started (initialized). When the gaming machine is started (initialized), a security check is performed to check whether any unauthorized devices have been installed or whether any unauthorized modifications have been made, etc., before user programs such as the initial setting process are executed (started) (period A).

When the security check is complete, the main control MPU 1311 executes the initial setting process, which is a user program (time b). The initial setting process includes processes specific to the gaming machine model, and executes the processes necessary to enable play to begin (period B).

The initial setting process includes the initialization of various parameters set in SPI communication. Specifically, the control register 1 (SPICNA0, SPICNB0) shown in FIG. 337(A) is set (time c). As described above, the control register 1 sets the bit shift settings for each slave and the operating mode common to all slaves.

When setting the operating mode, the clock initial state is set according to the selected operating mode. In the example shown in FIG. 338, the signal level of the clock terminal is set to "1" (High) when the power is turned on, so when mode 1 or mode 2 is selected, the signal level of the clock terminal is set to "0" (Low). The signal changes of the clock terminal for each mode are as shown in FIG. 338. Bit shift settings are set appropriately according to the slave specifications, etc. Since the SPI circuit is automatically initialized when the gaming machine is started, there is no need to execute initialization settings of the SPI circuit (write "1" to SPRSTA) when setting the mode by the initial setting process. This eliminates the need to include initialization processing in the user program, making it possible to reduce program capacity and the load during initialization.

After that, when the initialization setting process is completed (time d), the game process is started (period C). The start of the game process corresponds to the start of the main loop process (steps S36 to S40 in FIG. 22) in the initialization process (FIG. 21, etc.), and timer interrupt process can be executed. When the timer interrupt process is executed (time e), a process for performing SPI communication such as switch input process is executed (time f).

In addition, in the case of a reset where no reset signal is input from the reset terminal of the main control MPU 1311 (user reset, watchdog timer reset, illegal opcode reset, out-of-area access reset (hereinafter, unless otherwise specified, these resets will be referred to as "user reset"), the program starts to start immediately after the reset is released, and whether it is a system reset or a user reset, the settings related to SPI communications are made by the same process. This makes it possible to reduce the program size and the load at initialization by making the same settings related to SPI communications without distinguishing between a system reset and a user reset.

In addition, the period from when the reset is released until the operating mode is set (the period from time a to c) is longer in the case of a system reset than in the case of a user reset. Because restarting by powering on is more likely to cause security problems, this is done to ensure that various function checks of the main control MPU 1311 are completed by restarting after powering on.

[21-3. Control when transmitting output signal in SPI communication]
SPI communication is performed in various processes called from timer interrupt processing and initialization processing. For example, timer interrupt processing includes switch input processing for processing signals input from various switches and sensors through SPI communication, display LED output processing for outputting signals for controlling the lighting of various LEDs through SPI communication, and game stop processing for outputting signals for external output to an external output terminal through SPI communication. Here, the procedure for outputting signals through SPI communication in game stop processing will be described. In the gaming machine of this embodiment, the processing for executing SPI communication is simplified while using the processing call command such as the INVD command described above.

The procedure for transmitting a signal via SPI communication is roughly as follows: the data to be transmitted is set in a specified SPI communication buffer register, and the SPI 2-byte output process (SPI_TX_WA) called by the INVD command described above is executed. Here, the SPI communication process of step P124 of the game stop processing (Fig. 330) is used as a specific example, and the procedure is explained with reference to the program code for the game stop processing (Fig. 331) and the program code for the SPI 2-byte output process (SPI_TX_WA) (Fig. 324).

As shown in the program code in FIG. 331, when the game stop processing is started, the main control MPU 1311 stores the game stop command in the transmission buffer, and executes the external output processing (GAIB_OUT) for outputting the external output information (step P123), and the external output information to be output is set in the A register.

Then, the main control MPU 1311 loads (stores) the value stored in the A register into the W register ("LD W, A"), thereby setting the external output information set in the A register into the W register. Then, by setting the contents of the A register to "0" ("XOR A, A"), it sets the solenoid signal to be output when play stops to OFF.

Then, the address value of the SPI communication B buffer register (_SPIBFB0) is set in the E register, and the external output information set in the WA register and each solenoid signal are set in the SPI communication B buffer register (_SPIBFB0) indicated by the E register by the SPI 2-byte output process (SPI_TX_WA) called by the INVD command and the output port data setting process (PORT_DAT_SET) called from the SPI 2-byte output process (SPI_TX_WA), and are output by SPI transmission (CHB). The contents of the SPI communication B buffer register (_SPIBFB0) will be explained with reference to FIG. 339.

The SPI communication B0 port corresponds to the parallel output port of address DA, and is connected to the external terminal board 784 and various solenoids via the serial-parallel conversion circuit 1345 (Figure 257). Figure 339 is a diagram explaining the configuration of the SPI communication B buffer register in this embodiment. The SPI communication B buffer register is 16 bits, and the ports for outputting external information (PB0 to PB7) and the ports for outputting data (drive signals) to the solenoids (PA0 to PA7) are each composed of 8 bits.

Signals output from the port for external information output include security signals and ball payout signals. Various signals output from the external terminal board 784 are detected by the hall computer. The hall computer accumulates signals received from each gaming machine and monitors the player's play by determining the number of gaming media paid out by the gaming machine, game information, etc.

To further explain each port that outputs a drive signal to the solenoid, as shown in FIG. 339, output port PA1 corresponds to solenoid 1, output port PA2 corresponds to solenoid 2, and output port PA3 corresponds to solenoid 3. In this embodiment, the other ports are not used, and the number of output ports increases or decreases depending on the model. The solenoids include solenoids that open and close the large prize openings, and in this embodiment, as shown in FIG. 16, solenoids that open and close the first large prize opening 2005 and the second large prize opening 2006 are included. The second large prize opening 2006 is composed of two large prize openings, the second upper large prize opening 2006a and the second lower large prize opening 2006b, which are arranged in one flow path through which the game balls flow, so that three ports are the output destinations of the solenoid drive signals.

Although each solenoid corresponds to (is connected to) one output port, it may be configured with multiple bit outputs (for example, 2-bit outputs). For example, the output ports PA0 and PA1 may correspond to (connect to) a solenoid that opens and closes the first large winning opening 2005, the output ports PA2 and PA3 may correspond to (connect to) a solenoid that opens and closes the second upper large winning opening 2006a, and the output ports PA4 and PA5 may correspond to (connect to) a solenoid that opens and closes the second upper large winning opening 2006b. In this way, by bundling multiple output ports (output terminals) and outputting a drive current that connects to one solenoid, it is possible to prevent a shortage of drive current and ensure that the solenoid is driven. On the other hand, when a drive signal is output from one output port (output terminal), the drive signal may be amplified by an amplifier circuit arranged on the main control board 1310 or the relay board.

Returning to the explanation of the program code for the game stop processing in FIG. 331, when the SPI communication B buffer register is set in the E register to specify the output destination for SPI communication, the main control MPU 1311 calls the SPI 2-byte output processing (SPI_TX_WA) with the INVD command to start SPI communication. The SPI 2-byte output processing (SPI_TX_WA) is called in the game stop processing (Play_Stop), as well as the setting display processing (SET_DISPLAY), output data setting processing (PORT_SET), and LED_DISPLAY (display LED output processing), and is a process that is called when serial communication (SPI communication) is being executed.

Next, the details of the SPI 2-byte output process (SPI_TX_WA) will be described with reference to FIG. 324. When the SPI 2-byte output process is started, the main control MPU 1311 first outputs the contents of the W register to the SPI communication B buffer set in the E register ("OUT (E), W"). As described above, the W register stores the port output value created in the external output process (step P123) of the game stop processing. Furthermore, the contents of the A register are loaded into the W register ("LD W, A"), and the contents of the W register are output to the SPI communication B buffer ("OUT (E), W"). Through the above process, after setting the data for external information output, the data (drive signal) for the solenoid can be set.

Furthermore, the main control MPU 1311 sets definition information for performing SPI communication ("LDT HL, SPI_COMTX_B-_OFS_TP"). SPI_COMTX_B is a table in which the setting data for output via SPI communication is defined (SPI common output setting data), and _OFS_TP is the initial value address of the area in which the various tables are defined. The SPI common output setting data is explained below with reference to FIG. 340.

Figure 340 is a diagram showing an example of SPI common output setting data (SPI_COMTX_B) in this embodiment. In the SPI common output setting data (SPI_COMTX_B), the number of data settings is defined first, and then it is defined that communication is possible for SPI transmission/reception (CHA) and SPI transmission (CHB).

The number of data settings is the number of records defined in the table, and since two records of data are defined: setting data for SPI communication by SPI send/receive (CHA) and setting data for SPI communication by SPI send (CHB), the actual number of data settings is 2. The value of the number of data settings is calculated based on information such as the end address of the table to flexibly accommodate the table structure (increase or decrease in the number of records in the table).

SPI communication is started by writing the SPI communication enable bit to the SPI communication control register. The SPI common output setting data (SPI_COMTX_B) defines the setting data for SPI transmission/reception (CHA) and SPI transmission (CHB). Each setting data defines the setting address of the SPI communication control register 1 and the setting value of the SPI communication enable bit. Specifically, for SPI transmission/reception (CHA), the setting address of the SPI communication A control register 1 (_SPICNA1) and the setting value of the SPI communication A enable bit (_SPI_SPENBA_PB) are used, and for SPI transmission (CHB), the setting address of the SPI communication B control register 1 (_SPINB1) and the setting value of the SPI communication B enable bit (_SPI_SPENBB_PB) are used. _SPI_SPENBA_PB is set with communication start information for the slave that performs communication in SPI transmission/reception (CHA). For example, when starting communication with all slaves 1 to 4, the lower 4 bits corresponding to slaves 1 to 4 are set to "1", so "0FH" ("00001111B") is set. Note that _SPI_SPENBB_PB is set with communication start information for the slave that performs communication in SPI transmission (CHB).

Here, since slave 4 is used as an input, it is not necessary to start communication with slave 4 at the timing of output. However, even if the enable signal of slave 4 is set to start communication, the buffer of slave 4 does not contain data for communication, so as a result, communication with slave 4 will not start. The reason why the enable signals of slaves that do not need to start communication are also set to start communication is because the table is made available for common use during SPI communication. This makes it possible to set the SPI communication start time and execute it with one table, making it possible to reduce the program (data) capacity. Note that it is also possible to configure separate tables so that enable is set only for slaves that require communication, rather than enabling communication for all slaves. This increases the program (data) capacity, but makes it possible to avoid erroneous communication with slaves that do not need to communicate.

Then, the main control MPU 1311 starts SPI communication by executing the output port data setting process (PORT_DAT_SET) using the INVD command ("INVD_PORT_DAT_SET"). This will be explained further with reference to the program code shown in FIG. 319.

First, the main control MPU 1311 stores the number of data settings in the B register ("LD B, (HL+)"). The HL register stores a table "SPI_COMTX_B" (Figure 340) that contains definition information for SPI communication in the SPI 2-byte output process that is the caller of the output port data setting process, and the initially defined number of data settings is stored in the B register.

Next, the main control MPU 1311 starts SPI communication for SPI transmission/reception (CHA). Specifically, the address corresponding to the SPI communication A control register is set in the W register ("LD W, (HL+)"), and the setting value of the SPI communication A enable bit is set in the A register ("LD A, (HL+)"). After that, the SPI communication A enable bit is set in the SPI communication A control register to start SPI communication by SPI transmission/reception (CHA) ("OUT (W), A"). Furthermore, it is determined whether or not the loop for the number of data settings has been completed ("DJNZ P?ORTDAT_SET_1"), but since SPI communication by SPI transmission (CHB) has not started, the SPI communication B enable bit is set in the SPI communication B control register in the same way as communication by SPI transmission/reception (CHA), and then the output port data setting process is terminated.

The "LD B, (HL+)" process loads the data at the address indicated by the HL register into the B register, and then increments the value of the HL register by +1. This eliminates the need to execute the process of incrementing the HL register by +1 (INC HL) when successively reading out data at the address indicated by the HL register, making it possible to compress the program capacity.

When the SPI communication process in step P124 ends, the main control MPU 1311 sets game stop data for stopping the game (step P125). Furthermore, it executes an output port data setting process (PORT_DAT_SET) for setting the set game stop data to the output port (step P126). Finally, it executes a performance display monitor process for displaying various information related to the game on the performance display monitor (step P127), and returns to the process that called it (timer interrupt process).

As described above, in the gaming machine of this embodiment, in order to execute SPI communication, the INVD command is used to call the SPI 2-byte output process (SPI_TX_WA) and the output port data setting process (PORT_DAT_SET), which reduces the overhead required to execute SPI communication and speeds up processing.

[21-4. Control when receiving an input signal in SPI communication]
Next, the configuration and procedure for receiving signals from various sensors and switches in SPI communication will be described. First, the configuration for receiving an input signal by SPI communication will be described. The slave that receives the input signal corresponds to slave 4 in the block diagram shown in FIG. 335, and corresponds to the parallel-serial conversion circuit 1341 in the specific configuration of this embodiment. As shown in the main board mounting diagram of FIG. 334, the parallel-serial conversion circuit 1341 is actually composed of three ICs (1341a to 1341c).

[21-4-1. Configuration for receiving input signals via SPI communication]
FIG. 341 is a circuit diagram mainly showing a configuration for receiving signals by SPI communication in the gaming machine of this embodiment. The parallel-serial conversion circuit 1341 accepts input of signals from each switch and sensor through each connector at Q/D1 to 8 terminals. Also, a clock signal output from the SPICK terminal of the master main control MPU 1311 is input from the CK terminal. Also, the signal output from SPITX of the main control MPU 1311 is not taken in, and a LOW level signal is input to the CLR/LOAD terminal by outputting data of "0" from SPITX, and the signal connected to the Q/D8 to Q/D1 terminals is input to the parallel-serial conversion circuit 1341. The specific data take-in timing is based on the operation mode, as explained in FIG. 336 and the like.

The parallel signals input to the parallel-serial conversion circuit 1314 are converted to serial signals and input to the SPIRX terminal of the main control MPU 1311. The signals input to each parallel-serial conversion circuit 1314 are output sequentially (for example, in the order of parallel-serial conversion circuits 1314c, 1314b, and 1314a). The parallel-serial conversion circuit 1314a outputs the converted signal from the Q8' terminal and inputs it to the SI terminal of the parallel-serial conversion circuit 1314b. The parallel-serial conversion circuit 1314b outputs the signals input to the Q/D1 to 8 terminals from the Q8' terminal, and then outputs the signal input to the SI terminal from the Q8' terminal. The signal output from the Q8' terminal of the parallel-serial conversion circuit 1314b is input to the SI terminal of the parallel-serial conversion circuit 1314c. The parallel-serial conversion circuit 1314c outputs the signals input to the Q/D1-8 terminals from the Q8C terminal, and then outputs the signal input to the SI terminal from the Q8C terminal. The signal output from the parallel-serial conversion circuit 1314c is input to the SPIRX terminal of the main control MPU 1311.

Next, we will explain each parallel-serial conversion circuit 1341 (1341a to 1341c), including signals input from various switches and sensors. In this embodiment, each parallel-serial conversion circuit (1341a to 1341c) is made of the same hardware.

The parallel-serial conversion circuit 1314a accepts input of signals output from normal prize slot switches 1-3 and special prize slot switches 1-3 via connector 13101. It also accepts input of signals output from start slot switch 2 via connector 13107 and from start slot switch 1 via connector 13108. The signals input from each switch pass through an interface (IF) circuit 13105a before being input to the parallel-serial conversion circuit 1314a.

The interface circuit 13105a can detect disconnection, short circuit, power supply abnormality, etc., in the input signal. When an abnormality is detected, an error signal is output from the E terminal. The interface circuit 13105a also accepts the input of a signal detected by a proximity sensor. The proximity sensor outputs a voltage of about 9 V when the sensor does not pass (when not detecting), and outputs a voltage of about 0.8 V when detecting passage. Therefore, inside the interface circuit 13105a, if the input signal is 0 V, it is determined to be a disconnection, and if it is 12 V, it is determined to be a short circuit. Note that the E terminal of the interface circuit 13105a and the E terminal of the interface circuit 13105b (described later) are directly connected by a wiring pattern, so it is not possible to determine whether the abnormality is on the interface circuit 13105a side or the interface circuit 13105b side. This is because if an abnormality occurs in either sensor, it will cause a hindrance to the progress of the game, so there is no need to detect the abnormality individually. Anomalies may be detected individually for each interface circuit by connecting the E terminals of each interface circuit. The error signal is input from the parallel-serial conversion circuit 1341 to the main control MPU 1311 in the same way as other input signals, and the main control MPU 1311 receives the error signal along with signals from various sensors during input processing, determines whether the error signal indicates an error through program processing, and if it determines that there is an error, transmits a command to the peripheral control board to notify the switch abnormality, and notifies the lamp (LED), sound, liquid crystal display, etc. that a switch abnormality has occurred.

The parallel-serial conversion circuit 1314b accepts input of signals output from the out switch and safe switch via the connector 13104, and accepts input of a signal output from the start port switch 3 via the connector 13106. In addition, it accepts input of signals output from the general-purpose input, discharge port switch, specific area switch, role-linked operation gate switch, and general gate switch via the connector 13101. The signals input from each switch pass through the interface (IF) circuit 13105b before being input to the parallel-serial conversion circuit 1314b. The interface circuit 13105b has the same function as the interface circuit 13105a, and accepts input of a signal detected by a proximity sensor. As described above, the wiring from the E terminal of the interface circuit 13105b is connected to the E terminal of the interface circuit 13105a, and is input to the main control MPU 1311 via the parallel-serial conversion circuit 1314c.

The parallel-serial conversion circuit 1314c accepts input of signals output from the vibration detection sensor, magnetic detection switch, specific area tamper prevention switch, and start port tamper prevention switches 1 to 3 via the connector 13101. Furthermore, the parallel-serial conversion circuit 1314c accepts input of an error signal (SW-E) input from the E terminal of the interface circuit 13105a and the interface circuit 13105b. The specific area tamper prevention switch and the start port tamper prevention switches 1 to 3 are photo-type sensors that output a voltage of 12 V when the sensor does not pass (when not detecting), and output a voltage of 0 V when the sensor detects passage. In addition, the vibration detection sensor and the magnetic detection switch are not photo-type sensors, but similarly output a voltage of 12 V when vibration or magnetic abnormality is not detected (when not detected), and output a voltage of 0 V when vibration or magnetic abnormality is detected (when detected). Note that the voltages at the time of detection and non-detection may be reversed, and a voltage of 0 V may be output at the time of non-detection and a voltage of 12 V at the time of detection. Unlike a proximity sensor, the voltage is different when it is ON/OFF, so the signal is converted to 5V by transistor 13109 without going through an interface circuit and output. The transistor 13109 used here has a built-in elimination circuit (resistor) in the input stage of the transistor to prevent false detection due to noise, etc. when the signal is input.

A pull-up resistor 13109b is connected between the interface circuit 13105 and the transistor 13109 and the parallel-serial conversion circuit 1314. In addition to the pull-up resistor 13109b, a capacitor 13109c is connected between GND and the signal line for noise removal. A pull-up resistor 13109d is connected between the connector 13101 and the interface circuit 13105 and the transistor 13109a. These pull-up resistors (13109b, 13109d), the capacitor 13109c, the interface circuit 13105, and the transistor 13109a are arranged relatively close to the connector 13101, while the parallel-serial conversion circuit 1314 does not need to be arranged close to the connector 13101. That is, the electronic components arranged near the connector 13101 are specific circuits (pull-up resistors (13109b, 13109d), capacitor 13109c, interface circuit 13105, and transistor 13109a) among the input circuits (input circuitry from connector 13101, etc. to main control MPU 1311). This is because the output from interface circuit 13105 and transistor 13109a has high drive capacity and is not easily affected by noise even if the parallel-serial conversion circuit 1314 is far away. In addition, when receiving a signal from outside the main control board 1310, the interface circuit 13105 and transistor 13109a and electronic components such as pull-up resistors (13109b, 13109d), capacitor 13109c, etc. connected to them must be arranged near the connector, since wiring patterns may affect wiring patterns of other signals if they are routed within the board.

[21-4-2. Procedure for receiving input signals via SPI communication (switch input processing)]
Next, a procedure for inputting data input from various switches provided in the gaming machine to the main control MPU 1311 by serial communication (SPI communication) will be described. Specifically, the switch input process of step S74 in the timer interrupt process of Fig. 23 will be described. Note that, regarding the switch input process, Fig. 288 describes the process of detecting the entry of a gaming ball into a starting hole or the like and storing switch edge information in a prize ball determination area, but here, a procedure for receiving input signals from various sensors, not limited to prize ball information, and inputting the signals to the main control MPU 1311 by SPI communication will be described.

Figure 342 is a flowchart showing an example of the procedure for switch input processing for acquiring information detected by a sensor or the like provided in the gaming machine of this embodiment. Figure 343 is a diagram showing an example of program code for the switch input processing of this embodiment, and corresponds to the flowchart of Figure 342. Details of the switch input processing will be described below with reference to Figures 342 and 343, and a procedure for receiving a signal input to the main control MPU 1311 by SPI communication will be shown. As described above, in this embodiment, the input signal is received using the third channel (slave 4, channel A3) of the SPI transmission/reception (CHA). Note that when explaining the program processing, "slave 4" will be explained as "channel A3".

When the switch input process is started, the main control MPU 1311 sets dummy data (8 bytes) for transmission in the communication buffer (_SPIBFA3) of the A3 channel (step P6001). Specifically, first, the top address of the SPI input setting data (see FIG. 344) is set in the HL register. At this time, the LDT command sets the test pointer address (fixed at 9000H; can be rewritten by the program) plus the value of the second operand in the HL register, which makes it possible to set a word length of 2 bytes instead of the original 3-byte word length command (LD HL, SPI_SWRX_B), thereby reducing the program capacity. The value of the second operand is the difference value from the top data address of the data to be set, and the top data address of the data to be set is stored in the HL register (first operand) by adding the value of the second operand to the value indicated by the test pointer. As described above, in this embodiment, when an input signal is received from the parallel-serial conversion circuit 1314 (slave 4), the input signal is controlled to be captured every time dummy data is transmitted. The dummy data that is set when data is received is defined in the SPI input setting data, and the contents of the SPI input setting data are explained below with reference to FIG. 344.

Figure 344 is an example of program code for setting data (SPI input setting data; SPI_SWRX_B) when starting to receive an input signal by SPI communication in this embodiment. The SPI input setting data is defined at the beginning with data indicating the number of data settings, followed by the address of the transmission (communication) buffer and the transmission data (dummy data) to be stored in the transmission buffer. In the example shown in Figure 344, dummy data is set in the transmission (communication) buffer for the A3 channel (SPIBFA3). At this time, the first and fifth bytes of transmission data are used as load data for the input signal (latch data; SPI reception LOAD signal (_SPI_LOAD_SIG = FEH)), and the other (2nd to 4th, 6th to 8th bytes) transmission data are dummy data (SPI general reception signal (SPI_COMM_SIG = FFH)). This is because the input port of the switch is assigned 3 bytes, and the same amount of transmission data is required. One set consists of 4 bytes of data: 1 byte of load signal and 3 bytes of dummy data. In this embodiment, the 8th bit of the load data is set to "0", but since the load data is discarded without being imported as described below, the 8th bit may be set to "0", for example, the 1st bit may be set to "0". Also, instead of outputting the load signal via serial communication, the load signal may be output from an input/output port.

In the case of a configuration in which the load data is transmitted by serial communication, the hardware (circuit) costs, such as the wiring pattern for outputting the load signal, the configuration for noise removal, and the layout of the input/output ports, and the software costs, such as the program processing for turning the load signal ON/OFF, can be reduced compared to the case in which the load signal is output from the input/output port. On the other hand, when the load signal is output from the input/output port, the process of transmitting the load data is not necessary, and it is not necessary to discard the data captured at the timing of the load data without transmitting the load data, so the program processing can be simplified. Note that when outputting data by SPI communication, the SPITX signal may output data of "0" (a LOW level signal), and in that case, the parallel-serial conversion circuit 1341 may capture an input signal, but since the transmission buffer of the A3 channel is empty, SPI communication on the A3 channel is not started, so the signal captured by the parallel-serial conversion circuit 1341 at this timing is updated when the load signal is output in the input processing, and is ultimately discarded.

In the SPI communication of this embodiment, in order to prevent the game from proceeding with erroneous data due to the influence of noise, etc., the signal input from a switch or the like is read twice, and if the two bytes match, it is determined that the communication has been performed normally, thereby improving the communication accuracy. In the gaming machine of this embodiment, two sets of data (total of eight bytes) are transmitted, consisting of one byte of a load signal and three bytes of dummy transmission data, totaling four bytes, and the two sets of received data are compared to determine whether the communication has been performed normally. Note that the first and fifth bytes of the transmitted data are used as a load signal, so they are not taken in as input signals during transmission, and the input data becomes invalid data. In addition, the input signals taken in during transmission of the second and sixth bytes, the third and seventh bytes, and the fourth and eighth bytes of the transmission data correspond to each other, and if the corresponding input signals match, edge data is created as a successful communication (double read) and the game is controlled.

When the SPI input setting data is set in the HL register, the main control MPU 1311 executes the output port data setting process (PORT_DAT_SET) using the INVD command. This sets 8 bytes of transmission data defined in the SPI input setting data in the communication buffer of the A3 channel, and then the 8 bytes of dummy data stored in the communication buffer of the A3 channel (_SPIBFA3) is sent by setting the enable of all slaves used for communication in the CHA control register 2 (SPICNA1) to 1.

Note that, if communication is limited to a specific slave, such as only the input slave 4, individual processing and setting data are required, but by configuring communication to be started for all slaves, it is possible to standardize processing and data.

Next, the main control MPU 1311 sets a monitoring time until the SPI communication is completed (step P6002). If the communication is not completed by the set start time, it is determined that the communication has failed.

Then, the main control MPU 1311 determines whether communication is in progress (communication is ongoing) (step P6003). Specifically, first, the value set in the SPI transmission/reception (CHA) control register 2 (SPICNA1; SPI communication A control register 1; see FIG. 339 (B)) is stored in the A register. Then, the enable bit is referenced from the value stored in the A register to determine whether communication is in progress. If communication is in progress (the result of step P6003 is "YES"), the system waits until communication is completed or the monitoring time has elapsed (step S6004).

If the monitoring time has elapsed while the A3 channel remains in communication (the result of step P6004 is "YES"), the main control MPU 1311 initializes the communication circuit (step P6005). Furthermore, it sets communication error data in place of the input data in a specific register (to be described later) (step P6006). Thereafter, by executing the processes from step P6008 onwards, control is performed so that edge data in which the signal changes from OFF to ON (the switch is not determined to be ON) is not created.

Here, the initialization setting of step P6005 will be described. FIG. 345 is an example of the program code of the setting data (SPI restart setting data; SPI_RESTART_B) when initializing the communication circuit of the SPI communication of this embodiment. In the SPI restart setting data, data indicating the number of data settings is defined at the beginning, followed by the setting data for initializing the communication circuit. First, by setting "00000001B" in the control register 1 (SPICNA0) for SPI transmission/reception (CHA), SPRSTA is set to "1", and the initialization of the communication circuit is performed. The setting value of the control register 1 for SPI transmission/reception (CHA) is as described in FIG. 337. Furthermore, the bit shift setting of slave 1, slave 3, and slave 4 is set to "1" (LSB first), and the operation mode is set to "0" (mode 0). Furthermore, the baudlets of slave 1 (_SPIPSA0), slave 2 (_SPIPSA1), and slave 4 (_SPIPSA3) are set. Slave 3 (channel A2) is unused, so no settings have been made.

The "communication error data" set in step P6006 is set to "FFH" (the same value as when the input signal is OFF) so that edge data is not set when edge data that changes from OFF to ON is created in the processing of step P6008. In this embodiment, the signal is determined to be ON when all signals are Low, so the communication error data is set to the same "FFH" so that all signals are High. Therefore, for example, if the input signal is determined to be ON when it is High, the communication error data to be set is "00H" rather than "FFH".

On the other hand, when the main control MPU 1311 is not communicating (when the communication of the dummy data is completed) (the result of step P6003 is "NO"), the input data acquired together with the transmission of the dummy data is acquired from the SPI communication A3 buffer register as input data, and set in a specified register (step P6007). To explain the process of step P6007 in detail, as described above, data acquisition is performed by acquiring 8 bytes of data ((load data + dummy data x 3) x 2 times = 8 bytes) from the SPI communication A3 buffer register. First, the first byte of data is acquired, but the acquired data is discarded because it is invalid data acquired together with the transmission of the load data, and the second byte of acquired data and the third byte of data are temporarily stored in the WA register, which is a pair register (which can be used as a register for 2 bytes), and then moved to the BC register. Furthermore, the fourth to sixth bytes of data are acquired. As mentioned above, the fifth byte of data is discarded because it is invalid data that was imported when the load data was sent, and the fourth byte of imported data and the sixth byte of data are temporarily stored in the WA register and then moved to the DE register. Finally, the seventh byte of imported data and the eighth byte of data are stored in the WA register.

Next, the main control MPU 1311 creates edge data from the input data stored in a specified register (step P6008). In the processing of step P6008, edge data is created based on the data taken into each register, regardless of whether communication was completed normally or not. If a communication abnormality occurs, "communication abnormality data" is set in a specified register in the processing of step P6006, and therefore edge data in which input data is taken (changing from OFF to ON) is not created. As a result, even if communication is abnormal, edge data is created using the same processing as when communication is normal, making it possible to simplify the control structure of the program.

To explain the process of step P6008 in more detail, first, the values of the W register and D register are swapped, and the top address of the SPI switch input information data is set in the HL register. In this embodiment, three types of SPI switch input information data are defined: SPI switch input information data 1, SPI switch input information data 2, and SPI switch input information data 3, and the specific configuration is shown in Figure 346.

Figure 346 is a diagram illustrating an example of SPI switch input information data in this embodiment. The SPI switch input information data is composed of adjustment data, mask data, and a level area address.

The adjustment data is defined as a one-byte bit string, and is data for adjusting the input data. The adjustment data is intended to set the value to 1 when the imported input signal is ON. In Figure 346, the adjustment data is "00h", so when the imported value is "1", the switch level data becomes "1" as the switch is ON. On the other hand, when the value is "0", the switch level data becomes "0" as the switch is OFF.

Mask data, like the adjustment data, is defined as a one-byte bit string, and is used to identify the data to be compared as necessary. By configuring the mask data so that bits used as input signals are "1" and unused bits are "0", even if an unused input bit is mistakenly ON ("1"), it can be set to OFF ("0") by the mask data.

The level area address is the address of the area that stores the level data created from the input data. Note that the edge data is stored immediately after the level data is stored, so the area that stores the edge data is made continuous with the area that stores the level data, and the address for storing the edge data is not set in the SPI switch input information data. The areas that store the level data and the edge data have the same configuration. Note that if the area that stores the level data and the area that stores the edge data are not stored in continuous areas, it is sufficient to set (hold) the area that stores the edge data. In this case, if the upper byte of the address of the area that stores the level data and the area that stores the edge data are fixed (common), then by setting only the lower byte of the address, the data volume can be reduced more than if the address of each area were held as is.

Figure 347 is a diagram showing an example of the configuration of the area for storing the level data and edge data of this embodiment. Referring to Figure 347, the level area address of the SPI switch input information data 1 is "0006h", the first bit (BIT0) is the start port SW (switch) 1, the second bit (BIT1) is the start port SW2, the third bit (BIT2) is the large prize port SW1, the fourth bit (BIT3) is the large prize port SW2, the fifth bit (BIT4) is the large prize port SW3, the sixth bit (BIT5) is the normal prize port SW1, the seventh bit (BIT6) is the normal prize port SW2, and the eighth bit (BIT7) is the normal prize port SW3. The area (edge area address) for storing the edge data corresponding to the SPI switch input information data 1 is "0007h", which is a continuous area with the area for storing the level data. This configuration eliminates the need to redefine the area in which edge data is stored, making it possible to reduce the size of programs and data, and when reading data, it is only necessary to read a continuous area, simplifying the program while improving processing efficiency.

Now, let us return to the explanation of the processing of step P6008 in FIG. 342 (FIG. 343). After the SPI switch input information data is set in the HL register, the input data is checked and the SPI twice read processing (TWICE_SPI) is executed to create level data and edge data. Details of the SPI twice read processing (TWICE_SPI) will be explained with reference to FIG. 348 and FIG. 349.

Figure 348 is a flowchart showing an example of the procedure for the SPI twice read processing (TWICE_SPI) of this embodiment. Figure 349 is a diagram showing an example of program code for the SPI twice read processing (TWICE_SPI) of this embodiment, and corresponds to the flowchart of Figure 348.

When the SPI double read process is started, the main control MPU 1311 saves the value of the DE register to the stack area because the DE register may be used in subsequent processes (step P6101). Next, the level area address is identified from the address of the SPI switch input information data stored in the HL register, which stores the level data, and stored in the index register (step P6102). After creating level data and edge data using the level/edge data creation process (MAKE_LEV_EDG) described later, the data created based on the address stored in the index register is stored. In addition, after the process of step P6102, the value of the HL register is subtracted to adjust it for subsequent processes. The level/edge data creation process (MAKE_LEV_EDG) is called to create edge data for general-purpose IO switches (input signals from a parallel port) that do not use SPI communication, in addition to inputs via SPI communication. At this time, because there is more switch input information data for inputting signals from the general-purpose IO switch than for SPI communication, the address of the switch input information data is adjusted by subtracting the value of the HL register ("DEC HL"). Data that is not included in the switch input information data for SPI communication is, for example, the number of times data is read and the address of the input port.

The main control MPU 1311 judges whether the input data read twice matches (whether the data to be compared matches) (step S6103). The data to be compared is stored in the W register and the A register, and is compared by the CP command. As described above, immediately after the input data is read from the communication buffer, the input data read in the second, third, fourth, sixth, seventh, and eighth positions are stored in the B, C, D, E, W, and A registers (predetermined registers). However, since the values of the W register and the D register are exchanged before the first SPI twice read process is executed, the data read in the fourth position and the data read in the eighth position are compared. Thereafter, when the SPI twice read process is executed, the value of the register in which the data to be compared is stored in the calling process (switch input process) can be exchanged as necessary, so that the process can be executed without being aware of which byte the target data is, and the SPI twice read process (TWICE_SPI) can be a highly versatile process.

If the input data read twice does not match (the result of step P6103 is "NO"), the main control MPU 1311 stores "00H" as the edge data in the edge data area (step P6105). Furthermore, it returns the saved DE register from the stack area (step P6106) and ends this process.

If the input data read twice matches (the result of step P6103 is "YES"), the main control MPU 1311 executes the level/edge data creation process (MAKE_LEV_EDG) using the INVS command (step P6104) to create level data and edge data corresponding to the input data. The level/edge data creation process will be described with reference to Figures 350 and 351.

Figure 350 is a flowchart showing the steps of the level/edge data creation process of this embodiment. Figure 351 is a diagram showing an example of program code for the level/edge data creation process of this embodiment, and corresponds to the flowchart of Figure 350.

The main control MPU 1311 first creates level data from the input data based on the adjustment data and mask data contained in the switch input information table (step P6201). Specifically, for the input data stored in the A register, the value of each bit is adjusted based on the adjustment data so that the input signal is "1" when it is ON and "0" when it is OFF. Furthermore, the level data is created so that bits other than the bits used as the input signal are not set to ON ("1") by the mask data. The calculated level data is then saved in the E register.

The main control MPU 1311 calculates the XOR value (intermediate data) with the level data from the previous interrupt (step P6203). As a result, 1 is set only in the case of an ON or OFF edge. Next, the main control MPU 1311 stores (updates) the current level data in the level data area (address stored in the index register) (step P6204). Furthermore, it calculates the AND value of the intermediate data (value of A register) and the level data created in the current interrupt to create edge data (step P6205). At this time, if it is an ON edge, "1" is stored, and otherwise 0 is stored. Finally, the main control MPU 1311 stores the edge data stored in A register in the edge data area (area continuous with the level data area) (step P6206).

After creating the level data and edge data, the main control MPU 1311 returns the saved DE register from the stack area (step P6106) and ends this process.

Now, returning to the switch input process in FIG. 342 (FIG. 343), the process from step P6008 onwards will be explained. When the creation and storage of the level data and edge data of the first input data is completed, the main control MPU 1311 exchanges the values of the C register and the E register, and stores the value of the DE register in the WA register. By exchanging the values of the C register and the E register, the seventh input data and the third input data are stored in the DE register, and by storing this in the WA register, the seventh input data and the third input data are compared to create the level data and edge data of the input data. The subsequent process is the same as the first procedure for processing the fourth input data and the eighth input data. Furthermore, the second input data and the sixth input data are stored in the BC address, and by storing this in the WA register and processing in the same way, the processing of three bytes of input data is completed, and the capture of the signal input from the serial port is completed.

Then, the main control MPU 1311 imports the data input from the parallel port, calls the level/edge data creation process (MAKE_LEV_EDG) using the INVS command, creates edge data for the input signal imported via the parallel port (step P6009), and ends this process.

[21-4-3. Procedure for receiving input signals via SPI communication (time chart)]
The procedure for receiving an input signal through SPI communication in the gaming machine of this embodiment has been described above with reference to the flowchart and program code. Next, the process of receiving an input signal through SPI communication will be described in chronological order with reference to the time charts in Figs. 352 and 353.

Figure 352 is a time chart showing the process from the start of switch input processing in this embodiment to the completion of data transmission by SPI communication in chronological order. Figure 353 is a time chart showing the process from the completion of data transmission by SPI communication to the start of switch input processing at the next timer interrupt in switch input processing in this embodiment in chronological order.

When a timer interrupt occurs, the timer interrupt process shown in FIG. 23 is executed. As described above, the interval of the timer interrupt (CTC setting) is set during the initial setting of the main control MPU 1311, and can be set to any value such as "0000h" to "FFFFh", as well as a fixed value (1 ms, 2 ms, 4 ms, 1,489 ms). In addition, the CTC has a function that allows any fixed value to be set, and the first, second, and third settings of the arbitrary fixed values are set to be in a multiple relationship, and the fourth setting is a setting that is not in a multiple relationship of the first to third settings. In this embodiment, the third setting value is set so that a timer interrupt occurs every 4 ms. The timer interrupt may be generated at any of the first, second, and fourth setting values, without being limited to the third setting value, and is set to an appropriate value according to the specifications of the gaming machine, depending on the sampling period for the timer interrupt (input signal capture, output signal output, and timekeeping update reference time, random number update period, etc.). In particular, sampling of the input signal capture is important, and the timer interrupt period is set to correspond to the pulse width at which an ON signal is output when the switch detects the passage of a gaming ball. When the switch detects the passage of a gaming ball, the pulse width changes depending on the falling speed, and the faster the falling speed, the shorter the pulse width. For this reason, the shorter the pulse width (the faster the falling speed), the shorter the sampling period must be. Note that if the sampling period is too short, processing cannot be completed in one timer interrupt period, so the timer interrupt period is set according to the processing amount and the shortest pulse width from the switch.

When the switch input process starts, first, 8 bytes of dummy transmission data are set in the communication buffer for A3 channel (SPIBFA3) by the SPI input setting data (SPI_SWRX_B; Figure 344) (step P6001). As described above, the transmission data has a latch load signal ("FEH"; _SPI_LOAD_SIG) set in the 1st and 5th bytes, and dummy data ("FFH"; _SPI_COMM_SIG) set in the 2nd to 4th bytes and the 6th to 8th bytes. Note that the value of the dummy data is not limited to "FFH" and may be any value.

When SPI communication starts, the enable terminal (SPENBA3) is updated from OFF ("0") to ON ("1"), and a clock signal is output from the clock terminal (SPICK) at a specified interval. Then, a load signal is output from the transmission terminal (SPITX) of the main control MPU 1311. At this time, since there is no input data corresponding to the load signal and it is ignored by the receiving side, the state of the receiving terminal (SPIRX) is undefined.

When the load signal is received, the signal changes from ON ("1") to OFF ("0") at the 8th clock, and this changed signal is input to the LOAD terminal of the parallel-serial conversion circuit 1341, latching three bytes of input signal to the parallel-serial conversion circuit 1341, and the main control MPU 1311 sequentially receives input data from the parallel-serial conversion circuit 1341 as a serial signal from the receiving terminal SPIRX. Specifically, when the second byte of the transmission data is transmitted, the first byte of input data is received from the parallel-serial conversion circuit 1341c. Then, when the third byte of the transmission data is transmitted, the second byte of input data is received from the parallel-serial conversion circuit 1341b, and finally, when the fourth byte of the transmission data is transmitted, the third byte of input data is received from the parallel-serial conversion circuit 1341a. Then, data for reading twice (checking) (second time) is received. As with the first data reception, the load signal is output at the beginning, and three bytes of input signal are latched again into the parallel-serial conversion circuit 1341, after which the fourth to sixth bytes of input data are received sequentially from the receiving terminal (SPIRX) in accordance with the transmission timing of the sixth to eighth bytes of transmission data, and then data transmission ends. At this time, the reception status of the A3 channel is set to reception ("1"), and the slave 4 enable (SPENBA3) of the CHA control register 2 (SPICNA1) is updated from communication in progress ("1") to communication completed ("0").

When the main control MPU 1311 receives the next data, it confirms that the SPI communication A enable bit (_SPI_SPENBA_PB) has become communication end ("0") and starts reading input data from the communication buffer (SPIBFA3) (steps P6007 and onwards). At this time, it sets a monitoring time, and if it cannot confirm that communication has ended within the monitoring time, it initializes the SPI communication circuit (steps P6002 to P6005). Note that the contents of the communication buffer are cleared in order each time data is read, and the buffer becomes empty when all data has been read. Thereafter, it repeats setting dummy data in the communication buffer and receiving input data until the next timer interrupt process starts. When the next timer interrupt process starts, it executes the switch input process from the beginning.

As described above, in this embodiment, serial communication (SPI communication) makes it possible to reduce data wiring on the main control board 1310, thereby increasing the freedom of board design. In addition, by adopting SPI communication, the number of wiring is greater than that of I2C communication, but the communication speed can be increased.

In this embodiment, the slaves (parallel-serial conversion circuit 1341, serial-parallel conversion circuit 1342, etc.) controlled by the master (main control MPU 1311) are dedicated to receiving (input) or transmitting (output), which makes it easier to manage electronic components and increases the freedom of arrangement of electronic components. This makes it possible to shorten the wiring distance between electronic components, making it easier to separate the wiring that outputs the clock signal from the wiring that transmits and receives data, thereby eliminating the effects of noise and stabilizing communication.

The main control MPU 1311 also enables synchronous and asynchronous serial communication as serial communication, and has multiple channels for synchronous and asynchronous serial communication. The communication format for asynchronous serial communication is 8 bits. In asynchronous serial communication, each channel is fixed to either receive or transmit, and each channel is equipped with a storage means (communication buffer) capable of storing communication data. Multiple types of communication buffer capacity can be defined, and for example, among the communication buffers, the largest size (e.g., 512 bytes) is used for sending commands to the peripheral control board 1510, which has a large amount of data to be sent. On the other hand, a small size (e.g., 128 bytes) is sufficient for sending commands to the dispensing control board, and a buffer that can be used for general purposes may be prepared. By performing asynchronous communication, it is possible to send and receive data in parallel with other processes, making the overall process more efficient.

22. Switch-related Control
The serial communication function (SPI communication) for inputting and outputting signals to the main control board 1310 in the gaming machine of this embodiment has been described above. As described above, signals are input to the main control board 1310 by switches and sensors that detect winning of gaming balls. The input data (signals) are taken in by the switch input process (step P102) in the timer interrupt process (Fig. 329). Furthermore, if the machine is in a playable state, various processes based on the input signals are executed in the switch-related control process (step 01TKS0010 in Fig. 354; Fig. 357) included in the playable state process (step P108; Fig. 354).

In the gaming machine of this embodiment, detection signals (detection signals) from various switches and sensors are input to the main control board 1310. The main control MPU 1311 outputs commands to various control boards (such as the peripheral control board 1510 and the payout control board 951) based on the input signals, and controls drivers such as motors and solenoids and light emitters such as LEDs. In this way, the input signals include many types of signals, from those related to the progress of the game to those that detect fraud or abnormalities. Therefore, since it is necessary to execute processing corresponding to each signal, there is a risk that the program for controlling the game will become complicated and the program capacity will increase.

In this embodiment, therefore, a gaming machine is provided that allows control corresponding to input signals to be executed using a general-purpose procedure by configuring data related to control processing of input signals in a specific structure. This simplifies game control and prevents increases in program capacity, making it possible to improve the development efficiency of gaming machines.

The following describes the configuration for storing the data required for switch-related control processing, which performs processing based on signals, and the procedure for controlling games using this data.

[22-1. Processing when play is possible]
First, before describing the switch-related control process, the playable time process that calls the switch-related control process will be described. As described above, the playable time process is a process that is executed when the game machine is started and normal play can proceed. Specifically, in the timer interrupt process (FIG. 329), the process is executed when the game machine is in a playable state and there is no game stop factor (step P108). Below, an overview of the procedure of the playable time process will be described.

Figure 354 is a flowchart showing the procedure for the game play possible processing executed by the timer interrupt processing of this embodiment. Figure 355 is a diagram showing an example of program code for the game play possible processing of this embodiment, and corresponds to the flowchart of Figure 354.

When the game-ready processing starts, the main control MPU 1311 first executes the switch-related control processing (step 01TKS0010). In the switch-related control processing, data is created based on signals input from various switches and sensors provided in the gaming machine, and processing corresponding to the input signals is executed. Details will be explained with reference to the figures from FIG. 357 onwards.

After the switch-related control process is executed, the main control MPU 1311 executes the probability change area passage judgment process (step 01TKS0020). In the probability change area passage judgment process, if the timer set in the special symbol/special electric device control process (step 01TKS0080) is valid, it is judged whether the game ball has passed through the probability change area, and the probability state is changed according to the judgment result. Note that the valid timer is set in the special symbol/special electric device control process (step 01TKS0080) and updated at the next interruption, but if this process is executed during the execution of the special symbol/special electric device control process, the switch input during the interruption will be judged as the passage of the probability change area, so it is called at the start of the timer interrupt process (before the execution of the special symbol/special electric device control process).

After the process for determining whether or not a special probability zone has been passed is executed, the main control MPU 1311 executes a timer update process (step 01TKS0030). In the timer update process, various timers necessary for the progress of the game are updated. These timers include 1-byte timers and 2-byte timers, depending on the time they measure.

After the timer update process is executed, the main control MPU 1311 executes the prize ball control process (step 01TKS0040). In the prize ball control process, input information is read from the input information storage area, and the number of game balls (prize balls) to be paid out is calculated based on the read input information. In addition, a prize ball command for paying out game balls is created based on the calculation result of the number of prize balls, and is sent to the payout control board 951. In addition, the main control board 1310 and the payout control board 951 are checked for connection status between the boards, and other processes are executed.

After the prize ball control process is executed, the main control MPU 1311 executes the slot command reception process (step 01TKS0050). In the slot command reception process, the received command is stored as information to be sent to the payout control board 951 or the peripheral control board 1510, or a command is generated.

After the frame command reception process is executed, the main control MPU 1311 executes the fraud detection process (step 01TKS0060). The fraud detection process checks for abnormal conditions of prize balls, etc. For example, this includes the big prize slot winning abnormality detection process, magnetic detection abnormality detection process, random number abnormality detection process, and normal electric device winning abnormality detection process.

After the fraud detection process is executed, the main control MPU 1311 executes the performance display monitor process (step 01TKS0070). The performance display monitor process is a process that displays various information. As mentioned above, no process directly related to game control is executed, and the performance display monitor itself is not something that the player intentionally refers to. Therefore, in this embodiment, the performance display monitor process is stored outside the usage area, and it can be executed independently of the game control process by the INVI command.

After the performance display monitor process is executed, the main control MPU 1311 executes the special symbol/special electric device control process (step 01TKS0080). In the special symbol/special electric device control process, after each starting hole passing process is executed, a process corresponding to the special symbol/electric device operation number including the big prize hole opening process is called. After the special symbol/special electric device control process is executed, the main control MPU 1311 executes the normal symbol/normal electric device control process (step 01TKS0090). In the normal symbol/normal electric device control process, when the game ball passes through the gate section 2003, a lottery is performed to determine whether or not to open the second starting hole 2004.

After the normal symbol/normal electric role control process is executed, the main control MPU 1311 executes the solenoid drive process (step 01TKS0100). In the solenoid drive process, an electric drive source such as a solenoid is driven based on the drive data. Note that in order to update the index register (IY register) during the solenoid drive process, the index register is saved to the stack area before the solenoid drive process is executed and is restored from the stack area after the process is completed.

Finally, the main control MPU 1311 executes the output data setting process (step 01TKS0110) and outputs the output information set in each process from the output terminals of the various output ports. After that, the game-ready process ends and the process returns to the timer interrupt process while maintaining the interrupt state.

[22-2. Overview of Switch-Related Control Processing]
Next, an overview of the switch-related control process will be described. Some of the input signals from various switches are stored in chronological order as history monitoring switch data. The history monitoring switch data includes a predetermined number of signals from the last input signal, and is configured so that when a new signal is input, the oldest signal is discarded. The main control MPU 1311 executes a predetermined process based on the history monitoring switch data. These input signals include, for example, signals input from a contact detection sensor (touch sensor) and a firing stop switch (firing stop button).

Before explaining the switch-related control process, we will first provide an overview of the configuration for accepting input of signals output from various switches, and then explain the basic steps of the switch-related control process. After that, we will explain the detailed steps of the switch-related control process and the structure for storing the data used.

[22-2-1. Configuration for executing control based on input signal]
The configuration will be described below in which signals output from the contact detection sensor (touch sensor) 509 and the firing stop switch (firing stop button, stop button) are input to the input port of the main control MPU 1311. Fig. 356 is a diagram showing an example of a circuit diagram excerpting the configuration up to inputting signals output from the contact detection sensor (touch sensor) and the firing stop switch (firing stop button) to the main control MPU 1311 in the gaming machine of this embodiment.

The contact detection sensor (touch sensor) and the launch stop switch (launch stop button) are included in the handle unit 500 provided on the main frame 4. The contact detection sensor 509 is a sensor that detects whether the palm or fingers are touching the handle lever 504, and when the handle lever 504 is touched, the game ball can be launched. The launch stop switch (launch stop button, stop button) detects whether the player wishes to forcibly stop the launch of the game ball. The detection signals from the contact detection sensor (touch sensor) and the launch stop switch (launch stop button) are input to the launch control input circuit included in the payout control board 951 and then input to the launch timing control circuit. The signal input to the launch timing control circuit is input to the input port of the main control MPU 1311 via the connector 13104 of the main control board 1310.

[22-2-2. Overview of Switch-Related Control Processing Procedure]
Next, an overview of the switch relationship control process will be described with reference to the flowchart of FIG.

The main control MPU 1311 first obtains the signal level from the area where the input signal is stored (input level data area), and executes a history monitoring switch data creation process to create/update history monitoring switch data (step 01TKS0110). As described above, history monitoring switch data is data that holds a predetermined number of signal values input to the main control MPU 1311 in chronological order. For example, if the history monitoring switch data is 1 byte (= 8 bits), the values of 8 input signals are stored. Details of the history monitoring switch data creation process will be explained with reference to Figure 358 and subsequent figures. Targets for which history monitoring switch data is created include door open information and proximity switch error signals in addition to the touch sensor signal and firing stop switch described above.

After executing the history monitoring switch data creation process, the main control MPU 1311 executes the open/short circuit abnormality determination process (step 01TKS0120). The open/short circuit abnormality determination process obtains a proximity switch error signal from the history monitoring switch data created in the history monitoring switch data creation process and determines whether an error has occurred. If an error has occurred, it sends an open/short circuit abnormality command.

After executing the disconnection/short circuit abnormality determination process, the main control MPU 1311 executes the process of prohibiting prize balls from non-operating large prize openings (step 01TKS0130). The process of prohibiting prize balls from non-operating large prize openings determines whether a prize ball entry into a large prize opening is valid, and if valid, stores prize ball determination data in the prize ball determination area. In addition, if the gaming machine is equipped with multiple large prize openings, a determination is made for all of the large prize openings.

After executing the process to prohibit balls from being awarded to non-operated large prize slots, the main control MPU 1311 executes the switch history command transmission determination process (step 01TKS0140). In the switch history command transmission determination process, a command is generated based on the history monitoring switch data created in the history monitoring switch data creation process. For example, the history monitoring switch data is referenced, and a command is sent if the signal value is determined to be ON.

In this embodiment, by structuring and defining the information for acquiring the signal to be judged (information for identifying the area in which the value of the input signal is stored), command information, and information for judging the input signal as a set (series) of data, it is possible to universally process the judgment of the input signal and the generation of a command. The structure and specific examples of the data for executing the switch history command transmission judgment process will be described with reference to Figures 364 and 365. Also, the detailed procedure of the switch history command transmission judgment process will be described with reference to Figures 367 and 368.

After executing the switch history command transmission judgment process, the main control MPU 1311 executes the switch pass command transmission/safe switch abnormality judgment process, which includes the switch pass command transmission process and the safe switch abnormality judgment process. The switch pass command transmission process generates a command when judging whether a prize has been won at a prize winning port. The procedure for generating the command can be executed by a common process regardless of the prize winning port. In addition, the safe switch abnormality judgment process judges whether or not an abnormality has occurred in the number of prize winnings (number of safe balls) by counting the number of prize winnings according to the type of prize winning port and counting the number of safe balls (safe judgment count value) based on the presence or absence of prize balls, etc.

In addition, in the switch pass command transmission/safe switch abnormality determination process, the information for identifying the winning port to be determined, the command information, and the count information for counting the number of safe balls, etc. are structured and defined as a set of data, making it possible to perform common processing regardless of the type of winning port. The data structure and specific examples for executing the switch pass command transmission/safe switch abnormality determination process will be explained with reference to Figures 367 and 368. In addition, the detailed steps of the switch pass command transmission/safe switch abnormality determination process will be explained with reference to Figures 369 to 372.

Above, we have explained the overview of the switch relationship control process. Next, we will explain the detailed procedures and data structures of each process that makes up the switch relationship control process.

[22-3. History monitoring switch data creation process]
When the switch-related control process is started, a history monitoring switch data creation process is executed to create history monitoring switch data from the received input signal. As described above, in the history monitoring switch data creation process, the history monitoring switch data is created based on the history area creation data, which has a common data structure regardless of the type of signal. The configuration for creating the history monitoring switch data will be described below. Specifically, first, the data structure of the history area creation data will be described, and then specific history area creation data will be described. Next, a detailed procedure will be described with reference to the flowchart and program code of the history monitoring switch data creation process.

[22-3-1. Configuration of History Area Creation Data]
FIG. 358 is a diagram for explaining the data structure of the history area creation data of this embodiment. The history area creation data is information for creating history monitoring switch data corresponding to an input signal. Specifically, for one type of input signal, the lower address of the reference destination (input level data area), the switch bit number, and the lower address (history management RWM lower address) of the area (input signal history area) that stores the history monitoring switch data are configured as one set. Since the capacity for storing each data is 1 byte, the history area creation data can be sequentially referenced by adding 1 to the address from the head address of the history area creation data ("XXXXh") and referencing it.

The lower address of the reference destination (input level data area) is the lower address of the area in which the value of the signal input to the input port of the main control MPU 1311 (history management switch input level data) is stored. Since the upper address is specified in advance, it is necessary to specify only the lower address, which makes it possible to suppress the required area (capacity) to 1 byte. Note that instead of setting only the lower address, it is also possible to set it as 2-byte address data including the upper address.

Signals input to the input port of the main control MPU 1311 are stored as 1-byte input level data by aggregating multiple predetermined types of signals. In this embodiment, the input level data is composed of 1 byte (= 8 bits), so a maximum of 8 types of input signals are assigned to one input level data. The switch bit number is information for identifying which bit of the input level data corresponds to the signal for which history monitoring switch data is to be created. The switch bit number is set to a value between 0 and 7. The specific configuration will be described later in FIG. 363.

The signals that make up the input level data are signals that are taken in from the input port of the main control MPU 1311 via serial or parallel communication. For example, a proximity switch error signal is taken in via SPI communication (serial communication). For the proximity switch error signal input to the main control MPU 1311, level data is generated based on the adjustment data and mask data contained in the SPI switch input information data (Figure 346) and stored in "INPUT_LEV3".

The area that stores the history monitoring switch data (input signal history area) has its upper addresses pre-specified, just like the input signal reference (input level data area), so only the lower addresses need to be specified. This makes it possible to keep the required area (capacity) to just 1 byte.

Next, a specific example of the history area creation data will be described. Figure 359 is a diagram showing an example of the history area creation data of this embodiment. As described above, in the gaming machine of this embodiment, the input signals for which history monitoring switch data is created include the door open information signal, touch sensor signal, firing stop switch, and proximity switch error signal. Here, the history area creation data for the firing stop switch will be used as an example for description.

The input signal of the firing stop switch is stored in the input level data "INPUT_LEV4", and the lower address of the storage location of "INPUT_LEV4" (".LOW.INPUT_LEV4") is set as the reference destination (input level data area) (history management switch input level data lower address).

Here, the area in which the input level data is stored is explained. FIG. 360 is a diagram showing the configuration of the area (data area) in which signals input to the main control MPU 1311 of this embodiment are stored, and which stores the signals for which history monitoring switch data is to be created. The frame opening information signal is stored in "INPUT_LEV5", and since the address is "000Eh", the history management switch input level data lower address is "0Eh". Similarly, the touch sensor signal and the firing stop switch signal are stored in "INPUT_LEV4", and since the address is "000Ch", the history management switch input level data lower address is "0Ch". Furthermore, the proximity switch error signal is stored in "INPUT_LEV3", and since the address is "000Ah", the history management switch input level data lower address is "0Ah".

The switch bit number "_DOOR_SW_BIT" corresponding to the frame opening information signal is set to "5", which specifies the value of the fifth bit of "INPUT_LEV5". In "INPUT_LEV5", the "frame opening information signal" is stored in the fifth bit, and the other bits are unused.

Similarly, the switch bit number "_HASSYA_TCH_BIT" corresponding to the touch sensor signal is set to "2", and the value of the second bit of "INPUT_LEV4" is specified. "INPUT_LEV4" stores the "setting key switch" in bit 0, the "payer ACK input signal" in bit 1, the "touch sensor signal" in bit 2, the "fire stop switch signal" in bit 3, and the "master RWM erase/setting change signal" in bit 4, with bits 5 to 7 being unused. Additionally, the switch bit number "_HASSYA_STP_BIT" corresponding to the fire stop switch signal is set to "3", and the value of the third bit of "INPUT_LEV4" is specified.

Furthermore, the switch bit number "_SW_ERR1_BIT" corresponding to the proximity switch error signal is set to "6", and the value of the 6th bit of "INPUT_LEV3" is specified. "INPUT_LEV3" stores "magnetic detection switch" in the 4th bit and "proximity switch error signal" in the 6th bit, with the other bits being unused.

As described above, the input of the frame opening information signal can be identified by the history management switch input level data lower address and the corresponding switch bit number.

Returning to the explanation of the history area creation data in Figure 359, the address of the area where the history monitoring switch data of the launch stop switch is stored (launch stop switch signal history area "HS_STP_HIST") is, for example, "002Ch". At this time, "2Ch", which is the lower address of the launch stop switch signal history area (".LOW.HS_STP_HIST"), is set as the lower address (history management RWM lower address) of the area where the history monitoring switch data is stored (input signal history area).

At the end of the area where the history area creation data is defined, the number of history monitoring switches ("_HIST_SW_CNT") is defined, which is the number of switches that are the subject of the history area creation data. Specifically, this is the number of bytes from the address of the start area of the history area creation data to the address where the number of history monitoring switches is stored divided by 3. Since the history area creation data is made up of three types of 1-byte data per switch, it is possible to define it without directly storing numerical values. Defining it in this way makes it possible to respond without changing the program even if the number of switches to be monitored increases or decreases, reducing the possibility of program malfunctions such as bugs occurring.

In the above example, data for creating history monitoring switch data was described for the door open information signal, touch sensor signal, launch stop switch, and proximity switch error signal, but other signals may be managed by the history monitoring switch data, not limited to these signals. For example, a signal from a position sensor of a reel (driver) controlled by the main control board 1310 may be managed by the history monitoring switch data to determine whether the reel has returned to its home position. In addition, switches and sensors that are determined only by the ON/OFF switching of an input signal such as a gate switch may also be managed by the history monitoring switch data.

[22-3-2. History monitoring switch data creation process procedure]
In the history monitoring switch data creation process, based on the information defined in the history area creation data, history monitoring switch data of the signal input to the main control MPU 1311 is created. The procedure of the history monitoring switch data creation process will be described below with reference to the history monitoring switch data creation process flowchart and program code.

Figure 361 is a flowchart showing the steps of the history monitoring switch data creation process of this embodiment. Figure 362 is an example of program code for the history monitoring switch data creation process of this embodiment, and corresponds to the flowchart of Figure 361.

When the history monitoring switch data creation process is started, the main control MPU 1311 first sets the top address of the history area creation data (Figure 359) (step 01TKS1010). The top address of the history area creation data is set in the HL register. At this time, similar to the procedure for setting the top address of the SPI input setting data in the switch input process, by setting the difference value from the top data address of the history area creation data to the second operand of the LDT instruction and executing it, a word length of 2 bytes can be achieved instead of the original 3-byte word length instruction, making it possible to reduce the program capacity.

Next, the main control MPU 1311 sets the number of history monitoring switches ("_HIST_SW_CNT") as the number of times to repeat the history monitoring switch data creation process (step 01TKS1020). The number of history monitoring switches is stored, for example, in the B register. When the address setting of the history area creation data and the number of history monitoring switches have been completed and preparation for creating the history monitoring switch data is complete, history monitoring switch data is created for the number of history monitoring switches, and the history monitoring switch data stored in the input signal history area corresponding to each switch (input signal) is created (updated).

The main control MPU 1311 obtains the address of the area (input level data area) in which the input signal for which history monitoring switch data is to be created is stored (step 01TKS1030). Specifically, it obtains the address of the area in which the input signal is stored (input level data area, specifically "INPUT_LEV4") from the value of the history management switch input level data lower address (for example, the value of ".LOW.INPUT_LEV4") and stores it in a specified memory area (for example, a DE register).

Then, the main control MPU 1311 creates and updates history monitoring switch data based on the input level data area identified in the processing of step 01TKS1030.

First, the main control MPU 1311 obtains the switch bit number and stores it in a specified memory area (e.g., A register) (step 01TKS104). The switch bit number is set to a value in the range of 0 to 7.

Next, the main control MPU 1311 acquires the input signal for which history monitoring switch data is to be created from the bit corresponding to the switch bit number, and stores it in a specified storage area (step 01TKS1050). At this time, the specified storage area may be a register or a temporary area allocated to RAM. Since the signal value is a binary value of ON ("1") or OFF ("0"), in this embodiment, the bit information indicated by the A register among the data of the address indicated by the DE register is set to CF (carry flag). For example, in the case of a door opening information signal, the bit information (5) of "_DOOR_SW_BIT" of "INPUT_LEV5" is acquired, and if the 5th bit of "INPUT_LEV5" is "1", "1" (carry flag) is set to CF, and if it is "0", "0" is set to CF (carry flag). In this way, a series of processes from acquiring arbitrary bit information from a specific address to setting the acquired information to CF (carry flag) can be executed with one command. This configuration makes it possible to reduce the program capacity. The specific configuration will be explained further in Figure 363.

The main control MPU 1311 then sets an area (input signal history area) for storing the history monitoring switch data (step 01TKS1060) and identifies the history monitoring switch data to be updated. Specifically, the processing of step 01TKS1060 updates the contents stored in the DE register from the address of the input level data area to the address of the history monitoring switch data (history management RWM address).

The main control MPU 1311 updates the history monitoring switch data of the identified update target based on the newly acquired input signal value (step 01TKS1070). As described above, the history monitoring switch data in this embodiment is 1 byte (= 8 bits) and can store the history of 8 input signals. As a specific process for updating the history monitoring switch data, the history monitoring switch data stored in the input signal history area is shifted left by 1 bit by the ROLC command, and the value of the carry flag (CF) in which the value of the input signal acquired in the processing of step 01TKS1050 is stored is set to bit 0. By implementing in this way, it is possible to simplify the program code and suppress the increase in program capacity. In addition, the ROLC command is a word length command of 2 bytes, which is shorter in word length than when calculating the history monitoring switch data before updating, and can speed up processing.

The main control MPU 1311 executes the processes from step 01TKS1030 to step 01TKS1070 for all input signals for which history monitoring switch data is to be created (step 01TKS1080). After the history monitoring switch data has been created (the result of step 01TKS1080 is "YES"), this process ends.

By configuring it as described above, it becomes possible to create history monitoring switch data using a common procedure regardless of the type of signal, simplifying game control and reducing program capacity.

[22-3-3. History monitoring switch data creation flow (summary)]
The procedure for the history monitoring switch data creation process has been explained above, but here, the flow of data until the input signal is reflected in the history monitoring switch data will be mainly explained. Fig. 363 is a diagram for explaining the process of creating the history monitoring switch data of this embodiment, and shows the process until the touch sensor signal is reflected in the history monitoring switch data.

The top part of FIG. 363 shows a timing chart showing the change in the touch sensor signal input from the contact detection sensor (touch sensor) 509, with time passing from left to right. In this embodiment, the touch sensor signal input to the input port of the main control MPU 1311 is periodically captured at a predetermined interval. The predetermined interval (sampling period) is the timer interrupt period (4 milliseconds). In FIG. 363, the touch sensor signal is captured in the order of "1" → "1" → "1" → "0" → "1" → "1" → "1" → "1", showing the state in which a new touch sensor signal "1" has been captured. The captured touch sensor signal is converted as necessary and stored in BIT2 of the input level data area "INPUT_LEV4" (address "000Ch") as shown in FIG. 360.

When the switch-related control process (history monitoring switch data creation process) is executed and the history monitoring switch data of the touch sensor signal is updated, first the input level data stored in the input level data area "INPUT_LEV4" is obtained as the history management switch input level data. Before the update, the history management switch input level data is "0000110", and since the switch bit number corresponding to the touch sensor signal is "2" (Figure 359), the input signal "1" stored in BIT2 is obtained and temporarily stored in the carry flag.

The program code for retrieving the value of the bit specified in the switch bit number from the referenced input level area can be realized with a single instruction, "LD CF, (DE).A", as shown in Figure 362. The DE register stores the address of the referenced input level area, and the A register stores the value corresponding to the switch bit number. The above instruction stores the value retrieved from the value stored in the input level area indicated by the DE register based on the value specified in the A register in the carry flag (CF).

Furthermore, the history monitoring switch data is obtained based on the lower address (history management RWM lower address) of the history monitoring switch data storage destination (HS_TCH_HIST) of the history area creation data of the touch sensor signal. The history monitoring switch data stores input signals in reverse chronological order from BIT0 to BIT7, and the history monitoring switch data storage destination is "11101111" based on the timing chart above.

To update the history monitoring switch data, the values from BIT0 to BIT6 are shifted to BIT1 to BIT7. Furthermore, the input signal stored in the carry flag is stored in BIT0. As shown in FIG. 362, the program code for updating the history monitoring switch data can be realized with a single instruction, "ROLC (DE)". The ROLC instruction shifts (rotates) the specified value one bit to the left and stores the value of the carry flag (CF) in BIT0. The SLA instruction (shift instruction) may be used instead of the ROLC instruction. By executing the "ROLC (DE)" instruction, the new history monitoring switch data shifted one bit to the left is updated to the value of the history management RWM address indicated by the DE register.

[22-4. Switch history command transmission determination process]
When the process of prohibiting the winning ball from the non-operated large winning port is completed, the main control MPU 1311 executes the switch history command transmission judgment process (step 01TKS0140). As described above, in the switch history command transmission judgment process, it is judged whether or not to transmit a command based on the switch history command transmission judgment data and the history monitoring switch data created in the history monitoring switch data creation process, and the command defined according to the judgment result is transmitted.

The decision as to whether or not to send a command is made by detecting a change in the input signal from the history monitoring switch data, and if a change is detected, it is decided to send the corresponding command. For example, the history monitoring switch data in this embodiment stores a predetermined number of input signal histories (eight in this embodiment), so that it is possible to decide that the input signal has changed if the value of the previously input signal differs from the value of the most recent input signal.

Below, we will explain the configuration for determining whether to send a command based on the history monitoring switch data. First, we will explain the data structure of the switch history command transmission determination data for general-purpose processing of multiple types of input signals, and then we will explain specific switch history command transmission determination data. Next, we will explain the detailed procedure with reference to the flowchart and program code of the switch history command transmission determination process.

[22-4-1. Configuration of switch history command transmission determination data]
364 is a diagram for explaining the data structure of the switch history command transmission judgment data in this embodiment. As described above, in this embodiment, in order to judge whether or not to transmit a command based on an input signal by a common process for a plurality of types of input signals, judgment data (command transmission judgment target data) is defined in a common data structure for each command to be transmitted.

The individual data of the command transmission judgment target data is composed of the detection target history monitoring switch data address (lower address), the transmission command value, the detection mask value, and the detection judgment value. In addition, the number of data for one set (one block) of switch history command transmission judgment data (the number of data in one block of switch input data) is defined, and in this embodiment, the number of data in one block of switch input data is 5. In addition, the number of command transmission judgment targets m, which is the total number of defined switch history command transmission judgment data, is defined. Note that the setting order of each data is not limited to this. For example, the number of command transmission judgment targets m may be defined at the beginning of the switch history command transmission judgment data, and the order of the individual data of the command transmission judgment target data does not have to be the same as the example described above.

The detection target history monitoring switch data address is the address of the area in which the history monitoring switch data created by the history monitoring switch data creation process is stored. The upper addresses of the area in which the monitoring switch data is stored are specified in advance, so only the lower addresses need to be specified. This makes it possible to reduce the required area (capacity) to 1 byte. The send command value is a value corresponding to the command to be sent, and is composed of 2 bytes. This is because the packet that sends the command is 2 bytes; if the packet that sends the command is 3 bytes, it is updated to 3 bytes, and a different size is set according to the command size of one packet.

The detection mask value is a value for extracting data required to determine whether or not to send a command from the history monitoring switch data. Bits required to determine whether or not to send a command are set to "1", and unused bits are set to "0". The detection judgment value is data for determining whether or not to send a command created from the transmission command value by comparing it with the masked history monitoring switch data.

Next, a specific example of the switch history command transmission judgment data will be described. FIG. 365 is a diagram showing an example of the switch history command transmission judgment data of this embodiment. The objects for which it is determined whether or not to transmit a command based on the history monitoring switch data include the ON/OFF switching judgment of the contact detection sensor (touch sensor, handle sensor) 509 that detects whether or not the palm or fingers are touching the handle lever 504, the ON/OFF switching of the firing stop switch, and the switching of the door opening/closing. First, the switch history command transmission judgment data for determining the ON/OFF switching of the contact detection sensor 509 of the handle lever 504 will be described.

The switch history command transmission determination data for the contact detection sensor 509 of the handle lever 504 includes data that detects the contact detection sensor 509 switching from OFF to ON and data that detects the contact detection sensor 509 switching from ON to OFF.

The detection target history monitoring switch data address references the same area whether detecting a switch from ON to OFF or OFF to ON, so the same address (".LOW.HS_TCH_HIST") is set.

The transmission command value is defined to correspond to each of the rising edge (switching from ON to OFF) and falling edge (switching from ON to OFF) of the contact detection sensor (handle sensor) 509.

The signal change of the contact detection sensor (handle sensor) 509 is detected by comparing the latest four historical data (signal values). Therefore, the detection mask value is set to "00001111B" to identify the latest four bits of data. Note that the same value is set for both ON to OFF switching and OFF to ON switching, as the target bits are the same.

The contact detection sensor (handle sensor) 509 is determined to have changed from OFF to ON when the signal value switches from OFF to ON and then remains ON three times in a row. In this case, the detection judgment value is "00000111B". The first four bits ("0000B") are masked by the detection mask value, so when the latter four bits ("0111B") match, it is determined that the contact detection sensor (handle sensor) 509 has changed from OFF to ON. Similarly, the contact detection sensor is determined to have changed from ON to OFF when the signal value switches from ON to OFF and then remains OFF three times in a row, so the detection judgment value is "00001000B". Note that the detection judgment value is not limited to the example shown in FIG. 365. For example, it may be determined that the contact detection sensor has changed from ON to OFF when the signal value switches from ON to OFF and then remains OFF two times in a row.

The number of data in one block of switch input data (_SW_HIST_1BLOCK) is defined between the switch history command transmission judgment data that detects the switching of the contact detection sensor (steering wheel sensor) 509 from OFF to ON and the switch history command transmission judgment data that detects the switching from ON to OFF. The number of data in one block of switch input data is calculated by setting the difference from the first address to the last address of the switch history command transmission judgment data that detects the switching of the contact detection sensor (steering wheel sensor) 509 from OFF to ON. In this embodiment, the number of data in one block of switch input data is 5 (bytes).

Next, we will explain the switch history command transmission determination data for determining the ON/OFF switching of the firing stop switch of the handle lever 504. The switch history command transmission determination data for the firing stop switch includes data for detecting switching from OFF to ON and data for detecting switching from ON to OFF, similar to the contact detection sensor 509.

The detection target history monitoring switch data address is set to the same address (".LOW.HS_STP_HIST") because it references the same area whether detecting a switch from ON to OFF or from OFF to ON. The transmission command value is defined to correspond to the rising edge (switch from ON to OFF) and falling edge (switch from ON to OFF) of the launch stop switch.

Signal changes of the firing stop switch are detected by comparing the latest four historical data (signal values) in the same way as the contact detection sensor 509. The detection mask value and detection judgment value are the same as those of the contact detection sensor 509, and the judgment of the signal change is also the same.

Finally, we will explain the switch history command transmission determination data for determining the ON/OFF switching of the door open information signal. The switch history command transmission determination data for the door open information signal includes data that detects the switching from OFF to ON and data that detects the switching from ON to OFF, similar to the contact detection sensor 509.

The detection target history monitoring switch data address is set to the same address (".LOW.DOOR_SW_HIST") because it references the same area whether detecting a switch from ON to OFF or from OFF to ON. The transmission command value is defined to correspond to the rising edge (switch from ON to OFF) and falling edge (switch from ON to OFF) of the door open information signal.

Unlike the contact detection sensor 509 or the launch stop switch, signal changes in the door open information signal are detected by comparing the two most recent historical data (signal values). In other words, a signal change is determined to have occurred when a signal different from the previous signal is received. The detection mask value is set to "00000011B" since it specifies the most recent two bits of data. Furthermore, the detection judgment value for determining a switch from ON to OFF is "00000001B", and the detection judgment value for determining a switch from OFF to ON is "00000010B".

The history data to be judged is not limited to that shown in the figure. For example, the signal change of the contact detection sensor 509 may be judged using two sets of history data, or it may be four or more sets (e.g., eight sets) taking into account the effects of noise, etc. If eight sets of data are used, all bits are masked at a fixed value, making it possible to precisely detect signal changes of a specific pattern. Furthermore, when comparing the most recent four sets of history data, the lower four bits are masked at a fixed value, but it is also possible to mask at the upper four bits at a fixed value. By configuring in this way, a predetermined time interval can be set before the processing to be executed is started after the detection of a signal change.

Note that, although the switch history command transmission determination data is defined for signal changes of the contact detection sensor 509, the launch stop switch, and the door open information signal from ON to OFF and from OFF to ON, switch history command transmission determination data may be defined to detect only one of the changes. For example, when performing a fixed period of notification, the notification will end after the fixed period has elapsed regardless of the signal change, so it is sufficient to send a notification command only when there is a change from OFF to ON.

Furthermore, the number of command transmission judgment targets is defined at the end of the switch history command transmission judgment data. The number of command transmission judgment targets is calculated by dividing the difference between the first address and the last data address of the area in which the switch history command transmission judgment data is defined by the number of data in one block of switch input data. By calculating the number of data in one block of switch input data and the number of command transmission judgment targets from the addresses of the defined data, it is possible to minimize modifications to the program code even if the data structure or number of data changes.

If the data structure or number of data does not change, a numerical value may be defined directly at the beginning of the switch history command transmission judgment data in advance. Furthermore, without defining the number of command transmission judgment targets, control may be performed so that the switch history command transmission judgment process ends when the final data of the switch history command transmission judgment data is detected.

In addition, the switch history command transmission judgment data of this embodiment targets signals that perform input processing as history information (history monitoring switch data) such as touch sensor signals, but it can also be applied to signals that are judged based on edge information such as winning signals. It can also be applied to cases where the target is the winning judgment of a start winning port (for example, a middle starting port switch). Below, application examples are explained with reference to the figures.

Figure 366 is a diagram showing an example of applying the switch history command transmission judgment data of this embodiment to a switch that processes an input signal as edge information. The area that stores the input signal of the middle start port switch is BIT0 of input edge data 1 "INPUT_EDG1" (Figure 360). Therefore, the lower address of "INPUT_EDG1" ("LOW.INPUT_EDG_1") is set as the address of the area that stores the input signal. In this case, by setting the detection mask value to "00000001B", the input signal of the middle start port switch corresponding to BIT0 becomes the judgment target. By setting the detection judgment value to "00000001B", a command ("_SID_ON_CM") defined as the transmission command value is sent when BIT0 of input edge data 1 is "1".

By configuring it as described above, it is possible to send commands in the same procedure not only to input signals that are managed as history information (history monitoring switch data), but also to input signals that are processed as edge information, making it possible to standardize processing, improve development efficiency, and reduce program size.

[22-4-2. Switch history command transmission determination process procedure]
In the switch history command transmission determination process, a signal change is detected from the history monitoring switch data based on the information defined in the switch history command transmission determination data. The procedure for detecting a signal change will be described below with reference to the flowchart and program code of the history command transmission determination process.

Figure 367 is a flowchart showing the steps of the history command transmission determination process of this embodiment. Figure 368 is an example of program code for the history command transmission determination process of this embodiment, and corresponds to the flowchart of Figure 367.

When the switch history command transmission determination process starts, the main control MPU 1311 first sets the starting address of the switch history command transmission determination data (Figure 365) (step 01TKS2010). The starting address of the switch history command transmission determination data is set in the DE register.

Next, the main control MPU 1311 sets the number of command transmission judgment targets ("_SW_HIST_ALLBLOCK") as the number of times to repeat the switch history command transmission judgment process (step 01TKS2020). The number of command transmission judgment targets is set in the B register. When the setting of the switch history command transmission judgment data address and the setting of the number of command transmission judgment targets are completed, the history monitoring switch data to be detected is obtained and a judgment is made as to whether or not to send a command.

The main control MPU 1311 first obtains the history monitoring switch data to be detected (step 01TKS2030). Specifically, it obtains the address of the history monitoring switch data to be detected from the switch history command transmission determination data, identifies the history monitoring switch data to be detected, and stores it in the W register.

Next, the main control MPU 1311 obtains the transmission command value from the switch history command transmission determination data (step 01TKS2040). The transmission command value is 2 bytes and is stored in the HL register.

Then, the main control MPU 1311 determines whether the signal value of the switch has changed based on the history monitoring switch data acquired in the processing of step 01TKS2030 (step 01TKS2050). Specifically, first, the acquired history monitoring switch data is masked with a detection mask value (step 01TKS2050-1). Furthermore, by comparing it with the detection judgment value (step 01TKS2050-2), it is determined that the signal value has changed (step 01TKS2050-3). If the masked history monitoring switch data matches the detection judgment value, it is determined that the signal value has changed.

When the main control MPU 1311 determines that the signal value has changed (the result of step 01TKS2050 is "YES"), it executes a command storage process for the transmission command value acquired in the processing of step 01TKS2040 and stored in the HL register, thereby storing the value in the transmission buffer (step 01TKS2060).

If the main control MPU 1311 determines that the signal value has not changed (the result of step 01TKS2050 is "NO"), or after executing the command storage process (step 01TKS2060), it determines whether or not the determination of all target commands has been completed (step 01TKS2070). If the determination of all commands has been completed, the history command transmission determination process ends.

By configuring as described above, the gaming machine of this embodiment can detect not only ON/OFF changes in signal values by changing the mask value or detection judgment value, but also specific change patterns by simply adding or modifying the switch history command transmission judgment data. For example, if a signal change pattern that is likely to occur when fraudulent activity is being performed or when a malfunction or abnormality such as a breakdown occurs is known, it is only necessary to set a value corresponding to this signal change pattern, and data can be easily added or deleted by simply registering the data without increasing the program capacity, thereby increasing the possibility of discovering malfunctions before they occur.

[22-5. Example of application to information stored in internal function registers (built-in registers)]
In the configuration described above, history monitoring switch data is created for signals input from various switches or sensors to the main control MPU 1311, and processing such as command transmission is performed based on the history monitoring switch data. In contrast, the history monitoring switch data creation process and switch history command transmission determination process of this embodiment can also specify an internal function register of the main control MPU 1311. Below, a description will be given of the means for applying the history monitoring switch data creation process and switch history command transmission determination process based on information stored in the internal function register.

[22-5-1. Creating History Monitoring Switch Data]
FIG. 369 is a diagram showing an example of an internal function register that stores a random number error of the main control MPU 1311 of this embodiment. In addition to general-purpose registers, the main control MPU 1311 of this embodiment can be provided with internal function registers that can store calculation results and random numbers, and store error contents during random number generation. FIG. 369 shows an example of an internal function register that stores random number errors, and an address is defined for each register. For example, a random number clock error, which indicates an error in which an abnormality has occurred in the cycle (clock) that generates random numbers, is stored in BIT2 of the register "_RDER3", and "1" is set when an error occurs. Also, the address "111Ah" is set in the register "_RDER3".

Here, the procedure for creating the history monitoring switch data of the random clock error will be described. Figure 370 is a diagram showing an example of the history area creation data of the random clock error stored in the internal function register of the main control MPU 1311 of this embodiment. Referring to Figure 370, the address of the internal function register "_RDER3" is set as the reference address instead of the lower address of the history management switch input level data. Furthermore, "_RND_CLK_ERR_BIT" is set in the corresponding switch bit number, and since the random clock error is stored in BIT2 of the register "_RDER3", the value of "_RND_CLK_ERR_BIT" is "2". Finally, the lower address of the area in which the created history monitoring switch data is stored is set. In this way, by defining the history area creation data, it is possible to create the history monitoring switch data by processing it in the same way as the signals input from various switches and sensors. In addition, it is possible to transmit the corresponding command by executing the switch history command transmission determination process based on the created history monitoring switch data. If a 2-byte value including an upper address is specified when executing the work area setting process (_WORK_AD_INC_HL; step 01TKS1030), the upper address can be set directly in the DE register without being complemented. Also, even if the upper address of the internal function register differs from the upper address of the RAM, the corresponding upper address can be complemented in the work area setting process. By configuring as described above, it is possible to create history monitoring switch data using a common process, whether it is signals input from various switches or sensors, or information stored in the internal function register. This makes it possible to consolidate the programs for creating history monitoring switch data, thereby reducing the program capacity.

[22-5-2. Command transmission without using history monitoring switch data]
Here, we will explain the switch history command transmission judgment data for executing the switch history command transmission judgment process without using the history monitoring switch data. The procedure for executing the switch history command transmission judgment process without using the history monitoring switch data is the same as the procedure for transmitting a command based on edge information such as the winning signal described above.

Figure 371 is a diagram showing an example of applying the switch history command transmission determination data of this embodiment to an internal function register (random clock error). The information to be applied is a random clock error, similar to the example of creating history monitoring switch data.

Referring to FIG. 371, the internal function register "_RDER3" that stores the random clock error state is set to correspond to the area that stores the history monitoring switch data. Furthermore, by setting the detection mask value to "00000100B", the random clock error state corresponding to BIT2 becomes the judgment target. By setting the detection judgment value to "00000100B", a command ("_RND_CLK_ERR_CM") defined as the transmission command value is sent when the random clock error state is "1 (error present)". By configuring in this way, it becomes possible to send commands in the same procedure as when history information is created without creating history information (history monitoring switch data).

As described above, this embodiment can also be applied to information stored in internal function registers, and commands can be sent based on the detection mask value and detection judgment value using common processing, whether the information is signals input from various switches or sensors or information stored in internal function registers. This makes it possible to consolidate programs for sending commands, just as in the case of creating history monitoring switch data, and reduces program capacity.

In addition, according to this embodiment, it is also possible to select history monitoring switch data according to the type of information or command to be judged. For example, when a game is to be stopped immediately when a random clock is generated, a configuration is made in which a command is sent by directly referencing the value of a register without referencing the history monitoring switch data corresponding to the random clock anomaly (data configuration of FIG. 371), and then, when a random clock error continues for a predetermined period, history monitoring switch data corresponding to the random clock anomaly is created, and the history monitoring switch data corresponding to the random clock anomaly is used as a reference address as switch history command transmission judgment data, and a command when the random anomaly continues, and a detection mask value (00011111b) and a detection judgment value (00011111b) for the predetermined period may be set.

The reason for dividing it into two stages in this way is to assume that the bit information on the random number clock abnormality in the built-in register may be mistakenly determined to be abnormal due to the influence of external noise, etc., even though the random number clock is not abnormal, and this is provided as an insurance measure to see if this continues for a specified period of time.

When issuing a command when the random clock anomaly is cleared, the history monitoring switch data corresponding to the random clock anomaly may be used as a reference address as switch history command transmission judgment data for determining when the random clock anomaly is cleared, and a command when the random clock anomaly is cleared, a detection mask value (e.g., "0001111b") for a specified period, and a detection judgment value (e.g., "00001000b") may be set.

The same applies to various switches and sensors, where whether or not to create history monitoring switch data is switched depending on the application. By defining switch history command transmission determination data, whether a command transmission is determined based on history monitoring switch data or without creating history monitoring switch data, the switch history command transmission determination process can be a common process, making it possible to share programs and reduce program capacity.

[22-6. Switch pass command transmission/safe switch abnormality judgment process]
When the switch history command transmission judgment process is completed, the main control MPU 1311 executes the switch pass command transmission/safe switch abnormality judgment process (step 01TKS0150). As described above, in the switch pass command transmission/safe switch abnormality judgment process, when a win is detected, a command is transmitted based on the switch pass command data and the number of safe balls (safe judgment count value) is counted.

The switch pass command data and the switch pass command transmission/safe switch abnormality determination process are explained below. First, the data structure of the switch pass command data that enables general processing for winning (signals from the switch/sensor that detects winning) at multiple types of winning ports (starting ports) is explained, and then specific switch pass command data is explained. Next, detailed procedures are explained with reference to the flowchart and program code of the switch pass command transmission/safe switch abnormality determination process.

[22-6-1. Configuration of switch passing command data]
372 is a diagram for explaining the data structure of the switch passing command data in this embodiment. As described above, in this embodiment, in order to universally process winnings in multiple types of winning ports, the switch passing command data is defined in a common data structure for each winning port (switch).

The switch pass command data first defines the number of data settings (the number of winning slots (switches) for which the switch pass command data is defined). Next, individual data for each winning slot is defined for each input edge. The individual data for each winning slot is made up of edge data reference information, a command value, and a safe count number. The number of data settings is the number of blocks when the individual data for each winning slot is considered to be one block.

The edge data reference information stores information indicating the reference of the input edge data of the switch/sensor that detects a win. The edge data reference information includes an identifier of the storage area for the input edge data and bit information within the input edge data of the switch that is being referenced.

The command value is the value of the command to be sent when a win is detected (when the switch is judged to be ON). The command value consists of two bytes, and is stored in the transmission buffer by the command storage process.

The safe count number is defined by a counter corresponding to the winning port (switch) that detects a winning and a value that increases or decreases the counter. For example, when a game ball wins a general winning port, the safe judgment count value (number of safe balls) is increased. On the other hand, when a safe switch (a switch installed at a place (safe port) where a game ball is collected after winning a winning port with a prize ball) detects the passage of a game ball, the safe judgment count value is decreased. Since a game ball that passes through a winning port with a prize ball also passes through a safe port, the safe judgment count value is 0 under normal conditions. Therefore, taking into account measurement errors, etc., if the safe judgment count value is greater than the upper threshold value (e.g., 100) or less than the lower threshold value (e.g., -100), it can be determined that there is a high possibility that some abnormality has occurred. Note that when a game ball passes through a winning port or gate that does not generate a winning ball, a safe count number that does not increase or decrease the safe judgment count value is set. In addition, the upper threshold value and the lower threshold value are not limited to the above-mentioned example, and appropriate values are set according to the structure of the gaming machine and the content of the game.

Next, a specific example of switch passing command data will be described. Figure 373 is a diagram showing an example of switch passing command data in this embodiment. In the switch passing command data, the number of data settings is first defined, and then the individual data for each winning slot is defined. As mentioned above, the number of data settings is the total number of individual data for each defined winning slot, but in this embodiment, it is calculated based on the address of the label indicating the end of the switch passing command data and the capacity of the data that constitutes the individual data for each winning slot.

Regarding the individual data for each winning slot, taking the middle start slot (start slot 1) as an example, the edge data reference information is stored in the bit ("_TSHID1_BIT") corresponding to start slot 1 of input edge data 1 ("_SWCM_P1"). The value indicating the input edge data corresponds to the upper 4 bits, and the bit data corresponding to the start slot corresponds to the lower 4 bits. In this embodiment, a value indicating the input edge data (e.g., corresponding to "_SWCM_P1") is extracted by performing a specified calculation on the edge data reference information, and the input edge data (e.g., input edge data 1 ("INPUT_EDG1") is identified from the switch address data "SW_ADD_W" (Figure 372B) based on the extracted value.

Here, the configuration of the switch address data "SW_ADD_W" will be explained, and the procedure for identifying the input edge data will also be explained. Figure 374 is a diagram showing an example of switch address data in this embodiment. The switch address data defines information for identifying the input edge data (for example, "_SWCM_P1") and the corresponding input edge data (for example, input edge data 1 ("INPUT_EDG1")). Referring to Figure 374, "00h" is set in "_SWCM_P1", and "08h" is set in _SWCM_P2. "_SWCM_P3" and "_SWCM_P4" are reserved for cases in which the number of target switches increases.

Next, the procedure for identifying input edge data will be explained using a safe switch as an example. The step numbers in the following explanation correspond to the step numbers in the program code in Figure 377 (the process of acquiring data for the target bit).

As a specific procedure, first, the edge data reference information is obtained (step 01TKS3040-3). At this time, the edge data reference information is "_SWCM_P2 (08h) + _EX_SAFE_SW_BIT (06h)", which is "0Eh (14)". Next, a predetermined calculation is performed on the edge data reference information. Specifically, it is divided by 8 (step 01TKS3040-4), and the division result (excluding the remainder) is multiplied by two (step 01TKS3040-5). Furthermore, the obtained value is added to the top address "9138h" of the switch address data stored in the HL register (step 01TKS3040-6). In the case of a safe switch, the calculation result is "2", so the value of the HL address is "913Ah". By referring to the address "913Ah", the input edge data 2 ("INPUT_EDG2") can be identified.

By configuring it as described above, it is possible to implement the edge data reference information in one byte, thereby reducing the data capacity. Note that, as shown in FIG. 375, the edge data reference information may be defined by separately defining the input edge data area and the corresponding bit. By configuring it in this way, it becomes easier for the developer to understand the edge data reference from the program code, improving the readability of the program, but the capacity per individual data item increases by one byte, and the capacity increases by the number of data settings.

The command value is defined as a value corresponding to the command that is sent when the edge data reference information is set to ON. The command value is composed of 2 bytes. The command value for the middle start gate switch is set to the start gate 1 command ("_SID1_ON_CM"), and when the edge data reference information is set to ON, the start gate 1 command is sent. On the other hand, the command value for the right large prize gate count switch is set to "no command" ("_NO_CM"), and no command is sent even if a game ball enters the right large prize gate.

In this embodiment, by allowing the command value to be set to "no command" ("_NO_CM"), it is possible to have a common data structure even when no command is sent when a prize is won. By configuring it in this way, it is possible to standardize processing such as data retrieval and calculations regardless of whether or not a command is sent when a prize is won, simplifying control.

In addition, by defining the command value "_NO_CM" to "0", which indicates that a command will not be sent, the Z flag is set to "1" when the command value is set in the HL register ("LD HL, (DE+)"; step 01TKS3050). This makes it possible to execute condition judgments and processes, specifically, to judge whether to send a command ("NZ" (true if the Z flag is not "1", i.e., if the command value is not "_NO_CM"); step 01TKS3070) and send a command (execution of the command store process "COM_SET"; step 01TKS3080) with a single command ("INV NZ, COMSET"). This configuration allows generalization of the process related to sending commands when a prize is won.

The safe count number of the inside start switch is set to a value indicating that it is added to the safe judgment count value (a count to add when passing through the winning gate; "_INC_SAFE_CNT"; "1 (01h)") because a prize ball is paid out when a prize is won. Also, as mentioned above, the safe count number of the safe switch is set to a value indicating that it is subtracted from the safe judgment count value (a count to subtract when passing through the winning gate; "_DEC_SAFE_CNT"; "-1 (FFh)"). Furthermore, if the game ball does not win and is discharged from the out gate, the safe count number of the out switch is set to a non-increment count when passing through the switch ("_NON_SAFE_CNT"; "0 (00h)"), and is not added to or subtracted from the safe judgment count value. Also, the safe judgment count value can be updated by adding the defined safe count number whether it is added, subtracted, or not updated, so it can be implemented with a common command, simplifying the program structure.

[22-6-2. Switch Passing Command Transmission Processing Procedure]
The switch pass command transmission/safety switch abnormality determination process is configured to call the safe switch abnormality determination process in a state where the switch (winning port) to be processed is specified when the switch pass command transmission process is executed. First, the switch pass command transmission process will be described, followed by the safe switch abnormality determination process.

Figure 376 is a flowchart showing the steps of the switch passing command transmission process of this embodiment. Figure 377 is an example of program code for the switch passing command transmission process of this embodiment, which corresponds to the flowchart of Figure 376.

The switch pass command sending process identifies the switch (winning slot) to which the command is to be sent based on the edge data reference information in the switch pass command data, and sends the specified command when the switch signal value is ON.

When the switch passing command transmission/safe switch abnormality judgment process is started, the main control MPU 1311 first obtains the current safe judgment count value (step 01TKS3010). The safe judgment count value is stored in the C register. Next, the main control MPU 1311 sets the top address of the switch passing command data (Figure 373) (step 01TKS3020). The top address of the switch passing command data is set in the DE register. Furthermore, the main control MPU 1311 obtains the number of data settings (step 01TKS3030). The number of data settings is stored in the B register. When the process of step 01TKS3030 is completed, the command transmission judgment and safe switch abnormality judgment process are executed for each switch.

Next, the main control MPU 1311 identifies the switch to be processed and obtains the signal value (target bit) of the identified switch (step 01TKS3040). Specifically, first, a switch address data table is set. The switch address data table stores data for identifying input edge data that includes the target bit, and the address of the input edge data can be obtained. Furthermore, edge data reference information is obtained from the switch passing command data. Finally, the value of the target bit is identified based on the edge data reference information and the switch address data table, and the target bit information ("0" or "1") is stored in a specified area (carry flag; CF).

Specifically, the edge data reference information obtained from the switch passing command data is set in the A register (steps 01TKS3040-1 to 3), and the calculation shown in the program code is performed (steps 01TKS3040-4 to 6). This causes a value indicating the input edge data (e.g., "_SWCM_P1") to be extracted. The address obtained by adding the extracted value to the top address of the switch address data table "SW_ADD_W" defines the address of the input edge data corresponding to the edge data reference information (e.g., "INPUT_EDG1"). The input edge data (address) is identified, and the address of the identified input edge data is stored in the HL register (step 01TKS3040-7).

The "LD CF, (HL).A" command obtains the contents specified by the lower 3 bits of the A register from the value stored in the HL register. The address of the specified input edge data is stored in the HL register, and the edge data reference information is stored in the A register as described above, with the lower 4 bits of the edge data reference information being bit data corresponding to the start port to be judged. Since the value of the target bit ranges from 0 to 7, if the value of the lower 3 bits is specified, the specified bit data can be obtained from the input edge data specified by the "LD CF, (HL).A" command and set to CF (carry flag). By configuring in this way, it is possible to realize information specifying the input edge data and information specifying the bit corresponding to the start port to be judged in one byte. Furthermore, when the input edge data and the corresponding bit are specified, a series of processes from obtaining the specified bit information from the input edge data to setting the obtained information to CF (carry flag) can be executed with one command, thereby reducing the program capacity.

Then, the main control MPU 1311 obtains the command value from the switch passing command data (step 01TKS3050). It then determines whether the value of the target bit is ON (step 01TKS3060).

If the value of the target bit is ON (the result of step 01TKS3060 is "YES"), the main control MPU 1311 executes a command storage process (step 01TKS3080) unless the command value is "no command" ("_NO_CM"). By executing the command storage process, the command is stored in the transmission buffer. After that, the main control MPU 1311 executes a safe switch abnormality determination process (step 01TKS3090). The safe switch abnormality determination process will be described later in Figures 378 and 379.

In this embodiment, the determination of the target command value and the execution of the command storage process are realized by one instruction. In the processing of step 01TKS3050, when the command value is loaded into the HL register by the "LD HL, (DE+)" instruction, if there is no command to send, the command value "_NON_CM" is set. The command value "_NON_CM" is "0", and if there is a command to send, a value other than "0" is set. Therefore, if a command is to be sent, the Z flag is set to "1", and if no command is to be sent, "0" is set. At this time, the "INV NZ, COM_SET" instruction determines whether or not to send a command based on the Z flag, and if a command is to be sent, a series of processes to execute the command storage process ("COM_SET") are realized by one instruction. This makes it possible to reduce the program capacity without the need to execute the determination of whether or not to send a command and the process corresponding to the determination result (command storage process) by separate instructions.

After the safe switch abnormality determination process is executed, or if the value of the target bit is not ON (OFF) (the result of step 01TKS3060 is "NO"), the main control MPU 1311 determines whether or not processing has been completed for all switches (step 01TKS3100). If processing has not been completed for all switches (the result of step 01TKS3100 is "NO"), processing is executed for the next switch from step 01TKS3040. If processing has been completed for all switches (the result of step 01TKS3100 is "YES"), this process ends.

[22-5-3. Procedure for safe switch abnormality determination process]
Fig. 378 is a flowchart showing the procedure of the safe switch abnormality determination process of this embodiment. Fig. 379 is an example of program code of the safe switch abnormality determination process of this embodiment, and corresponds to the flowchart of Fig. 378.

The safe switch abnormality determination process updates the safe determination count value for the switch (winning port) identified in the switch pass command transmission process based on the edge data reference information of the switch pass command data, and determines whether an abnormality such as an illegal win has occurred.

When the safe switch abnormality judgment process is started, the main control MPU 1311 first adds the safe count number obtained from the switch passing command data to the safe judgment count value stored in the C register (step 01TKS4010). Next, it stores the updated safe judgment count value in the total safe judgment count area (step 01TKS4020).

Three types of safe counts are defined in this embodiment, and as described above, there are cases where 1 is added ("_INC_SAFE_CNT"; "1 (01h)"), 1 is subtracted ("_DEC_SAFE_CNT"; "-1 (FFh)"), and neither addition nor subtraction ("_NON_SAFE_CNT"; "0 (00h)"). When 1 is added, it is when a prize ball is generated by winning. When 1 is subtracted, as described above, it is when a game ball is detected by the safe switch. When neither addition nor subtraction is performed, it is when a switch that does not generate a prize ball (for example, a normal gate) detects a winning (passage). In addition, the safe judgment count value can be updated by adding the defined safe count number whether it is added, subtracted, or not updated, so it can be implemented with a common command whether it is added, subtracted, or not updated, which makes program development more efficient and reduces capacity.

When the safe judgment count value is updated and stored in a specified area, it is determined whether the safe judgment count value is within the normal range (whether it is an abnormal value) (step 01TKS4030). Specifically, the main control MPU 1311 first compares the safe judgment count value stored in the C register with the lower threshold value ("_ILG_SAFE_JDG1") (step 01TKS4030-1). If the safe judgment count value is equal to or greater than the lower threshold value (and equal to or less than 0) (the result of step 01TKS4030 is "NO"), the safe judgment count value is normal and this process is terminated.

If the safe judgment count value is equal to or less than the lower threshold value, or equal to or greater than the lower threshold value and greater than 0, the main control MPU 1311 compares the safe judgment count value with the upper limit value (step 01TKS4030-2). If the safe judgment count value is equal to or less than the upper limit value (and greater than or equal to 0) (the result of step 01TKS4040 is "YES"), the safe judgment count value is normal and this process is terminated.

If the safe judgment count value is abnormal, that is, if the safe judgment count value is less than the lower threshold or greater than the upper threshold (the result of step 01TKS4030 is "NO"), the main control MPU 1311 sets the game stop cause number to the game stop setting data when the safe switch is abnormal (step 01TKS4040). Furthermore, the safe judgment count value is cleared (step 01TKS4050). The safe judgment count value is cleared by storing "00H" in all safe judgment count areas (step 01TKS4050-1) and clearing the C register (step 01TKS4050-2).

By configuring it as described above, the gaming machine of this embodiment can handle different control for each winning slot with a common process, making it possible to simplify the program code. In addition, by adding and modifying the switch passing command data, it is possible to easily respond to changes in the specifications of the gaming machine, improving the development efficiency of the gaming machine.

Note that, when the program code shown in the drawings executes processing, values are stored in various registers, but this is only an example, and the registers in which values are stored are not limited to those shown in the drawings, and values may be stored in any register.

In this specification, the following are examples of inventions from representative viewpoints, including the inventions described in the claims.

(1) A gaming machine having a game control means for controlling the progress of a game,
The game control means includes:
A calculation means for executing a program for controlling the progress of the game;
an input signal storage means capable of storing an input signal input to the calculation means;
a history information creating means for periodically acquiring an input signal from the input signal storage means, and for creating input signal history information in which the input signals are arranged in chronological order based on history information creating data defined for each type of the input signal;
a history information storage means capable of storing the input signal history information;
Equipped with
The history information creation data is
First information indicating an area in which the input signal is stored;
second information indicating an area for storing input signal history information corresponding to the input signal;
Including,
The history information creation means acquires an input signal from the input signal storage means based on the first information regardless of the type of the input signal, creates the input signal history information from the acquired input signal, and stores the created input signal history information in the history information storage means based on the second information.

(2) A gaming machine having a game control means for controlling the progress of a game,
The game control means includes:
A calculation means for executing a program for controlling the progress of the game;
an input signal storage means capable of storing an input signal input to the calculation means;
a history information creating means for periodically acquiring an input signal from the input signal storage means, and for creating input signal history information in which the input signals are arranged in chronological order based on history information creating data defined for each type of the input signal;
a history information storage means capable of storing the input signal history information;
Equipped with
The history information creation data is
First information capable of identifying the input signal storage means, the first information indicating an area in which the input signal is stored;
second information capable of identifying the history information storage means, the history information storage means indicating an area for storing the input signal history information corresponding to the input signal;
third information for specifying a position of the input signal to be acquired from the input signal storage means specified by the first information;
Including,
The history information creating means
a method for determining whether or not an input signal is to be acquired from the input signal storage means based on the first information and the third information, the method for determining whether or not an input signal is to be acquired from the input signal storage means based on the first information and the third information, the method for determining whether or not an input signal is to be acquired from the input signal storage means based on the second information, the method for determining whether or not an input signal is to be acquired from the input signal storage means based on the second information,
A gaming machine characterized in that the input signal history information can be created by common processing regardless of the type of the input signal.

In the gaming machines of (1) and (2), it is possible to create history information in which signals input from various switches and sensors provided in the gaming machine to the calculation means (main control MPU 1311) are arranged in chronological order. In this case, even if the type of input signal differs, a series of processes such as obtaining the input signal and creating and storing the history information can be realized by a common process, so that the program structure can be simplified and the program capacity can be reduced.

(3) A gaming machine having a game control means for controlling the progress of a game,
The game control means includes:
A calculation means for executing a program for controlling the progress of the game;
an input information storage means capable of storing a plurality of types of input information inputted to the calculation means;
an input information determination means for determining a pattern of the input information based on input information determination data corresponding to the input information;
Equipped with
The input information determination data is
First information capable of identifying the input information storage means, the first information indicating an area in which the input information is stored;
Second information that specifies a range for determining a pattern of the input information;
Third information for determining a pattern of the input information;
Including,
The input information determination means
acquiring the input information from the input information storage means identified based on the first information, extracting input information that falls within the range identified based on the second information from the acquired input information, and determining a pattern of the extracted input information based on the third information;
A gaming machine capable of determining a pattern of the input information through a common process regardless of the type of the input information.

In the gaming machine of (3), the present invention is not limited to input information, and can also be applied to information stored in a specified storage means in chronological order, such as values extracted periodically or results of periodically executing a specified calculation. It can also be applied to comparing patterns of combinations of multiple related pieces of information. According to the gaming machine of (3), it is possible to detect abnormalities early by determining whether changes in continuously accumulated information match a specific pattern. Furthermore, since a pattern of information changes through common processing can be identified, it is possible to simplify game control and reduce program capacity.

(4) further comprising a command transmission means capable of transmitting a command for controlling the game;
the input information determination data further includes fourth information corresponding to a command based on a pattern of the input information,
The command transmitting means transmits a command corresponding to the fourth information based on a result of determining a pattern of the input information.

In the gaming machine (4), in addition to the configuration of the gaming machine (3), it is possible to transmit commands according to the pattern of input information. For example, by detecting a pattern when an abnormality occurs, it becomes possible to transmit a command for announcing an abnormality.

(5) A gaming machine having a game control means for controlling the progress of a game,
The game control means includes:
A calculation means for executing a program for controlling the progress of the game;
a processing information storage means capable of storing a plurality of types of processing information that can be processed by the calculation means;
a processing information determination means for determining a change in the processing information based on processing information determination data corresponding to the processing information;
Equipped with
the processing information storage means includes an internal storage means provided in the calculation means and an external storage means from which processing information can be read and written by the calculation means;
The processing information determination data is
First information capable of identifying the processing information storage means, the first information indicating an area in which the processing information is stored;
Second information specifying a range for determining a change in the processing information;
Third information for determining a change in the processing information;
Including,
The processing information determination means
acquiring the processing information from the processing information storage means identified based on the first information, extracting processing information that falls within a range identified based on the second information from the acquired processing information, and determining a change in the extracted processing information based on the third information;
A gaming machine characterized in that a change in the extracted processing information can be determined by a common process regardless of whether the processing information is stored in the processing information storage means, the internal storage means or the external storage means.

In the gaming machine of (5), the same effect as the gaming machine of (3) can be obtained, and a pattern in which the processing information changes by a common process can be identified even if the processing information storage means is a different storage means. This makes it possible to determine changes in information by a common process not only for processing information stored in a general RAM, but also for processing information stored in a built-in register of a calculation means such as the main control MPU 1311. Therefore, even if the storage means is changed due to a change in the specifications of the gaming machine, it can be dealt with simply by updating the processing information determination data, improving the development efficiency of the gaming machine. Because the storage means hardware that constitutes the system simplifies the gaming control and reduces the program capacity.

(6) a plurality of game medium receiving means capable of receiving game media;
a game medium detection means for detecting that the game medium receiving means has received the game medium;
a game medium counting means for individually counting the number of game media detected by the game medium detection means;
A gaming machine comprising:
the game medium counting means is capable of counting the game media based on winning detection data corresponding to the game medium receiving means;
The winning detection data is
First information indicating a storage location of the detection information of the game medium;
Second information for performing counting based on detection of the gaming medium;
Including,
The gaming machine is characterized in that the gaming medium counting means performs a process of obtaining detection information of the gaming medium based on the first information in a common process regardless of the gaming medium receiving means that receives the gaming medium, and performs a process of counting the gaming media based on the second information in a common process regardless of the gaming medium receiving means that receives the gaming medium.

A gaming machine (6) is equipped with multiple gaming medium receiving means (e.g., a start winning slot, a large winning slot, etc.), and it is possible to detect gaming media and count the number of winning gaming media for each gaming medium receiving means through common processing. This makes it possible to standardize the programs that implement these functions, thereby realizing a reduction in program capacity. In addition, since specification changes such as an increase or decrease in the number of gaming medium receiving means can be easily accommodated by updating the winning detection data, it becomes easier to manage the configuration of the gaming machine and improves the development efficiency of gaming machines.

(7) a plurality of game medium receiving means capable of receiving game media;
a game medium detection means for detecting that the game medium receiving means has received the game medium;
a discharged game medium detection means for detecting a game medium discharged from the game medium receiving means;
a game medium counting means for individually counting the game media detected by the game medium detection means or the discharged game medium detection means;
A gaming machine comprising:
the game media counting means is capable of counting the game media based on winning detection data;
The winning detection data is
First information that can identify a storage location of the detection information of the game medium by the game medium detection means or the discharged game medium detection means;
Second information for performing counting based on detection of the gaming medium;
Including,
the game medium counting means acquires detection information of the game media based on the first information, and counts the game media based on the acquired detection information and the second information;
a process for acquiring the detection information of the game medium being a common process whether the detection information is from the game medium detection means or the ejected game medium detection means;

In the gaming machine (7), the process of acquiring detection information of the gaming medium can be performed using a common process without distinguishing between detection information by the gaming medium detection means (e.g., the start winning port switch, the big winning port switch, etc.) and detection information by the discharged gaming medium detection means (e.g., the safe port switch). This makes it possible to perform common processing to detect gaming media not only by multiple types of gaming medium detection means, but also by the discharged gaming medium detection means, and by standardizing processing such as counting, it becomes possible to reduce the program capacity.

(8) The process of counting the game media is a common process whether the detection information is from the game media detection means or the ejected game media detection means,
A gaming machine (7) that determines whether or not the acceptance of the game media by the game media accepting means is normal based on the counting results of the game media detected by the game media detection means and the counting results of the game media detected by the ejected game media detection means.

In the gaming machine of (8), the same effect as the gaming machine of (7) can be obtained, and by comparing the counting results of the gaming media detected by the gaming media detection means with the counting results of the gaming media discharged from the gaming media detection means by the discharged gaming media detection means, it is possible to detect abnormalities in the gaming media detection means or the discharged gaming media detection means. Also, by making it possible to perform counting using a common process regardless of the gaming media detection means or the discharged gaming media detection means, it is possible to reduce the program capacity.

(9) The process of counting the game media is a common process whether the detection information is from the game media detection means or the ejected game media detection means.
A gaming machine (7) in which, each time the gaming media is counted by the gaming media counting means, it is determined whether or not the reception of the gaming media by the gaming media receiving means is normal based on the counting result of the gaming media.

In the gaming machine of (9), the same effect as the gaming machine of (7) can be obtained, and also, by enabling counting with a common process without relying on the gaming medium detection means and the discharged gaming medium detection means, it is possible to reduce the program capacity. Also, by comparing the counting result of the gaming media detected by the gaming medium detection means with the counting result of the gaming media discharged from the gaming medium detection means by the discharged gaming medium detection means, it is possible to detect abnormalities in the gaming medium detection means or the discharged gaming medium detection means, and since an abnormality determination is made every time the gaming media is counted, it is possible to respond quickly when an abnormality occurs.

(10) The second information is set to a value of 1, 0, or −1,
The gaming machine of (7) wherein the counting of the gaming media is executed by a common instruction that adds the second information to the number of the gaming media.

In the gaming machine of (10), the same effect as the gaming machine of (7) can be obtained, and the variation in counting can be increased by making it possible to count the gaming media not only by adding, but also by subtracting or not calculating. For example, even for gaming media detection means that do not have prize balls, such as a normal gate, it is possible to count the number of prize balls without executing exception processing by executing a common command such as adding the value of the second information to the number of prize balls. This simplifies the program structure and improves the maintenance efficiency of the gaming control program.

[23. How to Disconnect/Reconnect Wiring]
As described above, the gaming machine of this embodiment has a setting function that can change the setting value (setting value information) that affects the operation rate (lottery probability) of the condition device. In the above example, the basic operation of the setting function was explained, and further, the control in the event of a power outage while the setting function is being executed was also explained.

Because the settings of a gaming machine affect the gaming value (profit) awarded to a player during play, if players were able to check the settings, it could interfere with fair play. Naturally, players would want to play on gaming machines with settings that are likely to give them a lot of gaming value (profit), and if the settings were checked, the operating rate of gaming machines with settings that are unlikely to give them gaming value would drop significantly. Furthermore, if it were possible to check or change the settings through fraudulent activities (so-called cheating), it is expected that there will be people who will try to do so. For example, they could try to clear the settings by cutting off the power supply to the main control board 1310, or check the settings by checking the behavior of the gaming machine when it is restarted.

In this embodiment, we propose a gaming machine that prevents unauthorized checking or changing of settings by inducing malfunctions in the gaming machine, such as by disconnecting and reconnecting the wiring connected to the main control board 1310, or by using some kind of unauthorized device to temporarily cut off the power supply while the wiring is still connected.

[23-1. Connection of various control boards]
FIG. 380 is a block diagram showing an example of a connection form of a connection line that supplies power to various boards that control the gaming machine of this embodiment. In the gaming machine of this embodiment, power is supplied to various control boards from a power supply board 931. In addition, power is supplied to each board of the main control board 1310, the peripheral control board 1510, and the payout control board 951 from the power supply board 931 through a separate system (different wiring). Therefore, even if the power supply between the main control board 1310 and the power supply board 931 is cut off (the wiring related to the power supply is cut off), the power supply to the peripheral control board 1510 and the payout control board 951 continues.

In addition, when the external power supply is cut off, such as in the event of a power outage, the main control board 1310 is supplied with power from a backup power source capable of supplying power for a predetermined period of time, and can continue to retain the information stored in the main control RAM 1312. The backup power source is, for example, an electric double layer capacitor ("capacitor"), and may be mounted on the power supply board 931 or may be mounted independently.

In addition, the various information stored in the main control RAM 1312 is completely erased (cleared) from the RAM 1312 when the RAM clear switch 954 provided on the main control board 1310 is operated when the power is turned on. The operation signal (detection signal) of the RAM clear switch 954 is also output to the dispensing control board 951.

In the gaming machine of this embodiment, a wiring for supplying normal power to the main control board 1310 and a wiring for supplying backup power to the main control board 1310 are separately provided so that the supply of backup power is not interrupted together with the normal power. As a result, even if the supply of normal power is interrupted, the supply of backup power continues, and various information stored in the main control RAM 1312 is maintained. As another example, when the supply of normal power is interrupted, the supply of backup power may also be interrupted. In this case, when the wiring connecting the backup power and the main control board 1310 is interrupted, the supply of backup power is also interrupted. Specifically, the backup power is provided on the power supply board 931, and the wiring for supplying normal power and the wiring for supplying backup power are consolidated, and when the wiring between the power supply board 931 and the main control board 1310 is physically cut or the connector connecting each board is removed and the connection is interrupted, the supply of backup power is interrupted together with the normal power.

The main control board 1310 communicates bidirectionally with the payout control board 951. For example, the main control board 1310 transmits various information related to the game (game information) and various commands related to payouts to the payout control board 951. On the other hand, the payout control board 951 transmits to the main control board 1310 response signals to commands transmitted from the main control board 1310 (for example, a payer ACK signal in response to a prize ball command) and various commands related to the status of the gaming machine. Therefore, if only the power supply to the main control board 1310 is cut off, the payout control board 951 can recognize that the power supply to the main control board 1310 has been cut off, and can report an abnormality using an error LED indicator or the like.

Furthermore, the main control board 1310 transmits various commands related to the control of game presentations executed by the main LCD display device 1600 and the like, and various commands related to the state of the pachinko machine 1, to the peripheral control board 1510 via the main control I/O port 1314. Communication between the main control board 1310 and the peripheral control board 1510 is one-way communication from the main control board 1310 to the peripheral control board 1510. Therefore, if only the power supply to the main control board 1310 is cut off, the peripheral control board 1510 cannot recognize that the power supply to the main control board 1310 has been cut off, and will continue the presentation and screen display that are currently being executed while waiting for the transmission of commands from the main control board 1310.

[23-2. Setting Function]
As described above, the gaming machine of this embodiment has a setting function, which will be described below. The setting function includes a setting change function and a setting confirmation function. The setting change function is a function for changing the setting value of the gaming machine, and the setting confirmation function is a function for referring to the setting value.

The setting function (changing and checking setting values) is normally not performed during play, but is performed when the gaming machine is started up (before play begins) or by pausing play. Also, to prevent the player from knowing the setting values, at least some of the operation parts required to execute the setting function are located on the back side of the gaming machine, and cannot be operated unless the main body frame 4 is opened. The setting function in the gaming machine of this embodiment is started by performing a specified operation on the setting key 971, RAM clear switch 954, and power switch 932.

Figure 381 is a diagram showing an example of operations for executing the setting function of the gaming machine of this embodiment. Setting confirmation is initiated by starting up the gaming machine after performing setting confirmation operations of turning the RAM clear switch 954 to "OFF", the setting key 971 to "ON", and the power switch 932 to "ON". Setting changes are initiated by starting up the gaming machine after performing setting change operations of turning the RAM clear switch 954 to "ON", the setting key 971 to "ON", and the power switch 932 to "ON".

[23-3. Control when power is turned on]
Next, the control when the gaming machine is turned on will be described. Here, the setting-related functions when the gaming machine is turned on will be mainly described, and the description of the processing that has already been described will be omitted.

[23-3-1. Power-on processing]
382 is a flowchart of the power-on process of the gaming machine of this embodiment. The power-on process is the first process executed when the gaming machine is powered on.

When the gaming machine is powered on, the main control MPU 1311 first executes the RAM protection permission setting (step 02TKS0010). An access-prohibited area is set in the storage area of the main control RAM 1312, and if the prohibited area is accessed by a program being executed during play, a reset is executed as it is considered that an abnormality has occurred. Considering the possibility that the power supply may not be stable immediately after power-on, the access prohibition to the main control RAM 1312 is lifted until the initialization of the gaming machine is completed and before play begins. The RAM protection permission setting is set so that any area of the main control RAM 1312 can be accessed. In addition, the watchdog timer is cleared and a power outage clear signal is set (set to ON, then set to OFF).

Next, the main control MPU 1311 executes the power-on startup confirmation process (step 02TKS0020). In the power-on startup confirmation process, first, the power outage warning signal is read to confirm whether or not there is a power outage (power-on wait before main power outage warning signal confirmation process). Next, the signal levels of the setting key 971 and the RAM clear switch 954 are read from the PF port and stored in a specified register (power-on wait before setting related switch acquisition process). After that, it waits for a specified time (power-on wait process), and reads the power outage warning signal to confirm again whether or not there is a power outage (power-on wait before main power outage warning signal confirmation process). If it is determined that there is a power outage, it waits until the power supply voltage of the gaming machine stabilizes. Finally, it checks whether or not the board (wiring) connected to the main control board before the power is cut off has been reconnected. Details of the power-on startup confirmation process will be explained in FIG. 383.

Then, the main control MPU 1311 executes a RAM clear judgment process (step 02TKS0030). In the RAM clear judgment process, the information stored in the main control RAM 1312 at the time of power-on is checked, and it is judged whether the contents of the main control RAM 1312 at the time of power outage are correctly retained. For example, it is judged whether the setting information of the gaming machine and the contents of the main control RAM 1312 before the power outage are correctly stored. Details of the RAM clear judgment process are explained in FIG. 384.

Next, the main control MPU 1311 executes a setting operation determination process (step 02TKS0040). In the setting operation determination process, as necessary, the system may transition to a setting change mode or a setting confirmation mode, check for RAM abnormalities, and clear the main control RAM 1312. Details of the setting operation determination process are described in FIG. 390.

Next, when the setting operation determination process is completed, the main control MPU 1311 executes the random number setting startup process (step 02TKS0050). In the random number setting startup process, it executes initial settings such as the CTC (Counter/Timer Circuit) that defines the interrupt timing, and allows the interrupt. In addition, it starts a hardware random number (e.g., win/lose random number) generation circuit built into the main control MPU 1311.

The main control MPU 1311 then executes a game start determination process (step 02TKS0060). In the game start determination process, it is determined whether or not game play can be started, and commands to be sent when the power is turned on (for example, power-on operation commands) are set, and initial data at the time of power-on is set. Furthermore, settings are made to allow the execution of interrupt processes such as timer interrupts (step 02TKS0070).

When the main control MPU 1311 is permitted to execute the interrupt process, it executes the main control side main process (steps 02TKS0080, 02TKS0090). In the main control side main process, it first acquires a power outage warning signal and determines whether a power outage has occurred based on whether the power outage warning signal is ON (step 02TKS0080). If the power outage warning signal is not ON, power is being supplied normally, so it executes a random number update process (step 02TKS0090). In the random number update process, random numbers other than the random numbers used to determine whether or not a win has been made in a special or normal lottery are updated.

On the other hand, if the main control MPU 1311 detects a power outage warning signal, it executes power-off processing (step 02TKS0200). The power-off processing executes processing to back up data in order to restore the state before the power outage occurred. The specific processing is the same as the processing described in FIG. 188.

[23-3-2. Startup confirmation process when powered on]
Next, the power-on startup confirmation process (step 02TKS0020) will be described. In the power-on startup confirmation process, in addition to confirming the main power outage warning signal when the gaming machine is powered on and obtaining switch-related input information, it is confirmed that the wiring was disconnected/reconnected before the power outage. In particular, it detects cases where the wiring was disconnected/reconnected in a way that would interrupt the progress of the game. Note that the disconnection/reconnection of the wiring that allows the game to proceed (for example, connection to the peripheral control board 1510) is confirmed by the disconnection/short circuit abnormality judgment process called by the timer interrupt process (FIG. 392).

Figure 383 is a flowchart showing the steps of the power-on startup confirmation process in this embodiment.

When the main control MPU 1311 starts the power-on startup confirmation process, it executes a power-on pre-wait main power outage warning signal confirmation process that reads the power outage warning signal and checks whether or not a power outage is occurring (step 02TKS0110). It then executes a power-on pre-wait setting related switch acquisition process that reads the signal levels of the setting key 971 and RAM clear switch 954 from the PF port and stores them in a specified register (step 02TKS0120).

Then, the main control MPU 1311 executes a power-on wait process to wait for a predetermined time (step 02TKS0130). The predetermined time is set to at least the time required until drawing control by the performance display control unit can be executed in the peripheral control board 1510. Furthermore, the main control MPU 1311 executes a power-on pre-wait main power outage warning signal confirmation process to read the power outage warning signal and check again whether or not there is a power outage (step 02TKS0140). At this time, if it is determined that there is a power outage, the machine waits until the power supply voltage of the gaming machine stabilizes.

Finally, the main control MPU 1311 determines whether the main control board 1310 has been reconnected to other boards, sensors, etc. (step 02TKS0150). Whether or not reconnection has occurred is determined based on information stored in the game control area of the main control RAM 1312. For example, the determination may be based on information at the time an error occurs due to failure to receive a response signal from the payout control board 951, or based on error information such as a proximity switch error. The determination may also be based on a wiring connection failure flag being set in the backed up game control area.

If the wiring connecting the main control board 1310 to other boards, sensors, etc. was disconnected before the power outage and was reconnected when the gaming machine was started (the result of step 02TKS0150 is "YES"), the main control MPU 1311 sets the wiring reconnection flag (step 02TKS0160). After setting the wiring reconnection flag, it clears the wiring connection failure flag (step 02TKS0170).

In addition, the main control MPU 1311 notifies an illegal setting confirmation error based on the setting of the wiring reconnection flag. As described above, the illegal setting confirmation error indicates the possibility of illegal acts, such as illegal power supply to the main control board 1310 being cut off/restarted by disconnecting and reconnecting the wiring connected to the main control board 1310, and illegal setting change operations and setting confirmation operations being performed, thereby illegally accessing the inside of the gaming machine and changing or confirming the setting value information. Therefore, when an illegal setting confirmation error occurs, it is desirable to stop the functions of various detection sensors and stop the start or continuation of a new game, check the settings, and check other abnormalities in the gaming machine. The illegal setting confirmation error notification is performed by lighting up the indicators composed of LEDs and lamps such as the function display unit 1400 and the setting indicator 974 in a specific manner, or displaying an error screen on the liquid crystal display device. In addition, a command may be output from the main control board 1310 to the dispensing control board 951, and an error may be notified by displaying it in a specific manner on an error LED indicator (not shown) provided on the dispensing control board 951.

[23-3-3. RAM Clear Determination Process]
Next, the details of the RAM clear judgment process (step 02TKS0030) in the power-on process will be described. FIG. 384 is a flowchart showing the procedure of the RAM clear judgment process of this embodiment. FIG. 385 is an example of the program code of the RAM clear judgment process of this embodiment, and corresponds to the flowchart of FIG. 384. In the RAM clear judgment process, as described above, the information stored in the main control RAM 1312 at the time of power-on is confirmed, and it is determined whether the contents of the main control RAM 1312 at the time of power interruption are normally held. The specific contents of the process will be described below.

When the main control MPU 1311 starts the RAM clear determination process, it first executes a setting value confirmation process (step 02TKS0210). In the setting value confirmation process, setting value information (setting value) that affects the lottery probability of the game is obtained, and if there is an abnormality, an abnormal value is set to the setting state and setting value. The specific process is explained in FIG. 386.

When the setting value information check is completed, the main control MPU 1311 executes the power-on out-of-use RAM check process to check whether the information in the memory area of the main control RAM 1312 that is not used for gameplay (out-of-use RAM) is abnormal (step 02TKS0220).

Once checking of the RAM outside the used area is complete, the main control MPU 1311 calculates a checksum for the game control area (area where game information is stored) of the main control RAM 1312 (step 02TKS0230).

Next, the main control MPU 1311 provisionally sets the state of the game control area to an abnormal state (RAM abnormality judgment value) (step 02TKS0240). Thereafter, the state of the game control area is identified based on the results of the processing from step 02TKS0210 to step 02TKS0230.

The main control MPU 1311 determines whether the checksum value calculated in the processing of step 02TKS0230 is normal or not (step 02TKS0250). If the checksum value is not normal (the result of step 02TKS0250 is "NO"), the game control area is in an abnormal state, so this processing is terminated and the contents of the game control area are cleared in subsequent processing as necessary.

Next, the main control MPU 1311 determines whether the value of the backup flag set before the power outage is normal (step 02TKS0260). If the value of the backup flag is not normal (the result of step 02TKS0260 is "NO"), the game control area cannot be confirmed to be normal, so this process is terminated and the contents of the game control area are cleared in subsequent processes as necessary.

The main control MPU 1311 determines whether the state outside the used area of the main control RAM 1312 confirmed in the processing of step 02TKS0220 is normal (step 02TKS0270). If the state outside the used area of the main control RAM 1312 is not normal (the result of step 02TKS0270 is "NO"), it terminates this processing as it is determined that the game control area is in an abnormal state, and clears the contents of the game control area in subsequent processing as necessary.

If the checksum and backup flag values are normal and the state outside the use area of the main control RAM 1312 is normal, the main control MPU 1311 sets the state of the game control area to the RAM normal judgment value (step 02TKS0280), and sets the setting state to the state before the power failure (step 02TKS0290). The state of the main control RAM 1312 is set (stored) in the C register, and the state before the power failure is set (stored) in the B register.

[23-3-4. Setting value confirmation process]
Next, the setting value confirmation process of step 02TKS0210 of the RAM clear judgment process will be described. In the setting value confirmation process, the setting information (setting value) of the gaming machine is acquired, and if abnormal, the setting state and the setting value are set to abnormal values. FIG. 386 is a flowchart showing the procedure of the setting value confirmation process of this embodiment. Also, FIG. 387 is an example of the program code of the setting value confirmation process of this embodiment, and corresponds to the flowchart of FIG. 386.

When the setting value confirmation process is started, the main control MPU 1311 first obtains the setting state from the setting state management area (VALID_PLAY; setting state storage means) (step 02TKS0310). The setting state management area is a 1-byte area as shown in FIG. 388. The setting state management area can be set to any of the following values (FIG. 389): playable state ("0"; _SETST_NON), setting confirmation state ("1"; _SETST_CHK), setting change state ("2"; _SETST_CHG), and RAM abnormal state ("3"; _SETST_ERR). Note that an illegal setting confirmation error ("4"; _SETST_CHER) may be set to distinguish it from a RAM abnormal state. An illegal setting confirmation error does not necessarily mean that the setting value is abnormal, but it is treated the same as a RAM abnormal state in consideration of the possibility that the setting value has been tampered with.

The main control MPU 1311 determines whether the setting state obtained from the setting state management area is an abnormal value, specifically, whether a value other than the settable values defined in FIG. 389 is set (step 02TKS0320). In the program implementation, the value of the setting state is compared with the setting state management area abnormality judgment value (_VALID_PLAY_CK), and if it is smaller than the setting state management area abnormality judgment value, it is judged to be a normal value. The setting state management area abnormality judgment value is the maximum settable value (in this embodiment, RAM abnormality state = "3") plus 1, and in this embodiment, a setting value of 4 or less is judged to be normal.

Next, if the setting state obtained from the setting state management area is not an abnormal value (the result of step 02TKS0320 is "NO"), that is, if the setting state is a normal value, the main control MPU 1311 obtains the setting value (setting value information) (step 02TKS0330). The setting value (setting value information) is stored in the setting value area (SETTEI_AR; setting value information storage means; FIG. 388), which is a 1-byte area. In this embodiment, the setting value is set to a value between "0" and "5".

The main control MPU 1311 further determines whether the acquired setting value (setting value information) is within a predetermined range, i.e., a value between "0" and "5" (step 02TKS0340). Since only positive numbers can be set in the setting value area, the program can be implemented to determine whether the value is greater than the upper limit (setting value upper limit judgment value; _SETTEI_LIM = "5"; Figure 389) plus 1, just like checking the setting state.

If the setting value (setting value information) is within the specified range (the result of step 02TKS0340 is "YES"), the setting state and setting value are set normally, so the main control MPU 1311 terminates this process and returns to the process that called it (RAM clear determination process).

On the other hand, if the setting status is an abnormal value (the result of step 02TKS0320 is "YES") or if the setting value is an abnormal value (the result of step 02TKS0340 is "YES"), the main control MPU 1311 sets the setting status to RAM abnormal status "3" (step 02TKS0350). Finally, the setting value is initialized (step 02TKS0360) and the process returns to the calling process (RAM clear determination process).

The setting values are not erased (initialized) even when the RAM clear operation is performed, so if an abnormality occurs in the setting values, they are initialized using the setting value confirmation process. This is to make it possible to initialize the state of the gaming machine while maintaining the setting values, such as when clearing the RAM to return a high probability state to a normal state.

[23-3-5. Setting operation determination process]
Next, the details of the setting operation determination process (step 02TKS0040) in the power-on process will be described. Fig. 390 is a flowchart showing the procedure of the setting operation determination process of this embodiment. Fig. 391 is an example of program code for the setting operation determination process of this embodiment, which corresponds to the flowchart of Fig. 390. As described above, the setting operation determination process involves transition to the setting change mode or setting confirmation mode, confirmation of RAM abnormalities, initialization (clearing) of the main control RAM 1312, and the like.

When the setting operation determination process is started, the main control MPU 1311 first provisionally sets a value (_SETST_ERR) indicating a RAM abnormality in the setting status management area (setting value information storage means) (step 02TKS0410).

Next, the main control MPU 1311 determines whether a setting change operation was performed when the power was turned on (step 02TKS0420). Specifically, it reads the signal levels of the setting key 971 and RAM clear switch 954 from the external input port (_PINSTS) immediately after power was turned on to make this determination.

If no setting change operation was performed when the power was turned on (the result of step 02TKS0420 is "NO"), the main control MPU 1311 determines whether the setting state before the power was cut off was a setting change, that is, whether a power outage occurred during the setting change mode (step 02TKS0430). The setting state before the power was cut off is stored in the B register in the processing of step 02TKS0290 of the RAM clear determination processing.

If the setting state before the power outage was not a setting change (the result of step 02TKS0430 is "NO"), the main control MPU 1311 determines whether the setting state before the power outage was a RAM abnormality (step 02TKS0440). If the setting state before the power outage was a RAM abnormality (the result of step 02TKS0440 is "YES"), this process ends and the process that called it (power-on process) is resumed.

If the setting state before the power outage was not a RAM abnormality (the result of step 02TKS0450 is "NO"), the main control MPU 1311 initializes the setting state management area (step 02TKS0460). Furthermore, it determines whether the RAM clear switch 954 was ON when the power was turned on (step 02TKS0470).

If the RAM clear switch 954 was not ON when the power was turned on (the result of step 02TKS0470 is "NO"), i.e., if it was OFF, the main control MPU 1311 stores the game state at the time of the power outage in the power-on state buffer in order to restore the state before the power outage (step 02TKS0480). Furthermore, it determines whether the setting key is OFF (step 02TKS0490). If the setting key is not OFF (the result of step 02TKS0490 is "NO"), i.e., if it is ON, this means that a setting confirmation operation has been performed, so the setting state is set to the setting confirmation state (step 02TKS0500).

If the setting key is OFF (the result of step 02TKS0490 is "YES") or if the setting confirmation state is set, the main control MPU 1311 executes the door status confirmation process (step 02TKS0510). In the door status confirmation process, the open/closed state of the door frame 3 is confirmed, and if it is in the open state, the corresponding setting is made. When the door status confirmation process ends, the process returns to the process that called it (the power-on process).

If a setting change operation was performed when the power was turned on (the result of step 02TKS0420 is "YES"), or if the setting state before the power was turned off was a setting change state (the result of step 02TKS0430 is "YES"), the main control MPU 1311 changes the setting state to a setting change state (step 02TKS0520). Next, it is determined whether the out-of-use area RAM is normal (step 02TKS0530). If the out-of-use area RAM is not normal (the result of step 02TKS0530 is "NO"), that is, if an abnormality has occurred in the out-of-use area RAM, out-of-use area RAM abnormality processing is executed to return the out-of-use area RAM to a normal state (step 02TKS0540).

If the RAM clear switch 954 is ON (the result of step 02TKS0470 is "YES"), or if the RAM outside the used area is normal (the result of step 02TKS0530 is "YES"), and the execution of the processing for when the RAM outside the used area is abnormal is completed, the main control MPU 1311 executes RAM initialization processing (step 02TKS0550) and clears the working area (step 02TKS0560). After that, this processing ends and the process that called it (power-on processing) is resumed.

As described above, in this embodiment, setting value information is obtained when the gaming machine is powered on, and control related to the setting values is performed according to the operation input when the power is turned on and the setting state before the power is cut off. For example, if the setting state before the power is cut off is "setting change", regardless of the presence or absence of operation input or the setting state, the setting change mode is started when the gaming machine is started, and the setting change is continued, allowing play to resume smoothly. In this case, because the setting value has not been confirmed, there is a possibility that a RAM abnormality will occur, and the setting value may not have been as intended by the person who set it.

On the other hand, even if the setting state before the power was cut off was "setting check," if there is no operational input (setting check operation) to start the setting check mode when the power is turned on, the gaming machine will start without continuing the setting check. Unlike the setting change mode, the setting value is maintained without being changed, so play can begin, and if rechecking is required, the operational input can be made again. Also, by not automatically switching to the setting check mode on start-up, it is possible to prevent the setting value from being illegally checked by intentionally restarting the gaming machine.

Furthermore, if the setting status is "RAM abnormal," game play cannot be started normally, so the RAM is not cleared and the start of the gaming machine itself is halted. When the setting status is "RAM abnormal," it is necessary to reset the setting value information by changing the settings, so in order to prevent a third party from illegally changing the setting values, the possibility of fraudulent activity is reduced by making it impossible to start playing until the administrator intentionally resets the settings. Furthermore, if the setting status can be set to "illegal setting confirmation error," control is exercised so that game play cannot be started normally, just like with "RAM abnormality," thereby preventing a third party from illegally tampering with the setting values and resuming play.

[23-3-6. Disconnection/Short Circuit Anomaly Judgment Processing]
Here, the disconnection/short circuit abnormality determination process (step 01TKS0120) including the process of confirming that the wiring that was disconnected during play has been reconnected will be described. The disconnection/short circuit abnormality determination process is a process executed in the switch-related control process (step 01TKS0010; Fig. 354) in the playable time process (step P108; Fig. 329) of the timer interrupt process. Fig. 392 is a flowchart showing the procedure of the disconnection/short circuit abnormality determination process of this embodiment.

When the main control MPU 1311 starts the open/short circuit abnormality determination process, it acquires connection error history information (switch error history information) (step 02TKS0610). It then determines whether the connection error history information includes error information for the wiring to be detected (step 02TKS0620). In this embodiment, the wiring to be detected in the connection error history information is all of the multiple wirings connected to the main control board 1310, but it may be possible to target only some of the multiple wirings rather than all of them. Note that when targeting only some of the multiple wirings rather than all of them, it is desirable to configure the configuration so that at least the wirings related to the power supply to the main control board 1310 are targeted.

When the connection error history information includes error information for the wiring to be detected (the result of step 02TKS0620 is "YES"), the main control MPU 1311 waits for a predetermined time (step 02TKS0630) and sets the wiring connection failure flag to ON (step 02TKS0640). Furthermore, it transmits a disconnection/short circuit abnormality command (step 02TKS0650) and ends this process. The wiring connection failure flag may be set to ON for each wiring, or a common flag may be set for all wiring, and one wiring connection failure flag may be set to ON when a disconnection/short circuit is detected in any of the wiring to be detected. Also, the wiring connection failure flag may be stored in the game control area, and when the gaming machine is restarted, the wiring connection failure flag may be referenced and the wiring reconnection flag may be set to ON in the power-on startup confirmation process.

If the connection error history information does not include error information for the wiring to be detected (the result of step 02TKS0620 is "NO"), the main control MPU 1311 determines whether or not the wiring connection failure flag is set (step 02TKS0660). If the wiring connection failure flag is not set (the result of step 02TKS0660 is "NO"), no abnormality such as a broken wire has occurred and the gaming machine is operating normally, so this process ends.

On the other hand, if the wiring connection failure flag is set (the result of step 02TKS0660 is "YES"), the main control MPU 1311 sets the wiring reconnection flag to ON because the disconnected wiring has been reconnected (step 02TKS0670). After the wiring reconnection flag is set to ON, the break or short circuit has been resolved, so the wiring connection failure flag is cleared (set to OFF) (step 02TKS0680). The wiring reconnection flag is cleared (set to OFF) when the normal setting change that occurs when the power switch 932 is turned from OFF to ON is executed and game play starts normally.

The above procedure makes it possible to detect that a connection abnormality such as a broken wire or short circuit has occurred in the wiring and then been resolved by reconnecting the wiring or the like. It is unnatural for a connection abnormality such as a broken wire or short circuit to be resolved without restarting the gaming machine, and for example, there is a possibility that unauthorized operation has been performed on the gaming machine through fraudulent activity and setting value information has been changed or confirmed before the wiring is reconnected. For this reason, as described above, an unauthorized setting confirmation error is generated based on the wiring reconnection flag being set to ON, preventing the continuation of play and preventing the unauthorized exploitation of gaming value.

Since the power-on startup confirmation process is a process executed when the gaming machine is started, if the wiring reconnection flag is set in the power-on startup confirmation process and an illegal setting confirmation error occurs, the start of the game is stopped. On the other hand, even if the wiring reconnection flag is set to ON in a process executed while the game is continuing, such as the disconnection/short circuit abnormality determination process, and an illegal setting confirmation error occurs, the continuation of the game should be stopped in order to prevent the game value from being illegally exploited. However, if an illegal setting confirmation error occurs due to fraudulent conduct, the game may be continued to an extent that does not cause actual harm to the hall side in order to identify the person who committed the fraud. For example, even if a connection abnormality such as a disconnection or short circuit occurs in the wiring and is reconnected (while the fraudulent conduct is being performed), the performance by the liquid crystal display device, movable role, and other performance devices is continued for a predetermined period as usual. At this time, the game control that newly grants the game value (such as a new lottery or the granting of prize balls) is stopped to prevent the game value from being illegally exploited. In addition, the function display unit 1400, setting display 974, etc. can notify the user of a fraudulent setting confirmation error in a manner that is not noticeable from the front of the gaming machine, making it difficult for the person committing the fraud to recognize that an error has occurred. This allows the hall to have ample time to gather evidence, etc., without forcing the person committing the fraud to leave their seat immediately, making it easier to identify the full extent of the fraudulent activity.

[23-4. Control when an incorrect setting confirmation error occurs]
Next, we will consider how to deal with fraudulent acts that induce malfunctions of the gaming machine by disconnecting and reconnecting the wiring to the main control board 1310. One example of fraudulent acts assumed in this invention is an act of obtaining an unfair advantage by forcibly cutting off the wiring that supplies power to the main control board 1310 to induce a malfunction, or by outputting a special command (e.g., a setting command) in an illegal manner while the wiring is being disconnected or when the wiring is reconnected to restart the machine, thereby unfairly inducing a malfunction.

One way to forcibly cut off the power supply to the main control board 1310 is to physically cut off the wiring connected to the power supply board, but since it is difficult to continue playing after the wiring is cut off, it is possible to continue playing illegally by temporarily disconnecting the wiring connector in some way and then reconnecting it. Detection of potentially fraudulent behavior, such as disconnecting or reconnecting the wiring connected to the main control board 1310, can be performed using the procedure for the disconnection/short circuit abnormality determination process described above.

In the gaming machine of this embodiment, by detecting the reconnection of the wiring, rather than the disconnection of the wiring, an illegal setting confirmation error occurs as described above. In addition, when an illegal setting confirmation error occurs, the progress of the game is stopped. In other words, in a state where an illegal setting confirmation error occurs, the game cannot be resumed unless a specific return operation is performed. In order to allow only the hall side to perform the specific return operation, it is preferable to use a specific operation unit that can be operated from the back side of the gaming machine. In this embodiment, in order to simplify the control by the main control board 1310 and simplify the gaming machine configuration, the setting change operation is configured to also serve as the specific return operation (described in detail later). In addition, by executing the setting change operation as the specific return operation, even if the setting value may have been illegally confirmed or modified, the hall side can set a new setting value and safely resume the game.

The following describes the control to prevent fraudulent activity when disconnection and reconnection of the wiring of the main control board 1310 is detected, with reference to a timing chart.

[23-4-1. When checking settings after reconnecting wiring]
First, a case will be described where a setting confirmation operation is performed after detecting reconnection of the wiring connected to the main control board 1310. Fig. 393 is a timing chart for explaining control in a case where an unauthorized setting confirmation action is performed, such as cutting off the power supply by disconnecting the wiring connected to the main control board 1310 of this embodiment, and then performing a setting confirmation operation when restarting the power supply after reconnecting the wiring.

Referring to FIG. 393, the main control side power is continuously supplied until time t11, the power switch 932 is "ON", the setting key 971 is "OFF", and the RAM clear switch 954 is "OFF". Since the wiring connection is normal, the wiring connection failure flag and the wiring reconnection flag are cleared.

The setting display 974 is in a non-display state where the setting value is not displayed because the game is in a normal game state and setting functions such as setting confirmation and setting change are not being executed (if the setting display 974 also serves as the base display 1317, a predetermined base display is being performed). In addition, the function display unit 1400 displays a mode indicating the normal game state, and the special symbol display included in the function display unit 1400 is executing a special symbol variation display. When the special symbol starts to vary, the main control board 1310 transmits to the peripheral control board 1510 a command including information for determining the mode of the variation display of the performance symbol and instructing the variation start. Furthermore, since communication is normally performed between the main control board 1310 and the payout control board 951, the error LED display provided on the payout control board 951 is lit in a mode indicating normality.

The performance side power supply is also supplied with power, just like the main control side power supply. When the peripheral control board 1510 receives a command to start the change, it starts the change display of the performance pattern, and executes a performance that displays characters and the like on the liquid crystal display device in accordance with the change display of the performance pattern based on the change start command, and further executes a performance using movable props and performance devices such as LEDs and lamps.

Time t11 represents a case where the wiring related to the power supply to the main control board 1310 is illegally disconnected while the power switch 932 remains set to ON. In this case, only the power supply to the main control board 1310 is stopped. As a result, the game state becomes power-off, game control by the main control MPU 1311 is interrupted, and power-off processing is executed. In this embodiment, as described above, in consideration of the risk that some kind of fraudulent activity is being committed with respect to such behavior, the wiring connection failure flag is set to ON during the process of executing such power-off processing (time t11). The wiring connection failure flag is set to ON based on the state of the voltage change, etc.

In addition, if the wiring related to the power supply to the main control board 1310 is improperly disconnected, the signal from the main control board 1310 is cut off, and the function of the function display unit 1400 stops. At this time, the LED and 7-segment display included in the function display unit 1400 may be turned off, or an error message may be displayed if power is being supplied from a system other than the main control board 1310. In addition, since the error LED display provided on the dispensing control board 951 cannot receive a signal from the main control board 1310, an error message indicating a connection abnormality is displayed in a specific manner that differs from when the connection is normal.

As shown in FIG. 380, in the gaming machine of this embodiment, the wiring supplying power to each board is a separate system, so even if the power supply to the main control board 1310 is illegally cut off, the power supply to the peripheral control board 1510 and various presentation devices continues. Therefore, even after time t11 when the power supply to the main control board 1310 is illegally cut off, the presentation display on the liquid crystal display device, various lamp displays, audio presentations, etc. can continue.

The display of the changing performance patterns is stopped when a command to stop the change is received from the main control board 1310 due to the end of the special pattern change. However, because the power supply to the main control board 1310 has stopped, the command to control the performance (the command to stop the changing pattern display) is not sent, and the display of the performance continues with the content at the time of power outage until the power supply to the main control board 1310 is resumed. Specifically, because the pattern stop command cannot be received while the changing performance patterns are being displayed, the display of the changing performance patterns continues, with the rapid display of the performance patterns continuing or the state of temporary stop (the state in which the performance patterns are not stopped and are swaying at a specified position) continuing.

In the example of FIG. 393, when the power supply to the main control board 1310 is illegally disconnected while the power switch 932 is kept ON, the power supply to the main control board 1310 is cut off, so the timer interrupt process (disconnection/short circuit abnormality determination process) is not executed when reconnected, and the wiring reconnection flag is not set to ON at this timing. Then, when the wiring supplying power to the main control board 1310 is reconnected, the power supply to the main control board 1310 is resumed (time t12), and the main control MPU 1311 starts the power-on process and sets the wiring reconnection flag to ON by the power-on startup confirmation process (time t13, step 02TKS0670). In this way, when the wiring connection is illegally disconnected and the power supply to the main control board 1310 is cut off and then power is resupplied, the wiring connection failure flag and the wiring reconnection flag are sequentially set to ON to store that fact, making it possible to monitor for illegality.

When the main control side power supply is resupplied and the main control board 1310 starts up (time t13), an illegal setting confirmation error is notified at the back of the gaming machine by the setting display 974 etc. based on the wiring reconnection flag that has been set to ON. By notifying the illegal setting confirmation error at the back of the gaming machine, the hall side can later check the memory contents of the main control RAM 1312 due to the power supply to the main control board 1310 being cut off.

In addition, since it is possible that one of the multiple wirings, including the wiring that supplies power to the main control board 1310, is disconnected and the connection path is used for fraudulent acts (an illegal wiring is connected instead of another wiring), in this embodiment, such connection paths are also monitored as follows. That is, in the gaming machine of this embodiment, when one of the multiple wirings, including the wiring that supplies power, is disconnected and reconnected, a specific notification is executed to notify the possibility that an abnormality has occurred in the setting value regardless of whether the power supply is cut off or not. In FIG. 393, as an example, an example is shown in which a specific notification is executed by the function display unit 1400 when the wiring that supplies power is cut off and reconnected, but a specific notification is also executed when a wiring other than the wiring that supplies power is cut off and reconnected. The target for executing the specific notification does not have to be the function display unit 1400, and specific information may be displayed by the base display unit 1317, or a specific image may be displayed by the liquid crystal display device 1600. Also, to distinguish it from an illegal setting confirmation error, it may be notified by a device other than the device that notifies the illegal setting confirmation error, or it may be notified by the same device that notifies the illegal setting confirmation error.

The error LED indicator provided on the payout control board 951 may continue to display a connection abnormality error since it cannot receive a signal from the main control board 1310 due to the game being stopped, but may also receive a command from the main control board 1310 indicating that an illegal setting confirmation error has occurred or that game play is not possible, and issue a notification of the illegal setting confirmation error or a specific notification. Note that when the power supply to the main control board 1310 is resumed, the error LED indicator provided on the payout control board 951 may display in a manner indicating that the connection is normal, since the connection itself is normal even if game play cannot be started.

If an illegal settings confirmation error occurs, the continuation of play is prevented as there is a possibility that illegal activity has occurred. Also, if a specific notification is executed, play may be stopped in the same way as when an illegal settings confirmation error occurs, or a notification may be issued and play may continue.

In addition, when an invalid setting confirmation error occurs, if an abnormality has occurred, such as the contents of the main control RAM 1312 being completely cleared, the setting status is set to "RAM abnormality" in the setting value confirmation process (Fig. 385) of the RAM clear determination process (Fig. 383) during power-on processing.

In addition, in this embodiment, even if the contents of the main control RAM 1312 are determined to be normal, such as the checksum being normal, if an illegal setting confirmation error occurs, in order to more reliably prevent fraudulent activity, an "illegal setting confirmation error" may be set so that processing similar to "RAM abnormality" is performed as the setting state. If processing similar to "RAM abnormality" is performed, game play will not start and the game will remain stopped until the setting change operation is performed normally.

At time t13 after the main control side power is resupplied, it becomes possible to send commands from the main control board 1310 to the peripheral control board 1510, and the LCD display displays a message corresponding to the illegal setting confirmation error, such as not being able to start playing, the various lamps emit light corresponding to the illegal setting confirmation error, and the various speakers issue an audio alert corresponding to the illegal setting confirmation error. At this time, the varying display of the performance symbols stops or becomes hidden. In addition, for the performance devices, the operation of the movable parts currently in progress stops at the timing of time t13, and initialization processing is performed, such as moving them to their initial positions.

As described above, in the gaming machine of this embodiment, if the power supply to the main control board 1310 is illegally cut off, it is configured so that game play cannot be started even if the power supply to the main control board 1310 is resumed. This makes it possible to prevent profits from being illegally exploited and losses from occurring even if someone tries to illegally access setting value information by performing a fraudulent act of disconnecting and reconnecting the wiring to the main control board 1310.

Next, the control in the case where the main control side power is resupplied at time t12 and then the execution of the setting confirmation operation is determined at time t13 will be described. The setting confirmation operation does not require the operation of the RAM clear switch 954 arranged on the rear side of the gaming machine, and is a simple operation of turning on the setting key 971 when the power is turned on, so that the setting value can be confirmed in a relatively simple manner. For this reason, in addition to the fraudulent act of cutting off and restarting the power supply to the main control board 1310, in consideration of the possibility that the setting confirmation operation may be performed fraudulently in some way, the gaming machine of this embodiment is designed to prevent the setting value information from being fraudulently confirmed even if the power supply to the main control board 1310 is fraudulently cut off and the setting confirmation operation is accepted when the power supply is restarted (even if the setting key is turned ON). In addition, in the setting confirmation operation, the setting key 971 only needs to be operated to the ON position when the startup process is executed after power-on (at the time of determination), and it may also be operated to the ON position before power-on (in FIG. 393, it can be determined if the setting key 971 is operated to the ON position between times t11 and t12).

Referring to FIG. 393, at time t13, the execution of the setting confirmation operation is identified by determining that the setting key 971 is ON when the power supply to the main control board 1310 is resumed. However, because the wiring reconnection flag is set to ON by the open circuit/short circuit abnormality determination process, the current setting confirmation operation is not regarded as valid but as invalid, and no processing related to the setting confirmation is performed, resulting in a game stop state in which game play cannot be started.

As described above, in the gaming machine of this embodiment, after the power supply to the main control board 1310 is cut off, even if the power supply to the main control board 1310 is resumed and the setting confirmation operation is performed, it is not possible to start playing. This makes it possible to temporarily stop the power supply to the main control board 1310 in order to illegally check the setting values, thereby preventing fraudulent acts such as attempting to illegally check the setting values.

In addition, even if a fraudulent act is committed by cutting off the power supply to the main control board 1310, by not making any changes to the presentation, it is possible to make the gaming machine appear to be operating normally for the time being, which increases the likelihood that the fraudster will remain on the gaming machine and makes it easier to identify the fraudster.

The following provides a detailed description of how the illegal settings confirmation error can be cleared by a specific recovery operation (a setting change operation in this embodiment). As described above, if an illegal settings confirmation error has occurred due to fraudulent activity or the like, game play can be started by turning off the power, and then turning the power back on while directly operating the power switch 932 to perform a setting change operation. In the timing chart shown in Figure 393, the power is turned off at time t14 and turned back on at time t15. Note that the shaded areas in the period from time t14 to time t15 in the timing chart of Figure 393 indicate that the functions of each component are stopped due to the power cut.

When the power supply of the gaming machine is turned back on, the process for starting up the gaming machine is started, and during this process, it is determined whether or not a setting change operation has been performed. Note that the setting change operation is performed when the setting key 971 and RAM clear switch 954 are "ON" at the time when the power switch 932 is turned from "OFF" to "ON" (at the time of determination), and a prior operation to turn the setting key 971 and RAM clear switch 954 "ON" may also be performed before the power is turned on.

When the setting change operation is detected and the start-up of the gaming machine is completed (time t16), the wiring reconnection flag is cleared. This clears the illegal setting confirmation error and ends the specific notification and various error notifications. The setting state of the gaming machine is then set to the setting change state and transitions to the setting change mode (step 02TKS0520). The setting display 974 is switched from displaying the illegal setting confirmation error to displaying the setting value being changed. The function display unit 1400 remains fully unlit (or may display the setting change, which may be fully lit) until the setting change is completed. At this time, the liquid crystal display device may display a screen indicating that the setting is being changed.

When the setting change is complete (time t17), the necessary processing to start playing is executed, such as clearing the game control area, and the game becomes ready to start.

As described above, in the gaming machine of this embodiment, when an illegal setting confirmation error occurs, if a setting change operation is performed as a specific return operation, the illegal setting confirmation error can be cleared and normal play can be resumed through the setting change mode. The setting change operation requires the operation of multiple operating parts (RAM clear switch 954, setting key 971), making it difficult for a fraudster to perform this operation, and includes the operation of the setting key 971, which can only be operated by hall employees who have a key, and the operation of the RAM clear switch 954 located on the back side of the gaming machine, thereby improving security against fraudulent activities.

In addition, if an error occurs in checking the incorrect settings, a special recovery operation may be performed, but since this may complicate the processing when the power is turned on, by making recovery possible using the same operation as the normal setting change operation, it is possible to standardize the program, prevent an increase in program capacity, and prevent the game control from becoming complicated.

[23-4-2. When changing settings after reconnecting wiring]
Next, a case where an illegal reconnection of the wiring connected to the main control board is detected, and then an illegal setting change operation is performed instead of an illegal setting confirmation operation will be described. Fig. 394 is a timing chart for explaining control in the case where an illegal act of executing a setting change operation is performed when the power supply is illegally cut off by disconnecting the wiring connected to the main control board 1310 of this embodiment and the power supply is resumed after the wiring is reconnected.

Compared to the setting confirmation operation, it is more difficult for a fraudster to perform a setting change operation, but in the gaming machine of this embodiment, when the power supply is resumed, not only is power resupplied by reconnecting the wiring, but the gaming machine is configured so that it cannot switch to setting change mode unless a legitimate setting change operation is performed, which requires actually turning the power switch 932 from OFF to ON to turn the power on. Therefore, the timing chart shown in FIG. 394 is the same as the timing chart shown in FIG. 393, except for the fact that the setting change operation is performed when the wiring is reconnected, and a detailed explanation will be omitted.

As described above, in the gaming machine of this embodiment, even if a setting change operation is performed after the power supply to the main control board 1310 is cut off, the wiring connection flag is not cleared, the illegal setting confirmation error continues, and it is not possible to start playing. This temporarily stops the power supply to the main control board 1310, making it possible to prevent fraudulent attempts to illegally change setting values.

[23-4-3. Unauthorized access to setting value information without powering down]
Next, a description will be given of the prevention of fraudulent acts in which the input from the wiring path is illegally used to confirm and tamper with the setting value information when the wiring that supplies power to the main control board remains connected and the other wiring (for example, wiring connected to various input switches related to lotteries and winnings) is cut off and then reconnected. Fig. 395 is a timing chart that explains control when wiring other than the wiring that supplies power to the main control board 1310 is cut off and reconnected, which differs from the embodiment described in Figs. 393 and 394.

Referring to FIG. 395, similarly to the examples shown in FIG. 393 and FIG. 394, power is continuously supplied to the main control side power supply until the wiring is disconnected (time t21), the power switch 932 is "ON", the setting key 971 is "OFF", and the RAM clear switch 954 is "OFF". In addition, since the wiring connection is normal, the wiring connection failure flag and the wiring reconnection flag are cleared. Various displays such as the setting display 974 and the function display unit 1400 also display in the same way.

Furthermore, the special symbol display included in the functional display unit 1400 displays the special symbol changes, and the main control MPU 1311 transmits a command to the peripheral control board 1510, including information for determining the mode of the display of the change in the performance symbol, and instructs the start of the change. The liquid crystal display device displays the change in the performance symbol and executes a performance that displays characters, etc. Furthermore, in conjunction with the display of the change in the performance symbol, performances are also executed using movable props, LEDs, lamps, etc.

In FIG. 395, when a specific wire (such as a wire connected to various input switches related to lottery and winning) other than the wire supplying power to the main control board 1310 is disconnected (time t21), the power supply to the main control board 1310 is not cut off and a wiring connection failure flag is set by the disconnection/short circuit abnormality determination process (step 02TKS0640). At this time, the setting display 974 may continue to be hidden, or an error display may be displayed. Also, the function display unit 1400 is completely turned off as normal play cannot be continued, but an error display may be displayed. If the display of the variation of the special pattern is being executed, the variation of the pattern is stopped at this point. Also, the error LED display provided on the payout control board 951 shows a connection abnormality in the drawing, but it may be normal if the main control board 1310 and the payout control board 951 are normally connected, or it may be an error display indicating that an abnormality has occurred in the connection of the wiring of the main control board 1310.

As in the cases shown in Figures 393 and 394, the currently running presentation continues. Since power continues to be supplied to the main control board 1310, the presentation may be stopped when the wiring connection failure flag is set; however, the setting display 974 or the like notifies the cheater in a recognizable manner to the manager or employees of the amusement facility without making the cheater identifiable, making it easier to identify the cheater.

Then, the disconnected wiring is reconnected (time t22), and the wiring reconnection flag is set (step 02TKS0670). As a result of the wiring reconnection flag being set, the setting display 974 and the like notifies the user of the aforementioned illegal setting confirmation error. In addition, a specific notification is made by the function display unit 1400. Furthermore, the performance being performed is stopped by sending a command to stop the performance from the main control board 1310 to the peripheral control board 1510, and an error screen is displayed on the liquid crystal display device.

At time t22, the wiring reconnection flag is set, which causes an illegal settings confirmation error and stops the game. As a result, the wiring supplying power to the main control board remains connected, while other wiring (such as wiring connected to various input switches related to lotteries and winning) is cut off. Even if an attempt is made to illegally use input from the wiring path to confirm or tamper with setting value information when the wiring is reconnected, the game progress can be forcibly stopped after reconnection, preventing illegal activity.

Next, we will explain the control when the power to the gaming machine is cut off (time t23) and then turned back on (time t24) while a setting change operation is being performed in order to resolve the incorrect setting confirmation error at the hall. While the power is cut off (shaded area in Figure 395), displays on the LCD display and each display device, and operation of the presentation devices are suspended. When the power to the gaming machine is turned on at time t24, processing to start up the gaming machine is started, and during this process it is determined whether a setting change operation has been performed. As mentioned above, the setting change operation requires that the setting key 971 and RAM clear switch 954 are "ON" when the power switch 932 is turned "ON", and the state before and after the power-on (determination) is not important.

After that, when a legitimate setting change operation is detected and the start-up of the gaming machine is completed (time t25), the wiring reconnection flag is cleared and the illegal setting confirmation error is cleared. The setting state of the gaming machine is then set to the setting change state and the machine transitions to the setting change mode. The display mode of the display means such as the setting display 974 and the function display unit 1400 is as described in FIG. 393. When the setting change is completed (time t26), the necessary processing to start playing is executed, such as clearing the game control area, and the machine is ready to start playing.

In the example shown in FIG. 395, the power was turned off and on again after the wiring was reconnected, but if the setting change operation is performed without turning off the power, the setting change function is not executed as in the example shown in FIG. 394. In other words, play cannot be resumed unless the power is turned on again, including by operating the power switch 932. This temporarily disconnects the wiring connected to the main control board 1310, making it possible to prevent fraudulent attempts to illegally change setting values while the gaming machine is not operating normally.

[23-4-4. If an error occurs when disconnecting the wiring]
Next, the behavior of the gaming machine when the power supply to the main control board 1310 is illegally cut off during the occurrence of a minor warning (such as a warning of "return to left hand shot", a warning of a malfunction of the decoration system, or a warning of the amount of storage in the dish section) that allows the game to continue without stopping game control such as the fluctuation of symbols or the payout control of prize balls will be described. Fig. 396 is a timing chart that explains the control when the wiring connected to the main control board 1310 is disconnected and reconnected during the occurrence of a weak error in the gaming machine of this embodiment.

In the example shown in FIG. 396, at time t31, the full tank detection sensor 535 detects that the balls stored in the fall cover unit 520 are full, and a full tank error (minor warning) is reported. At this time, a message is displayed on the liquid crystal display device informing the user of the full tank error, and the user is prompted to remove the stored balls. At this time, the error LED indicator on the payout control board 951 displays a message corresponding to the full tank error.

If the wiring to the main control board 1310 is disconnected while the full tank error is being notified (time t32), as in the case of FIG. 394, the power supply to the main control board 1310 is cut off and the function display unit 1400 is completely turned off. Meanwhile, because power continues to be supplied to the peripheral control board 1510 and various presentation devices, the full tank error display and presentation display on the LCD display device continue. After that, when the wiring to the main control board 1310 is reconnected, the power supply is resumed (time t33), the power-on process is executed, and the gaming machine is restarted.

When the restart of the gaming machine is completed (time t34), the wiring connection failure flag is cleared and the wiring reconnection flag is set. The setting of the wiring reconnection flag causes an illegal setting confirmation error to occur, which is notified by the setting display 974. At this time, a specific notification is executed by the function display unit 1400, and a command is sent from the main control board 1310 to the peripheral control board 1510 to notify that an error has occurred, causing an error screen to be displayed on the liquid crystal display device. Note that the operation to recover from the state in which the illegal setting confirmation error has occurred is to directly operate the power switch 932 to shut off the power and to change the settings when the power is turned on, as described above, and the game becomes available after the settings have been updated.

By configuring it as described above, if someone commits fraud by cutting off the power supply to the main control board 1310 while an error is occurring, it can be made to appear as if the error notification is continuing for the time being. This increases the likelihood that the person committing the fraud will remain in the situation until the error notification is lifted, even if they take advantage of the error occurrence to commit fraud, and is expected to allow hall employees to identify the fraudster.

In addition, in order to further enhance the fraud prevention effect of the above-mentioned embodiment, when a command is sent from the main control board 1310 to the peripheral control board 1510 to notify that an illegal setting confirmation error has occurred, the illegal setting confirmation error may be stored as history information in a history storage unit provided in the main control board 1310 or the peripheral control board 1510, and may be displayed on a liquid crystal display device or the like by accepting a predetermined history display operation. It is preferable that the history storage unit is supplied with a predetermined backup power source so that the history information is retained even if the power supply to the gaming machine is cut off. In addition, it is preferable that the history information of the illegal setting confirmation error includes date and time information extracted from a real-time clock provided in the main control board 1310 or the peripheral control board 1510, and that all or part of the date and time information when the wiring connection failure flag was set, the date and time information when the illegal setting confirmation error occurred, and the date and time information when the correct setting change operation was performed to resolve the illegal setting confirmation error are stored.

In addition, in order to further enhance the fraud prevention effect of the above-mentioned embodiment, since the fraudulent setting confirmation error is an extremely important error related to the fraudulent change of the setting value, it may be given a higher priority than other errors (e.g., errors related to the opening of the door frame 3, magnetic sensor errors, etc.), and error-related notification processing and output processing from the external terminal board 784 may be performed. Note that in terms of importance, it is equivalent to a RAM error, and it is desirable to set it to the same priority as a RAM error.

In the above embodiment, a gaming machine (multiple-stage setting gaming machine) was exemplified, which has multiple setting values 1 to 6 corresponding to multiple types of operation ratios for the condition device (i.e., the probability of winning a special symbol) and can be set to any of the setting values 1 to 6. However, a gaming machine (multiple-stage setting gaming machine) may have only one type of operation ratio for the condition device and can only set the corresponding setting value to setting value 1 (multiple-stage setting gaming machine), and may be equipped with the above-mentioned setting confirmation and setting change processes and various related components (setting keys, etc.) as dummies, and furthermore, can execute processes similar to the illegal setting confirmation error as dummies. For such a gaming machine (multiple-stage setting gaming machine) that can only set setting value 1, setting confirmation (actually only setting value 1 can be confirmed) and setting change (actually only setting value 1 can be set) are possible, but no damage to the hall will be caused by illegal confirmation or change of the setting value. Therefore, if a fraudster commits a fraudulent act using the wrong model, it may be possible to grasp the full extent of the fraudulent act and even catch the fraudster without suffering any damage, which could lead to a reduction in fraudulent acts.

[24. Special Condition Shortened Working Hours
[24-1. Overview of special conditions for shortened working hours]
In the gaming machine described above, whether or not to enter the time-saving state is determined in relation to the result of the special lottery. Therefore, unless the player wins the special lottery, the game state advantageous to the player, such as the time-saving state ( As a result, players may have to continue playing monotonous games for a long period of time without winning the special lottery, which may lead to a significant decline in interest in the game. there were.

In this embodiment, therefore, a gaming machine that can transition to a gaming state (time-saving state) that is advantageous to the player without winning the special lottery will be described. Specifically, the game machine transitions to the time-saving state if the player does not win the special lottery a predetermined number of times (special condition time-saving state). Note that the gaming machine of this embodiment is also capable of transitioning to the time-saving state based on winning the special lottery described above (normal time-saving state).

The time-saving state of this embodiment is described below. In the time-saving state, the winning probability of the lottery (normal lottery) to open the second starting port 2004 is set higher than in the normal state, and the opening time for opening the second starting port 2004 when the lottery is won is set longer. In this embodiment, the time-saving state is executed with the same content whether it is normal time-saving or special condition time-saving, but the number of times the time-saving state continues (time-saving times) and the opening time may be different depending on the type of special lottery result, whether it is normal time-saving or special condition time-saving, and other conditions for transitioning to the time-saving state. In addition, the probability of the normal lottery may be set high (100% winning is also possible) whether it is normal game mode or time-saving mode, and the opening time of the second starting port 2004 may be longer in the time-saving state than in the normal state.

In the gaming machine of this embodiment, the time-saving state ends when a special lottery is won and the game moves to the next game state based on the result of the special lottery. Also, if the special lottery is not won and the game is played a predetermined number of times, the game moves to the normal game state and the time-saving state ends. In this way, the time-saving state continues until a predetermined condition is met, such as winning the special lottery or playing a predetermined number of pattern changes (special lottery).

[24-2. Basic flow of special condition time reduction]
Next, the control of the special condition time reduction in the gaming machine of this embodiment will be described. The special condition time reduction of this embodiment is controlled so as to transition to the time reduction state when the number of consecutive times of failure to win the special lottery (time reduction transition count) reaches a predetermined number (time reduction transition count). Note that, since the special condition time reduction has an aspect of relief when it is difficult to win the special lottery, the time reduction transition count may not be updated when the probability of winning the special lottery is high.

In addition, in the normal game state, the second start port 2004 is not opened, so if the special lottery that occurs when a game ball enters the first start port 2002 is not won, the time-saving transition count is updated. Note that, if the game machine allows a win at the second start port 2004 even when not in the time-saving state, the time-saving transition count may be updated even if the second start port 2004 is won. In other words, as described above, if the normal lottery is set to be won with a high probability in the normal state as in the time-saving state, the game ball will enter the second start port 2004 in the normal state, so the time-saving transition count may be updated by this winning as well.

The time-saving transition count is updated by a process called from the special symbol/special electric device control process (step 01TKS0080) in the game play enabled process (Fig. 354), and the specific process content will be described later. The time-saving transition count may be updated by adding from 0, or by subtracting the number of time-saving transitions from an initial value. Examples of updating the time-saving transition count by adding and updating the time-saving transition count by subtracting will be described separately later.

When updating by addition, the game transitions to the time-saving state when the time-saving transition count reaches the number of time-saving transitions, and since the time-saving transition count stored in the main control RAM 1312 during execution of the game control program matches the actual time-saving transition count value, debugging and other management can be easily performed.

On the other hand, in the case of updating by subtraction, the time-saving state is entered when the time-saving transition count becomes 0. When updating by subtracting the time-saving transition count, the time-saving transition count will not become a value greater than the number of time-saving transitions, so it is possible to reduce the capacity of the area in the main control RAM 1312 that stores the time-saving transition count. In addition, it is possible to simplify the control related to the time-saving transition count when the time-saving transition count is reached; for example, when updating by adding to the time-saving transition count, control is required to stop the addition when the time-saving transition count is reached, but if the comparison value is 0, processing can be done with a single command, so control can be simplified and the program can be reduced in size and increased in speed.

When the game machine transitions to a time-saving state using the special condition time-saving function and the time-saving state continues a predetermined number of times without winning the special lottery, it transitions back to the normal game state. In this embodiment of the gaming machine, when the game machine returns to the normal game state from the time-saving state using the special condition time-saving function, it is configured not to transition back to the time-saving state using the special condition time-saving function until the time-saving transition count is cleared. This is because the number of time-saving transitions will not be reached again unless the conditions for clearing (initializing) the time-saving transition count are met. Naturally, if the time-saving transition count is cleared when the game machine returns to the normal game state, it becomes possible to transition to the time-saving state using the special condition time-saving function, and the game machine may be implemented in this way.

[25. Special Condition Time Reduction (Time Reduction Transition Count: Addition Update)]
As described above, the time-saving transition count for controlling the transition to the time-saving state by the special condition time-saving is updated by addition or subtraction. Here, an example in which the time-saving transition count is updated by addition will be described.

[25-1. Control of time-saving state by special condition time-saving]
[25-1-1. Control from start to end of time-saving state by special condition time-saving]
First, the control from the start to the end of the special condition time reduction will be described in chronological order with reference to the timing chart. The start condition of the special condition time reduction is to transition to the time reduction state when the special lottery has not been won 300 times (time reduction transition number) in a row after the time reduction transition count is cleared. The maximum number of times the time reduction state continues is 100 times, and the maximum number of times the time reduction state by the normal time reduction and the maximum number of times the time reduction state by the special condition time reduction are the same, but they may be different. The start condition of the special condition time reduction is preferably set such that the number of times after the time reduction transition counter is cleared is about three times the so-called jackpot probability (normal jackpot probability) (for example, 800 to 900 times). In addition, it is preferable that the number of times the time reduction by the special condition time reduction is granted is within a range of about three times the jackpot probability (for example, 900 times or less). The number of times the time reduction granted may be different for each setting, or may be the same regardless of the setting, but it is preferable that it is within a range of about three times in any setting.

Here, we will explain the state of each component in the control of transitioning to a time-saving state due to special condition time-saving. Figure 397 is a timing chart that explains the control of transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. The timing chart shown in Figure 397 explains the control from clearing the time-saving transition count due to winning the special lottery to transitioning to a time-saving state due to special condition time-saving.

Time t1 is the timing when the jackpot ending executed at the end of the jackpot game state resulting from winning the special lottery ends, that is, the timing when the game transitions to the time-saving state. While the jackpot game state continues, the value of the time-saving transition count in the pattern change of the special lottery that resulted in the transition to the jackpot game state is set. Referring to FIG. 397, the time-saving transition count, the remaining number of times that the special condition is satisfied, and the value of the time-saving transition count displayed on the performance display monitor are set to the same value from the transition to the jackpot game state until its end. Note that the remaining number of times of the state is set to the number of times the jackpot game state continues, so it may be set to "1", or the number of rounds in the jackpot game may be set. In addition to the value of the time-saving transition count, the performance display monitor may also display information on game performance such as base values and set values.

In the gaming machine of this embodiment, the time-saving transition count is cleared when the big win ending ends, that is, when the time-saving state is transitioned to. In the example shown in FIG. 397, the time-saving transition count is updated by adding to it, so the time-saving transition count is set to "0". Note that if the time-saving transition count is updated by subtracting it, the number of time-saving transitions (300 times) is set. Details of clearing the time-saving transition count will be provided later.

When the time-saving transition count is cleared, the remaining number of times the special condition is met is set to "300", and the remaining number of times the time-saving state is in the state is set to "100". The remaining number of times the special condition is met can be calculated based on the time-saving transition count and the time-saving transition count, so it may be calculated when necessary, for example, when a remaining number of times the special condition is met command, described below, is sent to the peripheral control board 1510. Note that when the time-saving transition count is updated by subtraction, the remaining number of times the special condition is met and the time-saving transition count will be the same value, and may be stored in the same variable within the program. This can reduce memory capacity.

Time t2 is the timing when the special symbol variable display is first executed after transitioning to the time-saving state. The time-saving transition count is updated when the special symbol variable display starts, and after updating, is reflected in the display on the performance display monitor. At this time, a command is sent to the peripheral control board 1510 to notify the special symbol variable pattern, a command to notify the symbol type of the stopped symbol, a command to notify the number of reserved special symbol variable displays, a command to notify the game state at the start of the variation (time-saving state), and a command to notify the number of remaining plays in the current game state. Details of the various commands are explained in FIG. 400.

Time t3 is the timing when the display of the special symbols ends. When the display of the special symbols ends, the number of times the special condition must be met is updated. At this time, a command to stop the display of the special symbols, a command to notify the game state when the display of the special symbols stops, and a command to notify the updated number of times the special condition must be met are sent to the peripheral control board 1510. Details of these commands are explained in Figure 400.

After that, when the stopped symbol is confirmed, the next variable display starts (time t4). Furthermore, when the variable display of the special symbol is executed a predetermined number of times (100 times) without winning the special lottery in the time-saving state, the time-saving state ends (time t5). At this time, the number of remaining states in the time-saving state becomes "0" and updates (counting) stop. Meanwhile, the time-saving transition count continues to be counted.

When the time-saving state ends, the game will transition to the normal game state. At this time, the number of times remaining in the normal game state is not updated because there is no need to manage it (it cannot be managed). Note that the number of times remaining in the normal game state when transitioning to the normal game state may be the remaining number of times a special condition is met. This is because if the special lottery is not won a predetermined number of times in a row (time-saving transition count = 300 times) after the time-saving transition count is cleared, the game will transition from the normal game state to the time-saving state, and the normal game state will end.

When the game progresses in the normal game state, the time-saving transition count reaches a predetermined number (time-saving transition count = 300 times) and the variable display ends (time t6), the remaining number of times that the special condition is met to transition to the time-saving state becomes 0, the special condition is met, and the game transitions to the time-saving state (special condition time-saving). When the game transitions to the time-saving state due to the special condition time-saving, the update of the time-saving transition count and the remaining number of times that the special condition is met stops. In addition, the remaining number of times the time-saving state can continue is set to an upper limit (100 times). Note that when the time-saving transition count reaches the upper limit, which is a predetermined number (time-saving transition count = 300 times), the value is maintained without being updated.

After that, if the special lottery is not won before the time-saving state reaches its maximum number of times (100 times) after the transition to the time-saving state due to the special condition time-saving, the game will transition to the normal game state (time t7). At this time, the end of the time-saving state due to the special condition time-saving is not a condition for clearing the time-saving transition count, so the values of the time-saving transition count and the remaining number of times the special condition is met are maintained, and the game will not transition to the time-saving state due to the special condition time-saving until the time-saving transition count is cleared.

By not making the end of the time-saving state due to the special condition time-saving feature a clearing condition for the time-saving transition count, it is possible to prevent consecutive transitions to the time-saving state due to the special condition time-saving feature. This makes it possible to prevent players' expectations from becoming too high. It also makes it possible to adjust the base value of the gaming machine so that it does not become too high, making it possible to play with appropriate settings.

[25-1-2. Clearing (initializing) the conditions for transition to the time-saving state due to special condition time-saving]
In the special condition time-saving mode in the gaming machine of this embodiment, as described above, the time-saving mode is entered when the special lottery is not won a predetermined number of times in succession after the time-saving transition count is cleared. In this embodiment, the conditions (special conditions) for clearing (initializing) the time-saving transition count are (1) when the gaming machine is initialized (RAM is cleared) in a predetermined procedure, and (2) when the special lottery is won (after the end of a jackpot game). (2) When the special lottery is won (after the end of a jackpot game) is as described above.

Here, we will explain the case where the gaming machine is initialized (RAM cleared) according to the predetermined procedure of condition (1). As described above, in the gaming machine of this embodiment, there are two types of operations for initializing the gaming machine (clearing the RAM): (a) operating the RAM clear switch 954 alone, and (b) operating the RAM clear switch 954 while operating the setting key 971.

In the gaming machine of this embodiment, (a) when the RAM clear switch 954 is operated alone (first operation), the time-saving transition count is cleared. On the other hand, (b) when the RAM clear switch 954 is operated while operating the setting key 971 (second operation; setting change operation), the time-saving transition count is not cleared. This is because if the setting key 971 needs to be operated to clear the time-saving transition count, it would be difficult to clear the time-saving transition count. By making it easy to clear the time-saving transition count, arcade employees can easily manage the special condition time-saving of the gaming machine.

Unlike the above example, (a) the time-saving transition count may not be cleared when the RAM clear switch 954 is operated alone, while (b) the time-saving transition count may be cleared when the RAM clear switch 954 is operated while the setting key 971 is operated. Whether or not to clear the time-saving transition count, which is a condition for granting a special condition time-saving, is directly related to gaming profits and is therefore important in terms of the operation of the amusement arcade. For this reason, if (b) the time-saving transition count is cleared by operating the RAM clear switch 954 while operating the setting key 971, the clearing management can be limited to authorized persons who have the key required to operate the setting key 971, making it easier to perform appropriate (safe) management in the amusement arcade.

[25-1-3. Updating the time-saving transition count after RAM clear operation]
Here, the control of the gaming machine when the first operation (RAM clear operation) and the second operation (setting change operation) are executed will be described. Before describing the control when each operation is executed, an overview of a case where the RAM becomes abnormal when the power is turned on will be provided.

When the power is turned on, the gaming machine of this embodiment first judges whether the set value is abnormal (a value other than 0 to 5). If the set value is judged to be abnormal, the set value is set to the initial value, the time-saving transition count is cleared, and the gaming state is set to the RAM abnormal state. If the set value is not judged to be abnormal, the checksum, power failure flag, and RAM outside the gaming area are then checked, and if any is judged to be abnormal, the RAM is also set to the RAM abnormal state. At this time, except when the set value is judged to be abnormal, the time-saving transition count is not cleared and the value before the power failure is maintained. After that, after the game is stopped due to the RAM abnormality, it is judged whether the RAM is abnormal (including during setting change/check) when the timer interrupt process is executed, and it is decided whether or not to execute the processing related to the game based on the judgment result.

Except when the first operation is performed, the time-saving transition count is only set to its initial value when the set value is determined to be abnormal or when a jackpot ending has finished; otherwise, the initial value is not set. In addition, no determination is made as to whether the value of the time-saving transition count is abnormal or not. The reason for not determining whether the time-saving transition count is abnormal is that if the set value is abnormal, there is a high possibility that the time-saving transition count is also abnormal, so it is considered sufficient to determine whether the set value is abnormal alone.

Next, the control when the first or second operation is executed and the gaming machine is powered on without determining that the setting value is abnormal will be described. Fig. 398 is a timing chart explaining an example of the control when the gaming machine of this embodiment is powered on by executing the first operation. Fig. 399 is a timing chart explaining an example of the control when the gaming machine of this embodiment is powered on by executing the second operation. The examples shown in Figs. 398 and 399 show control where the time-saving transition count is cleared in the case of the first operation (operating the RAM clear switch 954 alone) and the time-saving transition count is not cleared in the case of the second operation (operating the RAM clear switch 954 while operating the setting key 971).

The example shown in FIG. 398 explains the control of each component when the power is cut off while play is continuing in the normal game mode, and the power is turned on while the first operation is being performed. In this case, the time-saving transition count is cleared during the initialization process when the power is turned on.

When the power is cut off at time t11, the display of the special symbol changes is suspended and the performance display monitor is hidden. At this time, the backup power source causes the time-saving transition count to be retained in a specified area of the main control RAM 1312 even during the power outage. At this time, the value of the time-saving transition count is "249".

After that, when the RAM clear switch 954 is operated (first operation) and the power is turned on (time t12), the initialization process (FIG. 21, etc.) is executed. At this time, since the RAM clear switch 954 is operated, the game control work area of the main control RAM 1312 is cleared. Also, since the first operation is executed, the value of the time-saving transition count is also cleared during the initialization process (time t13). Also, in the gaming machine of this embodiment, the value of the time-saving transition count is not reflected in the display of the performance display monitor immediately after it is cleared, but is reflected in the performance display monitor process (step 01TKS0070) executed in the timer interrupt process executed after the initialization process is completed. Note that, when information is displayed on the performance display monitor after the power is turned on, the value of the time-saving transition count before the power cut is displayed on the performance display monitor. On the other hand, when the display of the performance display monitor is updated only in the performance display monitor process executed in the timer interrupt process, the value of the time-saving transition count is not displayed until the game is resumed, and the value of the time-saving transition count after the clearing ("0") is displayed after the game is resumed.

When the initialization process is complete, play resumes with the time-saving transition count value cleared (time t14). Because interrupts are permitted in the initialization process, timer interrupt processing is executed, and the time-saving transition count value cleared by the performance display monitor processing is reflected on the performance display monitor. Then, when a game ball enters the start winning hole, the variable display of the special pattern begins, and the time-saving transition count is updated when the variable display begins. Note that the time-saving transition count is updated after it is displayed on the performance display monitor, so the display on the performance display monitor is reflected in the next interrupt after the time-saving transition count is updated.

Next, referring to FIG. 399, we will explain the control of each component when the power is cut off while play is continuing in the normal game mode, and the power is turned on while the second operation is being performed. In this case, the setting change function is executed during the initialization process when the power is turned on, but the value of the time-saving transition count before the power was cut off is maintained.

When the power is cut off at time t21, the display of the special symbol variations is stopped and the performance display monitor is hidden, similar to the state at time t11 shown in FIG. 398. Thereafter, when the power is turned on (time t22) while operating the RAM clear switch 954 and the setting key 971 (second operation), the initialization process is executed. At this time, the game control work area of the main control RAM 1312 is cleared, but the value of the time-saving transition count is maintained. After the initialization process is executed, the mode transitions to setting mode (time t23). During the setting mode, the setting value is displayed on the performance display monitor.

In the gaming machine of this embodiment, it is possible to specify an area and clear the game control work area. For example, even if the power is turned on while operating the RAM clear switch 954, the area in which the setting value information is stored is not initialized (RAM cleared) and the memory contents are maintained. Therefore, when performing the second operation to initialize the gaming machine, the area in which the time-saving transition count is stored is excluded from the target for initialization (RAM clearing), and the gaming machine is restarted while maintaining the time-saving transition count.

In this way, if the gaming machine is initialized while performing the second operation, the time-saving transition count (249) before the power outage remains maintained even after the initialization process is executed. Then, after game play is resumed at time t24, the value of the time-saving transition count before the power outage (time t21) is displayed when the display of the special symbol changes begins. After that, when a gaming ball enters the start winning hole, the display of the special symbol changes begins, the time-saving transition count is updated when the display of the special symbol changes begins, and the updated time-saving transition count is displayed on the performance display monitor by the performance display monitor process executed at the next interrupt timing.

In addition, if a value equivalent to the time-saving transition count is displayed on the screen of the liquid crystal display device to notify the player of the occurrence of a special condition time-saving, the screen will remain displayed even if the time-saving transition count is cleared. The screen display of the liquid crystal display device is controlled by the peripheral control board 1510, and the display is updated based on a command sent from the main control board 1310 when play is resumed to notify of a value equivalent to the time-saving transition count. This eliminates the need for special control on the part of the peripheral control board 1510 to clear the time-saving transition count, making it possible to prevent the control from becoming complicated. Note that the display content on the screen may be cleared in the event of an abnormality, etc.

The gaming machine of this embodiment also has a means for checking the value corresponding to the time-saving transition count, regardless of whether or not the value corresponding to the time-saving transition count is displayed on the liquid crystal display screen. The checking means may display the value on the liquid crystal display device, may be a display such as the function display unit 1400, or may be another display. Note that, as described above, in the gaming machine of this embodiment, the value of the time-saving transition count is displayed on the performance display monitor.

When the time-saving transition count is cleared, a common notification sound is output for the first operation and the second operation. In addition, in the case of the second operation, the notification sound may be output at the timing of the operation of the setting key 971. At this time, the process of clearing the RAM may be executed after the setting change is confirmed, or the RAM may be cleared in advance before the setting change and then the setting change is confirmed. The output of the notification sound can be ended by a predetermined operation. For example, the operation of the RAM clear switch 954 may be ended, or the power of the gaming machine may be turned off. When the first operation and the second operation are executed, not only the notification sound but also the screen display of the liquid crystal display device may be made common. In this case, it is not necessary to make all of the screen display common, and it is sufficient that at least a part of it is common. This prevents the player from recognizing whether the time-saving transition count has been cleared due to an abnormality occurring during play, and suppresses discomfort to the player.

It is also possible to use different notification sounds for the first operation (RAM clearing operation) and the second operation (settings change operation). In this case, a common sound is output as background music, and different notifications are output as sound effects and voice (for example, when the RAM is cleared, the voice output is "RAM has been cleared," and when the settings are changed, the voice output is "Settings have been changed"), making it possible to distinguish between situations in which the RAM has been initialized.

As described above, an example has been described in which the time-saving transition count is cleared when (a) the RAM clear switch 954 is operated alone, and the time-saving transition count is not cleared when (b) the RAM clear switch 954 is operated while the setting key 971 is being operated. However, the time-saving transition count may be controlled not to be cleared when (a) the RAM clear switch 954 is operated alone, and cleared when (b) the RAM clear switch 954 is operated while the setting key 971 is being operated. Furthermore, the time-saving transition count may be cleared in both cases, (a) when the RAM clear switch 954 is operated alone, and (b) when the RAM clear switch 954 is operated while the setting key 971 is being operated.

In addition, in both operations (a) and (b), the RAM is cleared and the data contents related to the monitor display are also reset (cleared). From the perspective of hall management, it is considered convenient to be able to perform this operation all at once when clearing the time-saving transition count, so the monitor display is also cleared. Note that since the monitor display is updated when the time-saving transition count is updated, it is possible to leave it as it is without resetting (clearing) the RAM when it is cleared. This eliminates the process of resetting (clearing) the monitor display, and therefore reduces the program capacity.

[25-2. Commands related to special condition time reduction]
In the control performed from the start winning into the first start opening 2002 to the end of the variable display of the special symbol based on the special lottery due to the start winning, various commands are sent from the main control board 1310 to the peripheral control board 1510 in order to execute effects according to the progress of the game. Effects corresponding to special condition time reduction are also executed based on these commands. Each command will be explained below.

Figure 400 is a diagram showing an example of a command sent from the main control board 1310 to the peripheral control board 1510 in the gaming machine of this embodiment. The commands shown in Figure 400 are only a part of the commands, and various commands may be included as necessary in addition to the examples shown in the figure. A command is mainly composed of a "status" that indicates the type of command, and a "mode" that indicates the detailed content of the command, each of which is 2 bytes.

[25-2-1. Special drawing prize related commands]
When a start win occurs at the first start port 2002, a special lottery is executed in the special symbol/special electric role control process, and commands related to the start win and the special lottery are sent to the peripheral control board 1510. For example, commands include commands to instruct the execution of a performance associated with a start port win (increase in the number of pending operations) and a pre-reading performance based on the results of a pre-determination of the special lottery. The pre-determination of the special lottery is executed based on the start memory (random number value) acquired at the time of the start win.

In the table shown in Figure 400, the commands classified as "Special Winning" correspond to these commands. The "Starting Gate Winning Command" is sent when the game ball wins in the starting winning gate. At this time, a different command may be sent for each starting gate, or may be specified by the value of "Mode."

The "command to specify the number of reserved special figures when winning" is a command for transmitting the number of reserved figures in operation when the winning jackpot is won at the start port. It is transmitted when the winning jackpot is won at the start port, i.e., when the number of reserved figures in operation increases, and may be transmitted only when the advance lottery is won and a pre-reading performance can be executed. Note that the peripheral control board 1510 may decide whether or not to actually execute the pre-reading performance, or a pre-reading performance (a so-called fake performance) may be executed even if the winning jackpot is not won.

The "command to specify the number of reserved special symbols when winning" may set different "status" for special symbol 1 and special symbol 2, as in the "command to specify the number of reserved special symbols when fluctuation starts", and specify the number of reserved symbols to be activated in "mode". On the other hand, the "status" may be a common value, with the higher bits of "mode" specifying either special symbol 1 or special symbol 2, and the lower bits specifying the number of reserved symbols to be activated.

The "special symbol type read ahead command" and the "variation pattern read ahead command" are sent when the special lottery is pre-determined and may be sent together with the "special symbol reserved number designation command when winning", but they may be sent before the pre-read performance is executed by the peripheral control board 1510. The "special symbol type read ahead command" is a command that notifies the type of special symbol (stopping symbol) specified at the time of the pre-determination of the special lottery (type of winning). The "variation pattern read ahead command" is a command that notifies the variation pattern of the variation display of the special symbol. The "special symbol type read ahead command" and the "variation pattern read ahead command" may be separate commands as different "status" for special symbol 1 or special symbol 2, or may be distinguished by the "mode" value as a common "status" value.

[25-2-2. Special chart change related commands]
If the special symbol variable display continues after the start hole is won, the start memory acquired at the time of the start win is held up to a predetermined number. When the ongoing special symbol variable display ends, the special symbol variable display based on the reserved start memory starts. When the special symbol variable display starts, a command related to the special symbol variable display game (special symbol variable display) corresponding to the result of the special lottery and a command related to the game state when the special symbol variable display game is being executed are transmitted.

In the table shown in FIG. 400, the commands classified as "special pattern change" correspond to these commands. Change pattern commands, pattern type commands, and pattern stop commands for special pattern 1 and special pattern 2 are sent to the peripheral control board 1510. Special pattern 1 or special pattern 2 may be specified by "status", or it may be specified by "mode". In the example shown in FIG. 400, special pattern 1 or special pattern 2 is specified by "status", and different values are set to "status" depending on whether it is special pattern 1 or special pattern 2 to distinguish them. An overview of each command is provided below. Special pattern 1 is described here, but the same configuration is used for special pattern 2.

The "command to specify the number of reserved special symbols at the start of fluctuation" is a command to transmit the number of reserved activations when the display of the fluctuation of the special symbols begins. It is transmitted when the special symbols start to fluctuate, i.e., when the number of reserved activations decreases. Separate "status" may be set for special symbol 1 and special symbol 2, and the number of reserved activations may be specified in "mode". Alternatively, "status" may be a common value, with the upper byte of "mode" specifying either special symbol 1 or special symbol 2, and the lower bit specifying the number of reserved activations.

The "Special Pattern 1 Change Pattern Command" is a command that notifies the change pattern in the change display of special pattern 1, and is sent when special pattern 1 starts to change. The "Special Pattern 1 Pattern Type Command" is a command that notifies the type of pattern in the change display of pattern 1 as a result of a special lottery, and is sent when special pattern 1 starts to change, specifically, immediately after the "Special Pattern 1 Change Pattern Command" is sent.

The "Special Pattern 1 Stop Command" is sent when the variable display of Special Pattern 1 ends, i.e., after the variable time has elapsed. When the peripheral control board 1510 receives the "Special Pattern 1 Stop Command", it ends the presentation related to the variable display of Special Pattern 1 and displays the results of the special lottery.

The "Special pattern 2 change pattern command," "Special pattern 2 design type command," and "Special pattern 2 design stop command" notify the peripheral control board 1510 of information about special pattern 2 instead of special pattern 1.

[25-2-3. Status related commands]
Furthermore, a command for notifying information regarding the game state is transmitted from the main control board 1310 to the peripheral control board 1510. The peripheral control board 1510 executes a presentation according to the game state based on the notified command. The command for notifying information regarding the game state includes a command for notifying the current game state and a command for notifying information regarding a transition to another game state.

In the table shown in FIG. 400, the commands classified as "state" correspond to these commands. The "power-on state command" is a command that notifies the game state when the power is turned on, and notifies the peripheral control board 1510 of the game state identified from the information in the RAM backed up after recovery from a power outage, and causes the execution of a performance corresponding to that game state.

The "Special symbol change state command" is a command that notifies the game state when the special symbol starts changing, and executes an effect that corresponds to the notified game state as necessary. At this time, the "status" may be different for each game state to distinguish the commands, or the "mode" may be used as a common "status" to distinguish them.

The "state end command when special symbol stops" is a command that notifies the game state when the special symbol fluctuation ends, and executes a performance corresponding to the notified game state as necessary (for example, when the game state changes). In addition, when this command is received, parameters related to the game state may be updated (initialized).

The "remaining state count command" is a command that notifies the remaining number of times the current game state will continue (the number of times the special chart change display game will be executed). The remaining state count, decremented as the game progresses, is notified. Because the remaining state count can be set to a value (2 bytes) greater than 1 byte (255), it is sent in separate commands, one for sending the upper byte and one for sending the lower byte. The "destination command at change end" is a command for specifying the destination game state when transitioning from the current game state to another game state.

In addition, a transition to another game state may be determined by a change in the "remaining state count command" instead of the "state end command when special chart stops." In this case, the transition of the game state can be determined when the remaining state count changes from "1" to "0." The normal game state continues unless a certain condition is met (for example, a special lottery is won and a transition to the time-saving state occurs), so the remaining state count for the normal game state cannot be defined. Therefore, for reasons such as simplifying the program, it is possible to implement the program so that the command continues to be sent with the remaining state count at "0." In this case, it is necessary to determine the transition of the game state based on the change in the remaining state count, rather than based solely on the remaining state count.

In addition, by notifying the remaining number of times, it is possible to execute a countdown effect that suggests a transition in the game state. For example, in the countdown effect, notification of the remaining number of times until the transition to the time-saving state reaches a specific number begins, and the normal effect continues until this specific number is reached.

Furthermore, depending on the notified remaining number of states, it is possible to suppress the execution of the look-ahead performance to prevent discrepancies between the contents of the look-ahead performance and the actual lottery results due to differences between the game state at the time of the start winning and the game state at the time the lottery is executed. For example, if the tables of the fluctuation patterns are separated for the time-saving state and the non-time-saving state, the look-ahead performance is prohibited for a specified remaining number of times (maximum number of reserved times) at which the time-saving state fluctuation pattern table is switched to.

Even if the countdown effect is being executed and the execution of the look-ahead effect is stopped, the probability of winning does not change, but there is a possibility of winning the special lottery. Therefore, in the gaming machine of this embodiment, if the special lottery is won while the countdown effect is being executed, the countdown effect is interrupted and ends without being restarted, even if there are remaining executions of the countdown effect. This is because if the special lottery is won, the game will transition to a different game state than the one suggested by the countdown effect.

The countdown effect is also interrupted if a RAM abnormality occurs during the execution of the countdown effect. In this case, even if the gaming machine can be restarted normally, the execution of the countdown effect being executed is stopped and gameplay is resumed in normal game mode. This is because restarting the gaming machine (returning the power on) to eliminate the RAM abnormality initializes values such as the number of remaining states, so gameplay cannot be continued from the state before the interruption. The countdown effect is also interrupted if a magnetic abnormality other than a RAM abnormality is detected and gameplay is stopped, and gameplay will resume in normal game mode even if the magnetic abnormality is eliminated. Since a magnetic abnormality cannot occur in normal game mode (it can only occur due to fraudulent operation), the countdown effect is interrupted to intentionally reduce interest in the game.

Furthermore, if a minor problem such as ball jamming occurs and the door is opened to resolve the problem, the countdown effect is temporarily suspended. In this case, the game can be continued by reclosing the open door after the ball jam is resolved, and the suspended countdown effect is resumed. In other words, if the door is opened during the countdown effect, the countdown effect is temporarily suspended, but resumed when the door is closed. Since ball jamming is a problem that can occur without being caused by fraudulent activity, and the door opening is also performed as part of general maintenance, there is a risk of reducing interest in the game by restarting the game from the initial state without resuming the effect after it has been suspended, and therefore the gaming machine of this embodiment is controlled to continue the game.

The gaming machine of this embodiment has multiple factors that can interrupt the execution of the countdown performance, and depending on the interruption factor, it is possible to determine whether to resume the countdown performance or leave it paused and not resume it. Therefore, if a factor that allows resumption occurs during the countdown performance, the countdown performance can be resumed after the interruption factor is resolved, preventing a decrease in the entertainment value of the game. Also, if the interruption factor involves a special situation (such as a RAM abnormality), the countdown performance is not allowed to resume, thereby preventing the countdown performance from resuming even in situations where it would not normally be executed.

In addition, even if the remaining number of times that the special condition is satisfied reaches a predetermined number of times that switches to the time-saving state variation pattern table, the execution of the look-ahead effect may be performed without being prohibited. At this time, a look-ahead effect different from the usual one may be performed. For example, if the remaining number of times that the special condition is satisfied (the remaining number of times until the time-saving state is switched to) is won in a lottery by a start memory that is reserved within a predetermined number of remaining times, an effect that notifies the player that the special condition time-saving will not occur (special condition time-saving occurrence suppression effect) may be performed. In this way, it is possible to suggest to the player that a jackpot will occur by executing an effect that notifies the player that the special condition time-saving will not occur even though the special condition time-saving should occur originally. In this way, the special condition time-saving function is activated after the end of a predetermined number of variations from the end of a jackpot (or the end of probability variation), but when a predetermined condition is satisfied (for example, when the remaining number of times until the time-saving state is switched to is won in a lottery by a start memory that is reserved within a predetermined number of remaining times), it is determined internally to suppress the activation of the special condition time-saving function, and a special look-ahead effect (special condition time-saving suppression effect) may be performed during the period when the remaining number of times display is displayed a predetermined number based on this decision.

As described above, by notifying the peripheral control board 1510 of the remaining number of states from the main control board 1310, it is possible to provide presentations that suggest useful information to the player, thereby diversifying the presentation variations and reducing discrepancies between the presentation content and the actual lottery results, thereby increasing the interest of the game.

As described above, in the gaming machine of this embodiment, if the special lottery is not won a predetermined number of times after the time-saving transition count is cleared (initialized), the machine transitions to a time-saving state (special condition time-saving). Therefore, the number of consecutive times the special lottery is not won (time-saving transition count) is counted by the main control board 1310. Then, the main control board 1310 creates a "remaining number of times that the special condition is met command" based on the counted time-saving transition count, and sends it to the peripheral control board 1510. When the time-saving transition count is updated by addition, the remaining number of times that the special condition is met is calculated from the difference between the time-saving transition count and the time-saving transition count. When the time-saving transition count is updated by subtraction, the time-saving transition count can be made to correspond to the remaining number of times that the special condition is met.

The main control board 1310 may also send only a command indicating the value of the time-saving transition count, without generating a command for the remaining number of times that the special condition is satisfied and sending it to the peripheral control board 1510. At this time, the peripheral control board 1510 calculates the remaining number of times until the special condition is satisfied by executing a predetermined calculation process based on the command indicating the value of the time-saving transition count. Specifically, when the time-saving transition count is cleared, it is set to "0", and when the time-saving transition count is added and updated, the calculation result with the time-saving transition count managed by the peripheral control board 1510 (time-saving transition count - command value (time-saving transition count)) is displayed as the remaining number of times. Note that, if the number of time-saving transitions differs for each model (series), the model may be identified from a command including the model specifications received when the power is turned on, and the time-saving transition number may be selected from a predefined time-saving transition count table. On the other hand, when the time-saving transition count is set when the time-saving transition count is cleared, and when the time-saving transition count is updated by subtracting it, the count value of the command indicating the value of the received time-saving transition count may be used as it is and displayed as the remaining number of times.

When the remaining number of times that the special condition is met becomes "0" and the game state transitions from the normal game state to the time-saving state due to the special condition time-saving function, the value of the remaining number of times that the special condition is met is maintained at "0" while the time-saving state continues. Furthermore, if the game transitions back to the normal game state from the time-saving state due to the special condition time-saving function, the time-saving transition count is not cleared, so the remaining number of times that the special condition is met is maintained at "0". Therefore, as described above, in the gaming machine of this embodiment, even if the game returns to the normal game state from the time-saving state due to the special condition time-saving function, it is not possible to transition back to the time-saving state due to the special condition time-saving function until the time-saving transition count is cleared. In other words, even in the same normal game state, there are cases where the special condition time-saving occurs and cases where it does not occur.

In addition to the commands shown in FIG. 400, commands classified as "state" include a "power-on state command" that notifies the game state when the power is turned on, and a "power-on return destination command" that is sent immediately after the "power-on state command" and can specify the destination to which game control will be returned.

[25-3. Control during transition to time-saving state]
The normal time-saving state is the same as the conventional control, and after the special lottery is won and the jackpot game state that occurs when the consecutive operation device of the special device is activated ends, the game transitions to the time-saving state. The presentation during the time-saving state is also the same as the conventional game control (presentation by the normal time-saving state), and for example, a presentation is executed such as setting a background different from that in the normal game state.

In the special condition time-saving mode in the gaming machine of this embodiment, as described in FIG. 397, after the time-saving transition count is cleared, if the special lottery is not won a predetermined number of times (time-saving transition count; 300 times in this embodiment) in a row (if the special condition is realized), the game transitions to the time-saving state. Specifically, the game transitions to the time-saving state when the remaining number of times the special condition is realized becomes 0 from 1. When the time-saving transition count is updated by addition, the remaining number of times the special condition is realized is a value obtained by subtracting the time-saving transition count from the time-saving transition count, and is updated after the display of the special pattern changes. Note that when the time-saving transition count is updated by subtraction, it may be shared with the time-saving transition count. When the remaining number of times the special condition is realized becomes 0, the game state is transitioned from the normal game state to the time-saving state in the game-ready processing of the timer interrupt processing. At this time, the upper limit number (100 times) is set for the remaining number of times in the time-saving state.

Here, an example of the screen transition (presentation mode) when transitioning to the time-saving state due to a special condition time-saving will be described. Fig. 401 is a diagram showing an example of the screen transition when transitioning to the time-saving state due to a special condition time-saving in the gaming machine of this embodiment. In the example shown in Fig. 401, (A) shows a state in which the patterns have stopped during the last pattern change in the normal gaming state before transitioning to the time-saving state. In the gaming machine of this embodiment, no presentation such as a countdown presentation is executed until the change immediately before transitioning to the time-saving state, but as shown in (B), a time-saving entry presentation is executed when transition to the time-saving state is confirmed.

When the transition to the time-saving state is approaching, a countdown effect may be executed that displays the number of remaining changes until the transition to the time-saving state. For example, when the number of remaining changes is a predetermined number or less (e.g., 10 times), the remaining number of changes may be displayed. Also, without clearly indicating the remaining number, a character may appear or the background color may be changed to suggest the transition to the time-saving state.

In the gaming machine of this embodiment, when the game enters the time-saving state, the background for the normal game state is changed to the background for the time-saving state, so that the player can recognize that he or she has entered the time-saving state. After the time-saving entry effect is executed, the time-saving state screen shown in (C) is displayed. The background of the time-saving state screen has a different appearance from the normal game state screen, and in the example of FIG. 401, for convenience, the background of the normal game state screen is a single color (colorless), while the background of the time-saving state screen is shaded. In reality, it is sufficient that the normal game state screen and the time-saving state screen are different, and in addition to the background color, the appearance of the effect pattern may be different, or different characters may be displayed.

In addition, in the time-saving state of the gaming machine of this embodiment, the game ball is shot into the area to the right of the play area (right hit), so the instruction to hit right is displayed on the time-saving state screen. Also, the number of times the time-saving state will continue is displayed. Note that it is not necessary to display these contents, and other information may be displayed instead.

When the variable display pattern stops when a special condition is met (Fig. 401 (A)), a special pattern stop command and a special pattern stop state end command are sent to the peripheral control board 1510. The peripheral control board 1510 recognizes that the current game state (normal game state) will end due to the special pattern stop state end command, and further, after the pattern determination time has elapsed, the special condition met remaining number of times command notifies that the number of times remaining for the special condition to be met is 0, and it can determine that a transition to a time-saving state due to special condition time-saving will occur. When a transition to a time-saving state due to special condition time-saving is determined, the peripheral control board 1510 is able to execute a time-saving state entry performance (Fig. 401 (B)).

When the special symbol starts to change (Fig. 401 (C)), the main control board 1310 transmits a change start command, as well as a special symbol change state command, a change pattern command, and a change symbol type command. These commands specify the change time and content of the performance associated with the special symbol change display based on the game state and the result of the special lottery. Specifically, a change pattern table for selecting a change pattern is specified, a change pattern is selected from the specified change pattern table, and the corresponding performance is executed. An example of the change pattern table will be described later in Fig. 403. In addition, a remaining state number command that notifies the remaining number of times in the time-saving state is transmitted together with these commands. The notified remaining state number command can be used to execute a countdown performance that indicates the number of times the time-saving state will end. In the example shown in Fig. 401 (C), the remaining number of times (100 times) in the time-saving state specified by the remaining state number command is displayed on the screen.

When the special pattern stops changing, a special pattern stop command is sent from the main control board 1310. At this time, a special condition remaining number of times to be met command is sent with the remaining number of times the special condition is met set to "0", and the sending of the special condition remaining number of times to be met command continues until the time-saving transition count is cleared. Note that when the remaining number of times the special condition is met reaches 0, the sending of the special condition remaining number of times to be met command may be prohibited until the time-saving transition count is cleared.

[25-4. Control at the end of time-saving state]
Next, the control at the time of the end of the time-saving state will be explained. As mentioned above, the time-saving state ends when the special lottery is not won for a certain upper limit number of times. Note that even if the special lottery is won, the ongoing time-saving state ends, but the time-saving transition count is cleared and a new time-saving state by the normal time-saving state starts.

In the time-saving state due to normal time-saving, the time-saving transition count continues to be updated, so after switching from the time-saving state to the normal game state, if the remaining number of times the special state is achieved reaches 0, the state will transition to the time-saving state due to special conditions. On the other hand, in the time-saving state due to special conditions, the time-saving transition count stops updating when switching to the time-saving state, and the special condition will not be achieved until the time-saving transition count is cleared, so the state will not transition to the time-saving state due to special conditions.

Therefore, in the gaming machine of this embodiment, even in the time-saving state, the time-saving transition count may or may not be updated. In this case, the difference in the presentation mode during the time-saving state may allow the player to recognize whether the time-saving transition counter is being updated or not. If the player can recognize that the time-saving transition counter is being updated, it is possible to make the player look forward to transitioning back to the time-saving state even after the ongoing time-saving state ends, thereby heightening the player's expectations and improving the enjoyment of the game.

Regarding the difference in the presentation mode while the time-saving state continues, for example, content such as "Time-saving transition counter updating" or "Time-saving transition counter stopped" may be displayed in the background portion, or may be displayed in the background portion of the presentation pattern. Also, different presentation patterns may be displayed depending on whether the time-saving transition counter is updated or not. Also, the background display of the entire screen may be made different, or a character indicating whether the time-saving transition counter is updated or not may be displayed.

Therefore, in the gaming machine of this embodiment, the presentation mode when the time-saving state ends due to normal time-saving is different from the presentation mode when the time-saving state ends due to special condition time-saving. Specifically, when the time-saving state ends due to normal time-saving, an explicit time-saving state end presentation is executed, directly or indirectly suggesting the transition to the next time-saving state, and then transitioning to the normal game state. On the other hand, when the time-saving state ends due to special condition time-saving, no time-saving state end presentation is executed, and the game transitions directly to the normal game state. Note that regardless of which time-saving state ends, presentations such as a change in the background based on the transition to the normal game state are executed, so the player can recognize the end of the time-saving state itself.

Here, we will explain the specific presentation mode when the time-saving state ends, with reference to FIG. 402. FIG. 402 is a diagram showing an example of the screen transition when the time-saving state ends in the gaming machine of this embodiment. FIG. 402(A) shows a state where there is only one time left in the time-saving state, that is, the time-saving state will end with the next change.

If the currently running time-saving state is a time-saving state due to a special condition time-saving state, the normal presentation in the time-saving state is executed even if it is the last variable display (Fig. 402 (B1)). Then, the last variable display ends, and the stop pattern is displayed (Fig. 402 (C1)). In other words, in the case of a time-saving state due to a special condition time-saving state, even the 100th variable display is controlled in the same way as the 1st to 99th variable displays, and the presentation content is selected based on a common variable pattern table from the start to the end of the time-saving state.

When the display of the changing patterns ends with the final change in the time-saving state, the game transitions to the normal game mode. When the time-saving state due to the special condition time-saving state ends, no ending effects are performed, the background display is switched to the display for the normal game mode, and the right-hand hit display for the time-saving state (arrows, text display, etc.) is hidden. Furthermore, if there is a reserved memory, the display of the changing patterns begins (Fig. 402 (D)), and the game continues as is.

On the other hand, when the time-saving state is due to normal time saving, a special effect is executed at the time of the last variable display to indicate the end of the time-saving state (Fig. 402 (B2)), and furthermore, after the stopped display of the pattern, an end effect is executed to notify the end of the time-saving state (Fig. 402 (C2)). The special effect and the end effect may be a series of effects or may be separate effects.

The shortened miss fluctuation time other than the reach of the special symbol in the normal time reduction and the special condition time reduction may be the same, or the shortened miss fluctuation time other than some of the reaches may be different. However, the stop period at the time of miss in the final fluctuation (the period until the next fluctuation starts) is made longer in the normal time reduction than in the special condition time reduction. This makes it possible to secure the presentation time when transitioning from the normal time reduction to the normal game state, and increases the interest of the game by smoothing the flow of executing the end presentation. On the other hand, the stop period due to the final fluctuation of the special condition time reduction is the same or almost the same as the stop period other than the final fluctuation.

At the end of the time-saving state due to the normal time-saving, unlike the time-saving state due to the special condition time-saving, the last (100th) change display is controlled differently from the change display from the 1st to the 99th. At this time, the presentation content is selected based on a change pattern table (Fig. 403(B)) different from the common change pattern table (Fig. 403(A)). This allows, for example, the change time of the final change in the time-saving state due to the normal time-saving to be longer than the final change in the time-saving state due to the special condition time-saving, and increases the player's expectations for the subsequent game. In addition, instead of switching the change pattern table only for the final change, it is also possible to switch in stages according to the number of changes. For example, it is possible to switch at each stage from the 1st to the 50th, from the 51st to the 80th, from the 81st to the 90th, and from the 91st to the 99th. For the 100th change, the presentation period after the end of the change is set to be longer than the presentation period defined in the change pattern table of each stage.

Figure 403 is an example of a fluctuation pattern table in this embodiment. (A) is a table commonly used during the normal time-saving state, and may be used in combination with game states other than the time-saving state (for example, the normal game state). (B) is a special table used in the case of the final fluctuation of the time-saving state due to normal time-saving. The commonly used table (A) and the special table (B) used in the final fluctuation of the time-saving state due to normal time-saving differ in the fluctuation time and presentation content in the case of a shortened fluctuation in which the result of the special lottery is a miss. Note that if the result of the special lottery for the final fluctuation is a jackpot, special presentations etc. will not be executed, and a normal jackpot presentation can be executed.

After that, when the pattern stops in the final variable display, the game transitions to the normal game state, just as in the case of the time-saving state due to the special condition time-saving (Fig. 402 (D)), and play continues as is. When the game transitions to the normal game state, play proceeds with the same presentation regardless of whether the time-saving state that was being executed was due to the special condition time-saving or normal time-saving. Therefore, if the player does not check the special presentation or end presentation at the end of the time-saving state, it will be impossible to determine whether the special condition will be met in subsequent play. This will encourage the player to pay close attention to the series of presentations, enhancing the effectiveness of the presentations.

Except for the final change, the presentation during the time-saving state is the same whether it is due to special condition time-saving or normal time-saving. By executing a special presentation during the final change of the time-saving state due to normal time-saving, it is possible to suggest that a time-saving state due to special condition time-saving will occur if the player does not win the special lottery a predetermined number of times thereafter, heightening the player's expectations and making the game more enjoyable.

As described above, in the gaming machine of this embodiment, the normal gaming state after the end of the time-saving state due to the normal time reduction is more advantageous to the player than the normal gaming state after the end of the time-saving state due to the special condition time reduction. Specifically, after the end of the time-saving state due to the special condition time reduction, the game moves to the normal gaming state in which the time-saving state due to the special condition time reduction does not occur again, whereas after the end of the time-saving state due to the normal time reduction, the game moves to the normal gaming state in which the time-saving state due to the special condition time reduction can occur, which is an advantageous gaming state for the player. In addition, the normal gaming state after the end of the time-saving state due to the normal time reduction may be made more advantageous to the player by shortening the time for which the special symbols change compared to the normal gaming state after the end of the time-saving state due to the special condition time reduction. In addition, in the normal gaming state after the end of the time-saving state due to the normal time reduction, it may be made easier to execute effects that suggest the setting value information of the gaming machine, or it may be made easier to execute various look-ahead effects.

The above describes the presentation mode when the time-saving state ends, but we will supplement this with a description of the relationship with the commands received from the main control board 1310 to control the presentation described above. The peripheral control board 1510 can determine the end of the time-saving state by the state end command when the special pattern stops, but because this is sent when the pattern stops for the final change that ends the time-saving state, only limited presentations can be executed when executing presentations based on the end of the time-saving state, which can cause inconvenience. For example, because the presentation to end the time-saving state can only be executed after the pattern change has ended, only short presentations with many restrictions can be executed, which may prevent the execution of highly interesting presentations.

As described above, in the gaming machine of this embodiment, a special effect different from the usual one is executed at the final pattern change of the time-saving state due to the normal time-saving, as described above. In addition, if the end of the time-saving state is determined only by the state end command when the special pattern is stopped, there is a risk that the special effect (end effect) will not be sufficiently interesting. Therefore, by specifying the end timing of the time-saving state based on the remaining state count of the time-saving state contained in the remaining state count command, it is possible to execute an effect including one or more changes before the end of the time-saving state. For example, by determining the end of the time-saving state at the timing when the remaining state count changes from 1 to 0, a special effect can be executed at the final change of the time-saving state. Since the remaining state count command is sent at the start of the pattern change, it can be determined that the final change of the time-saving state is when the remaining state count is 1.

However, although it is possible to specify the timing of the end of the time-saving state in advance based on the remaining number of states, it is not possible to determine whether the time-saving state being executed is due to normal time-saving or special condition time-saving. Here, in the case of a time-saving state due to normal time-saving, the remaining number of times that the special condition is satisfied continues to be updated and is at least a value greater than 0 (Fig. 397). On the other hand, the execution of the time-saving state due to special condition time-saving is after the special condition is satisfied, and the remaining number of times that the special condition is satisfied is 0. The remaining number of times that the special condition is satisfied is transmitted from the main control board 1310 by the remaining number of times that the special condition is satisfied command when the pattern determination time has elapsed after the pattern has stopped, and it is determined whether the time-saving state being executed is due to normal time-saving or special condition time-saving based on the remaining number of times that the special condition is satisfied together with the remaining number of times that the time-saving state is satisfied, and whether or not to execute a special performance is determined. Then, if the time-saving state is due to normal time-saving, a special performance different from the normal performance is executed by referring to a variation pattern table different from the normal performance in the final pattern variation, while if the time-saving state is due to special condition time-saving, the common variation pattern table is referenced and the special performance is not executed.

As a result, by changing only the reference for the variation pattern table, other controls can be made common, making it possible to execute distinctive presentations while minimizing the complexity of game control (presentation control).

In addition, when the game state changes from the normal game state to the time-saving state, or from the time-saving state to the normal game state, the execution of the look-ahead performance may be stopped before and after the change in game state. This is because when transitioning to the time-saving state due to the normal time-saving, the result of the special lottery may be highly likely, which may cause a discrepancy in the pre-determination results. In addition, since the presentation mode changes depending on the game state, this is to prevent the presentation control from becoming complicated and the player from becoming confused due to the change in presentation mode. Note that if the probability of winning the special lottery remains the same even when the game state changes, the look-ahead performance may be continued since at least there will be no discrepancy in the pre-determination results.

The period during which execution of the look-ahead performance is prohibited may be determined based on the maximum number of reserved times (for example, 4), etc. In the case of normal time-saving, the start of the look-ahead prohibition period may be determined based on the special pattern type look-ahead command and the variation pattern look-ahead command, and in the case of special condition time-saving, the remaining number of times the special condition is met may be compared with the period during which execution of the look-ahead performance is prohibited (maximum number of reserved times).

The special condition fulfillment remaining number command may be sent under a specific condition (for example, when the remaining number of times is very few (4 times)) rather than always being sent when there are remaining times. This configuration makes it possible to prevent the number of times until the special condition time reduction is activated from being known by illegally detecting the remaining number command. In addition, if the special condition fulfillment remaining number command is sent every time, if it overlaps with other transmission commands, the special condition fulfillment remaining number command cannot be sent immediately (unsent commands remain in the command transmission buffer), and there is a risk of a decrease in interest in the game due to a delay in the timing of the start of the performance based on the command. Therefore, by reducing the frequency of sending the special condition fulfillment remaining number command, it is possible to prevent a delay (delay) in the timing of the start of the performance due to unsent commands remaining in the command transmission buffer.

[25-5. Modifications]
In the gaming machine described above, if the special lottery based on the game ball entering the first starting hole 2002 is not won a predetermined number of times in a row, the special condition is met and the game shifts from the normal game state to the time-saving state. In this case, the time-saving shift count is not updated when the reserved number reaches the upper limit, and the game becomes monotonous with only repeated losing lotteries until the special condition is met, which may lead to a decrease in interest in the game.

[25-5-1. Counting entrance]
Therefore, as a modified example of the gaming machine of this embodiment, a gaming machine equipped with a counting ball entry unit 2007 capable of updating the time-saving transition count in addition to the first starting hole 2002 will be described. The figure shows a modified example of the game board of the game machine of FIG. 1. The game board 5 of the game machine of the modified example has a ball counting area on the left side of the game area (left hitting area) and above the side unit 2300. The ball counting entrance unit 2007 is disposed in the game board 5. The configuration other than the ball counting entrance unit 2007 is the same as that of the game board 5 shown in FIG.

[25-5-2. Structure of the ball counting entrance]
FIG. 405 is a diagram showing a cross-sectional view of an example of the ball counting entrance unit 2007 arranged in a modified example of the game board of the game machine of this embodiment. The ball counting entrance unit 2007 of this modified example has an inlet 2007a that opens upward, and can receive game balls flowing down the left side of the game area (left hitting area). The game balls received from the inlet 2007a are guided to the ball counting entrance 2007b via a guide path 2007d formed inside. A sensor (not shown) that detects the passage of the game balls is arranged inside the ball counting entrance 2007b, and the main control board 1310 counts the number of game balls that have entered based on the signal output from the sensor.

A movable piece 2007c that can slide to the front/rear of the game board 5 is disposed at the bottom of the guideway 2007d. When the movable piece 2007c slides to the front of the game board 5, the game ball can enter the counting ball entrance 2007b (ball entrance permitted state). On the other hand, when the movable piece 2007c slides to the rear of the game board 5, the game ball falls downward from the guideway 2007d, making it impossible for the game ball to enter (ball entrance not permitted state). Below, the path along which the game ball moves within the counting ball entrance unit 2007 will be explained for each state.

Figure 406 shows the path of travel of the game ball when the counting ball entry unit 2007 of a modified example of this embodiment is in a ball entry permitted state, where (A) is a cross-sectional oblique view and (B) is a cross-sectional view.

When the movable piece 2007c is slid to the front of the game board 5 (ball entry permitted state), as shown in (A), the movable piece 2007c forms the bottom surface of the guide path 2007d. As a result, the game ball received from the receiving opening 2007a is guided from the guide path 2007d to the counting ball entry opening 2007b, making it possible for the ball to enter.

Figure 407 shows the path of travel of the game ball when the ball entry counting entrance unit 2007 of a modified example of this embodiment is in a ball entry disallowed state, (A) being a cross-sectional oblique view, and (B) being a cross-sectional view.

When the movable piece 2007c slides to the rear of the game board 5 (ball entry not permitted state), the bottom of the guideway 2007d is not formed, and an opening that opens downward is formed as shown in (A). The opening is large enough for game balls to pass through, and game balls received from the receiving port 2007a fall (flow down) into the game area below the ball counting entry unit 2007. The fallen game balls are rolled to the center in the left-right direction by the shelf portion 2302 on the side unit 2300, and flow down toward the general winning port 2001 or the first starting port 2002.

[25-5-3. Ball entry control at the counting ball entry port]
As described above, the counting ball entrance unit 2007 can switch whether or not a ball can enter the counting ball entrance 2007b by controlling the position of the movable piece 2007c. The main control board 1310 can control whether or not a ball can enter the counting ball entrance 2007b depending on the game status, by outputting a control signal to a driver for operating the movable piece 2007c.

As a specific example of control, a gate unit may be disposed to transition the counting ball entrance unit 2007 to a ball entry permitted state, and the ball entry permitted state may be maintained for a predetermined period of time when the ball passes through the gate. If the condition for transitioning to the ball entry permitted state of the counting ball entrance unit 2007 is the passing of a game ball through the gate, a lottery may be executed when the game ball passes through the gate, or the ball entry permitted state may always be established. Even if the ball entry permitted state is transitioned to by lottery, the purpose of this modified example is to make it easier for the special condition to be satisfied, so that there is a high probability of winning (approximately 100%). In this case, by disposing a gate unit above the counting ball entrance unit 2007, the game ball aimed at the gate unit will be directed toward the counting ball entrance unit 2007, and smooth play can be performed without the need to frequently hit different game balls.

In addition, the ball counting entry unit 2007 may be set to a ball entry permission state when the reserved memory of the first starting hole 2002 has reached the maximum number. This makes it possible to promote the update of the time-saving transition count, and to hasten the transition to the time-saving state due to the special condition time-saving. In particular, since it is possible to aim for a ball to enter the first starting hole 2002 while aiming for the ball counting entry unit 2007, it is possible to continue updating the time-saving transition count even if the reserved number reaches the upper limit, and it is possible to encourage active continuation of the game. In addition, by setting the ball counting entry unit 2007 to a ball entry permission state when the reserved memory of the first starting hole 2002 has not reached the maximum number, it is possible to prevent the time-saving transition count from being excessively updated, and to prevent and adjust the excessive increase in the base value.

Furthermore, the counting ball entry unit 2007 may be switched between a ball entry permitted state and a ball entry prohibited state at a predetermined time interval. In this case, if the number of reserved balls has reached the upper limit, the time-saving transition count is not updated by winning at the first starting hole 2002, so the time for which the counting ball entry unit 2007 is in the ball entry permitted state may be set to a longer time. On the other hand, if the number of reserved balls has not reached the upper limit, the time for which the ball entry permitted state is set to a short time (for example, a time shorter than the interval between launching game balls) so that the game balls are less likely to enter the ball even if the player aims at the counting ball entry unit 2007, in order to encourage the player to aim the game ball at the first starting hole 2002 and maintain the original playability.

The ball counting entrance unit 2007 for counting the time-saving transition count may be placed not only in the left-hand hitting area but also in the right-hand hitting area, or in both the left and right hitting areas. This allows different balls to be hit, increasing the variety of the game and making it more interesting.

[25-5-4. Time series change of time-saving transition count in this modified example]
Here, the time-series change of the time-shortening transition count will be described with reference to the figure for a gaming machine in which the time-shortening transition count is updated when a gaming ball enters the counting ball entrance unit 2007. FIG. 408 is a timing chart showing the change of the time-shortening transition count in a modified example of the gaming machine of this embodiment. Here, the case where the counting ball entrance unit 2007 is always in the ball entry permission state regardless of the number of reserved balls or the game state will be described.

As described above, the time-saving transition count is updated when the variable display of special symbol 1 starts or when the entry of a game ball into the counting ball entry port 2007b is detected by the counting ball entry port switch (not shown). Referring to FIG. 408, when the time-saving transition count is at "84", the variable display of special symbol 1 starts and the time-saving transition count is updated to "85" (time t101). While the variable display of special symbol 1 continues, a game ball enters the counting ball entry port 2007b and the time-saving transition count is updated to "86" (time t102). Thereafter, the time-saving transition count is updated in a similar manner when the variable display of special symbol 1 starts or when a game ball enters the counting ball entry port 2007b. In the example shown in FIG. 408, the time-saving transition count is updated when the counting ball inlet switch changes from ON to OFF, but it may also be updated when the counting ball inlet switch changes from OFF to ON.

[25-5-5. Lottery based on balls entering the counting entry hole (starting entry hole)]
In the above-described modified example, the time-saving transition count is updated when a game ball enters the counting ball entrance 2007b of the counting ball entrance unit 2007. In contrast, a winning entry that can execute a lottery related to the awarding of a game value independently of the update of the time-saving transition count may function as the counting ball entrance 2007b. In this case, the time-saving transition count may be updated if the lottery is not won. In addition, a function to hold this lottery may be provided. In the case of a special lottery, a hold display is performed on the liquid crystal display screen, but the lottery based on the entry of a ball into the counting ball entrance 2007b does not need to be notified to the player.

The second start port 2004 may be the ball counting port 2007b that can execute the above-mentioned lottery. Specifically, when a game ball enters the second start port 2004, a special lottery is executed and the time-saving transition count is updated unless the reserved number is at the upper limit, but the time-saving transition count may be updated if the special lottery is not won. FIG. 409 is a timing chart in a modified example of the gaming machine of this embodiment in which the second start port 2004 functions as the ball counting port 2007b. In the example shown in FIG. 409, even in a normal game state, the ball can be entered not only in the first start port 2002 but also in the second start port 2004, and the display of the special symbols corresponding to the order of entry into the start entry ports is started. The time-saving transition count is updated when the display of the special symbols 1 and 2 starts.

Referring to FIG. 409, when the time-saving transition count is at "71", the variable display of special symbol 1 begins, and the time-saving transition count is updated to "72" (time t111). After the variable display of special symbol 1, because a game ball has entered the second starting port 2004, the variable display of special symbol 2 is subsequently executed (time t112). When the variable display of special symbol 2 begins, the time-saving transition count is updated to "73". Thereafter, the time-saving transition count is updated in the same manner each time the variable display of the special symbol corresponding to the winning starting winning port begins. Note that a common time-saving transition count is used regardless of the winning starting winning port.

In addition, even in the normal game state, it is possible to win at the second starting hole 2004, and when updating the time-saving transition count when the special lottery is not won, the game is not impaired by encouraging a win at the first starting hole 2002 in the normal game state and prioritizing the function of the second starting hole 2004 as a counting ball entry hole. For example, when a game ball enters the first starting hole 2002, a winning sound is output, but when a game ball enters the second starting hole 2004, the winning sound is not output. Also, when a game ball enters the first starting hole 2002, a specific display may be displayed so that the player can recognize that the ball has entered. In this case, when a game ball enters the second starting hole 2004, a specific display may not be displayed so that the player has difficulty recognizing that the ball has entered.

As described above, according to this modified example, the second starting hole 2004 can function as a ball counting hole. In normal game mode, priority is given to the entry of a game ball into the first starting hole 2002, making it easier to trigger special condition time reduction without compromising gameplay. In addition, since there is no need to place a new ball counting hole, the excitement of the game can be increased without increasing the design costs of the game board.

[25-5-6. Others]
The transition to the time-saving state due to the special condition time-saving requires that the winning probability of the normal lottery is always high, since the special lottery has not been won and the consecutive operation device of the role cannot be operated. If the winning probability of the normal lottery is not high, the second starting hole 2004 will not be in a state in which a prize can be won even if the transition to the time-saving state is made, making it difficult to win. On the other hand, if the winning probability of the normal lottery is high, the second starting hole 2004 will be in a state in which a prize can be won every time a game ball passes through the gate portion 2003, which may impair the playability.

To solve the above problem, the gate unit 2003 may be configured in the same way as the counting ball entry unit 2007 described above. Specifically, in the normal game mode, the gate unit 2003 is controlled to be in a ball entry disallowed state so that the normal lottery is not executed, and in the time-saving mode, the gate unit 2003 is controlled to be in a ball entry permitted state so that the second starting port 2004 is in a winning state.

The second starting hole 2004 may also be configured in the same way as the counting ball entry hole unit 2007 described above. By disallowing ball entry in normal game mode and allowing ball entry in time-saving mode, it is possible to control the second starting hole 2004 so that it is not possible to win unless the time-saving mode is activated.

[26. Special Condition Time Reduction (Time Reduction Transition Count: Subtract Update)]
The above describes an embodiment in which the time-saving transition count is updated by addition. Next, an embodiment in which the time-saving transition count is updated by subtraction will be described.

[26-1. Control of time-saving state by special condition time-saving]
[26-1-1. Control from start to end of time-saving state by special condition time-saving]
First, the control from the start to the end of the special condition time-saving mode will be described when the time-saving transition count is updated by subtraction. As in the case of updating by addition, the start condition of the special condition time-saving mode is to transition to the time-saving mode when the special lottery has not been won 300 times in a row (time-saving transition count) since the time-saving transition count was initialized. Other points, such as the maximum number of times the time-saving mode can continue, are also the same.

The time-saving transition count, which controls the transition to the time-saving state due to the special condition time-saving, is updated by the state transition judgment process, which judges whether the current game state will transition to another game state. The state transition judgment process is called from the special symbol miss stop process, which is executed when the special symbol stops at a miss symbol, and the special symbol miss stop process is called from the special symbol/special electric device control process (step 01TKS0080) of the playable time process (Fig. 354) executed by the timer interrupt process (Fig. 329).

The specific control regarding the transition of game states, including the time-saving state due to the special condition time-saving state, will be explained below with reference to a flowchart. Figure 410 is a flowchart explaining the procedure of the state transition determination process for determining whether or not to transition to another game state in the gaming machine of this embodiment.

When the main control MPU 1311 starts the state transition determination process, it first sets the identification information to an initial value of "0" (step 03TKS0010). The identification information is a variable that stores information for identifying whether or not to transition the game state, and the value is set in the CPU register in subsequent processes.

Next, the main control MPU 1311 determines whether the time-saving count is 0, i.e., whether the game state is in the time-saving state (step 03TKS0020). The time-saving count corresponds to the number of changes after the time-saving state starts. In this embodiment, when the time-saving state starts, the number of continuations (e.g., 100 times) is set as the initial value, and one is subtracted each time the special pattern changes. At this time, if the game is in the time-saving state, a value of 1 or more will be set for the time-saving count. Note that the initial value may be set to 0, and control may be exercised so that one is added at a time.

If the number of time-saving times is 0, i.e., the time-saving state is not in effect (the result of step 03TKS0020 is "yes"), the main control MPU 1311 executes the processing from step 03TKS0060 onwards.

On the other hand, if the number of time-saving times is not 0, i.e., if the time-saving state is in effect (the result of step 03TKS0020 is "no"), the main control MPU 1311 subtracts 1 from the number of time-saving times (step 03TKS0030). Furthermore, to determine whether the current change is the final change in the time-saving state, it is determined whether the number of time-saving times is 0 (step 03TKS0040). If the number of time-saving times is not 0, i.e., if the time-saving state is continuing (the result of step 03TKS0040 is "no"), the processing from step 03TKS0060 onwards is executed.

On the other hand, if the number of time-saving times is 0, i.e., if the current change is the final change in the time-saving state (the result of step 03TKS0040 is "yes"), the main control MPU 1311 sets the identification information to "1", indicating the end of normal time-saving (step 03TKS0050).

Then, the main control MPU 1311 determines whether the gaming state is a high probability state (step 03TKS0060). If the gaming state is a high probability state (the result of step 03TKS0060 is "yes"), it executes the processing from step 03TKS0130 onwards.

On the other hand, if the game state is not a high probability state (the result of step 03TKS0060 is "no"), the main control MPU 1311 determines whether the time-saving transition count is 0 (step 03TKS0070). If the time-saving transition count is 0 (the result of step 03TKS0070 is "yes"), the process from step 03TKS0130 onwards is executed.

If the time-saving transition count is not 0 (the result of step 03TKS0070 is "no"), the main control MPU 1311 subtracts 1 from the time-saving transition count (step 03TKS0080). Furthermore, it determines whether the time-saving transition count is 0 (step 03TKS0090). If the time-saving transition count is not 0 (the result of step 03TKS0090 is "yes"), the processing from step 03TKS0130 onwards is executed.

When the time-saving transition count is 0 (the result of step 03TKS0090 is "yes"), the main control MPU 1311 determines whether the current game state is in the time-saving state (step 03TKS0100). When the current game state is in the time-saving state (the result of step 03TKS0100 is "yes"), it executes the processing from step 03TKS0130 onwards.

If the current game state is not in the time-saving state (the result of step 03TKS0100 is "no"), the condition for transitioning to the time-saving state due to the special condition time-saving is met, and the main control MPU 1311 sets the identification information to "2" indicating the start of the special condition time-saving (step 03TKS0110). At this time, a value corresponding to the time-saving state due to the special condition time-saving is set to the next state transition destination information (next state transition destination number area). Furthermore, in order to output a signal (external output signal) from the external terminal, the ON time is set in the external output 3 timer (step 03TKS0120). By setting the ON time in the external output 3 timer, the external output 3 signal is ON for the set ON time. The output timing of the external output signal will be described later in FIG. 423.

The process up to step 03TKS0120 completes the setting of the identification information, and thereafter the game state is transitioned based on the value of the identification information. The main control MPU 1311 determines whether the value of the identification information is "0" or not (step 03TKS0130). If the value of the identification information is "0" (the result of step 03TKS0130 is "yes"), there is no need to transition the current game state to another game state, and so the state transition determination process is terminated.

If the value of the identification information is not "0" (the result of step 03TKS0130 is "no"), the main control MPU 1311 executes a state transition process to transition the current game state to another game state (step 03TKS0140). The state transition process is a process that determines the destination game state based on the identification information, etc., and sets the necessary information. Details of the state transition process will be described later in FIG. 411. When the state transition process ends, the main control MPU 1311 sets a command (state transition destination command at the end of fluctuation, state end command at special stop) corresponding to the end of the time-saving state or the reaching of the number of time-saving transitions (step 03TKS0150). Thereafter, the state transition determination process ends, and the process returns to the special symbol mismatch stop process.

Next, we will explain the state transition process that is called from the state transition determination process, determines the game state to transition to, and sets the necessary information. Figure 411 is a flowchart showing the steps of the state transition process in this embodiment.

When the state transition process is started, the main control MPU 1311 sets the address of the state transition data for the next state transition destination based on the first address of the state transition data and the next state transition destination information (the value of the next state transition destination number area) (step 03TKS0210). The state transition data defines various data corresponding to the game state of the destination. Details of the state transition data will be described later in FIG. 412.

Next, when the main control MPU 1311 identifies the state transition data for the next state transition destination, it sets the top address of the work area in which the state transition data is to be set (step 03TKS0220). It also sets the number of times to set the state transition data (step 03TKS0230), reads the set values for the set number of times from the identified state transition data, and stores them in a specified work area (step 03TKS0240). When the state transition data corresponding to the next state to transition to is stored in the work area, it ends the state transition process and returns to the state transition determination process.

The state transition process is executed when the game state changes other than the state transition determination process called from the special symbol miss stop process. For example, it is executed when the game state transitions to a high probability state when the jackpot state ends, or when the time-saving state starts (transitions) when the jackpot state ends.

The state transition judgment process and state transition process can be executed commonly when the game state changes at the start of normal time-saving, the end of normal time-saving, the start of special condition time-saving, and the end of special condition time-saving, making it possible to reduce program capacity since there is no need to provide a process for each change in game state. Furthermore, by sharing the processes, it is possible to improve the efficiency of debugging work compared to providing individual processes, and the development efficiency of gaming machines can be improved.

Next, an example of the configuration of the state transition data and the work area that stores the state transition data will be described. Figure 412 is a diagram showing an example of state transition data in this embodiment. In the state transition data, the number of times the state is maintained, the state flag, the probability of a special bonus flag, the time-saving flag, the next state transition destination number, and the number of times the state is displayed are defined in accordance with the game state after the transition. Note that the destination number is given for the sake of convenience. The contents of each item will be described with reference to the work area that stores the state transition data (Figure 413).

In addition, the state transition data is not limited to the form shown in FIG. 412, and the information set when the game state is switched can be changed or added as necessary. For example, it is sufficient to include at least a state flag that can identify the destination game state and the next state transition destination number.

Figure 413 is a diagram showing an example of the configuration of the work area for storing state transition data in this embodiment. The work area for storing state transition data is allocated to a specified area in the main control RAM 1312, and includes an area for storing the number of state transition data items (number of state setting data, "number of times state transition data is set" set in the processing of step 03TKS0230) in addition to areas corresponding to each item of state transition data. When transitioning from the current game state to another game state, state transition data corresponding to the destination game state is obtained and stored in the work area.

Next, we will explain each item in the state transition data and the work area that stores the state transition data. Explanations of each item are provided in the notes column of the work area in Figure 413.

The number of times to maintain the state is the number of times the corresponding game state continues after the transition, for example, if the game is in the time-saving state, it is the number of times to shorten the time. The state flag is set to "0" in the case of low probability non-time-saving (normal game state), "1" in the case of high probability time-saving (probability change state), and "2" in the case of low probability time-saving. The probability change flag is set to "0" if the probability of winning the special lottery is low, and "1" if the probability is high. The time-saving flag is set to "0" when time-saving is not activated, and "1" when time-saving is activated. In order to distinguish between time-saving due to special conditions and normal time-saving, "2" may be set when time-saving due to special conditions is activated. The next state transition number is a transition number for specifying the game state to transition to next if the special lottery is not won for the number of times to maintain the state. The number of times to display the state is used to generate the remaining number of times to shorten the time command, but is essentially the same as the number of times to maintain the state.

To explain in detail, for example, when the normal time-saving a is won in the normal game state, the state transition process is called by the large prize opening end interval process (at the end of the jackpot ending) (not shown) at the end of the jackpot game state. In the state transition process, the state transition data corresponding to the normal time-saving a (transition destination number 2) is selected, and the state maintenance count "100", state flag "2", probability change flag "0", time-saving flag "1", next state transition destination number "1", and state display count "100" are set in each work area. This sets the low probability time-saving state to continue for 100 fluctuations. When the time-saving state by the normal time-saving a ends, the next state transition destination number is set to "1", so the game returns to the normal game state. In addition, probability change a (transition destination number 4) and probability change b (transition destination number 5) have the same setting value, but the presentation mode is different. In addition, since the normal game state transitions to different game states depending on the result of the special lottery, "0" is set as the state transition data, and it is not defined as the next transition destination number. In addition, if you win a special lottery while in the normal time-saving a state and transition to the special time-saving a state, even if there are still plays remaining in the time-saving state, the state transition process will select state transition data corresponding to the special time-saving a state (transition number 4) after the big win game state ends, and the game state will transition.

The work area that stores the state transition data has the following areas arranged from the beginning of the area: state maintenance count area, state flag area, special chance flag area, time-saving flag area, next state transition destination number area, and state display count command area, in accordance with the state transition data items. Following these areas, the number of state setting data is assigned. Additionally, the state maintenance count area and state display count command area are assigned 2-byte areas, while the state flag area, special chance flag area, time-saving flag area, and next state transition destination number area are assigned 1-byte areas.

In this embodiment, the state transition data has a predetermined value and a setting order, so that the work area is arranged according to the order in which the data included in the state transition data is set, and it is not necessary to define the address of each work area in the state transition table. Here, the procedure for setting the value set in the state transition data in the work area will be described. First, the number of state setting data is obtained from the work area. Next, values are obtained one byte at a time from the top address of the state transition data to be set, and the obtained values are set sequentially from the top of the work area (state maintenance count area). The address from which the value is obtained and the address of the work area where the value is stored are updated and repeated for the number of state setting data. In this way, the acquisition of values and the setting of the work area are repeated one byte at a time, so that the data included in the state transition data are defined in units of one byte. Therefore, the state maintenance count and the state display count are divided into upper and lower bytes and defined individually. In addition, the number of state setting data corresponds to the total number of bytes of each area, and the difference between the top address of the work area and the address of the area storing the number of state setting data is set in the program. As a result, even if the number of items or size of the data included in the state setting data is changed, there is no need to redefine the number of state setting data, and the program can be used universally without modification, making it possible to flexibly respond to specification changes and improving the development efficiency of gaming machines.

Here, we will explain the data corresponding to each game state contained in the state transition data. In the normal game state, the game state does not transition based solely on the number of fluctuations, so the state maintenance count is set to 0. Note that there are cases where a transition to the time-saving state occurs on the condition that the special lottery is not won a predetermined number of times in succession after the time-saving transition count is initialized (special condition time-saving), but a transition to the time-saving state does not always occur, for example when the time-saving transition count is not initialized, so the time-saving transition count is not set as the state maintenance count.

In addition, in this embodiment, the probability of winning the special lottery is low, and three types of patterns are defined for the low probability time-saving state, which is the time-saving state. Specifically, there are cases where the state transitions after a jackpot game state after the special lottery is won (normal time-saving a), where the state transitions based on the result of the special lottery (normal time-saving b), and where the special lottery is not won a predetermined number of times in succession after the time-saving transition count is initialized (special condition time-saving).

The above describes the state transition data and each item in the work area that stores the state transition data. Each item in the state transition data is set to a value according to the game specifications, etc., and the number of records increases or decreases depending on the type of game state. Also, if the game state to transition to after a specific game state has ended is predetermined, by setting the number corresponding to the next state in the next state transition destination number, it becomes possible to control the transition of game states based on the information defined in the state transition data, and the destination game state can be changed without modifying the program code.

Figure 414 is a diagram showing a modified example of state transition data of this embodiment. In the example shown in Figure 412, when the game state transitions to another game state due to the establishment of a predetermined condition (the result of a special lottery, the time-saving transition count), the transitioned game state is defined to continue for the set number of times of state maintenance, and then transition to the normal game state. In contrast, in the example shown in Figure 414, for example, in the case of a normal time-saving hit, the game state transitions in the order of the time-saving state of normal time-saving a-1, the time-saving state of normal time-saving a-2, and the time-saving state of normal time-saving a-3. This makes it possible to make the presentation content different for each game state, and for example, by associating the presentation content with the game state, it becomes possible to execute a presentation that progresses step by step with the transition of the game state without performing complex control. In addition, a table that defines the variable time may be switched at the timing of switching the game state.

To explain further, if the special lottery results in a win for the normal time-saving jackpot, the state transition data for the destination number "2" is set, and the time-saving state of normal time-saving a-1 begins. After that, when the number of times the state is maintained (50 times) has changed, the next state transition number is set to "3," so the state transition occurs in the time-saving state of normal time-saving a-2, and the corresponding state transition data is set. Similarly, when the number of times the state is maintained (30 times) has changed, the next state transition number is set to "4," so the state transition occurs in the time-saving state of normal time-saving a-3, and the corresponding state transition data is set. Finally, when the number of times the state is maintained (20 times) has changed, the next state transition number is set to "1," so the state transition occurs in the normal game state, and the corresponding state transition data is set. The same control is used in the case of a special jackpot.

In the case of special condition time reduction, when the condition is met (when the time reduction transition count value becomes 0 from 1), the state transition data of the transition destination number "7" is set, and the time reduction state of special condition time reduction -1 is started. After that, when the fluctuation for the number of times of state maintenance (100 times) is completed, the next state transition destination number is set to "8", so the time reduction state of special condition time reduction -2 is transitioned, and the corresponding state transition data is set. Furthermore, when the fluctuation for the number of times of state maintenance (700 times) is completed, the next state transition destination number is set to "1", so the normal game state is transitioned, and the corresponding state transition data is set. In this way, in the gaming machine of this embodiment, by making it possible to transition the game state only by setting the data, it is no longer necessary to create the process related to the transition of the game state in the program code, and it is possible to easily add or change by simply modifying the data according to the specification change.

The parameters set in the state transition data are not limited to the examples shown in the figures as examples, and may be any information that switches depending on the game state. Specifically, it is sufficient that information specifying the timing of the game state switch (e.g., the number of times the state is maintained) and information specifying the game state to be transitioned to (e.g., the next state transition number) is included, and other information may be set as necessary. Specifically, it may be information for specifying the game state, and may include, for example, information indicating the probability of winning a special lottery, information indicating the probability of winning a normal lottery, etc. In this way, by including information specifying the game state after the state transition, the process of transitioning the game state can be standardized, and the game control can be simplified, thereby improving the development efficiency of gaming machines.

The information specifying the timing of the change of the game state is, for example, the number of changes (the number of times the special lottery is executed, the number of times the state is maintained), and the game state is changed to the next state when the game is continued for the predetermined number of changes. In addition, before the end of the game for the predetermined number of changes, for example, when the special lottery is won, the game state may be changed to another state due to the establishment of a predetermined condition regardless of the number of changes. Therefore, it is preferable to define the change of the game state due to the establishment of a predetermined condition such as the winning of the special lottery, in addition to the change of the game state due to the number of changes. For example, an item corresponding to a specific flag may be defined in the state transition data, and the game state may be changed when the flag is set to ON. This flag may be checked by a process that is periodically executed, such as a timer interrupt process. In this way, the timing of executing the transition process based on the state transition data in response to the transition of the game state can include a timing based on the number of changes of the special pattern and a timing based on the establishment of a predetermined condition, such as the result of a lottery such as a special lottery. This makes it possible to flexibly respond to the timing of the transition of the game state depending on the progress of the game, and to prevent the progress control of the game from becoming complicated.

In addition, the information specifying the destination game state does not necessarily have to use only the value set in the state transition data, and the corresponding value may be set directly within the program processing. For example, the destination game state is forcibly set within the program when the game state transitions, and various parameters set in the state transition data other than the destination game state are set. Specifically, in the special condition time-saving mode, the state transition data is referenced when the number of time-saving transitions becomes 0, but by setting the setting number for the special condition time-saving mode (in the case of FIG. 414, "7") as the next state transition destination number before executing the subroutine that references the state transition data within the program processing, the subroutine that references the state transition data can set the parameters corresponding to the transition destination number "7".

Furthermore, the state transition data may be configured to include information related to the presentation, and a corresponding command may be sent to the peripheral control board 1510 (presentation control means) when the game state transitions. This makes it possible to include a process that triggers the start of a presentation in the series of processes accompanying the transition of the game state, and makes it possible to collectively manage the processes related to the transition of the game state, including the presentation.

Next, the chronological order of control for transitioning to a time-saving state due to special condition time-saving will be explained. Figure 415 is a timing chart for explaining the control for transitioning to a time-saving state due to special condition time-saving in the gaming machine of this embodiment. The timing chart shown in Figure 415 explains the control from the initialization of the time-saving transition count due to winning the special lottery to the transition to the time-saving state due to special condition time-saving. Note that the operation is the same as that of the timing chart shown in Figure 397, but the method of updating the time-saving transition count is different. Also, the commands sent are the same as those shown in Figure 400, but the timing of sending some commands differs.

Time t1 is the timing when the jackpot ending that is executed at the end of the jackpot game state resulting from winning the special lottery ends, that is, the timing when the game transitions to the time-saving state. While the jackpot game state continues, the value of the time-saving transition count in the pattern change of the special lottery that resulted in the transition to the jackpot game state is set. Referring to FIG. 415, the values of the time-saving transition count, the remaining number of times that the special condition is satisfied, and the time-saving transition count displayed on the performance display monitor are maintained at the same value from the transition to the jackpot game state until its end, because these values are not updated. Note that the remaining number of states may be set to "1" since the number of times the jackpot game state will continue is set, or the number of rounds in the jackpot game may be set.

In the gaming machine of this embodiment, the time-saving transition count is initialized when the big win ending ends, that is, when the time-saving state is transitioned to. In the example shown in FIG. 415, the time-saving transition count is updated by subtracting the number of time-saving transitions (300 times), so the time-saving transition count is set. The initialization of the time-saving transition count will be described in detail later.

When the time-saving transition count is initialized, the remaining number of times the special condition is met is set to "300", and the remaining number of times the time-saving state is met is set to "100". The remaining number of times the special condition is met can be calculated based on the time-saving transition count and the time-saving transition count, so it may be calculated when necessary, for example, when a remaining number of times the special condition is met command, described below, is sent to the peripheral control board 1510. Note that, because the time-saving transition count is updated by subtraction, the remaining number of times the special condition is met and the time-saving transition count have the same value, and may be stored in the same variable within the program. This can reduce memory capacity.

Time t2 is the timing when the variable display of the special symbol is first executed after the transition to the time-saving state. In this embodiment, the time-saving transition count is updated when the variable display of the special symbol ends. The display on the performance display monitor may be performed simultaneously with the update, or may be reflected when the variation starts. By updating the time-saving transition count when a fixed time has elapsed after the variation ends, rather than when the variation starts, it is possible to process the update of the time-saving transition count and the transition to the time-saving state within the same timer interrupt. Details of the various commands are as explained in FIG. 400.

The time-saving transition count may be updated when the fluctuation starts, but in this case, it is necessary to determine whether the time-saving transition count is "0" or not when the fluctuation starts, and if it is determined to be "0", not update the time-saving transition count, and further determine whether the time-saving transition count is "0" or not when transitioning to the time-saving state (when the fixed time has elapsed). Therefore, since it is necessary to determine whether the time-saving transition count is "0" or not twice, at the start of the fluctuation and at the time of the time-saving transition, there is a risk that the program code will become complicated.

If the remaining state count command is sent when updating the time-saving transition count, the command will not be sent at the time of the first change, so it is preferable to send the remaining state count command when the change begins. Also, if the value of the remaining state count command is displayed as is, the special pattern change will have already started by the time it is actually displayed. For example, if the remaining state count is 300, the actual remaining number of changes is 299, so if it is displayed as 300, the player may misunderstand. Therefore, when the peripheral control board 1510 receives the remaining state count command, it subtracts 1 from the notified remaining state count and displays it as the remaining state (change) count.

Time t3 is the timing when the display of the special symbols ends. When the display of the special symbols ends, the number of times the special condition remains to be met is updated. At this time, a command to stop the display of the special symbols, a command to notify the game state when the special symbols stopped varying, and a command to notify the updated number of times the special condition remains to be met are sent to the peripheral control board 1510. Note that the command to notify the number of times the special condition remains to be met is not sent immediately after the special symbols stop varying, but after the symbol determination time has elapsed since the special symbols stopped varying. Details of these commands are as explained in FIG. 400.

After that, when the stopped symbol is confirmed, the next variable display starts (time t4). Furthermore, when the variable display of the special symbol is executed a predetermined number of times (100 times) without winning the special lottery in the time-saving state, the time-saving state ends (time t5). At this time, the number of remaining states in the time-saving state becomes "0" and updates (counting) stop. Meanwhile, the time-saving transition count continues to be counted.

When the time-saving state ends, the game will transition to the normal game state. At this time, the number of times remaining in the normal game state is not updated because there is no need to manage it (it cannot be managed). Note that the number of times remaining in the normal game state when transitioning to the normal game state may be the remaining number of times a special condition is met. This is because if the special lottery is not won a predetermined number of times in a row (time-saving transition count = 300 times) after the time-saving transition count is initialized, the game will transition from the normal game state to the time-saving state, and the normal game state will end.

When the game progresses in the normal game state, the time-saving transition count reaches 0, and the variable display ends (time t6), the remaining number of times that the special condition must be met to transition to the time-saving state becomes 0, the special condition is met, and the game transitions to the time-saving state (special condition time-saving). When the game transitions to the time-saving state due to the special condition time-saving, the update of the time-saving transition count and the remaining number of times that the special condition is met stops. In addition, the remaining state number is set to the maximum number of times the time-saving state can continue (100 times). The value of the time-saving transition count is maintained at 0 without being updated.

In this way, the time-saving transition count can be updated by timer interrupt processing, but is not updated if it has reached a predetermined value ("0"), so that the special condition time-saving transition count is not activated until the next jackpot (when the initial value is set) without determining whether or not the normal state has been reached after the special condition time-saving transition count has ended.

After that, if the special lottery is not won before the time-saving state reaches its maximum number of times (100 times) after the transition to the time-saving state due to the special condition time-saving, the game will transition to the normal game state (time t7). At this time, the end of the time-saving state due to the special condition time-saving is not an initialization condition for the time-saving transition count, so the values of the time-saving transition count and the remaining number of times the special condition is met are maintained, and the game will not transition to the time-saving state due to the special condition time-saving until the time-saving transition count is initialized.

[26-1-2. Clearing (initializing) the game area including the time-saving transition count]
As described above, the conditions (special conditions) for initializing the time-saving transition count are (1) when the gaming machine is initialized (RAM cleared) in a specified procedure, and (2) when a special lottery is won (after a big win game ends). Here, unlike the example described above, (a) when the RAM clear switch 954 is operated alone (first operation; RAM clear operation), the time-saving transition count is not initialized, and (b) when the RAM clear switch 954 is operated while operating the setting key 971 (second operation; setting change operation), the time-saving transition count is initialized.

In the gaming machine of this embodiment, values necessary for game control, such as the time-saving transition count, are stored in an area allocated to the memory area provided by the main control RAM 1312. As described above, the time-saving transition count is not initialized when a RAM clear operation is performed, and is initialized when a setting change operation is performed, while values such as the remaining number of states and the remaining number of times a special condition is met are cleared (initialized) regardless of which operation is performed, and the area cleared by a RAM clear operation is different from the area cleared by a setting change operation.

As described above, if the time-saving transition counter is not initialized by the RAM clear operation and the remaining number of states or the remaining number of times a special condition is met is cleared, the time-saving transition counter will not reach 0 even though the command indicating the remaining number of states indicates 0, which may result in inconsistencies in the presentation. Therefore, when information other than the time-saving transition counter is cleared by the RAM clear operation, the peripheral control board 1510 ignores commands related to the remaining number of times sent from the main control board 1310, or does not send commands related to the remaining number of times from the main control board 1310, thereby preventing inconsistencies in the presentation.

Figure 416 is a diagram showing an example of the arrangement of values stored in a memory area provided by the main control RAM 1312 of the gaming machine of this embodiment. As shown in Figure 416, the time-saving transition count is arranged in area 9901 together with a setting status management area that indicates the setting value of the gaming machine and the setting status in the setting mode (e.g., setting change, setting confirmation). In this embodiment, area 9901 is arranged at the beginning of the memory area, but is not limited to this and may be another area.

In addition, in area 9902, which is different from area 9901, information such as the probability bonus flag, time-saving flag, remaining number of times a special condition is met, and remaining number of times in a state is stored. In addition, input/output port related data including input signals such as switches that detect the entry of game balls into various winning ports, normal symbol related data regarding normal lottery and the display of changing normal symbols, special symbol related data regarding special lottery and the display of changing special symbols, and external information output related data for outputting signals to the outside of the gaming machine are stored.

The time-saving transition counter is arranged in area 9901, but when the time-saving transition counter is initialized by either the RAM clear operation or the setting change operation, it may be arranged in area 9902 and cleared together with information in other areas such as the time-saving flag. Also, when the RAM clear operation or the setting change operation is executed, the time-saving transition counter is not directly initialized, but the value of the time-saving transition counter is cleared and then the initial value is set again.

Area 9902 is cleared when either (a) the RAM clear switch 954 is operated alone (first operation; RAM clear operation) or (b) the RAM clear switch 954 is operated while operating the setting key 971 (second operation; setting change operation) is performed, and the first address of area 9902 is defined as the "RAM clear first address" (in this embodiment, "0005h"). At initialization, the area after the "RAM clear first address" is cleared.

Area 9901 is not cleared when a RAM clear operation is performed, while area 9902 is cleared when a RAM clear operation is performed. In contrast, when a setting change operation is performed, area 9902 is cleared, while the time-saving transition count placed in area 9901 is set to an initial value (300). Note that when the time-saving transition count is updated by incrementing it, it is set to 0.

As described above, although the area of RAM cleared (area 9902) is the same in the RAM clear operation and the setting change operation, the area that is initialized (set to an initial value) is different. Therefore, by standardizing the process of clearing area 9902, the program code can be simplified and development efficiency can be improved.

In addition, area 9901 in which the time-saving transition count and the like are stored and area 9902 in which the probability bonus flag and the like are stored are continuous areas, but it is also possible to arrange an empty area between areas 9901 and 9902. If an empty area is arranged, it is possible to increase the possibility that the data in area 9901 or area 9902 can be maintained if the data in the other area is destroyed due to a program bug or the like.

In addition, in the areas following area 9902, a stack area within the play area, a work area outside the play area, and a stack area outside the play area are arranged. The stack area within the play area is an area for temporarily storing data when a program related to game control is executed. The work area outside the play area is an area for temporarily storing data when a program for displaying information on the performance display monitor (base display 1317) is executed. The stack area outside the play area is an area for temporarily storing data required when executing a process executed outside the play area (for example, a process for calculating a base value, etc.). Note that an empty area 9904 is arranged between area 9902 and the stack area within the play area, but area 9902 and the stack area within the play area may be continuous areas without providing the empty area 9904. On the other hand, an empty area 9905 is arranged between the stack area within the play area and the work area outside the play area, but this area must be arranged. An empty area 9906 is arranged between the work area outside the play area and the stack area outside the play area, but the work area outside the play area and the stack area outside the play area may be a continuous area without providing area 9906.

The time-saving transition count may be initialized whether the RAM clear switch 954 is operated alone or when the RAM clear switch 954 is operated while operating the setting key 971. Furthermore, the time-saving transition count may be initialized by an operating means other than the RAM clear switch 954 or the setting key 971. For example, an operating means may be provided that initializes (clears) only the setting values related to the special condition time-saving, including the time-saving transition count. This makes it possible to maintain other game-related information and minimize the impact on gameplay. For example, the setting values related to the special condition time-saving can be initialized (cleared) at the end of business, and the gaming machine can be operated on the next business day without being affected by the game situation of the previous day.

In addition, in a gaming machine that allows transition to a time-saving state due to a special condition time-saving state as in this embodiment, when the time-saving state due to a special condition time-saving state ends, there is a risk that the RAM clear switch 954 and the setting key 971 may be illegally operated in order to re-enter the time-saving state due to the special condition time-saving state. Therefore, by providing both the RAM clear switch 954 and the setting key 971 on the back side of the gaming machine, it is possible to prevent illegal operations.

From the above explanation, each configuration can be identified as follows.

(1) A gaming machine that performs a lottery to determine whether or not to award a benefit to a player based on the establishment of a starting condition, controls to a special gaming state in which a gaming value is awarded to the player based on the lottery result, and can control to one advantageous gaming state from a plurality of advantageous gaming states including at least a first advantageous gaming state (high probability state) and a second advantageous gaming state (low probability time-saving state) that are more advantageous to the player than the normal gaming state based on the type of the special gaming state, and is equipped with a gaming control means (main control MPU 1311) that can control the progress of the game including the lottery, a storage means that stores gaming information including the result of the lottery and is capable of storing and retaining the gaming information even if the power supply to the gaming machine is cut off, a counting means that counts the number of times a lottery has been performed by the lottery means when a predetermined condition is established, and an operation means that cannot be operated by the player, and the storage means stores the counted value by the counting means. The game control means can control the game to a third advantageous game state (special condition time reduction) advantageous to the player based on the counting result by the counting means, and the operation state by the operation means includes at least a first operation state (RAM clear operation/setting change operation) and a second operation state (setting change operation/RAM clear operation). When the power is turned on in accordance with the first operation state by the operation means, the predetermined area of the storage means is initialized, but the information stored in the area in which the counting value by the counting means can be stored can be maintained. When the power is turned on in accordance with the second operation state by the operation means, the predetermined area of the storage means is initialized, and the information stored in the area in which the counting value by the counting means can be initialized, and the area in which the counting value by the counting means can be stored is arranged in an area other than the predetermined area of the storage means. Also, the counting value by the counting means stored in the storage means may be maintained in the normal game state during the third advantageous game state and after the end of the third advantageous game state without being updated in the third advantageous game state.

The first advantageous game state is more advantageous to the player than the second advantageous game state, and the second advantageous game state is the same/almost the same as the third advantageous game state in terms of the degree to which it is advantageous to the player. In the gaming machine of this embodiment, the second advantageous game state is assumed to be a time-saving state due to normal time-saving, and the third advantageous game state is assumed to be a time-saving state due to special condition time-saving, and the probability of winning the special lottery is the same in the second advantageous game state and the third advantageous game state. The second advantageous game state and the third advantageous game state may be the same in terms of the degree to which they are advantageous to the player, or if they are different, the only difference is the number of time-saving episodes, and the degree of advantage is approximately the same.

By configuring as in (1), the areas of RAM that are cleared in the first and second operation states are the same, so by standardizing the process of clearing the areas, it is possible to simplify the program code and improve development efficiency. In addition, by making it possible to maintain the information stored in the area that can store the counting value through operation, it becomes possible for the manager of the amusement facility to decide whether or not to clear the counting value depending on the game situation, allowing for flexible operation.

The above explains how a specific memory area is initialized when a RAM clear operation or a setting change operation is performed, but the RAM is also cleared when a RAM abnormality occurs due to a momentary interruption such as noise, making it difficult to continue playing normally. Below, the memory area (setting values) that is cleared when the RAM is cleared (when the RAM clear switch 954 is operated) and when a RAM abnormality occurs will be explained with reference to FIG. 417.

Figure 417 is a diagram explaining the operation of the RAM clear switch 954 in the gaming machine of this embodiment, and the control over the memory area and various values when a RAM abnormality occurs. Figure 417 explains the RAM clear operation (first operation), the setting change operation (second operation), and the cases of RAM abnormalities 1 to 5.

When the RAM clear operation (first operation) is performed, the work inside the play area (area 9902) is cleared while the work outside the play area is maintained. The memory area is actually cleared when it is determined that the RAM clear signal has changed to ON by the operation of the RAM clear switch 954, which is before the timer interrupt process is started. The area 9901 that stores the set value and the time-saving transition count is maintained. When the RAM clear operation is performed, the performance display monitor continues to display the value of the time-saving transition count. When the RAM clear operation (first operation) is performed, a notification sound corresponding to the RAM clear is output. Furthermore, the decorative lamp lights up in a manner corresponding to the RAM clear, and a screen indicating that the RAM is being cleared is displayed on the liquid crystal display screen. The movable body provided in the gaming machine performs a predetermined initial operation.

When the setting change operation (second operation) is performed, the work in the play area is cleared. On the other hand, the work outside the play area is maintained if the work outside the play area is normal, and cleared if an abnormality occurs. The set value is also maintained. The time-saving transition count is initialized as described above. The timing when the memory area is actually cleared is the timing when it is determined that the setting change operation has been performed, which is before the timer interrupt process is started. After the setting change, the performance display monitor displays the set value, but a display indicating that the time-saving transition count has been initialized may be performed, or the time-saving transition count may be displayed after the setting value is displayed. When the setting change operation (second operation) is performed, a notification sound corresponding to the setting change is output. Furthermore, the decorative lamp is lit in a manner indicating that the setting is being changed, and a screen indicating that the setting is being changed is displayed on the liquid crystal display screen. The movable body provided in the gaming machine performs a predetermined initial operation.

When a setting value abnormality (RAM abnormality 1) occurs, the work in the play area is cleared. On the other hand, the work outside the play area is maintained. Since an abnormality has occurred in the setting value, "Setting 1" is set as the setting value. Furthermore, the time-saving transition count is initialized. The timing at which the memory area is actually cleared is the timing at which it is determined that a setting change operation has been performed upon recovery from a power outage after the RAM abnormality has been determined, and if a setting change operation is not performed even if a RAM abnormality is determined, the RAM abnormality state continues. The RAM abnormality code is displayed on the base display 1317. When a setting value abnormality (RAM abnormality 1) occurs, a RAM abnormality notification sound is output and a lamp is lit in a manner corresponding to the RAM abnormality notification. Furthermore, a screen indicating that a RAM abnormality notification has occurred is displayed on the liquid crystal display screen. At this time, it may be configured to switch to a demo screen after a predetermined time has elapsed. The movable body provided in the gaming machine performs a predetermined initial operation. Note that the initial operation of the movable body may be started after the RAM abnormality is resolved by a setting change operation, rather than when a RAM abnormality occurs.

When a power interruption flag abnormality (RAM abnormality 2) occurs for work within the play area or a checksum abnormality (RAM abnormality 3) occurs for work within the play area, the work within the play area is cleared. On the other hand, work outside the play area is maintained if there is no abnormality. In addition, the setting value is maintained and the time-saving transition count is initialized. The timing at which the memory area is actually cleared is not when a RAM abnormality is determined, but when it is determined that a setting change operation has been performed after a RAM abnormality has been determined, by turning the power supply OFF and then turning the power ON again while performing a setting change operation. The RAM abnormality code is displayed on the base display 1317.

When a power outage flag abnormality (RAM abnormality 4) or a checksum abnormality (RAM abnormality 5) occurs for work outside the play area, a setting change operation is performed when the power is restored from the outage, and as a result the work within the play area is cleared. In addition, the work outside the play area is cleared because an abnormality exists. Furthermore, the setting value is maintained and the time-saving transition count is initialized. The memory area is actually cleared when it is determined that the setting change operation has been performed. The RAM abnormality code is displayed on the base display 1317.

To further explain the control of RAM abnormalities in the work outside the play area, the determination of RAM abnormality in the work outside the play area is executed before determining whether or not a setting change operation has been performed when the power is turned on. If a RAM abnormality is determined, only information indicating that a RAM abnormality has been determined is stored, and at this timing, the work outside the play area is not initialized and treated as a RAM abnormality, and the play is stopped. After transitioning to the play stop state, a setting change operation is performed and then the power is turned off/on again, and it is determined that the setting change state is in place. When the processing at the time of the setting change is executed, it is determined that the work outside the play area had a RAM abnormality based on the information stored before the power was turned off that indicates that the work on the play area side was determined to have a RAM abnormality, and the work outside the play area is cleared. Note that if information indicating that the work outside the play area was determined to have a RAM abnormality is not stored when the processing at the time of the setting change is executed, the work outside the play area is not cleared and the stored contents are maintained as they are.

When the power is turned on after a setting change operation has been performed, if the initial setting process determines that the setting value/work inside and outside the play area are each a RAM abnormality, the setting change process will begin as is, and each storage area will be cleared at the time that a RAM abnormality is determined. In addition, the initial setting process executed when the power is turned on determines whether there is an abnormality in the setting value, an abnormality in the play area, or an abnormality in the work outside the play area, and stores only the determination result, and determines whether or not a setting change operation has occurred after each determination is completed. In other words, even if a RAM abnormality has occurred, the device is controlled to determine whether or not a setting change operation has been performed after an abnormality has been determined.

The above describes the cases in which the RAM is cleared. Next, we will provide additional information about the control of the gaming machine when the first operation (RAM clear operation) and the second operation (an operation different from the first operation, for example, a setting change operation) are performed.

When the power is turned on in this embodiment of the gaming machine, it first determines whether the set value is abnormal (a value other than 0 to 5). If it is determined to be abnormal, the set value is set to its initial value, the time-saving transition count is set to its initial value (300 times), and the gaming state is set to a RAM abnormal state. Next, the checksum, power failure flag, and RAM outside the gaming area are checked, and if any of them are determined to be abnormal, the RAM is also set to an abnormal state. At this time, except when the set value is determined to be abnormal, the time-saving transition count is not initialized and the value before the power failure is maintained.

Except when the first operation is performed, the time-saving transition count is only set to its initial value when the set value is determined to be abnormal or when a jackpot ending has finished; otherwise, the initial value is not set. In addition, no determination is made as to whether the value of the time-saving transition count is abnormal or not. The reason for not determining whether the time-saving transition count is abnormal is that if the set value is abnormal, there is a high possibility that the time-saving transition count is also abnormal, so it is considered sufficient to determine whether the set value is abnormal alone.

In addition, an "abnormality judgment" of the time-saving transition count may be performed in addition to the abnormality judgment of the set value. In this case, even if the set value is normal, if the time-saving transition count is outside the specified range, the accuracy of the RAM cannot be guaranteed, so the contents of the RAM may be initialized entirely or the set value and the time-saving transition count may be initialized.

Furthermore, if an abnormality occurs in the setting value, the setting value is initialized and then a RAM abnormality is reported, and this state continues. To restore the gaming machine, the main work RAM (area 9902) is cleared by turning the power back on while performing the setting change operation. Furthermore, if the work for the performance display monitor (base display 1317) is abnormal, it is cleared, but if it is not abnormal, it is maintained. The setting state becomes a setting change state, timer interrupt processing is started, and after the setting change is completed, the machine transitions to the normal gaming state. At this time, the performance display monitor (base display 1317) becomes a normal display.

By configuring as described above, in the gaming machine of this embodiment, it is possible to suggest whether the time-saving transition count has been initialized or not by the display mode of the performance display monitor (base display 1317) when the power is turned on. Specifically, when the performance display monitor is displayed in the normal mode after the power is turned on, it suggests that the time-saving transition count has not been initialized, and when the performance display monitor is displayed in the specific mode, it suggests that the time-saving transition count has been initialized. As described above, in this embodiment, when the setting change operation (second operation) is performed, the time-saving transition count is initialized, and at this time, the performance display monitor displays content indicating that the time-saving transition count has been initialized. The performance display monitor normally displays the time-saving transition count (normal mode), but when the setting change operation (second operation) is performed, the changed setting value is displayed (specific mode). In addition, when the RAM clear operation (first operation) is performed, the performance display monitor continues to display the normal mode (time-saving transition count), while when the setting change operation (second operation) is performed, the performance display monitor does not display the normal mode until the setting change is completed. In other words, by displaying the performance display monitor in different ways depending on whether the time-saving transition count has been initialized, it is possible to indicate to hall employees and others that the time-saving transition count has been initialized.

Although the above describes an example of notifying whether the time-saving transition count has been initialized by the display mode of the performance display monitor (base display 1317), similar notification may be made by other displays. Also, notification may be made by sound or lamp. In this case, the lamp may be provided outside the game area of the gaming machine or in an inconspicuous location within the game area (for example, away from the liquid crystal display device), so that it is possible to recognize whether the time-saving transition count has been initialized from the front side. For example, when the power supply is resumed by the RAM clear operation (first operation) (including normal power-on (recovery)), it is possible to recognize that the power supply has been resumed without initializing the time-saving transition count by displaying in the first mode (including off), and when the power supply is resumed by the setting change operation (second operation), it is displayed in the second mode (in which it is not possible to recognize whether the time-saving transition count has been initialized). By configuring it in this way, the player can recognize that as the time-saving transition count is maintained, there is a high possibility that the special condition time-saving will occur before the value indicating the number of fluctuations in the top lamp (data display) appears, and the player can play while hoping that the special condition time-saving will occur.

[26-1-3. Initialization setting data (setting data table)]
Not only in the time-saving state, but also when transitioning from the current game state to another game state, various parameters (initial setting data such as flags) for setting the game state must be set. For example, when a special lottery is won, initial setting data corresponding to the jackpot game state is set at the timing of starting the jackpot game state, and initial setting data (setting data table) corresponding to a predetermined timing (for example, at the end of the jackpot game state) is set in order to transition to a probability variable state (high probability time-saving state) after the end of the jackpot game state. Hereinafter, the handling of these initial setting data in the gaming machine of this embodiment will be described.

Figure 418 is a diagram showing an example of jackpot first interval transition setting data that is set when transitioning to a jackpot gaming state upon winning a special lottery in the gaming machine of this embodiment. The jackpot first interval transition setting data is set (referenced) in the jackpot start setting process that is executed at the timing of starting the jackpot gaming state upon winning a special lottery, and the necessary values are set for various parameters (data, flags, etc.) based on the jackpot first interval transition setting data.

The setting data for the first jackpot interval transition defines the size (number of bytes) of the data that will be cleared (initialized) first, and then the size (number of bytes) of the data that will be initialized. Next, the parameters that will be cleared (initialized) are defined (within the box). Finally, the data that will be initialized is defined.

Referring to FIG. 418, the specific contents of the setting data at the time of the first interval transition after a jackpot will be further explained. The data that will be cleared includes the status flag (JOTAI_FG), the probability of winning flag (KAKUHEN_FG), the time-saving flag (JITAN_FG), the number of status display times (JT_HYO_CNT), and the power-on status buffer (PWON_JOT_BF). The details of each piece of data are as described above.

The initially set data includes the condition device operation signal output judgment flag (T_JKN_FG), reel continuous operation device operation signal output judgment flag (T_YAK_FG), right hit flag area (R_HS_FG), middle rotor operation status management flag (MOT_ACT_FG), motor 1 operation pattern area (MOT1_ACT_PT), motor 1 operation number area (MOT1_ACT_NO), and motor 1 photodetection abnormality judgment timer area (M1_ERR_JDG_TM).

Specifically, the condition device operation signal output judgment flag (T_JKN_FG) is set to a value (_T_SIG_JKN_OK) for setting the condition device operation signal to ON. In addition, the reel continuous operation device operation signal output judgment flag (T_YAK_FG) is set to a value (_T_SIG_YAK_OK) for setting the reel continuous operation device operation signal to ON. In the right hit flag area (R_HS_FG), a value (_HASSYA_RIGHT) indicating that right hit is permitted is set. In addition, values for defining the initial operation of the middle rotating body (motor 1) are set.

The initial setting data in the gaming machine of this embodiment defines the size (number of bytes) of the data to be cleared (initialized) and the size (number of bytes) of the data to be initialized, and then defines the data for clearing and the data for initial setting for the data to set the game state. By configuring it in this way, it becomes possible to handle the data for clearing and the data for initial setting together as one table. Note that the data for clearing is only the data (address) to be cleared, so it is 1 byte, and the data for initial setting is 2 bytes as it is a set of the data to be set (address) and the initial setting value.

In addition, the gaming machine of this embodiment is equipped with multiple large prize slots (first large prize slot 2005, second large prize slot 2006), and the clear data and initial setting data for these large prize slots can be treated as a single table.

Figure 419 shows an example of the large prize opening closure setting data that is set when the large prize opening is closed in the large prize game state of the gaming machine of this embodiment. The large prize opening closure setting data is referenced to execute the process of transitioning each large prize opening from an open state to a closed state in the large prize opening opening process.

The large prize opening close setting data includes setting data for the first large prize opening 2005 and setting data for the second large prize opening 2006, and a value (_NX_CLOSE_OFS) is defined between the setting data for the first large prize opening 2005 and the setting data for the second large prize opening 2006 to specify the start address of the setting data for the second large prize opening 2006. Specifically, it is the difference between the start address of the large prize opening close setting data and the start address of the setting data for the second large prize opening 2006, and the start address of the setting data for the second large prize opening 2006 can be specified by adding the value of "_NX_CLOSE_OFS" to the large prize opening close setting data.

The setting data for the first large prize slot 2005 includes data for clearing and data for initial settings, as well as the setting data for the first interval transition after the large prize. The data for clearing defines the size of the data for clearing and the data for initial settings, and the large prize slot 1 solenoid flag.

The initial setting data defines the special power 1 operation signal output timer (T1_SD_TM), the special power 1 prize ball validity determination timer (T1_SD_PAY_TM), and the special symbol/electric device operation number (T_JOB_NO). The special power 1 operation signal output timer is set to the time value for outputting the special electric device 1 operation signal, and the special power 1 prize ball validity determination timer is set to the special power 1 prize ball validity extension time value (the time to determine that a ball is valid after the large prize opening is closed). The special symbol/electric device operation number is set to the number value for closing the large prize opening (_TNO_CLOSE).

The setting data for the second large prize opening 2006 includes data for clearing and data for initial settings, similar to the setting data for the first large prize opening 2005. The data for clearing defines the size of the data for clearing and the data for initial settings, and the large prize opening 2 solenoid flag.

The initial setting data defines the special power 2 operation signal output timer (T2_SD_TM), the special power 2 prize ball validity determination timer (T2_SD_PAY_TM), the special power 2 operation signal output timer 2 (T3_SD_TM), the special power 2 prize ball validity determination timer 2 (T3_SD_PAY_TM) and the special symbol/electric role operation number (T_JOB_NO). Two types of operation signal output timers and prize ball validity determination timers are defined.

The special power 2 operation signal output timer (T2_SD_TM) and the special power 2 operation signal output timer 2 (T3_SD_TM) are both set with a time value for outputting the special electric device 1 operation signal, and the special power 2 prize ball validity determination timer (T2_SD_PAY_TM) and the special power 2 prize ball validity determination timer 2 (T3_SD_PAY_TM) are both set with a special power 2 prize ball validity extension time value. The special symbol/electric device operation number is set with a number value (_TNO_CLOSE) for closing the large prize opening.

The above describes a means for setting initial data when the large prize opening is closed in a gaming machine with two types of large prize openings, but this may also be applied to setting initial data at a different timing, for example, when the large prize opening is opened. It may also be applied to openings other than the large prize opening. For example, in a gaming machine with multiple start winning openings, the initial data for the first start winning opening (special drawing 1) and the second start winning opening (special drawing 2) may be defined in the same way as the initial setting data shown in FIG. 419, and data initialization processing may be executed.

The configuration of the initial setting data has been explained above. Next, the procedure for actually performing initial settings based on the above-mentioned initial setting data will be specifically explained using the special prize opening closure setting data as an example. Figure 420 is a sample module that performs initial settings based on the special prize opening closure setting data in the gaming machine of this embodiment. Below, the procedure for setting the initial setting data will be explained with reference to the module.

The main control MPU 1311 stores the address of the large prize opening close setting data (T_CLOSE1_B) in the HL register as the reference address of the area where the setting data is stored. Next, it stores identification information for identifying which large prize opening is to be controlled in the A register. "OPEN_TD_FG" is an open special electric device identification flag, and is set to "00" when controlling the first large prize opening 2005, and to "01" when controlling the second large prize opening 2006. The position for referencing the data contained in the large prize opening close setting data is identified based on the value of "OPEN_TD_FG".

Next, the main control MPU 1311 sets a value (_NX_CLOSE_OFS) in the W register to specify the start address of the setting data for the second large prize opening 2006. Furthermore, the multiplication value addition address acquisition process (MUL_WA_HL) is executed to specify the read position of the large prize opening close setting data. In more detail, the multiplication value addition address acquisition process multiplies a specified base value (W register = "_NX_CLOSE_OFS") by a multiplication value (A register = "OPEN_TD_FG") and adds it to a specified base address value (HL register = start address of the large prize opening close setting data). In other words, when controlling the first large prize opening 2005 ("OPEN_TD_FG" = "00h"), the base address value itself becomes the starting address, while when controlling the second large prize opening 2006 ("OPEN_TD_FG" = "01h"), the address obtained by adding "_NX_CLOSE_OFS" to the base address value becomes the starting address.

When an address that references the large prize opening closure setting data is identified, the main control MPU 1311 executes a data initialization process (DATA_SET_CLR). The data initialization process is a process that clears and initializes data based on the setting data referenced by the address set in the HL register. Details of the data initialization process are explained in FIG. 421.

Figure 421 is a diagram showing an example program for the data initialization process (DAT_SET_CLR) of this embodiment. Details of the process will be explained below for the case where data related to the first large winning slot 2005 is cleared and initialized ("OPEN_TD_FG" = "00h").

When the data initialization process is executed, the main control MPU 1311 first sets the number of work clears and the number of work sets in the BC register. In other words, it sets the number of work clears in the C register and the number of work sets in the B register. The number of work clears is the number of data to be cleared, and the number of work sets is the number of data to be initialized. Looking at the data (T_CLOSE1_B) corresponding to the first large prize opening 2005 among the large prize opening closure setting data in Figure 419, the first data is "T_CLOSE1_CLR_END-$-2", which means that only one data item is cleared, so the value is 1, and this value is stored in the C register. The data is "(T_CLOSE1_B_END - T_CLOSE1_CLR_END)/2", and since five 2-byte pieces of data are actually defined between the label T_CLOSE1_CLR_END and the label T_CLOSE1_B_END, the value is 5, and this value is stored in the B register.

Then, the main control MPU 1311 initializes the data. Specifically, the data set after the work clear count and work set count in the clearing data, i.e., the value from the third byte onwards, is set as the address of the data to be cleared, and "00H" is set for the number of work clear counts set in the C register, clearing the data.

The main control MPU 1311 also performs initial data initialization. Specifically, it sets the value of the first byte from the beginning of the data for initial setup as the address, and the value of the second byte as the initial setup value, and repeats this the number of work sets set in the B register. When processing has been completed for all data for initial setup, the data initialization process ends.

As mentioned above, the structure of the initial setting data is standardized, and it can be used for general purposes such as initial setting of drivers, not just for game state transition processing. Therefore, by including the data initialization processing (DAT_SET_CLR) in the processing address table, it can be called by the INVD command, and processing can be executed by simply specifying an index (1 byte) without directly specifying an address (2 bytes). This shortens the word length of the command, and speeds up processing.

In this embodiment, the large prize opening closing setting data includes a value (_NX_CLOSE_OFS) for specifying the start address of the setting data for the second large prize opening 2006, making it possible to treat the data for multiple large prize openings as common data. Therefore, if an attempt is made to perform processing equivalent to that of the sample module shown in FIG. 420 using a conventional method in which _NX_CLOSE_OFS is not defined, a branching process is required by referencing OPEN_TD_FG, as shown in FIG. 422. In this case, more capacity is required than with the method of this embodiment; specifically, the sample program of the reference example (FIG. 422) is 3 bytes larger in capacity than the sample program of this embodiment (FIG. 420).

In the sample modules shown in Figures 420 and 422, in the process of reading data from the table (LDT command), the value specified is the table address (for example, "T_CLOSE1_B") minus the start address of the data area "_OFS_TP" (TP register value, for example, "9000H"). In other words, "LDT HL, T_CLOSE1_B - _OFS_TP" sets the value of [TP register value ("9000H") + relative data of "T_CLOSE1_B" from the data start address] in the HL register. By making it possible to set a value based on the TP register in the HL register using the LDT command, commands that would normally be 3 bytes or more ("LD HL, T_CLOSE1_B") can be executed in 2 bytes.

As described above, in the gaming machine of this embodiment, when transitioning from the current gaming state to another gaming state, parameters corresponding to the destination gaming state are set based on predefined initialization setting data. When transitioning between gaming states, the processing related to the special lottery is switched, for example, by changing the probability of winning the special lottery or by changing the table that defines the variation time of the special symbols.

In addition, the initialization setting data is not only used when the game state changes to the probability change state or the time-saving state, but can also be used when the state changes (when the game progress changes) for special symbol-related processes such as waiting for change process, during change process, symbol determination process, miss interval process, hit interval process, big win opening process, big win opening closing process, and big win ending process. Specifically, it is used at the timing to start the execution of the next process after the execution of a process is completed, such as when executing the change start process after the waiting for change process is completed, when executing the symbol determination process after the during change process is completed, when executing the miss interval process after the pattern determination process is completed, when executing the waiting for change process after the miss interval process is completed, and when executing the hit interval process after the pattern determination process is completed.

In addition, the initialization setting data is used not only for special symbol-related processes but also for normal symbol-related processes. Specifically, it can be used when executing a process during a change after the end of a process waiting for a change, or when executing a pattern determination process after the end of a process during a change, etc.

The switching of each state (game progress status) is controlled by a job counter that corresponds to each control object such as special symbols and normal symbols. The job counter corresponds to each process (state); for example, in the case of a job counter for special symbols, job counter "0" corresponds to the process of waiting for the special symbol to change, job counter "1" corresponds to the process during the special symbol change, job counter "2" corresponds to the process of determining the special symbol, job counter "3" corresponds to the interval process when the special symbol is not reached, job counter "4" corresponds to the interval process when the special symbol is hit, job counter "5" corresponds to the process of opening the jackpot, job counter "6" corresponds to the process of opening the jackpot, job counter "7" corresponds to the process of closing the jackpot, and job counter "8" corresponds to the process of ending the jackpot. The same settings can be made for normal symbols.

The initialization setting data used when the game state is changed is defined in the format (data structure) described above in FIG. 418. Specifically, after defining the size (number of bytes) of the data to be cleared (initialized) and the size (number of bytes) of the data to be initialized, the lower address of the area (first area) storing the parameters whose set values are cleared at the time of the change, the lower address of the area (second area) storing the parameters whose initial values (fixed values) are set at the time of the change, and the initial values are sequentially arranged from the top of the area in which the initialization setting data is stored. The parameters whose set values are cleared at the time of the change can be set as necessary by the calling program, etc., when the game state is changed, and parameters that count up from "0", such as when counting the number of times a special lottery is executed in the game state after the change, are used as they are after being cleared. Note that the data capacity can be reduced by defining only the lower address in the initialization setting data, but since it is only necessary to specify the storage area of the value, not only the lower address but also the upper address may be included. This increases the data capacity, but it is possible to directly specify the storage area, and since address conversion is not required, it is possible to speed up program processing.

Furthermore, as described above, by specifying initialization setting data and executing the data initialization process (Fig. 421), it is possible to clear the specified parameters or set the specified parameters to initial values. Therefore, the process of setting (initializing) parameters when the game state is changed or the process is started can be executed by a common process, regardless of the game state of the source and destination, or the process of ending and starting execution, simply by specifying the initialization setting data. This makes it possible to set (initialize) the parameters required when the game state is changed or a new one is added due to a change in game specifications, or when a process for controlling the game is added, while minimizing the modification or addition of program code, by simply adding or modifying the corresponding initialization setting data.

As described above, in the gaming machine of this embodiment, by defining the initialization setting data with a common data structure, it becomes possible to clear/initialize parameters with a common process (data initialization process). This makes it possible to execute a common procedure when parameter setting is required at the timing of a change in the progress of the game, such as when the game state is changed, and it becomes possible to flexibly respond to changes in game specifications, making it possible to realize a wide variety of games and further increase the interest of the game. Furthermore, the development efficiency of gaming machines can be improved by simplifying the program by standardizing parameter settings.

Based on the above explanation, each configuration can be further specified as follows.

(2) The program processing (data initialization processing) that uses the setting data table (initialization setting data) is called and executed from the calling process (such as processing related to special symbols) that is executed according to the progress of the game state as the game progresses (at the timing when the progress changes), and although the calling process that is executed according to the progress of the game state as the game progresses (at the timing when the progress changes) is a different procedure for each of the progress of the game state, the program processing (data initialization processing) that uses the setting data table can be executed as a common process, and after the program processing that uses the setting data table has completed setting the setting values for the addresses of the memory area set in the first area (area 9901) and the memory area set in the second area (area 9902), the calling process continues to be executed, making it possible to switch the progress of the game state.

By configuring it as in (2), even when changing or adding new game state definitions due to changes in game specifications or when adding processes to control the game, it is possible to minimize modification or addition of program code, and to set (initialize) parameters required for transitions in game states or when executing processes, and to switch game progress, simply by adding or modifying the corresponding setting data table (initialization setting data).

[26-1-4. Modification of Initialization Setting Data Selection Means]
In the gaming machine of this embodiment, the time-saving transition count is not cleared when the RAM clear switch 954 is operated alone (RAM clear operation), but is cleared when the RAM clear switch 954 is operated while operating the setting key 971 (setting change operation). Therefore, if the time-saving transition count is added to the initial setting data, it will always be initialized, so it is necessary to define the initial setting data separately or branch the processing.

In the gaming machine of this embodiment, the operation at the time of initialization can be confirmed by referencing the value of VALID_PLAY (setting status management area). Therefore, a table for selecting initialization setting data is defined, and the initialization setting data corresponding to the operation at the time of initialization can be identified by selecting based on the value of VALID_PLAY.

Figure 423 is a diagram showing an example of VALID_PLAY (setting status management area) and the value set in VALID_PLAY in the gaming machine of this embodiment. Referring to Figure 423, VALID_PLAY is set to "00h" for normal recovery, "01h" for a RAM clear operation, "02h" for a setting check operation, "03h" for a setting change operation, and "04h" when the RAM is abnormal.

Figure 424 is a diagram showing an example of a table for selecting initialization setting data when initializing the gaming machine of this embodiment. The initialization setting data selection table defines initialization setting data corresponding to VALID_PLAY, and initialization setting data can be selected based on the value of VALID_PLAY. When implemented in this way, it can be determined whether or not to clear depending on the initialization operation.

The time-saving transition count is not stored in the area that is cleared when the gaming machine is initialized, and the time-saving transition count is initialized based on the definition of the initialization setting data. In other words, the time-saving transition count is initialized only when it is defined in the initialization setting data, and if the value of the time-saving transition count is to be maintained, it can be removed from the initialization setting data. For example, the time-saving transition count is not initialized by a RAM clear operation (normal RAM clear), so the corresponding initialization setting data (RAM_CLR_TBL) does not contain data corresponding to the time-saving transition count. On the other hand, in the case of a setting change operation, the time-saving transition count is initialized, so the corresponding initialization setting data (SET_CHG_TBL) contains data corresponding to the time-saving transition count. By configuring in this way, it is possible to set the time-saving transition count to be maintained or initialized by defining it in the initialization setting data according to the initialization operation without changing the program, and it is possible to simplify the program without branching the program code and to compress the program capacity. It is possible to switch between maintaining or initializing (clearing) the value not only for the time-saving transition count but also for other parameters by defining the data.

The initialization setting data may also be further subdivided according to the initialization conditions of the gaming machine. For example, as shown in FIG. 417, initialization setting data may be defined for each cause of a RAM abnormality. If there are fewer patterns of initialization setting data than the values defined in VALID_PLAY, common initialization setting data may be assigned to different VALID_PLAY to reduce the data volume.

When the time-saving transition count is updated by addition, the initial value is 0, so it is registered as clear data, whereas when the time-saving transition count is updated by subtraction, the initial value is the number of time-saving transitions (= 300), so it is registered as initial setting data. In this way, even if the update method is different, it is possible to manage it with the same initial setting data, which allows for flexible response to changes in game specifications and improves the development efficiency of gaming machines.

[26-2. External output signals related to special condition time reduction]
Next, the output of the external output signal will be described in chronological order from when the power of the gaming machine is turned on (when the setting change operation is executed). FIG. 425 is a time chart showing the output timing of the external output signal related to the time-saving state due to the special condition time-saving in the gaming machine of this embodiment. The external output signal is a signal output from the external terminal board 784 provided on the gaming machine, and is transmitted to a hall computer installed on the gaming hall side. The hall computer can grasp the state of the gaming machine in real time based on the received external output signal.

First, the power supply of the gaming machine is turned on (time t200), and the initialization process is executed. The initialization process ends and the game becomes playable. After that, the game continues, and when the special lottery is not won for the number of times (= 300 times) of consecutive time-saving transitions since the time-saving transition count was initialized, the game transitions to a time-saving state due to special conditions. At this time, the external output signal (jackpot information) is set to ON for a predetermined time (128 ms), and a signal is output (time t201). The external output signal (jackpot information) is output for a predetermined fixed time, indicating that the game has transitioned to a time-saving state due to special conditions. Note that the external output signal (jackpot information) is output during the jackpot game state, but the time (fixed time) output during the transition to the time-saving state due to the special conditions time-saving is sufficiently shorter than the time output in the jackpot game state. Furthermore, the external output signal (during time-saving) is set to ON, and the signal output continues until the time-saving state ends.

Furthermore, if the player does not win the special lottery until the upper limit number of times (=100 times) of the time-saving state is reached after the transition to the time-saving state due to the special condition time-saving state, the time-saving state due to the special condition time-saving state ends (time t202). When the time-saving state ends, the output of the external output signal indicating that the time-saving state is in progress is stopped.

After that, when a jackpot occurs that transitions to the high probability state after the high probability game state ends (a high probability game pattern wins a special lottery, a high probability game jackpot), the device for continuously operating the role operates after a predetermined pattern determination time has elapsed after the special pattern stops, and the external output signal (high probability game information) and the external output signal (during time reduction) are set to ON, and each signal is output (time t203). In the high probability game state, time reduction control is not executed, but the output of the external output signal (during time reduction) continues. In addition, the output of the external output signal (high probability game information) continues until the high probability game state ends (variable period). This makes it possible to manage the prize balls during the special prize (consecutive wins). In the so-called time reduction state, as mentioned above, the output of the external output signal (during time reduction) continues, but the output of the external output signal (high probability game information) does not continue.

After the jackpot game state ends and the jackpot end interval time has elapsed, the game state transitions to a sure-win state (high-probability time-saving state) (time t204). At this time, the output of the external output signal (jackpot information) is stopped (set to OFF), while the output of the external output signal (during time-saving) continues until the time-saving state ends. In addition, the time-saving transition count is set to the initial value (= 300 times). Note that in a high-probability state that does not involve a time-saving state, the external output signal (during time-saving) is not output. This allows the hall computer to accurately grasp the game state and to check whether the base value is normal or not.

After that, if a special lottery is won by a non-variable symbol in the high probability time-saving state (time t205), the time-saving game state is ended, the probability state is set to low probability, and the game transitions to a jackpot game state (the jackpot game state is always in a low probability, low base state). At this time, although the time-saving state ends, the external output signal (during time-saving) is not set to OFF, but continues to be ON as the game enters the jackpot game state. Furthermore, the external output (jackpot information) is set ON as the game enters the jackpot game state.

When the jackpot game state due to the non-probability variable symbol ends, after the jackpot end interval time has elapsed, time-saving control is started and the game state transitions to a (low probability) time-saving state (normal time-saving) (time t206). The external output signal (jackpot information) that was ON during the jackpot is set to OFF after the jackpot end interval time has elapsed, and the game state transitions to the time-saving state (the time-saving flag is set to ON), causing the external output signal (during time-saving) to continue being output while remaining ON. At this time, the time-saving transition count is set to the initial value (= 300 times).

After the jackpot game state ends, when the pattern changes (execution of the special lottery) for the maximum number of times the time-saving state can continue are completed (time t207), the time-saving state ends by setting the time-saving flag to OFF, and the external output signal (during time-saving state) is set to OFF to stop output.

If the special lottery is not won after the number of time-saving transitions (=300) has continued since the end of the jackpot game state (if the time-saving transition count reaches 0), the game will transition to a time-saving state due to special condition time-saving, as in time t201 (time t208). At this time, the external output signal (jackpot information) is set to ON for a predetermined time (128 ms) and a signal is output. After that, if the special lottery is won with a non-variable symbol, the special symbol stops and after a predetermined symbol determination time has elapsed, the operation of the continuous operation device of the role starts, the external output signal (jackpot information) is set to ON and output is started, the time-saving flag is set to OFF, while the external output signal (during time-saving) is continuously output while remaining ON (time t209).

After that, the jackpot game state ends, and the game state transitions to a (low probability) time-saving state (normal time-saving) (time t210). After the jackpot end interval has elapsed, the external output signal (jackpot information) is set to OFF to stop output, the time-saving flag is set to ON, and the external output signal (during time-saving) is output while remaining ON. After the jackpot game state ends, when the pattern changes (execution of the special lottery) for the maximum number of times the time-saving state can continue are completed (time t211), the time-saving flag is set to OFF, and the external output signal (during time-saving) is set to OFF to stop output.

As described above, in the gaming machine of this embodiment, the external output signal (jackpot information) that notifies the hall control that a special lottery has been won and that the game has entered a jackpot game state (special prize), is also output ON even after a predetermined number of misses have ended (when the special time-saving condition is met) without a jackpot, so that one external output signal is output both when a jackpot occurs and when a specific miss occurs. In addition, when the external output signal (jackpot information) is sent to something other than the hall control, such as a data lamp (a data display device provided outside the gaming machine as a facility on the hall side), one external output signal can be used both when a jackpot occurs and when the special time-saving condition is met. When the external output signal (jackpot information) is turned ON, it is possible to reset the number of fluctuations of the data lamp, which not only allows the player to identify the number of fluctuations until a jackpot occurs, but also allows the player to recognize the number of fluctuations until the game transitions to a time-saving state due to the special time-saving condition. Furthermore, if different signals are output when a jackpot occurs and when special time-saving conditions are met, it is necessary to set the data lamp so that the number of fluctuations can be reset with two signals. By using one external output signal for both, it is possible to accommodate specifications where the data lamp cannot reset the number of fluctuations with either of the two signals.

The period (variable period) during which the external output signal (jackpot information) is output is determined by the switch (transition) from the jackpot game state to the time-saving state. In addition, the period (fixed period) during which the external output signal (jackpot information) is output when transitioning to the time-saving state due to the special condition time-saving is a period measured based on the number of times that the periodic process that can be periodically executed by the main control MPU 1311 is executed. By configuring in this way, an external information signal is output for a fixed time (e.g., a pulse signal of 128 ms) when transitioning to the time-saving state due to the special condition time-saving, and if a special lottery is won, an external information signal is output only for the period during which the jackpot game state continues. By monitoring the respective output times (ON times), the manager of the game center can identify whether the game is in a jackpot game state or a special condition time-saving has occurred using the hall control or the like.

The fixed time is measured by periodically processing a value (timer value) set in a specific area predetermined in the main control RAM 1312. For example, a fixed time is set in the specific area, and the value set in the specific area is periodically subtracted a predetermined number of times, and measurement ends when the value reaches "0." In the gaming machine of this embodiment, a fixed time (128 ms) is set in the specific area when the time-saving state is entered due to the special condition time-saving, and a special gaming state signal (external output signal (jackpot information)) is output while the value in the specific area is set to the predetermined value.

On the other hand, in the special game state signal (external output signal (jackpot information)) output during a jackpot game state, a specific value ("0") is set in the specific area, and the output of the special game state signal (external output signal (jackpot information)) is continued by a process that is executed periodically without referring to the value in the specific area (timer interrupt process and a process called from the timer interrupt process). In other words, the time (variable time) during which the special game state signal (external output signal (jackpot information)) is output is a period that is specified by the process that is executed periodically.

Therefore, when the time-saving state is entered due to the special condition time-saving, a fixed time is set in the specific area and the output time is measured by the external output timer, whereas in the jackpot game state, no value is set in the specific area (set to "0") and the external output timer is not used, and a special game state signal (external output signal (jackpot information)) is output based on information that can be determined to be a jackpot game state (information whose value is set only in the jackpot game state, such as the job counter, jackpot number, etc.) in a process that is executed periodically (port output process in timer interrupt process). In other words, the condition for outputting the special game state signal (external output signal (jackpot information)) (set to ON) is when a predetermined value is set in the external output timer or when any of the requirements for information indicating a jackpot game state (job counter, jackpot number, etc.) is met. Note that the output signal is not determined individually, but rather a data table is defined in advance as a set of the reference address and set value of the specific area corresponding to the external output signal, and the determination is repeated (a value is set in the reference address of the specific area) for the number of records set in the data table. In this case, by standardizing the process of referencing the data table, it is possible to control the output of the external output signal by changing the data table without modifying the program. The setting value set in the data table is bit information corresponding to the external output port that outputs the external output signal.

In addition, since there is a limit to the number of ports that output external output signals, by making it possible to notify multiple types of information using an external output signal output from one port, such as outputting jackpot information both at the time of a jackpot and when a special condition time-saving function is activated, it becomes possible to notify more information to the outside world.

In addition, by making it possible to notify multiple types of information by an external output signal output from one port, it is possible to notify the game situation in detail. For example, in a gaming machine with multiple presentation modes, it is possible to measure the execution status of special presentations. To explain a specific example, in a gaming machine that always transitions to a special presentation mode when a special lottery is not won a specified number of times, if a specified condition is met during the execution of the special presentation mode, the game machine transitions to a special presentation mode different from the special presentation mode. The specified conditions include a special presentation mode transition lottery, a combination of symbols in a special lottery, and the elapse of a game time determined by a random lottery. At this time, after outputting an external output signal for a specified time when transitioning to the special presentation mode, the output is stopped, and the external output signal is output again when transitioning to the special presentation mode. Furthermore, by varying the output time depending on the specified condition that has been met, or by outputting the signal at the end of the special presentation mode, it is possible to grasp the game situation in more detail. By collecting information on the game situation in this way, it is possible to increase the interest of the game by identifying the timing to execute a more effective presentation.

In addition to the time-saving state (normal time-saving) after the end of the jackpot game state due to a special lottery win, and the time-saving state (special condition time-saving) to which the machine enters when the special lottery is not won a predetermined number of times in a row, there are gaming machines that can enter a time-saving state when special symbols stop in a predetermined combination (specific symbol time-saving). When the time-saving state is entered due to the specific symbol time-saving, an external output signal (jackpot information) is output for a predetermined time (128 ms), and an external output signal (during time-saving) is output continuously until the time-saving state ends. In other words, the external output signal is output in the same manner as the special condition time-saving. Therefore, since there is no need to output signals in different modes depending on the type of time-saving state, there is no need to increase the number of signal lines related to the external output. If the number of signal lines that output the external output signal increases, the management costs of the hall will increase. Furthermore, since the board for outputting the external output signal is generally provided in the frame, it is not easy to increase or decrease the external output signal according to the specifications of the game, so there is also the advantage that there is no need to respond by adding signal lines, etc.

As described above, by using the same signal line to notify multiple types of information and outputting signals in the same manner for different types of time-saving states, it is possible to accurately notify the outside world of the game situation, including the game status, without changing the existing equipment.

From the above description, each configuration can be specified as follows.
(3) The variable period is a period determined by the switching of the game state, and the fixed period is a period measured based on the number of times that the game control means executes the periodic processing that can be executed periodically. Therefore, in the configuration shown in (3), an external information signal is output for a fixed time (for example, a pulse signal of 128 ms) when the game transitions to a time-saving state due to a special condition time-saving, and when a special lottery is won, an external information signal is output only for the period during which the big win game state continues (variable period). Therefore, by monitoring each output time (ON time), the manager can identify whether the game state is a big win game state or a special condition time-saving has occurred using a hall control or the like, which makes it easier to manage the game center.

(4) The fixed time is the period during which the special game state signal is output (in periodic processing) when a predetermined value is stored in a value (timer value) set in a predetermined specific area of the main control RAM 1312 (storage means), and the variable period is the period during which the special game state signal is output (in periodic processing) when a specific value different from the predetermined value is stored in the specific area of the storage means. That is, in the configuration shown in (4), measurement using a fixed time is performed by setting a fixed time in a specific area and measuring using an external output timer, while measurement using a variable time is performed by a process (timer interrupt process, etc.) that is executed periodically without using an external output timer. In this way, by controlling the output time of the external output signal by using fixed time and variable time separately, it is possible to more accurately notify the outside of the gaming machine of the progress of the game.

《External output when game is stopped》
In the gaming machine of this embodiment, when a RAM abnormality occurs, the game is stopped, all signals other than the security signal are set to OFF, and output is stopped. Therefore, when a RAM abnormality occurs in a time-saving state due to a special condition time-saving, the external output signal (during time-saving) is set to OFF, and then the game state is returned to the initial state by a setting change operation. At this time, since the external output signal (during time-saving) remains set to OFF, when the game is resumed, it is considered that the time-saving state due to the special condition time-saving did not occur. In the gaming machine of this embodiment, the time-saving transition count is initialized by the setting change operation, and the game is resumed from the initial state.

In addition, if a RAM abnormality (setting value abnormality/work abnormality other than the setting value) is detected when the power is turned on, or if a RAM abnormality (setting value abnormality) is detected during normal gameplay, the same process is executed, but if a RAM abnormality is detected during timer interrupt processing, game-related processes (input process, timer update process, special chart-related process, normal chart-related process, etc.) are skipped.

Furthermore, unlike the case of a RAM abnormality, when the game is stopped due to fraud detection, various timers (including timers for external output) are no longer updated, and external output signals are maintained in an output state. Note that output signals that control drivers such as solenoids are forcibly set to OFF to prevent malfunctions. The game stop state can be released, for example, by turning the power back on, and may also be subject to a setting change operation or RAM clear operation. The game stop state may also be released when the power is turned on while a special operation (for example, opening a door) is performed, even during normal power-on or setting confirmation operations.

Therefore, if it is determined that play should be stopped due to the detection of fraud or the like during the output of the external output signal (jackpot information) that is output for 128 milliseconds when the time-saving transition occurs due to the special condition time-saving, it is possible to maintain the timer value in the state before play was stopped by stopping the update of the timer that measures the output time of the external output signal, and the output of the external output signal can be maintained in the ON state. This eliminates the need to determine whether the external output signal was in an output state when it was determined that play should be stopped, making it possible to control the output of the external output signal using a common process regardless of whether it is exception processing (game stop) or normal processing.

As described above, when gameplay is stopped due to a RAM abnormality, a setting change operation is required to resume play, which results in the game state being initialized, so the external output is also set to OFF when it is determined that there is a RAM abnormality. On the other hand, when gameplay is stopped due to fraud detection, etc., recovery is possible by turning the power back on or detecting that the abnormality has been lifted, so recovery from the state before gameplay was stopped is necessary, and if the external output is set to OFF when it is determined that gameplay has stopped, it will be turned ON again after recovery, which may result in the hall controller erroneously detecting that a signal was output twice, so the external output is maintained when gameplay is stopped.

Whether or not to transition to a game stop state is determined by the abnormality determination process within the timer interrupt process, so the game-related processing will be skipped in the next timer interrupt process when it is determined that game has stopped (detection that the game will be transitioned to a game stop state) within the abnormality determination process. In other words, the actual processing related to game stop is executed in the next timer interrupt process when it is detected that game will be transitioned to a game stop state. For this reason, since the timer is updated when it is determined that game has stopped, if the timing when it is determined that game has stopped and the timing when the external output timer is updated to 0 are the same (within the same timer interrupt process), the external output timer will change from 1 to 0, and the external output will be turned OFF before the game actually transitions to a game stop state.

A security signal is output when the game is stopped due to both a RAM abnormality and fraudulent activity, but the security signal alone cannot determine which factor caused the game to stop. In contrast, in the gaming machine of this embodiment, the game stops when fraud such as a magnetic error is detected, and a different control is performed than when the game is stopped due to a RAM abnormality. This makes it possible to determine whether the game was stopped due to fraudulent activity or due to an unexpected abnormality such as noise or a malfunction, depending on whether the game is stopped due to fraud detection or RAM abnormality. Furthermore, it becomes possible to know from the outside the timing when the gaming machine stopped operating normally due to fraudulent activity, and this can be used to identify the fraudster, for example, by using a surveillance camera installed in the hall. Factors that may cause the game to transition to a stopped state include, but are not limited to, magnetic abnormalities, when the vibration detection sensor detects vibrations, when the radio wave detection sensor detects radio waves, and further when the large prize opening sensor or normal electric role sensor detects a (predetermined number of) wins while the role is not normally in operation, and when there is a discrepancy between the wins from a specific prize opening (such as a V Attacker) and the ejection opening.

As described above, the gaming machine of this embodiment has a first game stop condition (RAM abnormality (setting value abnormality)) and a second game stop condition (irregular notification of magnetic abnormality or the like) that stop the execution of a specific process related to the game. When the progress of the game is stopped based on the first game stop condition, the output of the external output signal is stopped immediately before the progress of the game is stopped, regardless of whether the special game state signal (external output signal (jackpot information)) is output for a variable period or a fixed period.

On the other hand, in the second game stop condition, the game progress is stopped in the same way as in the first game stop condition, but the external output signal can be continuously output immediately before the game progress is stopped, regardless of whether the special game state signal (external output signal (jackpot information)) is output for a variable period or a fixed period. For example, if it is determined that the game is to be stopped due to detection of fraud or the like during the output of the external output signal (jackpot information) that is output for a fixed period (128 milliseconds) during the transition to time reduction due to the special condition time reduction (second game stop condition), it is possible to maintain the timer value in the state before the game was stopped by stopping the update of the timer that measures the output time of the external output signal, and the output of the external output signal can be maintained in the ON state. This makes it unnecessary to determine whether the external output signal was in an output state when it was determined that the game was to be stopped, so it is possible to control the output of the external output signal using a common process regardless of whether it is an exception process (game stop) or normal process.

When gameplay is stopped due to the first game stop condition (RAM abnormality (setting value abnormality)), a setting change operation is required to resume, which results in the game state being initialized, so the external output is also set to OFF when it is determined that there is a RAM abnormality. On the other hand, when gameplay is stopped due to the second game stop condition (faulty notification of magnetic abnormality, etc.), recovery is possible by turning the power back on or detecting that the abnormality has been lifted, so recovery from the state before gameplay was stopped is required, and if the external output is set to OFF when it is determined that gameplay has stopped, it will be turned ON again after recovery, which may result in the hall controller erroneously detecting that a signal was output twice, so the external output is maintained when gameplay is stopped.

A security signal is output when play is stopped due to both a RAM abnormality and fraudulent activity, but the security signal alone cannot determine which factor caused play to stop. In contrast, in the gaming machine of this embodiment, the game stops when fraud such as a magnetic error is detected, and a different control is used than when play is stopped due to a RAM abnormality. This makes it possible to determine whether play was stopped due to fraud or due to an unexpected abnormality such as noise or a malfunction when play is stopped due to fraudulent activity (second game stop condition) or RAM abnormality (first game stop condition). Furthermore, it becomes possible to know from the outside when the gaming machine stopped operating normally due to fraudulent activity, which can be used to identify the fraudster, for example, by using a surveillance camera installed in the hall.

From the above explanation, each configuration can be identified as follows.

(5) The main control MPU 1311 (game control means) has a first game stop condition and a second game stop condition that stop the execution of a specific process related to the game, and when the game progress is stopped based on the first game stop condition, the output of the special game state signal is stopped regardless of whether the special game state signal is output for a variable period or a fixed period (immediately before the game progress is stopped), and under the second game stop condition, the game progress is stopped in the same way as the first game control means, but the special game state signal can be continuously output regardless of whether the special game state signal is output (for a variable period or a fixed period) (immediately before the game progress is stopped).

In the configuration shown in (5), the stop of a game due to the first game stop condition requires a setting change operation to return to the game, and as a result, the game state is also initialized, so the external output is also set to OFF at the timing when it is determined that the RAM is abnormal. In addition, since the stop of a game due to the second game stop condition can be returned to by turning the power back on or detecting the cancellation of the abnormality, the output is kept ON by stopping the update of the timer that measures the output time of the external output signal, so that it is not necessary to determine whether the external output signal was in an output state when it was determined that a game was stopped, and by re-outputting the external output signal after recovery, it is possible to prevent the hall control side from erroneously detecting that a signal was output twice, so it is possible to control the output of the external output signal using a common process regardless of whether it is an exception process (game stop) or a normal process.

<<Time-saving transition counter stops updating>>
In the gaming machine of this embodiment, the time-saving state is shifted to the special condition time-saving state by repeating the variation that does not win the special lottery a predetermined number of times. Therefore, there is a risk of fraudulent acts of shifting to the special condition time-saving state in a short time by falsely detecting the winning of the start winning port by radio waves or magnetism, and illegally increasing the number of times the special lottery is drawn. In order to suppress such fraudulent acts, in the gaming machine of this embodiment, when radio waves or magnetism are detected, the update of the time-saving transition counter is stopped for a predetermined suppression period. This suppression period continues until the suppression period is released even after the radio waves or magnetism are no longer detected and the fraud is resolved. The suppression period is released, for example, by a release operation by an employee of the hall, by turning the power back on, by opening the door, etc. By configuring in this way, it is possible to prevent the time-saving state by the special condition time-saving state from being illegally generated by fraudulent acts by radio waves or magnetism.

"others"
In the gaming machine of this embodiment, multiple presentation modes are executed according to the result of a special lottery. The multiple presentation modes are different presentation modes according to the player's profit such as the game value and the expectation of a big win. In a special presentation mode (the presentation mode with the highest profit for the player) among the multiple presentation modes, the update of the time-saving transition count is suppressed. During this suppression period, an external output signal indicating that the period is a suppression period is output so that the hall control side can recognize that it is a suppression period. The external output signal may be used for both the big win information and the time-saving period, or may be a dedicated external output signal. Based on the external information signal output during the suppression period, the hall control side can recognize that it is a period in which the update of the time-saving transition counter is suppressed.

The special presentation mode may be a presentation mode that is executed when a specific condition is met in a pre-reading presentation that suggests that there is a high possibility of a jackpot in the reserved memory, or a presentation mode in which a specific jackpot pattern stops to indicate a specific jackpot (for example, a jackpot with the most winning balls). Furthermore, it may be a presentation mode that corresponds to a game state such as a high probability game state or a time-saving game state.

As mentioned above, the initialization of the time-saving transition count is notified to the hall control side by outputting an external output signal (jackpot information) when the time-saving state transition occurs due to the special condition time-saving state, but the initialization of the time-saving transition count may be notified by outputting another external output signal. For example, when a special lottery is won, a signal to initialize values such as the number of fluctuations that have been counted may be sent from the main control board 1310 of the gaming machine, and when this signal is received by the hall control side, the value corresponding to the time-saving transition count may be initialized. If it is not possible to increase the number of types of signals to be output or if increasing the number of types of signals increases management costs, other signals may be used as well. For example, it may be an external output signal (jackpot information), a pattern confirmation signal, or a combination of multiple specific signals (for example, both signals during time-saving and jackpot information).

The external output signal (jackpot information) or external output signal (during time-saving) may be output when the variation of the special symbol stops, but in the gaming machine of this embodiment, it is output after a predetermined pattern determination period has elapsed since the symbol stopped. When transitioning to a time-saving state due to special condition time-saving, the variation of the special symbol stops when the time-saving transition count reaches 0, and the output of the external output signal is started by a timer interrupt after the predetermined determination period has elapsed, and the variation of the special symbol starts at the next timer interrupt (if the reserved number is not 0). Therefore, each external output signal indicating the time-saving state due to special condition time-saving is output from the timing (before) even if the reserved number is 0. This makes it possible to identify that the time-saving state due to special condition time-saving has started even if there is no reserved number, and the exact game situation can be grasped.

The timing at which the output of the external output signal starts may be the next pattern change after the special pattern change when the time-saving transition count reaches 0. Also, the output of the external output signal may start after the stop pattern is determined in the first pattern change after the time-saving state due to the special condition time-saving state starts. By outputting the signal after the special pattern change actually starts after the conditions for starting the time-saving state due to the special condition time-saving state are met, it is possible to minimize the difference between the timing of the signal output and the timing of the start of the time-saving state, and accurate information can be collected. In this case, by setting the time-saving transition count not to start when the next change is 0, the player will be immediately activated by the time-saving state due to the special condition time-saving state from the first change, so it can be used as a service (morning) from the hall side. For example, the time-saving transition count is changed until it reaches 0 from the end of business on the previous day until the start of business on the next day, and the number of changes of the data lamp is reset (returned to 0). As a result, after the start of business on the next day, the first player can activate the time-saving state due to the special condition time-saving state at the same time as the first pattern change starts. By changing the symbols after business hours have ended, players can be prevented from realizing that the time-saving mode will be in effect based on the results of the previous day.

[26-3. Output of individual external output signals according to game status]
The output mode of the external output signal is not limited to the example shown in FIG. 425, and other modes are also possible. FIG. 426 is a modified example of a time chart showing the output timing of an external output signal related to a time-saving state due to a special condition time-saving in the gaming machine of this embodiment. In the example shown in FIG. 426, by outputting individual external output signals (special condition time-saving, probability fluctuation) corresponding to individual game states (e.g., time-saving state (special condition time-saving, normal time-saving), jackpot game state, probability change state, etc.), it is possible to manage the ball output according to the game state.

In addition, in the time chart shown in FIG. 425, an external output signal corresponding to the jackpot information ("special prize" in FIG. 426) was output for 128 ms when the time-saving state was changed due to the special condition time-saving or specific pattern time-saving, but in the modified example shown in FIG. 426, the external output signal (jackpot information, special prize) is not output. In a one-type two-type hybrid machine, if the signal indicating the start of the special condition time-saving and the signal indicating the special prize (jackpot information) are used together, the time-saving signal may rise before the special prize signal when the actual jackpot round excluding the small jackpot is considered to be the jackpot, and there is a possibility that it may be mistaken for the start of the time-saving state due to the specific pattern time-saving. Therefore, as in the modified example shown in FIG. 426, the above-mentioned problem can be solved by outputting the signal indicating the start of the special condition time-saving and the signal indicating the special prize (jackpot information) as external information separately.

In addition, in this modified gaming machine, the same signal (time-saving signal) is output in both the normal time-saving state and the special condition time-saving state, so the normal time-saving state and the special condition time-saving state cannot be managed separately. Therefore, when it is necessary to separate the data for the special condition time-saving state and the normal time-saving state, a dedicated external information signal is output that is output only when the special condition time-saving state is established. The same is true for the special pattern time-saving state; when it is desired to manage the ball output (base) in each of the normal time-saving state, the special condition time-saving state, and the special pattern time-saving state, a dedicated signal is output for each of the special condition time-saving state and the special pattern time-saving state (times t201 to t202, times t208 to t209).

Finally, in the gaming machines of this embodiment and this modified example, when the probability of winning the special lottery is high, a dedicated signal is output. This makes it possible to grasp the timing to start updating the time-saving transition count in ST machines and drop lottery machines. The update of the time-saving transition count is invalid during high probability (valid only during low probability), so it is possible to manage the time-saving transition count from the end of the high probability state. Since the time-saving transition signal is output during both high probability and low probability time-saving, it is necessary to determine whether or not the high probability is in effect after the end of the jackpot gaming state and update the time-saving transition count. In addition, when a drop lottery is executed in which the probability of winning the special lottery changes from high to low by lottery, the update of the time-saving transition count starts at the timing of transition to low probability. Therefore, in the case of a gaming machine that executes a drop lottery, it is necessary to initialize the time-saving transition count at the timing of winning the drop lottery.

[27. Control configuration of peripheral control board]
The special condition time reduction in the gaming machine of this embodiment has been described above. Next, the performance control in the gaming machine of this embodiment will be described, focusing on the control of displaying images on the performance display device (main display device) 1600. First, the configuration for performing the performance control will be described. The gaming machine of this embodiment is equipped with a main control board 1310 as a means for controlling the overall game, a peripheral control board 1510 as a means for controlling the performance of the game, and further equipped with a payout control board 951 for controlling the payout of game balls, etc. The configuration and basic control of the main control board 1310 and the payout control board 951 are as described in FIG. 17, etc., so the description will be omitted, and the description will be supplemented as necessary.

The performance control is executed by the peripheral control board 1510 based on the command transmitted from the main control board 1310. Here, the configuration and control required for the peripheral control board 1510 to execute the performance control after receiving the command will be described. First, the basic configuration of the peripheral control board 1510 that controls the overall performance will be described, and in particular, the configuration for displaying images on the performance display device (main display device) 1600 of this embodiment will be described. Furthermore, the control required from when the power of the gaming machine is turned on until the peripheral control board 1510 can execute the performance will be described.

[27-1. Configuration of peripheral control board]
Fig. 427 is a block diagram showing the control configuration of the peripheral control board 1510. As shown in Fig. 427, the peripheral control board 1510 includes a peripheral control unit 1511 that performs performance control based on a command transmitted from the main control board 1310, a performance display control unit 1512 that performs drawing control of the performance display device 1600 based on control data from the peripheral control unit 1511, a sound source IC (04TKK0030) that outputs sound, an external RAM (05TKK0020) for storing performance data before execution or for temporarily storing decoded image data, and a performance data ROM (05TKK0070) for storing a program for controlling performance and performance data. Each configuration of the peripheral control board 1510 will be described below.

[27-1a. Peripheral control unit]
The peripheral control unit 1511, which controls the performance on the peripheral control board 1510, includes a CPU (04TKK0011), a RAM (04TKK0012), and a boot ROM (05TKK0013), and further includes various I/O interfaces (not shown). The peripheral control unit 1511 may be disposed on the board as an individual electronic component, or may be configured as a peripheral control IC that integrates these into a single semiconductor chip.

The peripheral control unit 1511 further includes external input/output means such as a parallel I/O port and a serial I/O port, and receives, for example, various commands sent from the main control board 1310. The CPU (04TKK0011) controls various performances based on the programs and data stored in the RAM (04TKK0012). The programs include those that perform system-side processing such as initial settings for the CPU (04TKK0011) and various devices, and those that perform application-side processing to control the performance of lamps, movable bodies, sound sources, images, etc.

The RAM (04TKK0012) is allocated a work area for temporarily storing data during program execution, and a program area for storing programs read from the boot ROM (05TKK0013) or performance data ROM (05TKK0070). The work area and program area may each be configured as separate RAMs.

Based on the various commands received, the CPU (04TKK0011) transmits game board side light emission data from the serial I/O port for the lamp drive board to each decorative board of the game board 5 to output a lighting signal, a blinking signal, or a gradation lighting signal to the color LEDs, etc., provided on each decorative board of the game board 5.

The CPU (04TKK0011) also transmits game board side drive data from the serial I/O port for the game board decoration drive board to the drive motor or drive solenoid of the game board 5 in order to output drive signals to the drive motors that operate the various performance units provided on the game board 5, and transmits door side drive light emission data from the serial I/O port for the frame decoration drive board to the door frame 3 side, which is composed of door side drive data for outputting drive signals to the vibration motor 356, operation button lift drive motor 367, and protrusion force adjustment drive motor 381, etc., provided on the door frame 3, and door side light emission data for outputting lighting signals, flashing signals, or gradation lighting signals to the color LEDs, etc., provided on each decorative board of the door frame 3.

Furthermore, based on the various commands received, the CPU (04TKK0011) transmits control data (display commands) indicating the screen to be displayed on the performance display device 1600 from the serial I/O port for the display control unit to the performance display control unit 1512, and outputs control signals (sound commands) for extracting sound information to the sound source IC (04TKK0030).

The detection signals from the contact detection sensor body 358, the pressure detection sensor 373, the lift detection sensor 374, and the protrusion force detection sensor 375 of the performance operation unit 300 provided on the door frame 3 are input to the peripheral control unit 1511.

The CPU (04TKK0011) also receives a signal (operation signal) from the performance display control unit 1512 indicating that the performance display control unit 1512 is operating normally, and monitors the operation of the performance display control unit 1512 based on this operation signal.

Note that the peripheral control unit 1511 has an external WDT (watchdog timer) (not shown) in addition to the built-in WDT (watchdog timer) built into the CPU (04TKK0011), and the CPU (04TKK0011) uses both the built-in WDT and the external WDT to diagnose whether its own system is out of control. Note that the WDT (watchdog timer) may be monitored only by the external WDT without providing a built-in WDT.

The display commands output from the CPU (04TKK0011) to the performance display control unit 1512 are sent via a serial input/output port, and in this embodiment, the bit rate (the amount of data that can be sent per unit time) is set to 19.2 kilobits per second (bps). On the other hand, the initial data, door frame side light flashing command, game board side light flashing command, movable body drive command, etc., output from the CPU (04TKK0011) to the game board 5 side are sent via multiple serial input/output ports different from the display commands, and in this embodiment, the bit rate is set to 250 kbps.

The boot ROM (05TKK0013) stores the power-on processing executed when the power is turned on, and the data necessary for that processing. In the gaming machine of this embodiment, when the power is turned on, the power-on processing is executed by processing a program stored in a specified area (boot area) of the boot ROM (05TKK0013). At this time, the devices and input/output means (I/O) necessary for starting the peripheral control board 1510 are initialized.

[27-1b. External RAM
The external RAM (05TKK0020) pre-stores (preloads) data stored in the performance data ROM (05TKK0070) in response to instructions from the CPU (04TKK0011) or VDP (04TKK0060).

In addition, by having the CPU (04TKK0011) and VDP (04TKK0060) access data stored in the external RAM (05TKK0020), it is possible to speed up processing significantly more than if programs and data were obtained from the performance data ROM (05TKK0070). Therefore, in order to perform performance control quickly, access to the external RAM (05TKK0020) needs to be as fast (efficient) as possible, and for example, DDR3 SDRAM or a memory (storage medium) of a successor standard is used.

While the external RAM (05TKK0020) can be accessed quickly, it is not realistic from a cost standpoint to secure the capacity to store all the data required for the performance, so various performance data is stored in a performance data ROM (05TKK0070) which can store large amounts of data. However, reading data from the performance data ROM (05TKK0070) takes longer than reading data from the external RAM (05TKK0020), so as mentioned above, the time required to read the performance data is reduced by pre-loading the performance data from the performance data ROM (05TKK0070), which takes time to read, into the external RAM (05TKK0020), which can read data quickly.

The data to be preloaded may be any data stored in the performance data ROM (05TKK0070), and may include not only image (video) data and sound data, but also various control data and scheduler data for controlling the performance. Furthermore, frequently displayed image data (e.g., identification patterns and hold displays) and output sound data may be preloaded as resident data, thereby speeding up performance control.

In this way, the external RAM (05TKK0020) stores image data (meeting certain conditions) and sound data (music, sound effects, and other sound data itself). Meanwhile, the RAM (04TKK0012) of the peripheral control unit 1511 stores all the programs (excluding the boot program) executed by the CPU (04TKK0011) and data used in the processing of those programs (e.g., scheduler data, etc.), and is further assigned a work area that is temporarily used when those programs are executed.

Furthermore, in the gaming machine of this embodiment, the data to be preloaded is selected in advance and resides in the external RAM (05TKK0020). As described below, the data is stored in the resident content data area (05TKK081) of the performance data ROM (05TKK0070) (see FIG. 428B), and after power is turned on, the data is preloaded from the resident content data area (05TKK081) of the performance data ROM (05TKK0070) to a specified area of the external RAM (05TKK0020) (resident content data storage area on the external RAM side), thereby speeding up performance control. The data to be preloaded will be described later.

[27-1c. Sound output unit (sound source IC)]
The sound source IC (04TKK0030) enables high quality sound based on sound data. The sound source IC (04TKK0030) acquires sound data based on control data (sound commands) from the peripheral control unit 1511, and controls the playback of music, sound effects, and other sounds that match various performances from the top center speaker, top side speaker, and main frame speaker 622 of the main frame 4, which are provided on the door frame 3 and main frame 4, and the like.

The sound data is stored in the performance data ROM (05TKK0070) and is information for outputting music, voice, sound effects, etc. The sound source IC (04TKK0030) is capable of outputting sound based on sound data obtained directly from the performance data ROM (05TKK0070), while also being capable of outputting sound based on sound data preloaded from the performance data ROM (05TKK0070) and stored in the external RAM (05TKK0020).

The volume can be adjusted by rotating a volume adjustment switch that protrudes rearward from the peripheral control board box that houses the peripheral control board 1510. In this embodiment of the gaming machine, sound signals (e.g., 2ch stereo signals, 4ch stereo signals, 2.1ch surround signals, or 4.1ch surround signals, etc.) are sent as sound information to the top center speaker and top side speakers on the door frame 3 side and the main frame speaker 622 for low frequencies on the main frame 4, thereby presenting a more realistic sound effect (sound production) than ever before.

[27-1d. Performance display control unit]
[27-1d-1. Basic configuration of the performance display control unit]
The performance display control unit 1512 performs drawing control of the performance display device 1600. As shown in FIG. 427, the performance display control unit 1512 includes a VDP (abbreviation of Video Display Processor) (04TKK0060) that controls the display of the performance display device 1600, and an image RAM (04TKK0090) to which various data stored in the performance data ROM (05TKK0070) is transferred and copied. In the gaming machine of this embodiment, the performance display control unit 1512 is disposed on the peripheral control board 1510, but may be disposed on a separate board.

When the VDP (04TKK0060) receives drawing instructions (LCD display command list) output from the peripheral control unit 1511, it extracts sprite data (image data) based on the input drawing instructions, generates drawing data to be displayed on the performance display device 1600, and outputs the generated drawing data to the performance display device 1600. The sprite data (image data) used for display is obtained from the performance data ROM (05TKK0070) or external RAM (05TKK0020), and is stored in the image RAM (04TKK0090).

When the performance display device 1600 does not accept a drawing instruction from the peripheral control unit 1511, the VDP (04TKK0060) outputs an execution signal to the peripheral control unit 1511 to inform the performance display device 1600 of this fact. The VDP (04TKK0060) employs a double buffer system for the frame buffer. In the double buffer system, two screens' worth of frame buffers are reserved in the image RAM (04TKK0090), one of which is used as a display buffer for displaying on the performance display device 1600, and the other is used as a drawing buffer for drawing the display image. When drawing to the drawing buffer is completed, the display buffer and drawing buffer are switched (bank flip), and this process is repeated. A line buffer system may also be employed in which one line's worth of drawing data for drawing in the left and right directions is stored in a line buffer, and the one line's worth of drawing data stored in this line buffer is output to the performance display device 1600.

The sprite data (image data) stored in the performance data ROM (05TKK0070) is the original data before the sprite is expanded into bitmap format, and is stored in a compressed state. To explain what a "sprite" is, a "sprite" is an image displayed as a unit on the performance display device 1600. For example, when displaying various people (characters) on the performance display device 1600, the data for drawing each person is called a "sprite." As a result, when displaying multiple people on the performance display device 1600, multiple sprites are used. In addition to people, the houses, mountains, roads, etc. that make up the background are also sprites, and the entire background can be treated as a single sprite. These sprites are drawn on the performance display device 1600 after their positions on the screen and their hierarchical relationships when sprites overlap are set.

As mentioned above, in the double buffer method, sprites are drawn in the drawing buffer, and after drawing is complete, the drawing buffer and display buffer are switched to display on the performance display device 1600, and this process is repeated. Because the frame buffer buffers one entire screen frame, unlike the line buffer method, there is no limit to the number of sprites that can be arranged horizontally, and sprite display performance can be improved in proportion to the improvement in the drawing speed to the image RAM (04TKK0090) by the VDP (04TKK0060) and the access speed to the image RAM (04TKK0090).

The basic configuration of the performance display control unit 1512 has been explained above, but we will now explain the detailed configuration of the performance display control unit 1512.

[27-1d-2. VDP]
The VDP (04TKK0060) includes a CG data decoder (04TKK0061) that decodes image data read from the performance data ROM (05TKK0070), a rendering engine (04TKK0062) that processes and generates one frame of image data, and a 3D display The device includes a pixel shader (04TKK0063) that generates and processes images for the effect, and a display controller (04TKK0064) that controls the output of images to the effect display device 1600. Other components not shown in the figure include an effect data ROM (05TKK0070) The VDP controller controls the internal configuration of the VDP (04TKK0060), and includes a CG memory controller that controls the reading of image data from the VDP.

[27-1d-3. Image RAM]
As described above, the image RAM (04TKK0090) is a memory that temporarily stores data necessary for the VDP (04TKK0060) to execute drawing processing. The memory area provided by the image RAM (04TKK0090) is mostly occupied by buffers for temporarily recording characters and images to be displayed on the screen, and such buffers include a frame buffer (04TKK0091) and an off-screen buffer (04TKK0092).

The frame buffer (04TKK0091) is a memory area in which image data that specifies the display screen of the performance display device 1600 is temporarily stored. The off-screen buffer (04TKK0092) is a memory area in which image data is temporarily stored during the process of creating an image to be displayed on the performance display device 1600. As mentioned above, the frame buffer (04TKK0091) has a double buffer structure with a first buffer and a second buffer, and is configured to be switchable between a drawing bank and a display bank.

[27-1d-4. Overview of Image Display Control]
Next, a procedure for displaying an image on the performance display device 1600 will be described. The performance display control unit 1512 receives a liquid crystal display list command created by the CPU (04TKK0011) of the peripheral control unit 1511 by processing a main command received by the main control board 1310 by the peripheral control unit 1511, and displays an image on the performance display device 1600 based on the received liquid crystal display list command.

The LCD display list commands are temporarily stored in a command buffer (command memory). The VDP (04TKK0060) displays images on the performance display device 1600 based on the LCD display list commands stored in the command buffer. The command buffer has a FIFO (First In First Out) structure, and the LCD display list commands are stored in the order they are received and processed in the order they are stored. The command buffer may be provided independently as a command memory, or may be allocated to an area in the work RAM (not shown) inside the VDP.

The LCD display list command also identifies each frame of the performance display device 1600, and includes, for example, control commands related to VDP control such as the interrupt operation of the VDP (04TKK0060), drawing commands related to the drawing operation of the rendering engine (04TKK0062), and decode commands related to the decoding operation of the CG data decoder (04TKK0061).

The VDP (04TKK0060) reads image data (image information) from the external RAM (05TKK0020) or performance data ROM (05TKK0070) using the CG memory controller, decodes the read image data using the CG data decoder (04TKK0061), and generates image display data (image display information). Note that since the image data read by the CG memory controller is stored in a compressed state, the read image data is decoded by the CG data decoder (04TKK0061).

The VDP (04TKK0060) also processes image data generated by the rendering engine (04TKK0062). Furthermore, when displaying an image on the performance display device 1600 in 3D, the image data is pixel-converted by the pixel shader (04TKK0063) and converted into a lenticular image. Finally, the final image data to be displayed on the performance display device 1600 is stored in the frame buffer (04TKK0091).

In addition, in the gaming machine of this embodiment, as described later, it is possible to display objects such as characters displayed on the screen in 3D. Therefore, 3D image (stereoscopic image) data and 2D image (planar image) data are stored in the performance data ROM (05TKK0070). Both of these image data are compressed using the same method. In this embodiment, they are compressed in both the X-axis direction (horizontal direction) and the Y-axis direction (vertical direction). This allows the capacity of the image data to be reduced. It is also possible to compress only one direction. In addition, by using the same compression method for the 3D image data and the 2D image data, it is possible to simplify the process of decoding the data (when the compressed state is released). The CG data decoder (04TKK0061) of the VDP (04TKK0060) supports multiple types of compression methods, and any method can be selected, but a common compression method is selected during implementation. In addition, for images on which pixel conversion is performed by the pixel shader (04TKK0063), as described later, it is desirable to use lossless compression because the images are synthesized on a pixel-by-pixel basis for each dot.

The VDP (04TKK0060) processes the decoded image data as necessary based on the LCD display list command using the rendering engine (04TKK0062). Then, the image to be finally displayed on the performance display device 1600 is drawn in the drawing bank of the frame buffer (04TKK0091). After that, the drawing bank is switched to the display bank by bank switching (bank flip) and the image is displayed on the performance display device 1600. The timing of the bank flip is determined by the bank flip wait command included in the LCD display list command, and after the VDP (04TKK0060) accepts the bank flip wait command, the bank flip is actually executed at a predetermined cycle (bank flip cycle, for example, 1/30 seconds = screen update cycle (frame cycle)).

[27-1d-4. Memory Map]
When performing image processing, the VDP (04TKK0060) accesses memory areas provided by the image RAM (04TKK0090) and the external RAM (05TKK0101). A common address space is assigned to these memory areas. Figure 428A shows an example of a memory map of the memory areas accessed by the VDP (04TKK0060).

Referring to FIG. 428A, the memory areas accessed by the VDP (04TKK0060) include the frame buffer (04TKK0091), off-screen buffer (04TKK0092), expansion buffer (05TKK0093), temporary save buffer (05TKK0094) and decode buffer (05TKK0101).

As mentioned above, the frame buffer (04TKK0091) and off-screen buffer (04TKK0092) are actually provided by the image RAM (05TKK0101), but this is not limited thereto. For example, the frame buffer (04TKK0091) that is ultimately output to the performance display screen may be provided by the image RAM (05TKK0101), while the off-screen buffer (04TKK0092) may be provided by an external RAM (05TKK0020).

The expansion buffer (05TKK0093), temporary save buffer (05TKK0094) and decode buffer (05TKK0101) are provided by either or both of the image RAM (04TKK0090) and/or external RAM (05TKK0101).

[27-1e. Performance data storage unit (performance data ROM)]
Above, we have explained the configuration of the performance display control unit 1512. Next, we will explain the performance data ROM (05TKK0070) that stores various performance data. As mentioned above, the performance data ROM (05TKK0070) stores data and programs necessary for executing performances.

[27-1e-1. Configuration of performance data ROM]
The performance data ROM (05TKK0070) used in the gaming machine of this embodiment is configured as a ROM board mounted on the peripheral control board 1510. The interface standard for connecting the peripheral control board 1510 and the performance data ROM (05TKK0070) is Serial ATA. Therefore, the performance data ROM (05TKK0070) is equipped with a SATA controller (05TKK0071) and performs control in response to access requests from the CPU (04TKK0011), VDP (04TKK0060), etc.

The performance data ROM (05TKK0070) includes a storage device (05TKK0073) that stores various programs and data. The storage device (05TKK0073) of the performance data ROM (05TKK0070) in the gaming machine of this embodiment is a NAND type flash memory. NAND type flash memory is a large-capacity non-volatile storage medium.

NAND type flash memory has a basic unit of a 1-bit or multiple-bit storage area called a "memory cell". In the performance data ROM (05TKK0070) of the gaming machine of this embodiment, the storage area is multiple bits (for example, 3 bits) in order to achieve low cost. The memory cell stores data by holding an electric charge in the charge holding area. Data is read out in pages consisting of multiple memory cells. Furthermore, since the NAND type flash memory has a configuration in which multiple cells are connected in series, high integration can be achieved at low cost. Therefore, by adopting a NAND type flash memory for the performance data ROM (05TKK0070) in the gaming machine of this embodiment, it is possible to achieve both a large capacity storage area and cost reduction. Note that the storage device (05TKK0073) is not limited to a NAND type flash memory, and may be another storage medium as long as the capacity, cost, etc. meet certain conditions.

However, NAND flash memory has a much slower data access speed than the DDR3 DRAM used in general RAM, so reading image and sound data during performance can become a bottleneck, causing delays in the performance. Therefore, in this embodiment of the gaming machine, a cache memory (05TKK0072) is installed in the performance data ROM (05TKK0070) to speed up data reading.

The cache memory (05TKK0072) is composed of DRAM (or SRAM) that allows high-speed reading and writing. When the CPU (04TKK0011) or VDP (05TKK0020) accesses data stored in the performance data ROM (05TKK0070), if the data is stored in the cache memory (05TKK0072), the time it takes to read the data can be significantly reduced. This is particularly effective when a large amount of data is read from the performance data ROM (05TKK0070).

The SATA controller (05TKK0071) holds management information for the performance data ROM (05TKK0070). The management information for the performance data ROM (05TKK0070) may also be held in the cache memory (05TKK0072). The management information includes memory cell layout information, etc. The cache memory (05TKK0072) may also be built into the SATA controller (05TKK0071).

In a NAND flash memory, when data stored in the same area (memory cell) is repeatedly read, the digital value of a neighboring cell may change. In addition, if a specific area (memory cell) is not accessed for a long period of time, the charge may be lost and the data may no longer be retained. In order to solve this problem, the performance data ROM (05TKK0070) installed in the gaming machine of this embodiment has a refresh function. The refresh function, for example, reads the contents of a page in which data is stored and writes back the same contents. This re-injects charge into the memory cell, suppresses unintended data changes, and prevents data read errors. The pages on which the refresh function is executed may be only the pages in which data is written, or may be all pages. For example, the page in which data is written may be executed when the power is turned on, and the page may be executed periodically or manually for all pages.

The refresh function can be executed by the SATA controller (05TKK0071) independently of the CPU (04TKK0011) and the VDP (04TKK0060). In the performance data ROM (05TKK0070) of the gaming machine of this embodiment, the refresh function can be executed automatically when the power is turned on. The mechanism by which the performance data ROM (05TKK0070) detects power-on is provided in the SATA controller (05TKK0071) separately from the detection of power-on by the CPU (04TKK0011). Therefore, the refresh function can be executed independently without waiting for an instruction from the CPU (04TKK0011). In addition, by providing the SATA controller (05TKK0071) with a power-on detection mechanism, the refresh function can be executed based on the power supply to the performance data ROM (05TKK0070) regardless of the state of the power supply on the peripheral control board 1510 side. Furthermore, even if the power supply to the performance data ROM (05TKK0070) is cut off while the refresh function is being executed and the refresh function is interrupted, it is possible to execute the refresh function from the beginning when the power is turned back on.

In addition, rather than executing the refresh function every time the gaming machine is turned on, the refresh function may be executed when the gaming machine is turned on one day (24 hours) or more after the last time it was turned on. This is to prevent the refresh function from being executed frequently, since the power may be turned on multiple times a day for maintenance, etc. Also, the period during which execution of the refresh function is suppressed is not limited to 24 hours, and may be less than 24 hours (e.g., about 12 hours) or longer than 24 hours (e.g., about 48 hours).

In addition, it is also possible to execute the refresh function in response to an external command by operating a specific operating means (such as a power-on switch or a performance button). This allows arcade employees to start the refresh function at any time. It may also be possible to execute the refresh function in response to a command from the CPU (04TKK0011), or in response to a command from the peripheral control unit 1511 based on a command sent from the main control board 1310.

The performance data ROM (05TKK0070) can also execute a refresh function when the SATA controller (05TKK0071) detects a certain number of cells (cells with reduced charge) that are likely to cause a data error. However, if the refresh function is executed while play is in progress, the data read speed will decrease, and normal performance control may not be possible. Therefore, as with the gaming machine of this embodiment, the refresh function is executed when the gaming machine is turned on, i.e., before play begins, to suppress the implementation of the refresh function during game play and to configure the performance to be executed smoothly, thereby suppressing a decline in interest in the game.

Furthermore, as mentioned above, in the NAND flash memory, data is read in units of pages consisting of multiple memory cells, so when reading small data, even data that does not need to be read must be read, resulting in poor read efficiency. For example, when the gaming machine is started (powered on), frequently accessed data, i.e., images that are frequently displayed, are transferred to the cache memory (05TKK0072), but data that is not to be transferred and stored in the page is also read, so the amount of data actually read is much larger than the total amount of image data required. Therefore, a long time is required to preload data from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) from the time a specified power supply voltage (3.3V) is supplied to the peripheral control board 1510 until sound output and image display are actually possible.

In this embodiment of the gaming machine, when preloading sound data and resident image data (frequently read images or small images) into the external RAM (05TKK0020), the data transfer unit is changed from 16 KB to 32 KB in accordance with the specifications of the performance data ROM (05TKK0070), reducing overhead and shortening transfer time. The time required to turn on the power is directly affected by the amount of data preloaded, and also affects the execution of the refresh function.

Also, as mentioned above, when the power is turned on, the effect data ROM (05TKK0070) executes a refresh function (PoB; Power on Busy), so access to the storage device (05TKK0073), which is a NAND type flash memory, occurs continuously. This causes the data read speed for the effect data ROM (05TKK0070) to decrease. As mentioned above, the speed decrease is particularly noticeable when reading small data, so if an image with a capacity of about 16 KB, which is smaller than the data amount per page, is displayed when the power is turned on, if the image data is read directly from the storage device (05TKK0073) of the effect data ROM (05TKK0070), it will take a long time before the game can start. Note that about half of the images displayed on the effect display screen 1600 are 16 KB or less in capacity.

One possible solution to the above problems would be to extend the standby time on the main control board 1310 until an image can be displayed, but because the time required for the inspection process during mass production of gaming machines would be longer, it was necessary to shorten the startup time of the peripheral control board 1510. For example, when inspecting whether the display of a demo screen (including lamp effects, movable object effects, etc.) is performed normally when the power is turned on, the demo screen starts according to a power-on command from the main control board 1310, so the time from when the power is turned on until the above inspection is completed is affected by the standby time of the main control board 1310, resulting in a problem of reduced inspection efficiency.

As mentioned above, image data is preloaded into the external RAM (05TKK0020) as resident data, and the VDP (04TKK0060) reads the image data from the external RAM (05TKK0020). Also, while the bandwidth is limited and the storage device (05TKK0073) is accessed while the refresh function is being executed, the time until the refresh function ends increases, but since no effects that require large amounts of performance data are executed immediately after power-on, no practical problems arise.

The data to be preloaded into the external RAM (05TKK0020) is not for each image, but is a capacity that minimizes the overhead when writing data to the cache memory (05TKK0072). Therefore, data of a capacity larger than the capacity of one image (16 KB) (for example, 32 KB) is transferred. This is because when attempting to read small-sized data, data is actually read in page units, and the specified data is extracted from the read data, so by setting the size so that data extraction is not required, the increase in overhead is suppressed. For example, the size of the data to be preloaded into the external RAM (05TKK0020) may be a page unit, which is the unit of data reading. Note that the size of resident image data is not necessarily limited to 32 KB or less, and may be large-capacity image data exceeding 32 KB that is frequently used.

In addition, since the access speed to the external RAM (05TKK0020) is faster than the access speed to the performance data ROM (05TKK0070), the performance control can be accelerated by increasing the amount of data to be preloaded, but increasing the capacity of the external RAM (05TKK0020) leads to increased costs. Furthermore, as described above, the smaller the size of the image data to be preloaded into the external RAM (05TKK0020), the worse the read efficiency becomes. In the gaming machine of this embodiment, about half of the image data has a capacity of 16 KB or less, and further, image data of 32 KB or less accounts for 2/3 of the total. Therefore, about 1/2 to 2/3 of the total image data may be preloaded into the external RAM (05TKK0020) in ascending order of size. When defining the threshold value of the size of the image data to be preloaded, it is sufficient to set it so that the image data is included in the 1/2 to 2/3 size of the total in ascending order of size of the image data, and has a capacity of ²ⁿ bytes (page or block unit).

As described above, by setting the size of the data to be preloaded into the external RAM (05TKK0020), it is possible to significantly reduce the time it takes for the peripheral control board 1510 to become operational.

In addition, in the gaming machine of this embodiment, the performance data ROM (05TKK0070) is provided with a cache memory (05TKK0072), thereby shortening the data read time. Furthermore, by reading data from the cache memory (05TKK0072) or external RAM (05TKK0020), the frequency of accessing the storage device (05TKK0073), which is a NAND flash memory, can be reduced, thereby suppressing data degradation, preventing a decrease in read performance due to error correction, etc., and extending the lifespan of the storage device (NAND flash memory).

As mentioned above, the smaller the size of the preloaded image data, the higher the read efficiency. However, there may be image data that is not preloaded into the external RAM (05TKK0020) due to reasons such as its large size despite being read relatively frequently. Such image data may be loaded into the external RAM (05TKK0020) after the data has been read a predetermined number of times or more. In this case, a memory area for post-resident data may be reserved in advance in the resident content data area (05TKK0081), or a memory area for post-resident data may be reserved separately from the resident content data area (05TKK0081).

In addition, image data that is not preloaded in the external RAM (05TKK0020) may be controlled so that it is more likely to be stored in the cache memory (05TKK0072) (so as to increase the hit rate of the cache memory). When data is read, the cache memory (05TKK0072) stores the read data, so that the target image data is read at a predetermined timing (dummy read). This predetermined timing may be, for example, at predetermined intervals, when a predetermined performance is performed, or when the machine transitions to a waiting state for customers. The data to be read may be defined in advance, or the number of times that non-preloaded image data has been read may be tallied and set based on the results of the tally.

[27-1e-2. Control during execution of refresh function]
The above explains the basic control regarding the performance data ROM (05TKK0070). Here, we will explain the state and control of the peripheral control board 1510 and main control board 1310 while the refresh function of the performance data ROM (05TKK0070) is being executed.

The refresh function of the performance data ROM (05TKK0070) is not, in principle, executed by calling from a program such as the power-on processing (Fig. 429) of the peripheral control board 1510, but is executed independently when a specified power supply voltage is supplied to the performance data ROM (05TKK0070).

After the gaming machine is powered on, the main control board 1310 waits for a predetermined time until the peripheral control board 1510 can draw on the liquid crystal display device 1600. Specifically, in the gaming machine of this embodiment, the machine waits in the power-on wait process (step 02TKS0130) of the power-on startup confirmation process (step 02TKS0020 in FIG. 382; FIG. 383). The wait time is set to at least the time until drawing control by the performance display control unit 1512 is possible, and is therefore controlled so that the execution of the refresh function of the performance data ROM (05TKK0070) is completed by the time the power-on wait process ends.

In other words, by the time the refresh function of the performance data ROM (05TKK0070) is completed when the power is turned on (while the refresh function is still running), the main control board 1310 starts supplying power to the control circuit, and after the reset signal is released, it starts executing the processing of the start address of the program code (address 8000) (power-on processing), and the processing up to the power-on wait processing is executed.

In addition, game play can only begin once a timer interrupt is permitted (step 02TKS0070 in FIG. 382), and game play is controlled not to begin until the power-on startup confirmation process (step 02TKS0020) is complete, i.e., until the execution of the refresh function of the performance data ROM (05TKK0070) is complete.

In addition, before the main control MPU 1311 of the main control board 1310 executes the power-on wait process (step 02TKS0130), it executes a power-on pre-wait setting-related switch acquisition process (step 02TKS0120) to acquire the signal levels of the setting-related operation parts (setting key 971, RAM clear switch 954). Therefore, since the signal levels of the setting-related operation parts are only acquired and it is the setting operation determination process (step 02TKS0040) that determines whether a setting operation has actually been performed, the setting function is not executed while the refresh function is being executed, and the system is controlled not to transition to a setting state (setting change state, setting confirmation state).

In addition, since the RAM clear determination process (step 02TKS0030) is executed after the power-on wait process is executed, the RAM will not be cleared even if a RAM abnormality occurs until the refresh function of the performance data ROM (05TKK0070) is completed. After the refresh function is completed, it is determined whether or not to clear the RAM, and the RAM is cleared based on the result of that determination.

After the power-on process starts, the main control MPU 1311 enables at least the watchdog timer setting when setting the RAM protection permission (step 02TKS0010). At this time, the watchdog timer is controlled so that it does not time out while waiting for the peripheral control board 1510 to be initialized by the power-on wait process. This makes it possible to reliably detect the occurrence of an abnormality because the watchdog timer is started after the power-on wait process is executed.

In addition, if only the power supply to the main control board 1310 is cut off while the refresh function of the performance data ROM (05TKK0070) is being executed, the execution of the refresh function is not interrupted and continues as is. When the power supply to the main control board 1310 is resumed, the main control board 1310 executes the power-on processing again. At this time, even if it is possible to return to the state before the power failure based on the information stored in the main control RAM 1312, the return processing is not executed and waits until the execution of the refresh function is completed. For example, the processing of displaying the special pattern and the number of reserved memories before the power failure on the function display unit 1400 is performed after the execution of the refresh function. In addition, even if the game state before the power failure was a favorable game state (jackpot game state, high probability state, time-saving state, etc.), the game state is returned to the favorable game state after the execution of the refresh function. Furthermore, if the payout processing of the game media before the power failure has not been completed, the payout processing of the game media is stopped until the refresh function is completed, and the processing is continued after the refresh function is completed.

Note that the ball lending operation may be accepted even when the refresh function is being executed, since it is controlled only by the main control board 1310. When a ball lending operation is accepted, the ball may be lent even when the refresh function is being executed, or the ball may be lent after the execution of the refresh function is completed. In addition, since the control of the launch of game balls is controlled only by the main control board 1310, there is no need to suppress the launch control, even when the refresh function is being executed.

As described above, the refresh function of the performance data ROM (05TKK0070) is executed independently of the control of the main control board 1310, so even if the power supply to the main control board 1310 is resumed, there is no need to execute the refresh function again, preventing excessive load from being placed on the performance data ROM (05TKK0070).

Furthermore, while the refresh function of the performance data ROM (05TKK0070) is being executed, even if various sensors detect an abnormality, no abnormality notification is issued, and processing related to abnormality notification is suppressed. Since there is a possibility that the drawing data and audio data required for abnormality notification cannot be obtained while the refresh function is being executed, this ensures that abnormality notification is issued reliably.

The refresh function of the performance data ROM (05TKK0070) is generally executed when the power is turned on, but it can also be executed while game play is in progress. If the refresh function is executed while game play is in progress, game control can be started or continued. At this time, the peripheral control board 1510 is capable of accepting command input from the main control board 1310. The processing corresponding to the command is executed after the refresh function has been executed. This makes it possible to process commands immediately after the refresh function is executed, minimizing the time lag.

When the refresh function of the performance data ROM (05TKK0070) is being executed, the initialization process of the drawing control for the performance display device 1600 is not started, but the initialization process of the other performance devices can be started. For example, a self-check operation (initialization operation) of the movable props can be executed. At this time, the series of initialization operations may be terminated after the refresh function has been executed, or the series of initialization operations may be terminated while the refresh function is being executed.

If there are unpaid game balls (game media) while the refresh function of the performance data ROM (05TKK0070) is being executed during gameplay, the unpaid prize balls are paid out. Also, if a ball lending operation is accepted, the ball lending operation can be started. Furthermore, it enables the execution of launch control by the launching device. These controls are not directly related to the control in the peripheral control board 1510, and can therefore be executed independently of the execution of the refresh function.

Furthermore, if an abnormality is detected while the refresh function of the performance data ROM (05TKK0070) is being executed during continued play, an abnormality notification is displayed after the refresh function is completed. At this time, the abnormality notification may be displayed only if the abnormality continues after the refresh function is completed, or may not be displayed if the abnormality has been resolved, or a decision may be made as to whether or not to display an abnormality notification depending on the type of abnormality that has occurred. Furthermore, if a command related to an abnormality notification is received from the main control board 1310 while the refresh function is being executed, an abnormality notification may be made possible by means other than the performance display device 1600 (such as a lamp or sound).

In addition, when the execution of the refresh function of the performance data ROM (05TKK0070) is started while game play is continuing, drawing control is interrupted and the drawing of decorative patterns on the performance display device 1600 is suppressed. At this time, the display of special patterns on the function display unit 1400 of the main control board 1310 continues even while the refresh function is being executed. Similarly, if there is a hold memory, the hold display on the performance display device 1600 is suppressed while the refresh function is being executed, and the display resumes after the refresh function is executed. At this time, the hold display on the function display unit 1400 of the main control board 1310 continues even while the refresh function is being executed.

While the refresh function is being executed, the effect display device 1600 is in a specific mode. For example, when the gaming machine is powered on and the refresh function is being executed, nothing may be displayed since game play has not yet started, or the start-up screen of the gaming machine may be displayed. At this time, the display image of the start-up screen may be configured so as not to affect the execution of the refresh function by being stored in a storage medium other than the effect data ROM (05TKK0070). Also, if the refresh function is executed after the gaming machine is powered on, such as while game play is continuing, a dedicated image indicating that the refresh function is being executed is displayed.

In addition, if the gaming machine is capable of switching to a power-saving mode, it will not switch to the power-saving mode while the refresh function is being executed. For example, the transition to the power-saving mode may be suppressed when a dedicated image indicating that the refresh function is being executed is displayed, and the suppression may be released when execution of the refresh function is completed, or the command to switch to the power-saving mode that is sent from the main control board 1310 to the peripheral control board 1510 while the refresh function is being executed may be canceled (ignored).

Furthermore, while the refresh function is being executed, the execution of various adjustment means (volume adjustment, light adjustment, effect settings, etc.) is suppressed. For example, while the refresh function is being executed, the execution of various adjustment means is suppressed by controlling so as not to accept operation input from an operation unit such as an effect button. In this way, stable control can be achieved by suppressing the execution of various controls by the peripheral control board 1510 while the refresh function is being executed.

[27-1e-3. Storage area for storing various data]
FIG. 428B is a diagram explaining the allocation of memory areas provided by the performance data ROM (05TKK0070). In addition to image (CG) data and sound data, the performance data ROM (05TKK0070) stores various programs executed by the CPU (04TKK0011), data for the programs, performance control data for controlling each performance, etc. Note that the performance data ROM (05TKK0070) may store only image (CG) data that requires a large capacity, and a separate ROM may be placed on the peripheral control board 1510 and stored in the ROM for other programs and data.

The memory areas provided by the performance data ROM (05TKK0070) include a resident content data area (05TKK0081), a peripheral control program area (05TKK0082), a drawing program area (05TKK0083), a sound data area (05TKK0084) and an image (CG) data area (05TKK0085).

The resident content data area (05TKK0081) is an area where performance data (resident content data) that is frequently used in performances, etc. is stored. By preloading the resident content data into the external RAM (05TKK0020) after power is turned on, the frequency of access to the performance data ROM (05TKK0070) is reduced, speeding up performance control and extending the life of the storage device. In addition, the above-mentioned effects can be further achieved by including a large amount of small-sized data in the resident content data. The resident content data area (05TKK0081) does not need to be located in the first area of the performance data ROM (05TKK0070), but it is desirable to place preloaded and resident data together in a designated area as much as possible.

The resident content data is basically image data, but is not limited to image data and may be sound data or data for driving performance devices such as lamps and movable objects (including schedule data). These data are used more frequently than other data. Note that if the volume of sound data or data for driving performance devices such as lamps and movable objects is small, the data may be stored in advance in an external RAM (05TKK0020).

Furthermore, it is not necessary to preload all resident content data into the external RAM (05TKK0020), and the data may be swapped depending on the frequency of use. For example, the data may be swapped depending on the game state. Specifically, when displaying different decorative patterns in the normal state and the time-saving state, the patterns for the normal state may be preloaded in the normal state, and when transitioning to the time-saving state, the decorative patterns for the time-saving state may be preloaded in place of the decorative patterns for the normal state.

The peripheral control program area (05TKK0082) may include, in addition to the performance control program in the peripheral control unit 1511, a program for controlling sound output and a program for controlling lamps and movable objects. Note that each program for controlling an individual performance device may be assigned its own area.

The peripheral control program area (05TKK0082) also stores control data required to execute various performance control programs. For example, it includes scheduler data that defines the performance for each variation pattern. The scheduler data includes sub-performance scheduler data for controlling various performance devices, and drawing scheduler data for displaying the screen to be drawn on the performance display device 1600, but the drawing scheduler data may be stored in the drawing program area (05TKK0083).

The sub-performance scheduler data includes light emission mode generation scheduler data for controlling the light emission modes of various LEDs and lamps, sound generation scheduler data for playing background music, sound effects, notification sounds, etc., and electrical drive source scheduler data for controlling the drive modes of electrical drive sources such as motors and solenoids.

The drawing program area (05TKK0083) stores programs and control data for displaying the performance image on the performance display device 1600. The control data includes, for example, drawing scheduler data. The drawing scheduler data corresponds to the control data (display command) from the peripheral control unit 1511, and is configured by chronologically arranging screen data that specifies the screen configuration, and specifies the order of the screens to be drawn on the performance display device 1600. The drawing scheduler data also includes non-resident area transfer scheduler data, which is configured by chronologically arranging non-resident area transfer data that specifies the order when transferring image data stored in the image data area to the buffer area (non-resident area) of the image RAM (04TKK0090). The non-resident area transfer data specifies the order in which the screen data to be drawn on the performance display device 1600 according to the progress of the drawing scheduler data is transferred in advance from the image data area (05TKK0085) to the buffer area of the image RAM (04TKK0090).

The sound data area (05TKK0084) stores information that defines the sounds that the gaming machine outputs. The sound data area (05TKK0084) also stores data for controlling the output of sounds based on the sound data stored in the sound data area (05TKK0084).

The image (CG) data area (05TKK0085) stores various types of image data. The image data includes an image data area for single images and an image data area for moving images. The image data area for single images includes data for 2D images and 3D images (details will be described later in Figure 435). The structure for storing data in the image data area for moving images is as shown in Figure 456, etc.

[27-2. Processing when peripheral control board is powered on]
The configuration of the peripheral control board 1510 has been described above. Next, the processing performed when the peripheral control board 1510 is powered on will be described. Fig. 429 is a flow chart showing the processing performed when the peripheral control board 1510 is powered on. The power-on processing is performed by the CPU (04TKK0011) of the peripheral control unit 1511 processing the boot program stored in the boot ROM (05TKK0013) and the peripheral control program stored in the performance data ROM (05TKK0070).

When the gaming machine is powered on and the power supply voltage required to operate the peripheral control board 1510 is supplied, the CPU (04TKK0011) reads the boot program from the boot ROM (05TKK0013) and starts it (step 05TKS0010). In addition, it initializes the devices and input/output ports required to execute the boot program (step 05TKS0020). At this time, the devices that are initialized are only those required to execute the boot program, and are not for executing various effects, but for making various settings required to transfer data and programs from the effect data ROM (05TKK0070) to the RAM (04TKK0012).

Next, the CPU (04TKK0011) executes the boot program to load the peripheral control program from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) (step 05TKS0030). It then starts up the peripheral control program on the external RAM (05TKK0020) (step 05TKS0040). The peripheral control program performs the processing required to start performance control. The CPU (04TKK0011) also initializes the devices required to execute the peripheral control program (step 05TKS0050).

The CPU (04TKK0011) then synchronously preloads the drawing program from the performance data ROM (05TKK0070) into the RAM (04TKK0012) (step 05TKS0060). The drawing program is for executing a process for displaying an image on the performance display device 1600, and at this timing, for example, the program is executed to draw the logo mark that is displayed when the power is turned on.

Synchronous preload means that the CPU (04TKK0011) directly sends a request to the SATA controller (05TKK0071) of the performance data ROM (05TKK0070) to transfer data to the external RAM (05TKK0020) or VRAM (04TKK0090). Furthermore, the CPU (04TKK0011) waits until the data transfer is complete. The end of the data transfer can be confirmed by referring to the transfer completion status register of the SATA controller (05TKK0071), and the CPU (04TKK0011) periodically refers to it to confirm the end of the data transfer (polling). Note that the SATA controller (05TKK0071) is not configured to confirm the end of the data transfer by making an interrupt request to the CPU (04TKK0011). Additionally, while the CPU (04TKK0011) is polling, it will wait without executing any other initialization processes (e.g., lamps or motors).

The CPU (04TKK0011) then asynchronously preloads sound data from the performance data ROM (05TKK0070) into the external RAM (05TKK0020) (step 05TKS0070). The sound data is data for outputting sound from the speaker by the sound source IC (04TKK0030). The preloaded sound data includes not only the sound data for the startup sound that is output when the power is turned on, but also sound data for all sounds related to the performance.

In asynchronous preloading, the CPU (04TKK0011) sends a request to the VDP (04TKK0060) or sound source IC (04TKK0030) to transfer data to the external RAM (05TKK0020) or VRAM (04TKK0090). The end of the data transfer can be confirmed by the VDP (04TKK0060) or sound source IC (04TKK0030) that received the transfer request making an interrupt request to the CPU (04TKK0011) when the transfer is complete. This allows the CPU (04TKK0011) to continue executing initialization processing even after sending the transfer request. For example, various initial settings can be performed in parallel while sound data is being preloaded.

When performing an asynchronous preload, the CPU (04TKK0011) instructs the VDP (04TKK0060) on the source address (address in the performance data ROM (05TKK0070)), destination address (address in the external RAM (05TKK0020), address in the VRAM (04TKK0090)), and amount of data to be transferred. Based on instructions from the CPU (04TKK0011), the VDP (04TKK0060) specifies the block (page) of the storage device (05TKK0073) that will be the source of the transfer to the SATA controller (05TKK0071), and sequentially reads out the specified data. When reading data sequentially from the storage device (05TKK0073), the SATA controller (05TKK0071) can only read data in blocks/pages, so excess data is read. When preloading data into the external RAM (05TKK0020), only the necessary data (excluding excess data) is preloaded.

Then, the CPU (04TKK0011) asynchronously preloads the resident content data from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) (step 05TKS0080). The resident content data is data that is frequently used when performing performances. The resident content data is mainly image data. As mentioned above, by preloading the resident content data from the performance data ROM (05TKK0070) to the external RAM (05TKK0020), the time it takes to read the data can be shortened. The resident content data contains a lot of data that is used after the game has started and there is a grace period before the performance actually starts, so the data is transferred from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) by asynchronous preloading. In the gaming machine of this embodiment, as mentioned above, all sound data is preloaded, but if the volume of sound data is large, it may be divided into resident and non-resident sound data, and only the resident sound data may be preloaded when the power is turned on.

Finally, the CPU (04TKK0011) initializes the devices required for drawing and sound output (step 05TKS0080). Once the above processing is complete, the game presentation can begin.

As described above, in the gaming machine of this embodiment, the time required to read the performance data can be shortened by preloading the resident content data from the performance data ROM (05TKK0070) to the external RAM (05TKK0020). This is because the time required to read data from the external RAM (05TKK0020) is shorter than the time required to read data from the performance data ROM (05TKK0070). This relaxes the required read speed for the storage medium of the performance data ROM (05TKK0070), making it possible to select a storage medium with a large capacity and low cost, thereby reducing the manufacturing costs of the gaming machine. Furthermore, shortening the time required to read the performance data makes it possible to realize performances that use a wide variety of image data, improving the performance effect and increasing the interest of the game.

In addition, in the gaming machine of this embodiment, the preloading of performance data from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) can be performed synchronously or asynchronously. Therefore, when it is desired to stop processing until data transfer is complete, data can be transferred by synchronous preloading, while asynchronous preloading can be used to execute processing in parallel with data transfer, allowing for flexible response according to the type of performance control.

[28. Performance control on peripheral control board]
The configuration of the peripheral control board and the processing at the time of power-on have been described above. Next, the basic performance control in the peripheral control board 1510 will be described. Here, the control for executing the performance based on the main command (variation pattern command, special chart performance synchronization command, etc.) sent from the main control board 1310 based on the result of the special lottery will be mainly described.

[28-1. Configuration of peripheral control unit and performance control]
Fig. 430 is a diagram showing an example of the configuration of modules and the like used in the performance control by the peripheral control board 1510 of the gaming machine of this embodiment. Each configuration is configured not only as hardware, but also as software by a computer program executed by the CPU (04TKK0011) of the peripheral control unit 1511. Some or all of the various modules may be configured as hardware.

The performance data ROM (05TKK0070) stores various modules (programs) for controlling the overall performance and driving each performance device, and is executed by the CPU (04TKK0011) of the peripheral control unit 1511. These modules include a command analysis module (04TKK0102), liquid crystal module (04TKK0113), sound module (04TKK0122), lamp module (04TKK0123), and drive device module (04TKK0124).

In addition to the various modules, the peripheral control unit 1511 is also provided with buffers such as a main command buffer (04TKK0101), an LCD display list command buffer (04TKK0114), a lamp data output buffer (04TKK0125), and a motor data output buffer (04TKK0126). It also includes a serial control IC (04TKK0127) for sending control signals to each performance device.

The main command buffer (04TKK0101) receives the main command sent from the main control board 1310 and passes it to the command analysis module (04TKK0102). In this embodiment, the main command is a set of 3 bytes of information, with the first byte being the command status value, the command mode value, and the checksum value of the command status and mode value, and is output in three batches of 8 bits each. The main command buffer (04TKK0101) receives this signal and evaluates the checksum value. If the received command is not determined to be correct, the received command is discarded, and if it is determined to be correct, it is passed to the command analysis module (04TKK0102).

As mentioned above, the main command includes information that indicates the game state and the operating state of the gaming machine that are related to the presentation. For example, the main command includes whether or not a gaming ball has entered the start winning slot, the results of the special symbol lottery, the variation pattern (variation time) of the special symbol, etc. Furthermore, when this embodiment is applied to a slot machine, the main command can include the opening of the door and other sensor outputs, the operation of the start lever and stop button, the rotation and stopping of the reels, and the success or failure of the hand when the reels stop. Note that the commands listed here are merely examples, and various commands can be included depending on the type of gaming machine and the presentation content.

The command analysis module (04TKK0102) analyzes the contents of the main command and determines whether it is a command related to performance. If it is determined to be a command related to performance, the performance control unit (04TKK0100) executes the corresponding process.

The performance control unit (04TKK0100) determines the performance block number corresponding to the performance content based on the analysis result of the main command, and identifies the performance block data. For example, if the command indicates the start of a special pattern change, it identifies the performance block data corresponding to the change pattern. Also, if an error occurs, it identifies the performance block data corresponding to the corresponding error display. The same applies when an abnormality occurs.

The performance block data includes scheduler data for executing the performance. Scheduler data is data that stores multiple functions in the order in which they should be executed, which instruct the specific processing to be executed among multiple processes requested according to the performance device in order to control the performance in each performance device. The performance block data consists of "LCD performance block data" for executing the performance displayed on the performance display device (LCD display device) 1600, and "sub-performance block data" for controlling sound, lamps, props, etc. Note that "LCD pattern block data" for displaying changing patterns on the performance display device 1600 may be treated separately from "LCD performance block data".

The performance block control unit for controlling the performance based on the performance block data includes a liquid crystal performance block control unit (04TKK0110) and a sub-performance block control unit (04TKK0120). The liquid crystal performance block control unit (04TKK0110) determines control information for executing a performance that displays an image on the performance display device 1600. The sub-performance block control unit (04TKK0120) determines control information for executing sound output, lighting/flashing of lamps, operation of props, etc. Performance control based on performance block data will be described later with reference to FIG. 431 etc.

When the performance block number is determined, the LCD performance block control unit (04TKK0110) executes the LCD performance block data corresponding to that performance block number. The LCD performance block data is data for executing the LCD display performance, and includes one or more pieces of drawing scheduler data. By executing the drawing scheduler data, backgrounds, characters, patterns, etc. are displayed on the performance display device 1600.

In order to execute the drawing scheduler data contained in the block data, the LCD performance block control unit (04TKK0110) activates the LCD performance scheduler execution unit (04TKK0111) for displaying performance elements such as backgrounds and characters, and the LCD pattern drawing scheduler execution unit (04TKK0112) for displaying patterns.

The LCD performance drawing scheduler execution unit (04TKK0111) and the LCD pattern drawing scheduler execution unit (04TKK0112) are executed at a frame period (1f = approximately 33.334 milliseconds), which is the screen update period. The LCD performance drawing scheduler execution unit (04TKK0111) and the LCD pattern drawing scheduler execution unit (04TKK0112) drive the drawing scheduler data specified by the LCD performance block data with the drawing scheduler, and generate an LCD display list command by the LCD module (04TKK0113). The LCD display list command is passed to the performance display control unit 1512 via the LCD display list command buffer (04TKK0114). The performance display control unit 1512 generates display data based on the received LCD display list command and outputs it to the performance display device 1600. The display data is generated, for example, by expanding the character data specified by the LCD display list command on the frame buffer at a specified position.

An LCD display command list is a group of commands for setting commands (data) related to display control in the registers provided for each function of the VDP (04TKK0060) in order to control the display of images on a display device. Data for one frame of the screen is created as a group of data (list) and then stored in the LCD display list command buffer.

When the performance block number is determined, the sub-performance block control unit (04TKK0120) executes the sub-performance block data corresponding to that performance block number. The sub-performance block data is block data for executing the lamp, sound, and motor performances, and includes one or more sub-performance scheduler data. By executing the sub-performance scheduler data, the lamp, sound, and motor performance devices perform the operations previously defined in the sub-performance scheduler data.

The sub-performance block control unit (04TKK0120) starts the sub-performance scheduler execution unit (04TKK0121) according to the execution cycle of various performance devices, and executes the sub-performance scheduler data included in the sub-performance block data. The sub-performance scheduler execution unit (04TKK0121) includes a sub-performance 1f scheduler execution unit that controls the performance devices at one frame intervals, and a sub-performance 1ms scheduler execution unit that controls the performance devices at one millisecond intervals. In this way, by providing a scheduler execution unit according to the execution interval, it is possible to execute performance according to the configuration of the gaming machine and the required specifications of the performance device. For example, since 1f corresponds to the drawing update interval, it is possible to synchronize the sound output and the operation of the role with the liquid crystal display. Also, if the detection interval of the sensor is in 1 ms units, it is possible to quickly respond to any malfunctions in the operation of the role.

The sub-performance block control unit (04TKK0120) executes performance control other than the LCD display, but in this embodiment, three types of performance control will be described as examples: sound output, lighting/flashing of lamps, and operation of props. Below, an overview of control according to the type of performance device will be described.

First, a case where a performance is performed by sound output will be described. If the sub-performance block data contains scheduler data for sound output, the sub-performance scheduler execution unit (04TKK0121) starts the scheduler for sound output and executes the scheduler data. Then, when a function for sound output (e.g., SPLAY) is executed, the sound module (04TKK0122) generates sound source drive data (sound source command) based on the specified parameters. Note that multiple schedulers can be started, and for example, by controlling the output of background music and performance sound effects with different schedulers, sound source drive data can be generated in parallel and sound can be output simultaneously. The sound source IC (04TKK0030) reads the sound data specified by the sound source drive data from the sound ROM (04TKK0040) and outputs it from the speaker 622.

Next, we will explain how to execute a performance using lamps. If the sub-performance block data contains scheduler data for lamp control, the scheduler execution unit starts the lamp scheduler and executes the scheduler data. Then, when a lamp control function (e.g., HPLAY) is executed, the lamp module (04TKK0123) generates lamp drive data based on the specified parameters. As with sound output, it is possible to start multiple schedulers, allowing multiple lamps and layers to be controlled in parallel.

The lamp module (04TKK0123) creates lamp drive data every period (1 frame or 1 millisecond) and outputs it to the lamp data output buffer (04TKK0125). The lamp data output buffer 5130 has a double buffer structure, and temporarily stores the lamp drive data created by the lamp module (04TKK0123) and outputs it to the serial control IC 5150. By making the lamp data output buffer (04TKK0125) a double buffer, it is possible to simultaneously create and output lamp data in a single period. By configuring it in this way, in response to an increase in the processing time of lamp control due to an increase in the number of lamp systems or overlapping of lamp layers, the output of lamp data is set to the operation period following the creation of the lamp data, so that the processing related to the creation of the lamp data can be completed within the processing period.

Specifically, when the lamp data output buffer (04TKK0125) is composed of buffer A and buffer B, for example, if the previously created lamp drive data is stored in buffer A, the data for the next cycle is output to buffer B, and the previously created lamp drive data is output from buffer A to the serial control IC (04TKK0127) by DMA, causing each lamp to light up and blink. In the next cycle, the buffers are switched, lamp drive data is output from the lamp module (04TKK0123) to buffer A, and the lamp drive data stored in buffer B is output to the serial control IC (04TKK0127). Note that the same is true for controlling the lighting and blinking of LEDs, and explanations of lamp control can be substituted for LEDs unless otherwise specified.

Finally, we will explain the case of controlling the drive device (e.g., motor, solenoid) for operating the props. If the sub-performance block data contains scheduler data for controlling the drive device, the scheduler execution unit starts the drive device scheduler (motor scheduler) and executes the scheduler data. Then, when a function for controlling the drive device (e.g., MPLAY) is executed, the drive device module (04TKK0124) generates motor drive data based on the specified parameters. As with sound output, it is possible to start multiple schedulers, allowing multiple drive devices to be controlled in parallel.

The drive module (04TKK0124) creates motor drive data every period and outputs it to the motor data output buffer (04TKK0126). In this embodiment, the motor drive data is created and output in a 1 millisecond period. The motor data output buffer (04TKK0126) temporarily stores the motor drive data generated by the drive module (04TKK0124) and outputs it to the serial control IC (04TKK0127). The motor drive data is output from the serial port of the peripheral control unit 1511 without using DMA. However, the latch signal for reflecting the motor data in each drive is not output at the same timing as the timing when the motor data output buffer (04TKK0126) outputs it to the serial control IC (04TKK0127), but in the period next to the transmission of all the motor data. This is because the output timing of the latch signal is after the serial transmission of all motor data is completed, and as the serial transmission time of the motor data becomes longer, the waiting time until the serial transmission is completed becomes overhead, and the overall processing time per frame period becomes insufficient. In this embodiment, the waiting time until the serial transmission is completed is reduced to zero by shifting the timing of the motor data serial transmission and the corresponding latch signal output, but if the CPU used can use multiple DMAs, the waiting time until the serial transmission is completed can be reduced to zero in the same way by serially transmitting the motor drive data using the DMA and outputting the latch signal with a DMA completion interrupt. Also, at the same time as the motor drive data is output, the performance drive photo information is input to the drive device module (04TKK0124). Each performance drive photo information is received by serial communication via a parallel serial control IC.

[28-2. Production control using production blocks and scheduler data]
Next, the execution procedure of the preview performance based on the scheduler data corresponding to the fluctuation pattern will be described. Here, the execution procedure of the basic performance and the preview performance based on the performance scheduler data corresponding to the first half fluctuation of the fluctuation pattern "10H03H" will be described. The first half fluctuation of the fluctuation pattern "10H03H" is a normal fluctuation for 12 seconds, and the corresponding performance block data is assigned with the normal fluctuation 12 seconds liquid crystal performance block data (LCD03_BLK), the normal fluctuation 12 seconds liquid crystal pattern block data (ZUG03_BLK), and the normal fluctuation 12 seconds sub-performance block data (SCH03_BLK). Figure 431 is a diagram explaining the outline of the performance control of the first half fluctuation (normal fluctuation 12 seconds) of the fluctuation pattern "10H03H".

When the variation pattern command (main variation related command) "10H03H" is received from the main control board 1310, the command analysis module (04TKK0102) analyzes the received command to identify the variation pattern number "10H03H" and notifies the performance control unit (04TKK0100).

The performance control unit (04TKK0100) identifies the performance device to be controlled and determines the corresponding block data number, and based on the determined block number, obtains the block data number corresponding to the variation pattern number "10H03H" from a table in which these combinations are defined. By making the block data numbers corresponding to each performance device all the same number, it becomes possible to execute all the performances of each performance device in sync.

Then, the performance control unit (04TKK0100) transmits block data numbers equal to the number of performance devices to be controlled to the LCD performance block control unit (04TKK0110) and the sub-performance block control unit (04TKK0120).

Then, the LCD performance block control unit (04TKK0110) executes the block data corresponding to the transmitted block data number in chronological order through the LCD performance drawing scheduler execution unit (04TKK0111) and the LCD pattern drawing scheduler execution unit (04TKK0112), and the sub-performance block control unit (04TKK0120) executes the block data corresponding to the transmitted block data number through the sub-performance scheduler execution unit (04TKK0121). Specifically, the LCD performance drawing scheduler execution unit (04TKK0111) executes the normal variation 12-second LCD performance block data "LCD03_BLK" corresponding to the first half variation, the LCD pattern drawing scheduler execution unit (04TKK0112) executes the normal variation 12-second LCD pattern block data "ZUG03_BLK", and the sub-performance scheduler execution unit (04TKK0121) executes the normal variation 12-second sub-performance block data "SCH03_BLK".

When processing of LCD performance block data begins, one or more LCD performance schedulers corresponding to that LCD performance block data are started, and drawing scheduler data specified according to the performance content is executed. The drawing scheduler data includes LCD performance functions (LCD function information) for displaying images on the performance display device 1600, specifies parameters according to the performance content, and transmits the LCD function information to the LCD module (04TKK0113) in a specified order. The LCD module (04TKK0113) analyzes and executes the received LCD function information, and transmits an LCD display list command to the performance display control unit 1512, thereby performing drawing on the performance display device 1600.

When processing LCD pattern block data, the LCD pattern scheduler is started and drawing scheduler data corresponding to the variable display mode of the pattern is executed. The procedure for drawing on the performance display device 1600 is the same as when processing LCD performance block data.

On the other hand, when processing of sub-performance block data is started, one or more sub-performance schedulers corresponding to the sub-performance block data are started, and the scheduler data specified according to the performance content is executed. The scheduler may be prepared according to the execution cycle, or it may be shared and the execution cycle may be set at the time of startup.

As mentioned above, the scheduler data contains functions (performance data designation functions) for controlling performance devices such as lamps ("KPLAY"), speakers ("SPLAY"), and props ("MPLAY"). The scheduler data is configured to execute designated performances by executing the functions sequentially in a defined order. These functions are sent to modules (lamp module (04TKK0123), sound module (04TKK0122), drive device (motor) module (04TKK0124), etc.) that correspond to the performance devices to be controlled, and each module executes the performances using the various performance devices.

It is also possible to call other scheduler data from the scheduler data using the function "REQ". In this case, it is possible to control various performance devices by executing a performance data designation function in the scheduler data called up. Furthermore, by using the command transmission function "COMMAND", control by command rather than function is possible. For example, by sending an LCD command to the LCD module (04TKK0113) at the timing of executing a performance data designation function that controls the operation of the reel, it is possible to execute a performance in which the operation of the reel and the drawing are linked.

[28-3. Functions for controlling performance]
The above describes the execution procedure of the basic performance and preview performance based on the performance scheduler data corresponding to the first half of the variation pattern "10H03H". As described above, the performance scheduler data defines functions for controlling the performance, and the performance is executed by executing the defined functions. Functions include those that perform sequence control such as specifying the operation sequence of the performance device, those that operate the performance device by specifying parameters, and those that control the liquid crystal display. Here, some representative functions are selected and explained.

Figure 432 shows an example of a function in the presentation control of the gaming machine of this embodiment. The functions are classified into groups such as sequence control, various presentation devices, and LCD display.

Functions belonging to the sequence control group are primarily functions for controlling the flow of presentation. For example, "NOP" is a wait function that waits for a time corresponding to the number of times it is executed by specifying the number of times it is executed as a parameter. The time corresponding to the number of times it is executed varies depending on the processing cycle in which the "NOP" function is executed; if it is executed in a frame cycle, one frame is approximately 33.334 milliseconds in this embodiment, so if the number of times it is executed is 30, it will wait for approximately 1 second, and if it is executed in a 1 ms cycle, specifying the number of times it is executed as 30 will result in a wait of approximately 30 ms. There are also conditional wait functions that wait for a time corresponding to the number of times it is executed. "REQ" is a function for starting another specified scheduler.

Functions that control lamps include "HPLAY" and "KPLAY". "HPLAY" is a function for executing lamp gradation data regeneration processing that lights up the lamp based on the gradation data specified by the parameters. "HPLAY" resets the lamp even if it is being regenerated with the same gradation data, and starts regeneration of the lamp from the beginning when the function is executed. "KPLAY" is similar to "HPLAY", but if the lamp is being regenerated with the same gradation data, it continues regeneration of the currently running lamp without resetting it.

Functions for controlling sound include, for example, "SPLAY" for executing a phrase playback process that outputs sound based on a phrase number specified by a parameter. "SPLAY" resets the number even if sound of the same phrase number is being played, and starts playing the sound from the beginning when the function is executed. On the other hand, if sound of the same phrase number is being played, other functions are provided to continue playing the sound without resetting it. Functions for controlling volume, etc. are also provided.

Functions for controlling the output of motors and solenoids include, for example, "MPLAY," which executes a motor regeneration process that makes the motor regenerate an operation based on the motor data number specified in the parameter. Other functions, such as those for solenoids, are also provided.

Functions other than the LCD performance functions that do not belong to the groups explained so far are conveniently grouped into the user group, and such functions include, for example, "COMMAND" for issuing commands from within the scheduler. "COMMAND" can issue a command directly to the performance display control unit 1512, causing the performance display device 1600 to start drawing. On the other hand, there are also commands that issue a command to the peripheral control unit 1511, which is analyzed by the command analysis module (04TKK0102) and operates in the same way as a main command. Other functions available include a function that copies the contents of the work area of a running scheduler to the work area of another scheduler.

Next, we will explain the LCD display functions. Each LCD display function is managed by function and purpose, and can be divided into groups such as coordinate settings, scale settings, rotation angle settings, alpha settings, 3D settings, frame settings, and Z index settings.

The coordinate setting function, for example, specifies the position of the LCD display object by specifying the coordinates of the display area of the performance display device 1600 and setting the LCD display object, thereby displaying it. Specifically, the function "POSX" specifies the X-axis coordinate position and sets the display position of the LCD display object.

The scaling (scale setting) function, for example, sets the center of the display area that is specified for enlargement or reduction when displaying images or videos stored in the CGROM on the performance display device 1600, or converts the coordinate units. By setting an appropriate coordinate system for the display area and performing drawing processing, it is possible to display the LCD display object at an appropriate position and size. Specifically, the function "SCALE" specifies the X-axis and Y-axis values to set the enlargement or reduction rate of the LCD display object.

The rotation angle setting function, for example, sets the angle at which an LCD display object is rotated for display. By storing only the base LCD display object in the CGROM and displaying it by specifying the angle, there is no need to store multiple LCD display objects after rotation, and this can reduce increases in storage capacity. Specifically, the "ANGLEX" function rotates an LCD display object by specifying the X-axis value.

The alpha setting function "ALPHA" sets the transparency of the LCD display object by specifying the alpha value. The alpha value is a numerical value that indicates the transparency, and can be set from transparent (colorless), which allows the background color to be completely transparent, to completely opaque, which does not allow the background color to pass through at all.

The 3D setting function controls the 3D display of LCD display objects. The gaming machine of this embodiment allows for 3D display of LCD display objects, details of which will be described later. Specifically, the function "3D_SW" sets the 3D display ON/OFF. In addition, the function "3D_DSP" instructs the performance display control unit 1512 (VDP04TKK0060) to control the 3D display (create a command list for 3D control) by specifying parameters. By specifying parameters, it is possible to set the objects to be displayed in 3D (LCD display objects such as backgrounds, characters, and patterns) and the 3D depth (depth) during 3D display.

The "FRAME" function sets the frame value, which is the interval for updating the rendering of the LCD display object. The frame value is a number that indicates the interval for redrawing the LCD display object during animation processing.

The function "ZINDEX", which sets the Z index of an LCD display object, sets the Z index. The Z index is the layer at which the LCD display object is displayed, and by setting it, the LCD display object can be displayed in the foreground on the screen or moved to the background. For example, if the LCD display object is the background, the Z index is set so that it is drawn in the background.

The above describes an overview of the performance control based on the performance block data and scheduler data in this embodiment. Next, the means for displaying images on the performance display device (main display device) 1600 will be described. Specifically, first, the configuration and control for displaying a stereoscopic image will be described, and then the configuration and control for displaying a moving image will be described.

[28-4. Stereoscopic image display]
In the gaming machine of this embodiment, it is possible to display a 3D image (stereoscopic image) that can be viewed stereoscopically together with a flat 2D image (flat image) (3D display, stereoscopic display), and the player can enjoy the performance A part or the whole of an image displayed on the display device 1600 can be viewed stereoscopically. In this embodiment, a lenticular method is adopted as a means for realizing 3D display. In addition to the lenticular type, there is a parallax barrier type in which a liquid crystal panel for a parallax barrier is disposed on the front side of the performance display device 1600. The outline of the lenticular type will be described below.

[28-4a. Overview of the lenticular method]

Binocular disparity (the difference between the image positions seen by the right and left eyes) has the property that it is larger the closer an object is and smaller the farther away an object is, and the brain detects this difference and converts it into distance, allowing the object to be recognized as three-dimensional. The lenticular method makes use of this property to display specific images (lenticular images, stereoscopic display images, 3D display images) through a lenticular lens, allowing the user to visually recognize a three-dimensional, dynamic display of movement with depth. 3D display using the lenticular method will be further explained below with reference to Figure 433.

Figure 433 is a diagram explaining the mechanism of 3D display using the lenticular method, where (A) shows the area seen by the left eye (L) and (B) shows the area seen by the right eye (R).

The lenticular lens is composed of tiny, elongated, kamaboko-shaped convex lenses arranged on its surface. When the lenticular lens is placed on the front side of the performance display device 1600 and a lenticular image (stereoscopic display image, 3D display image) is displayed on the screen of the performance display device 1600, the player can see the displayed image in three dimensions with the naked eye.

Figure 434 is a diagram showing an example of a lenticular image in the gaming machine of this embodiment. As shown in Figure 434, the lenticular image is formed by dividing two or more images into strips and arranging the divided images in order so that each can be viewed through a convex lens to form a single image. The lenticular image thus configured can be viewed three-dimensionally by (A) viewing only the left eye image with the left eye and (B) viewing only the right eye image with the right eye through the lenticular lens as shown in Figure 433. The lenticular lens and lenticular image are configured to be optimal when the player plays at a specified position in front of the gaming machine.

The pixel shader (04TKK0063) installed in the VDP (04TKK0060) of the gaming machine of this embodiment has a compositing function that enables processing of images on a pixel-by-pixel basis, and by utilizing this compositing function, the image for the left eye and the image for the right eye are each divided into strips and arranged alternately to be composited into a single image to generate a lenticular image.

[28-4b. Image layout within image data area]
In the image data area (05TKK0085), an image in which a left-eye image and a right-eye image are arranged side-by-side (a side-by-side image) is stored as an image for generating a lenticular image. That is, the images are stored in the form shown in FIG. 434(A). The left-eye image and the right-eye image are arranged in a continuous area.

In addition, in the gaming machine of this embodiment, it is possible to display a mixture of 2D and 3D images. Therefore, both 2D and 3D images are stored in the image data area (05TKK0085). The 3D images are compressed using a lossless method. By compressing the image data using a lossless method, it is possible to display the compressed image without degrading the image quality when it is decoded. In addition, the 2D images are compressed using a lossy method in principle to suppress the increase in capacity. However, since the patterns are the objects (characters) that the player pays the most attention to, it is preferable to compress them using lossless compression even in flat display. This is because lossy compression may cause the color and shape (contour) to deteriorate compared to the original image before compression, and may cause the image to shift (be different) slightly from the image before compression. Note that lossy compression of the patterns does not make much difference from lossless compression when viewed by the player, and lossy compression may be used if the degradation of the color, contour shape, etc. is difficult to recognize. In addition, when lossless compression is performed, the 2D images and 3D images are compressed using the same method.

Figure 435 is a diagram explaining the arrangement of images stored in the image data area (05TKK0085), where (A) shows the overall arrangement of the image data area (05TKK0085) and (B) shows the details of the arrangement of the area that stores 3D images.

As shown in FIG. 435 (A), the image data area (05TKK0085) is allocated with a distinction between a 2D image storage area for storing 2D images and a 3D image storage area for storing 3D images. Note that a blank area in which nothing is stored may be allocated between the 2D image storage area and the 3D image storage area. This makes it possible to minimize changes to definition information such as address information and to minimize modifications to programs and definition information even if the capacity of the images to be stored increases or decreases. Furthermore, memory areas capable of storing a mixture of 2D and 3D images may be arranged according to function and use.

The 2D images displayed in the effects of the gaming machine of this embodiment include background images, patterns, character images, etc. In addition to these images for effects, images other than effects for displaying errors or announcing abnormalities are also included. These images are arranged according to function or purpose as necessary, and may be arranged in display order when used in a series of consecutive effects.

In principle, 3D images are composed only of images related to the effects. For example, they are characters (objects) that appear in preview effects and designs for effects. Background images used during 3D display may also be stored in the 3D image storage area. The background images stored at this time are not necessarily limited to images that can be displayed in 3D, as long as they can be used during 3D display. Background images that are only used during 3D display may be stored in the 3D image storage area, or only background images that can be displayed in 3D may be stored in the 3D image storage area.

As shown in FIG. 435 (B), a series of images are stored for characters used in effects from their appearance (start of effect) to their exit (end of effect). In this embodiment, the images are stored in chronological order (display order) for each character (preview effect). This simplifies the process because by setting the address of the image that is first displayed when the preview begins (when the character appears), it is possible to update the address for acquiring images as the effect progresses by adding a value for the image size. Also, because images related to a series of effects are stored together, it is easy to manage the arrangement of the images.

[28-4c. Layer structure]
In this embodiment, when an image is displayed on the performance display device 1600, it is drawn in a layer corresponding to the content of the image to be displayed in principle. Fig. 436 is a diagram explaining the arrangement of layers on which the image displayed on the performance display device 1600 of the gaming machine of this embodiment is drawn.

The gaming machine of this embodiment allows for a mixture of 2D and 3D images to be displayed, but the 2D and 3D images are drawn separately on separate layers. The images drawn on each layer are then composited on a frame buffer (or off-screen buffer) and displayed on the performance display device 1600.

The hierarchy (order) of each layer is predetermined, and in principle the order will not be changed. In this embodiment, a layer that displays images for displaying errors and announcing abnormalities is placed at the forefront (top layer), and nothing is displayed while normal play is in progress. On the other hand, when an image is displayed in that layer when an error occurs, the image or message is displayed in front of other images being displayed (at the forefront), so that it can be reliably presented to players, hall employees, etc.

In addition, a reserved layer for displaying reserved images, a preview layer for displaying images for preview performances, a pattern layer for displaying performance patterns, and a background layer for displaying backgrounds are arranged in this order. In the gaming machine of this embodiment, the reserved layer and background layer display 2D images, but when 3D display is performed, a layer for 3D display is provided in addition to the layer for 2D display (when 2D display is not performed, only the layer for 3D display is provided), and images are displayed on the layer for 3D display.

The preview layer is configured to display only 3D images. In the gaming machine of this embodiment, the detailed procedure will be described later, but it is possible to switch to performing the performance in 2D display only, without 3D display. In this case, a layer for performing the preview performance in 2D display may be prepared, but if the 3D image is to be displayed as a 2D image, it may be displayed on a layer for 3D display without preparing a separate layer for 2D display. In this embodiment, the image for 3D display is processed and displayed as described later, so the image is drawn on the preview layer for 3D display.

When images for 2D display and images for 3D display are prepared in advance for a common purpose, both a layer for 2D display and a layer for 3D display are prepared. For example, when an image of a performance pattern for 2D display and an image of a performance pattern for 3D display are prepared in advance, as shown in FIG. 436, layers for displaying the performance patterns are prepared for both 2D display and 3D display.

As described above, by providing a layer dedicated to 3D display (2D display), whenever processing related to that layer is executed, processing dedicated to 3D display is always executed, so there is no need to distinguish whether 2D or 3D display is to be performed, and processing that takes into account differences in display methods such as data handling is not required, making it possible to simplify display control.

When providing layers for 2D display and 3D display of the same image, the same image (e.g., a design, etc.) will not be displayed on multiple layers, so layers that are not drawn are set to hidden. At this time, a parameter (performance switch) that can set whether or not a layer is displayed (ON/OFF) may be defined in the drawing scheduler data. This makes it possible to set the display/hide of layers collectively by setting the parameter (performance switch). Furthermore, since it is no longer necessary to set the display/hide of each layer in order to switch between layers for 2D display and layers for 3D display, it is possible to simplify the control for switching between 2D display and 3D display.

Next, we will explain the procedure for drawing an image on each layer and generating a display screen on the performance display device 1600 by synthesizing each layer. Figure 437 is a diagram explaining the procedure for writing an image to be displayed on the performance display device 1600 of the gaming machine of this embodiment into the frame buffer.

In the gaming machine of this embodiment, images are drawn from the lower (back) layer to the upper (front) layer in sequence. Specifically, first, an image to be drawn as the background is obtained from the image data area (05TKK0085) of the performance data ROM (05TKK0070) and drawn on the background layer. Here, in the example shown in FIG. 437, the obtained background image is not displayed as is, but is enlarged vertically for display, so the image drawn on the background layer is copied to the off-screen buffer (04TKK0092), and the image on the off-screen buffer (04TKK0092) is processed by the rendering engine (04TKK0062).

Next, an image corresponding to the effect pattern is drawn on the pattern layer placed in front of the background layer based on the instructions of the LCD display list command. Furthermore, the contents of the pattern layer are composited with the image of the off-screen buffer (04TKK0092) in which the processed background is drawn (superimposed on the front side of the background image), and the composite image is drawn (copied) on the frame buffer (04TKK0091).

Furthermore, a stereoscopic image of trees and airplanes is displayed as a preview display on the preview layer for 3D display. The image drawn on the preview layer is composited with the image drawn in the frame buffer (04TKK0091). Finally, the reserved display is drawn on the reserved layer, which is placed on the front side, and composited with the image in the frame buffer (04TKK0091), completing the image to be displayed on the performance display device 1600. As the frame buffer (04TKK0091) that generates the display image is a drawing bank, it is then switched to the display bank by bank flipping, and the generated screen is displayed on the performance display device 1600.

29. Basic Procedure for Generating 3D Display Images
Next, an outline of a procedure for generating a 3D display image (lenticular image) by synthesizing a side-by-side 2D image (background image, etc.) with a 3D display image (character, etc.) arranged with a left-eye image and a right-eye image will be described. A specific procedure for generating a display image will be described in detail with reference to Fig. 439 onwards.

In this embodiment of the gaming machine, a 3D display image (lenticular image) is generated by applying the side-by-side image synthesis effect of the pixel shader (04TKK0063) provided in the VDP (04TKK0060).

Figure 438 is a diagram explaining the procedure for synthesizing a 3D image in which a left-eye image and a right-eye image are arranged side-by-side with a side-by-side 2D image (such as a background image) to generate a 3D display image (lenticular image).

First, a 3D image (an image for the left eye and an image for the right eye arranged side by side) is obtained from the image data area (05TKK0085) in which the object to be viewed stereoscopically (a logo mark in Fig. 438 (A)) is drawn. In this 3D image, areas other than the object are transparent, and an alpha channel is set. As mentioned above, the alpha channel is auxiliary data that is stored separately from the color representation data for each pixel, and generally indicates the opacity of the pixel. By placing this image in front of a non-transparent image and compositing it, an image can be generated in which the composited image is used as the background.

In the example shown in FIG. 438, a 3D image (A) is synthesized with a background image (2D) filled in black and stored in a buffer. This results in an image in which a logo mark (object) is placed in front of the background image, as shown in (B).

When the side-by-side image synthesis effect of the pixel shader (04TKK0063) included in the VDP (04TKK0060) is applied in the state of (B), a 3D display image (lenticular image) as shown in (C1) is generated. At this time, as shown in (C1), bleeding occurs around the three-dimensional logo mark. One possible cause of this is that when generating the stereoscopic parallax portion of the left eye image and the right eye image, when the pixels of the object drawing portion and the non-drawing portion (transparent portion) are synthesized, the image is generated based only on the color information of the drawing portion. In this way, when the side-by-side image synthesis effect is applied to an image that is simply superimposed with multiple images obtained from the image data area (05TKK0085), unintended bleeding may occur.

Therefore, in this embodiment, the alpha channel that represents the opacity of the image is deleted before applying the side-by-side image synthesis effect, eliminating transparency from the image and synthesizing only the drawn parts (non-transparent parts). This makes it possible to prevent unintended blurring from occurring.

Note that the alpha value of 2D images, such as background images to be composited with a 3D image, can be set to 255 (opaque) to eliminate transparency at the time the 3D image is composited. In particular, since the background image will be the size of the entire display screen (full screen size), making the background image opaque can be expected to suppress bleeding without explicitly deleting the alpha channel.

[30. 3D Display Performance]
The basic configuration for executing the 3D display effect in the gaming machine of this embodiment has been described above. Next, the 3D display effect in the gaming machine of this embodiment will be described. First, the basic procedure for generating a display screen (image) when the 3D display effect is executed will be described.

[30-1. Basic Procedure for Generating 3D Display Screen]
Fig. 439 is a diagram for explaining the procedure for creating image data for a 3D display performance in the gaming machine of this embodiment. Here, the procedure for generating an image displayed in 3D by synthesizing an object for 3D display (logo mark) arranged on a background image for 2D display and viewing it through a lenticular lens is explained.

Images to be displayed on the performance display device 1600 are generated (drawn) from the layer on the rear side, and then transferred (composite) to the frame buffer (04TKK0091) for each layer. When processing images or compositing multiple layers, the images are processed in the off-screen buffer (04TKK0092) before being transferred to the frame buffer (04TKK0091). The procedure for creating image data for the 3D display performance of the gaming machine of this embodiment is explained below.

The VDP (04TKK0060) first obtains the background image specified in the LCD display list command sent from the peripheral control unit 1511 from the image data area (05TKK0085) and draws it on the background layer. (A) shows the state of the background layer in which the background image obtained from the image data area (05TKK0085) has been drawn. Each layer is created and managed by a program executed by the peripheral control unit 1511. LCD display list commands are created on a layer-by-layer basis and sent to the VDP (04TKK0060). The VDP (04TKK0060) processes the LCD display list commands sent on a layer-by-layer basis, thereby performing drawing on a layer-by-layer basis. Furthermore, each layer is drawn in sequence from the lowest layer toward the upper layers.

Then, the VDP (04TKK0060) converts the background image into a side-by-side image in order to generate an image for 3D display. Note that the background image is a 2D image, and what is actually displayed in 3D is the image of the preview layer (for displaying 3D images) that is placed in front of the background layer. In this embodiment, as described below, the background image, which is a 2D image, is converted into a side-by-side image, and the background image is synthesized with each of the left-eye image and right-eye image that make up the 3D image of the preview layer to generate a 3D display image.

(B) shows the state in which the side-by-side background image is drawn in the off-screen buffer (04TKK0092). In this embodiment, the background image drawn in the background layer is transferred to the off-screen buffer (04TKK0092) and side-by-side converted on the off-screen buffer (04TKK0092). This makes it possible to improve image quality by using the filter effect of the VDP (04TKK0060) (a function that smooths pixels when reducing) compared to when the background image is transferred directly to the frame buffer (04TKK0091) and converted to side-by-side (reduced). The specific procedure for converting a background image to side-by-side will be described with reference to Figures 440 to 442.

Next, the VDP (04TKK0060) reads out the object to be displayed in 3D on the preview layer for 3D image display from the image data area (05TKK0085). As described above, the object to be displayed in 3D is stored in the 3D image storage area of the image data area (05TKK0085). The image for 3D display is also converted to a side-by-side image in advance, as shown in (C), and is converted into a 3D display image by applying the side-by-side image synthesis effect by the pixel shader (04TKK0063) and synthesizing the image for the left eye and the image for the right eye. The alpha channel value is set so that areas other than the object to be displayed in 3D are transparent.

The VDP (04TKK0060) then composites the objects drawn on the preview layer onto the off-screen buffer (04TKK0092) on which the side-by-side background image is drawn, and transfers the composite image to the frame buffer (04TKK0091). As a result, an image is generated in which the left-eye image and right-eye image are composited with the objects for 3D display on the background image, as shown in (D).

Finally, the VDP (04TKK0060) can generate the 3D display image shown in (E) by applying a side-by-side image synthesis effect using the pixel shader (04TKK0063) to the image on the frame buffer (04TKK0091), i.e., the image in which the left-eye image and right-eye image are synthesized with an object for 3D display on a background image.

The above describes the procedure for creating image data for the 3D display performance in the gaming machine of this embodiment. The above procedure makes it possible to display a 3D image of characters and other objects by synthesizing them with a 2D background image, allowing for a stereoscopic view.

In addition, by storing a non-stereoscopic background image at full screen size in the image data area (05TKK0085) and then converting it to side-by-side when displaying in 3D and compositing it with the 3D image, the background image can be shared between 2D and 3D display performances, thereby preventing an increase in the capacity of the image data area (05TKK0085).

[30-2. Generation of Side-by-Side Images]
Next, the procedure for converting a background image into a side-by-side image will be described. In this embodiment, as described above, when converting a background image into a side-by-side image, the image acquired from the image data area (05TKK0085) is reduced by 1/2 in the horizontal direction, and the same image is drawn on the left and right as an image for the left eye and an image for the right eye. Furthermore, since the image is expanded again in the horizontal direction when the side-by-side image synthesis effect is applied, the resolution is reduced (image quality is deteriorated) due to the loss of image information, and jaggies that are not present in the original image may occur. This is because the same reduced images are synthesized, so the image information lost during reduction cannot be supplemented, and there is a limit to improving image quality using the pixel shader (04TKK0063).

For the reasons mentioned above, if the image quality of the display screen deteriorates, it may reduce the interest in the game. Therefore, in this embodiment, we propose a side-by-side image generation procedure that can suppress the loss of image information when creating a side-by-side image.

[30-2a. Side-by-side image generation procedure 1]
As mentioned above, if two identical images reduced by 1/2 in the horizontal direction are simply arranged, the missing image information becomes completely identical, making it difficult to supplement it using the VDP function or the like. Therefore, when reducing a full-screen image to create an image for the left eye and an image for the right eye, the missing image information is made different, so that the image information of the original image can be restored as much as possible by suppressing the loss of image information when combining the image information of the left and right images. A method for generating side-by-side images will be described below.

Figure 440 is a diagram explaining a first method for generating a side-by-side image. When reducing an image, for example, pixels are extracted at equal intervals according to the reduction ratio, and the extracted images are arranged in order. For example, when making a side-by-side image from a background image acquired from an image data area (05TKK0085) as shown in (A), the base background image is reduced by half in the horizontal direction, so an image consisting of only an even number of dots is generated (left eye image (C) in Figure 440).

On the other hand, when generating an image for the right eye, in order to prevent the same image information as in the image for the left eye from being lost, an image composed of as many odd dots as possible is generated. Therefore, in the first method, as shown in (B), the base background image is shifted one dot (to the left) in advance and then reduced by 1/2 horizontally. As a result, the odd dot pixels are moved to the positions of the even dots, so the reduced image can be composed of odd dots (right eye image (C) in Figure 440). Note that for the blank area of one row on the left edge that occurs when shifting one dot to the left, the image is transferred with the area in the buffer filled with black, so that the blank area is not transparent but non-transparent (black) before the image is reduced. This makes it possible to prevent the occurrence of bleeding that occurs when images with transparency are synthesized.

[30-2b. Side-by-side image generation procedure 2]
Next, the second method will be described. The basic principle is the same as the first method, and the purpose is to suppress the loss of image information of the original image when combining the image information of the left and right images. Figure 441 is a diagram explaining the second method for generating side-by-side images.

In the second method, the area of the base image to be reduced is specified, and a reduced image is generated. For example, if the base image is n x m dots, the area from 0 dots to n-1 dots in the horizontal direction is targeted. In other words, when generating an image for the left eye, a reduced image is generated for the entire area of the base image. As a result, like the first method, a reduced image made up of an even number of dots is generated as the image for the left eye. On the other hand, when generating an image for the right eye, the area from 1 dot to n dots in the horizontal direction is targeted. As a result, like the second method, a reduced image made up of an odd number of dots can be generated as the image for the right eye.

As described above, according to the first and second methods, by making the image for the left eye a reduced image made up of only even dots and the image for the right eye a reduced image made up of only odd dots, it is possible to apply the side-by-side image synthesis effect while minimizing loss of image information, thereby suppressing degradation of image quality and preventing the occurrence of jaggies.

[30-2c. Side-by-side image generation procedure 3]
Next, the third method will be described. The basic approach is the same as the methods described so far, but the third method aims to distribute each dot row of the base image to the left eye image and the right eye image in color element units, and to suppress the loss of image information of the original image when the image information of the left and right images is combined. Figure 442 is a diagram explaining the third method for generating a side-by-side image.

The image information showing the color of each dot is expressed by combining the values of the three primary colors (red (R), green (G), and blue (B)) and the alpha channel (alpha value). Each color value is made up of 8 bits, and the alpha channel (alpha value) value is also 8 bits.

In the third method, as shown in FIG. 442(A), first, the color of each dot is assigned to each element, that is, the three primary colors are assigned individually to the left eye image (B1) and the right eye image (B2). In the example shown in FIG. 442, the R element of the 0th dot of the original image is set as the R element of the 0th dot of the right eye image, and the G element of the 0th dot of the original image is set as the G element of the 0th dot of the left eye image. Furthermore, the B element of the 0th dot of the original image is set as the B element of the 0th dot of the right eye image. Similarly, the R element and B element of the 1st dot of the original image are set as the R element and B element of the 1st dot of the left eye image, and the G element of the 1st dot of the original image is set as the G element of the 1st dot of the right eye image. In other words, one dot of image information for two dots of the original image is assigned to the left eye image and one dot of image information for the right eye. By similarly assigning all dots, a side-by-side image is generated.

By following the above procedure, the color components of the base image are decomposed and the three primary colors are distributed individually to generate side-by-side images, thereby reliably preventing loss of image information. The color components are decomposed by the pixel shader (04TKK0063). This is because the VDP (04TKK0060) is not efficient at processing operations on a pixel-by-pixel basis, and the pixel shader (04TKK0063) complements this. The pixel shader (04TKK0063) is a dedicated circuit that makes it possible to perform arbitrarily complex calculations on a pixel-by-pixel basis at ultra-high speeds.

[30-3. Side-by-side image synthesis effect]
Next, a procedure for converting a side-by-side image into a full-screen image by applying a side-by-side image synthesis effect will be described. In this example, the side-by-side image generated by the third method described above is converted into a full-screen image.

Figure 443 is a diagram explaining the procedure for synthesizing a full-screen image from a side-by-side image. In the third method, the side-by-side image is generated by breaking down the image information (color information) of each dot of the base full-screen image and distributing it to an image for the left eye and an image for the right eye. Therefore, the image information of the full-screen image is reconstructed by aggregating the image information of each dot of the image for the left eye and the image for the right eye that make up the side-by-side image and synthesizing the images.

For example, as shown in FIG. 443, the R element, G element, and B element at the 0th dot of the left eye image are set as the R element at the 1st dot, the G element at the 0th dot, and the B element at the 1st dot of the composite image. Furthermore, the R element, G element, and B element at the 0th dot of the right eye image are set as the R element at the 0th dot, the G element at the 1st dot, and the B element at the 0th dot of the composite image.

In this embodiment, the pixel shader (04TKK0063) executes the above procedure. Although FIG. 443 shows an example of application to a 2D image, when applied to a 3D image composed of a left-eye image and a right-eye image, the image information (color information) of the left-eye image and the right-eye image is converted and synthesized to generate a 3D display image in accordance with the specifications of the lenticular lens provided in the performance display device 1600. The lenticular lens has a structure in which elongated kamaboko-shaped convex lenses are arranged on the surface, and the 3D display image is generated based on the density of the kamaboko (number of lines) and the shape of the convex lenses in addition to the size of the image. The generated 3D display image is generated so that a parallax is created between the left and right eyes when the player is playing in a normal position, allowing effective stereoscopic viewing.

As shown in FIG. 439, by applying the side-by-side synthesis effect to an image (e.g., the image in FIG. 439(D)) in which an object for 3D display (e.g., a preview character) is synthesized with a side-by-side background image, 2D images such as background images can be converted while suppressing loss of image information, while 3D images can be converted into 3D display images that comply with the specifications of the lenticular lens.

As described above, by recombining the images that have been converted to side-by-side using the third method described above, it is possible to composite (restore) a full-screen base image while preventing loss of image information. With the above configuration, it is possible to prevent loss of image information and suppress deterioration in image quality of the presentation display, so that the presentation effect can be achieved by suppressing deterioration in image quality of the images while suppressing an increase in the capacity required to store image information, and suppressing a decrease in interest in the game.

[30-4. Drawing procedure]
Next, a procedure for drawing on the performance display device 1600 will be described. First, a case where there is a single 3D layer will be described, and then a case where there are multiple 3D layers will be described.

[30-4a. Rendering procedure (when there is a single 3D layer)]
Fig. 444 is a diagram showing an example of a layer structure in the case where there is a single 3D layer, and Fig. 445 is a flowchart for explaining the procedure for drawing in each layer in the layer structure of Fig. 444.

The CPU (04TKK0011) of the peripheral control unit 1511 first issues a set of drawing commands for all materials required to draw the lowest layer 1 (step 04TKS0010). The drawing commands issued include a command to obtain an image from the image data area (05TKK0085) and a command to convert the obtained image into a side-by-side image. Layer 1 is a layer that draws 2D images, and since it is the lowest layer, it is usually the background layer.

Next, the CPU (04TKK0011) of the peripheral control unit 1511 issues a group of drawing commands for all materials for layer 2, which draws the image to be displayed in 3D (step 04TKS0020). The group of drawing commands issued includes a command to acquire an image for 3D display from the image data area (05TKK0085) and a command to composite the acquired image with the image that was made side-by-side by the processing in step 04TKS0010. In addition, a command to generate a 3D display image by applying a side-by-side image composition effect by the pixel shader (04TKK0063) (pixel conversion command (3D display image conversion command)) is included.

The CPU (04TKK0011) of the peripheral control unit 1511 then issues a group of drawing commands to draw an image on Layer 3, which is placed at the foreground (Step 04TKS0030). After that, when all drawing commands required for drawing Layer 3 have been sent, a bank flip wait command is sent to the VDP (04TKK0060) (Step 04TKS0040).

The above processing up to step 04TKS0040 is performed by a program executed by the CPU (04TKK0011) of the peripheral control unit 1511. Processing from step 04TKS0050 onwards is executed by the performance display control unit 1512 (VDP (04TKK0060)). When a bank flip is executed, the VDP (04TKK0060) outputs an image to the performance display device 1600 by processing the group of drawing commands stored in the command buffer.

When the performance display control unit 1512 receives a command from the peripheral control unit 1511, it stores the received command in a command buffer. In this embodiment, the command buffer also has a double buffer configuration, and includes a storage command buffer that stores drawing commands sent from the peripheral control unit 1511, and a drawing command buffer from which drawing commands to be processed by VDP (04TKK0060) are read. The storage command buffer and the drawing command buffer are configured to be switched by bank flip.

Next, when the VDP (04TKK0060) finishes drawing in the currently used frame buffer (04TKK0091) and switches the frame buffer (04TKK0091) by bank flip, it reads out a group of drawing commands from the drawing command buffer that was switched from the storage command buffer, and draws in the frame buffer (04TKK0091) of the drawing bank based on the read drawing commands (step 04TKS0050).

Furthermore, when the VDP (04TKK0060) processes the bank flip wait command, it executes a bank flip at a specified interrupt timing, switches the drawing bank to the display bank, and displays the image drawn in the drawing bank of the frame buffer (04TKK0091) on the performance display device 1600 (step 04TKS0060). The above processing completes the drawing of one screen.

Here, we will explain in detail the procedure by which the VDP (04TKK0060) generates images to be displayed on the performance display device 1600 based on the drawing commands issued by the peripheral control unit 1511 in the processing of steps 04TKS0010 to 04TKS0030.

As mentioned above, the command buffer stores the drawing commands in the order in which they are received, and the VDP (04TKK0060) reads out the drawing commands in the order in which they are stored and executes processing based on the drawing commands that have been read. In the example shown in FIG. 445, the drawing commands for drawing each layer, in the order of Layer 1, Layer 2, and Layer 3, are stored in the command buffer, and each drawing command is processed in that order. Below, we will explain the procedure by which the VDP (04TKK0060) composites the images drawn on each layer based on the drawing commands received.

The VDP (04TKK0060) reads the drawing command for drawing layer 1 that was initially stored in the command buffer. First, it reads the image specified in the drawing command that was read from the image data area (05TKK0085) and draws it on layer 1. The image drawn on layer 1 is a 2D image, and this image is drawn on the off-screen buffer (04TKK0092) and converted to side-by-side.

The VDP (04TKK0060) then reads out the drawing command for drawing layer 2 from the command buffer. The image specified in the read drawing command is read out from the image data area (05TKK0085) and drawn on layer 2. Furthermore, the image drawn on layer 2 is overwritten (composited) on the off-screen buffer (04TKK0092) in which the side-by-side layer 1 image is configured. The image drawn on layer 2 is a 3D image, and a side-by-side composition effect is applied to generate a stereoscopic display image, which is drawn on the frame buffer (04TKK0091).

Finally, the VDP (04TKK0060) reads the drawing command for drawing Layer 3 from the command buffer. The image specified in the read drawing command is read from the image data area (05TKK0085) and drawn on Layer 3. The image drawn on Layer 3 is overwritten (composited) on the image drawn on the frame buffer (04TKK0091), completing the composition of the images on Layers 1, 2, and 3, and completing the image to be displayed on the performance display device 1600.

In the above explanation, the images to be drawn on each layer were read from the image data area (05TKK0085), but they may also be read from the image RAM (04TKK0090). For example, if a common background image is used in a series of performances and a background image is drawn on layer 1, the background image can be stored in advance in the image RAM (04TKK0090), which has a faster access speed than the performance data ROM (05TKK0070), and the background image can be read from the image RAM (04TKK0090) while the series of performances is being executed, thereby speeding up the entire image processing.

[30-4b. Drawing procedure (when there are multiple 3D layers)]
Next, a case where there are multiple 3D layers will be described. Fig. 446 is a diagram showing an example of a layer structure when there are multiple 3D layers. Fig. 447 is a flowchart explaining a procedure for drawing on each layer in the layer structure of Fig. 446. Note that the same reference numerals are assigned to processes common to the process when there is a single 3D layer (Fig. 445), and the description will be omitted.

The CPU (04TKK0011) of the peripheral control unit 1511 first issues a group of drawing commands for all materials to draw the lowest layer 1 (step 04TKS0010). Next, it issues a group of drawing commands for all materials for layer 2, which draws the image to be displayed in 3D (step 04TKS0320). At this time, the side-by-side image synthesis effect is not applied, and when the processing of step 04TKS0320 is completed, the image of layer 1 is overwritten and synthesized with the image of layer 2, and the side-by-side state is maintained.

Next, the CPU (04TKK0011) of the peripheral control unit 1511 issues a group of drawing commands for all materials to layer 3 (step 04TKS0330). Since layer 3 is a 2D display area, the commands include commands to obtain images from the image data area (05TKK0085) and commands to convert the obtained images into side-by-side images. In the processing of step 04TKS0050 described below, the VDP (04TKK0060) processes these commands, and the layer 3 image, which has been converted into a side-by-side image on top of the composite image of layers 1 and 2, is transferred to the drawing bank of the frame buffer (04TKK0091) and overwritten and composited.

The CPU (04TKK0011) of the peripheral control unit 1511 then issues a group of drawing commands for all materials for layer 4, which draws the image to be displayed in 3D (step 04TKS0340). In the process of step 04TKS0050, which will be described later, the VDP (04TKK0060) processes the group of drawing commands issued to obtain an image for 3D display from the image data area (05TKK0085), and overwrites and composites the obtained image onto the image obtained by combining layers 1 to 3 stored in the frame buffer (04TKK0091). Furthermore, the VDP (04TKK0060) applies a side-by-side image composition effect using the pixel shader (04TKK0063) to generate a 3D display image.

The CPU (04TKK0011) of the peripheral control unit 1511 then issues a group of drawing commands for the image to be drawn on layer 5, which is placed at the foreground (step 04TKS0350). It then sends a bank flip wait command to the VDP (04TKK0060) (step 04TKS0040).

When the performance display control unit 1512 receives a drawing command or a bank flip waiting command from the peripheral control unit 1511, it stores them in the command buffer. Subsequent processing is the same as that shown in FIG. 445, and when the VDP (04TKK0060) processes the bank flip waiting command, it executes a bank clip at a specified interrupt timing, switches the drawing bank to the display bank, and displays the image drawn in the frame buffer (04TKK0091) on the performance display device 1600 (step 04TKS0060).

Here, we will explain in detail the procedure by which the VDP (04TKK0060) generates images to be displayed on the performance display device 1600 based on the drawing commands issued by the peripheral control unit 1511 in the processing of steps 04TKS0010 to 04TKS0350.

In the example shown in FIG. 447, drawing commands for drawing each layer are stored in the command buffer in the order of Layer 1, Layer 2, Layer 3, Layer 4, and Layer 5, and each drawing command is processed in this order. Below, we will explain the procedure for synthesizing the images drawn on each layer based on the received drawing commands.

The VDP (04TKK0060) reads out the drawing command for drawing layer 1. Then, it reads out the image specified by the drawing command from the image data area (05TKK0085) and draws it on layer 1. The image drawn on layer 1 is a 2D image, and this image is drawn in the off-screen buffer (04TKK0092) and converted to side-by-side.

The VDP (04TKK0060) then reads out the drawing command for drawing layer 2 from the command buffer. It reads out the image specified by the drawing command from the image data area (05TKK0085) and draws it on layer 2. It then overwrites (composites) the image drawn on layer 2 onto the off-screen buffer (04TKK0092) which contains the side-by-side layer 1 image.

The VDP (04TKK0060) then reads out the drawing command for drawing on layer 3. The image specified by the drawing command is read out from the image data area (05TKK0085) and drawn on layer 3. The image drawn on layer 3 is a 2D image, and this image is converted to side-by-side and drawn on the off-screen buffer (04TKK0092).

The VDP (04TKK0060) then reads out the drawing command for drawing layer 4 from the command buffer. The image specified by the read drawing command is read out from the image data area (05TKK0085) and drawn on layer 4. It then overwrites (composites) the image drawn on layer 4 onto the off-screen buffer (04TKK0092) where the images of layers 1, 2, and 3 are composited. The image drawn on layer 4 is a 3D image, and a side-by-side composite effect is applied to generate a stereoscopic display image, which is then drawn on the frame buffer (04TKK0091).

Finally, the VDP (04TKK0060) reads the drawing command for drawing layer 5 from the command buffer. The image specified in the read drawing command is read from the image data area (05TKK0085) and drawn on layer 5. The image drawn on layer 5 is overwritten (composited) on the image drawn in the frame buffer (04TKK0091), completing the composition of images from layer 1 to layer 5 and completing the image to be displayed on the performance display device 1600.

In summary, all layers behind (below) the 3D layer are converted to side-by-side. At this time, the 3D image can be viewed stereoscopically through the lenticular lens after the side-by-side image synthesis effect (pixel conversion) is applied, so it appears as a side-by-side flat image (2D image). The foremost 3D layer is synthesized with all layers below it, and a side-by-side image synthesis effect (pixel conversion) is applied to generate a stereoscopic display image, which is then drawn in the frame buffer. If the foremost layer is 2D, it is drawn directly in the frame buffer without side-by-side conversion, so that it is viewed as a normal 2D image even through the lenticular lens. Similarly, 2D layers placed in front of (upper) all 3D layers can be drawn directly in the frame buffer without side-by-side conversion, etc.

As described below, when 3D display is set to OFF and 2D display performance is set to be performed, the peripheral control unit 1511 does not issue commands for 3D display such as side-by-side image synthesis effects (pixel conversion), and the VDP (04TKK0060) does not perform 3D display control, so the image displayed on the performance display device 1600 is viewed as a 2D (flat) image even through the lenticular lens.

As described above, until all 3D layers are composited, the images are overwritten and composited in a side-by-side state (the left eye image and the right eye image are arranged side by side with no gaps), and after all 3D layer composition is completed, a side-by-side image composition effect is applied to generate a 3D display image. If there is a layer that displays a 2D image on the front side, the image of the 2D layer can be overwritten and composited on the front side of the generated 3D display image. Examples of layers that are placed on the front side or in front of the 3D layer (upper layer) include error notification displays, volume/brightness adjustment displays, and 3D switching displays, and these displays are displayed in 2D because they do not need to be displayed in 3D. Note that the images of all layers may be made side-by-side and overwritten in the order of the layers, and finally the side-by-side image composition effect may be applied.

[30-5. Switching between 2D and 3D display effects]
In the gaming machine of this embodiment, the display can be switched between 2D and 3D. However, if images for 2D display and images for 3D display are stored separately, the capacity required for the performance data ROM (05TKK0070) will increase. Therefore, the image for 3D display performance is used for 2D display performance, thereby suppressing the increase in capacity of the performance data ROM (05TKK0070).

[30-5a. Example of display mode selection screen]
In the gaming machine of this embodiment, a realistic presentation is realized by displaying an image that can be viewed stereoscopically, but even with such a gaming machine, there are cases where a player prefers a presentation using a conventional image that can be viewed two-dimensionally rather than a presentation that displays an image that can be viewed stereoscopically. Therefore, as described above, the gaming machine of this embodiment is configured to be switchable between a 2D display presentation mode and a 3D display presentation mode so that the player can select between them.

Figure 448 is a diagram showing an example of a screen in the effect selection mode of the gaming machine of this embodiment. In the example screen of Figure 448, the effect mode can be selected by selecting either the 3D effect display mode or the 2D effect display mode, selecting the decision button, and operating the effect button. In this embodiment, the screen in the effect selection mode is a layer placed immediately after the layer that notifies abnormalities, and is a layer on the front side of the area in which the preview effect and the performance pattern are displayed. Note that since the screen in the effect selection mode is displayed in the customer waiting state, it may be a layer on the back side of the layer (preview layer, pattern layer) in which the image for the 3D display effect is displayed. In this case, it is a layer dedicated to the screen in the effect selection mode. It may also be displayed on a layer that is not displayed in the customer waiting state (for example, the preview layer, pattern layer).

The switching of the 2D/3D display presentation mode is permitted only when certain conditions, such as a customer waiting state, are met. When the certain conditions are not met, particularly during the period when 3D display presentation is being performed, a period in which mode switching is inhibited is set as a period in which switching of presentation display modes is not possible. This makes it possible to switch presentation display modes without checking whether the current game state is in a state in which 3D display presentation can be performed, simplifying the processing involved in controlling the 3D presentation.

In the gaming machine of this embodiment, switching between 2D/3D display modes is permitted only when the machine is in a waiting state for customers. The default display mode is the 2D display mode, and even if the 3D display mode is set, if the power supply to the gaming machine is cut off and then restored, the machine is set back to the default 2D display mode. The default display mode may be the 3D display mode, which may be set, for example, by a switch provided on the peripheral control board 1510. In addition, although the cursor is displayed on the default setting side on the setting screen of FIG. 448, the cursor may be displayed on the currently set display mode side.

The selection of the presentation mode is displayed by operating the presentation button during the waiting for customers when the pattern is not being changed. In addition, the selection mode may be changed at a timing when the pattern is not being changed, such as during a jackpot game, other than during the waiting for customers, or may be changed even during the pattern is being changed if the 3D display presentation (stereoscopic display presentation) is not being executed. In addition, when the pattern is being changed, the display screen may be forced to return to the display screen at the timing when the lottery result is displayed. In addition, when the selection screen is displayed during the pattern is being changed, the presentation display may be continued in the background (the layer behind the selection screen), and the presentation may be continued as it is when the selection screen in the foreground is erased. In addition, when the display mode is changed during the pattern is being changed, the selection screen may not be displayed and a video may not be used for the change, but a specific operation may be performed on the operation unit such as the presentation button. At this time, a notification indicating that the change operation has been accepted (for example, a specific mark may be displayed on the edge of the screen) may be displayed on the screen, or a specific sound may be output.

In addition to the function of switching presentation modes, players can also adjust the brightness of the presentation display device 1600 and the volume of the audio output from the screen. Unlike the function of switching presentation modes, adjusting the brightness of the presentation display device 1600 and adjusting the volume of the audio output is not used during play using presentation buttons or the like, and may be operated using a dedicated operation unit. Furthermore, the function of switching presentation modes is to switch the 3D presentation display ON/OFF, so it is possible to switch by performing a specific operation without displaying the selection screen, but since brightness adjustment and volume adjustment need to be adjusted in stages, the screen is always displayed and can be performed while waiting for customers.

Furthermore, when brightness and volume adjustments are made and the 3D presentation display is set to ON/OFF, they may be reflected simultaneously, or only one of them may be reflected. If they are not reflected simultaneously, for example, since the result of the brightness adjustment may affect the 3D presentation display, if changes are made simultaneously, only the result of the brightness adjustment may be reflected, and the ON/OFF setting of the 3D presentation display may be made after the settings are reflected.

When the 3D performance display is set to ON/OFF, the peripheral control unit 1511 reflects this in the parameters of the function "3D_SW" mentioned above. This eliminates the need for branching of processing by program code, and makes it possible to use common performance block data and scheduler data regardless of whether the 3D performance display is ON/OFF, simplifying the performance data and program code.

[30-5b. Drawing procedure when executing 2D display performance]
Next, a procedure for using an image for a 3D display performance for a 2D display performance will be described.
Fig. 449 is a diagram for explaining the procedure for using an image for 3D display performance in the 2D display performance mode in the gaming machine of this embodiment. Fig. 450 is a flowchart showing the procedure for using an image for 3D display performance in the 2D display performance mode shown in Fig. 449. The procedure shown in Fig. 450 corresponds to the procedure for performing 3D display performance when there is a single 3D layer, and the same reference numerals are given to common procedures, and the explanation is omitted.

In the gaming machine of this embodiment, when a 3D display effect is performed at a timing when the same effect is possible, as shown in FIG. 449 (A), the background image obtained from the image data area (05TKK0085) is drawn as is without processing when drawing the background layer. Specifically, the CPU (04TKK0011) of the peripheral control unit 1511 issues a group of drawing commands for all materials for drawing Layer 1 for background drawing and stores them in the command buffer. The VDP (04TKK0060) reads the group of drawing commands from the command buffer, obtains the background image from the image data area (05TKK0085) according to the information specified in the group of drawing commands, and draws the image in the frame buffer (04TKK0091) or off-screen buffer without converting it to side-by-side (step 04TKS0410).

Next, the 3D display image displayed when the 3D performance display is being executed is displayed as a 2D display image (Figure 449 (B)). At this time, the layer on which the drawing is done is not a layer dedicated to 2D, but is drawn on a layer for 3D display on which the 3D display image is displayed when the 3D performance display is being executed. This makes it possible to easily manage the relationship between the performance content and the layer by drawing on the same layer when performing a performance with the same content regardless of whether the performance is performed in 2D display or 3D display, and simplifies the performance display control.

To explain in detail the procedure for displaying a 3D display image as a 2D display image, the VDP (04TKK0060) first obtains an image that has been converted to a side-by-side format for 3D display from the image data area (05TKK0085). From the obtained image, it extracts an image for the left eye and draws it in the off-screen buffer (04TKK0092) (step 04TKS0420). It then enlarges the image for the left eye in the off-screen buffer (04TKK0092) by two times in the horizontal direction and overwrites and composites it onto the background image already drawn in the frame buffer (04TKK0091) (step 04TKS0430).

The peripheral control unit 1511 issues a group of drawing commands to the performance display control unit 1512 to carry out the above procedure, and the VDP (04TKK0060) generates an image for 2D display without applying the side-by-side image synthesis effect using the pixel shader (04TKK0063) (without issuing drawing commands (pixel conversion commands) related to the side-by-side image synthesis effect) (Figure 449 (C)).

The CPU (04TKK0011) of the peripheral control unit 1511 then issues a group of drawing commands for the image to be drawn on Layer 3, which is placed at the foreground (Step 04TKS0440). After that, a bank flip wait command is sent to the VDP (04TKK0060) (Step 04TKS0040). The sent group of drawing commands is stored in the command buffer of the performance display control unit 1512, and the VDP (04TKK0060) executes the processing from Step 04TKS0050 onwards. The processing from Step 04TKS0050 onwards is the same as the processing shown in FIG. 445. When the drawing processing is completed and the drawing bank of the frame buffer (04TKK0091) is switched to the display bank, the image drawn in the frame buffer (04TKK0091) is displayed on the performance display device 1600.

As described above, by enlarging and using an image for 3D display performance, specifically an image for the left eye (or an image for the right eye), when performing a 2D display performance, there is no need to store duplicate images specifically for the 2D display performance, which helps prevent an increase in the capacity of the performance data ROM (05TKK0070).

Furthermore, since there is a risk of image quality deteriorating due to enlargement processing when displaying a 3D image in a two-dimensional (2D) format, for 3D images that may be displayed in 2D, the image for 2D display may be stored in the image data area (05TKK0085). This makes it possible to prevent degradation of image quality during 2D display presentation, and thus prevents a decline in interest in the game.

[30-6. Handling abnormalities during 3D display]
Fig. 451 is a diagram showing an example of an abnormality notification screen displayed when an abnormality occurs during the execution of a 3D display performance. In the gaming machine of this embodiment, when an abnormality occurs during a 3D display performance, a predetermined message (abnormality notification image) is displayed on the layer (2D) that displays abnormality notifications, etc. at the forefront. Below, a screen display example will be described with reference to Fig. 451.

Figure 451 (A) shows the state before the abnormality occurred, where the left and right symbols of the performance symbols (04TKM0010) temporarily stop at the same number, and a reach has occurred. At this time, a preview performance begins in which a stereoscopically visible car (3D display image) drives on a road drawn on the background (2D).

After that, an abnormality such as a magnetic anomaly occurs in the gaming machine, and an abnormality notification image (04TKM0030) containing the warning message "Abnormality occurred!!" is displayed on the foreground abnormality notification layer. At this time, the rendering of the warning message makes the effects on the effect display screen difficult to see, but the preview effect of a car driving, which is a 3D display image, continues, and as time passes, it moves to the back side of the abnormality notification image (04TKM0030), as shown in Figure 451 (B). Thereafter, the performance control of the preview effect continues even while the recovery process is being executed. Therefore, even if the player cannot see the back side of the abnormality notification image (04TKM0030), the rendering control of the car, which is a 3D display image, continues.

After that, when the main control board 1310 is initialized (power is cut) during the process of returning from the abnormal state to a playable state, a command is sent to the peripheral control board 1510. The peripheral control board 1510 suspends control of the 3D display presentation, and as shown in FIG. 451 (C), stops displaying the preview character (04TKM0020), which is a 3D display image. The background image may continue to be displayed as is, or may be switched to a different image (for example, a dedicated background image when power is restored), or may be erased.

In the example shown in FIG. 451, the abnormality notification image (04TKM0030) occupies most of the area of the display screen, but as long as the player can recognize that an abnormality has occurred, the abnormality notification image (04TKM0030) should be displayed in the foreground layer in a way that is recognizable to the player.

As described above, in the gaming machine of this embodiment, by placing a layer for announcing an abnormality at the forefront, it is possible to reliably notify the player of the occurrence of an abnormality even while an effect including a 3D display effect is being executed. In addition, since there is no need to stop the effect control, it is possible to quickly notify the player of the abnormality as a top priority.

[30-6a. Control when the power supply to the main control board is cut off]
Next, the control when the power supply to only the main control board 1310 is cut off during a 3D display performance will be explained with reference to Figures 452 and 453.

Figure 452 is a timing chart showing the state of each component when the power supply to the main control board 1310 is cut off during a 3D display performance. Figure 453 is a diagram showing an example of a screen transition when the power supply to the main control board 1310 is cut off during a 3D display performance.

In the example shown in Figures 452 and 453, in normal game mode, the power supply to the main control board 1310 is cut off at time t11 while the special symbol is being displayed in a variable manner. Then, at time t12, the power supply is resumed. Here, the power supply from the backup power supply is also cut off, and the power supply to the main control board 1310 is completely cut off.

As shown in FIG. 452, the special symbols are displayed in a variable manner in the normal game state until time t11. At this time, as shown in FIG. 453(A), the left and right symbols of the identification symbol (04TKM0010) stop as the same symbol, and a reach occurs. Along with this, a preview character (04TKM0020) resembling a car appears as a preview performance. The preview character (04TKM0020) is a 3D display image, and a performance is executed in which the character runs on a road drawn in the background image (2D). As mentioned above, the preview character (04TKM0020) is stored in the 3D image area of the image data area (05TKK0085), and images from the character's appearance to its exit are stored in chronological order.

After that, at time t11, the power supply to the main control board 1310 is stopped. At this time, the power supply to the peripheral control board 1510 continues, but since a command to stop the pattern, etc. is not sent to the main control board 1310, the variable pattern display continues until time t13 (Figure 453 (B)). On the other hand, the 3D display performance ends when a predetermined condition (e.g., a predetermined time has passed) is met (time t12) (Figure 453 (C)). The variable pattern display can continue until a stop command is received, but since the preview performance has a performance time set, it is configured to end when the performance ends. Note that the preview performance may continue as is if a predetermined performance is executed repeatedly, etc.

At time t13, power supply to the main control board 1310 is resumed. At this time, the main control board 1310 executes power-on processing to start up the gaming machine. At this time, a command associated with starting up the gaming machine is sent to the peripheral control board 1510, the ongoing display of changing patterns and presentation is stopped, and the startup screen of the gaming machine is displayed on the presentation display device 1600 (Figure 453 (D)). Note that the startup screen is displayed in 2D regardless of the presentation display mode. This makes it possible to reduce the load when playing is resumed.

[30-6b. Control when the power supply to the peripheral control board is cut off]
Finally, the control when the power supply to only the peripheral control board 1510 is cut off during the 3D display performance will be described with reference to Fig. 454 and Fig. 455. Note that in the example shown in Fig. 454 and Fig. 455, the case where the power supply to only the peripheral control board 1510 is cut off during the 3D display performance in the big win game state is described, but this is only one example, and the same processing is performed when the power supply to only the peripheral control board 1510 is cut off during the 3D display performance in the variable display of the pattern.

Figure 454 is a timing chart showing the state of each component when the power supply to the peripheral control board 1510 is cut off during 3D display presentation in a jackpot game state. Figure 455 is a diagram showing an example of a screen transition when the power supply to the peripheral control board 1510 is cut off during 3D display presentation in a jackpot game state.

In the examples shown in Figures 454 and 455, the special lottery is won, resulting in a transition to a jackpot gaming state (time t21). In the example shown in Figure 454, the jackpot gaming state ends after 15 rounds. Each round ends when a predetermined number of gaming balls enter the jackpot winning hole 2005, and at the start of the Nth round, a command to display the jackpot winning hole opening Nth is output from the main control board 1310 to the peripheral control board 1510. When the peripheral control board 1510 receives the command to display the jackpot winning hole opening Nth, it executes a presentation corresponding to each round, such as displaying the number of rounds (N). Note that the presentation corresponding to each round (presentation in the jackpot gaming state) is a 3D display presentation.

As shown in FIG. 454, at time t20, the variable display of the special symbols stops, a special lottery is won, and a jackpot is announced while the performance symbols are displayed still (FIG. 455(A)). After that, at time t21, the jackpot game starts and the first round begins (FIG. 455(B)). At this time, the first round (round 1) begins when a command to display the first opening of the jackpot is received from the main control board 1310.

Afterwards, in the middle of round 3 of the jackpot game (time t22), the power supply is cut off only to the peripheral control board 1510. In this embodiment, since the peripheral control board 1510 is not equipped with a power supply from a backup power source, the power supply to the peripheral control board 1510 is completely cut off. Therefore, as shown in FIG. 455 (C), nothing is displayed on the performance display device 1600. At this time, game control continues on the main control board 1310, and the progress of the round continues with the screen not displayed.

At time t23, when the power supply to the peripheral control board 1510 is resumed, a message to that effect is displayed on the performance display device 1600. In the example of FIG. 455(D), the message "Recovering" is displayed. Note that the message "Recovering" is displayed in 2D regardless of whether the performance display mode is 2D or 3D.

In the example shown in FIG. 454, the power supply to the peripheral control board 1510 is resumed in the middle of round 14, and the trigger for the start of the presentation of each round is the reception of a command to display the Nth large prize opening. Therefore, since the peripheral control board 1510 was unable to receive the command to display the 14th large prize opening during the power outage, the presentation corresponding to the round cannot be executed, and a message is displayed indicating that play will resume. This display is in 2D regardless of the presentation display mode. This minimizes the load when the presentation resumes, and allows for a quick transition to the regular presentation (in this case, the presentation corresponding to the round).

When round 14 of the jackpot game ends and round 15 begins (time t24), the peripheral control board 1510 receives a command to display the 15th jackpot opening, and the performance corresponding to the 15th round begins (Figure 455 (E)).

In the gaming machine of this embodiment, the power supply to the peripheral control board 1510 is cut off, so the display mode cannot be maintained, and it is therefore not possible to know whether the display was in 2D or 3D before the power was cut off. Therefore, the default display mode is set and play is resumed. In the gaming machine of this embodiment, the default display mode is 2D, and even if the display was in 3D before the power was cut off, the display will be in 2D after play is resumed. Note that if the default display mode is 3D, the display will be in 3D after play is resumed.

After that, when the big win game ends, the reserved start memory starts the variable display of the special symbols, and the game continues (time t25).

By configuring as described above, if an abnormality occurs in the power supply to the peripheral control board 1510, the screen display immediately after recovery is set to 2D display regardless of the performance display mode, minimizing the load of drawing, and the performance can be quickly resumed after receiving a command from the main control board 1310. In addition, by setting the performance display mode upon recovery to the default performance display mode, there is no need for processing such as memorizing the performance display mode before the abnormality occurred, which prevents the performance control from becoming too complicated.

[31. Video Display Control]
The stereoscopic display of the effect image has been described above. Next, the configuration for displaying the moving image in this embodiment will be described. In the gaming machine of this embodiment, the effect display device 1600 can display an image (moving image) in which a character image or the like moves, enhancing the effect of the effect. The effect including the moving image can attract the attention of the player more than the effect consisting of a still image, and can be expected to greatly contribute to increasing the interest of the game.

Videos express movement by displaying multiple images in succession, making use of the apparent motion that occurs from continuously changing pictures or objects. This requires more storage capacity than when images are displayed individually. On the other hand, it is possible to reduce the number of images required by partially processing the images in order to reduce the required image capacity, but this poses the problem of increased image processing load.

Therefore, reference frame data is provided for every predetermined number of frames, and between each reference frame data and the next reference frame data, the image of each frame is generated based on difference frame data that contains only the difference with the frame displayed immediately before, thereby compressing the volume of image data.

However, when generating video data based on differential frame data, it is necessary to hold the image data of the immediately preceding frame, and memory space for holding the image data of the previous frame must be constantly reserved, which can lead to capacity shortages. In addition, since generating moving images places a heavy load on VDP (04TKK0060) and the like, there is a risk of processing delays occurring even if image data compression is achieved.

The present invention aims to stabilize the presentation control of the gaming machine by compressing image data for video display stored in the presentation data ROM (image ROM, CG ROM) while suppressing the increase in memory capacity required for video display and suppressing the load on the VDP (04TKK0060), thereby making it possible to realize more effective presentations and improving the entertainment value of the game.

[31-1. Configuration for displaying moving images]
First, the video displayed by the performance display device 1600 in the gaming machine of this embodiment will be described. The video displayed in this embodiment does not express movement by preparing a screenful of images in advance and displaying them continuously in chronological order, but by generating the next image to be displayed by changing (updating) the parts that are different from the image displayed immediately before, and then displaying the generated images continuously to express movement.

[31-1a. Image data arrangement]
First, a basic configuration for generating moving images to be displayed on the effect display device 1600 of the gaming machine of this embodiment will be described. Image data is stored in the image data area (05TKK0085) of the effect data ROM (05TKK0070).

As described above, in this embodiment, video expresses movement by changing (updating) parts that are different from the image displayed immediately before. Therefore, the image data for the video includes reference image data (reference frame data) and differential image data (difference frame data). Furthermore, video expresses movement by continuously displaying one frame's worth of image data generated from the reference frame data and differential frame data, so each image data is arranged in chronological order (display order) starting from the first frame within the image data area (05TKK0085).

Next, a structure for storing image data for generating a moving image will be described. Figure 456 is a diagram showing an example of a structure for storing frame data for generating a moving image. As shown in Figure 456, image data constituting a series of moving images is arranged in chronological order (display order) with reference frame data at the beginning. Furthermore, reference frame data is arranged every predetermined number, and a predetermined number of difference frame data is arranged between the reference frame data and the next reference frame data. By arranging the reference frame data at equal intervals in this way, moving images can be generated by simple loop processing, simplifying the program.

Each frame data also contains header information. The header information contains information indicating whether the corresponding frame is a reference frame or a difference frame. Therefore, by referencing the header information, it is possible to determine whether the frame is a reference frame or a difference frame, and it is also possible to arrange the reference frame data without setting the interval between them to a fixed number. In this case, it becomes easier to arrange the reference frame data at times such as when changing scenes, which increases the freedom of data arrangement and improves the efficiency of creating and managing image data for videos.

The header information of the frame data may also include information to identify whether it is a reference frame or a difference frame, as well as the display position, display size, and transformation state (enlargement/reduction, rotation, etc.). As will be described later, it also holds information (address information, etc.) that identifies the frame data of the preceding frame, making it possible to play the video from any frame data or play the video in reverse order.

While the reference frame data contains all the display contents of the image to be displayed, the difference frame data contains only the difference information with respect to the image (frame) displayed immediately before. This results in a large capacity for the reference frame data. Therefore, by reducing the proportion of reference frame data (by increasing the proportion of difference frame data), the total capacity of image data for generating a video can be reduced. On the other hand, while the reference frame data only needs to display the image as is, when generating an image using difference frame data, image data from the reference frame data and the data from the reference frame data to the immediately preceding difference frame data is required, which creates the problem of a high processing load for synthesizing this image data.

Figure 457 is a graph showing the relationship between the interval at which one reference frame data is placed and the amount of data. The horizontal axis is the number of data (GOP) including that reference frame data until the next reference frame data appears. Therefore, when the value on the horizontal axis is 1, it is entirely made up of reference frames, and when it is 60, a reference frame is placed every 60 frames. The vertical axis shows the amount of data when GOP=60 is taken as 1. The example shown in Figure 456 is GOP=30, and reference frame data is placed every 30 frames.

Referring to FIG. 457, when no differential frame data is included (GOP=1), the value is about 1.8, which is about 1.8 times the capacity required when GOP=60 is used. Also, up to GOP=10 (1.06), there is no significant difference from GOP=60, and up to about 1.2 times, the processing load can be reduced while suppressing the increase in capacity. In the example shown in FIG. 457, since the value exceeds 1.2 when GOP=3, it is considered that GOP=4 or 5 provides a good balance between suppressing the increase in data capacity and reducing the processing load. Note that the GOP values shown in this specification are experimental data for the performance data of the gaming machine of this embodiment, and therefore are not common to all gaming machines, and the appropriate value may differ depending on factors such as the performance difference of the VDP (04TKK0060) and the image RAM (04TKK0090).

[31-1b. Image arrangement (layer structure)]
In the gaming machine of this embodiment, a plurality of regions are allocated to the display area, and still images or videos are drawn in each region. Each region includes an area smaller than the entire display area. FIG. 458 is a diagram showing an example of the arrangement of regions for displaying images. In the example shown in FIG. 458, region A0, which corresponds to the entire display screen of the performance display device 1600 and displays the entire background, and eight regions (A1 to A8) smaller than region A0 are allocated.

Each area corresponds to a layer, and the image expanded in the decode buffer (05TKK0101) is drawn on each layer and transferred (composite, drawn) to the frame buffer (04TKK0091) to generate one screen's worth of display image. Note that position information indicating the layout of the display screen is directly or indirectly defined for each area, but the decode buffer only secures a storage area of a size that matches the size of the image, and does not correspond to position information when the screen is displayed. The layout information for each area may be stored as management information collectively, as described later in Figure 460, or may be included in the header information of the frame data as described above. Including it in the header information of the frame data makes it possible to move the area itself, which is expected to increase the interest of the game.

Figure 459 is a diagram explaining the images corresponding to each region; the top row shows the display image generated as a result of drawing the images corresponding to each region, and the bottom row shows the images corresponding to all regions. Figure 460 is also a table showing the configuration information of each region. Associated with each region are the region name, drawing content, region position, region size, and corresponding layer name. Although each piece of information is shown in table format in Figure 460, rather than storing the information collectively as management information, for example, information associating the region with the layer may be stored, and information such as position and size may be stored as layer attribute information. Note that the display of region A0, which corresponds to the background layer, is omitted.

In the gaming machine of this embodiment, the content of the presentation is determined based on the results of a special lottery, and images corresponding to each area are drawn in accordance with the determined content of the presentation, completing one screen's worth of displayed images. This makes it possible to change the combination of images drawn for each area, making it possible to execute a wide variety of presentations with a small number of images. Furthermore, by reducing the number of images, it is possible to conserve capacity in the presentation data ROM (05TKK0070).

In the gaming machine of this embodiment, the size of the drawing area of the performance display screen is 1600 dots horizontally and 1200 dots vertically, and the position is defined by a coordinate system with the upper left corner as the origin. The size of the drawing area is not limited to this, and may be set according to the performance of the performance display device 1600. The origin of the coordinate system may also be set to a different position, for example, the lower left corner.

In addition, since the areas in which each image is drawn correspond to a layer, a chronological relationship is defined for each layer. Figure 461 is a diagram explaining the chronological relationship of each layer. As shown in Figure 461, the background layer is placed at the back, and the fourth pattern layer is placed at the front. If an error occurs, a message or image is displayed on a layer for displaying an error (error (warning) display layer) that is placed further forward than the fourth pattern layer. This layer is used to display still images (described later), and in addition to displaying a single image, it is also possible to display a moving image by displaying images continuously. In addition, a layer for instructing the operation of the performance button and notifying the right hit is also set separately. These layers may be common layers, or may be individually dedicated layers.

Next, each area will be explained. Area A0 corresponds to the background layer, and its size corresponds to the entire drawing area. In the gaming machine of this embodiment, the content to be drawn is a single image, but it may be a video, or it may all be managed as a still video. In the gaming machine of this embodiment, the shape of each area is rectangular, so the upper left vertex is set as the position. The arrangement of the areas can be identified from the position information and size information.

Area A1 displays a cloud-shaped object, and can display animations that change to "rain" or "thunder". The appearance changes based on the pattern of the changing symbols and the results of a special lottery. The object changes are contained within the area and do not affect the drawing state of other areas. In other words, each area can display independent effects. Furthermore, by defining the drawing scheduler data corresponding to each area in the LCD performance block data, it is possible to link the images displayed in each area as a series of effects.

Area A2 displays an object in the shape of an "airplane," which appears from the left side of the screen when the performance begins and moves to the right. In this embodiment, area A2 is the entire area in which the airplane moves, but it is also possible to define an area of a size that allows the airplane to be drawn, and reconfigure its position as the performance progresses.

In area A3, an object in the shape of a "building" is displayed, and is drawn as a single image that does not change from the start of the performance. Even in such a case, by separating it from the background, it is possible to select whether to place the moving object in front of or behind the stationary object. For example, in the example of this embodiment, it is easy to set whether an airplane passes in front of or behind a building by arranging the layers, and in either case, the control for drawing the image can be made a common drawing process simply by changing the position of the layers. It is also easy to perform a preview performance in which the expectation increases when an airplane passes in front of a building. In this way, it is possible to diversify the performance while simplifying the performance control and reducing the program capacity.

Objects showing hold displays are placed in areas A4 to A7, and the display content changes based on commands from the main control board 1310. If the display mode of the hold display does not change, it may be a single image. Also, all hold displays may be displayed in one area without dividing the area for each start memory, or even if the area is divided, they may be drawn on the same layer.

Area A8 is the area that displays the fourth symbol. The movement of the fourth symbol is expressed by sprite processing. Specifically, the elements that make up the fourth symbol are stored as multiple small parts (images), which are then composited and displayed at any position on the screen. Similarly, movement is achieved for the performance symbols (first to third symbols) by switching and transforming the display position of the symbol images (sprites).

As described above, the gaming machine of this embodiment is capable of playing video for each area. The playback time of the video for each area is managed by a timer (not shown), and one timer may be used to manage all areas, or a timer may be provided for each area to manage them individually.

Furthermore, a suppression-only layer for displaying an image that suppresses the visibility of the preview performance may be placed on the front side of a layer for displaying the preview performance and the like (for example, a layer corresponding to areas A0 to A3). The suppression-only layer may display a monochromatic opaque image, or may display an image (video) different from the preview performance. When a monochromatic opaque image is displayed (a layer is filled with a specific color), for example, a blackout effect that temporarily turns the display screen black can be realized simply by controlling a specific layer. Also, when an image (video) different from the preview performance is displayed, the layer can be made invisible (transparent) to immediately return to the preview performance, making it possible to switch performances without complex control, and by temporarily executing a different performance, the player's sense of expectation can be heightened, improving the enjoyment of the game.

The suppression layer is arranged behind the layer (e.g., the layer corresponding to areas A4 to A8) on which objects that are constantly displayed (e.g., reserved display, fourth symbol, etc.) are drawn, and in the example of FIG. 461, it is arranged between the layer corresponding to area A2 and the layer corresponding to area A4. By arranging it in this manner, it is possible to suppress the visibility of the preview effect while continuing to view the reserved display, etc. In addition, the suppression layer may be arranged in front of the layer on which objects that are constantly displayed are drawn, and the effect by the suppression layer may be executed in full screen. Even in this case, the suppression layer is arranged behind the layer for displaying errors (warnings), so that an abnormality occurring in the gaming machine can be notified. This makes it possible to reliably notify the occurrence of an abnormality, etc. while enhancing the effect of the effect.

[31-2. Control for displaying moving images]
The configuration of layers for displaying moving images has been described above. Next, a procedure for generating an image for each frame and displaying the moving image will be described. In the gaming machine of this embodiment, as described above, an image for each frame is generated using reference frame data and difference frame data, and the image is displayed by sequentially displaying the images. In the gaming machine of this embodiment, two methods for generating an image using reference frame data and difference frame data will be described.

[31-2a. Video generation procedure 1]
Fig. 462 is a diagram for explaining the first procedure for generating a moving image. In the procedure shown in Fig. 462, reference frame data is arranged for every 30 frames, and the compression efficiency of the capacity for storing image data is high.

In the first step, an image corresponding to each area is drawn in a specified area (layer), and the image drawn in each area (layer) is drawn in the frame buffer (04TKK0091). In the step shown in FIG. 462, one screen's worth of images is generated using the reference frame data in the first and 31st frames. Therefore, image data stored in the image data area of the performance data ROM (05TKK0070) or image data preloaded in the external RAM (05TKK0020) is loaded into the decode buffer (05TKK0101) reserved for each area (layer). For example, as shown in FIG. 462, image data to be drawn in area A1 is loaded into the decode buffer for area A1 allocated in the external RAM (05TKK0020). Note that a single image or an image to be sprite processed may be loaded directly into the frame buffer.

Here, if some or all of the image data for the video to be generated has not been preloaded into the external RAM (05TKK0020), it is necessary to read out the image data stored in the image data area of the performance data ROM (05TKK0070) when generating the image. Therefore, the necessary image data may be read out in advance from the performance data ROM (05TKK0070) to the external RAM (05TKK0020) based on the video to be generated being determined. This eliminates the need to directly access the performance data ROM (05TKK0070) when generating the video, thereby speeding up performance control. At this time, by reading out the image data in playback order (display order), it is possible to minimize the time lag between the generation of the video and the reading out of the image data.

Next, we will explain the case where drawing is based on frame data other than the reference frame data, i.e., differential frame data. Here, we will explain the case where an image for area A1 of the fourth frame is generated. As mentioned above, the differential frame data is the difference with the image of the immediately preceding frame, so the image data of the immediately preceding frame is required to generate complete image data. The differential frame data of the fourth frame is an image showing a single drop of water, and when combined with the image stored in the decode buffer of the third frame, it becomes the complete image data to be drawn in area A1. In this way, the image data stored in the decode buffer for each area is overlaid in layer order to generate one screen's worth of data.

As described above, according to the first procedure, the ratio of difference frame data can be increased, and therefore the data volume can be compressed. In addition, since a decode buffer of a size corresponding to the area of each layer is allocated, it is possible to save storage space compared to allocating the area of one screen to the decode buffer.

However, in the first procedure, the image data of the previous frame must be stored in the decode buffer for all areas that display moving images. Therefore, if the number of areas that display moving images is increased to enhance the presentation effect, the memory capacity required to allocate the decode buffer (05TKK0101) increases, and there is a risk that the memory area provided by the external RAM (05TKK0020) will become insufficient.

Figure 463 is a diagram explaining the capacity of the decode buffer required when generating videos using the first procedure. Six videos are described in this embodiment, and a dedicated decode buffer must be allocated for each video. Furthermore, since even more videos are displayed in an actual performance, there is a risk of a temporary shortage of memory capacity even if the decode buffer secured in the memory area is released at the end of a series of performances. This can cause delays when performing a performance that catches the player's eye, which can actually reduce the player's interest in the game.

[31-2b. Video generation procedure 2]
The first procedure has a problem in that the capacity of the decode buffer allocated to the external RAM (05TKK0020) increases. Therefore, a second procedure will be described which can suppress the increase in the capacity allocated to the decode buffer (05TKK0101) more than the first procedure.

In the second procedure, in order to prevent an increase in the capacity of the decode buffer, a single decode buffer (common decode buffer) that is common to all areas is provided, rather than reserving a decode buffer for each area. The common decode buffer, like the frame buffer, corresponds to one screen's worth of display area, and directly draws image data for each area in order (display order) starting from the lower layer. Note that since there is only one common decode buffer, it may be allocated to the image RAM (04TKK0090) rather than the external RAM (05TKK0020).

In addition, instead of making the common decode buffer correspond to the display area of one screen, it may be made to correspond to the largest display area of the multiple layers to be drawn. Also, if the display areas of all the layers cannot be contained in the largest display area, such as when the display areas of each layer are far apart, the common decode buffer may be allocated to correspond to the smallest display area that can contain at least the display areas of all the layers. This makes it possible to make the common decode buffer correspond to an area smaller than the frame buffer, reducing the storage capacity required for buffer allocation.

As described above, the common decode buffer does not necessarily need to correspond to one screen's worth of display area, but may correspond to the necessary area. When the common decode buffer is made to correspond to one screen's worth of display area, the common decode buffer may be allocated to external RAM (05TKK0020) during power-on processing of the peripheral control board 1510. The common decode buffer may also be allocated for each performance. This allows buffers to be allocated and released as needed, improving the efficiency of memory area allocation and enabling effective use.

In addition, when generating an image based on differential frame data other than the reference frame data, the reference frame data immediately preceding the frame to be generated and all differential data following the reference frame data are rendered in a common decode buffer. For this reason, if the placement interval of the reference frame data is large, as in the first procedure, the amount of image data that is simultaneously expanded increases, and the image processing time increases, so the placement interval of the reference frame data is reduced. Details of the second procedure are explained below.

Figure 464 is a diagram showing an example of the interval at which reference frame data is arranged when generating a video using the second procedure. In the example shown in Figure 464, reference frame data is arranged every four frames, which requires approximately 1.17 times the capacity compared to arranging reference frame data every 60 frames, but is approximately two-thirds the capacity required when all data is reference frame data (see Figure 457). The second procedure will be described below with reference to Figure 465.

Figure 465 is a diagram explaining the second procedure for generating video. As mentioned above, in the second procedure, video is drawn directly to the common decode buffer without reserving a decode buffer for each area in which the video is played. Specifically, image data corresponding to each area is drawn to the common decode buffer in order (display order) starting from the area (layer) on the back side. Once the drawing of image data for all areas is completed, it is transferred to the frame buffer and output to the display screen of the performance display device 1600.

In addition, rather than waiting until all layers have been drawn in the common decode buffer before transferring the images to the frame buffer, the images may be transferred to the frame buffer and overwritten as each layer's drawing is completed. In this case, the image of the next layer may be overwritten without clearing the common decode buffer, or the image of the next layer may be drawn after clearing the common decode buffer. Clearing the common decode buffer can reduce memory usage, and not clearing the common decode buffer can reduce the processing load associated with clearing the buffer.

First, when drawing (expanding) the reference frame data, the read image data is drawn in order from the area (layer) on the back side. On the other hand, when drawing the difference frame data, for example, when generating the image of the second frame, an image based on the difference frame data of the second frame is drawn in addition to the reference frame data of the first frame. The drawing order is from the lowest layer area (layer), and within the same area, the drawing is performed in chronological order from the reference frame data. In the example of FIG. 465, after drawing the background image, the reference frame data (image of the first frame) of area A1 is drawn, and then the difference frame data of the second frame is drawn. Next, an image of a building, which is a single image, is drawn. Furthermore, the reference frame data of area A2 is drawn in that order, followed by the difference frame data, and the remaining areas are drawn in the same manner. When the image data of all areas is drawn, the image in the common decode buffer is transferred to the frame buffer and output to the performance display device 1600. By controlling in this way, video can be generated using only the common decode buffer, without allocating a decode buffer for each region to the external RAM (05TKK0020) or image RAM (04TKK0090).

When generating the image for the third frame, drawing is similarly performed starting from the lowest area (layer). In the image for the third frame, as in the case of the second frame, the background layer image in area A0 is drawn, and then the preview layer in area A1 is drawn. At this time, the reference frame data, which is the image for the first frame, is drawn, and then the difference frame data for the second frame is drawn. Furthermore, the drawing of area A1 is completed by drawing the difference frame data for the third frame. The remaining areas are then drawn in the same manner, completing the drawing of one screen's worth of the third frame.

Note that the positions of the reference frame data for the video drawn on each layer do not necessarily need to match. Specifically, there may be a mixture of layers whose drawing starts at the start of a performance and layers whose drawing starts partway through a performance. For example, if a character is displayed partway through a performance, drawing starts when the character appears, and this timing becomes the reference frame start position (performance start position) for that layer. The performance end position for each layer may also be the timing when the character exits, rather than the timing when the performance ends.

Generally, a "video" is something that expresses movement by displaying a series of images (a broad definition of "video"); however, in the presentation of the gaming machine of this embodiment, a "video" is defined in the narrow sense as something that provides differences between images (frames), and as described above, this corresponds to something that is composed of reference frame data and difference frame data. On the other hand, a "still image" is defined as something that is composed of complete images (reference frame data) rather than differences, and a "still image" is not only defined as a single image with no movement, but also as an image that expresses movement by displaying complete images (reference frame data) in succession.

A "video" in the narrow sense includes differential images (differential frame data), so the capacity required to store the image can be compressed, but the image quality may deteriorate. On the other hand, a "still image" can suppress image quality deterioration because the image of each frame is complete. Therefore, a "still image" is used for a display that may cause problems if it misleads the player, such as announcing the result of a lottery (for example, displaying decorative patterns, etc.), while a "video" (in the narrow sense) is used for a performance that does not directly display the result of a lottery, such as a performance to increase the interest of the game (for example, a preview performance, a video display, etc.). When expressing movement, the image quality may be adjusted by adjusting the interval of the reference frame data, and all the images may be made into "videos" in the narrow sense that include differential frame data, thereby reducing the image capacity while unifying the control. All images may be made into "still images" that do not include differential frame data, thereby simplifying the control without the need for processing to combine the reference frame data and the differential frame data.

In addition, since layers for displaying moving images are composed of multiple objects, there are more layers for displaying still images. This makes it possible to realize detailed effects. Also, by allocating an area for each layer according to the size of the object to be displayed, it is possible to prevent memory capacity from being depleted due to excessive allocation of area. Since the objects drawn by layers for displaying still images do not operate independently, the number of layers for displaying moving images can be kept to a minimum. Depending on the type of effect, the number of layers for displaying moving images may be fewer than the number of layers for displaying still images.

Furthermore, in the second procedure, since a decode buffer for each region is not maintained and the common decode buffer is also discarded, it is necessary to identify the most recent reference frame data when drawing differential frame data. As mentioned above, information identifying whether the frame data is reference frame data or differential frame data is stored in the header information of the frame data. In addition, since the frame data of the preceding frame is configured to be identifiable, it is possible to trace back to the reference frame data by sequentially checking the contents of the header information of the frame data of the preceding frames.

Even if the decode buffer (05TKK0101) is not allocated to the external RAM (05TKK0020) but is instead allocated to the VDP's built-in RAM or image RAM (04TKK0090), the memory area provided by these RAMs will be free, making it possible to repurpose it for other controls and stabilizing performance control.

Figure 466 is a diagram explaining the capacity of the decode buffer required when video is generated by the second procedure. In the second procedure, one common decode buffer for one screen is required regardless of the number of areas in which the video is played, so the memory usage can be kept constant regardless of the content of the performance. Although six videos are described in this embodiment, as mentioned above, more videos are displayed in actual performances, so the memory capacity that can be reduced is greater. In contrast, by generating videos by the second procedure, the capacity of the decode buffer can be kept constant, making it possible to achieve stable performance control, and even when performing a performance that catches the player's attention, such as playing many videos, it is possible to suppress disruptions to the performance, such as delays, and to suppress a decrease in interest in the game.

As described above, the video playback method using the second procedure makes it possible to reduce the capacity of the decode buffer required when executing a performance in which multiple videos are displayed simultaneously on one screen, suppressing delays in image display and stabilizing performance control. In particular, since it is very difficult to retroactively increase the capacity of the external RAM (05TKK0070) after the peripheral control board 1510 has been manufactured, it is possible to reduce costs by using an external RAM (05TKK0070) with a small capacity. Furthermore, being able to play more videos with an external RAM (05TKK0070) with a small capacity increases the freedom of the performance, making it possible to create more interesting performances.

In addition, while all of the above video playback procedures allow video to be played from reference frame data, the first procedure in particular has a problem in that the interval between reference frame data is long, and the video must be played from the beginning. In contrast, the second procedure achieves a certain level of data compression while making the interval between reference frame data shorter than the first procedure, making it easy to play video from any position (midway). This makes it easier to design the effects of the gaming machine. Also, when long version and short version effects are defined, frame data can be made common by making part of the long version effects common to the short version effects.

The video playback method using the second procedure also has the problem that the amount of data expansion for each frame is larger on average, resulting in a heavier processing load than the first procedure. However, VDP performance has improved in recent years, and experimental results have shown that the performance is sufficiently practical if the interval between reference frame data is up to about 5 (GOP=5).

Furthermore, in the video playback method according to the second procedure, the interval between the reference frame data is shorter than in the first procedure, so the amount of data compression is less and the capacity increases. However, as shown in FIG. 457, if the interval between the reference frame data is about 5, the increase in capacity is about 1.13 times that of the interval between the reference frame data of 60, so the increase in capacity is not a major problem. In addition, the performance data ROM (05TKK0070) of this embodiment uses a NAND type flash memory, which reduces costs and increases capacity, making it possible to store more image data. Furthermore, the time required to read data from the NAND type flash memory can be reduced by installing a cache memory (05TKK0072) or preloading image data into an external RAM (05TKK0020), so the above points do not pose a practical problem.

In the above example, the common decode buffer corresponds to an area equivalent to one screen, but multiple common decode buffers may be provided. Specifically, a common decode buffer is provided for each of multiple related layers. By configuring it in this way, for example, when a common character appears in multiple preview performances, it becomes possible to share data and buffer settings related to that character, and by reducing duplicate data, it becomes possible to save storage capacity.

However, if a common decode buffer is used for all areas (layers), the processing load of display control increases when the number of video layers increases, and there is a risk that the drawing process will not be able to keep up. If the GOP value is set small to solve this problem, the image data capacity will increase as a result, which is a problem. Therefore, among the areas (layers) where video is drawn, the larger areas (layers) use a common decode buffer, and the smaller areas (layers) use individual decode buffers. A specific example will be explained below with reference to Figure 467.

Figure 467 is a diagram explaining the capacity of the decode buffer required when generating a video by combining the first and second procedures. In the example shown in Figure 467, areas A0 to A3 are drawn in a common decode buffer, and areas A4 to A8 are drawn in individual decode buffers. As shown in Figure 458, etc., areas A4 to A8 are small in size, while areas A0 to A3 are relatively large in size. Note that areas A0, A3, and A8 are areas in which still images or single images are drawn, so they may be drawn directly to the frame buffer.

As described above, the common decode buffer is not limited to one buffer for video of all layers, but may be a common buffer for some of the video layers. Video generation is performed by combining the first procedure and the second procedure, and is performed based on the second procedure when a common decode buffer is used, and the first procedure when individual decode buffers are used. By configuring in this way, it is possible to suppress an increase in the processing load of display control while suppressing an increase in the capacity of image data.

[31-2c. Modification of video generation procedure 2]
In the above, the moving image playback method according to the second procedure has been explained, but in the moving image playback method according to the second procedure, when the frame to be generated is difference frame data, the reference frame data immediately before the frame to be generated and the difference frame data following the reference frame data are all identified and drawn in the common decode buffer. The reference frame data and the difference data are identified based on the identification information included in the header information.

However, because it is necessary to check the frame data to be identified individually, processing is required to identify the frame data. Therefore, in this modified example, image management information corresponding to each frame data is provided, making it possible to efficiently identify the base frame data and difference data.

Figure 468 shows an example of image management information, where (A) shows a case where the interval between basic frame data is fixed, and (B) shows a case where the interval between basic frame data is variable. Image management information is composed of the interval between basic frame data that serves as a reference (frame interval), video type information for identifying the video, and frame identification information that indicates whether the data is reference frame data or difference frame data. Frame identification information is set corresponding to each frame. The image management information may also include the storage location (address) of the image information for each frame. This makes it possible to directly obtain frame data (image information), simplifying processing.

In the example shown in (A), a reference frame interval is defined at the beginning of the image management information, and video type information is defined for each video. Furthermore, frame identification information is defined for frame data corresponding to the frames included in each video. In this embodiment, the frame identification information is set to "1" for basic frame data, and the frame identification information is set to "2" for differential frame data. Furthermore, an end code indicating the end of the video is set after the frame identification information of the last frame.

In the example shown in (B), video type information and a reference frame interval are defined for each video. The frame identification information is the same as in the example shown in (A).

When the reference frame interval is fixed as in (A), the reference frame data is always arranged at equal intervals, simplifying control. On the other hand, when the reference frame interval is variable as in (B), detailed settings can be made for each video. For example, for videos with little movement (small changes), the differential data volume is small, so setting a longer reference frame interval makes it possible to save image capacity. Also, for videos with a lot of movement (large changes), the differential data volume is large, so setting a longer reference frame interval cannot be expected to reduce capacity. Therefore, by shortening the reference frame interval, the frame data to be drawn can be reduced, reducing the processing load for generating frames.

32. Checking External RAM
In conventional gaming machines, the temporary storage means for the performance control by the peripheral control board 1510 include a RAM (04TKK0012) used when executing a program that controls the performance, and an image RAM (VRAM) (04TKK0090) used for display control of images, etc. In the gaming machine of this embodiment, in addition to the temporary storage means described above, an external RAM (05TKK0020) is arranged on the peripheral control board 1510 to speed up the performance control by storing performance data and decoded image data before execution (FIG. 427).

In this embodiment of the gaming machine, DDR3 SDRAM is used for the external RAM (05TKK0020), and it can be accessed from each component such as the peripheral control unit 1511 and the performance display control unit 1512.

The peripheral control board 1510 is also provided with an inspection function for diagnosing whether each component is operating normally. The inspection function is implemented as a function of a computing means such as the CPU (04TKK0011) or VDP (04TKK0060), or is implemented by a program executed by these computing means. For example, inspection of the RAM (04TKK0012) included in the peripheral control unit 1511 is performed by the CPU (04TKK0011). Furthermore, the image RAM (04TKK0090) is included in the performance display control unit 1512, and inspection is performed by the VDP (04TKK0060). For reasons such as the VDP (04TKK0060) being configured to perform only image control, or the VDP (04TKK0060) and the image RAM (04TKK0090) being configured independently, the inspection of the image RAM (04TKK0090) may be performed by the CPU (04TKK0011).

To ensure the normal operation (presentation control) of the gaming machine, it is necessary to provide a similar configuration for inspecting the external RAM (05TKK0020) newly added to the gaming machine of this embodiment. Since the external RAM (05TKK0020) can be accessed by both the CPU (04TKK0011) and the VDP (04TKK0060), the inspection may be performed by either the CPU (04TKK0011) or the VDP (04TKK0060).

In the gaming machine of this embodiment, the CPU (04TKK0011) and VDP (04TKK0060) inspect the external RAM (05TKK0020). The configuration for inspection by the CPU (04TKK0011) is the same as the conventional configuration, so first, the configuration for inspecting the external RAM (05TKK0020) by the VDP (04TKK0060) will be described. Next, the contents of the inspection of the external RAM (05TKK0020) will be described. Finally, the control when inspecting the external RAM (05TKK0020) will be described.

[32-1. Configuration for testing external RAM]
In the gaming machine of this embodiment, the VDP (04TKK0060) is provided with a memory controller (06TKK0010) that controls access to the external RAM (05TKK0020), and inputs and outputs signals to the external RAM (05TKK0020) from various terminals.

Figure 469 is a block diagram of the configuration for testing the external RAM (05TKK0020). In addition to the configuration shown in Figure 427, the VDP (04TKK0060) is equipped with a memory controller (06TKK0010), which controls access to the external RAM (05TKK0020) from each component of the VDP (04TKK0060).

The memory controller (06TKK0010) includes a controller core (06TKK0011). The controller core (06TKK0011) receives commands for each component of the VDP (04TKK0060) to access data stored in the external RAM (05TKK0020) and stores the commands in a command queue (06TKK0012). It also processes the commands stored in the command queue (06TKK0012) and transmits them to the command scheduler (06TKK0015) via the selection logic (06TKK0013). The command scheduler controls the execution timing of commands received by the VDP (04TKK0060). The command scheduler (06TKK0015) sends various signals for reading/writing from the corresponding terminal (06TKK0018) to the memory device (06TKK0022) of the external RAM (05TKK0020) based on the received command.

The memory controller (06TKK0010) also includes a RAM diagnostic circuit (06TKK0020) that checks whether the bus and terminals connected to the external RAM (05TKK0020) are functioning normally.

Signals output from a terminal (06TKK0018) on the memory controller (06TKK0010) and input to the external RAM (05TKK0020) via a terminal (06TKK0021) include a reset signal (RESET#), clock signal (CK/CK#), chip select signal (CS[1:0]#), row address strobe signal (RAS#), column address strobe signal (CAS#), write enable signal (WE#), address signal (A[15:0]), and data signal (DQ[31:0]).

The reset signal (RESET#) causes the external RAM (05TKK0020) to perform a reset operation. The clock signal (CK/CK#) determines the timing of operations (such as reading and writing data) of the external RAM (05TKK0020).

The chip select signal (CS[1:0]#) is a signal for specifying the memory chip to be accessed. The row address strobe signal (RAS#) is a signal for specifying the row address of the memory element (memory device) to be accessed, and the column address strobe signal (CAS#) is a signal for specifying the column address of the memory element to be accessed. The row address strobe signal and column address strobe signal identify the memory element to be accessed. The write enable signal (WE#) is a signal for making the memory element to be accessed writable.

The address signal (A[15:0]) specifies the address of the cell in which the data to be accessed and made active is stored. The data signal (DQ[31:0]) inputs and outputs the data specified by the address signal. There are 16 terminals (0 to 15) that output address signals, and each terminal is connected to an address bus. There are also 32 terminals (0 to 31) that output data signals, and each terminal is connected to a data bus.

Termination resistors (06TKK0016, 06TKK0017) are connected to the address bus and data bus. The resistance value of the termination resistors (06TKK0016, 06TKK0017) is adjustable, and in this embodiment, it is possible to switch between at least three types: 36 Ω, 40 Ω, and 60 Ω. Inspection by the RAM diagnostic circuit (06TKK0020) is performed while switching the resistance value of the termination resistor. The RAM diagnostic circuit (06TKK0020) is provided with a termination resistor setting register, and the external RAM (05TKK0020) may be inspected by specifying one of the termination resistors in the termination resistor setting register.

[32-2. External RAM Inspection]
The configuration of the VDP (04TKK0060) and the external RAM (05TKK0020) has been described above. Next, the inspection of the external RAM (05TKK0020) will be described. The inspection of the external RAM (05TKK0020) may be performed based on an inspection command received via a terminal provided on the peripheral control board 1510, or may be performed when a predetermined condition for performing the inspection is met. The terminal for receiving the inspection command is a serial input/output interface capable of receiving commands sent from the main control board 1310 as well as commands sent from an inspection device connected for inspection of the gaming machine at the time of shipment from the factory.

In addition, the external RAM (05TKK0020) is inspected either by the CPU (04TKK0011) of the peripheral control unit 1511 processing an inspection program, or by the RAM diagnostic circuit (06TKK0020) provided in the VDP (04TKK0060).

Inspection based on the inspection program is performed by the CPU (04TKK0011) of the peripheral control unit 1511 processing the corresponding inspection program based on the reception of an inspection command. First, the command receiving unit (communication port) of the peripheral control board 1510 receives the transmitted inspection command and stores it in a command buffer. The CPU (04TKK0011) of the peripheral control unit 1511 executes the inspection program corresponding to the inspection command stored in the command buffer. Note that the inspection command is received by the same command receiving unit (communication port) as the command receiving unit (communication port) that receives performance-related commands transmitted from the main control board 1310, but it may also be received by a command receiving unit (command input port, communication port) dedicated to inspection.

[32-2a. Inspection Command]
First, the inspection command will be described. In addition to the external RAM (05TKK0020), the inspection target includes the VDP (04TKK0060), the sound source IC (04TKK0030), and the operation modes of various performance devices. In addition, the inspection program is not limited to being executed by the CPU (04TKK0011), and may be executed by another calculation means such as the VDP (04TKK0060) depending on the inspection target. Below, the command for inspecting the external RAM (05TKK0020) will be described.

Figure 470 shows an example of a command for inspecting the external RAM (05TKK0020). The inspection command system is the same as or similar to the game commands. If the game commands are similar but not identical, for example, the game command is composed of a command value + checksum, whereas the inspection command is only the command value. Even if they are similar, the command values are not duplicated between the game command and the inspection command. This allows the peripheral control board 1510 to execute processing based only on the command value, without distinguishing between a game command and an inspection command, when it receives a command.

The inspection of the external RAM (05TKK0020) in the gaming machine of this embodiment can be broadly divided into two types: the R/W (Read/Write) test (first inspection means) and the glitch margin check (second inspection means). Each inspection is further subdivided according to the number of trials, etc. The R/W (Read/Write) test and the glitch margin check (inspection) are explained below.

[32-2b. R/W Test]
The R/W (Read/Write) test determines whether data can be normally read and written to a storage area provided by the external RAM (05TKK0020). The R/W test is executed by the CPU (04TKK0011) of the peripheral control unit 1511 processing a test program for executing the R/W test.

In the R/W test, a predetermined value is written to the entire memory area, and then it is determined whether the written value can be read accurately. If the value cannot be read correctly, the test results in a failure, and the test being performed at this point is terminated. At this time, the test itself may be terminated, or the test command to be executed next may be received and the test may be continued. When the test is completed, the test result can be output from the general-purpose input/output terminal (GPIO) of the CPU (04TKK0011), and for example, the test result is sent to the test device that sent the test command. When the test result is received, the test device displays the test result and, if necessary, sends the next test command to continue the test. For example, the R/W test 1 command is sent to the peripheral control board 1510, and after receiving and displaying the test result, the R/W test 2 command is sent. Furthermore, the glitch margin check 1 command, the glitch margin check 2 command, etc. are sent in sequence. The test contents corresponding to each command will be described later. The general-purpose input/output terminal that outputs the test results is a terminal that is not used for playing games. This makes it possible to manage the configuration required for testing separately from the configuration for playing games, thereby preventing the configuration management of the gaming machine from becoming too complicated.

The R/W test command includes commands to perform three types of tests depending on the type of data to be written. R/W test 1 writes a specified value ("0x55aa55aa") and performs a test. R/W test 2 writes a value ("0xaa55aa55") different from the value written in R/W test 1 and performs a test. The specified value written in R/W test 1 is "01010101101010100101010110101010" in binary notation, and the specified value written in R/W test 1 is "10101010010101011010101001010101". By executing R/W test 1 and R/W test 2, "0" and "1" are written in the entire area, improving the test accuracy.

In addition, R/W test 3 writes a 2-byte random value to perform the test. In cases where performing both R/W test 1 and R/W test 2 would take a long time due to reasons such as limited memory capacity, writing a random value allows for a less biased test and improves the test accuracy. The random value generated when writing is the same as the random value generated when reading (comparing), and the random value is generated by the random number generation process (function) of the same program. Also, instead of generating the random value by a program (software), it may be generated by hardware such as a random number generation circuit.

As described above, by enabling testing to write multiple types of values, testing can be performed according to the situation, and by improving the accuracy of the testing, stable presentation control can be achieved, preventing a decline in interest in the game.

[32-2b. Glitch margin check (inspection)]
Glitch margin check (inspection) judges the durability of memory modules when a glitch occurs. A glitch is a malfunction that occurs when the clock signal momentarily turns ON/OFF due to noise or other factors occurring near the limit voltage during the rise/fall of the clock signal. Glitch margin check measures the allowable range (margin) when a glitch occurs to inspect the durability against the input of unexpected defective signals due to noise or other factors. Normally, sufficient durability is ensured for the margin at the design stage, but durability may change due to errors that occur during mass production of memory modules or deterioration over time, so safety is increased by making it possible to inspect after the fact.

The glitch margin check is executed by the diagnostic function of the RAM diagnostic circuit (06TKK0020) provided in the VDP (04TKK0060). The glitch margin check command is a command for executing a glitch margin check (inspection), and two types of commands are prepared according to the number of inspections (3 times, 30,000 times). The number of inspections is not limited to the number shown in FIG. 470, and may be a different number. As described above, the glitch margin check is executed by switching the value of the termination resistor, and a predetermined number of inspections are executed for each type of resistance value of the termination resistor. Since three types of resistance values can be set as the termination resistor in the gaming machine of this embodiment, the predetermined number of inspections are executed three times. In other words, when the number of inspections is three, one inspection (predetermined number of times) is executed for each resistance value, and when the number of inspections is 30,000, 10,000 inspections (predetermined number of times) are executed for each resistance value.

When the CPU (04TKK0011) of the peripheral control unit 1511 receives a glitch margin check command, it instructs the VDP (04TKK0060) to execute a glitch margin check. When instructed to execute a glitch margin check, the VDP (04TKK0060) sets values in registers that set test parameters and execution results, etc., and executes a glitch margin check (test) using the RAM diagnostic circuit (06TKK0020). The test performed by the RAM diagnostic circuit (06TKK0020) is explained below.

[32-2c. RAM diagnostic circuit inspection]
Next, the inspection by the RAM diagnostic circuit (06TKK0020) will be described. The VDP (04TKK0060) of the gaming machine of this embodiment is equipped with a RAM diagnostic circuit (06TKK0020), which sets parameters in a register for inspection and executes an inspection based on the contents of the register. The RAM diagnostic circuit (06TKK0020) inspects the external RAM (05TKK0020), but may also be configured to be able to inspect the image RAM (04TKK0090).

As mentioned above, the RAM diagnostic circuit (06TKK0020) performs the test based on the VDP (04TKK0060) receiving an instruction to perform the test from the peripheral control unit 1511. Also, the test may be performed at a specific timing or when specific conditions are met, such as when the power is turned on, even if the VDP does not receive an instruction to perform the test from the peripheral control unit 1511.

In addition, the inspection by the RAM diagnostic circuit (06TKK0020) is performed by setting various parameters in the inspection register described below, and at this time, the inspection is performed multiple times while changing the resistance value of the termination resistors (06TKK0016, 06TKK0017) of the address bus and data bus of the memory controller (06TKK0010) of the VDP (04TKK0060) to which the external RAM (05TKK0020) is connected. Specifically, the resistance is changed in the order of 40 Ω, 36 Ω, and 60 Ω. By performing the inspection while changing the resistance value of the termination resistor in this way, the accuracy of the glitch margin check can be improved.

Next, we will explain the registers (test registers) that are set to execute the test. The values of various parameters used during test execution are set in registers provided in the VDP (04TKK0060). In addition to setting parameters, the registers are also used to output test results and to issue commands to start execution of the test.

Figure 471 is a diagram explaining the registers that are set to perform an inspection of the external RAM (05TKK0020) by the RAM diagnostic circuit (06TKK0020). Each register is composed of 32 bits, and parameters, etc. are set by writing values to the corresponding bits.

The registers used by the RAM diagnostic circuit (06TKK0020) to test the external RAM (05TKK0020) include a control register, a start address register, and an expected value mask register. The control register is a register for controlling the test, and is used to output the test results and input instructions to run the test. The start address register is a register for setting the start position of the test in the external RAM (05TKK0020). The expected value mask register is a register for specifying the test location in the external RAM (05TKK0020). Each register is explained below.

[32-2c-1. Control Register]
As described above, the control register is a register for controlling the inspection. The control register includes two types of registers: control register 0 and control register 1. The functions and the like corresponding to each bit of each control register will be described below.

(Control Register 0)
In the control register 0, the result of the address check (RESULT_A) is stored in 25 bits, the result of the data check (RESULT_D) is stored in 24 bits, the execution command for the test (TEST_GO) is stored in 16 bits, and the MR3 data (MR3_DATA_1[15:0]) is stored in bits 15 to 0. The other bits are set to "0b".

The result of the address check (RESULT_A) is stored as the result of checking for defects related to the address/command terminals. The stored value is read-only. If the inspection result indicates that there is a defect (abnormal), "0b" is set to the bit, and if there is no defect (normal), "1b" is set to the corresponding bit. Note that the address check only determines whether there is a defect, and does not identify the location of the defect.

The data check result (RESULT_D) stores the result of checking all bits of the external RAM (05TKK0020) for defects. The stored value is read-only. If the inspection finds a defect (abnormal), "0b" is set to the bit, and if the inspection finds no defect (normal), "1b" is set to the relevant bit. During the data check, any defective locations are recorded in a separate register, etc., and the memory controller controls so that data cannot be read or written to those locations.

The command to execute a test (TEST_GO) is set to "1b" if a test is being executed, and "0b" if it is not being executed. The command to execute a test (TEST_GO) is write-only, and setting the bit to "1b" starts the test. The command to execute a test (TEST_DONE) is set to "1b" if a test is being executed, and to "0b" if the test is not being executed (test execution finished). The VDP (04TKK0060) determines that the test has ended when the value of TEST_DONE becomes "0b", and reads out each test result (RESULT_A, RESULT_D). When the test ends, the VDP (04TKK0060) always sets TEST_GO to "0b", which makes it possible to execute the test again.

MR3 data (MR3_DATA_1[15:0]) consists of 16 bits. The value of MR3 data (MR3_DATA_1[15:0]) can be read and written.

When the gaming machine is reset, a predetermined initial value is set in each register. At this time, the bits relating to the start/end of test execution (e.g., TEST_GO, TEST_DONE) are set to initial values so that the test can be executed. Specifically, TEST_GO is set to "0b" (test not being executed), and TEST_DONE is set to "0b" (test not being executed). By configuring in this way, the test can be executed normally from the moment the power is turned on.

(Control Register 1)
In the control register 1, whether or not an address check is to be performed (ADDR_CHECK) is stored in 16 bits, whether or not a data check is to be performed (DATA_CHECK) is stored in 8 bits, and the (DDR) memory capacity to be checked (ADDR_SPACE[5:0]) is stored in bits 5 to 0. The other bits are set to "0b".

Whether to perform an address check (ADDR_CHECK) is set to "0b" if an address check is not performed, and "1b" if an address check is performed. The address check is a simple check that changes the address bus one bit at a time. For example, the address is changed as follows: 0x00, 0x01, 0x02, 0x04, ... Note that when performing an address check, the start address (described below) must be set to a specific value (0_0000_0000h).

Whether or not to perform a data check (DATA_CHECK) is set to "0b" if a data check is not performed, and "1b" if a data check is performed. The data check checks all address areas based on a test algorithm. Since any data defects could cause the performance device to behave unexpectedly and break down, the test algorithm is not a simple one, but one that allows for quality-oriented inspection.

When both address and data checks are set to be performed (when ADDR_CHECK and DATA_CHECK are set to "1b"), the address check is performed, followed by a data check. If a defect is found during the address check, the process ends without performing a data check. This is because the data check is a quality-oriented inspection that can identify the defective location, and therefore it is not possible to identify the defective location at the time when a defect is found in the address.

The memory (storage) capacity (ADDR_SPACE [5:0]) is a value indicating the area to be inspected in the external RAM (05TKK0020), and the actual area is 2 ^ADDR_SPACE . Since ADDR_SPACE is 6 bits, a value from "00h" to "3Fh" can be specified. Since the inspection efficiency deteriorates if the inspection target area is small, the gaming machine of this embodiment is configured to set a value of at least 6 ("06h";"000110b") or more. Since it is usually not necessary to exclude a specific area from the inspection target, the ADDR_SPACE is set to the maximum value ("3Fh") and the start address of the area ("0_0000_0000h") is specified as the inspection start address, so that the inspection is performed on the entire storage area regardless of the maximum storage capacity.

Also, since the value of each bit of ADDR_SPACE is set to "0b" as the initial value, even if a test is performed by mistake (when "1b" is set to TEST_GO), the area to be tested becomes 2 ⁰ =1 (bits), so that the test is not actually performed. This makes it possible to prevent a test from being performed and the performance from being interrupted, even if "1b" is unintentionally set to TEST_GO due to the influence of noise or the like.

[32-2c-2. Start Address Register]
The start address register specifies the starting address of the area to be inspected (start address; (START_ADDRESS [34:0])). The start address is defined in 35 bits, and since the register capacity is 32 bits, it is composed of two registers: an upper start address register and a lower start address register.

The upper start address register stores the value of the upper 3 bits of the start address (START_ADDRESS[34:32]). The value of the upper 3 bits is stored in bits 2 to 0, and the remaining bits 31 to 3 are set to "0b". The upper 2 bits of the upper start address (START_ADDRESS[34:33]) are set to "0b".

The lower start address register stores the value of the lower 32 bits of the start address (START_ADDRESS[31:16], (START_ADDRESS[15:0]). The value of the lower 32 bits of the start address is managed in 16-bit (2-byte) units, as shown in FIG. 471. Note that the lower 5 bits of the lower start address (START_ADDRESS[4:0]) are always set to "0" (32-byte boundary).

As mentioned above, the external RAM (05TKK0020) test usually covers the entire area, so "0" is set in both the upper and lower start address registers to make them the starting address (address 0).

Expected Value Mask Register
The expected value mask is used to set whether or not to test a specific terminal. If testing is to be performed, "0b" is set, and if testing is not to be performed, "1b" is set. This allows only specific terminals to be subject to testing. The expected value mask registers are defined for each of the four types of addresses ("00", "01", "10", "11") specified in the column addresses of the external RAM (05TKK0020) (expected value mask register 00, expected value mask register 01, expected value mask register 10, expected value mask register 11). Each expected value mask register has the same configuration.

The expected value mask register is divided into four areas (A to D) each corresponding to a storage element (memory device (06TKK0022)) of 8 bits each (31 bits to 24 bits; MASKD_DQ[7:0], 23 bits to 16 bits; MASKC_DQ[7:0], 15 bits to 8 bits; MASKB_DQ[7:0], 7 bits to 0 bits; MASKA_DQ[7:0]). Normally, all bits are set to "0b" to test all terminals. On the other hand, if the register is set to "1b" and the terminal is excluded from the test, the expected value will be ignored even if it fails. Note that if the register is set to "1b" and the terminal is excluded from the test, the test itself may not be performed.

[32-3. Control for executing an external RAM test]
Next, the control for executing the inspection of the external RAM (05TKK0020) will be described. In the gaming machine of this embodiment, the inspection of the external RAM (05TKK0020) is executed when the power is turned on, before the game can be started. It is also possible to execute the inspection of the external RAM (05TKK0020) after the power is turned on (after the power-on processing is completed). It is not necessarily required to implement the function of executing the inspection when the power is turned on. It is sufficient to be able to execute the inspection as necessary after the peripheral control board 1510 is in a state where it can receive the inspection command after the power of the gaming machine is turned on, and it is not necessarily required to implement the inspection processing in the power-on processing (boot program, peripheral control program).

First, the basic control during test execution will be explained. After the CPU (04TKK0011) of the peripheral control unit 1511 receives a test command, the CPU (04TKK0011) of the peripheral control unit 1511 executes a test program (in the case of an R/W test), or sets parameters in the test register of the VDP (04TKK0060) and executes a test using the RAM diagnostic circuit (06TKK0020) provided in the memory controller (06TKK0010) (in the case of a glitch margin check).

When the inspection of the external RAM (05TKK0020) is completed, the CPU (04TKK0011) reads out the inspection results and outputs them via the general-purpose input/output terminal (GPIO). The CPU (04TKK0011) outputs the inspection results (commands, information) to the inspection device without making any particular judgment as to whether the inspection results are normal or abnormal. The end of the inspection is determined by the value of TEST_DONE in the inspection register or an interrupt request from the VDP (04TKK0060). When the inspection device receives the inspection results, it displays the received inspection results, and if another inspection is to be performed, it sends further inspection commands to continue the inspection.

The following describes the inspections that are performed when the power is turned on (power-on processing) and after the power-on processing is completed, with reference to the flowchart.

[32-3a. Inspection at power-on (power-on processing)]
As described above, the inspection of the external RAM (05TKK0020) in the gaming machine of this embodiment includes an R/W test and a glitch margin check. The R/W test is executed by processing an inspection program. The inspection program is included in the peripheral control program. Therefore, the R/W test cannot be executed before the peripheral control program is read and executed when the power is turned on. In addition, the glitch margin check is executed by the RAM diagnostic circuit (06TKK0020) based on the inspection register, so it can be started before the peripheral control program is executed.

In the power-on process, as shown in FIG. 429, the boot program is started first, and then the peripheral control program is started. The R/W test is executed in the inspection process included in the peripheral control program (step 05TK0040). In addition, the glitch margin check is executed by the RAM diagnostic circuit (06TKK0020) provided in the memory controller (06TKK0010) of the VDP (04TKK0060), so it can be executed in the inspection process of the boot program (step 05TK0010). Note that the inspection at power-on may be controlled to be executed by a program rather than by an inspection command.

Below, we will explain how to perform tests when the power is turned on, including the execution timing of each test. First, we will explain how to perform a glitch margin check that can be performed, and then we will explain how to perform an R/W test.

[32-3a-1. Glitch margin check]
FIG. 472 is a flowchart showing the procedure for inspection processing (glitch margin check) of the external RAM (05TKK0020) in the boot program.

The CPU (04TKK0011) of the peripheral control unit 1511 first sets various registers in the test registers of the VDP (04TKK0060) (step 06TKS0010). The contents of the registers to be set are as explained in FIG. 471. Note that a register setting instruction may be sent to the VDP (04TKK0060), and the VDP (04TKK0060) or the RAM diagnostic circuit (06TKK0020) may set the test registers.

Next, the CPU (04TKK0011) of the peripheral control unit 1511 instructs the VDP (04TKK0060) to perform a test (step 06TKS0020). At this time, the CPU (04TKK0011) may instruct the VDP (04TKK0060) to perform a test by setting "1b" to the test register TEST_GO, or the VDP (04TKK0060) that has received the instruction to perform a test may set "1b" to the test register TEST_GO in accordance with the instruction.

Finally, when the test is completed, the CPU (04TKK0011) of the peripheral control unit 1511 outputs the test results from the general-purpose input/output terminal (GIPO) (step 06TKS0030). If a test device is connected to the general-purpose input/output terminal (GIPO) of the peripheral control board 1510, the received test results are displayed on the test device.

[32-3a-2. R/W Test]
FIG. 473 is a flowchart showing the procedure for the inspection process (R/W test) of the external RAM (05TKK0020) in the peripheral control program.

The CPU (04TKK0011) of the peripheral control unit 1511 executes a test program that executes the R/W test (step 06TKS0110). The R/W test can execute three types of tests depending on the value to be written. The value written in R/W test 1 ("0x55aa55aa") and the value written in R/W test 2 ("0xaa55aa55") are the bit-inverted values of one value when the other value is expressed in binary, so by executing both tests, the values "0" and "1" can be written in all areas, improving the test accuracy. R/W test 3 is a test that writes a 2-byte random value, and has higher accuracy than executing only R/W test 1 or R/W test 2, and can complete the test in half the time compared to executing both R/W test 1 and R/W test 2.

Finally, when the test is completed, the CPU (04TKK0011) of the peripheral control unit 1511 outputs the test results from the general-purpose input/output terminal (GIPO) (step 06TKS0120). If a test device is connected to the general-purpose input/output terminal (GIPO) of the peripheral control board 1510, the received test results are displayed on the test device, as in the case of the glitch margin check. Note that the processing of step 06TKS0120 is the same as that of step 06TKS0030 in the flowchart shown in FIG. 472.

The above describes how to inspect the external RAM (05TKK0020) when the power is turned on, but an R/W test and glitch margin check may also be performed at the end of the power-on process. Even if there is a defect in some storage area of the external RAM (05TKK0020), the power-on process can be continued by writing data to another area, so it is possible to perform the inspection at the end. Also, if a fatal fault has occurred in the external RAM (05TKK0020), the power-on process cannot be completed without inspection, and subsequent processing (start-up of the gaming machine) will be canceled. By inspecting at the end of the power-on process, defects can be discovered before game play begins, reducing the possibility of a malfunction occurring in the gaming machine during game play.

[32-3b. Inspection after power-on processing]
Next, a case where an external RAM (05TKK0020) is inspected after power-on will be described. The inspection process shown in Fig. 472 and Fig. 473 is called from the power-on process, and the inspection is completed before the start of the game. Here, a process for inspecting after the initialization of various devices of the gaming machine is completed after power-on will be described.

Figure 474 is a flowchart showing the procedure for the inspection process (glitch margin check and R/W test) of the external RAM (05TKK0020) that is executed after power is turned on. This process is included in the peripheral control program, and is configured to be able to execute both the glitch margin check and the R/W test.

The timing of execution of this process may be set to be periodic using a timer interrupt process or the like, or may be set to occur when a specified search condition is met. In addition, when performing an inspection during the power-on process described above, if the inspection is performed at the end of the power-on process, this process may be called at the end of the power-on process.

Furthermore, when executing this process, as described above, the inspection process (Figs. 472 and 473) does not need to be executed when the gaming machine is powered on, i.e., in the power-on processing. Conversely, when the inspection process is executed in the power-on processing, this process does not need to be executed (implemented). Furthermore, these inspection processes do not need to be executed all the time when the power is turned on, and may be executed, for example, only when an inspection device is connected, or only once a month (for example, at the beginning of the month).

The CPU (04TKK0011) of the peripheral control unit 1511 first determines whether the test execution conditions are met (step 06TKS0210). The test execution conditions include, for example, when a predetermined time has passed since the machine entered the customer waiting state and a test command has been received, when the peripheral control board 1510 is connected to a test device, or when a test is performed at the end of the power-on process. Note that when a game performance is being performed, for example when a performance pattern is being displayed in a variable manner, no test is performed and the search execution conditions are not met.

If the test execution conditions are not met (the result of step 06TKS0210 is "NO"), the CPU (04TKK0011) of the peripheral control unit 1511 further determines whether or not a test is being performed (step 06TKS0270). If a test is not being performed (the result of step 06TKS0270 is "NO"), this process ends. On the other hand, if a test is being performed (the result of step 06TKS0270 is "YES"), it determines whether or not to stop the test being performed (step 06TKS0280). An example of a case in which the test execution conditions are not met while a test is being performed is when the peripheral control board 1510 receives a command to start or continue play (game command) while a test is being performed.

If the ongoing test is to be stopped (the result of step 06TKS0280 is "YES"), the CPU (04TKK0011) of the peripheral control unit 1511 stops the ongoing test (step 06TKS0290) and then ends this process. This case corresponds to a case where the peripheral control board 1510 receives a command (game command) to start or continue play while the test is being performed. By configuring in this way, it is possible to prioritize continuing play without interrupting it. Even if some memory areas are defective, if the external RAM (05TKK0020) is usable, the game can be continued without interruption, preventing a decrease in interest in the game.

On the other hand, if the CPU (04TKK0011) of the peripheral control unit 1511 does not stop the ongoing test (the result of step 06TKS0280 is "NO"), it continues the test as is and ends this process.

Whether or not to stop the test is determined based on the type of test being performed and the reason why the test execution condition was released. For example, as described above, if a game command (a command for presentation) is received, the test is stopped and presentation control is executed based on the received command. On the other hand, if a command other than a game command (a command for presentation) is received, the test may be continued. Furthermore, if the test is continued, the reception of commands may be ignored until the test is completed, or processing may be executed based on the command received after the test is completed.

If the test execution conditions are met (the result of step 06TKS0210 is "YES"), the CPU (04TKK0011) of the peripheral control unit 1511 selects the means (calculation means) to execute the test (step 06TKS0220). If the means to execute the test is the CPU (04TKK0011) of the peripheral control unit 1511 (the result of step 06TKS0220 is "CPU"), it executes a program corresponding to the specified test (step 06TKS0230). The test may be specified, for example, in response to a received test command, or based on a predefined execution list of tests. This corresponds to the case of executing the R/W test described above.

On the other hand, if the means for executing the test is the VDP (04TKK0060) (the result of step 06TKS0220 is "VDP"), the CPU (04TKK0011) of the peripheral control unit 1511 sets various registers in the test registers of the VDP (04TKK0060) to correspond to the specified test (step 06TKS0240). Note that the processing of step 06TKS0240 is the same as the processing of step 06TKS0010 in FIG. 472, and therefore a description thereof will be omitted. Also, the specification of the test is the same as when the test is executed by the test program.

Next, the CPU (04TKK0011) of the peripheral control unit 1511 instructs the VDP (04TKK0060) to perform an inspection (step 06TKS0250). Note that the processing of step 06TKS0250 is similar to the processing of step 06TKS0020 in FIG. 472, and therefore a description thereof will be omitted.

Finally, when the test is completed, the CPU (04TKK0011) of the peripheral control unit 1511 outputs the test results from the general-purpose input/output terminal (GIPO) (step 06TKS0030). The output of the test results is performed in the same manner as step 06TKS0030 in FIG. 472.

The CPU (04TKK0011) of the peripheral control unit 1511 does not reject (suppress) the acceptance of game commands from the main control board 1310, even if the inspection result of the external RAM (05TKK0020) indicates an abnormality, but executes processing based on the received game commands and continues to control the various presentation devices. This is because it is possible to continue playing even if part of the external RAM (05TKK0020) is defective (abnormal), and because the external RAM (05TKK0020) is used for presentation control and not for control related to the allocation of game value, it is possible to prevent a decrease in interest due to interruption of play. Note that if an inspection is being performed based on an inspection command sent from the inspection device, play is not continuing, so the operation (use) of the gaming machine in question can be stopped.

[32-3c. Modification of inspection after power-on processing]
The above explains the case where the test is executed after the power-on process is completed. If a test such as an R/W test that writes a specified value to the entire memory area of the external RAM (05TKK0020) is executed during play, the data stored in the external RAM (05TKK0020) will be destroyed. Therefore, even if a performance command is received after the start of the test, normal performance control cannot be executed.

Therefore, when an inspection of the external RAM (05TKK0020) is started, the acceptance of performance commands may be stopped. For example, when the inspection execution condition is met (the result of step 06TKS0210 is "YES"), the acceptance of performance commands is stopped. After the inspection starts, the corresponding inspection is performed every time an inspection command is received, and the inspection result is notified to the outside of the peripheral control board 1510 via the communication port, and during this time, no performance commands are accepted.

Furthermore, after the inspection is complete, the data stored in the external RAM (05TKK0020) will be destroyed, so the power to the gaming machine will need to be turned back on, the gaming machine will need to be restarted, and play will need to be resumed.

In addition, after the power of the gaming machine is turned back on and play has begun, that is, while play is in progress, the inspection command may not be accepted (received). In other words, inspection of the external RAM (05TKK0020) may only be performed after the power is turned on and before play begins. In other words, the inspection is performed if the first command received by the peripheral control board 1510 after power is turned on is an inspection command, or if the command received before receiving the command indicating the start of play contains an inspection command. By configuring in this way, it is possible to prevent a decrease in interest in the game due to the game being interrupted by an inspection being performed during play.

In addition, if the reception of effect commands is stopped after the inspection has begun, the game effect cannot be started (the stop of reception of effect commands is not lifted) unless certain conditions are met, such as the game machine being powered back on or the peripheral control board 1510 being initialized. By configuring it in this way, it is possible to prevent effects from being executed based on effect data that has been destroyed by the inspection of the external RAM (05TKK0020).

In addition to specific tests such as R/W tests and glitch margin checks, the tests performed by the peripheral control board 1510 also include tests that can maintain data stored in temporary storage means such as an external RAM (05TKK0020) without destroying it, i.e., tests that can resume play after the test is performed (third test means). Such tests include, for example, display checks of the liquid crystal display device 1600 and connection checks of the performance data ROM (05TKK0070).

If the data stored in a temporary storage means such as an external RAM (05TKK0020) is not destroyed when an inspection is performed, the inspection may be allowed to be performed after game play has started. In addition, for inspections that are performed after game play has started but allow game play to be resumed after completion, game play may be allowed to start after completion of the inspection even if conditions such as restarting the power supply to the gaming machine are not met. In other words, conditions such as whether or not an inspection can be performed after game play has started and whether or not game play can be started after completion of the inspection may be set depending on the type of inspection. With this configuration, certain inspections can be performed during game play, thereby reducing the time the gaming machine is stopped for inspection while still allowing stable operation of the gaming machine.

[32-3d. Others]
If the power supply to the peripheral control board 1510 is cut off while the external RAM (05TKK0020) is being tested, the test is suspended. In this case, even if the power is turned on again, the suspended test is stopped without being resumed. This is because managing the progress of the test makes the control more complicated, and if necessary, the test can be run from the beginning.

In addition, in the gaming machine of this embodiment, the execution of the glitch margin check and the R/W test is completed in a short time, but the inspection of the external RAM (05TKK0020) takes a long time as the memory capacity increases. Therefore, it is possible to divide the inspection of the external RAM (05TKK0020) into areas or memory elements (memory devices) and perform the inspection for each divided area as necessary. In this case, when the inspection of all areas is performed, it is possible to manage the progress of the inspection by managing the areas that have been inspected. In a gaming machine in which the progress of the inspection is managed in this way, if the power of the gaming machine is turned off and then turned on again, in the case of a hot start, the inspection before the power outage is continued. On the other hand, in the case of a cold start, the progress of the inspection is not retained, so the execution of the inspection is stopped. By configuring in this way, it is possible to continue the inspection when the power is turned on again even when a long-term inspection is performed.

[33. Detection of Unauthorized Winning in Gaming Machines Capable of Producing Multiple Types of Wins]
[33-1. Overview of the Game]
In the gaming machine described above, if a special lottery is won, a special gaming state is generated in which the large prize opening is opened for a predetermined time. In the special gaming state, after the large prize opening is opened so that it can receive gaming balls, if a predetermined condition is met, the large prize opening is closed so that it cannot receive gaming balls, and this is repeated a predetermined number of times (predetermined rounds), thereby providing the player with gaming value. The predetermined condition is when a predetermined number of gaming balls enter the large prize opening, or when a predetermined time has passed since the large prize opening was opened.

In contrast, in the gaming machine described below, in the special gaming state that occurs after a special lottery win, a win occurs in which the large prize opening opens and can receive gaming balls for one round. In the gaming machine of this embodiment, at least two types of such wins (special gaming states) occur based on the results of the special lottery. Figure 475 is a diagram explaining the types of wins in the gaming machine of this embodiment.

The first win is set so that the probability of winning the special lottery after the special game state (first special game state) ends is high, and is controlled so that the first win is likely to occur consecutively. For example, the probability of winning the first win is set to high until the special lottery is executed 20 times.

In addition, the number of times that the first win can be won consecutively is preset, and if the first win is won four times consecutively, the probability of the next win after the special game state ends is set to return to the normal probability. Therefore, the number of consecutive first wins is stored in a memory area provided by the main control RAM 1312.

In addition, if a player does not win the special lottery a predetermined number of times in succession after winning the first prize, it is not considered to be a consecutive win, and the number of consecutive first prize wins is cleared. In addition, if a predetermined amount of time has passed since winning the first prize, it may not be considered to be a consecutive win.

On the other hand, for the second win, after the special game state (second special game state) ends, the probability of winning the special lottery is set to the normal probability of winning. Also, second wins do not generally occur consecutively and are single wins, but the probability of winning the second win may be set to be higher by a lottery or the like. Note that there is no need to store the number of consecutive wins for the second win.

In addition, the first win does not award much game value (number of prize balls) in one special game state, but since the special game state can occur consecutively, more game value (prize balls) will be awarded than the second win. In the example shown in Figure 475, if the first win is won four times in a row, the prize balls will correspond to 2 x 4 = 8 winning balls, while the second win will award the prize balls corresponding to 6 winning balls. Note that the number of illegal winning judgments and the number of consecutive winnings shown in Figure 475 are only examples and are not limited to these values.

Furthermore, in both the first and second wins, if more game balls enter the large prize opening than the predefined number of balls that can enter, it will be judged as an illegal win. Since the opening time of the large prize opening is short for a first win, it will be judged based on the total number of winnings when four (upper limit) consecutive first wins occur. On the other hand, a second win will be judged based on the total number of winnings in one win. The procedure for judging illegal wins for each win will be described later.

Note that when a first win is won, the probability of winning the first win is set so that the possibility of consecutive first wins is high, but the possibility of winning a second win is not eliminated even if the probability of winning the first win is high. If, after winning the first win, a second win is won before the maximum number of first wins (four), the probability of winning the first win will not be high even if the special game state due to the second win ends.

In addition, both the first and second wins can be won regardless of whether the game ball enters the first start hole 2002 or the second start hole 2004. The probability of winning each win may be different depending on the start hole into which the game ball enters.

The third hit may be a hit in which the large prize opening is repeatedly opened a predetermined number of times (rounds) like a conventional jackpot, and the second hit may be a hit in which the large prize opening is repeatedly opened a predetermined number of times (rounds) like a conventional jackpot.

Also, both the first and second hits may be multiple round jackpots. In this case, the number of rounds for the first hit is set to be fewer than that for the second hit. This allows multiple hits with fewer rounds to be grouped together, improving the system for determining whether or not a prize has been won illegally.

Furthermore, the winning probability after the first win does not have to be set to a high probability. For example, the winning probability of the first win may be originally set higher than the winning probability of the second win, making it easier to win the first win consecutively. Even if the winning probability after the first win is in the normal state, the winning probability per unit time may be increased by shortening the time for which the special pattern changes. In this case, the number of changes considered to be consecutive wins may be set to be higher than normal.

In addition, the first and second wins may open and close the same big prize opening, or they may open and close separate big prize openings.

[33-2. Hit determination]
Next, the method of drawing the special lottery (method of determining whether or not a prize has been won) in the gaming machine of this embodiment will be described. The method of drawing the special lottery is the same as the conventional method in that a random number within a predetermined range is generated, and if the value of the generated random number matches a preset prize value, it is determined that a prize has been won. The prize value may be a range, and in this case, if the generated random number value is included in the prize range, it is determined that a prize has been won.

Figure 476 is a diagram explaining the random numbers used to determine a win in the gaming machine of this embodiment, where (A) is pattern 1 and (B) is pattern 2.

In pattern 1 shown in (A), corresponding ranges are set for each of misses, first wins, and second wins. The lottery result is then determined to correspond to the range that contains the value of the generated random number for winning judgment. This makes it possible to identify the type of winning with a single random number, simplifying the processing and data related to the judgment.

In pattern 1 shown in (B), a two-stage lottery is performed. First, a random number for determining whether or not a prize has been won is generated, and a win or loss is determined. If a prize is determined to be a win, a random number for the type of prize is generated, and the type of prize is determined. By making the determination in stages in this way, it is possible to set the type of prize in detail. Also, compared to pattern (A), the win determination and the type of prize determination can be separated, and the ranges for each can be set separately, making it easier to manage data.

In addition, if the first and second hits are the same regardless of the starting port into which the game ball entered, the hit determination is performed using a common process, including the hit determination value. On the other hand, if the probability of winning the first and second hits differs for each starting port into which the game ball entered, the hit determination value can be defined for each starting port.

[33-3. Judgment of Unfair Winning]
[33-3a. overview]
When a special lottery is won and the special game state is entered, the number of game balls that can be received while the large prize winning port is open is predetermined, and if the number of winning game balls exceeds the predetermined number, the large prize winning port enters a closed state. At this time, since a time lag occurs between the time the predetermined number is reached and the time the large prize winning port enters a closed state, a certain number of winning game balls is permitted to exceed the predetermined number, but if the number of winning game balls greatly exceeds the predetermined number, it is determined that an illegal entry has occurred.

However, in the first hit in the gaming machine of this embodiment, game value (prize balls) is acquired by successively opening the large winning hole for a relatively short period of time, so there is a risk that the accuracy of detecting fraud will decrease if an illegal win is judged for each hit.

Therefore, for consecutive first wins, an illegal win is judged based on the total number of winnings until the end of the consecutive wins. For example, the number of consecutive first wins is multiplied by the number of balls that can be won for one first win to calculate a threshold value for judging illegality. Then, when the consecutive wins end, the calculated threshold value is compared with the number of winnings counted in a series of consecutive big wins to judge illegal winning. Note that in the gaming machine of this embodiment, when the number of consecutive first wins reaches the upper limit (4 times), the total number of winnings is compared with the illegality judgment value to judge illegal winning.

In the case of a second win, as in the past, if a certain number of game balls or more enter the large prize slot, it will be determined to be an illegal win.

[33-3b. Fraud detection processing]
Next, the process of determining whether or not a player has won an illegal prize will be described. The process of determining whether or not a player has won an illegal prize will be performed in the illegal action detection process (step 01TKS0060 in FIG. 354) in the game enable process (FIG. 354) in the timer interrupt process (FIG. 329). The illegal action detection process will be described below.

Figure 477 is a flowchart showing the procedure for the fraud detection process in the gaming machine of this embodiment. The fraud detection process detects fraudulent winnings in the big prize slot or the start prize slot, and detects fraudulent magnetic fields.

To be more specific, the main control MPU 1311 first executes the special prize slot fraud detection process (step 07TKS0010). The special prize slot fraud detection process detects fraudulent winnings at the special prize slot. Details of the special prize slot fraud detection process will be described later in FIG. 478.

Next, the main control MPU 1311 executes magnetic fraud detection processing (step 07TKS0020). In the magnetic fraud detection processing, when a detection signal from the magnetic detection switch 3024, which detects fraudulent activity using a magnet, is input to the main control MPU 1311, the game stop cause number is set to a number corresponding to game stop due to magnetic detection, and the game is stopped.

Then, the main control MPU 1311 executes a normal electric role fraud detection process (step 07TKS0030). In the normal electric role fraud detection process, fraudulent operation of the normal electric role is detected. For example, this may occur when the second start opening 2004 is not ready to receive a game ball, i.e., when the second start opening door member 2549 is not in the open state, but a game ball enters the second start opening 2004. If fraud is detected, a fraud notification setting process is executed to store a normal electric role winning abnormality command in the command buffer and output a signal notifying of fraud to the outside (hall computer).

Finally, the main control MPU 1311 executes a hardware error detection process (step 07TKS0040). In the hard error detection process, for example, an abnormality in the hardware random number generation circuit is detected. If an abnormality is detected, a hard error command is stored in the command buffer. In this case, since it is considered to be a hardware failure, it is possible to distinguish it from fraudulent activity and therefore not to output a signal to the outside (hall computer) to notify of fraud. Also, a signal different from the signal output due to the detection of fraudulent activity may be output to the outside.

[33-3c. Big prize slot fraud detection process]
Next, the special prize opening irregularity detection process will be described. Fig. 478 is a flow chart showing the procedure of the special prize opening irregularity detection process in the gaming machine of this embodiment.

The main control MPU 1311 first judges whether or not the special lottery has been won and the game state has transitioned to a winning state (special game state) (step 07TKS0110). This is because the game state must be in a winning state (special game state) in order for the large prize opening to be in an open state and for the game ball to enter. If the game is not in a winning state (the result of step 07TKS0110 is "No"), the game ball cannot enter the large prize opening, so this process ends without checking for illegal entry. Note that if the game ball enters the large prize opening even though it is in a state where it cannot enter the large prize opening unless in the winning state, this is clearly an illegal entry, so it is also possible to only check for entry of the ball into the large prize opening, and if a ball is detected, process it as an illegal entry.

When the game state is a winning state (the result of step 07TKS0110 is "Yes"), the main control MPU 1311 determines the type of winning (step 07TKS0120). As mentioned above, the gaming machine of this embodiment has two types of winnings, and the method of determining whether or not an illegal win has occurred differs depending on the type of winning, so the settings required for each determination are made.

When the type of hit is the first hit (the result of step 07TKS0120 is "first hit"), the main control MPU 1311 obtains the number of consecutive first hits (step 07TKS0130). As described above, a first hit occurs in succession with a relatively small number of winning balls, and fraud is detected not by a single hit, but by comparing the total number of wins in the large winning slot with the fraud judgment value when first hits occur consecutively up to a predetermined upper limit (winning the special lottery).

When the number of consecutive wins for the first win is obtained, the main control MPU 1311 judges whether the number of consecutive wins for the first win has reached the upper limit (step 07TKS0140). If the number of consecutive wins for the first win has not reached the upper limit (the result of step 07TKS0140 is "No"), this process ends. Note that even if the number of consecutive wins for the first win has not reached the upper limit, a fraud judgment value corresponding to the number of consecutive wins at the time of judgment may be defined or calculated, and compared with the total number of wins to detect fraud at the large prize slot.

When the number of consecutive wins for the first win reaches the upper limit (the result of step 07TKS0140 is "Yes"), the main control MPU 1311 sets the fraud judgment condition for the first win (step 07TKS0150). The condition for judging fraud in the first win is that the total number of wins in the large prize slot since the start of the consecutive wins for the first win is greater than a predetermined fraud judgment value, and setting the fraud judgment condition for the first win means setting the first judgment value as the fraud judgment value.

When detecting fraud at the large prize opening before the number of consecutive first wins reaches the upper limit, for example, fraud at the large prize opening is detected when the first win continues for more than half of the upper limit. At this time, the fraud judgment value may be set to the same value (first judgment value) as when the number of consecutive first wins reaches the upper limit, or may be changed according to the number of consecutive wins. By using a common fraud judgment value, the area for storing the judgment value can be reduced and the procedure for setting the value can be omitted, simplifying the process. On the other hand, by setting the fraud judgment value according to the number of consecutive wins, more accurate judgment can be made.

On the other hand, if the type of win is the second win (the result of step 07TKS0120 is "second win"), the main control MPU 1311 sets the fraud judgment condition for the second win (step 07TKS0160). The second win is judged based on the total number of winning balls in the large prize slot in one win. The condition for judging a second win as fraudulent is that the total number of game balls that have won in the large prize slot since the special game state due to the second win was started is greater than a predetermined fraud judgment value, and the second judgment value is set as the fraud judgment value. Note that the upper limit of the number of consecutive wins for the second win may be set to 1 to make the process the same as for the first win.

When the fraud judgment value is set to a judgment value corresponding to the type of win, the main control MPU 1311 obtains the total number of wins in the large prize opening (step 07TKS0170). The total number of wins in the large prize opening is counted in other processes, for example, the large prize opening opening opening process. In the gaming machine of this embodiment, the counter that stores the total number of wins is used in common for the first win and the second win. As a result, if a second win occurs while the first win is continuing in succession, the total number of wins in the first win is cleared, and the initialization process can be omitted, simplifying the process. In addition, by using a common counter, the process of obtaining the total number of wins corresponding to the win can be made common. In addition, the counter that stores the total number of wins may be different for the first win and the second win.

When the main control MPU 1311 obtains the total number of winning entries into the large prize slot, it compares this total number with the judgment value set in the processing of step 07TKS0150 or step 07TKS0160 (step 07TKS0170). If the total number of winning entries is greater than the judgment value (the result of step 07TKS0180 is "No"), there have been no illegal wins, and this processing ends.

On the other hand, if the total number of winnings is equal to or less than the judgment value (the result of step 07TKS0180 is "Yes"), the main control MPU 1311 judges that an illegal winning has occurred and issues an illegal winning command indicating an illegal winning (step 07TKS0190). Note that in the processing of step 07TKS0190, the illegal winning command is a common command, but it is also possible to distinguish between illegal winnings on the first win and illegal winnings on the second win. This makes it possible to distinguish the manner of the illegal winning notification depending on the type of win, and to identify in more detail the circumstances under which the illegal act occurred.

Furthermore, a fraud notification setting process is executed to notify of a fraudulent win (step 07TKS0200). The fraud notification setting process is described in FIG. 479.

When the execution of the fraud notification setting process is completed, the main control MPU 1311 initializes the total number of winnings in the large prize winning port and the number of consecutive first wins (step 07TKS0210) and ends this process. The values of the total number of winnings in the large prize winning port and the number of consecutive first wins may be initialized at the timing when the special game state starts when the special lottery is won. In this case, it is determined whether the first win is in a consecutive win state, and initialization is performed if the consecutive win state is not in progress. In the case of a second win, initialization may be performed every time the second win is won. In addition, the timing for initializing the values of the total number of winnings in the large prize winning port and the number of consecutive first wins may be when the second win is won, or may be when the special game state ends due to the second win. By configuring in this way, it is no longer necessary to determine whether the first win is in a consecutive first win state when the first win is won, and the number of consecutive wins is initialized, and the process can be simplified.

In addition, in the gaming machine of this embodiment, the counter for the total number of winnings has an initial value of 0 and is incremented each time a gaming ball wins, and whether or not a winning has been illegal is determined based on whether the increment is equal to or greater than the illegality determination value. However, the initial value of the counter may be initially set as the illegality determination value, and the counter may be decremented each time a gaming ball wins, and illegality may be determined if the counter reaches 0 (the calculation result is negative).

[33-3d. Fraud notification setting process]
Next, the fraud notification setting process will be described. FIG. 479 is a flow chart showing the procedure of the fraud notification setting process in the gaming machine of this embodiment. The fraud notification setting process can be used not only in the big prize entrance fraud detection process but also when other fraud is detected, and is also executed when fraud is detected in the normal electric role fraud detection process.

First, the main control MPU 1311 stores the command issued when calling the fraud notification setting process, indicating that fraud has been detected, from a specified register (HL register) in the transmission buffer (step 07TKS0310). Storing the command to be sent in a specified register in the process of calling the fraud notification setting process makes it a general-purpose process. Then, based on the command sent, the peripheral control board 1510 executes operations such as displaying a warning on a display device such as an LCD, turning on or blinking decorative lamps on the game board or frame, and outputting voice, sound effects, and warning sounds.

Furthermore, the main control MPU 1311 outputs a signal indicating fraud to the outside (hall computer) via the external terminal board 784 (step 07TKS0310). In the gaming machine of this embodiment, a common signal (security signal) is output indicating that fraud has been detected. This makes it possible to standardize the process as a fraud notification setting process, and simplifies control. Note that, instead of using a generalized fraud notification setting process, commands may be set and signals output in each process that detects fraud. This configuration makes it possible to send commands and output signals according to the type of fraud.

The signal (external output signal) indicating cheating may be output for a predetermined period of time after cheating is determined, or may continue to be output until the RAM clear switch is operated. In addition, if the device is configured to stop play when cheating is detected, the output may continue until the gaming machine is powered back on.

The above describes the process for detecting illegal entries into the large prize slot. In the flowchart of the large prize slot illegal entry detection process shown in FIG. 478, illegal entries are determined based on the total number of entries into the large prize slot. However, it is also possible to count the number of entries in excess of the maximum possible number of entries (upper limit of the number of entries) instead of the total number of entries into the large prize slot, and determine illegal entries based on the number of excess entries.

[33-4. Timing chart]
[33-4a. First win: Unauthorized winning judgment]
Next, a case where an illegal entry into the big winning hole is detected will be described in chronological order. FIG. 480 is a diagram showing a timing chart when the first win is won in the gaming machine of this embodiment. In the example shown in FIG. 480, when the first win occurs four times (upper limit value) in succession and 10 or more game balls enter, it is determined that the illegal entry has occurred. Note that the numerical information and time values shown in the timing chart are only examples and are not limited to these values. For example, the number of consecutive wins of the first win and the value (determination value) for determining that the illegal entry has occurred may be another value.

First, at time t11, the first 1st win is won, the large prize opening is opened for a predetermined period of time, and game balls can enter. Then, at times t12 and t13, the large prize opening switch (SW) detects the entry of a game ball into the large prize opening. Furthermore, at time t14, the second 1st win is won, and similarly, at time t15, the third 1st win occurs, and at time t16, the fourth 1st win occurs. In the special game state resulting from each 1st win, a game ball enters the large prize opening, a prize ball command is sent to the payout control board 951, and a predetermined number of prize balls are paid out for each win (a game value is awarded).

At time t17, the total number of winnings since the start of the consecutive wins reaches the fraud judgment value (=10), and the output of a security signal (external output signal) begins. At this time, a fraud notification command is sent to the peripheral control board 1510, and fraud is notified by displaying a warning on the performance display device 1600, outputting a warning sound from the speaker, turning on a lamp, etc. If fraud is judged, the prize ball command is not sent and no prize balls are paid out.

As described above, in the gaming machine of this embodiment, there is a possibility of winning the second jackpot before the number of consecutive first jackpot wins reaches the upper limit. Figure 481 shows a timing chart of a case in which the second jackpot is won before the number of consecutive first jackpot wins reaches the upper limit in the gaming machine of this embodiment.

After winning the first win at time t21, if the player wins the second win despite the high probability of winning the first win (time t22), the number of consecutive wins of the first win and the total number of wins are cleared. The special game state due to the second win continues until time t23. At this time, the area that stores the cleared total number of wins is used for counting the second win, and also for determining whether or not there has been an illegal win in the second win. In this way, by sharing the area that stores the total number of wins regardless of the type of win, it is possible to reduce memory capacity. The timing chart for determining whether or not there has been an illegal win in the second win will be described later in Figure 482.

When the first win is won at time t24, the number of consecutive wins is cleared and the special game state begins. Specifically, the number of consecutive wins was 1 at time t22, but the number of consecutive wins for the first win is cleared when the second win is won. After that, at time t25, the number of consecutive wins increases to the second time and the first win is won, and similarly, the third first win is won at time t26 and the fourth first win is won at time t27.

At time t28, the number of consecutive wins reaches the upper limit of four, and the total number of winnings since the start of the consecutive wins reaches the fraud determination value (=10). At this time, as explained at time t17 in FIG. 480, the output of a security signal (external output signal) begins, and a fraud alert is issued by sending a fraud alert command to the peripheral control board 1510.

As described above, in the gaming machine of this embodiment, when the opening time of the large prize opening is short and consecutive wins that can be won occur, such as the first win, illegal winning is judged based on the total number of wins until the end of the series of consecutive wins. If the opening time of the large prize opening is short, it is impossible to win a prize that greatly exceeds the specified number, but if the excess number of wins is small (for example, about 1), it may hinder the smooth provision of play. Therefore, by judging illegal winning as a series of consecutive wins all at once, as in this embodiment, it is possible to increase the accuracy of judging illegal winning and prevent frequent game stops.

[33-4b. Judgment for illegal winning of the second prize]
In the gaming machine of this embodiment, even if the second win is won, the fraudulent winning is judged. As described above, the first win is judged as a fraudulent win based on the total number of wins during consecutive wins, but the second win is judged as a fraudulent win based on the total number of wins in one win.

Figure 482 shows a timing chart for when the second jackpot is won in the gaming machine of this embodiment. As mentioned above, illegal winning of the second jackpot is judged for each win.

When the second win is won at time t31, the large prize opening is opened and a game ball can enter. After that, a game ball enters the large prize opening (time t32) and the game continues. In this example, the number of balls that can enter (the upper limit of the total number of winnings) is 6, and the opening of the large prize opening (second win) ends when 6 game balls enter (time t33).

Even after the number of game balls that have entered the large prize opening reaches the number that can be entered, there is a time lag before the large prize opening actually closes. Therefore, even if the number of game balls that have entered the large prize opening exceeds the number that can be entered, up to a certain number is permitted. Taking the second win of the gaming machine of this embodiment as an example, as shown in FIG. 475, while the number of balls that can be entered is set to 6, 7 or 8 balls are permitted, and 9 balls are determined to be fraudulent.

At time t34, the big prize opening SW detects the ninth ball, which reaches the fraud judgment value, and starts outputting a security signal (external output signal), and a fraud alert is issued by sending a fraud alert command to the peripheral control board 1510.

[33-5. What to do in the event of a power outage]
In the gaming machine described above, the counters that store the total number of winnings and the number of consecutive first wins are placed in an area (backup area) of the memory area provided by the main control RAM 1312, where the contents are retained when the power is cut off. Therefore, the counter value is maintained even when the power is cut off, but when a predetermined condition is met, the counter value is initialized regardless of the counter value. That is, the counter value is cleared to 0 or an initial value (fraud determination value) is set. The predetermined condition is, for example, when the RAM clear switch 954 is operated, when an error that makes it impossible to return to play (such as a RAM error) occurs, when a setting change is performed, and when play cannot be continued.

As described above, in the gaming machine of this embodiment, the value of the counter for determining whether or not a player has won is maintained even if the power supply to the gaming machine is cut off, so that it is possible to continue to determine whether or not a player has won. This makes it possible to prevent the counter from being initialized by an unauthorized power cut, which would allow the detection of fraudulent activity to be avoided.

[33-6. Modification (simultaneous change of special pattern 1 and special pattern 2)]
[33-6a. Application to gaming machines that allow simultaneous variation of multiple types of special symbols]
In the above example, the game is based on the premise that only one of the special symbols 1 or 2 is displayed when the game ball enters both the first start hole 2002 and the second start hole 2004, and the game is configured to execute the pattern change of the special symbol (special symbol 1 or special symbol 2) corresponding to the winning start hole. In contrast, in the example shown below, when the game ball enters both the first start hole 2002 and the second start hole 2004, the pattern change of each special symbol (special symbol 1 and special symbol 2) can be executed simultaneously.

When special pattern 1 and special pattern 2 are displayed in a variable manner at the same time, both special patterns are displayed in a variable manner on the functional display unit 1400. Also, the performance display device 1600 can display any of the performance patterns (decorative patterns), but displays the main performance pattern in a manner that makes it easy to see. For example, in addition to the first to third performance patterns, a fourth pattern is displayed in an inconspicuous position on the display screen of the performance display device 1600, and the first to third and fourth patterns are displayed as the main special pattern performance patterns, while only the fourth pattern is displayed for the other special pattern.

In addition, when special pattern 1 and special pattern 2 are fluctuating simultaneously and a win occurs with one of the patterns, the other pattern is forcibly stopped as a miss, or the display of the pattern fluctuations is interrupted, and the display of the pattern fluctuations is resumed after the special game state corresponding to the winning special pattern ends, so that a win does not occur simultaneously.

An example of a game that generates the above-mentioned first and second wins will be described with a gaming machine that allows the simultaneous change of two types of special symbols. For example, if the first win occurs with the change of special symbol 1 while the simultaneous changes are being executed, the change of special symbol 2 is interrupted. Then, when the special game state due to the first win ends, the change of special symbol 2 is resumed. At this time, even if the first win occurs with the change of special symbol 2, the consecutive first wins will continue. In this way, whether or not the consecutive wins will continue is determined by the type of win that occurred, regardless of the starting hole into which the game ball entered.

In addition, if a win occurs during the pattern change of one of the special patterns while special pattern 1 and special pattern 2 are changing simultaneously, the change time may be extended rather than stopping or interrupting the other pattern change as described above. Furthermore, the behavior of the other pattern change may be changed depending on whether the hit that occurs is the first or second hit. Also, the change time of each special pattern may be changed depending on the game status.

[33-6b. Changing the behavior of the symbol fluctuation based on the game state and the result of the variable display]
Here, we will explain an example in which the behavior of the pattern change depends on the game status, and when the display of one special pattern starts or stops while the display of the other special pattern is changing, the behavior of the other pattern change depends on the result of the display (hit/miss).

The start hole for starting the changing display of special symbol 1 is located in the area on the left side of the play area, and the start hole for starting the changing display of special symbol 2 is located in the area on the right side of the play area. In normal play mode, special symbol 1 changes in a normal change time, while special symbol 2 changes in a special change time (for example, a long change time of several minutes or more). With such a gaming machine, in normal play mode, the chances of winning are significantly lower unless you aim for the area on the left side of the play area.

When a win occurs as a result of the pattern change of special pattern 1 and the game state changes, the change time of special pattern 2 is changed to the normal change time. This allows the player to aim for the area on the right side of the game area. At this time, an opening and closing member (e.g., second starting port door member 2549) may be provided to increase the frequency of winning at the starting port (second starting port 2004) that starts the changing display of special pattern 2, and the player may be encouraged to aim for the starting port that starts the changing display of special pattern 2 by opening this opening and closing member.

It is also possible to continue aiming at the area on the left even after a winning combination occurs with the pattern change of special pattern 1. In this case, the change time of special pattern 1 may be set to a special change time (e.g., a long change time of several minutes or more) in accordance with changes in the game state, so that the player is encouraged to aim at the area on the left.

Furthermore, if a win occurs due to the pattern change of special pattern 1, and the game state is changed to set the probability of winning the first win higher, the first wins are more likely to occur consecutively until the second win occurs. By configuring it in this way, while the first wins are occurring consecutively, illegal wins are judged based on the total number of wins until the number of consecutive wins reaches the upper limit. This makes it possible to make a more accurate judgment of illegal wins if the number of wins possible per first win is small, rather than judging illegal wins based on each win.

When the number of consecutive wins of the first win reaches the upper limit, or when a second win is won, the game returns to the normal game state, and the player again aims for the area to the right of the game area. The second win may include a win that returns to the normal game state after the special game state ends, and a win that clears the number of consecutive wins of the first win and continues the game state in which the winning probability of the first win is set high. Also, when the special game state due to the second win ends or the number of consecutive wins of the first win reaches the upper limit, a lottery is executed to determine whether or not to restart the game state in which the winning probability of the first win is set high, and if a win is won, the game may be continued in the game state in which the winning probability of the first win is set high.

Furthermore, if the second win is won, a game state may be generated in which the probability of winning the first win is set high. In this case, the probability of winning the first win may be set high only if the second win is won.

Also, the probability of winning the first jackpot may be set to a constant high probability, and the jackpot may be won only by the pattern change caused by the special pattern 2. In the normal game state, the change time of the special pattern 2 is a special change time, so it is difficult to win the first jackpot. Therefore, the player first plays with the special pattern 1 with the aim of winning the second jackpot, and the pattern change of the special pattern 1 causes the player to win the second jackpot. As a result, when the special pattern 2 reaches the normal change time, the player will aim at the second start hole 2004 to start the pattern change of the special pattern 2, and the first jackpot can be generated. After that, the game value (prize balls) awarded by consecutive first jackpot wins can be increased until the pattern change of the special pattern 2 causes the second jackpot to occur or the number of first jackpot wins reaches a predetermined number.

In this way, by making it possible to win the first win by the pattern change of special pattern 2 only when the second win is won by the pattern change of special pattern 1, consecutive wins of the first win will start after winning the second win. In addition, the number of consecutive wins of the first win is initialized when the first win occurs for the first time due to the pattern change of special pattern 2 after the second win is won, and the control for determining whether or not there is an illegal win in consecutive wins of the first win also starts at this timing. In this way, by clarifying the execution conditions of the control for determining whether or not there is an illegal win (when the first win occurs due to the pattern change of special pattern 2 after the second win occurs due to the pattern change of special pattern 1), it is possible to prevent the control for determining whether or not there is an illegal win from being executed at an unnecessary time, and to suppress an increase in the processing load of the game control and the complication of the game control.

As described above, even in a game with a variety of behaviors that change depending on the game state and the relationship between the special symbols that are displayed at the same time, it is possible to switch the conditions for determining whether or not a player has won to correspond to the game state and the type of win. By providing a wide variety of games while enabling the appropriate detection of illegal winnings, it is possible to prevent excessive detection of illegality that could prevent the player from continuing playing, or damages that could be caused by overlooking illegal activity.

The first win may be a small win with a short opening time for the big prize opening, since the number of balls that can enter each time is small, and the second win may be a big win with a long opening time for the big prize opening, and the method of determining whether or not an illegal win has occurred may be applied.

[34. How to update the number of consecutive time-saving plays]
[34-1. Overview of the Game]
Here, a gaming machine with an upper limit on the number of times the time-saving state occurs consecutively will be described. For example, when a player wins consecutive jackpots as a result of a special lottery, the time-saving state is prevented from occurring a predetermined number of times in succession after the special gaming state due to the jackpot ends. The gaming machine of this embodiment applies a limit to the number of consecutive time-saving events to a so-called type 1 + type 2 gaming machine. In this gaming machine, a jackpot occurs when three types of decorative symbols are aligned as in a type 1 gaming machine, and a small jackpot occurs as in a type 2 gaming machine, allowing the gaming ball to pass through a specific area (V area), and the jackpot occurs when the gaming ball passes through the specific area.

In the gaming machine of this embodiment, two types of starting holes (first starting hole 2002, second starting hole 2004) are provided. The first starting hole 2002 is located in the left area of the playing area, and it is possible to win by hitting from the left. On the other hand, the second starting hole 2004 is located in the right area of the playing area, and it is possible to win by hitting from the right.

The special symbol 1, which is displayed by winning the first starting hole 2002, can only win a big win. On the other hand, the special symbol 2, which is displayed by winning the second starting hole 2004, can only win a small win or a big win. When a small win or a big win is won, a special game state is generated in which the big win hole is opened for a predetermined time. In the special game state, the time for which the big win hole is opened and the number of times (number of rounds) for which the big win hole is opened are set according to the type of win, and the game value awarded to a player who wins a big win is higher than that of a player who wins a small win. In addition, there are multiple types of big wins, and the opening time and number of rounds of the big win hole differ depending on the type. In addition, two types of big win holes may be arranged, and one big win hole is operated when a big win is won and the other big win hole is operated when a small win is won.

The flow of play for the gaming machine of this embodiment will be explained as follows: First, a player aims at the first starting hole 2002 with a left-handed shot to win a jackpot due to the pattern change of special pattern 1, generating a special gaming state. When the special gaming state ends and the game transitions to a time-saving state, it becomes possible to land a gaming ball in the second starting hole 2004. At this time, the player can aim at the second starting hole 2004 with a right-handed shot to start the pattern change of special pattern 2.

As mentioned above, the pattern change of special pattern 2 makes it possible to win a small prize. When a small prize is won, a corresponding special game state occurs, and the large prize opening located in the right area of the game area opens and closes a predetermined number of times (predetermined rounds). This allows the player to place the game ball in the large prize opening by continuing to hit the right. A specific area (V area) is located inside this large prize opening, and the game ball can win a big prize by passing through the specific area. Note that even if the game ball enters the large prize opening, it does not necessarily mean that the game ball will pass through the specific area.

When the game ball passes through a specific area and hits a jackpot, a special game state is generated due to the jackpot. The special game state generated at this time is the same as the special game state based on a jackpot of special pattern 1, and while a predetermined condition is met, the jackpot winning hole is repeatedly opened a predetermined number of times (predetermined rounds).

In addition, if a small win is won, the game state before the win is maintained. In other words, if the game state is in a time-saving state, the time-saving state is maintained, and if the game state is not in a time-saving state, the non-time-saving state is maintained. If the game ball passes through a specific area and a big win is won, after the special game state due to the big win ends, the game will transition to a time-saving state based on the type of big win, etc.

[34-2. How to update the number of consecutive time-saving times (First embodiment: Time-saving continues even with small hits)]
Next, the procedure for updating the number of times of continuous time-saving will be explained in chronological order. In the above-mentioned gaming machine, when a jackpot is won by the variation of the special symbol (when a special lottery is won), a special game state occurs, and then the game moves to the time-saving state when a predetermined condition is satisfied. When a jackpot (special lottery) is won again during the time-saving state, the game machine is configured so that the time-saving state is likely to occur after the special game state ends up to a predetermined number of times (limit number of times, upper limit, for example, 4 times). On the other hand, when the number of times of continuous occurrence of the time-saving state (continuous time-saving number of times) reaches a predetermined number of times (limit number of times), the predetermined condition is not satisfied and the game machine moves to a non-time-saving state (normal game state) after the special game state occurs. By configuring in this way, when a jackpot is won once, the game machine can expect the time-saving state to occur a predetermined number of times (limit number of times) thereafter, which increases the player's sense of expectation and enhances the interest of the game.

The number of consecutive time-saving times is updated when the time-saving state starts after the special game state ends. In this embodiment, the initial value of the number of consecutive time-saving times is set to "0" and is added when the time-saving state starts (when transitioning). Note that the initial value of the number of consecutive time-saving times may be set to an upper limit number (limit number), and the time-saving state may be counted by subtracting it when the time-saving state starts (when transitioning).

In the above-mentioned Type 1 + Type 2 gaming machines, a special gaming state occurs even when a small win occurs, and the large prize opening is opened. Also, if a small win is won, the gaming state before the win is maintained. The procedure for updating the number of consecutive time-saving times in gaming machines with this specification will be explained in chronological order with reference to Figure 483.

Figure 483 is a timing chart that explains the operation of a gaming machine that is designed to maintain the gaming state when a small jackpot is won, when a gaming ball passes through a specific area when a small jackpot is won.

First, since the current game state is not a time-saving state (normal game state), the player hits with the left hand to aim at the first starting hole 2002 to start the pattern change of special pattern 1 (time t41). After that, at time t42, the pattern change stops and the stopped pattern is displayed. If the pattern change of special pattern 1 (special lottery) results in a jackpot, the condition device is activated (time t43), and a special game state (second special game state) occurs due to the jackpot. Furthermore, after the activation of the condition device is completed (end of the special game state), the game transitions to the time-saving state (time t44). At this time, the transition to the time-saving state adds 1 to the number of consecutive time-saving occurrences, and the number of consecutive time-saving occurrences is updated from 0 to 1.

Furthermore, by transitioning to the time-saving state, the game ball can enter the second starting hole 2004, and the player aims for the second starting hole 2004 with a right hit. When the game ball enters the second starting hole 2004, the pattern change of the special pattern 2 starts (time t45). The pattern change of the special pattern 2 can result in a big win or a small win.

In the example shown in FIG. 483, at time t46, the variable display of special pattern 2 stops, and as a result of the variable display, a small win is won. When a small win is won, the condition device is not operated, and the game state before the small win is won (time-saving state) is maintained. Also, since there is no transition to a new time-saving state, the number of consecutive time-saving cycles is maintained as is. Note that there may be one or more miss variations between winning a big win and the occurrence of a small win.

At time t47, a special game state occurs due to a small win, the large prize opening is opened, and the game ball can enter. Furthermore, when the game ball passes through a specific area located inside the large prize opening, a big win is confirmed and the condition device is activated (time t48). Furthermore, the special game state due to the small win ends and a special game state due to the big win begins (the special game state due to the small win switches to the special game state due to the big win).

Then, with the end of the special game state due to the big win, the operation of the condition device ends and a new time-saving state starts (time t49). At this time, the number of consecutive time-saving times is updated from 1 to 2 based on the start of the new time-saving state.

In the gaming machine described above, the gaming state is maintained when a small jackpot is won, and the number of consecutive time-saving times is updated when a big jackpot is won and a new time-saving state is started. Also, if a new time-saving state is not started even when a big jackpot is won, the number of consecutive time-saving times is initialized. Furthermore, if the gaming ball does not pass through a specific area when a small jackpot is won and a jackpot is not won, the gaming state is maintained while the number of consecutive time-saving times before the small jackpot was won is maintained.

[34-3. How to update the number of consecutive time-saving times (Second embodiment: Specifications for transitioning to a non-time-saving state when a small win is won)]
In the gaming machine configured as described above, the gaming state is maintained when a small win occurs, so the number of consecutive time-saving times can be accurately counted by updating the number of times when the gaming state is switched. However, due to the diversification of gaming specifications, the condition for switching the gaming state is not always limited to the end of the special gaming state, and the above-mentioned procedure may not be able to accurately count the number of times when the time-saving times are consecutive.

For example, in gaming machines that open the large prize opening to allow entry when a small prize is won, and where a player can expect to win a prize ball, the machine transitions to a non-time-saving state when a small prize is won, preventing the awarded game value from falling outside a specified range. In gaming machines with such specifications, the number of consecutive time-saving times is cleared when the machine transitions to the non-time-saving state, so the method of updating the number of consecutive time-saving times described above cannot accurately count the number of consecutive time-saving times. Below, the procedure for accurately counting the number of consecutive time-saving times in a gaming machine with the above specifications will be explained with reference to Figures 484 and 485. Note that the machine transitions to the non-time-saving state when a small prize is won, but the number of consecutive time-saving times is cleared after the special game state due to the small prize ends.

Figure 484 is a timing chart that explains the timing for updating the number of consecutive time-saving times in a gaming machine that transitions to a non-time-saving state (normal gaming state) when a small jackpot is won, and shows a case in which the gaming ball does not pass through a specific area when a small jackpot is won.

Figure 484 shows behavior in chronological order from a state where gameplay is continuing in a non-time-saving state. The number of times time-saving continues is set to an initial value (0), and when a transition is made to a time-saving state, 1 is added to the number of times time-saving continues. On the other hand, when a transition is made to a non-time-saving state, the number of consecutive times time-saving is cleared and set to the initial value (0). The control executed from time t51 to time t56 in Figure 484 is the same as the control executed from time t41 to time t46 in Figure 483, and therefore explanations will be omitted as necessary.

As shown in FIG. 484, at time t56, the display of the special symbol stops changing, and as a result of the display changing, a small win is won. If a small win is won, the condition device is not activated, and the time-saving state transitions to a non-time-saving state.

At time t57, a special game state (first special game state) occurs due to a small win, which opens the large prize opening, allowing the game ball to enter the large prize opening. At this time, if the game ball passes through a specific area (V area) located inside the large prize opening, a big win is won. However, in the example shown in FIG. 484, the game ball does not pass through the specific area, and after the special game state due to a small win ends, the number of consecutive time-saving turns is cleared (initialized), and the game transitions to the normal game state (time t58).

Next, a case where the gaming ball passes through a specific area (V area) located inside the large prize opening after winning a small jackpot and a jackpot is won will be described. Figure 485 is a timing chart explaining the timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and is a diagram showing a case where the gaming ball passes through a specific area after winning a small jackpot. The control executed from time t61 to time t67 in Figure 485 is the same as the control executed from time t51 to time t57 in Figure 484, so the explanation will be omitted as appropriate.

At time t67, a special game state is generated by the winning of a small jackpot, the large prize opening is opened, and the game ball can enter. Furthermore, when the game ball passes through a specific area arranged inside the large prize opening, the winning of a jackpot is confirmed and the condition device is activated (time t68). Furthermore, the special game state resulting from the winning of a small jackpot ends and a special game state resulting from the winning of a jackpot begins. At this time, the game transitions to a non-time-saving state, so the number of consecutive time-saving times is cleared (initialized) at the timing when the special game state resulting from the winning of a small jackpot ends.

Then, with the end of the special game state due to the jackpot, the operation of the condition device ends and a new time-saving state starts (time t69). At this time, the number of consecutive time-saving periods is updated from 0 to 1 based on the start of the new time-saving state.

[34-4. How to update the number of consecutive time-saving times (third embodiment: specification for transitioning to non-time-saving state when a small win is won: improved)]
By the way, when a jackpot is won by the variation of special symbol 1 and the time-saving state is entered, and when a small jackpot is won by the variation of special symbol 2 and the game ball passes through a specific area (V area) and the time-saving state is entered, it is natural to consider that the time-saving state has occurred continuously even if the time-saving state is temporarily entered. In other words, in the gaming machine of this embodiment, even if the time-saving state is temporarily entered via a small jackpot, the time-saving state is considered to have occurred continuously even if the time-saving state is temporarily entered via a small jackpot and the game ball passes through a specific area in the special gaming state due to the small jackpot, and the time-saving state is entered again due to the jackpot being won.

However, if the number of consecutive time-saving cycles is updated using the procedure described above, the number of consecutive time-saving cycles will be initialized when a small jackpot is won, as the game will transition to a non-time-saving state, making it impossible to determine that the time-saving state has occurred consecutively.

The gaming machine of this embodiment is configured to set an upper limit (limit) on the number of consecutive time-saving cycles, making it easier to transition to the time-saving state if the number of consecutive time-saving cycles is below the upper limit. However, if the number of consecutive time-saving cycles is unintentionally initialized, there is a risk that the time-saving state will occur more frequently than expected, resulting in a problem of more game value being awarded. Therefore, we propose an improved method for updating the number of consecutive time-saving cycles to solve the above-mentioned problem.

In the improved update method, a decision is made as to whether or not to update the number of consecutive time-saving times when the special game state ends, and the number of consecutive time-saving times is updated if a predetermined condition is met. Specifically, the decision as to whether or not to update the number of consecutive time-saving times is made based on whether or not the condition device is operating when the special game state ends.

When a game ball passes through a specific area while the special game state due to a small win continues, a big win is confirmed and the condition device is activated. In this case, the special game state due to a small win ends and the special game state due to a big win begins (the special game state due to a small win switches to the special game state due to a big win), and there is a possibility that the time-saving state will be entered after the special game state ends. Therefore, the update of the number of consecutive time-saving times at the end of the special game state due to a small win is suspended (the value of the number of consecutive time-saving times is maintained). Then, after the special game state due to a big win ends, the number of consecutive time-saving times is added (updated) or cleared (initialized) based on whether or not the time-saving state will be entered after the special game state due to a small win ends. On the other hand, if the game ball does not pass through the specific area while the special game state due to a small win continues, the condition device will not be activated, so the number of consecutive time-saving times is cleared (initialized) at the end of the special game state due to a small win.

By configuring it in this way, if there is a possibility of re-entering the time-saving state after the special game state ends, the clearing (initialization) of the number of consecutive time-saving times is put on hold, and an accurate value can be set for the number of consecutive time-saving times by updating or initializing the number of consecutive time-saving times when the special game state ends. Below, we will chronologically explain the cases where the number of consecutive time-saving times is cleared without the game ball passing through a specific area, and the case where the number of consecutive time-saving times is updated to increase by the game ball passing through a specific area, with reference to the timing chart.

In addition, if the game ball does not pass through the specific area when a small jackpot is won, the time-saving update count is initialized (cleared) after the special game state due to the small jackpot win ends, and even if the improved update method is applied, the behavior will be the same as the timing chart shown in Figure 484, so illustration is omitted.

Figure 486 is a timing chart showing an improved timing for updating the number of consecutive time-saving plays in a gaming machine that transitions to a non-time-saving state when a small jackpot is won, and shows a case where a gaming ball passes through a specific area when a small jackpot is won. The control executed from time t71 to time t75 in Figure 486 is the same as the control executed from time t61 to time t65 in Figure 485, so a description thereof will be omitted.

At time t76, as in the example shown in FIG. 485, the pattern change stops and a small win is won. Furthermore, the time-saving state transitions to a non-time-saving state, and at time t77, a special game state occurs due to the small win, the large prize opening is opened, and the game ball can win. Furthermore, while the special game state due to the small win continues, the game ball passes through a specific area located inside the large prize opening, confirming that a big win has been won and the condition device is activated (time t78). At this time, the special game state due to the small win ends and the special game state due to the big win begins.

In the improved method of updating the number of consecutive time-saving times, a determination is made as to whether or not to update (maintain) the number of consecutive time-saving times when the special game state resulting from a small win ends. Whether or not to update the number of consecutive time-saving times is determined based on whether or not a special game state resulting from a big win starts when the special game state resulting from a small win ends. At this time, it may also be determined based on whether or not a condition device is activated when the special game state resulting from a small win ends. In the example shown in FIG. 486, a big win is won when the game ball passes through a specific area, and the condition device is activated, so it is determined that the special game state will occur continuously, and the number of consecutive time-saving times is not updated and the value is maintained as is.

Then, with the end of the special game state due to a big win, the operation of the condition device ends and a new time-saving state starts (time t79). At this time, the number of consecutive time-saving times is 1 because the value was maintained when the special game state due to a small win ended, and is updated to 2 because the new time-saving state has started. Note that if the time-saving state is not transitioned to after the special game state ends, for example, if the number of consecutive time-saving times reaches the upper limit and the game transitions to the normal game state without transitioning to the time-saving state, the number of consecutive time-saving times is cleared (initialized) and the value of the number of consecutive time-saving times is updated to 0.

As described above, in the gaming machine of this embodiment, if a big jackpot is not won during a special game state resulting from a small jackpot, the special game state is not continued (the condition device is not activated), and an update is performed to initialize the number of consecutive time-saving times. On the other hand, if a big jackpot is won during a special game state resulting from a small jackpot, the special game state continues at the end of the special game state resulting from a small jackpot, and the condition device is activated, so the number of consecutive time-saving times is maintained without being updated (initialized), and at the end of the special game state resulting from a big jackpot (when the operation of the condition device is finished), the number of consecutive time-saving times is updated based on the game state after the end of the special game state. This allows the number of consecutive time-saving times to be counted accurately as intended by the designer, making it possible to award game value as expected, and solving the above-mentioned problems.

In addition, in the control shown in Figures 484 and 485, the number of consecutive time-saving times was updated at the timing when the special game state ended, based on whether or not the time-saving state transitioned to a non-time-saving state. Therefore, if the specifications were such that the time-saving state transitioned to a non-time-saving state after the special game state due to a small win ended, the number of consecutive time-saving times would be cleared even if the game ball passed through a specific area in the special game state due to a small win and switched to a special game state due to a big win.

In response to this, in the improved method of updating the number of consecutive time-saving times shown in FIG. 486, if the special game state switches and continues at the timing when the special game state ends, the number of consecutive time-saving times is not updated, but if the special game state does not continue, the number of consecutive time-saving times is updated based on whether or not the time-saving state transitions from the time-saving state to a non-time-saving state. This makes it possible to initialize or update the number of consecutive time-saving times when the special game state due to a small win ends, while clearing the number of consecutive time-saving times if the special game state due to a small win ends as it is, thereby solving the above-mentioned problem.

In addition, in the special game state due to a small win, if the game ball passes through a specific area and switches to a special game state due to a big win, the small win ending is not executed. Therefore, in this case, the large prize opening end interval process executed at the end of the special game state due to a small win is not executed, and the large prize opening pre-opening interval process for starting the special game state due to a big win is executed. Therefore, by updating the number of consecutive time-saving times (clearing (initialization) or updating (addition, subtraction)) in the large prize opening end interval process, it is possible to standardize the process regardless of the type of win. In addition, the large prize opening end interval process may be different for the case of a big win and the case of a small win, and in this case, it is possible to standardize the process by making the process of updating the number of consecutive time-saving times a subroutine. By configuring it as described above, it is possible to suppress the complexity of the game control while compressing the program capacity, simplify the program code, and improve the development efficiency of the game machine (game control program).

[34-5. Method for updating the number of consecutive time-saving times (fourth embodiment: transition to a non-time-saving state when a small win is won, and start of a special game state due to a big win after the special game state due to a small win ends)]
Next, a procedure for updating the number of consecutive time-saving times will be described in a gaming machine which, unlike the control shown in FIG. 486, does not immediately start a special game state resulting from a big win even if a gaming ball passes through a specific area while a special game state resulting from a small win is continuing, but starts a special game state resulting from a big win after the special game state resulting from a small win has ended.

Figure 487 is a timing chart that explains the operation when a game ball passes through a specific area when a small win is won in a gaming machine that transitions to a non-time-saving state when a small win is won, and starts a special game state due to a big win after the special game state due to the small win ends. The control executed from time t81 to time t88 in Figure 487 is the same as the control executed from time t71 to time t78 in Figure 486, so the explanation will be omitted as necessary.

At time t87, a special game state due to a small win is initiated. In the gaming machine of this embodiment, the game ball can pass through the specific area while the special game state due to a small win continues, but unlike the above-described embodiments 1 to 3, the special game state due to a small win continues even after the game ball passes through the specific area.

Furthermore, when the game ball passes through the specific area during a specified valid period (while the special game state resulting from the winning of a small win continues) (time t88), a specific area passing flag (V passing flag) is set. After that, the special game state resulting from the winning of a small win ends.

The large prize opening end interval process, which is executed when the special game state due to a small prize win ends, compares the number of prizes won in the large prize opening with the number of balls discharged from the large prize opening to determine whether a malfunction or fraud has occurred. Note that since there may be a time lag between when the game balls enter the large prize opening and when they are discharged, the determination is made after waiting for a certain period of time. If the number of prizes won and the number of balls discharged do not match, regardless of whether the specific area passage flag is set or not, the special game state due to the small prize win ends, and an alarm sound is output or a signal is output to the outside as necessary. At this time, the number of consecutive time-saving times is cleared.

If the number of winnings and the number of payouts match and no malfunctions or fraudulent activity have occurred, it is determined whether the specific area passing flag has been set. If the specific area passing flag has not been set, the number of consecutive time-saving times is cleared, the special game state due to the small win is ended, and the game transitions to the normal game state while continuing in the non-time-saving state. In this case, the behavior will be the same as the timing chart shown in Figure 484.

On the other hand, if the specific area passage flag is set, the special game state resulting from the winning of a small win is ended (time t89). At this time, the number of consecutive time-saving wins is not updated and the value is maintained as is. Furthermore, the special game state resulting from the winning of a big win is started, and the condition device is activated (time t90).

Then, with the end of the special game state due to a big win, the operation of the condition device ends and a new time-saving state begins (time t91). At this time, the number of consecutive time-saving times is 1 because the value was maintained when the special game state ended due to a small win, and is updated to 2 by adding 1 based on the start of a new time-saving state. Note that if the time-saving state is not entered after the special game state ends, the number of consecutive time-saving times is cleared (initialized) and the value of the number of consecutive time-saving times is updated to 0. The processing at time t91 is the same as the processing executed when the special game state ends at time t79 in FIG. 486.

In the fourth embodiment, if the occurrence of a jackpot is confirmed by the specific area passing flag, the number of consecutive time-saving times is maintained. Furthermore, the number of consecutive time-saving times is updated based on whether or not the game transitions to a time-saving state when the special game state resulting from the winning of a jackpot ends. By controlling in this way based on the specific area passing flag, the aforementioned problems can be solved, as with the gaming machine of the third embodiment.

[34-6. Configuration of the gaming machine according to this embodiment]
To summarize the configuration of a gaming machine that implements the above-described improved update method for the number of consecutive time-saving bets, in the gaming machine of this embodiment, a lottery is executed when a gaming ball enters a start winning hole, and the variable display of special symbols is started based on the result of the lottery, and a special gaming state can be generated based on the result. The special gaming state is generated according to the result of the lottery, and there are, for example, a special gaming state (first special gaming state) resulting from a small win and a special gaming state (second special gaming state) resulting from a big win.

In addition, while the first special game state (small win) is occurring, the game ball can pass through a specific area, and when the game ball passes through, the second special game state (jackpot) can occur. Furthermore, after the special game state (second special game state) ends due to a jackpot win, a time-saving state (advantageous game state) that is more advantageous to the player than the normal game state can occur.

In the gaming machine of this embodiment, the number of consecutive time-saving occurrences (consecutive occurrences) that indicates the number of times the time-saving state (advantageous gaming state) has occurred consecutively is recorded, and if a small win is won (a first special gaming state occurs) while the time-saving state (advantageous gaming state) is occurring, the machine transitions from the time-saving state (advantageous gaming state) to a non-time-saving state (normal gaming state) when the display of the special symbol that generates the small win starts to change or when the special gaming state begins.

In addition, the number of consecutive time-saving times is not updated when the game transitions from a time-saving state (advantageous play state) to a non-time-saving state (normal play state), but rather maintains the value it had before the game transitioned to the non-time-saving state.

If the number of consecutive time-saving times does not reach a specified upper limit (specified conditions are met), the number of consecutive time-saving times is updated (added or subtracted) at the end of the special game state after transitioning from the time-saving state (advantageous game state) to the non-time-saving state (normal game state).

When the number of consecutive time-saving times reaches the upper limit (when a specific condition is met), the number of consecutive time-saving times is initialized without being added or subtracted at the timing when the special game state after transitioning from the advantageous game state to the normal game state ends. At this time, after the special game state ends after transitioning from the time-saving state (advantageous game state) to the non-time-saving state (normal game state), the game does not transition to the time-saving state (advantageous game state), but maintains the non-time-saving state (normal game state) as it is.

In addition, if the game ball does not pass through a specific area during a special game state resulting from a small win and a big win is not won, the number of consecutive time-saving times may be initialized without comparing it with the upper limit value.

[34-7. Method for updating the number of consecutive time-saving times (variation example)]
The method for updating the number of times of continuous time-saving in the gaming machine of this embodiment has been described above. Next, a modified example in which the variation time of the special symbol is made different according to the number of times of continuous time-saving (remaining limit number) will be described. In the example described here, the upper limit of the number of times of continuous time-saving is set to 10 times, and the types of variation time of the special symbol are three types. The variation time of the special symbol is defined by a variation pattern table, and three types of variation pattern tables are defined in this modified example.

Figure 487 is a diagram explaining the types of variation pattern tables that are set when the special symbol variation display of the gaming machine of this embodiment is performed. The example shown in Figure 487 shows the variation time when each variation pattern table misses, and is the shortest variation time that does not result in any effects such as a reach.

Referring to FIG. 487, in the case of pattern fluctuation based on fluctuation pattern table A, when the fluctuation pattern that results in the shortest time for shortened fluctuation is selected, the fluctuation time is 5,000 seconds. Similarly, in the case of pattern fluctuation based on fluctuation pattern table B, the fluctuation time is 1,000 seconds, and in the case of pattern fluctuation based on fluctuation pattern table C, the fluctuation time is 3,000 seconds.

The variation pattern table may be selected based on the game state, etc. For example, in the time-saving state, variation pattern table B with the shortest variation time is selected, in the normal game state, variation pattern table C with an intermediate variation time is selected, and in a specific presentation mode or game state, variation pattern table A with the longest variation time is selected.

Here, we will explain the specification where the variation pattern table is selected not based on the game status, but based on the remaining number of times until the upper limit at which the time-saving state can be continuously generated. Figure 488 shows an example of a pattern where the variation pattern table is selected based on the remaining number of times until the upper limit at which the time-saving state can be continuously generated.

In the example shown in Figure 488, the following patterns are defined: pattern 1, which selects the same fluctuation pattern table regardless of the remaining number of times; pattern 2, which selects a fluctuation pattern table with a shorter fluctuation time in the event of a miss the more the remaining number of times; and pattern 3, which selects a fluctuation pattern table with a shorter fluctuation time in the event of a miss the fewer the remaining number of times.

In pattern 1, when transitioning to the time-saving state, the same fluctuation pattern table is always selected. Therefore, it is possible to stably continue a common game in the time-saving state. Also, by setting a fluctuation pattern table different from that in the non-time-saving state (for example, fluctuation pattern table C), it is possible to provide a different game and increase interest. In the example shown in FIG. 488, the fluctuation pattern table with the longest fluctuation time at the time of a miss is selected, so that the period of heightened anticipation can be continued for a long period of time. Furthermore, because the same fluctuation pattern table is selected, it is possible to simplify game control in the time-saving state.

In addition, in pattern 1, the same fluctuation pattern table needs to be selected regardless of the remaining number of times, and it does not have to be pattern table A, but may be pattern table B or pattern table C. In this way, by selecting a fluctuation pattern table with a short fluctuation time, the game can be progressed at a good tempo, thereby increasing the interest of the game.

In pattern 2, the more remaining plays there are, the shorter the fluctuation pattern table that is selected for a miss. Therefore, in the early stages of successive occurrences of the time-saving state, the next time-saving state occurs at short intervals, further increasing the player's anticipation, and as the upper limit is approached, the fluctuation time becomes longer, allowing the player's state of heightened anticipation to be maintained for a long time.

In pattern 3, the fewer the remaining number of times, the shorter the fluctuation time at the time of failure is selected, so that the player's expectations are gradually increased by lengthening the fluctuation time in the early stages of the continuous occurrence of the time-saving state, and the player's expectations are increased all at once by shortening the fluctuation time as the upper limit is approached. In pattern 3-1 shown in FIG. 488, the fluctuation pattern table is selected so that the fluctuation time gradually increases from the early stage to the final stage. In pattern 3-2, after selecting fluctuation pattern table A with a long fluctuation time, fluctuation pattern table B with a short fluctuation time is selected in succession. Furthermore, fluctuation pattern table A is selected again, and fluctuation pattern tables with gradually shorter fluctuation times are selected. In patterns 3-3 and 3-4, fluctuation pattern table A with a long fluctuation time is selected first, and fluctuation pattern table C with a short fluctuation time is selected last. In the intermediate stages, fluctuation pattern tables with different fluctuation times are selected to realize a game with a lot of variety, and the interest of the game is increased.

[34-8. Method for detecting fraudulent winnings]
Next, an example of the detection means for detecting illegal winning in the gaming machine of this embodiment will be described. In the illegal winning detection method described in FIG. 477 etc., in the case of the first win, the illegality is judged based on the total number of winning balls into the big winning hole in a plurality of special game states, while in the case of the second win, the illegality is judged based on the number of winning balls into the big winning hole in one special game state.

Here, when the time-saving state occurs continuously, the fraud is judged based on the total number of game balls entering the large prize opening in multiple special game states (first fraudulent prize judgment means), and when a single big win or small win occurs, the fraud is judged based on the number of game balls entering the large prize opening in one special game state (second fraudulent prize judgment means). In other words, the fraudulent prize detection method described above is applied by treating a big win or small win during the continuous occurrence of the time-saving state as the first win, and a single big win or small win as the second win.

Furthermore, the first fraudulent winning determination means may determine whether or not a prize has been awarded illegally only when the number of consecutive time-saving times has reached an upper limit. On the other hand, a determination value may be set based on the number of consecutive time-saving times each time a time-saving state occurs (a special game state ends) to determine whether or not a prize has been awarded illegally. This makes it possible to determine whether or not a prize has been awarded illegally depending on the progress of the game, thereby improving the accuracy of determining whether or not a prize has been awarded illegally.

The determination of an illegal winning is performed in the large prize opening end interval process executed at the end of the special game state. Therefore, when determining an illegal winning based on the total number of winning balls in the large prize opening in the special game state until the number of consecutive time-saving times reaches the upper limit, the determination is performed in the large prize opening end interval process executed at the end of the last special game state (when the number of consecutive time-saving times reaches the upper limit), and the determination is not performed in the large prize opening end interval process executed before this. On the other hand, when determining an illegal winning by setting a determination value based on the number of consecutive time-saving times each time a time-saving state occurs (the special game state ends), the illegal winning is determined in the large prize opening end interval process executed at the end of the special game state until the number of consecutive time-saving times reaches the upper limit.

In addition, the timing for determining whether or not an illegal win has occurred may be when the number of consecutive time-saving states is cleared. By limiting it to cases where a time-saving state that allows for a large number of winning balls occurs consecutively, the frequency with which illegal wins are detected can be reduced, making it possible to prevent excessive prize balls from being paid out due to illegal activity while suppressing an increase in processing load.

Furthermore, when determining whether or not an illegal win has occurred by setting a judgment value based on the number of consecutive time-saving times each time a time-saving state occurs (a special game state ends), the judgment value may be set before the judgment, or the judgment value for the next judgment may be set after the judgment. When setting a judgment value for the next judgment, it is necessary to initialize the judgment value before making the first judgment; for example, the judgment value may be initialized at the same time as the number of consecutive time-saving times is initialized.

In addition, even if the game ball does not pass through the specific area before the number of consecutive time-saving cycles reaches the upper limit and a jackpot is not won, if the judgment value is set immediately before the judgment, there is no need to initialize the judgment value at this timing. On the other hand, if the judgment value for the next judgment is set after the judgment, the judgment value for the first judgment can be set, or the judgment value can be initialized when the time-saving state first occurs.

The judgment value for an illegal win is defined according to the type of special game state. For example, a value corresponding to a special game state resulting from a small win and a value corresponding to a special game state resulting from a big win are defined. When there are many types of special game states, a table for storing the judgment values may be defined in advance, or the judgment values may be calculated based on the opening time of the big win opening. Furthermore, when judging an illegal win based on the number of consecutive time-saving times, the judgment value may be calculated based on the number of consecutive time-saving times, or a table may be provided in which values corresponding to the number of consecutive time-saving times are defined.

The first and second fraudulent winning determination means may be used in combination. For example, the second fraudulent winning determination means may determine a fraudulent winning every time a special game state occurs, while when the number of consecutive time-saving times reaches an upper limit, the first fraudulent winning determination means may determine a fraudulent winning based on the total number of wins since the consecutive time-saving times began.

In addition, while the second fraudulent winning determination means determines whether or not a fraudulent winning has occurred each time a special game state occurs, the first fraudulent winning determination means may determine whether or not a fraudulent winning has occurred each time a special game state occurs based on the total number of wins since the start of the continuous occurrence of the time-saving state.

When the second illegal winning judgment means judges illegal winning, for example, the judgment value in one special game state is set to 20. At this time, the judgment value in the first illegal winning judgment means is 1 x 20, which is 20 when the number of consecutive time-saving times is 1, and 5 x 20, which is 100 when the number of consecutive time-saving times is 5. In this case, when the number of consecutive time-saving times is 4 and the total number of winnings is 76, if the number of winnings in the fifth special game state is 21, the second illegal winning judgment means judges illegal winning, but since the total number of winnings is 97, it is not judged as illegal winning (judgment value is 5 x 20 = 100). In this case, if both the first illegal winning judgment means and the second illegal winning judgment means judge illegal winning, it may not be judged as illegal. This is because the prize balls paid out as a result are within the expected range, so there is no damage to the game center, and it is sometimes desirable to proceed with the game smoothly.

[35. Lottery Execution Control]
The above describes the update of the number of consecutive time-saving times. Next, the control during lottery execution in the gaming machine of this embodiment will be described. For example, the control of the special lottery executed based on the random number value (start memory, reserved memory) acquired when the game ball enters the start hole will be described. As described above, when the special lottery is won, a special game state is generated. At this time, in the special lottery, not only is it determined which of the lottery results, "big win", "small win", or "miss", but also the mode (number of rounds, etc.) of the special game state to be generated when the big win (or small win) is won, the game state to be transitioned to after the special game state ends, and the variation pattern when the special pattern is displayed are also drawn.

[35-1. Types of random numbers]
The special lottery is executed based on a random number value (start memory) acquired when a predetermined condition is met (for example, when a gaming ball enters a start hole), and in the gaming machine of this embodiment, the random number value is generated by a hardware random number generating circuit built into the main control MPU 1311. Also, the range of random number values generated varies depending on the lottery object, and will be explained with reference to a specific example in FIG. 490. It is not necessary to limit the generation of random numbers to hardware random numbers, and they may be software random numbers generated by executing a program.

Figure 490 shows an example of the type of random numbers and the range of random number values obtained when the gaming ball enters the starting hole. In the example shown in Figure 490, a random number for determining a jackpot, a random number for determining a reach, a random number for a variation pattern, a random number for a variation type, and a random number for a special symbol are included.

The random number for determining a jackpot is a random number used to determine whether the result of the special lottery is a "jackpot," "minor win," or "miss." A 2-byte area is assigned to the random number for determining a jackpot, and it can store values from 0 to 65535.

The special lottery in the gaming machine of this embodiment acquires a random number for determining a jackpot and determines whether the acquired random number value is within a predetermined range. Also, as mentioned above, this predetermined range differs depending on the settings of the gaming machine.

Figure 491 is a diagram showing an example of the range in which the result of a special lottery for each setting value of a gaming machine will be a jackpot. In the gaming machine of this embodiment, as shown in Figure 491, thresholds (upper and lower limits) are defined corresponding to the game state (high probability, low probability) and setting value (1 to 6). In addition, by setting the upper limit to a common value (63534), the memory capacity required to store the thresholds is reduced. Also, as shown in Figure 491, it is set so that the possibility of winning a jackpot is higher when the setting value is 6 than when the setting value is 1.

In the gaming machine of this embodiment, the upper limit for the random numbers generated is 63534, but for random numbers used to determine a jackpot, it is desirable to set the upper limit to 65535 so that all values in the two bytes are within the generation range, so that values outside the generation range are not generated.

The reach determination random number is a random number used to determine whether or not a reach will occur, and is assigned a 1-byte area in which a value between 0 and 255 can be stored. The variation pattern random number and variation type random number are random numbers used to determine the variation pattern for displaying the special symbol in a variable manner. These random numbers are assigned a 1-byte area in which a value between 0 and 255 can be stored, but the generation range of the variation pattern random number is 0 to 149.

The special pattern random number is a random number used to determine the type of jackpot (the nature of the special game state, the game state after the special game state ends, etc.) if a jackpot is won as a result of a special lottery. A 1-byte area is assigned to the special pattern random number, and values from 0 to 255 can be stored, but the random number generation range is 0 to 199. This is to obtain the special pattern number that corresponds to the result of the special lottery, and the special pattern number can specify not only the result of a jackpot, small jackpot, or miss, but also the type of jackpot or small jackpot.

When random numbers cannot be generated normally due to a malfunction of the random number generating circuit, for example, the generated random number may always be a specific value, or the random number may not be obtained normally and the obtained random number may be a specific value when the random number is obtained. In such a case, since the specific value is likely to be 0, it is advisable to set the lottery contents so that it is less likely to affect the game when various random numbers become 0. For example, the winning range is set so that when the random number for jackpot determination is 0, it will always be a miss. Also, when a jackpot is reached, if the random number for special patterns is 0, it is confirmed that it will be a jackpot, so the jackpot pattern type that is least disadvantageous to the player is selected. Furthermore, when the random number for jackpot determination is 0, if the random number for reach determination is 0, a non-reach is selected, and if the random numbers for the variation patterns are selected, a variation pattern is selected so that the variation time is the shortest. This allows games affected by noise to be quickly ended, improving the stability of the game.

In addition, the gaming machine of this embodiment mainly uses random numbers generated by a hardware random number generation circuit (hardware random numbers), but as mentioned above, some or all of the generated random numbers may be software random numbers generated by executing a program.

Furthermore, the means of generation may differ depending on the type of random number. For example, the random numbers used in the lottery for special symbols may be generated by a hardware random number generation circuit, while the random numbers used in the lottery for normal symbols may be software random numbers generated by a program. Also, random numbers related to the outcome of the lottery (for example, random numbers for determining a jackpot) may be hardware random numbers, while random numbers related only to the changing display of symbols (for example, random numbers for changing patterns) may be software random numbers.

[35-2. Lottery-related control]
Next, the control for executing the special lottery will be described. As described above, the special lottery is executed based on the random number value obtained when a predetermined condition is met (when the game ball enters the starting hole), but first, the process executed in advance to generate the random number will be described, and then the process for actually executing the lottery after the random number is obtained will be described.

[35-2-1. Preparation for random number generation]
The random numbers used in the special lottery are initially set in the power-on process (FIG. 382) that is executed when the power is turned on. Specifically, in the random number setting startup process of step 02TK0050, the hardware random number generation circuit built into the main control MPU 1311 is started. Furthermore, the maximum value of the random numbers to be generated (random number generation range) is set. The random number generation range is stored in a register that corresponds to whether the random number value is 8 bits (1 byte) or 16 bits (2 bytes), and whether it is variable length or fixed length. Also, it is not necessary to specify all random number generation ranges in the random number setting startup process, and they may be set when the random numbers are obtained.

[35-2-2. Special lottery related processing]
As described above, the special lottery is executed when various random numbers (reserved memory) are acquired when a predetermined condition is met (when a game ball enters the starting hole), and when the variable display of the special symbol based on the reserved memory starts. Below, the determination of whether the result of the special lottery is a jackpot or not (random numbers for jackpot determination), the determination of the special game state generated by winning the jackpot and the game state after the special game state ends (random numbers for special symbols), and the determination of the mode of the variable display of the special symbol (random numbers for variable patterns, etc.) will be explained.

In the gaming machine of this embodiment, the special lottery is executed in the special symbol determination process. The special symbol determination process is called from the special symbol/flag setting process of the special symbol change waiting process. The special symbol change waiting process is a process executed when the special symbol starts to change, and is called from the special symbol/special electric device control process (step 01TKS0080) executed from the playable time process (Fig. 354) of the timer interrupt process (Fig. 329). The timer interrupt process (Fig. 329) and the playable time process (Fig. 354) have been described above, so their explanation is omitted. Regarding the processing after the special symbol/special electric device control process, the processing up to the execution of the special lottery and the processing for executing various lotteries will be explained.

[35-2-2a. Processing before executing special lottery]
(Special symbols and special electric device control processing)
First, the special symbol/special electric accessory control process will be described as the process before the special lottery is executed. In the special symbol/special electric accessory control process, when the game ball enters the start hole, various random numbers (reserved memory, start memory) are acquired and a process according to the current progress of the game is executed. Each process will be specifically described below.

Figure 492 is a flowchart showing the procedure for special symbol/special electric device control processing in the gaming machine of this embodiment.

When the special symbol/special electric device control process is executed, the main control MPU 1311 first determines whether or not the game ball has entered the first start hole 2002 (step 08TKS0110). If the game ball has entered the first start hole 2002 (the result of step 08TKS0110 is "Yes"), the start hole entry process is executed, various random numbers (reserved memory, start memory) are obtained, and stored in a specified area (step 08TKS0120).

Next, if the game ball has not entered the first start port 2002 (the result of step 08TKS0110 is "No") or if the execution of the start port entry process associated with the entry into the first start port 2002 has been completed, the main control MPU 1311 determines whether the game ball has entered the second start port 2004 (step 08TKS0130). If the game ball has entered the second start port 2004 (the result of step 08TKS0130 is "Yes"), the main control MPU 1311 executes the start port entry process in the same way as in the case of the entry into the first start port 2002, obtains various random numbers (reserved memory, start memory), and stores them in a specified area (step 08TKS0140).

When the process related to winning at the start port is completed, the main control MPU 1311 executes a process according to the progress of the game (steps 08TKS0210 to 08TKS0290). The progress of the game is specified by the special symbol/electric device operation state number, and is updated with each process. To be more specific, when there is no reserved memory (start memory) (waiting for customers state), the special symbol/electric device operation state number is TZ_IDOL, and in this case, the main control MPU 1311 executes a process to wait for a change in the special symbol (step 08TKS0210). The special symbol/electric device operation state number at the start of the game is set to TZ_IDOL.

The special symbol change waiting process is executed until the game ball enters the start hole, and when the game ball enters the start hole, various random numbers (reserved memory, start memory) are obtained. Furthermore, by updating the special symbol/electric device operation state number to TZ_HEND, the next time the special symbol/special electric device control process is executed, a special symbol change in progress process is executed to display the change in the special symbol. Details of the special symbol change waiting process will be described later in FIG. 493.

When the special symbol/electric device operation state number becomes TZ_HEND, the main control MPU 1311 executes the special symbol change process (step 08TKS0220). The special symbol change process performs processes such as controlling the display of the special symbol changes. Specifically, when the special symbol change time has elapsed, the special symbol jackpot determination transition time setting process (not shown) is executed, a special symbol stop command is set, and the special symbol/electric device operation state number is updated to TZ_JUDG.

When the special symbol/electric device operation state number becomes TZ_JUDG, the main control MPU 1311 executes the special symbol jackpot determination process (step 08TKS0230). In the special symbol jackpot determination process, it is determined whether the fixed and stopped special symbol generates a special game state (jackpot game state), and the special symbol/electric device operation state number is updated to a value (TZ_HSTOP or TZ_ASTOP) corresponding to the result of the special lottery.

When the special symbol/electric device operation state number becomes TZ_HSTOP, the main control MPU 1311 executes the special symbol loss stop process (step 08TKS0240). In the special symbol loss stop process, if a special game state (jackpot game state) is not generated, the display of the special symbol changes is stopped and a notification of this is made, and the special symbol/electric device operation state number is updated to TZ_IDOL, and a special symbol change waiting process is executed.

When the special symbol/electric device operation state number becomes TZ_ASTOP, the main control MPU 1311 executes special symbol jackpot stop processing (step 08TKS0250). In the special symbol jackpot stop processing, when a jackpot game state is generated, processing is performed to stop the variable display of the special symbol and notify the fact. Furthermore, in order to open the jackpot opening by transitioning to the special game state (jackpot game state), the special symbol/electric device operation state number is updated to TD_FINT and interval processing before the jackpot opening is executed.

When the special symbol/electric device operation state number becomes TD_FINT, the main control MPU 1311 executes the interval processing before the large prize opening (step 08TKS0260). In the interval processing before the large prize opening, a special game state (large prize game state) is generated to notify the user that the large prize operation is about to begin, and the special symbol/electric device operation state number is updated to TD_OPEN, and the large prize opening processing is executed.

When the special symbol/electric device operation state number becomes TD_FOPEN, the main control MPU 1311 executes the large prize opening process (step 08TKS0270). In the large prize opening process, the large prize openings are opened to perform processes related to the large prize operation that makes it easier for game balls to enter each large prize opening, and the special symbol/electric device operation state number is updated to TD_CLOSE, and the large prize opening closed process is executed.

When the special symbol/electric device operation state number becomes TD_CLOSE, the main control MPU 1311 executes the large prize opening closed process (step 08TKS0280). In the large prize opening closed process, the large prize opening is changed from an open state to a closed state, so that the large prize opening is difficult for the game ball to enter, and other processes related to the large prize opening are performed, and the special symbol/electric device operation state number is updated to TD_CLOSE, and the large prize opening open end interval process is executed.

When the special symbol/electric device operation state number becomes TD_EINT, the main control MPU 1311 executes the large prize opening end interval process (step 08TKS0280). In the large prize opening closing process, when the large prize operation has ended, a process to notify that fact is performed. Furthermore, the game state after transition to the special game state (large prize game state) is set, and the special symbol/electric device operation state number is updated to TD_IDOL.

As described above, by updating the special symbols and electric device operation status numbers, processing can be performed according to the progress of the game.

(Special pattern change waiting process)
Next, the special symbol change waiting process will be explained as a process before the special lottery is executed. As described above, the special symbol change waiting process is executed until the game ball enters the start hole, and when the game ball enters the start hole, various random numbers (reserved memory, start memory) are obtained. The details of the special symbol change waiting process will be explained below.

Figure 493 is a flowchart showing the procedure for waiting for a special pattern change in the gaming machine of this embodiment.

When the special symbol change waiting process is started, the main control MPU 1311 judges whether the number of reserved special symbols for which the display of changing special symbols is pending is 0 (step 08TKS0310). If the number of reserved special symbols is 0 (the result of step 08TKS0310 is "Yes"), the special symbol cannot be displayed in a changing manner and the special lottery will not be executed, so this process ends.

If the number of reserved special patterns is not 0 (the result of step 08TKS0310 is "Yes"), i.e., if the variable display of a special pattern is reserved, the main control MPU 1311 determines whether the number of reserved special patterns 2 is 1 or more (step 08TKS0320).

In the gaming machine of this embodiment, the variable display by special symbol 2 takes priority over the variable display by special symbol 1, so if the reserved number of special symbol 2 is 1 or more (the result of step 08TKS0320 is "Yes"), the special symbol 2 variable setting data is set (step 08TKS0330) and settings are made to execute the variable display by special symbol 2. On the other hand, if the reserved number of special symbol 2 is not 1 or more (the result of step 08TKS0320 is "Yes"), that is, if the reserved number of special symbol 2 is 0 and the reserved number of special symbol 1 is 1 or more, the special symbol 1 variable setting data is set (step 08TKS0340) and settings are made to execute the variable display by special symbol 1.

The special symbol variation setting data is information for identifying whether the processing is to be executed for special symbol 1 or special symbol 2. That is, if the processing is to be executed for special symbol 1, special symbol 1 variation setting data is set, and if the processing is to be executed for special symbol 2, special symbol 2 variation setting data is set. In this way, by setting the special symbol variation setting data in advance, it is possible to refer to the work area and data table corresponding to the special symbol variation setting data for processing to be executed subsequently, making it possible to execute common processing for special symbol 1 and special symbol 2.

Next, the main control MPU 1311 sets a hold command at the start of the hold display change in order to update the hold display on the performance display device 1600 and reflect it in the performance (step 08TKS0350).

Next, the main control MPU 1311 executes the special symbol/flag setting process (step 08TKS0360). The special symbol/flag setting process executes a process for executing a special lottery, and a process for determining the winning symbol based on the lottery result if the special lottery is won, i.e., the mode of the special game state and the game state after the special game state ends. Details of the special symbol/flag setting process will be described later in FIG. 494.

When the result of the special lottery is derived by the special symbol/flag setting process, the main control MPU 1311 executes the special symbol change pattern setting process to set the correspondence of the special symbol change display (step 08TKS0370). Details of the special symbol change pattern setting process will be described later in FIG. 500.

Next, the main control MPU 1311 updates the reserved memory (step 08TKS0380). Specifically, for the area storing the reserved memory, it shifts the various random numbers stored and clears the various random numbers of the special symbols that will start the variable display. Furthermore, the main control MPU 1311 executes a special symbol variable transition setting process that sets the data required to start the variable display of the special symbols (step 08TKS0390). In the special symbol variable transition setting process, processing related to the variable display of the symbols, such as the change time of the special symbols, and processing related to the special symbol test signal that is output to the outside are performed.

Furthermore, the main control MPU 1311 sets various commands to be sent to the peripheral control board 1510 (step 08TKS0400). The various commands that are set include a status display count command, a special symbol change pattern command, a special symbol type command, and a change start status command.

Then, the main control MPU 1311 updates the special symbol reserved identification history (step 08TKS0410). The special symbol reserved identification history stores the history of information related to the variable display of special symbols in chronological order, for example, the type of reserved special symbol (special symbol 1 or special symbol 2). By setting special symbol 1 to "1" and special symbol 2 to "2" and storing "0" if no special symbol is reserved, it is possible to control the process to determine whether the special symbol reserved identification history is 0 at the start of the variation and to end the process if it is 0 (step 08TKS0310).

Finally, the main control MPU 1311 updates the special symbol/electric device operation status number from waiting for change (TZ_IDOL) to changing (TZ_HEND) (step 08TKS0420).

(Special symbol/flag setting process)
Finally, the special symbol/flag setting process (step 08TKS0360) will be described as a process leading up to the execution of the special lottery. Fig. 494 is a flow chart showing the procedure of the special symbol/flag setting process in the gaming machine of this embodiment.

When the special symbol/flag setting process is executed, the main control MPU 1311 first obtains various random numbers (reserved memory) that are the subject of the special lottery and stores them in the start memory area (area for storing reserved memory that starts the variable display of special symbols) (step 08TKS0510).

Next, the main control MPU 1311 executes a special symbol determination process to determine the result of the special lottery (step 08TKS0520). In the special symbol determination process, it is determined whether the result of the special lottery is a big win, a small win, or a miss based on the big win determination random number from among the various random numbers stored in the start memory area. Furthermore, a special symbol number (big win symbol number) is drawn based on the special symbol random number.

Then, the main control MPU 1311 executes a stop pattern/flag setting process to set the stop pattern of the special pattern that is displayed in a variable manner (step 08TKS0530). Finally, it executes a special pattern conversion process to convert the special pattern number into a pattern information value (step 08TKS0540).

[35-2-2b. Processing for executing various lotteries]
Above, the process up to executing various lotteries has been explained. Next, the procedure for actually performing the lottery will be explained. Here, the special symbol determination process for determining the big win and drawing the stop symbols (special symbols, big win symbols) and the special symbol change pattern setting process (change pattern selection determination process) for drawing the change pattern of the special symbol change display will be explained.

(Special pattern determination process)
Figure 495 is a flowchart showing the steps of the special pattern determination process of the gaming machine of this embodiment.

The main control MPU 1311 first obtains a random number for determining whether or not a jackpot has been won from the random number buffer for determining whether or not a jackpot has been won in the start memory area (step 08TKS0610). The setting value of the gaming machine is then obtained (step 08TKS0620). In the gaming machine of this embodiment, the setting value of the gaming machine can be set to a value between 1 and 6, and as shown in FIG. 491, the higher the setting value, the higher the probability of winning the special lottery. The main control MPU 1311 then obtains the gaming state (probability state) (step 08TKS0630). The gaming state (probability state) indicates whether the probability of winning the special lottery is high or low, and can be obtained, for example, based on the probability flag that is set when the probability is high.

Here, the main control MPU 1311 may determine whether the random number value for determining whether or not there is a jackpot is within the generation range. At this time, if the random number value for determining whether or not there is a jackpot is within the generation range, the processing from step 08TKS0640 onwards is executed. On the other hand, if the random number value for determining whether or not there is a jackpot is not within the generation range, the determination result is set to "miss" and the miss setting processing (step 08TKS0780) is executed.

Next, the main control MPU 1311 obtains the upper limit value for determining whether or not a jackpot has been determined (step 08TKS0640). In the gaming machine of this embodiment, whether or not the result of the special lottery is a jackpot is determined based on whether or not the value of the random number for determining whether or not a jackpot is between a predetermined lower limit value and the upper limit value. At this time, the upper limit value and the lower limit value may be stored in table format, or a reference value may be set and derived using a calculation formula. Also, one of the upper limit value or the lower limit value may be a fixed value. This makes it possible to reduce the memory capacity of the area that stores the threshold values (upper limit value, lower limit value) for determining whether or not a jackpot has been determined. In the gaming machine of this embodiment, the upper limit value is a common value, as shown in FIG. 490.

The main control MPU 1311 compares the random number for determining whether or not a jackpot is present with the upper limit value, and determines whether or not the random number for determining whether or not a jackpot is present with the upper limit value (step 08TKS0650). If the random number for determining whether or not a jackpot is present with the upper limit value (the result of step 08TKS0650 is "Yes"), the lower limit value for determining whether or not a jackpot is present is obtained (step 08TKS0660). Furthermore, the random number for determining whether or not a jackpot is present with the lower limit value, and determines whether or not the random number for determining whether or not a jackpot is present with the lower limit value (step 08TKS0670). If the random number for determining whether or not a jackpot is present with the lower limit value or above (the result of step 08TKS0670 is "Yes"), the result of the special lottery is a jackpot. The jackpot determination will be described in more detail below.

If the result of the special lottery is a jackpot, the main control MPU 1311 first sets a jackpot setting value (flag) (step 08TKS0680). It then sets special symbol determination data (step 08TKS0690) and stores the random number for the special symbol in a specified area (register) (step 08TKS0700).

Then, the main control MPU 1311 searches the special pattern determination data for a jackpot pattern type number (special pattern) based on the special pattern random number (step 08TKS0710). The special pattern determination data is structured in a table format having multiple records, with each record being a combination of a threshold value and a jackpot pattern type number. In searching for a jackpot pattern type number, the special pattern random number is compared with the threshold value to identify a jackpot pattern type number (pattern type number) that meets the conditions.

In this embodiment, the threshold is a lower limit, and the special symbol determination data is composed of a combination of the lower limit and the jackpot symbol type number. A specific search procedure will be described later. The threshold may be composed of only an upper limit. The threshold may also be composed of an upper limit and a lower limit, and the upper limit and lower limit values are compared in the same manner as in the case of jackpot determination. The process from step 08TKS0640, where the jackpot symbol type number is obtained, to step 08TKS0670 is referred to as the jackpot setting process.

Next, the main control MPU 1311 executes a type command setting process to set a type command based on the identified jackpot pattern type number (step 08TKS0720). Furthermore, a special pattern number (jackpot pattern number) is set (step 08TKS0730). The special pattern number (jackpot pattern number) is data to be converted into a pattern information value in a special pattern conversion process (not shown) described later. The special pattern number is determined based on the value of the special pattern random number. In the gaming machine of this embodiment, the special pattern random number is set to a value between 0 and 199, but by adding 1, it is corrected to a value between 1 and 200, and is set as the special pattern number (jackpot pattern number). Then, this process ends.

On the other hand, if the random number for determining a jackpot is greater than the upper limit (the result of step 08TKS0650 is "No"), or if the random number for determining a jackpot is less than the lower limit (the result of step 08TKS0670 is "No"), the main control MPU 1311 determines whether or not a small jackpot has been won (step 08TKS0740). The processing of step 08TKS0740 corresponds to the processing from step 08TKS0640 to step 08TKS0670 in the case of a jackpot determination.

The procedure for determining whether or not a small win has been won may be the same as for determining a large win, by comparing with an upper limit and a lower limit, or the value that results in a win may be stored. When comparing with an upper limit and a lower limit, the range should be different from the range for a large win. The upper limit and lower limit may also be fixed regardless of the set value. This makes it possible to reduce the memory area required to store the thresholds required for determining whether or not a small win has been won.

If a small win is won (the result of step 08TKS0740 is "Yes"), the main control MPU 1311 executes the small win setting process (step 08TKS0750). In the small win setting process, the small win pattern type number (pattern type number) is identified, as in the big win setting process. Furthermore, the main control MPU 1311 executes the type command setting process to set a type command based on the identified small win pattern type number (step 08TKS0760).

Finally, the main control MPU 1311 sets the special pattern number (small win pattern number) (step 08TKS0730). The special pattern number (small win pattern number) is based on the special pattern random number, just like the big win pattern number, and so has a value in the range of 0 to 199. However, to avoid overlapping with the big win pattern number, the special pattern random number is converted to a value of 0 to 49 by dividing it by 4. Furthermore, the converted value is added to 200, which is the upper limit of the big win pattern number, and then 1 is added to convert it to a value between 201 and 250. As a result, the big win is 1 to 200, and the small win is 201 to 250, making it possible to specify the type of win by the special pattern number. Once the setting of the special pattern number (small win pattern number) is completed, this process is then terminated.

On the other hand, if the small win is not won (the result of step 08TKS0740 is "No"), the main control MPU 1311 executes a loss setting process (step 08TKS0790) since the result of the special lottery is a loss. In the loss setting process, the special pattern number is set to 0. This results in the special pattern number being set in the range from 0 to 250.

(Jackpot determination)
Here, the lottery based on the random number for jackpot determination will be explained. FIG. 496 is a diagram for explaining the lottery result determination means. In the gaming machine of this embodiment, as described above, the small win is also determined based on the random number for jackpot determination. In addition, the probability of winning the jackpot differs depending on the probability state and the setting value of the gaming machine. (A) is a table for determining the result of the variable display (special lottery) of the special symbol 2 when the setting value of the gaming machine is 1 in a high probability state, (B) is a table for determining the result of the variable display (special lottery) of the special symbol 2 when the setting value of the gaming machine is 6 in a high probability state, (C) is a table for determining the result of the variable display (special lottery) of the special symbol 1 when the setting value of the gaming machine is 6 in a high probability state, (D) is a table for determining the result of the variable display (special lottery) of the special symbol 2 when the setting value of the gaming machine is 6 in a low probability state, and (E) is a table for determining the result of the variable display (special lottery) of the special symbol 2 when the setting value of the gaming machine is 1 in a low probability state.

In the gaming machine of this embodiment, the small win is set to be won in the case of a special lottery based on special pattern 2. In the case of special pattern 1, the small win is only won when the value of the random number for determining a big win is 60254, and it is set to be almost never won. Also, since the probability state indicates the probability of winning a big win, the probability of winning a small win is the same whether it is in a high probability state or a low probability state. Also, the winning range of a small win is fixed according to the type of special pattern, and with special pattern 1, the small win is won only when the value of the random number for determining a big win is 60254, and with special pattern 2, the value of the random number for determining a big win is between 60050 and 60254.

As described above, in the gaming machine of this embodiment, the judgment value for a big win is set to a common value (range) for special pattern 1 and special pattern 2, regardless of the probability state or the setting value of the gaming machine. On the other hand, the judgment value for a small win is not common to special pattern 1 and special pattern 2, but it may be common to special pattern 1 and special pattern 2. Note that the winning ranges for big wins and small wins shown in the figure are examples and are not limited to these values.

As shown in FIG. 490, the random numbers for determining a jackpot are values between 0 and 63534, but because a 2-byte area is allocated, values up to 65535 can actually be stored. In the gaming machine of this embodiment, values from 63535 to 65535 are reserved as a reserve area, and are outside the range of random number generation.

Also, as shown in FIG. 491, the upper limit of the jackpot range is the same as the upper limit of the range of random numbers used to determine jackpots. Furthermore, the upper limit of the jackpot range is the same regardless of the probability state, the settings of the gaming machine, or the type of special symbol, and the lower limit is changed depending on the probability state and the settings of the gaming machine.

In addition, because the area for storing the random number for determining a jackpot is 2 bytes, it is possible to store a value outside the range for generating random numbers for determining a jackpot. Normally, whether it is hardware random numbers or software random numbers, random numbers outside the specified range will not be generated, but when retrieving the generated random number, there is a risk that a random number for determining a jackpot that is outside the range (above the upper limit) will be obtained due to factors such as noise.

Figure 497 explains the process by which some bits of the random number used to determine a jackpot are changed due to factors such as noise, causing the value to go outside the range.

In the example shown in Figure 497, "48172" ("1011110000101100b") is generated as the random number for determining a jackpot, but due to the influence of noise or the like, the second bit "0" changes to "1". As a result, the obtained random number for determining a jackpot becomes "1111110000101100b" ("64556"). In this way, the upper limit of the random number for determining a jackpot is "63534", and the value exceeds this upper limit.

In contrast, in the gaming machine of this embodiment, the judgment based on the random number for determining a jackpot is compared with the upper and lower limits, so even if a random number for determining a jackpot is obtained that is outside the range, it will not be judged as a jackpot. Specifically, the judgment result of step 08TKS0650 in FIG. 495 is "No", so the process of determining whether or not a small jackpot has been won is executed directly. Note that if the number is outside the range below the lower limit, the judgment result of step 08TKS0670 in FIG. 495 will be "No", and the process of determining whether or not a small jackpot has been won is executed in the same way as when the number is outside the range above the upper limit.

In other words, even if the random number used to determine a jackpot is outside the range, normal control continues without going through exception processing such as determining whether the range of the acquired random number exceeds a specified range. Just like determining a jackpot, a small jackpot is also determined by comparing it with an upper and lower limit, so normal control can continue without executing exception processing. Also, by controlling the acquired random number so that it does not result in a jackpot even if it is outside the range, it is possible to prevent the hall from suffering losses.

If the random number for determining a jackpot falls outside the range, it is confirmed that it is a miss, so the occurrence of a reach may be suppressed. For example, the value of the random number for reach determination may be updated to a value that is not a reach. At this time, the fluctuation pattern with the shortest fluctuation time may be selected. This makes it possible to quickly end a game that has been affected by noise, etc., and improves the stability of the game.

As described above, in the gaming machine of this embodiment, even if the random number for determining a jackpot becomes a value outside the range, it is treated the same as if it was determined to be a miss, so processing can continue with normal control without providing exception processing. This simplifies game control and improves the development efficiency of gaming machines while suppressing increases in processing load.

(Jackpot pattern determination)
Next, a procedure for identifying (searching for) the type of jackpot symbol from the special symbol determination data based on the special symbol random number will be described (step 08TKS0710 in FIG. 495). FIG. 498 is a diagram showing an example of the special symbol determination data, where (A) shows the case of special symbol 1, and (B) shows the case of special symbol 2. The special symbol determination data defines tables for special symbol 1 and special symbol 2, but a common table may be used, or one may be a fixed value.

In the gaming machine of this embodiment, in the case of special symbol 1, the order is set so that it is not disadvantageous to the player, as follows: special symbol 1 jackpot symbol type 3, special symbol 1 jackpot symbol type 2, special symbol 1 jackpot symbol type 1, special symbol 1 jackpot symbol type 0. Similarly, in the case of special symbol 2, the order is set so that it is not disadvantageous to the player, as follows: special symbol 2 jackpot symbol type 9.

In the gaming machine of this embodiment, as shown in FIG. 490, the special pattern random number is generated in the range of 0 to 199. For example, if the special pattern 1 jackpot pattern type is 3, it will be selected when the value of the special pattern random number in the variable display of special pattern 1 is between 190 and 199.

The procedure for identifying (searching) the jackpot pattern type from the special pattern determination data based on the special pattern random number is to first identify whether it is special pattern 1 or special pattern 2, and then compare the special pattern random number with a threshold value (lower limit value) from the first record of the corresponding table. If the comparison shows that the special pattern random number is equal to or greater than the threshold value, the corresponding jackpot pattern type is selected. On the other hand, if the special pattern random number is smaller than the threshold value, a similar comparison is made with the next record. Since the threshold value (lower limit value) of the final record is 0, the special pattern random number will always be equal to or greater than the threshold value in the end, and the jackpot pattern type will be selected.

Next, we will explain what happens when a special random number outside the generation range is obtained. Figure 499 is a diagram explaining the type of pattern that corresponds to the special random number, where (A) shows the case of special pattern 1, and (B) shows the case of special pattern 2.

The special pattern random number is assigned a 2-byte area and can store values from 0 to 255. As shown in FIG. 499, the generation range of the special pattern random number is 0 to 199, so values from 200 to 255 are outside the generation range. Therefore, as with the case of the random number for determining a jackpot, there is a risk that a special pattern random number outside the range will be obtained due to the influence of noise, etc. In the above-mentioned method of specifying the jackpot pattern type, when a special pattern random number outside the range is obtained, it will be a value larger than the lower limit value that is compared first, so special pattern 1 jackpot pattern type 3 is searched. In other words, when the threshold value is the lower limit value, the comparison is made in order of the largest threshold value, so that a value outside the range will be a value larger than the original generation range, and the condition will be met in the first comparison. In the above example, the jackpot pattern type that is most advantageous to the player is selected.

If the random number for determining a jackpot falls outside the range, the game is controlled to put the player at the greatest disadvantage, but because a jackpot (or small jackpot) is guaranteed even if the special pattern random number falls outside the range, controlling the game to put the player at the greatest disadvantage would be detrimental to the player. Therefore, in the gaming machine of this embodiment, as described above, the game is controlled to avoid putting the player at the greatest disadvantage (it is desirable to control the game to be the most advantageous).

Therefore, by placing the jackpot symbol type to be selected when the value of the special symbol random number is outside the generation range in the first record, it is possible to intentionally control the selection of a specific jackpot symbol type. Also, by setting the upper limit of the generation range in the first record, it is possible to set a jackpot symbol type that is selected only when a random number outside the generation range is obtained.

If the threshold is set as the upper limit, the comparison will be made in ascending order of threshold, so the condition will be met in the last comparison. Therefore, the type of jackpot symbol that is selected when a random number outside the generation range is obtained can be made the final record.

By configuring it as described above, it is possible to set the type of jackpot symbol to be selected when a random number outside the generation range is obtained by simply arranging or adding data without adding exception handling to the program. Even if a random number outside the generation range is obtained, normal game control can be continued, which simplifies game control, reducing the processing load and improving stability.

(Special symbol variation pattern setting process)
Next, the special symbol variation pattern setting process (step 08TKS0370) for setting the variation pattern in the variation display of the special symbol will be described. The special symbol variation pattern setting process includes a process for selecting a variation pattern (variation pattern determination process). Figure 500 is a flowchart showing an example of the procedure of the special symbol variation pattern setting process.

The main control MPU 1311 first obtains the number of reserved balls for special symbol activation (step 08TKS0810). The number of reserved balls for special symbol activation is stored in the reach probability selection reserved ball number area.

Furthermore, the main control MPU 1311 executes a variation pattern selection determination process to select a variation pattern of the special symbol based on the number of balls reserved for special symbol activation and the jackpot flag (step 08TKS0820). Details of the variation pattern selection determination process will be described later in FIG. 501.

Next, the main control MPU 1311 obtains the fluctuation pattern value extracted by the fluctuation pattern selection determination process, and searches for data (fluctuation time value) corresponding to the fluctuation pattern value from the special pattern fluctuation time data (step 08TKS0830).

Furthermore, the main control MPU 1311 executes a variation type determination process to select the variation type defined in the variation pattern in the variation display of the special pattern (step 08TKS0840). The variation type classification value obtained by the variation type determination process is set.

Finally, the main control MPU 1311 searches the variable time addition value data for a variable time addition value corresponding to the variable type type value (step 08TKS0850). The variable time addition value is an addition time corresponding to the variable type, and corresponds to, for example, an addition time according to the number of pseudo consecutive wins. Furthermore, the searched variable time addition value is stored in the special pattern addition timer area, and the special pattern variable pattern setting process is terminated.

(Variation pattern selection determination process)
Next, the variation pattern selection judgment process (step 08TKS0820) will be described. FIG. 501 is a flowchart showing an example of the procedure of the variation pattern selection judgment process. The variation pattern selection judgment process is a process for selecting a variation pattern in the variation display of the special pattern. This process is also called in the pre-reading process performed at the time of the start winning.

The main control MPU 1311 first obtains the special symbol-specific fluctuation allocation information source table based on the fluctuation table number (step 08TKS0910). Multiple special symbol-specific fluctuation allocation information source tables are defined corresponding to the fluctuation table numbers. The special symbol-specific fluctuation allocation information source table specifies a winning fluctuation selection information table, a reach fluctuation selection information table, a losing fluctuation selection information table, and a special symbol reach probability table for each of special symbol 1 and special symbol 2.

Then, the main control MPU 1311 judges whether the result of the special lottery is a big win or a small win (step 08TKS0920). If the big win or small win is not won (the result of step 08TKS0920 is "No"), that is, if the result of the special lottery is a miss, it judges whether a reach will occur (step 08TKS0930). Whether a reach will occur is determined by identifying a special pattern reach probability table (reach probability data) based on the game status and number of reserved balls, etc., and by drawing a lottery based on the reach judgment random number.

If it is determined that a reach will not occur (the result of step 08TKS0930 is "No"), the main control MPU 1311 selects the miss variation pattern selection table (step 08TKS0940). Note that if the random number for determining a jackpot is outside the range, it may be determined that a reach will not occur. By quickly moving to the next variation, the impact on the game is minimized.

When the miss variation pattern selection table is selected, the main control MPU 1311 executes the miss variation pattern selection process (step 08TKS0950). In the miss variation pattern selection process, the miss variation pattern selection value data table is specified, and one miss variation pattern selection data is identified from the multiple miss variation pattern selection data based on the game state (time-saving state, etc.), the number of reserved balls, etc. Note that when the random number for jackpot determination is out of range and the time-saving state is in effect, the variation pattern with the shortest variation time is selected, thereby controlling the effect on the game to be minimized. Note that the selection of the variation pattern with the shortest variation time may be determined based on the number of reserved balls for special symbol activation in addition to the time-saving state. For example, the variation pattern with the shortest variation time may be forcibly selected only when the number of reserved balls for special symbol activation is equal to or greater than a predetermined value.

On the other hand, if it is determined that a reach will occur (the result of step 08TKS0930 is "Yes"), the main control MPU 1311 selects a reach fluctuation pattern selection table (step 08TKS0960) and executes the reach fluctuation pattern selection process (step 08TKS0970). The reach fluctuation pattern selection process performs the same process as the miss fluctuation pattern selection process. Specifically, it specifies a reach fluctuation pattern selection value data table and selects a fluctuation pattern based on the game status, number of reserved balls, etc.

Note that this also includes cases where a big hit or small hit has not been won (the result of step 08TKS0920 is "No") and the process is called from the look-ahead process. Also, when the process is called from the look-ahead process, the variable pattern selection table is selected based on the reach determination random number and the reach probability data for the look-ahead process.

When a big win or small win is won (the result of step 08TKS0920 is "Yes"), the main control MPU 1311 selects the winning time fluctuation pattern selection table (step 08TKS0980) and executes the winning time fluctuation pattern selection process (step 08TKS0990). The winning time fluctuation pattern selection process performs the same process as the losing time fluctuation pattern selection process. Specifically, a winning time fluctuation pattern selection value data table is specified, and a fluctuation pattern is selected based on the game status, number of reserved balls, etc. If the random number for the special symbol is out of range, the fluctuation pattern with the shortest fluctuation time is selected from among the selectable fluctuation patterns, minimizing the impact on the game.

When the fluctuation pattern selection process (miss fluctuation pattern selection process, reach fluctuation pattern selection process, winning fluctuation pattern selection process) is completed, the main control MPU 1311 executes the fluctuation setting process (08TKS1000). In the fluctuation setting process, the fluctuation pattern number is identified from the fluctuation pattern selection data identified in each fluctuation pattern selection process (miss fluctuation pattern selection data, reach fluctuation pattern selection data, winning fluctuation pattern selection data). After the fluctuation setting process is completed, the fluctuation pattern selection determination process is terminated.

Here, we will explain the case where the result of the special lottery is a miss and the random number for the fluctuation pattern is outside the range when a reach occurs. Figure 502 is a diagram showing an example of reach fluctuation pattern selection data. Note that the miss fluctuation pattern selection data and the win fluctuation pattern selection data have the same configuration.

In the gaming machine of this embodiment, a fluctuation pattern is selected from the reach fluctuation pattern selection data based on the random number for the fluctuation pattern. The method of selecting a fluctuation pattern is the same as when selecting a jackpot symbol type, in that a threshold value and a random number value (fluctuation pattern random number) are compared from the beginning of the reach fluctuation pattern selection data, and if the fluctuation pattern random number is greater than the threshold value, the corresponding fluctuation pattern is selected.

The random number for the variation pattern is assigned a 1-byte area and can store values from 0 to 255. As shown in FIG. 490, the generation range of the random number for the variation pattern is 0 to 149, so values from 150 to 255 are outside the generation range. Therefore, as in the case of the random number for jackpot determination and the random number for special symbols, there is a risk that a value outside the range will be obtained due to the influence of noise, etc. As described above, when identifying the variation pattern, since the threshold value is the lower limit, the value outside the range will be larger than the original generation range, so the condition is met in the first comparison, and the SPSP reach, which is the variation pattern with the highest expectation, will be searched for. In the gaming machine of this embodiment, as in the case of the random number for special symbols, the most unfavorable variation pattern is controlled not to be selected, and by configuring in this way, it is possible to suppress a decrease in interest in the game.

[35-3. Effects and Others]
As described above, in the gaming machine of this embodiment, even if the random number for determining a big win is out of range, normal control continues without going through exception processing such as determining whether the range of the acquired random number is a value beyond a predetermined range. Since the judgment of a small win is also compared with the upper limit value and the lower limit value, as in the judgment of a big win, normal control can be continued without executing exception processing. This simplifies the game control and improves the development efficiency of the gaming machine while suppressing the increase in processing load. In addition, by controlling the acquired random number so that it does not become a big win even if it is out of range, it is possible to prevent the hall from suffering damage.

In addition, in the gaming machine of this embodiment, it is possible to set the jackpot symbol type and variation pattern to be selected when a random number outside the generation range is obtained by simply arranging and adding data without adding exception processing to the program, and normal game control can be continued even when a random number outside the generation range is obtained, thereby simplifying the game control to reduce the processing load and improve stability. Furthermore, by controlling so as not to select the most unfavorable result when the random number obtained to select the jackpot symbol type and variation pattern is outside the range, a decrease in interest in the game can be suppressed.

(Normal design)
In addition, the lottery can be performed not only for special symbols but also for normal symbols in the same way. Specifically, the "random number for determining a big win" can be replaced with the "random number for determining a win", the "random number for special symbols" with the "random number for a winning symbol", and the "random number for a variable pattern" for special symbols with the "random number for a variable pattern" for normal symbols, and the above-mentioned processing for special symbols can be applied. In this case, the random numbers for special symbols may be generated by hardware random numbers, and the random numbers for normal symbols may be generated by software random numbers.

In addition, since there are many types of jackpots in the lottery using special symbols (special lottery) and few types of jackpots in the lottery using normal symbols (normal lottery), the generation range of the random number used to determine the jackpot for special symbols is set to the full range of two bytes (0 to 65535) to eliminate any numbers outside that range, while the generation range of the random number used to determine the jackpot for normal symbols can be set to a partial range rather than the full range of two bytes. This allows for precise selection of the special lottery and allows an appropriate range to be set for the normal lottery.

(others)
In the gaming machine of this embodiment, cases where the acquired random number is out of range are not limited to cases where the random number generated by the random number generating circuit is out of range. For example, cases where the generated random number is normal but becomes out of range due to the influence of noise or the like when it is stored in the main control RAM 1312, or where the value is read out as an out-of-range value during the process of reading the value from the main control RAM 1312 are also included.

In addition, even if the generation range of the random number for determining a jackpot is all two bytes, if an abnormality occurs in the random number generation circuit, the determination result will be derived so as to be the most unfavorable result for the player, and subsequent processing will continue, just as if a random number value outside the generation range had been obtained. An abnormality in the random number generation circuit can be detected from the value of a specified register in the main control MPU 1311. Furthermore, if an abnormality is detected in a specified register in the main control MPU 1311, the game may be stopped without continuing processing, and a security signal may be output. Game can be restored from the stop by cutting off and re-applying the power.

As mentioned above, if an abnormality occurs in the random number generation circuit itself, gameplay will be stopped. However, if there is no abnormality in the random number generation circuit itself and the acquired random number is outside the generation range, gameplay will not be stopped, unlike in cases where there is an abnormality in the detection of a magnet or vibration sensor, and the fact that the random number is abnormal (outside the generation range) will not be notified. This is because an amusement center is an environment where noise is likely to occur, and frequent game stoppages could reduce interest in the game.

It is also possible to notify the player of an abnormality in the random numbers used to determine a jackpot and stop the game. An abnormality in the random numbers used to determine a jackpot may be closely related to the allocation of game value, and obtaining a random number outside the generation range may result in the most unfavorable outcome for the player, which may reduce the player's interest in the game. Random numbers for special symbols and random numbers for variable patterns do not affect the jackpot determination results, so as mentioned above, the game can continue without stopping the game or notifying the player of an abnormality.

In addition, if the random number for determining a jackpot is out of range, a security signal may be output, just as in the case of an abnormality detected by a magnet or vibration sensor, or when settings are changed/checked. Also, if there is free space in the external output terminal, a signal separate from the security signal may be output. In the case of an abnormality in the random number for a special symbol or the random number for a variable pattern, no external signal is output, and play continues, just as in the case of game stop or abnormality notification.

(Summary of inventions related to random number ranges)
Representative aspects of the invention disclosed in this specification include the following.

(1) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery based on the random number;
Equipped with
A gaming machine characterized in that, if the random number obtained from the random number generating means is not within the specified range, the lottery result determination means determines the result of the lottery to be a result that is not advantageous to the player.

(2) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
A symbol variation display means for performing a variable display of symbols based on the result of the lottery;
Equipped with
When the random number obtained from the random number generating means is not within the specified range, the lottery result determining means determines the result of the lottery to be the most unfavorable result for the player, and
The gaming machine is characterized in that the pattern variable display means executes a variable display of the pattern based on the result of the lottery by the lottery result determination means even if the random number obtained from the random number generation means is not within the specified range.

In the configurations (1) and (2), even if the acquired random number value is outside the range due to the influence of noise or the like, it is possible to continue processing with normal control without exception processing by determining that this is the most unfavorable result for the player. For example, even if the random number for determining a jackpot is outside the range, it is determined to be a miss (a result that is not advantageous to the player) and processing can be continued with normal control without exception processing, which simplifies game control and improves the development efficiency of gaming machines while suppressing an increase in processing load. In addition, by controlling the acquired random number so that it does not result in a jackpot even if it is outside the range, it is possible to prevent the hall from suffering losses (Figures 495 to 497).

(3) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
Equipped with
The special game state includes a first special game state (a special game state due to a big win) and a second special game state (a special game state due to a small win) different from the first special game state,
The lottery result determination means
After determining whether or not to generate the first special game state, determining whether or not to generate the second special game state;
A gaming machine characterized in that, even if the random number obtained from the random number generation means is not within the specified range, after determining whether or not to generate the first special game state, it determines whether or not to generate the second special game state.

In the configuration of (3), even if the random number for determining a big win is outside the range, it is determined to be a miss (the most unfavorable result for the player), and then the determination of a small win continues as is. In this way, processing can continue with normal control without providing exception processing, simplifying game control and improving the development efficiency of gaming machines while suppressing increases in processing load (Figures 495 to 497).

(4) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
Equipped with
The lottery includes a first lottery (for example, a lottery based on a random number for determining a jackpot) for determining whether or not the lottery has been won, and a second lottery (for example, a lottery based on a random number for a special pattern or a random number for a variable pattern) executed following the first lottery,
The generated random numbers include a first random number for determining the result of the first lottery (e.g., a random number for determining a jackpot) and a second random number for determining the result of the second lottery (e.g., a random number for a special pattern, a random number for a variable pattern), and a generation range is specified for each of the random numbers;
The lottery result determination means executes the second lottery even if the first random number is not within the specified range, and if the second random number is not within the specified range, determines the result of the second lottery to be the least disadvantageous result for the player.

In the configuration of (4), even if the random number for determining a jackpot is outside the range, it is judged to be a miss (the result most unfavorable to the player), and then a lottery is performed based on the random number for the special symbol and the random number for the variable pattern, and normal processing continues as the result is not the most unfavorable to the player even if these random numbers are outside the range. In this way, processing can continue with normal control without providing exception processing, simplifying game control and improving the development efficiency of gaming machines while suppressing increases in processing load (Figures 495, 498, 499). Note that the configuration of (4) can also be applied to lotteries for normal symbols.

(5) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
Equipped with
The lottery includes a first lottery (for example, a lottery based on a random number for determining a jackpot) for determining whether or not the lottery has been won, and a second lottery (for example, a lottery based on a random number for a special pattern or a random number for a variable pattern) executed following the first lottery,
The generated random numbers include a first random number for determining the result of the first lottery (e.g., a random number for determining a jackpot) and a second random number for determining the result of the second lottery (e.g., a random number for a special pattern, a random number for a variable pattern), and a generation range is specified for each of the random numbers;
The lottery result determination means determines the result of the second lottery as the least disadvantageous result to the player when the player wins the first lottery and the second random number is not within the specified range.

In the configuration of (5), even if the random number for the special symbol or the variable pattern random number is outside the range, the result is always the least disadvantageous to the player, and normal processing continues as is. In this way, processing can continue under normal control without providing for exception processing, simplifying game control and improving the development efficiency of gaming machines while suppressing increases in processing load (Figures 495, 498, 499). Note that the configuration of (4) can also be applied to the lottery for normal symbols.

(6) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
Equipped with
The generated random numbers include a winning determination random number (a random number for determining a big win or a random number for determining a win) for determining whether or not the lottery has been won, and a pattern random number (a random number for a special pattern or a random number for a normal pattern) for determining the mode of the special game state if the lottery has been won, and a generation range is specified for each of the random numbers,
The lottery result determination means determines, when a player wins a lottery based on the winning determination random number and the pattern random number is not within the specified range, the result of the lottery based on the pattern random number as the least disadvantageous result for the player.

In the configuration of (6), in addition to the same effect as (5), even if the random number of symbols is outside the range, the result is always the least disadvantageous to the player, and normal processing continues as is. In this way, processing can continue under normal control without providing exception processing, simplifying game control and suppressing increases in processing load while improving the development efficiency of gaming machines (Figs. 495, 498, 499).

(7) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
Equipped with
The generated random numbers include a winning determination random number (a random number for determining a big win or a random number for determining a win) for determining whether or not the lottery has been won, and a pattern random number (a random number for a special pattern or a random number for a normal pattern) for determining the mode of the special game state if the lottery has been won, and a generation range is specified for each of the random numbers,
The symbol determination information is composed of a plurality of records including combinations of a threshold value to be compared with the symbol random number and a mode of the special game state,
The lottery result determination means determines the result of the lottery based on the winning determination random number as the result corresponding to the first record or the last record of the symbol determination information when the winning determination random number is won and the symbol random number is not within the specified range.

In the configuration of (7), in addition to the same effect as (5), even if the pattern random number is outside the range, the first or last record of the pattern determination data (special pattern determination data or normal pattern determination data) is always selected, and normal processing continues as is. In this way, processing can continue under normal control without providing exception processing, simplifying game control and improving the development efficiency of gaming machines while suppressing increases in processing load (Fig. 495, Fig. 498, Fig. 499).

(8) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
A symbol variation display means for performing a variable display of symbols based on the result of the lottery;
Equipped with
The generated random numbers include a winning determination random number (a random number for determining a big win or a winning determination random number) for determining whether or not the lottery has been won, and a variation pattern random number for determining the mode of the variable display, and a generation range is specified for each of the random numbers,
The lottery result determination means determines, when a player wins a lottery based on the winning determination random number and the variable pattern random number is not within the specified range, the result of the lottery based on the pattern random number as the least disadvantageous result for the player.

In the configuration of (8), in addition to the same effect as (5), even if the random numbers for the variable patterns (for special and normal symbols) are out of range, the result is always the least disadvantageous to the player, and normal processing continues as is. In this way, processing can continue under normal control without providing exception processing, simplifying game control and improving the development efficiency of gaming machines while suppressing increases in processing load (Figs. 501 and 502).

(9) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
A symbol variation display means for displaying a variation of a symbol based on a result of the lottery;
Equipped with
The generated random numbers include a winning determination random number (a random number for determining a big win or a winning determination random number) for determining whether or not the lottery has been won, and a variation pattern random number for determining the mode of the variable display, and a generation range is specified for each of the random numbers,
A threshold value to be compared with the fluctuation pattern random number and fluctuation pattern determination information composed of a plurality of records including a combination of the mode of the special game state,
The lottery result determination means of the gaming machine is characterized in that, when a player wins a lottery based on the winning determination random number and the fluctuation pattern random number is not within the specified range, the result of the lottery based on the fluctuation pattern random number is determined to be the result corresponding to the first record or the last record of the fluctuation pattern determination information.

In the configuration of (9), in addition to the same effect as (5), even if the random number for the variation pattern (for special symbols and normal symbols) is out of range, the first or last record of the variation pattern selection data (for special symbols and normal symbols) is selected, and normal processing continues as is. In this way, since processing can continue under normal control without providing exception processing, it is possible to simplify game control, suppress an increase in processing load, and improve the development efficiency of gaming machines (Figs. 501 and 502).

(10) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
A symbol variation display means for performing a variable display of symbols based on the result of the lottery;
Equipped with
The generated random numbers include a winning determination random number (a random number for determining a big win or a winning determination random number) for determining whether or not the lottery has been won, and a variation pattern random number for determining the mode of the variable display, and a generation range is specified for each of the random numbers,
The gaming machine is characterized in that, when the winning judgment random number is not within the specified range, the pattern variation display means executes the variation display of the pattern based on the variation pattern random number which has the shortest variation display time for the pattern, regardless of the value of the variation pattern random number.

In the configuration (10), in addition to the effect of (1), if the value of the winning determination random number is outside the range, the fluctuation time of the pattern display is minimized, so that a game affected by noise, etc. can be quickly ended, and the stability of the game can be improved (Fig. 495).

(11) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A random number generating means for generating random numbers within a specified range in order to execute the lottery;
a lottery result determination means for obtaining the random number generated by the random number generation means and determining a result of the lottery;
A symbol variation display means for performing a variable display of symbols based on the result of the lottery;
Equipped with
When the random number obtained from the random number generating means is not within the specified range, the lottery result determining means determines the result of the lottery to be the most unfavorable result for the player, and
The gaming machine, wherein the symbol variation display means suppresses execution of a reach effect during the process of executing an effect for varying the display of the symbols.

In the configuration (11), in addition to the effect of (1), if the value of the random number for determining a jackpot is outside the range, the execution of the reach effect is suppressed, so that a game affected by noise, etc. can be quickly ended, and the stability of the game can be improved (Figure 495).

[36. Recovery control from game stop]
The lottery control has been described above. Next, the return control in the case where the game is stopped due to an abnormality during the game will be described. In order to return from the game stop, the power is turned off and then turned on again, but since the contents of the main control RAM 1312 are maintained by the backup power supply, there are cases where the game cannot be returned from the game stop. In such a case, the game stop can be released by turning on the power while operating the RAM clear switch 954, but the state before the game stop cannot be returned to. However, depending on the cause of the game stop, there are cases where the game can be returned to without clearing the RAM, so that the game can be continued from the state before the game stop by releasing the game stop without clearing the RAM, which contributes to suppressing the decline in the interest in the game.

The gaming machine of this embodiment is equipped with multiple game stop release means, and these game stop release means are selected and executed depending on the game status, etc. The game stop release means may be executed by operating the corresponding operation means (game stop release operation means), or may be executed by operating an existing operation means that also serves other functions (e.g., RAM clear switch 954, power switch 932, etc.). In addition, the operation of multiple operation means may be combined, or a dedicated operation means may be combined with an existing operation means for execution. Below, the causes of game stop will be explained, followed by an overview of the game stop release means. Finally, a specific example of the game stop release means will be explained.

[36-1. Reasons for game stop]
[36-1-1. Overview]
The first factor that may cause a game to be stopped is the detection of a signal from a fraud detection sensor that detects magnetism, vibration, radio waves, etc. The detection of such a signal may be due to fraudulent activity, making it difficult to continue playing, and when the game is released from the stopped state, it is necessary to restart the game from the initial state by clearing the RAM, etc.

In addition to the above cases that may be caused by fraudulent activities, noise or other factors may cause errors in the game control, causing the game control program to not operate normally. In this case, simply releasing the game suspension will likely not allow gameplay to continue normally, so when releasing the game suspension, it is necessary to restart gameplay from the initial state by clearing the RAM, etc. Furthermore, when gameplay is suspended due to the effects of noise, etc., there is a possibility that the cause of the game suspension cannot be identified due to poor reproducibility. In this case, the RAM is cleared, etc., to restart gameplay from the initial state when releasing the game suspension, in the same way as when an abnormality that makes it difficult to continue gameplay occurs. Similarly, gameplay is also stopped when an abnormality occurs in the main control board 1310, such as when an abnormality occurs in the random number generation circuit built into the main control MPU 1311.

In addition, the system is controlled to stop play when an abnormality occurs, such as when a game ball is detected entering the jackpot opening while it is closed, when a predetermined number of wins or more are detected during a jackpot game, or when a game ball passes through a jackpot area (V-AT area) despite the occurrence of a jackpot in which the game ball does not pass through the jackpot area.

In addition, in the case of minor abnormalities such as ball jams or full tank errors, gameplay will continue, and once the abnormality has been resolved, gameplay will continue as is (however, payout of game value (prize balls) will stop).

Furthermore, the gaming machine of this embodiment is equipped with a mechanism (excessive prize ball suppression means) that stops the game when the difference between the expected number of balls dispensed and the actual number of balls dispensed (difference in balls) is equal to or greater than a predetermined threshold (excessive prize balls). By providing the excessive prize ball suppression means, it is possible to prevent excessive stimulation of gambling greed. The excessive prize ball suppression means will be described later.

Even if another cause for stopping play occurs while play is stopped, the system will not make a new decision to stop play. For example, if a magnetic sensor detects a magnetic anomaly while play is stopped due to excess prize balls, the system will not report the anomaly and will continue to stop play. This is because play has already stopped, so there is no risk of prize balls being obtained illegally.

[36-1-2. Excessive ball award suppression measures]
(Judgment on excessive prize balls)
First, a method for calculating the difference in balls (comparison value) for operating the excessive prize ball suppression means will be described. The difference in balls is the difference between a value (first count value) counted based on the game balls (fired balls, out balls, safe balls) consumed in the game and a value (second count value) counted based on the prize balls. The comparison value is calculated based on the difference in balls. Figure 503 is a diagram for explaining the comparison value for operating the excessive prize ball suppression means.

The excessive winning ball suppression means uses the maximum value of the difference in balls when the start of the measurement period is set to 0 (first comparison value) and the difference between the minimum and maximum value of the difference in balls within the measurement period (second comparison value) as values to compare with the threshold value. For example, if the maximum value of the difference in balls within the measurement period is 6000 and the minimum value is -2000, the first comparison value will be 6000 and the second comparison value will be 8000.

The measurement period is the period from when the difference in balls is cleared to when it is cleared again, and if the difference in balls count is cleared when the hall opens for business, it is the period (one day) from when the hall opens for business to when it closes (when the next business starts). In this case, the count can be cleared during the initialization process when the gaming machine is turned on. The difference in balls count can also be cleared when the hall closes for business. In this case, the count can be cleared during the process when the power is turned off (power outage process).

Furthermore, the difference ball count may be made manually clearable by performing a specified operation. For example, a button for clearing the difference ball count may be provided, and the difference ball count may be cleared by turning the power off and on while operating the button. This makes it possible to clear the difference ball count at any time, and makes it possible to continue playing after clearing, even if an abnormality is detected in the counted values, such as the number of winning balls, due to noise.

In addition, since the game control itself operates normally even when the excessive prize ball suppression means is activated, it is also possible to control the timing of stopping the game. Specifically, (1) immediately after the comparison value exceeds the threshold regardless of the game state, (2) after the jackpot game ends if the threshold is exceeded during a jackpot game, (3) after the game state ends (after transition to normal game state) if the threshold is exceeded during a time-saving state (which continues a specified number of times) or a special state, (4) after the pattern change ends (after all reserved balls are consumed if there are reserved balls), (5) after the jackpot game state ends if a pattern change that results in a jackpot is in progress, (6) after the lottery result is forcibly changed to a loss if a pattern change that results in a jackpot is in progress and after the pattern change ends, etc. are possible.

By stopping the game when the comparison value exceeds the threshold value as in (1), it is possible to strictly manage the balls dispensed. Also, by continuing the game until the advantageous state for the player ends as in (2) to (5), it is possible to prevent the player's interest in the game from decreasing. By controlling as in (6), it is possible to prevent the game from being stopped once a jackpot has been hit, and it is possible to prevent a significant decrease in the player's interest in the game from occurring because the player does not realize that he or she has actually hit a jackpot.

The program for executing the process for determining excess prize balls (excess prize ball suppression means) is placed in an area outside the game control area 13126. For example, it may be placed in the base calculation area 13128, similar to the base calculation process, or it may be placed in a separate area.

In addition, the area for storing the number of out balls and safe balls counted by the excessive prize ball suppression means is stored in a separate area of the main control RAM 1312 from the number of out balls and safe balls counted for base calculation. This is because the number of out balls and safe balls counted by the excessive prize ball suppression means may be cleared as necessary, and storing them in a common area may make it impossible to accurately calculate the base.

If separate processing is provided to clear the number of out balls and safe balls, the processing (program) for counting the number of out balls and safe balls can be standardized. For example, an area for storing the number of out balls and safe balls can be specified, and the stored values can be updated according to the detection results from the sensor. This can reduce the program capacity.

In addition, the process of counting the number of out balls and safe balls by the excessive prize ball suppression means and the process of counting the number of out balls and safe balls for base calculation are each called within the same timer interrupt process.

(Operation when excessive prize ball suppression means is activated)
Next, the operation of the gaming machine when the excessive prize ball suppression means is activated will be described. When the excessive prize ball suppression means is activated, the progress of the game is stopped at the above-mentioned timing and various operations are performed. In addition, instead of stopping the game, the launch of the game balls may be stopped, or both the game and the launch may be stopped.

In addition, if there are unpaid prize balls when the excess prize ball suppression means is activated, all prize balls are paid out and then game play is stopped. In this case, since excessive prize balls have been paid out at the time the excess prize ball suppression means is activated (the time when the comparison value exceeds the threshold value), game play may be stopped immediately. It is also possible to stop game play when there are unpaid prize balls when the excess prize ball suppression means is activated, in which case the unpaid prize balls can be paid out after the game stop is released.

The threshold value is set in stages, and when the device is in operation, such as in a jackpot game state, the operation of the excess prize ball suppression means is determined when the first stage threshold is reached, and play is stopped after the device has finished operating. On the other hand, when the device is not in operation, play is stopped when the comparison value reaches the second stage threshold. This makes it possible to suppress an increase in excessively awarded game value.

The game state that is ongoing when the excessive prize ball suppression means is activated may be forcibly transitioned to a normal game state.

As a game stop condition, a comparison judgment may be made using only either the first comparison value or the second comparison value. Also, the first comparison value and the second comparison value may be alternately switched each time the power is turned on, or the use of the first comparison value or the second comparison value may be arbitrarily switched by the arcade staff. As a switching means, a board volume for adjusting the volume may be used, for example, a part of the board volume may be used as the volume value and a part may be used as the comparison value. Specifically, a rotary switch allows 16 levels to be set with one switch, so 0 to 7 are the board volume and 8 to F are the comparison value. More specifically, "8" is the first comparison value, "9" is the second comparison value, "A" switches between the first comparison value and the second comparison value after the power is turned on, and "B" to "F" are reserved (backup).

The means for resuming the game suspension when the game is suspended due to the excessive prize ball suppression means is basically the same as when the game is suspended due to other factors. If the RAM is not cleared, the count of the difference balls (comparison value) is cleared as necessary.

(Notification of excessive prize ball suppression means operation)
Next, the notification of the excessive prize ball suppression means will be explained. When the excessive prize ball suppression means stops the game, the player is notified of the fact. The types of notifications include a notification that suggests that the comparison value is approaching the threshold, a notification that indicates that the comparison value has reached the threshold, and a notification that the comparison value has exceeded the threshold and the game will be stopped. In addition, an external output signal is output to notify the outside of the gaming machine (such as a hall control). The external output signal may be used in combination with a security signal, or a dedicated signal may be provided.

In addition, the notification mode may be different for cases where the threshold is exceeded due to a prize ball entering the big prize opening during a big win game state, and cases where the threshold is exceeded due to a prize ball entering a general prize opening or a start prize opening other than the big prize opening. In the former case, since the threshold may be significantly exceeded, it may be easier to manage if the administrator is made aware of it. Note that, unless the threshold is exceeded due to a prize ball entering the big prize opening, the number of prize balls consumed in the game will not significantly exceed the number of prize balls, so a common notification mode may be used without making a distinction.

Next, an example of notifying the player will be described. One way of notifying the player is, for example, to light a specific lamp. At this time, the lamp may be turned off under normal circumstances, and may be made to flash when the difference between the comparison value and the threshold value is within a specified value, and may be turned on when the comparison value reaches the threshold value, thereby notifying the player. With this configuration, the player can recognize that play is about to stop when the lamp flashes, and can recognize that play will stop when the lamp lights up.

Also, a notification may be given by sound effects or audio. In this case, the output of the sound effects may be stopped or the volume may be reduced to output the notification sound. Furthermore, the output of the notification sound may be started when the difference between the comparison value and the threshold value is within a predetermined value, and when the comparison value reaches the threshold value, the output of the sound effects may be stopped and only the notification sound may be output.

The liquid crystal display device 1600 may also be notified of the excessive prize ball suppression means. At this time, the notification content is displayed on the top (front) layer or the top (front) layer of the performance layer. This makes it possible to continue the performance on the back side, and for example, when the difference between the comparison value and the threshold value falls within a predetermined value, the performance can be continued while a pre-notification is given. At this time, the pre-notification of the excessive prize ball suppression means is set so as not to affect the advance notification or the reserved display. This is because the game is progressing normally, and by interrupting the normal presentation, a decrease in interest in the game is suppressed. On the other hand, since the game cannot proceed when it is stopped, it may be prioritized to make the player aware of this.

In addition to the above-mentioned notification means, the notification may be made by making the movable role perform a predetermined operation. If it is difficult for the player to recognize the notification by the movable role, the notification may be made by other means, and the movable role may be operated to notify that the game has stopped. At this time, the initial operation may be performed as when the power of the gaming machine is turned on, or it may be operated in a unique manner (a manner for executing the excessive winning ball suppression means). For example, in the case of a movable role that can cover the entire screen when it operates, the liquid crystal display device is covered by the movable role. At this time, it appears on the liquid crystal display screen as in the performance, but does not return to its initial position as in the performance. Also, if the movable role is provided with a lamp or the like, it may emit light during the performance, but not emit light when the game is stopped, or may emit light in a different manner from the performance. In this way, the movable role is operated in a different manner between normal time and when the game is stopped, so that the player recognizes that the game has stopped.

Regarding the above-described notification examples, instead of providing a single notification, multiple means may be used to provide the notification. For example, lighting of a lamp and audio output may be used in combination, or a notification sound may be output while a notification screen is displayed on the liquid crystal display device 1600, forming a presentation. Furthermore, a warning of the excessive prize ball suppression means may be displayed on a notification screen on the liquid crystal display device 1600, and when the game actually stops, a lamp may be turned on or a notification sound may be output.

(Notification to peripheral control board)
As described above, when notifying the excessive prize ball suppression means, it is necessary to notify the peripheral control means 1510 of the execution of the excessive prize ball suppression means. Also, when notifying the execution of the excessive prize ball suppression means (for example, displaying the remaining difference in the number of balls until the excessive prize ball suppression means is executed), it is necessary to notify information about this.

In the gaming machine of this embodiment, the main control board 1310 sends a command to the peripheral control board 1510 to notify the number of balls remaining until the comparison value reaches a threshold value. This makes it possible to notify or notify in advance that play will be stopped by the excess prize ball suppression means. The command may be sent whenever the comparison value (difference in balls) changes, or it may be sent each time a specified number is reached.

The command to be sent (difference ball command) is configured, for example, so that the upper number is "31H" indicating the difference ball command, and the lower number indicates the remaining number. Since there is a limit to the area in the command to store the remaining number, it may not be possible to store it as is. For this reason, the command may not be sent until the difference with the threshold falls below a specified value. For example, the command may be sent when the remaining number reaches 1000.

The remaining number may also be notified by associating the contents of the lower-level command with the remaining number. For example, when the remaining number reaches 1000, command transmission begins, and the value of the lower-level command at this time is "01H", and thereafter every 100 commands is "02H" (990 commands), "03H" (980 commands), ..., "80H" (100 commands). When the remaining number reaches 100 commands are sent every 10 commands thereafter, for example, "81H" (90 commands), "82H" (80 commands), ..., "89H" (10 commands). At this time, a table is maintained that stores the correspondence between the contents of the commands and the remaining number.

Figure 504 shows an example of a table showing the relationship between commands and the remaining number. By providing a table such as that shown in Figure 504, the remaining number can be flexibly notified. Also, as shown in Figure 504, even if the threshold differs depending on the settings of the gaming machine or the model, the display of the remaining number can be adjusted for each threshold. In this case, the upper byte of the command may be different for each threshold. For example, if the threshold is 100,000, it is set to "31H", and if it is 60,000, it is set to "32H". Note that when suggesting that the game should be stopped to the player, it is not necessarily necessary to notify the remaining number itself, so instead of the remaining number, the number of jackpots until the game is stopped may be displayed.

[36-2. Game stop release means]
Next, the means for canceling the game stop of the gaming machine will be described. The gaming machine of this embodiment is equipped with a plurality of types of game stop canceling means, and each game stop canceling means is made to function by operating a combination of game stop canceling operation means and existing operation means (RAM clear switch 954, setting key 971, etc.). The game stop canceling operation means may be an operation means dedicated to canceling the game stop, or may be another operation means that is not directly related to canceling the game stop and is used to cancel the game stop.

(First game stop release means)
In the first game stop release means, the second game stop release operation means is operated (ON to OFF) while the first game stop release operation means is operated (OFF to ON). This releases only the game stop without clearing the RAM. On the other hand, if the second game stop release operation means is operated (ON to OFF) without operating the first game stop release operation means (maintaining OFF), only the function corresponding to the first game stop release operation means is executed without releasing the game stop. Below, the control will be explained in chronological order with reference to FIG. 505.

Figure 505 is a timing chart that explains the process of releasing the game stop by the first game stop release means.

First, at time t101, an abnormality occurs in the gaming machine, and gameplay is forcibly stopped. At this time, a security signal is output to the outside. Note that instead of the security signal, another signal indicating that gameplay has been stopped may be used. In addition, the game stop release confirmation means switches from a "normal display" to a "stop display."

Next, to release the game stop, the first game stop release operation means is operated (time t102). Furthermore, while the first game stop release operation means is still being operated, the second game stop release operation means is operated (time t103). This starts the process to release the game stop, and the game state transitions to "Resuming". At this time, the game stop release confirmation means is "turned off". In this way, by operating multiple game stop release operation means simultaneously, it is possible to prevent the game stop from being easily released and to prevent erroneous operation.

After that, the operation of the second game stop release operation means is terminated (time t104), and further, the operation of the first game stop release operation means is terminated (time t105). As a result, the game stop release confirmation means turns to "full light", and the game state transitions to a preparation period for resuming game play. After that, when preparation for resuming game play is completed (time t106), the game stop release confirmation means turns to "normal display", and the game state transitions to the normal game state.

(Second game stop release means)
In the second game stop release means, after executing the same operation as the first game stop release means, if the game stop can be released, it becomes possible to select whether to release the game stop or to continue the game from the game stop release confirmation means. The third game stop release operation means determines whether to release the game stop, and if release is selected, the game transitions to the normal game state and the game is resumed.

In this case, only arcade employees should be able to cancel the game suspension, and not the player. This is because if players were able to cancel a game suspension caused by fraudulent activity, they would resume playing, and an employee needs to check the situation when a problem occurs.

In addition, if the game state is favorable to the player, such as a jackpot game state, time-saving state, or probability bonus state, the player can continue playing as long as possible to prevent a decline in interest in the game. Furthermore, if the game is in a normal game state, even if it is possible to continue playing, the possibility of game suspension recurring can be reduced by clearing the RAM, etc., before resuming play. In this way, it becomes possible to select whether or not to resume play while checking the situation depending on the game state before the game suspension.

The third game stop release operation means may be a dedicated operation means or an existing operation means such as a performance button.

Figure 506 is a timing chart that explains the flow of releasing the game stop by the second game stop release means. Note that the timing chart shown in Figure 505 is the same as that from time t101 to time t105, so the explanation is omitted.

At time t106, the preparation period for resuming play is completed, and the game becomes available for accepting a selection of whether or not to release the game stop. At this time, the display of the game stop release confirmation means becomes "selecting", and the game state becomes a standby state. Thereafter, when resuming play is selected (time t107), the game stop release confirmation means becomes "normal display", and the game state becomes a normal game state. Note that if resuming play is not selected with the game stop third release operation means, the selection state may be maintained as it is without resuming play, or the game may be returned to the stopped state again.

(Third game stop release means)
In the third game stop release means, the RAM clear switch 954 is operated to clear the contents stored in the main control RAM 1312 and restart the game. In this case, the game is restarted in an initialized state, not in the game state before the game stop.

(Fourth game stop release means)
The fourth game stop release means releases the game stop by executing a setting change operation. When the setting change operation is executed, the contents stored in the main control RAM 1312 are cleared, so that the game is resumed in an initialized state, not in the game state before the game stop. A specific example of the release of the game stop by the fourth game stop release means will be described later. Also, when the setting confirmation operation is executed, the game stop is continued (maintained) without being released after the setting confirmation.

(others)
Depending on the type of game stop factor, the game may be automatically restored after the game is stopped. For example, when the game is stopped by the excessive prize ball suppression means, the comparison value may be automatically initialized, and the game may be continued after a notification (presentation) that the game has been stopped. In addition, the game may be automatically resumed after a predetermined time has elapsed after the game is stopped. For example, the game may be automatically restored so that the game can be started as usual at the start of business the next day after the game is stopped.

When play is resumed without clearing the RAM after the excessive prize ball suppression means has stopped play, the counts such as the number of out balls and the number of safe balls (comparison value) are cleared. At this time, the counts for calculating the base (total number of out balls, base value, number of safe balls) are not cleared. In other words, by executing the play stop release means without clearing the RAM, the counts by the excessive prize ball suppression means are cleared, while the counts for calculating the base are maintained. In other words, provided that the first play stop release means is executed, the counts for calculating the base are not cleared, but the counts by the excessive prize ball suppression means are cleared without executing the initialization process of the main control RAM 1312. This allows the calculation of the base to continue after play is resumed, while the counting of the comparison value used by the excessive prize ball suppression means can be started anew.

The game stop release means may also be executed in response to the game stop cause. For example, if a setting value abnormality occurs, the game stop is released while the setting change function is being executed by executing the fourth game stop release means.

Furthermore, priorities may be assigned according to the cause of game stop, and a means for releasing the game stop may be selected based on the cause of game stop with the highest priority. For example, if a serious abnormality such as a setting value abnormality or RAM abnormality occurs, the first priority may be assigned, and if fraudulent detection by a magnetic sensor or the like, a difference in balls due to the operation of an excessive winning ball suppression means, or other malfunction occurs, the second priority may be assigned, and the game stop release means to be executed may differ depending on the priority.

To be more specific, the game stop release means for the first priority game stop cause releases the game stop by a game stop release means that changes the settings. On the other hand, the game stop release means for the second priority game stop cause releases the game stop by a game stop release means that does not change the settings. Also, the game stop release means for the first priority game stop cause may execute a RAM clear, while the game stop release means for the second priority game stop cause may not execute a RAM clear.

The game stop release means for the first priority game stop cause involves a setting change (RAM clear), so it can be released even when the game stop cannot be released by the game stop release means for the second priority game stop cause. On the other hand, if the game stop release means for the second priority game stop cause can release the game stop without clearing the RAM, game play can be resumed from the state before the game stop. Note that, if game play is not resumed from the state before the game stop, it is also possible to release the game stop by the game stop release means for the first priority game stop cause even if the game stop is caused by the second priority game stop cause.

In addition, when play is stopped, a notification means such as an LCD screen may suggest which game stop release means to execute depending on the priority of the game stop cause, to assist the hall employee in canceling the game stop. Note that even if multiple game stop causes occur at the same time before play is stopped, a notification may be issued according to the priority, and the game stop release means may be selected.

[36-3. Specific examples of game stop release means]
Next, a specific example of the game stop release operation means will be described. As described above, the game stop release means is executed by combining the operation of one or more game stop release operation means and existing operation means such as the RAM clear switch 954 and the setting key 971. The game stop release operation means may also be assigned to an existing configuration provided in the gaming machine. Furthermore, the game stop release operation means does not necessarily have to be a switching means such as a button or switch, as long as it can detect ON/OFF changes using a sensor or the like.

The game stop release confirmation means is provided with a dedicated display unit (game stop status display unit) that can confirm whether the game stop has been released or not. For example, it may be composed of one or more LEDs that are lit when the game is stopped and turned off when the game stop is released. If it is composed of multiple LEDs, it may be possible to change the state depending on other related states besides the above, such as whether a setting change/setting confirmation is being executed, and to notify the user. Furthermore, the game stop status display unit may be a 7-segment LED that may display the setting value when a setting change/setting confirmation is being executed.

[36-3-1. Release of game suspension conditional on door opening]
In the gaming machine described below, the first game stop release operation means is opening/closing (ON/OFF) the door (frame, one or both of the door frame 3 and the main body frame 4), and the second game stop release operation means is turning the power switch 932 ON/OFF. The first game stop release operation means may determine ON/OFF based on the detection result of a door opening sensor (specifically, a main body frame sensor, etc.). At this time, the first game stop release means releases the game stop by turning the power off and back on while opening the door. Note that the door only needs to be open when the power is turned on, and does not necessarily need to be in an open state before the power is turned on. For example, the power may be turned on at the same time as the door is opened.

Below, as a specific example of the first game stop release means, we will explain the control for releasing the game stop when the door is opened, while referring to the drawings and timing charts. Note that in each timing chart, the same events occur at the same time, so explanations of those events will be omitted as appropriate.

Figure 507 is a timing chart showing an example of control for canceling a game stop by turning the power back on when the door is opened. Figure 508 is a timing chart showing an example of control for not canceling a game stop by turning the power back on when the door is closed.

Referring to FIG. 508, at time t201, an abnormality occurs in the gaming machine, and play is forcibly stopped. At this time, a security signal is output to the outside. In the gaming machine of this embodiment, it is necessary to open the door and turn the power back on while play is stopped. Therefore, first the door is opened (time t202), the power is turned off (time t203), and then the power is turned back on (time t204).

The opening of the door can be detected by a door frame opening switch and a main frame opening switch (not shown), and a detection signal is output to the main control board 1310 via the payout control board 951. The door frame opening switch detects the opening of the door frame 3 relative to the main frame 4, and the main frame opening switch detects the opening of the main frame 4 relative to the outer frame 2. In this embodiment, when a detection signal (door open detection signal) is output from either switch, it is determined that the door is in an open state, but the opening of only one door (for example, the main frame 4) may be detected as the open state, or the open state may be recognized when a detection signal is output from both the door frame opening switch and the main frame opening switch. In addition, the contents of the main control RAM 1312 are maintained by the backup power supply from the time the power to the gaming machine is turned off until it is turned on again.

When the power is turned back on, the main control board 1310 starts the startup of the gaming machine, and releases the game stop state based on the door open detection signal during the initial setting process. At this time, the game stop state display unit is in an unlit state. After that, when the startup of the gaming machine is finished, a preparation period for transitioning to a normal gaming state (a state in which game can be started) begins (time t205). During the preparation period, the game stop state display unit is in a fully lit state. Note that the game stop state display unit may be in a fully lit state while the gaming machine is starting up. In this case, the light may be lit in a different manner during the preparation period than during startup. Also, the light lit manner of the game stop state display unit during the preparation period may be different from that when the RAM is cleared (when the gaming machine is started up while operating the RAM clear switch 954).

Here, we will add a supplement to the cancellation of the game stop. When the game is stopped due to an abnormality occurring in the gaming machine, the main control MPU 1311 sets a game stop flag in a predetermined area of the main control RAM 1312. Then, the power of the gaming machine is turned on again, and the game stop flag is cleared when the door open detection signal is detected when the gaming machine is started. In addition, while the game stop flag is set, the abnormality notification may be continued, and when the game stop flag is cleared, the abnormality notification (abnormal state notification period) may be forcibly ended (in the middle of the notification period). By configuring in this way, if an abnormality occurs after the power of the gaming machine is turned on again, the game stop flag is set again and the abnormality notification is started, so it is possible to immediately determine whether or not the game can be continued. If the abnormality notification continues, it is not possible to continue the game in the state before the power failure, so the RAM is cleared and the power is turned on again. In addition, if the abnormality notification has ended, it is possible to continue the game as it is.

When the preparation period ends (time t206), the main control board 1310 transitions to the normal game state. At this time, the game stop state display unit turns off to indicate that the game stop has been released, i.e., the normal state has been entered.

Also, referring to FIG. 508, the power is turned off and turned back on without opening the door. Therefore, the conditions for canceling the game suspension are not met, and the game suspension state continues even after the preparation period ends. Note that the power switch 932 may be located on the back of the gaming machine, but since it is possible to access the back of the gaming machine from the opposite side of the island, it is also possible to operate the power switch 932 without opening the door.

As described above, in the gaming machine of this embodiment, it is possible to attempt to cancel the game stop without clearing the RAM, so it is expected that the game will be able to continue from the state before the stop. Even if the game stop cannot be canceled, the game stop can be canceled by operating the RAM clear switch 954 to clear the RAM in the conventional procedure.

Therefore, unless the game is in a state where it is impossible to continue, it will be possible to continue playing even after the game has stopped, preventing a decline in interest in the game. It will also be possible to control the game to stop temporarily if minor malfunctions occur consecutively. For example, if a random number outside the generation range is obtained a predetermined number of times or more during random number generation in the special lottery mentioned above, it will be possible to temporarily stop play, check the state of the gaming machine, and then resume play without clearing the RAM.

[36-3-2. Canceling game suspension when changing/checking settings]
Next, a case where the setting is changed or the setting is confirmed when the game is resumed from the game stop will be described. Cancellation of the game stop by changing the setting corresponds to the fourth game stop cancellation means described above. First, the case where the setting is changed will be described, and then the case where the setting is confirmed will be described. Finally, a case where the door opening is set as the execution condition of the setting change function will be described.

In the gaming machine of this embodiment, the settings are changed by turning on the power while operating the setting key 971 and the RAM clear switch 954. Also, the settings are confirmed by turning on the power while operating the setting key 971 without operating the RAM clear switch 954.

(setting change)
Fig. 509 is a timing chart showing an example of control for executing a setting change while opening the door after a game is stopped. Fig. 510 is a timing chart showing an example of control for executing a setting change while opening the door after a game is stopped, and closing the door after the gaming machine is started. Fig. 511 is a timing chart showing an example of control for executing a setting change while closing the door after a game is stopped.

Referring to FIG. 509, as in the example shown in FIG. 507, game play is forcibly stopped at time t201. Furthermore, the door is opened (time t202), the power is turned off (time t203), and then the power is turned on while operating the setting key 971 and RAM clear switch 954 (time t204).

Furthermore, when the start-up of the gaming machine is completed, the setting change function is executed (time t205). At this time, a security signal is output, similar to when game play is stopped. While the setting change function is being executed, the game stop status display unit is in a display mode indicating that the setting change function is being executed, but it may also display the setting value itself. In the gaming machine of this embodiment, the setting value being changed (unconfirmed) is displayed in a flashing state, and the setting value is displayed in a display mode indicating that it is being changed.

Then, the setting key 971 is switched to OFF, and the setting change is completed (time t207), and the game transitions to a normal game state after a preparation period (time t208). During the preparation period, the game stop state display unit is in a state that indicates that the game is in the preparation period (for example, all lights are on).

The preparation period after the setting is changed may be different from the preparation period after the gaming machine is started. For example, during the preparation period after the setting is changed, the display mode of the game stop status display unit may be a high-speed flashing display rather than a full light. Also, the display mode may be different, such as by changing the brightness of the game stop status display unit, from when the setting value is being changed.

Next, in the example shown in FIG. 510, the period from time t201 to time t208 is the same as the example shown in FIG. 509. At the timing of time t208, the preparation period ends and the preparation process required to start playing is completed (play stop is released), but the door is not closed and the machine is in a standby state. After that, by closing the door, the machine is ready to start playing and transitions to the normal game state (time t209).

Finally, referring to FIG. 511, similar to the example shown in FIG. 509, after the game is forcibly stopped (time t201), the power is turned off with the door closed (time t203), and the power is turned on while operating the setting key 971 and RAM clear switch 954 (time t204).

Furthermore, when the start-up of the gaming machine is completed, the setting change function is executed (time t205). When the setting change is completed (time t207), a preparation period is passed and the game transitions to the normal gaming state (time t208).

In this way, even if the door is closed (without executing the first game stop release operation means), the game stop can be released by executing the setting change operation. This is because the main control RAM 1312 is cleared when the setting change is completed, in the same way as when the power is turned on while operating the RAM clear switch 954. Note that the game stop can also be released by the third game stop release means, which operates the RAM clear switch 954 to clear the main control RAM 1312, without executing the first game stop release operation means.

(Check the settings)
Next, the case of setting confirmation will be described. Fig. 512 is a timing chart showing an example of control for executing setting confirmation while opening the door after the game is stopped. Fig. 513 is a timing chart showing an example of control for executing setting confirmation while closing the door after the game is stopped.

Referring to FIG. 512, similar to the example shown in FIG. 507, game play is forcibly stopped at time t201. Furthermore, the door is opened (time t202), the power is turned off (time t203), and then the power is turned on while operating the setting key 971 (time t204). At this time, the power to the gaming machine is turned off and then turned back on with the door open, so that the first game stop release operation means has been executed.

When the gaming machine has finished booting up, the setting confirmation function is executed (time t205), and a security signal is output in the same way as when gameplay is stopped or when the setting change function is executed. While the setting confirmation function is being executed, the game stop status display unit is in a display mode indicating that the setting confirmation function is being executed, but it may also display the setting value itself. In the gaming machine of this embodiment, the set setting value is displayed in a different manner than when the setting value being changed is displayed.

After that, when the setting check is completed (time t207), because the first game stop release operation means was executed, the game transitions to the normal game state after a preparation period (time t208). Note that the duration of the preparation period may be the same as that of the setting change, or may be different.

Next, referring to FIG. 513, similar to the example shown in FIG. 512, after the game is forcibly stopped (time t201), the power is turned off with the door closed (time t203), and the power is turned on while the setting key 971 is being operated (time t204).

Furthermore, when the start-up of the gaming machine is completed, the setting confirmation function is executed (time t205). After that, the setting key 971 is switched to OFF and the setting confirmation is completed (time t207). Even though the preparation period has ended, the door is closed and the RAM has not been cleared, so the game stop release operation means has not been executed, and so the game stop is maintained (time t208).

Even when a setting check is performed, the game stop may be released in the same way as when the setting is changed. That is, the game stop may be released when a function related to the setting value of the gaming machine (a function that allows the setting value to be displayed) is executed. In this case, if only the setting value display function is executed, the game stop may be released without clearing the RAM, and if the setting value change function is executed, the RAM may be cleared. Also, if the setting value display function is executed, the RAM may be cleared in the same way as when the setting value change function is executed.

(When setting the door open as the starting condition for changing the settings)
Fig. 514 is a timing chart showing an example of control in which the opening of the door is the release condition for the game stop and the start condition for the setting change. In Fig. 514, an example of a state in which the door is closed will be described.

Referring to FIG. 514, similar to the example shown in FIG. 511, after the game is forcibly stopped (time t201), the power is turned off with the door closed (time t203), and the power is turned on while the setting key 971 is being operated (time t204).

At time t205, even though the start-up of the gaming machine is complete, the door is not opened, so the setting change function is not executed, and the suspension of gaming remains even after the end of the preparation period (time t206).

In the example shown in FIG. 514, the RAM clear switch 954 is operated by a setting change operation, but because the conditions for starting the setting change function are not met, the main control RAM 1312 is not cleared and game suspension is maintained, which differs from the example shown in FIG. 512.

The game stop state display unit may use an existing display unit, for example, a performance display monitor. When the game stop state display unit also serves as a performance display monitor, it displays a base value in the normal game state. In addition, when changing settings/checking settings, it may display a mode indicating that a function is being executed, or it may display the setting value itself. Furthermore, it is turned off when the gaming machine is started, and is fully lit during the preparation period after changing settings or checking settings. When game play is stopped, it may display the base value in the same way as in the normal game state, or it may be a display dedicated to when game play is stopped.

As described above, the gaming machine of this embodiment can resume play from the state before play stopped without clearing the RAM when play stops, which can help prevent a decline in interest in playing.

(Summary of inventions relating to recovery control from game stop)
Representative aspects of the invention relating to recovery control from a game stop disclosed in this specification include the following.

(1) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A game stop release means for releasing the stop of a game when the game is stopped;
A game stop release operation means that is operated to execute the game stop release means;
Equipped with
The game stop release operation means includes a game stop first release operation means (opening and closing a door) and a game stop second release operation means (power switch) different from the game stop first release operation means,
The game stop release means releases the stop of the game by operating the game stop second release operation means while operating the game stop first release operation means, and resumes the game from the point where the game was stopped.

In the configuration of (1), even if the progress of the game is stopped for some reason, it is possible to attempt to cancel the game stop without clearing the RAM, so it is expected that the game can be continued from the state before the stop. Even if the game stop cannot be canceled, it is not prevented from canceling the game stop by operating the RAM clear switch 954 and clearing the RAM in the conventional procedure. In addition, by operating multiple game stop cancellation operation means simultaneously, it is possible to prevent the game stop from being easily canceled and to prevent erroneous operation. Therefore, unless the game is in a state where it is impossible to continue, it is possible to continue the game even after the game has stopped, and it is possible to prevent a decrease in interest in the game. In addition, it is also possible to control the game to be temporarily stopped if minor malfunctions occur consecutively (Fig. 505, Fig. 506).

(2) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A setting change means capable of changing a setting value of the gaming machine;
A game stop release means for releasing the stop of a game when the game is stopped;
A game stop release operation means that is operated to execute the game stop release means;
Equipped with
The game stop release operation means includes a game stop first release operation means and a game stop second release operation means different from the game stop first release operation means,
The game stop release means releases the stop of the game by operating the game stop second release operation means while operating the game stop first release operation means, and resumes the game from the point in time when the game was stopped;
When the setting change means is executed while the game is stopped, the game stop is released without executing the game stop release means, and the game can be started after initialization instead of at the time when the game was stopped.

In the configuration (2), in addition to the same effect as the configuration (1), the game stop can be released by executing the setting change operation without executing the first game stop release operation means. This prevents the game from being resumed in the game state before the stop after the setting change, and enables stable game control, which prevents a decline in interest in the game (Figs. 509 to 511).

(3) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A game stop release means for releasing the stop of a game when the game is stopped;
A game stop release operation means that is operated to execute the game stop release means;
Equipped with
The game stop release operation means includes a game stop first release operation means and a game stop second release operation means different from the game stop first release operation means,
The game machine is characterized in that, when the game stop second release operation means is operated while the game stop first release operation means is being operated, the game stop release means releases the stop of game play after the operation of the game stop first release operation means and the game stop second release operation means is completed, and restarts game play from the point at which game play was stopped.

In the configuration (3), in addition to the same effect as the configuration (1), the timing for releasing the game suspension can be adjusted. This makes it possible to resume play at an appropriate time, and prevents a decrease in interest in the game due to the game being resumed at an unintended time (Fig. 510).

(4) A gaming machine that has a plurality of winning holes, executes a lottery based on a ball entering a starting hole, and generates a special gaming state based on the result of the lottery,
A prize ball awarding means for awarding prize balls based on the winning of the prize winning hole;
a first counting means for counting a first count value based on the number of game balls consumed in a game;
A second counting means for counting a second count value based on the winning balls;
A ball difference counting means for counting the ball difference for a predetermined period based on the first count value and the second count value;
A game stop means for stopping the progress of a game based on the counted difference in balls;
A game stop release means for releasing the stop of the progress of the game;
A game stop release operation means that is operated to execute the game stop release means;
Preparation,
The game stop release operation means includes a game stop first release operation means and a game stop second release operation means different from the game stop first release operation means,
The game machine is characterized in that, when the game stop second release operation means is operated while the game stop first release operation means is being operated, the game stop release means resumes the game from the point at which the game progress was stopped and initializes the first count value and the second count value.

The configuration of (4) is equipped with a game stop means (excessive prize ball suppression means) that stops the game when the difference between the expected balls dispensed (difference in balls) and the actual balls dispensed reaches a predetermined threshold value or more (excessive prize balls), thereby preventing excessive stimulation of gambling spirits. In addition, the game stop release means makes it possible to continue the game even after the game has stopped, preventing a decline in interest in the game (Figs. 503 and 505).

(5) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A setting confirmation means capable of confirming the setting values of the gaming machine;
A game stop release means for releasing the stop of a game when the game is stopped;
A game stop release operation means that is operated to execute the game stop release means;
Equipped with
When the setting confirmation means is executed while the game is stopped, the game will remain stopped after the setting confirmation is completed, whereas when the setting confirmation means is executed while the game stop release operation means is being operated, the game will be resumed from the point where the game was stopped after the setting confirmation is completed.

In the configuration of (5), when the progress of a game stops, it is possible to attempt to cancel the game stop without clearing the RAM, so that after checking the setting value, the game can be continued from the state before the game was stopped (Figs. 512 and 513). Note that "when the setting confirmation means is executed while the game is stopped" also applies to the case where the power to the gaming machine is turned off while the game is stopped, and then the setting confirmation function means is executed when the power is turned on again.

(6) A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
A setting change means capable of setting a setting value of the gaming machine;
A setting confirmation means capable of confirming the setting values of the gaming machine;
Equipped with
A gaming machine characterized in that, when the setting change means is executed while game play is stopped, the stop of game play is released and the gaming machine is initialized to enable game play to be resumed, while, when the setting confirmation means is executed, the stop of game play can be maintained even after setting confirmation is completed.

In the configuration of (6), if a setting change is executed when game play is stopped, game play can be resumed after reliable initialization, whereas if a setting check is executed, game play is maintained stopped after the setting value is checked, and it is possible to determine whether or not to resume game play as necessary. This allows for flexible operation since it is possible to check the state of the gaming machine before determining whether or not to resume game play (Figs. 511 and 513). Note that "when the setting change means is executed while game play is stopped" also applies to the case where the power to the gaming machine is turned off while game play is stopped, and then the setting change function means is executed when the power is turned back on.

The present invention has been described above with reference to preferred embodiments, but the present invention is not limited to these embodiments, and various improvements and design changes are possible without departing from the spirit of the present invention, as described below.

In other words, in the embodiment, the invention is primarily applied to a pachinko machine 1 as a gaming machine, but it is not limited to this and may also be applied to gaming machines other than pachislot machines, such as a gaming machine that combines a pachinko machine and a pachislot machine, and in this case as well, the same effects can be achieved.

1. Pachinko machine (amusement machine)
2 Outer frame 3 Door frame 4 Main body frame 5 Game board 5a Game area 931 Power supply board 932 Power switch (setting change mode confirmation means, setting change mode start means)
951 Payout control board (ball information control means)
954 RAM clear switch (setting change mode confirmation means, setting change mode start means)
971 Setting key (setting change mode confirmation means, setting change mode start means)
974 Setting display 1310 Main control board (game control means)
1311 Main control MPU (CPU, calculation means, calculation device, control means, master)
1312 Main control RAM (setting value information storage means)
1313 ROM
1314 Main control I/O port 1317 Role ratio display (base display, performance display monitor)
1400 Function display unit 1510 Peripheral control board (performance control means, performance control board)
1511 Peripheral control unit 1512 Performance display control unit 1600 Main liquid crystal display device (display device, performance display device, performance display means)
2002 First start port 2004 Second start port 2007 Counting ball entrance unit 2007b Counting ball entrance 4000 Slot machine (game machine)
4210 Start lever 4211 Reel stop button 4300 Pattern change display device 4301 Reel 4600 Main board (game control device, game control means)
4601 CPU
4602 ROM
4603 RAM
4700 Performance control board 4910 ROM area 4920 RAM area 4930 I/O area 4940 Parameter information setting area 6100 First area 6101 No mounting area 6102 Part mounting area 6200 Second area 6300 Inspection part mounting area 1341 Parallel-serial conversion circuit (slave)
1342, 1343, 1345, 1346 Serial-parallel conversion circuit (slave)
04TKK0010 Peripheral control IC (performance control means)
04TKK0011 CPU
04TKK0012 RAM
04TKK0030 Sound source IC
04TKK0040 Sound ROM
04TKK0060 VDP (image display control means, video control means)
04TKK0061 CG data decoder (image information conversion means)
04TKK0063 Pixel Shader (Image Processing Means)
04TKK0090 Image RAM (VRAM, temporary image storage means)
04TKK0091 Frame buffer 04TKK0092 Off-screen buffer 05TKK0013 Boot ROM
05TKK0020 External RAM (temporary storage means)
05TKK0070 Performance data ROM (image ROM, CG ROM, image information storage means)
05TKK0071 SATA controller (data management means)
05TKK0072 Cache memory (second storage medium)
05TKK0073 Storage device (first storage medium)
05TKK0101 Decode buffer (temporary storage means, common decode buffer, common buffer area, individual decode buffer)
06TKK0010 Memory controller 06TKK0020 RAM diagnostic circuit 06TKK0016, 06TKK0017 Termination resistor 06TKK0018, 06TKK0021 Terminal 06TKK0022 Memory device (storage element)

Claims (2)

A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
a prize medium awarding means for awarding a prize medium based on the winning of a prize;
a first counting means for counting a first count value based on the number of game media consumed in a game;
A second counting means for counting a second count value based on the number of the awarded prize media;
a game stopping means which is executed by a program stored in an area outside the area in which the program for controlling the progress of the game is stored, which counts a difference based on the first count value and the second count value, and executes a setting for stopping the progress of the game based on the counted difference value;
a game stop means for counting a difference between the first count value and the second count value and stopping a game based on the counted difference;
A game stop release means for releasing the stop of the game when the progress of the game is stopped;
An operation means for operating the game stop release means;
Equipped with
The operation means includes a first operation means and a second operation means different from the first operation means,
The game stop release means releases the stop of the game by operating the second operation means while operating the first operation means when the game progress is stopped by the game stop means, thereby making it possible to resume the game state that is in the stopped state. A gaming machine that executes a lottery when a start condition is satisfied and generates a special gaming state based on the result of the lottery,
a prize medium awarding means for awarding a prize medium based on the winning of a prize;
a first counting means for counting a first count value based on the number of game media consumed in a game;
A second counting means for counting a second count value based on the number of the awarded prize media;
a game stopping means which is executed by a program stored in an area outside the area in which the program for controlling the progress of the game is stored, which counts a difference based on the first count value and the second count value, and executes a setting for stopping the progress of the game based on the counted difference value;
A game stop release means for releasing the stop of the game when the progress of the game is stopped;
An operation means for operating the game stop release means;
Equipped with
The game stop release means enables the game progress in the stopped state to be resumed when the operation means is operated while the game progress is stopped by the game stopping means.

Images