JP7416779B2 - Transmitting device, receiving device, communication system - Google Patents

Description

The present disclosure relates to a transmitting device that transmits a signal, a receiving device that receives the signal, and a communication system that includes the transmitting device and the receiving device.

Electronic devices such as multifunctional mobile phones (smartphones) are equipped with various devices such as semiconductor chips, sensors, and display devices, and a large amount of data is transmitted and received between the devices. The amount of data transmitted and received between devices is increasing as electronic equipment becomes more sophisticated and multi-functional, so data is transmitted and received using, for example, a high-speed interface that can transmit and receive data at several Gbps.
Therefore, various techniques have been disclosed in order to improve communication performance in high-speed interfaces. For example, Patent Document 1 discloses a communication system that aims to improve communication performance in a high-speed interface by transmitting three differential signals using three transmission paths.

Japanese Patent Application Publication No. 06-261092

However, in a technology that transmits information using a plurality of differential signals, such as the technology disclosed in Patent Document 1, the elapsed time when transmitting the differential signals and the amount of change in the voltage of the differential signals As a result, the waveform quality of the differential signal deteriorates. This poses a problem in that jitter occurring in the signal transmitted from the transmitting device to the receiving device increases.

In view of the above problems, the present technology includes a transmitting device capable of reducing jitter that occurs in a signal transmitted from the transmitting device to the receiving device, a receiving device that receives the signal, and a transmitting device and a receiving device. The purpose is to provide a communication system.

A transmitting device according to one aspect of the present technology is a transmitting device including a transmitted signal converter and an encoder. The transmission signal converter converts a plurality of data signals into a plurality of symbols and transmits the symbols. The encoder receives input of at least one of the plurality of symbols, and controls drivers individually corresponding to each of the three or more transmission paths. The driver drives in a first mode in a first voltage state or a second voltage state having a different voltage level from the first voltage state.

A receiving device according to one aspect of the present technology is a receiving device including a plurality of receivers, a decoder section, and a clock generation section. The plurality of receivers individually correspond to each of the three or more transmission paths, and output digital values. The decoder section outputs symbols from a combination of a plurality of digital values respectively output from a plurality of receivers. The clock generation section generates a clock from a combination of digital values. Further, the plurality of receivers receive data signals driven in a first voltage state or a second voltage state having a different voltage level from the first voltage state in the first mode.

A communication system according to one aspect of the present technology is a communication system including a transmitting device and a receiving device. The transmitter includes a transmit signal converter that converts a plurality of data signals into a plurality of symbols and transmits the converted data; It includes an encoding unit that controls a corresponding driver. The driver drives in a first mode in a first voltage state or a second voltage state having a different voltage level from the first voltage state. The receiving device includes a plurality of receivers, a decoder section, and a clock generation section. The plurality of receivers individually correspond to each of the three or more transmission paths, and output digital values. The decoder section outputs symbols from a combination of a plurality of digital values respectively output from a plurality of receivers. The clock generation section generates a clock from a combination of digital values.

FIG. 1 is a diagram showing the configuration of a communication system. FIG. 2 is an explanatory diagram showing voltage states of signals transmitted and received by the communication system in single transmission mode. FIG. 2 is an explanatory diagram showing voltage states of signals transmitted and received by the communication system in differential transmission mode. FIG. 2 is an explanatory diagram showing the transition of transmission symbols transmitted and received by the communication system. FIG. 2 is a block diagram showing the configuration of a transmitter. FIG. 3 is a diagram showing parallel data. 3 is a table showing an example of an operation performed by an output unit. 3 is a table showing an example of an operation performed by an output unit. 3 is a table showing an example of an operation performed by an output unit. FIG. 2 is a block diagram showing a configuration example of an output section. FIG. 3 is a diagram showing serial data. FIG. 2 is a block diagram showing the configuration of a receiving section. FIG. 3 is an explanatory diagram showing an example of an operation performed by a receiving section in single transmission mode. FIG. 3 is an explanatory diagram illustrating an example of an operation performed by a receiving section in a differential transmission mode. FIG. 2 is an explanatory diagram showing voltage states of signals transmitted and received by the communication system. 3 is a table showing an example of an operation performed by an output unit. FIG. 3 is an explanatory diagram showing an example of an operation performed by a receiving section. 2 is an eye diagram schematically showing an example of characteristics of a communication system when the transmission mode is a differential transmission mode. 3 is a table showing an example of an operation performed by an output unit. 2 is an eye diagram schematically showing an example of characteristics of a communication system when the transmission mode is a single transmission mode. FIG. 1 is a perspective view showing the external configuration of a smartphone to which a communication system is applied. 1 is a block diagram illustrating a configuration example of an application processor to which a communication system is applied. FIG. 1 is a block diagram illustrating a configuration example of an image sensor to which a communication system is applied. FIG. FIG. 1 is a block diagram illustrating a configuration example of a vehicle control system to which a communication system is applied.

Embodiments of the present technology will be described below with reference to the drawings. In the description of the drawings, the same or similar parts are given the same or similar symbols, and overlapping explanations are omitted. Each drawing is schematic and may differ from the actual drawing. The embodiments shown below illustrate devices and methods for embodying the technical idea of the present technology, and the technical idea of the present technology is specific to the devices and methods illustrated in the embodiments below. It's not something you do. The technical idea of the present technology can be modified in various ways within the technical scope described in the claims.

(First embodiment)
The communication system 1 includes a transmitting device 10, a transmission path 100, and a receiving device 30, as shown in FIG.

The transmitting device 10 includes three output terminals Tout (output terminal ToutA, output terminal ToutB, and output terminal ToutC). The transmission line 100 includes three lines 110 (line 110A, line 110B, line 110C), each of which transmits a transmission signal of three bits or more one bit at a time. The receiving device 30 includes three input terminals Tin (input terminal TinA, input terminal TinB, and input terminal TinC).
The output terminal ToutA and the input terminal TinA are connected to each other via a line 110A. The output terminal ToutB and the input terminal TinB are connected to each other via a line 110B. The output terminal ToutC and the input terminal TinC are connected to each other via a line 110C. The characteristic impedance of the line 110A, the line 110B, and the line 110C is, for example, about 50 [Ω].
Further, the transmitting device 10 outputs a signal SIGA, which is a transmission signal, from an output terminal ToutA, a signal SIGB, which is a transmission signal, from an output terminal ToutB, and a signal SIGC, which is a transmission signal, from an output terminal ToutC.

The transmission path 100 uses signals SIGA, SIGB, and SIGC to transmit six transmission symbols "+x", "-x", "+y", "-y", "+z", and "-z". Convey the sequence (wire state). That is, the three lines (line 110A, line 110B, line 110C) function as one lane that transmits a sequence of six transmission symbols.
Further, a data signal including data formed by the transmission signals (signal SIGA, signal SIGB, signal SIGC) indicates a sequence of transmission symbols.

The receiving device 30 receives a signal SIGA through an input terminal TinA, a signal SIGB through an input terminal TinB, and a signal SIGC through an input terminal TinC.

As described above, the transmitting device 10 uses three or more transmission paths 100 to simultaneously transmit a three-bit or more transmission signal obtained by converting a data signal indicating a sequence of transmission symbols.
The communication system 1 also includes a transmitting device 10 that simultaneously transmits a transmission signal of 3 bits or more using three or more transmission paths 100, and a receiver that receives the transmission signal transmitted by the transmitting device 10 via the transmission path 100. A device 30 is provided.
In the first embodiment, as an example, a configuration will be described in which the transmission lines 100 are three (line 110A, line 110B, line 110C) and the transmission signal is 3 bits (signal SIGA, signal SIGB, signal SIGC).

Transmission modes in which the transmitting device 10 transmits a transmission signal to the receiving device 30 using the transmission path 100 include a single transmission mode (first mode) and a differential transmission mode (second mode).

In the single transmission mode, the signal SIGA, the signal SIGB, and the signal SIGC are each in one of two voltage states, the voltage state SH or the voltage state SL. Voltage state SH is a state (first voltage state) corresponding to high level voltage VH. Voltage state SL is a state (second voltage state) corresponding to low-level voltage VL, which is a voltage level lower than voltage state SH.
Hereinafter, the processing performed when transmitting six transmission symbols in the single transmission mode will be explained for each transmission symbol using FIG. 2A.

When transmitting the transmission symbol "+x", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SL. When transmitting the transmission symbol "-x", the signal SIGA is set to the voltage state SL, and the signal SIGB and the signal SIGC are set to the voltage state SH. When transmitting the transmission symbol "+y", the signal SIGA is set to the voltage state SL, the signal SIGB is set to the voltage state SH, and the signal SIGC is set to the voltage state SL. When transmitting the transmission symbol "-y", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SH. When transmitting the transmission symbol "+z", the signal SIGA and the signal SIGB are set to the voltage state SL, and the signal SIGC is set to the voltage state SH. When transmitting the transmission symbol "-z", the signal SIGA and the signal SIGB are set to the voltage state SH, and the signal SIGC is set to the voltage state SL.
Also, as shown in FIG. 2A, the values of the transmitted symbols change when moving from the current interval to the next interval.

In the differential transmission mode, the signals SIGA, SIGB, and SIGC are each in one of three voltage states: voltage state SH, voltage state SM, and voltage state SL. Voltage state SM is a state (third voltage state) corresponding to medium-level voltage VM, and is at a voltage level lower than voltage state SH and higher than voltage state SL. That is, in the differential transmission mode (second mode), the voltage states of three or more transmission lines 100 are different values.
Hereinafter, the process performed when transmitting six transmission symbols in the differential transmission mode will be explained for each transmission symbol using FIG. 2B.

When transmitting the transmission symbol "+x", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SM. When transmitting the transmission symbol "-x", the signal SIGA is set to the voltage state SL, the signal SIGB is set to the voltage state SH, and the signal SIGC is set to the voltage state SM. When transmitting the transmission symbol "+y", the signal SIGA is set to the voltage state SM, the signal SIGB is set to the voltage state SH, and the signal SIGC is set to the voltage state SL. When transmitting the transmission symbol "-y", the signal SIGA is set to the voltage state SM, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SH. When transmitting the transmission symbol "+z", the signal SIGA is set to the voltage state SL, the signal SIGB is set to the voltage state SM, and the signal SIGC is set to the voltage state SH. When transmitting the transmission symbol "-z", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SM, and the signal SIGC is set to the voltage state SL.
Also, as shown in FIG. 2B, the values of the transmitted symbols change when moving from the current interval to the next interval.

<Configuration of transmitter>
The transmitting device 10 includes a transmitting side clock generation section 11, a transmitting side processing section 12, and a transmitting section 20.

The transmitting side clock generation unit 11 is configured using, for example, a PLL (Phase Locked Loop), and generates a clock signal TxCK. The frequency of the clock signal TxCK is, for example, 2.5 [GHz].
Note that the frequency of the clock signal TxCK is not limited to 2.5 [GHz]. That is, for example, if the circuit in the transmitting device 10 is configured using a so-called half-rate architecture, the frequency of the clock signal TxCK can be set to 1.25 [GHz].
Further, the transmitting side clock generating unit 11 generates a clock signal TxCK based on, for example, a reference clock (not shown) supplied from outside the transmitting device 10. Then, the transmission side clock generation section 11 supplies the generated clock signal TxCK to the transmission side processing section 12 and the transmission section 20.

The transmission side processing unit 12 generates transition signals TxF0 to TxF6, transition signals TxR0 to TxR6, and transition signals TxP0 to TxP6 by performing predetermined processing. Here, one set of transition signals TxF0, TxR0, and TxP0 indicates transitions of transmission symbols in a sequence of transmission symbols transmitted by transmitting device 10. Similarly, one set of transition signals TxF1, TxR1, TxP1 indicates transitions of transmitted symbols, one set of transition signals TxF2, TxR2, TxP2 indicates transitions of transmitted symbols, and one set of transition signals TxF3, TxR3, TxP3 indicates transitions of transmitted symbols. It shows the transition of transmitted symbols. Further, one set of transition signals TxF4, TxR4, TxP4 indicates transitions of transmission symbols, one set of transition signals TxF5, TxR5, TxP5 indicates transitions of transmission symbols, and one set of transition signals TxF6, TxR6, TxP6 indicates transmission symbol transitions. Shows symbol transitions.
That is, the transmitting side processing unit 12 generates seven sets of transition signals. In the following description, transition signals TxF, TxR, and TxP will be used as appropriate to represent any one of the seven sets of transition signals.

The relationship between the transition signals TxF, TxR, and TxP and the transition of the transmission symbol is as shown in FIG. 3. Note that the three-digit numerical value attached to each transition indicates the values of the transition signals TxF, TxR, and TxP in this order.
The transition signal TxF (Flip) transmits transmission symbols between "+x" and "-x", between "+y" and "-y", and between "+z" and "-z", respectively. Transition. Specifically, when the transition signal TxF is "1", the polarity of the transmitted symbol is changed (for example, from "+x" to "-x"), and when the transition signal TxF is "0", the polarity of the transmitted symbol is changed (for example, from "+x" to "-x"). In some cases, such transitions are not made.
When the transition signal TxF is "0", the transition signal TxR (Rotation) and the transition signal TxP (Polarity) are between "+x" and other than "-x", and "+y" and other than "-y". During this period, the transmission symbol is made to transition between "+z" and other than "-z". Specifically, when the transition signals TxR and TxP are "1" and "0", the polarity of the transmitted symbol is maintained clockwise in FIG. 3 (for example, from "+x" to "+y"). When the transition signals TxR and TxP are "1" and "1", the polarity of the transmitted symbol is changed and the transition is made clockwise in FIG. 3 (for example, from "+x" to "-y"). do. In addition, when the transition signals TxR and TxP are "0" and "0", the polarity of the transmitted symbol is maintained while transitioning counterclockwise in FIG. 3 (for example, from "+x" to "+z"), When the transition signals TxR and TxP are "0" and "1", the polarity of the transmitted symbol is changed and the transition is made counterclockwise in FIG. 3 (for example, from "+x" to "-z").
The transmitting side processing unit 12 generates seven sets of transition signals TxF, TxR, and TxP. Then, the transmitting side processing unit 12 supplies the generated seven sets of transition signals TxF, TxR, and TxP (transition signals TxF0 to TxF6, TxR0 to TxR6, and TxP0 to TxP6) to the transmitting unit 20.

The transmitter 20 generates a signal SIGA, a signal SIGB, and a signal SIGC based on the transition signals TxF0 to TxF6, the transition signals TxR0 to TxR6, and the transition signals TxP0 to TxP6.
Further, the transmitter 20 includes a first serializer 21F, a second serializer 21R, a third serializer 21P, a transmission symbol generator 22, and an output unit 26, as shown in FIG.

The first serializer 21F serializes the transition signals TxF0 to TxF6 in numerical order based on the transition signals TxF0 to TxF6 and the clock signal TxCK to generate a transition signal TxF9.
The second serializer 21R serializes the transition signals TxR0 to TxR6 in numerical order based on the transition signals TxR0 to TxR6 and the clock signal TxCK to generate a transition signal TxR9.
The third serializer 21P serializes the transition signals TxP0 to TxP6 in numerical order based on the transition signals TxP0 to TxP6 and the clock signal TxCK to generate a transition signal TxP9.

The transmission symbol generation section 22 includes a signal generation section 23 and a transmission side flip-flop 24. Furthermore, the transmission symbol generation unit 22 generates a transmission symbol signal Tx1, a transmission symbol signal Tx2, and a transmission symbol signal Tx3 based on the transition signal TxF9, the transition signal TxR9, the transition signal TxP9, and the clock signal TxCK. .
The transmission symbol signal Tx1 is, for example, A group of parallel data (parallel array data).
The transmission symbol signal Tx2 is, for example, parallel data of group B shown as "D1", "D4", "D7", "D10", "D13", "D16", and "D19" in FIG.
The transmission symbol signal Tx3 is, for example, C group parallel data shown as "D2", "D5", "D8", "D11", "D14", "D17", and "D20" in FIG.

The signal generation unit 23 generates a transmission symbol signal Tx1 and a transmission symbol signal based on the transition signal TxF9, the transition signal TxR9, the transition signal TxP9, the transmission symbol signal D1, the transmission symbol signal D2, and the transmission symbol signal D3. Tx2 and a transmission symbol signal Tx3 are generated. Specifically, the signal generation unit 23 generates the signals as shown in FIG. 3 based on the transmission symbols (transmission symbols DS before transition) indicated by the transmission symbol signals D1, D2, and D3 and the transition signals TxF9, TxR9, and TxP9. Then, the transmitted symbol NS after the transition is detected. Further, the signal generation section 23 outputs the detected transmission symbol NS to the transmission side flip-flop 24 and the output section 26 as transmission symbol signals Tx1, Tx2, and Tx3.
Therefore, the transmitted symbol signals Tx1, Tx2, Tx3 are encoded transmitted signals.

The transmission side flip-flop 24 samples transmission symbol signals Tx1, Tx2, and Tx3 based on the clock signal TxCK. Then, the transmission side flip-flop 24 outputs the sampling results as transmission symbol signals D1, D2, and D3, respectively.
FIG. 6 shows the transmission symbol NS generated based on the transmission symbol DS indicated by the transmission symbol signals D1, D2, and D3 and the transition signals TxF9, TxR9, and TxP9.

As shown in FIG. 6, when the transmission symbol DS is "+x" and the transition signals TxF9, TxR9, and TxP9 are "000", the transmission symbol NS is "+z".
When the transition signals TxF9, TxR9, and TxP9 are "001", the transmission symbol NS is "-z". When the transition signals TxF9, TxR9, and TxP9 are "010", the transmission symbol NS is "+y". When the transition signals TxF9, TxR9, and TxP9 are "011", the transmission symbol NS is "-y". When the transition signals TxF9, TxR9, and TxP9 are "1xx", the transmission symbol NS is "-x".
Here, "x" indicates that it may be either "1" or "0". This is the same when the transmission symbol DS is “-x”, “+y”, “-y”, “+z”, and “-z”. .
As a result, the state of the symbol (transmission symbol) is one of the six types of wire states (“+x”, “-x”, “+y”, “-y”, “+z”, “-z”). Transition to one state. Further, boundaries where the wire state changes exist at the boundaries of all symbols. Furthermore, there are five types of wire states (for example, "-x", "+y", "-y", "+z", "-z") are always present. Also, the value of the symbol is defined by the change in wire state from the current interval to the next interval.

The output unit 26 generates a signal SIGA, a signal SIGB, and a signal SIGC based on the transmission symbol signal Tx1, the transmission symbol signal Tx2, the transmission symbol signal Tx3, and the clock signal TxCK.
The process by which the output unit 26 generates the signal SIGA, signal SIGB, and signal SIGC differs depending on whether the transmission mode is single transmission mode or differential transmission mode.

Hereinafter, the process by which the output unit 26 generates the signal SIGA, signal SIGB, and signal SIGC when the transmission mode is the single transmission mode will be described with reference to FIG. 7.
When transmission symbol signals Tx1, Tx2, and Tx3 are "100", signal SIGA is set to voltage state SH (e.g., high level voltage VH), and signals SIGB and SIGC are set to voltage state SL (e.g., low level voltage VL). ). That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "100", the output unit 26 generates the transmission symbol "+x".
When the transmission symbol signals Tx1, Tx2, and Tx3 are "011", the signal SIGA is set to the voltage state SL, and the signals SIGB and SIGC are set to the voltage state SH. That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "011", the output unit 26 generates the transmission symbol "-x".
When the transmission symbol signals Tx1, Tx2, and Tx3 are "010", the signals SIGA and SIGC are set to the voltage state SL, and the signal SIGB is set to the voltage state SH. That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "010", the output unit 26 generates the transmission symbol "+y".
When the transmission symbol signals Tx1, Tx2, and Tx3 are "101", the signals SIGA and SIGC are set to the voltage state SH, and the signal SIGB is set to the voltage state SL. That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "101", the output unit 26 generates the transmission symbol "-y".
When the transmission symbol signals Tx1, Tx2, and Tx3 are "001", the signals SIGA and SIGB are set to the voltage state SL, and the signal SIGC is set to the voltage state SH. That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "001", the output unit 26 generates the transmission symbol "+z".
When the transmission symbol signals Tx1, Tx2, and Tx3 are "110", the signals SIGA and SIGB are set to the voltage state SH, and the signal SIGC is set to the voltage state SL. That is, when the transmission symbol signals Tx1, Tx2, and Tx3 are "110", the output unit 26 generates the transmission symbol "-z".

Next, the process by which the output unit 26 generates the signal SIGA, signal SIGB, and signal SIGC when the transmission mode is the differential transmission mode will be described with reference to FIG. 8.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "100", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SM (for example, medium-level voltage VM). Thus, a transmission symbol “+x” is generated.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "011", the signal SIGA is set to the voltage state SL, the signal SIGB is set to the voltage state SH, and the signal SIGC is set to the voltage state SM, so that the transmission symbol "-x" ” is generated.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "010", the transmission symbol "+y" is set by setting the signal SIGA to the voltage state SM, the signal SIGB to the voltage state SH, and the signal SIGC to the voltage state SL. generate.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "101", the signal SIGA is set to the voltage state SM, the signal SIGB is set to the voltage state SL, and the signal SIGC is set to the voltage state SH, thereby transmitting the symbol "-y". ” is generated.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "001", the signal SIGA is set to the voltage state SL, the signal SIGB is set to the voltage state SM, and the signal SIGC is set to the voltage state SH, so that the transmission symbol "+z" is set. generate.
When the transmission symbol signals Tx1, Tx2, and Tx3 are "110", the signal SIGA is set to the voltage state SH, the signal SIGB is set to the voltage state SM, and the signal SIGC is set to the voltage state SL, thereby transmitting the symbol "-z". ” is generated.

The detailed configuration of the output section 26 will be described below.
As shown in FIG. 9, the output section 26 includes a first parallel-serial conversion circuit 70A, a second parallel-serial conversion circuit 70B, and a third parallel-serial conversion circuit 70C. Further, the output unit 26 includes a first single mode data generating unit 72A, a second single mode data generating unit 72B, a third single mode data generating unit 72C, a first differential mode data generating unit 74A, and a second differential mode data generating unit 72A. It includes a mode data generation section 74B and a third differential mode data generation section 74C. In addition, the output section 26 includes a first mode selection section 76A, a second mode selection section 76B, a third mode selection section 76C, a first driver section 78A, a second driver section 78B, and a third driver section. 78C.

The first parallel-serial conversion circuit 70A receives the transmission symbol signal Tx1, which is parallel data (TxF9). In addition, the first parallel-serial conversion circuit 70A converts the parallel data of group A, which is the received transmission symbol signal Tx1, into "D0", "D3", "D6", "D9", "D12", "D15" and "D18" (serial array data). The first parallel-serial conversion circuit 70A then transmits the transmission symbol signal Tx1 converted into serial data to a first single mode data generation section 72A, a first differential mode data generation section 74A, and a second differential mode data generation section 74B. Output to. Note that, as shown in FIG. 10, the serial data is output at a timing corresponding to the PLL clock.
The second parallel-serial conversion circuit 70B receives the transmission symbol signal Tx2, which is parallel data (TxR9). Further, the second parallel-serial conversion circuit 70B converts the parallel data of group B, which is the received transmission symbol signal Tx2, into "D1", "D4", "D7", "D10", "D13", " It is converted into serial data indicated as "D16" and "D19". Then, the second parallel-serial conversion circuit 70B transmits the transmission symbol signal Tx2 converted into serial data to a second single mode data generation section 72B, a second differential mode data generation section 74B, and a third differential mode data generation section 74C. Output to.
The third parallel-serial conversion circuit 70C receives the transmission symbol signal Tx3, which is parallel data (TxP9). Further, the third parallel-serial conversion circuit 70C converts the parallel data of group C, which is the received transmission symbol signal Tx3, into "D2", "D5", "D8", "D11", "D14", " The data is converted into serial data indicated as "D17" and "D20". Then, the third parallel-serial conversion circuit 70C transmits the transmission symbol signal Tx3 converted into serial data to a third single mode data generation section 72C, a first differential mode data generation section 74A, and a third differential mode data generation section 74C. Output to.

The first single mode data generation unit 72A performs the following processing in accordance with the 1-bit transmission signal included in the serial data of the received transmission symbol signal Tx1, and generates a corresponding transmission path and a transmission path of the signal SIGA. The voltage state of the line 110A is controlled.
When the 1-bit transmission signal corresponds to the transmission symbols "+x", "-y", "-z", the line 110A is set to the voltage state SH, and the 1-bit transmission signal corresponds to the transmission symbols "-x", "-z". +y” and “+z”, the line 110A is set to voltage state SL.

The second single mode data generation unit 72B performs the following processing in accordance with the 1-bit transmission signal included in the serial data of the received transmission symbol signal Tx2, and generates a corresponding transmission path and a transmission path of the signal SIGB. The voltage state of the line 110B is controlled.
When the 1-bit transmission signal corresponds to the transmission symbols "-x", "+y", "-z", the line 110B is set to the voltage state SH, and the 1-bit transmission signal corresponds to the transmission symbols "+x", "-z". y", "+z", the line 110B is set to voltage state SL.

The third single mode data generation unit 72C performs the following processing according to the 1-bit transmission signal included in the serial data of the received transmission symbol signal Tx3, and generates a corresponding transmission path and a transmission path of the signal SIGC. The voltage state of the line 110C is controlled.
When the 1-bit transmission signal corresponds to the transmission symbols "-x", "-y", "+z", the line 110C is set to the voltage state SH, and the 1-bit transmission signal corresponds to the transmission symbols "+x", "+y". ”, “-z”, the line 110C is set to voltage state SL.

As explained above, the single-mode data generating units 72, which have the same number as the transmission lines 100 that individually correspond to each of the three or more transmission lines 100, generate data in response to only the 1-bit transmission signal input thereto. , the corresponding transmission lines are placed in a first voltage state (for example, voltage state SH) or a second voltage state (for example, voltage state SL) having different voltage levels.

In addition, in the first embodiment, the same number of single mode data generating sections 72 as the transmission paths are a first single mode data generating section 72A, a second single mode data generating section 72B, and a third single mode data generating section 72C. .
In the first embodiment, the same number of single mode data generation units 72 as the transmission lines set two of the three transmission lines to the first voltage state, and set the remaining one of the transmission lines to the second voltage state. Let me explain the case.

Further, in the first embodiment, the single mode data generation unit 72 generates the corresponding transmission path 100 in response to only a 1-bit transmission signal that is encoded as parallel data, converted to serial data, and input to itself. The first voltage state or the second voltage state is set.
Further, in the first embodiment, one of the first voltage state and the second voltage state (for example, voltage state SH) is at a voltage level higher than the comparison voltage (Vcm) used on the receiving device 30 side. Note that the comparison voltage (Vcm) will be explained later. In addition, the other of the first voltage state and the second voltage state (for example, voltage state SL) is at a voltage level lower than the comparison voltage (Vcm).

The first differential mode data generation unit 74A performs the following processing in accordance with the 2-bit transmission signal included in the serial data of the received transmission symbol signal Tx1 and transmission symbol signal Tx3, and generates a corresponding transmission path, The voltage state of the line 110A, which is a transmission line for the signal SIGA, is controlled.
When the 2-bit transmission signal corresponds to the transmission symbols "+x" and "-z", the line 110A is set to the voltage state SH, and the 2-bit transmission signal corresponds to the transmission symbols "+y" and "-y". In this case, the line 110A is in the voltage state SM. Further, when the 2-bit transmission signal corresponds to the transmission symbols "-x" and "+z", the line 110A is set to the voltage state SL.

The second differential mode data generation unit 74B performs the following processing according to the 2-bit transmission signal included in the serial data of the received transmission symbol signal Tx1 and transmission symbol signal Tx2, and is a corresponding transmission path, The voltage state of line 110B, which is a transmission line for signal SIGB, is controlled.
When the 2-bit transmission signal corresponds to the transmission symbols "-x" and "+y", the line 110B is set to the voltage state SH, and when the serial data corresponds to the transmission symbols "+z" and "-z", the line 110B is set to the voltage state SH. , line 110B is in voltage state SM. Further, when the 2-bit transmission signal corresponds to the transmission symbols "+x" and "-y", the line 110B is set to the voltage state SL.

The third differential mode data generation unit 74C performs the following processing according to the 2-bit transmission signal included in the serial data of the received transmission symbol signal Tx2 and transmission symbol signal Tx3, and the corresponding transmission path, The voltage state of the line 110C, which is a transmission line for the signal SIGC, is controlled.
When the 2-bit transmission signal corresponds to the transmission symbols "-y" and "+z", the line 110C is set to the voltage state SH, and the 2-bit transmission signal corresponds to the transmission symbols "+x" and "-x". In this case, the line 110C is set to the voltage state SM. Further, when the 2-bit transmission signal corresponds to the transmission symbols "+y" and "-z", the line 110C is set to the voltage state SL.

As explained above, the differential mode data generation units 74, which have the same number as the transmission lines 100, convert the corresponding transmission lines 100 into third data generators with different voltage levels, depending on the 2-bit transmission signal input to themselves. The voltage state is one of a voltage state (for example, voltage state SH), a fourth voltage state (for example, voltage state SL), and a fifth voltage state (for example, voltage state SM).
In addition, in the first embodiment, the same number of differential mode data generating sections 74 as the transmission paths 100 are a first differential mode data generating section 74A, a second differential mode data generating section 74B, and a third differential mode data generating section. It is 74C.

The first mode selection unit 76A selects a transmission mode in which a transmission signal is transmitted using the line 110A from a single transmission mode and a differential transmission mode, for example, in response to a command signal input from the outside. When the single transmission mode is selected as the transmission mode, the first single mode data generation unit 72A transmits the transmission signal using the transmission line (line 110A) set in the first voltage state or the second voltage state. The transmission signal is output to the first driver section 78A. On the other hand, when the differential transmission mode is selected as the transmission mode, the first differential mode data generation section 74A sets the transmission line (line 110A) in one of the third voltage state, the fourth voltage state, and the fifth voltage state. The transmission signal is outputted to the first driver section 78A by transmitting the transmission signal using the first driver section 78A.
The second mode selection unit 76B selects a transmission mode in which the transmission signal is transmitted using the line 110B from the single transmission mode and the differential transmission mode, for example, in response to a command signal input from the outside. When the single transmission mode is selected as the transmission mode, the second single mode data generation unit 72B transmits the transmission signal using the transmission line (line 110B) set in the first voltage state or the second voltage state. The transmission signal is output to the second driver section 78B. On the other hand, when the differential transmission mode is selected as the transmission mode, the second differential mode data generation section 74B sets the transmission line (line 110B) in one of the third voltage state, the fourth voltage state, and the fifth voltage state. The transmission signal is outputted to the second driver section 78B by using the transmission signal to transmit the transmission signal.

The third mode selection unit 76C selects a transmission mode in which the transmission signal is transmitted using the line 110C from the single transmission mode and the differential transmission mode, for example, in response to a command signal input from the outside. When the single transmission mode is selected as the transmission mode, the third single mode data generation unit 72C transmits the transmission signal using the transmission line (line 110C) in the first voltage state or the second voltage state. The transmission signal is output to the third driver section 78C. On the other hand, when the differential transmission mode is selected as the transmission mode, the third differential mode data generation section 74C sets the transmission line (line 110C) in one of the third voltage state, the fourth voltage state, and the fifth voltage state. The transmission signal is outputted to the third driver section 78C by transmitting the transmission signal using the transmission signal.
As described above, the mode selection unit 76 selects a single transmission mode in which the transmission signal is transmitted using the transmission line 100 set in the first voltage state or the second voltage state by the single mode data generation unit 72, and a differential mode data generation mode. The unit 74 selects a differential transmission mode in which the transmission signal is transmitted using the transmission line 100 in one of the third voltage state, the fourth voltage state, and the fifth voltage state.

The first driver section 78A has an output terminal connected to the output terminal ToutA, and outputs the signal SIGA from the output terminal ToutA to the input terminal TinA via the line 110A in the transmission mode selected by the first mode selection section 76A. do.
Further, the first driver section 78A includes, for example, a transistor (for example, an N-channel MOS (Metal Oxide Semiconductor) type FET (Field Effect Transistor), etc.) and a resistance element. This configuration is the same for the second driver section 78B and the third driver section 78C.
The second driver section 78B has an output terminal connected to the output terminal ToutB, and outputs the signal SIGB from the output terminal ToutB to the input terminal TinB via the line 110B in the transmission mode selected by the second mode selection section 76B. do.
The third driver section 78C has an output terminal connected to the output terminal ToutC, and outputs the signal SIGC from the output terminal ToutC to the input terminal TinC via the line 110C in the transmission mode selected by the third mode selection section 76C. do.

<Configuration of receiving device>
The receiving device 30 includes a receiving section 40 and a receiving side processing section 32.

The receiving unit 40 receives the signals SIGA, SIGB, and SIGC, and generates transition signals RxF, RxR, and RxP and a clock signal RxCK based on the received signals SIGA, SIGB, and SIGC.
Further, as shown in FIGS. 11 and 12, the receiving section 40 includes, for example, resistive elements 41A, 41B, and 41C, switches 42A, 42B, and 42C, amplifiers 43A, 43B, and 43C, and a receiving side clock generation section 44. It is equipped with In addition, the receiving section 40 includes a first flip-flop 45 on the receiving side, a second flip-flop 46 on the receiving side, and a signal generating section 47. Further, the receiving section 40 includes switches 48A to 48G and an input terminal 49 for a comparison voltage (Vcm).

The circuit configuration of the receiving unit 40 is switched to a different configuration by switching the switches 42A to 42C and the switches 48A to 48G between on and off states depending on whether the transmission mode is the single transmission mode or the differential transmission mode.
The resistance values of the resistance elements 41A, 41B, and 41C are, for example, about 50 [Ω].
One end of the resistance element 41A is connected to the input terminal TinA, and is supplied with the signal SIGA. The other end of the resistance element 41A is connected to one end of the switch 42A. One end of the resistance element 41B is connected to the input terminal TinB, and is supplied with the signal SIGB. The other end of resistance element 41B is connected to one end of switch 42B. One end of the resistance element 41C is connected to the input terminal TinC, and is supplied with the signal SIGC. The other end of the resistance element 41C is connected to one end of the switch 42C.

One end of the switch 42A is connected to the other end of the resistive element 41A, and the other end of the switch 42A is connected to the other ends of the switch 42B, the switch 42C, and one end of the switch 48A. One end of the switch 42B is connected to the other end of the resistance element 41B, and the other end of the switch 42B is connected to the other ends of the switch 42A and the switch 42C, and one end of the switch 48A. One end of the switch 42C is connected to the other end of the resistive element 41C, and the other end of the switch 42C is connected to the other ends of the switches 42A and 42B, and one end of the switch 48A.
With the above-described configuration, in the receiving device 30, when the transmission mode is the differential transmission mode, the switches 42A, 42B, and 42C are set to the on state, and the switch 48A is set to the off state, as shown in FIG. 12B. Ru. Thereby, the resistive elements 41A to 41C function as terminating resistors of the communication system 1.

The circuit configuration and operation of the receiving section 40 when the transmission mode is the single transmission mode will be described below.
As shown in FIG. 12A, the positive input terminal of the amplifier 43A is connected to one end of the resistive element 41A, and is supplied with the signal SIGA. The negative input terminal of the amplifier 43A is connected to the negative input terminal of the amplifier 43B and the negative input terminal of the amplifier 43C, and is supplied with the comparison voltage Vcm. The positive input terminal of the amplifier 43B is connected to one end of the resistive element 41B, and is supplied with the signal SIGB. The negative input terminal of the amplifier 43B is connected to the negative input terminal of the amplifier 43A and the negative input terminal of the amplifier 43C, and is supplied with the comparison voltage Vcm. The positive input terminal of the amplifier 43C is connected to one end of the resistive element 41C, and is supplied with the signal SIGC. The negative input terminal of the amplifier 43C is connected to the negative input terminal of the amplifier 43A and the negative input terminal of the amplifier 43B, and is supplied with the comparison voltage Vcm.
With the above-described configuration, the amplifier 43A outputs a signal according to the signal SIGA, the amplifier 43B outputs a signal according to the signal SIGB, and the amplifier 43C outputs a signal according to the signal SIGC.
When the transmission mode is the single transmission mode, the operation of the amplifiers 43A, 43B, and 43C when the receiving unit 40 receives the transmission symbol "+x" is, for example, the operation shown in FIG. 12A. Note that the switches 42A, 42B, and 42C are not shown because they are in the on state. In this example, signal SIGA is at high level voltage VH, and signal SIGB and signal SIGC are at low level voltage VL. Since the high level voltage VH is supplied to the positive input terminal of the amplifier 43A and the comparison voltage Vcm is supplied to the negative input terminal, the amplifier 43A outputs "1". Further, since the low level voltage VL is supplied to the positive input terminal of the amplifier 43B and the comparison voltage Vcm is supplied to the negative input terminal, the amplifier 43B outputs "0". Further, since the low level voltage VL is supplied to the positive input terminal of the amplifier 43C and the comparison voltage Vcm is supplied to the negative input terminal, the amplifier 43C outputs "0".
Next, the circuit configuration and operation of the receiving section 40 when the transmission mode is the differential transmission mode will be described.
As shown in FIG. 12B, the positive input terminal of the amplifier 43A is connected to the negative input terminal of the amplifier 43C and one end of the resistive element 41A, and is supplied with the signal SIGA. The negative input terminal of the amplifier 43A is connected to the positive input terminal of the amplifier 43B and one end of the resistive element 41B, and is supplied with the signal SIGB. The positive input terminal of the amplifier 43B is connected to the negative input terminal of the amplifier 43A and one end of the resistance element 41B, and is supplied with the signal SIGB. The negative input terminal of the amplifier 43B is connected to the positive input terminal of the amplifier 43C and one end of the resistive element 41C, and is supplied with the signal SIGC. The positive input terminal of the amplifier 43C is connected to the negative input terminal of the amplifier 43B and one end of the resistive element 41C, and is supplied with the signal SIGC. The negative input terminal of the amplifier 43C is connected to the positive input terminal of the amplifier 43A and the resistance element 41A, and is supplied with the signal SIGA.
With the above-described configuration, the amplifier 43A outputs a signal corresponding to the difference AB (SIGA-SIGB) between the signal SIGA and the signal SIGB, and the amplifier 43B outputs a signal according to the difference BC (SIGB-SIGC) between the signal SIGB and the signal SIGC. Outputs the corresponding signal. Similarly, the amplifier 43C outputs a signal according to the difference CA (SIGC-SIGA) between the signal SIGC and the signal SIGA.

When the transmission mode is the differential transmission mode, the operations of the amplifiers 43A, 43B, and 43C when the receiving unit 40 receives the transmission symbol "+x" are, for example, the operations shown in FIG. 12B. Note that the switches 42A, 42B, and 42C are not shown because they are in the on state. In this example, the signal SIGA is a high level voltage VH, the signal SIGB is a low level voltage VL, and the signal SIGC is a medium level voltage VM. In this case, the current Iin flows through the input terminal TinA, the resistance element 41A, the resistance element 41B, and the input terminal TinB in this order. Since the high level voltage VH is supplied to the positive input terminal of the amplifier 43A and the low level voltage VL is supplied to the negative input terminal, the amplifier 43A outputs "Strong1". Further, since the low level voltage VL is supplied to the positive input terminal of the amplifier 43B and the medium level voltage VM is supplied to the negative input terminal, the amplifier 43B outputs "Weak0". Further, since the medium level voltage VM is supplied to the positive input terminal of the amplifier 43C and the high level voltage VH is supplied to the negative input terminal, the amplifier 43C outputs "Weak0".

The receiving side clock generating section 44 generates a clock signal RxCK based on the output signals of the amplifiers 43A, 43B, and 43C.
The first flip-flop 45 on the receiving side delays the output signals of the amplifiers 43A, 43B, and 43C by one clock of the clock signal RxCK, and outputs the delayed signals. The second flip-flop 46 on the receiving side delays the three output signals of the first flip-flop 45 on the receiving side by one clock of the clock signal RxCK, and outputs the delayed signals, respectively.
The signal generation unit 47 generates transition signals RxF, RxR, and RxP based on the output signal of the first flip-flop 45 on the receiving side, the output signal of the second flip-flop 46 on the receiving side, and the clock signal RxCK. Transition signals RxF, RxR, and RxP correspond to transition signals TxF9, TxR9, and TxP9 in the transmitting device 10, respectively, and represent transitions of transmission symbols. The signal generation unit 47 identifies the transition of the transmission symbol based on the transmission symbol indicated by the output signal of the first flip-flop 45 on the reception side and the transmission symbol indicated by the output signal of the second flip-flop 46 on the reception side, and generates a transition signal. Generate RxF, RxR, and RxP.
The receiving side processing unit 32 performs predetermined processing based on the transition signals RxF, RxR, RxP and the clock signal RxCK.

<Operation/effect>
Hereinafter, the operations performed by the transmitting device 10 and the communication system 1, and the effects of the operations performed by the transmitting device 10 and the communication system 1 will be described using FIGS. 13 to 18 while referring to FIGS. 1 to 12.
(Overview of overall operation)

First, an overview of the overall operation of the communication system 1 will be explained.
In the transmitting device 10, a transmitting side clock generating section 11 generates a clock signal TxCK. Then, the transmission side processing unit 12 performs predetermined processing to generate transition signals TxF0 to TxF6, TxR0 to TxR6, and TxP0 to TxP6. Furthermore, in the transmitter 20, the first serializer 21F generates a transition signal TxF9 based on the transition signals TxF0 to TxF6 and the clock signal TxCK. Further, the second serializer 21R generates a transition signal TxR9 based on the transition signals TxR0 to TxR6 and the clock signal TxCK. In addition, the third serializer 21P generates a transition signal TxP9 based on the transition signals TxP0 to TxP6 and the clock signal TxCK. Then, the transmission symbol generation unit 22 generates transmission symbol signals Tx1, Tx2, and Tx3 based on the transition signals TxF9, TxR9, and TxP9 and the clock signal TxCK.
Further, in the transmitting device 10, the output unit 26 generates a signal SIGA, a signal SIGB, and a signal SIGC, and outputs the signal to the receiving device 30.

In the receiving device 30, the receiving unit 40 receives the signals SIGA, SIGB, and SIGC, and generates the transition signals RxF, RxR, and RxP and the clock signal RxCK based on the signals SIGA, SIGB, and SIGC. The receiving side processing unit 32 performs predetermined processing based on the transition signals RxF, RxR, RxP and the clock signal RxCK.

Here, the signal generation unit 23 corresponds to a specific example of a “transmission signal conversion unit” in the present disclosure. That is, the signal generation section 23 corresponds to a specific example of a transmission signal conversion section that converts a plurality of data signals into a plurality of symbols and transmits the symbols.
Furthermore, the single mode data generation section 72 (72A, 72B, 72C) and the differential mode data generation section 74 (74A, 74B, 74C) correspond to a specific example of an "encoding section" in the present disclosure. That is, the single mode data generation section 72 and the differential mode data generation section 74 receive at least one input of a plurality of symbols, and control drivers individually corresponding to each of three or more transmission paths. This corresponds to a specific example of an encoding section.
Further, the parallel-serial conversion circuit 70 (70A, 70B, 70C) corresponds to a specific example of a "parallel-serial conversion circuit" in the present disclosure. That is, the parallel-to-serial conversion circuit 70 corresponds to a specific example of a parallel-to-serial conversion circuit that is arranged between a transmission signal conversion section or an encoding section and a driver, and converts parallel data of an input symbol into serial data. do.
Furthermore, the single mode data generation section 72 (72A, 72B, 72C) and the driver section 78 (78A, 78B, 78C) correspond to a specific example of a "driver" in the present disclosure. That is, the single mode data generation section 72 and the driver section 78 correspond to a specific example of a driver that drives in the first voltage state or the second voltage state in the first mode. Note that "driving in the first voltage state or the second voltage state" can also be expressed as "driving the data signal using the first voltage state or the second voltage state."
Furthermore, the differential mode data generation section 74 (74A, 74B, 74C) and the driver section 78 (78A, 78B, 78C) correspond to a specific example of a "driver" in the present disclosure. That is, the differential mode data generation section 74 and the driver section 78 are one embodiment of a driver that drives in any one of the first voltage state, the second voltage state, and the third voltage state in the second mode. Corresponds to the example. Note that "driving in any one of the first voltage state, second voltage state, and third voltage state" means "driving in any one of the first voltage state, second voltage state, and third voltage state". In other words, ``driving a data signal using one voltage state.''
Further, as shown in FIGS. 7, 8, etc., the combination of values output by the drivers (single mode data generation section 72, differential mode data generation section 74, driver section 78) is determined by the wire state.
Further, the amplifiers 43 (43A, 43B, 43C) correspond to a specific example of "a plurality of receivers" in the present disclosure. That is, the amplifiers 43A, 43B, and 43C correspond to a specific example of a plurality of receivers that individually correspond to each of the three or more transmission lines 100 and output digital values. In addition, amplifiers 43A, 43B, and 43C correspond to one embodiment of a plurality of receivers that receive data signals driven in a first voltage state or a second voltage state in a first mode. Note that "driven in the first voltage state or the second voltage state" can also be expressed as "driven using the first voltage state or the second voltage state."
Further, the amplifiers 43 (43A, 43B, 43C) correspond to a specific example of "a plurality of receivers" in the present disclosure. That is, in the second mode, the amplifiers 43A, 43B, and 43C receive a plurality of data signals driven in one of the first voltage state, the second voltage state, and the third voltage state. In addition, the amplifiers 43A, 43B, and 43C correspond to a specific example of a plurality of receivers that output digital values from differences in voltage states of a plurality of received data signals. Note that "driven in one of the first voltage state, second voltage state, and third voltage state" means "driven in one of the first voltage state, second voltage state, and third voltage state". In other words, it was driven using any one voltage state.
Further, the signal generation unit 47 corresponds to a specific example of a “decoder unit” in the present disclosure. That is, the signal generation section 47 corresponds to a specific example of a decoder section that outputs symbols from a combination of a plurality of digital values respectively output from a plurality of receivers.
Further, the receiving side clock generation unit 44 corresponds to a specific example of a “clock generation unit” in the present disclosure. That is, the receiving side clock generation section 44 corresponds to a specific example of a clock generation section that generates a clock from a combination of digital values.
Further, as shown in FIGS. 11 and 12, the receiving section 40 includes, for example, resistive elements 41A, 41B, and 41C, switches 42A, 42B, and 42C, amplifiers 43A, 43B, and 43C, and a receiving side clock generation section 44. It is equipped with In addition, the receiving section 40 includes a first flip-flop 45 on the receiving side, a second flip-flop 46 on the receiving side, and a signal generating section 47. Further, the receiving section 40 includes switches 48A to 48G and an input terminal 49 for a comparison voltage (Vcm).
(Detailed operation/effect)

Next, the operations performed by the transmitting device 10 and the effects of the operations performed by the transmitting device 10 will be described in detail.

First, the operation performed by the transmitting device 10 when the transmission mode is the differential transmission mode will be described.
The first differential mode data generating section 74A controls the voltage state of the line 110A, the second differential mode data generating section 74B controls the voltage condition of the line 110B, and the third differential mode data generating section 74C controls the voltage condition of the line 110C. control.
As a result, when the transmission mode is the differential transmission mode, the voltage state of the transmission path 100, which changes according to the transition of the transmission symbol, becomes one of the voltage states SL, voltage states SM, and voltage states SH.

In the differential transmission mode, the voltage state of the transmission line 100 is in three stages: voltage state SL, voltage state SM, and voltage state SH. In addition, when controlling the voltage state of the transmission line 100, a differential between 2-bit transmission symbol signals (for example, Tx1 and Tx2) is used.
Therefore, as shown in FIGS. 13 and 14, the voltage states of the signals SIGA, SIGB, and SIGC, which change according to the transition of the transmission symbol, become one of the four voltage states. The four voltage states are "Weak0" and "Strong0" corresponding to voltage state SL, and "Weak1" and "Strong1" corresponding to voltage state SH.

As a result, when the transmission mode is the differential transmission mode, the voltages of the signals SIGA to SIGC received by the receiving section 40 change in three stages, for example, as shown in FIG. 15. Furthermore, as the voltages of the signals SIGA to SIGC change in three stages, the differences AB, BC, and CA also change. In the example shown in FIG. 15, the receiving unit 40 receives six transmission symbols "+x", "-y", "-z", "+z", "+y", and "-x" in this order. The voltages of the signals SIGA to SIGC and the differences AB, BC, and CA in the current state are shown.
At this time, the voltage of the signal SIGA changes in the order of VH, VM, VH, VL, VM, VL, and the voltage of the signal SIGB changes in the order of VL, VL, VM, VM, VH, VH. The voltage of SIGC changes in the order of VM, VH, VL, VH, VL, and VM. Further, the difference AB changes in the order of +2ΔV, +ΔV, +ΔV, -ΔV, -ΔV, -2ΔV, and the difference BC changes in the order of -ΔV, -2ΔV, +ΔV, -ΔV, +2ΔV, +ΔV, The difference CA changes in the order of -ΔV, +ΔV, -2ΔV, +2ΔV, -ΔV, and +ΔV. Note that ΔV shown in FIG. 15 is the difference between two adjacent voltages among the three voltages (high level voltage VH, middle level voltage VM, and low level voltage VL).

Therefore, when the transmission mode is the differential transmission mode, the eye diagram after the signals SIGA, SIGB, and SIGC pass through the transmission path 100 is a waveform with a large transition time difference and poor quality, as shown in FIG. becomes. As a result, when the transmission mode is the differential transmission mode, a waveform with large jitter occurs as shown in FIG. 16. Note that in FIG. 16, jitter that occurs when the transmission mode is the differential transmission mode is indicated as "jitter D."
Most of the jitter is due to switching jitter that occurs when transmission symbols transition. Switching jitter is a jitter component caused by a difference in signal transition time, and in the differential transmission mode, since the signal transition time differs for each transmission symbol, the jitter D becomes large.

Next, the operation performed by the transmitting device 10 when the transmission mode is the single transmission mode will be described.
The first single mode data generation section 72A controls the voltage state of the line 110A, the second single mode data generation section 72B controls the voltage condition of the line 110B, and the third single mode data generation section 72C controls the voltage state of the line 110C. control.
As a result, when the transmission mode is the single transmission mode, as shown in FIG. 2A, the voltage states of the signals SIGA, SIGB, and SIGC, which change according to the transition of the transmission symbols, are set to the voltage state SL or the voltage state SH. It will be one of the following.

In the single transmission mode, unlike the differential transmission mode, the voltage states of the signals SIGA, SIGB, and SIGC are in two stages: voltage state SL and voltage state SH. In addition, only one transmission symbol signal (eg, Tx1) is used when controlling the voltage states of the signals SIGA, SIGB, and SIGC.
Therefore, as shown in FIG. 17, the voltage states of the signals SIGA, SIGB, and SIGC corresponding to the types of transmission symbols can be divided into two states: "0" corresponding to the voltage state SL, or "1" corresponding to the voltage state SH. It becomes one of the voltage states.

Therefore, when the transmission mode is the single transmission mode, the eye diagram after the signals SIGA, SIGB, and SIGC pass through the transmission path 100 has a waveform with a small transition time difference, as shown in FIG. As a result, when the transmission mode is the single transmission mode, as shown in FIG. 18, the waveform has smaller jitter than when the transmission mode is the differential transmission mode. Note that in FIG. 18, the jitter that occurs when the transmission mode is the single transmission mode is indicated as "jitter S." For comparison, FIG. 18 also shows jitter D that occurs when the transmission mode is the differential transmission mode. Further, the eye diagram shown in FIG. 18 and the eye diagram shown in FIG. 18 are eye diagrams in a state where signals SIGA, SIGB, and SIGC are transmitted and received at the same transmission rate.
When the transmission mode is the single transmission mode, the voltage states of the signals SIGA, SIGB, and SIGC are in two stages, voltage state SL or voltage state SH. becomes smaller, and the quality of the waveform becomes better. Therefore, jitter S becomes smaller than jitter D. Therefore, when the transmission mode is the single transmission mode, it is possible to reduce jitter more than when the transmission mode is the differential transmission mode (jitter S<jitter D).

Here, as an example, the amount of information that can be transmitted by the signal SIGA, signal SIGB, and signal SIGC (transmission signal) output from the transmitting device 10 to the receiving device 30 in the configuration of the first embodiment will be described.
The communication system 1 including the transmitting device 10, the transmission path 100, and the receiving device 30 needs to satisfy the following relational expression (1).

Combination of consecutive transmission symbols (N) ≧Amount of information that can be transmitted from the transmitting device 10 to the receiving device 30 = 2 ^{M [bit]} … (1)

Furthermore, the amount of information that can be transmitted by a 1-bit transmission signal (the amount of information per 1 bit) in the communication system 1 is expressed by the following relational expression (2).

Amount of information per 1 bit = M/N... (2)

When the transmission mode is the differential transmission mode, N is 7 and M is 16, so N and M satisfy relational expressions (1) and (2).
Then, by substituting N=7 and M=16 into relational expression (2), the following calculation result (3) is obtained.

Amount of information per 1 bit = 16/7 = 2.2857 [bit] … (3)

On the other hand, even if the transmission mode is the single transmission mode, since N is 7 and M is 16, N and M satisfy relational expressions (1) and (2).
Therefore, even if the transmission mode is the single transmission mode, the amount of information per 1 bit is 2.2857 bits, as in the case where the transmission mode is the differential transmission mode.

As described above, when the transmission mode is the single transmission mode, it is possible to reduce jitter compared to when the transmission mode is the differential transmission mode. In addition to this, it is possible to transmit the same amount of information from the transmitting device 10 to the receiving device 30 as when the transmission mode is the differential transmission mode.

Therefore, with the transmitting device 10 of the present disclosure, it is possible to reduce jitter that occurs in the signal transmitted from the transmitting device 10 to the receiving device 30.
Furthermore, with the communication system 1 including the transmitting device 10 and the receiving device 30 of the present disclosure, it is possible to reduce jitter that occurs in the signal transmitted from the transmitting device 10 to the receiving device 30. Similarly, with the transmission method of the present disclosure, it is possible to reduce jitter that occurs in the signal transmitted from the transmitting device 10 to the receiving device 30.

Furthermore, in the transmitting device 10 of the present disclosure, the transmission modes in which the transmitting device 10 transmits a transmission signal to the receiving device 30 include a single transmission mode and a differential transmission mode. Therefore, by adding the single mode data generation section 72 to the transmitting device 10 and receiving device 30 that do not include the single transmission mode as the transmission mode, compared to the case where the transmission mode is the differential transmission mode, , it is possible to reduce jitter, and it is also possible to transmit the same amount of information from the transmitting device 10 to the receiving device 30 as when the transmission mode is the differential transmission mode. This makes it possible to maintain commonality in the configurations of the transmitting device 10 and receiving device 30 that do not include the single transmission mode as a transmission mode. This also applies to the transmission method and communication system 1 of the present disclosure.

In addition, with the transmitting device 10 of the present disclosure, it is possible to make the transmission bandwidth of the single transmission mode and the transmission bandwidth of the differential transmission mode the same, so the timing of transitioning the transmission mode of the transmission signal is also included. , it becomes possible to create a compatible transmission method.

<How to send>

The transmission method performed using the transmitter 10 of the first embodiment is a transmission method in which three or more transmission signals are transmitted using three or more transmission paths 100, and includes a transmission signal conversion step and a single mode data generation step. Equipped with

In the transmission signal conversion step, a data signal indicating a sequence of transmission symbols is converted into a transmission signal of 3 or more bits. Furthermore, in the transmission signal conversion step, a plurality of data signals are converted into a plurality of symbols and transmitted.

In the single mode data generation process, first voltage states having different voltage levels are established for each of the three or more transmission lines 100 that transmit three or more bits of transmission signal one bit at a time in response to only one bit of transmission signal. Or the second voltage state.
In the first embodiment, as an example, in the single mode data generation step, two of the three transmission lines are set to one of the first voltage state and the second voltage state, and the remaining one of the three transmission lines is set to one of the first voltage state and the second voltage state. A case where the book is placed in the other of the first voltage state and the second voltage state will be described.
In the first embodiment, in the single mode data generation process, the corresponding transmission line 100 is set to the first voltage in response to only a 1-bit transmission signal that is encoded as parallel data, converted to serial data, and input to itself. state or the second voltage state.
Furthermore, in the single mode data generation step, the data signal is driven using the first voltage state or the second voltage state.

Further, the transmission method performed using the transmitting device 10 of the first embodiment includes a differential mode data generation step and a mode selection step.
In the differential mode data generation step, a third voltage having a different voltage level is generated for each of the three or more transmission lines 100 that transmit a three-bit or more transmission signal one bit at a time in response to a two-bit transmission signal. state, a fourth voltage state, and a fifth voltage state.
Further, in the differential mode data generation step, the data signal is driven using any one of the first voltage state, the second voltage state, and the third voltage state.

In the mode selection step, for example, a single transmission mode and a differential transmission mode are selected according to a command signal input from the outside. The single transmission mode is a transmission mode in which a transmission signal is transmitted using the transmission path 100 that is set to the first voltage state or the second voltage state in the single mode data generation process. Further, the differential transmission mode is a mode in which a transmission signal is transmitted using the transmission path 100 set in one of the third voltage state, the fourth voltage state, and the fifth voltage state in the differential mode data generation step.

<Modified example>

In the first embodiment, the communication system 1 has a configuration in which there are three transmission lines 100 (line 110A, line 110B, line 110C) and transmission signals are 3 bits (signal SIGA, signal SIGB, signal SIGC). However, it is not limited to this. That is, the communication system 1 may have a configuration in which the number of transmission paths 100 is four or more and the transmission signal is four or more bits.
Similarly, the configuration of the transmitting device 10 may be configured to transmit a transmission signal of 4 bits or more using four or more transmission paths 100.

<Application example>

Next, an application example of the communication system described in the above-described embodiments and modifications will be described.
<Application example 1>

The communication system of the present disclosure can be applied to a smartphone 300 (multifunctional mobile phone), as shown in FIG. 19.

The smartphone 300 is equipped with various devices, and the communication system of the present disclosure is applied as a communication system that exchanges data between the devices.
For example, an application processor 310 as shown in FIG. 20 is used in the smartphone 300.

The application processor 310 includes a CPU (Central Processing Unit) 311, a memory control section 312, a power supply control section 313, and an external interface 314. In addition, the application processor 310 includes a GPU (Graphics Processing Unit) 315, a media processing section 316, and a display control section 317. Further, the application processor 310 includes a Mobile Industry Processor Interface (MIPI) interface 318 .
The CPU 311 , memory control section 312 , power supply control section 313 , external interface 314 , GPU 315 , media processing section 316 , and display control section 317 are connected to a system bus 319 . Further, the CPU 311, memory control unit 312, power supply control unit 313, external interface 314, GPU 315, media processing unit 316, and display control unit 317 can exchange data with each other via the system bus 319.

CPU 311 processes various information handled by smartphone 300 according to programs. The memory control unit 312 controls the memory 501 used when the CPU 311 performs information processing. The power control unit 313 controls the power of the smartphone 300. The external interface 314 is an interface for communicating with external devices, and is connected to the wireless communication unit 502 and the image sensor 410.
The wireless communication unit 502 performs wireless communication with a base station of a mobile phone, and includes, for example, a baseband unit, an RF (Radio Frequency) front end unit, and the like. The image sensor 410 acquires images, and includes, for example, a CMOS sensor.
GPU 315 performs image processing. The media processing unit 316 processes information such as audio, text, and graphics. Display control unit 317 controls display 504 via MIPI interface 318. MIPI interface 318 sends image signals to display 504. As the image signal, it is possible to use, for example, a YUV format signal, an RGB format signal, or the like. The MIPI interface 318 operates based on a reference clock supplied from an oscillation circuit 330 including, for example, a crystal resonator. For example, the communication system configured as described above is applied to the communication system between the MIPI interface 318 and the display 504.

As shown in FIG. 21, the image sensor 410 includes a sensor section 411, an ISP (Image Signal Processor) 412, and a JPEG (Joint Photographic Experts Group) encoder 413. Furthermore, the image sensor 410 includes a CPU 414, a RAM (Random Access Memory) 415, and a ROM (Read Only Memory) 416. In addition, the image sensor 410 includes a power control section 417, an I2C (Inter-Integrated Circuit) interface 418, and a MIPI interface 419.

Each block shown in FIG. 21 is connected to a system bus 420 and can exchange data with each other via the system bus 420.
The sensor unit 411 is configured with, for example, a CMOS sensor, and acquires images. The ISP 412 performs predetermined processing on the image acquired by the sensor unit 411. The JPEG encoder 413 encodes the image processed by the ISP 412 to generate a JPEG format image. CPU 414 controls each block of image sensor 410 according to a program. The RAM 415 is a memory used when the CPU 414 performs information processing. The ROM 416 stores programs executed by the CPU 414, setting values obtained through calibration, and the like. The power supply control unit 417 controls the power supply of the image sensor 410. I2C interface 418 receives control signals from application processor 310.
Although not shown, the image sensor 410 receives a clock signal in addition to a control signal from the application processor 310. Specifically, the image sensor 410 can operate based on clock signals of various frequencies.

MIPI interface 419 sends image signals to application processor 310. As the image signal, it is possible to use, for example, a YUV format signal, an RGB format signal, or the like. Further, the MIPI interface 419 operates based on a reference clock supplied from an oscillation circuit 430 including a crystal resonator, for example. For example, the communication system configured as described above is applied to the communication system between the MIPI interface 419 and the application processor 310.

<Application example 2>

The communication system of the present disclosure can be applied to a vehicle control system 600, as shown in FIG. 22.
The vehicle control system 600 controls the operations of automobiles, electric vehicles, hybrid electric vehicles, motorcycles, and the like.

Further, as shown in FIG. 22, the vehicle control system 600 is integrated with a drive system control unit 610, a body system control unit 620, a battery control unit 630, an external information detection unit 640, and an internal information detection unit 650. A control unit 660 is provided.
Each unit included in vehicle control system 600 is connected to each other via communication network 690. As the communication network 690, it is possible to use a network compliant with any standard, such as CAN (Controller Area Network), LIN (Local Interconnect Network), LAN (Local Area Network), FlexRay (registered trademark), etc. . Further, each unit included in the vehicle control system 600 is configured to include, for example, a microcomputer, a storage section, a drive circuit that drives a device to be controlled, a communication I/F, and the like.

Drive system control unit 610 controls the operation of devices related to the drive system of the vehicle. Further, a vehicle state detection section 611 is connected to the drive system control unit 610. The vehicle state detection unit 611 detects the state of the vehicle, and includes, for example, a gyro sensor, an acceleration sensor, a sensor that detects the amount of operation of an accelerator pedal or a brake pedal, a steering angle, and the like. Further, the drive system control unit 610 controls the operation of devices related to the drive system of the vehicle based on information detected by the vehicle state detection section 611. For example, the communication system configured as described above is applied to the communication system between the drive system control unit 610 and the vehicle state detection section 611.
The body system control unit 620 controls the operations of various devices installed in the vehicle, such as a keyless entry system, a power window device, and various lamps.

Battery control unit 630 controls battery 631 connected to battery control unit 630 . The battery 631 supplies power to the drive motor, and includes, for example, a secondary battery, a cooling device, and the like. The battery control unit 630 also acquires information such as temperature, output voltage, and remaining battery power from the battery 631, and controls the cooling device of the battery 631 and the like based on the acquired information. For example, the communication system configured as described above is applied to the communication system between the battery control unit 630 and the battery 631.
The vehicle external information detection unit 640 detects information external to the vehicle. An imaging section 641 and an external information detection section 642 are connected to the vehicle exterior information detection unit 640 . The image capturing unit 641 captures images outside the vehicle, and includes, for example, a ToF (Time of Flight) camera, a stereo camera, a monocular camera, an infrared camera, and the like. The vehicle exterior information detection unit 642 detects information outside the vehicle, and includes, for example, a sensor that detects the weather, a sensor that detects other vehicles, obstacles, pedestrians, etc. around the vehicle. configured. The vehicle exterior information detection unit 640 recognizes, for example, the weather, road conditions, etc., based on the image obtained by the imaging section 641 and the information detected by the vehicle exterior information detection section 642, and detects other surroundings of the vehicle. Detects objects such as vehicles, obstacles, pedestrians, signs and letters on the road. Furthermore, the vehicle exterior information detection unit 640 detects the distance between the detected object and the vehicle. For example, the communication system configured as described above is applied to the communication system between the vehicle exterior information detection unit 640, the imaging section 641, and the vehicle exterior information detection section 642.

The in-vehicle information detection unit 650 detects information inside the vehicle. A driver state detection section 651 is connected to the in-vehicle information detection unit 650 . The driver state detection unit 651 detects the state of the driver, and includes, for example, a camera, a biological sensor, a microphone, and the like. The in-vehicle information detection unit 650 monitors, for example, the degree of fatigue of the driver, the degree of concentration of the driver, whether the driver is dozing off, etc., based on the information detected by the driver condition detection section 651. . For example, the communication system configured as described above is applied to the communication system between the in-vehicle information detection unit 650 and the driver state detection unit 651.
Integrated control unit 660 controls the operation of vehicle control system 600. An operation section 661, a display section 662, and an instrument panel 663 are connected to the integrated control unit 660. The operation unit 661 is operated by the passenger and includes, for example, a touch panel, various buttons, switches, and the like. The display unit 662 displays images, and is configured using, for example, a liquid crystal display panel. The instrument panel 663 displays the state of the vehicle, and includes meters such as a speedometer, various warning lamps, and the like. For example, the communication system configured as described above is applied to the communication system between the integrated control unit 660, the operation section 661, the display section 662, and the instrument panel 663.
(Other embodiments)

As described above, embodiments of the present technology have been described, but the statements and drawings that form part of this disclosure should not be understood as limiting the present technology. Various alternative embodiments, implementations, and operational techniques will be apparent to those skilled in the art from this disclosure. In addition, it goes without saying that the present technology includes various embodiments not described here, such as configurations in which each configuration described in the above embodiments is arbitrarily applied. Therefore, the technical scope of the present technology is determined only by the matters specifying the invention in the claims that are reasonable from the above explanation.
Further, the transmitting device, the transmitting method, and the communication system of the present disclosure do not need to include all of the components described in the above embodiments, and may conversely include other components. Note that the effects described in this specification are merely examples and are not limiting, and other effects may also exist.

Note that the present technology can have the following configuration.
(1)
a transmission signal converter that converts a plurality of data signals into a plurality of symbols and transmits the converted symbols;
an encoding unit that receives input of at least one of the plurality of symbols and controls drivers individually corresponding to each of the three or more transmission lines;
The driver is a transmitting device that drives in a first mode in a first voltage state or a second voltage state having a different voltage level from the first voltage state.
(2)
In a second mode different from the first mode, the driver maintains the first voltage state, the second voltage state, and a third voltage state having a different voltage level from the first voltage state and the second voltage state. The transmitting device according to (1) above, which is driven in any one of the voltage states.
(3)
The transmitting device according to (2) above, wherein in the second mode, voltage states of the three or more transmission lines are different from each other.
(4)
(1) to (3) above, including a parallel-to-serial conversion circuit that is arranged between the transmission signal conversion section or the encoding section and the driver and converts the input parallel data of the symbol into serial data. Transmitting device listed in any of these.
(5)
The state of the symbol transitions to one of six types of wire states,
The boundary where the wire state transitions exists at the boundary of all symbols,
There are always five types of wire states to which the symbol state can transition from the current wire state to the next state, which are different from the current wire state,
The transmitting device according to any one of (1) to (4) above, wherein the value of the symbol is defined by a change in the wire state from a current interval to a next interval.
(6)
The transmitting device according to (5), wherein the combination of values output by the driver is determined by the state of the wire.
(7)
comprising the same number of single-mode data generation units as the transmission lines individually corresponding to each of the three or more transmission lines for transmitting the transmission signal of three bits or more one bit at a time,
The single mode data generating unit sets the corresponding transmission line to the first voltage state or the second voltage state in accordance with only the 1-bit transmission signal input to the single mode data generating unit (1) to (6). ) A transmitter described in any of the above.
(8)
The transmission lines are three,
The transmission signal is 3 bits,
The single mode data generation unit sets two of the three transmission lines to one of the first voltage state and the second voltage state, and sets the remaining one of the three transmission lines to the first voltage state. The transmitting device according to (7) above, which is in the other of the first voltage state and the second voltage state.
(9)
a number of differential mode data generation units equal to the number of transmission lines that individually correspond to each of the three or more transmission lines for transmitting the three or more bits transmission signal one bit at a time;
a mode selection unit that selects a transmission mode for transmitting the transmission signal using the transmission path,
The differential mode data generating section is configured to set the corresponding transmission path to a third voltage state, a fourth voltage state, and a fifth voltage state, each having a different voltage level, in accordance with the 2-bit transmission signal input thereto. One of the following conditions:
The mode selection unit is configured to select a single transmission mode in which the transmission signal is transmitted using the transmission path that the single mode data generation unit has set to the first voltage state or the second voltage state, and (1) to (8) above, selecting a differential transmission mode in which the transmission signal is transmitted using the transmission path in one of the third voltage state, the fourth voltage state, and the fifth voltage state; A transmitting device described in any of the above.
(10)
The single-mode data generation unit sets the corresponding transmission path to the first voltage state or the The transmitting device according to any one of (7) to (9) above, which is in the second voltage state.
(11)
One of the first voltage state and the second voltage state is at a higher level than a reference voltage,
The transmitting device according to any one of (1) to (10), wherein the other of the first voltage state and the second voltage state is at a level lower than a reference voltage.
(12)
a plurality of receivers that individually correspond to each of the three or more transmission lines and output digital values;
a decoder unit that outputs a symbol from a combination of a plurality of digital values respectively output from the plurality of receivers;
a clock generation unit that generates a clock from the combination of the digital values,
A receiving device in which the plurality of receivers receive data signals driven in a first voltage state or a second voltage state having a different voltage level from the first voltage state in a first mode.
(13)
In a second mode different from the first mode, the plurality of receivers are in the first voltage state, the second voltage state, and a third voltage state different from the first voltage state and the second voltage state. The receiving device according to (12) above, which receives a plurality of data signals driven in any one of the voltage states and outputs the digital value from a difference between the voltage states of the received data signals. .
(14)
a transmission signal converter that converts a plurality of data signals into a plurality of symbols and transmits the same; and a driver that receives at least one input of the plurality of symbols and individually corresponds to each of the three or more transmission paths. an encoding unit that controls the transmitting device;
a plurality of receivers that individually correspond to each of the three or more transmission paths and output digital values; and a decoder that outputs the symbols from a combination of the plurality of digital values respectively output from the plurality of receivers. and a clock generation unit that generates a clock from the combination of the digital values, the communication system comprising:
The driver drives in a first mode in a first voltage state or a second voltage state having a different voltage level from the first voltage state,
The communication system wherein the plurality of receivers receive data signals driven in the first voltage state or the second voltage state in the first mode.
(15)
In a second mode different from the first mode, the driver maintains the first voltage state, the second voltage state, and a third voltage state having a different voltage level from the first voltage state and the second voltage state. The communication system according to (14) above, which is driven in any one of the voltage states.
(16)
The communication system according to (15), wherein in the second mode, voltage states of the three or more transmission lines are different from each other.
(17)
(14) above, wherein the transmitting device includes a parallel-to-serial converting circuit that is arranged between the transmitting signal converter or the encoder and the driver and converts the received parallel data of the symbol into serial data. The communication system described in any one of (16) to (16) above.
(18)
The state of the symbol transitions to one of six types of wire states,
The boundary where the wire state transitions exists at the boundary of all symbols,
There are always five types of wire states to which the symbol state can transition from the current wire state to the next state, which are different from the current wire state,
A communication system according to any of the above (14) to (17), wherein the value of the symbol is defined by a change in the wire state from a current interval to a next interval.
(19)
The communication system according to (18) above, wherein the combination of values output by the driver is determined by the state of the wire.
(20)
In a second mode different from the first mode, the plurality of receivers are in the first voltage state, the second voltage state, and a third voltage state different from the first voltage state and the second voltage state. (14) to (19) above, wherein a plurality of data signals driven in any one of the voltage states are received, and the digital value is output from the difference between the voltage states of the plurality of received data signals. Communication systems listed in any of these.
(21)
The transmitting device includes:
comprising the same number of single-mode data generation units as the transmission lines individually corresponding to each of the three or more transmission lines for transmitting the transmission signal of three bits or more one bit at a time,
The single mode data generation unit sets the corresponding transmission line to the first voltage state or the second voltage state in accordance with only the 1-bit transmission signal input to the single mode data generation unit (14) to (20). ) Communication systems listed in any of the above.
(22)
The transmission lines are three,
The transmission signal is 3 bits,
The single mode data generation unit sets two of the three transmission lines to one of the first voltage state and the second voltage state, and sets the remaining one of the three transmission lines to the first voltage state. The communication system according to (21) above, which is in the other of the first voltage state and the second voltage state.
(23)
The transmitting device includes:
a number of differential mode data generation units equal to the number of transmission lines that individually correspond to each of the three or more transmission lines for transmitting the three or more bits transmission signal one bit at a time;
a mode selection unit that selects a transmission mode for transmitting the transmission signal using the transmission path,
The differential mode data generating section is configured to set the corresponding transmission path to a third voltage state, a fourth voltage state, and a fifth voltage state, each having a different voltage level, in accordance with the 2-bit transmission signal input thereto. One of the following conditions:
The mode selection unit is configured to select a single transmission mode in which the transmission signal is transmitted using the transmission path that the single mode data generation unit has set to the first voltage state or the second voltage state, and (14) to (22) above, selecting a differential transmission mode in which the transmission signal is transmitted using the transmission path in one of the third voltage state, the fourth voltage state, and the fifth voltage state; A communication system described in any of the above.
(24)
The single-mode data generation unit sets the corresponding transmission path to the first voltage state or the The communication system according to any one of (21) to (23) above, which is in the second voltage state.
(25)
One of the first voltage state and the second voltage state is at a higher level than a reference voltage,
The communication system according to (14) or (24), wherein the other of the first voltage state and the second voltage state is at a lower level than the reference voltage.
(26)
a transmission signal conversion step of converting a data signal indicating a sequence of transmission symbols into a transmission signal of 3 or more bits;
A single mode in which each of the three or more transmission lines for transmitting the three or more bits of the transmission signal one bit at a time is set to the first voltage state or the second voltage state in response to only the one bit of the transmission signal. A transmission method comprising: a data generation step.
(27)
The transmission lines are three,
The transmission signal is 3 bits,
In the single mode data generation step, two of the three transmission lines are set to one of the first voltage state and the second voltage state, and the remaining one of the three transmission lines is set to the first voltage state. The transmission method according to (26) above, wherein the other of the first voltage state and the second voltage state is set.
(28)
A third voltage state and a fourth voltage state in which the respective voltage levels are different for each of the three or more transmission lines that transmit the three or more bits of the transmission signal bit by bit in response to the two bits of the transmission signal. and a step of generating differential mode data in one of the fifth voltage states;
a single transmission mode in which the transmission signal is transmitted using the transmission path set to the first voltage state or the second voltage state in the single mode data generation step; and the third voltage state in the differential mode data generation step; (26) or (27), comprising: a mode selection step of selecting a differential transmission mode in which the transmission signal is transmitted using the transmission path in either the fourth voltage state or the fifth voltage state; ).
(29)
In the single mode data generation step, the corresponding transmission path is set to the first voltage state or the The transmission method described in any one of (26) to (28) above, in which the second voltage state is set.
(30)
one of the first voltage state and the second voltage state is set to a higher level than a reference voltage;
The transmission method according to any one of (26) to (29) above, wherein the other of the first voltage state and the second voltage state is set to a level lower than a reference voltage.

DESCRIPTION OF SYMBOLS 1... Communication system, 10... Transmitting device, 11... Transmitting side clock generation part, 12... Transmitting side processing part, 20... Transmitting part, 21F... First serializer, 21R... Second serializer, 21P... Third serializer, 22... Transmission symbol generation section, 23... Signal generation section, 24... Transmission side flip-flop, 26... Output section, 30... Receiving device, 32... Receiving side processing section, 40... Receiving section, 41A... Resistance element, 41B... Resistance element, 41C...resistance element, 42A...switch, 42B...switch, 42C...switch, 43A...amplifier, 43B...amplifier, 43C...amplifier, 44...reception side clock generation section, 45...reception side first flip-flop, 46...reception side Second flip-flop, 47...signal generation section, 48A...switch, 48B...switch, 48C...switch, 48D...switch, 48E...switch, 48F...switch, 48G...switch, 49...comparison voltage input terminal, 70A...th 1 parallel-serial converter circuit, 70B...second parallel-serial converter circuit, 70C...third parallel-serial converter circuit, 72A...first single mode data generation section, 72B...second single mode data generation section, 72C...third single mode Data generation section, 74A...first difference mode data generation section, 74B...second difference mode data generation section, 74C...third difference mode data generation section, 76A...first mode selection section, 76B...second mode selection section, 76C...Third mode selection section, 78A...First driver section, 78B...Second driver section, 78C...Third driver section, 100...Transmission line, 110A...Line, 110B...Line, 110C...Line, 300...Smartphone, 310...Application processor, 311...CPU, 312...Memory control unit, 313...Power control unit, 314...External interface, 315...GPU, 316...Media processing unit, 317...Display control unit, 318...MIPI interface, 319...System Bus, 330...Oscillation circuit, 410...Image sensor, 411...Sensor unit, 412...ISP, 413...JPEG encoder, 414...CPU, 415...RAM, 416...ROM, 417...Power control unit, 418...I2C interface, 419 ... MIPI interface, 420 ... System bus, 501 ... Memory, 502 ... Wireless communication section, 504 ... Display, 600 ... Vehicle control system, 610 ... Drive system control unit, 611 ... Vehicle state detection section, 620 ... Body system control unit, 630...Battery control unit, 631...Battery, 640...Vehicle exterior information detection unit, 641...Imaging section, 642...Vehicle exterior information detection section, 650...Vehicle interior information detection unit, 651...Driver state detection section, 660...Integrated control unit, 661...Operation unit, 662...Display unit, 663...Instrument panel, 690...Communication network, ToutA...Output terminal, ToutB...Output terminal, ToutC...Output terminal, TinA...Input terminal, TinB...Input terminal, TinC...Input terminal

Claims (11)

a transmission signal converter that converts a plurality of data signals into a plurality of symbols and transmits the converted symbols;
an encoding unit that receives input of at least one of the plurality of symbols and controls drivers individually corresponding to each of the three or more transmission lines;
The driver is
Drive in a first voltage state or a second voltage state having a different voltage level from the first voltage state in a first mode ;
In a second mode different from the first mode, any one of the first voltage state, the second voltage state, and a third voltage state whose voltage level is different from the first voltage state and the second voltage state. Drive in one voltage state,
The transmitting device , wherein the first voltage state, the second voltage state, and the third voltage state are each a single voltage level . 2. The transmitting device according to claim 1 , wherein in the second mode, voltage states of the three or more transmission lines are different from each other. 2. The transmitting device according to claim 1, further comprising a parallel-to-serial converting circuit disposed between the transmitting signal converting section or the encoding section and the driver, and converting parallel data of the received symbol into serial data. The state of the symbol transitions to one of six types of wire states,
The boundary where the wire state transitions exists at the boundary of all symbols,
There are always five types of wire states to which the symbol state can transition from the current wire state to the next state, which are different from the current wire state,
2. The transmitting apparatus of claim 1, wherein the value of the symbol is defined by the change in the wire condition from a current interval to a next interval. 5. The transmitting device according to claim 4 , wherein the combination of values output by the driver is determined by the state of the wire. a plurality of receivers that individually correspond to each of the three or more transmission lines and output digital values;
a decoder unit that outputs a symbol from a combination of a plurality of digital values respectively output from the plurality of receivers;
a clock generation unit that generates a clock from the combination of the digital values,
The plurality of receivers are
receiving a data signal driven in a first voltage state or a second voltage state having a different voltage level from the first voltage state in a first mode;
In a second mode different from the first mode, any one of the first voltage state, the second voltage state, and a third voltage state having a voltage level different from the first voltage state and the second voltage state. receiving a plurality of data signals driven in one voltage state, and outputting the digital value from a difference between the voltage states of the plurality of received data signals;
The receiving device , wherein the first voltage state, the second voltage state, and the third voltage state are each a single voltage level . a transmission signal converter that converts a plurality of data signals into a plurality of symbols and transmits the same; and a driver that receives at least one input of the plurality of symbols and individually corresponds to each of the three or more transmission paths. an encoding unit that controls the transmitting device;
a plurality of receivers that individually correspond to each of the three or more transmission paths and output digital values; and a decoder that outputs the symbols from a combination of the plurality of digital values respectively output from the plurality of receivers. and a clock generation unit that generates a clock from the combination of the digital values, the communication system comprising:
The driver is
Drive in a first voltage state or a second voltage state having a different voltage level from the first voltage state in a first mode;
In a second mode different from the first mode, any one of the first voltage state, the second voltage state, and a third voltage state having a voltage level different from the first voltage state and the second voltage state. Drive in one voltage state,
The plurality of receivers are
receiving a data signal driven in the first voltage state or the second voltage state in the first mode;
In a second mode different from the first mode, any one of the first voltage state, the second voltage state, and a third voltage state having a voltage level different from the first voltage state and the second voltage state. receiving a plurality of data signals driven in one voltage state, and outputting the digital value from a difference between the voltage states of the plurality of received data signals;
The communication system wherein the first voltage state, the second voltage state, and the third voltage state are each a single voltage level . 8. The communication system according to claim 7 , wherein in the second mode, voltage states of the three or more transmission lines are different from each other. 8. The transmitting device includes a parallel-to-serial converting circuit arranged between the transmitting signal converting section or the encoding section and the driver, and converting the received parallel data of the symbol into serial data. Communication system described. The state of the symbol transitions to one of six types of wire states,
The boundary where the wire state transitions exists at the boundary of all symbols,
There are always five types of wire states to which the symbol state can transition from the current wire state to the next one, which are different from the current wire state,
8. The communication system of claim 7 , wherein the value of the symbol is defined by a change in the wire condition from a current interval to a next interval. 11. The communication system according to claim 10 , wherein the combination of values output by the driver is determined by the state of the wire.

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