JP7414578B2 - audio circuit - Google Patents

Description

The present invention relates to audio circuits.

A current segment type D/A converter is used to convert a DSD (Direct Stream Digital) signal, which is a digital audio signal, or a ΔΣ modulated bit stream into an analog signal.

FIG. 1 is a circuit diagram of a portion of the audio system 1. As shown in FIG. The digital input signal DIN is a DSD signal or a ΔΣ modulated bit stream, and the number of bits with a value of 1 (or the number of bits with a value of 0) among the total n bits determines the magnitude of the signal. represents.

The current segment type D/A converter 10 converts the digital input signal DIN into differential current signals I _OUT+ and I _OUT- . The current segment type D/A converter 10 includes n switches SW1 to SWn, n current sources CS1 to CSn, and n selectors SEL1 to SELn.

The n current sources CS1 to CSn generate equal currents I ₀ . Corresponding bits b1 to bn of the digital input signal DIN are input to the n selectors SEL1 to SELn. Each selector SELi (1≦i≦n) supplies the current _I0 generated by the corresponding current source CSi to the OUT+ side when the corresponding bit bi is 1, and supplies the current I0 generated by the corresponding current source CSi to the OUT+ side when the corresponding bit bi is 0. , the current I ₀ generated by the corresponding current source CSi is supplied to the OUT- side.

When k bits among n bits b1 to bn are 1, the current I _OUT+ flowing to the OUT+ terminal is I ₀ ×k, and the current I _OUT- flowing to the OUT− terminal is I ₀ × (n−k). becomes.

Transimpedance amplifiers (I/V conversion amplifiers) 20 and 22 are provided downstream of the current segment type D/A converter 10. Transimpedance amplifiers 20 and 22 convert differential current signals I _OUT+ and I _OUT- into voltage signals V _OUT+ and V _OUT- , respectively.
V _OUT+ =-R×I _OUT+
V _OUT- =-R×I _OUT-
The difference V _diff between the differential voltage signals V _OUT+ and V _OUT- becomes an analog signal corresponding to the digital input signal DIN.

A stop signal OFF instructing the current segment type D/A converter 10 to stop is input to the logic circuit 12 . When the stop signal OFF is asserted, the logic circuit 12 turns off the plurality of switches SW1 to SWn and the plurality of current sources CS1 to CSn all at once. This reduces circuit current.

FIG. 2 is an operational waveform diagram of the current segment type D/A converter 10 of FIG. During the signal period t ₀ to t ₁ , the number k of bits with a value of 1 among the n bits of the digital input signal DIN changes moment by moment, and as a result, the output voltages V _OUT+ and V _OUT- change. Change.

During the no-signal period t ₁ to t ₂ , the n bits of the digital input signal DIN contain the same number of 0s and 1s (n/2). At this time, the differential voltage signals V _OUT+ and V _OUT- are equally stabilized at the bias level Vb.
Vb=-(n×I ₀ /2)×R

When the stop signal OFF is asserted at time _t2 , the logic circuit 12 turns off the n current sources CS1 to CSn and the n switches SW1 to SWn all at once. At time t ₂ , the current sources CS1 to CSn are turned off, so that I ₀ generated by them all becomes zero, and I _OUT+ =I _OUT- =0. Therefore, the output voltages V _OUT+ and V _OUT- rise from the bias level Vb to 0V.

Japanese Patent Application Publication No. 2016-208361

As a result of studying the current segment type D/A converter 10 shown in FIG. 1, the inventor of the present invention has come to recognize the following problems. FIG. 3 is a waveform diagram when the current segment type D/A converter 10 of FIG. 1 is stopped.

The stop signal OFF here is an I ² C signal, and time t ₂ indicates the timing at which reception of the stop signal is completed, that is, the start time of the stop period. Ideally, when the current segment type D/A converter 10 is stopped, the differential voltage signals V _OUT+ and V _OUT- change while maintaining the same potential. At this time, since the differential signal V _diff is zero, no noise is generated. However, due to the influence of element variations, etc., there is a lag in the timing at which the n currents I ₀ become 0, so in reality, as shown in FIG. 3, the differential voltage signal V _diff becomes non-zero and is output as noise.

The present invention has been made in view of the above problems, and one exemplary objective of a certain aspect of the present invention is to provide a current segment type D/A converter that suppresses noise during stoppage.

One aspect of the present invention relates to an audio circuit. The audio circuit includes a current segment type D/A converter that converts an n-bit digital audio signal into an analog differential signal. The current segment type D/A converter corresponds to n first MOS transistors (n≧2) whose gates are commonly connected and whose sources are commonly connected, and each of which corresponds to the n first MOS transistors. n first current sources connected to a corresponding drain of one MOS transistor; and n first current sources, each generated by a corresponding one of the n first current sources. Upon receiving a stop signal for the n selectors and the current segment type D/A converter, which supply current to one of the first current path and the second current path according to the corresponding bit of the digital audio signal, and a stop circuit that gradually lowers the gate-source voltage of the n first MOS transistors over time.

Note that arbitrary combinations of the above constituent elements and expressions of the present invention converted between methods, devices, etc. are also effective as aspects of the present invention. Furthermore, the description in this section (Means for Solving the Problems) does not describe all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. .

According to an aspect of the present invention, the noise characteristics of a differential output current segment type D/A converter can be improved.

1 is a circuit diagram of a portion of an audio system. 2 is an operation waveform diagram of the current segment type D/A converter of FIG. 1. FIG. FIG. 2 is a waveform diagram of the current segment type D/A converter of FIG. 1 when it is stopped. FIG. 1 is a circuit diagram showing the basic configuration of an audio IC according to an embodiment. 5 is an operation waveform diagram of the current segment type D/A converter of FIG. 4. FIG. 1 is a circuit diagram of an audio IC according to a first embodiment. FIG. 7 is a diagram showing measurement results of noise of the audio IC of FIG. 6. FIG. FIG. 1 is a block diagram of an audio system. FIG. 3 is a circuit diagram of an audio IC according to Modification 1. FIG.

(Summary of embodiment)
One embodiment disclosed herein relates to an audio circuit. The audio circuit includes a current segment type D/A converter that converts an n-bit digital audio signal into an analog differential signal. The current segment type D/A converter corresponds to n first MOS transistors (n≧2) whose gates are commonly connected and whose sources are commonly connected, and each of which corresponds to the n first MOS transistors. n first current sources connected to a corresponding drain of one MOS transistor; and n first current sources, each generated by a corresponding one of the n first current sources. Upon receiving a stop signal for the n selectors and the current segment type D/A converter, which supply current to one of the first current path and the second current path according to the corresponding bit of the digital audio signal, and a stop circuit that gradually lowers the gate-source voltage of the n first MOS transistors over time.

In this configuration, when the D/A converter is stopped, the gate-source voltage of the n first MOS transistors gradually decreases in advance while maintaining the operation of the n first current sources, and 1MOS transistor gradually approaches the off state. Therefore, the currents flowing through the first current path and the second current path gradually decrease in a balanced state, so that noise can be reduced.

The stop circuit may turn off the n first current sources after reducing the gate-source voltage of the n first MOS transistors. This makes it possible to reduce wasteful current consumption when the D/A converter is in a stopped state. Further, even if the timing at which the n first current sources turn off is shifted, the currents generated by them are zero, so no noise is generated.

The n first current sources may include n second MOS transistors whose gates are commonly connected. The audio circuit may further include a bias circuit that supplies a first bias voltage to the gates of the n first MOS transistors and supplies a second bias voltage to the gates of the n second MOS transistors.

The bias circuit includes a third MOS transistor of the same type as the first MOS transistor, and a fourth MOS transistor of the same type as the second MOS transistor, whose gate and drain are connected to the gate of the second MOS transistor, and whose source is connected to the third MOS transistor. , and a reference current source connected to the drain of the fourth MOS transistor. Thereby, the n second MOS transistors operate as a current source proportional to the reference current generated by the reference current source.

The bias circuit has the same type as the first MOS transistor, a fifth MOS transistor whose gate is connected to the gate of the first MOS transistor, and whose source is connected to the source of the first MOS transistor, and a fifth MOS transistor whose gate is the same type as the second MOS transistor, and whose gate is connected to the gate of the first MOS transistor. , a sixth MOS transistor whose source is connected to the gate of the second MOS transistor, whose source is connected to the drain of the fifth MOS transistor, whose drain is connected to the resistor, and the gate of the fifth MOS transistor such that the voltage drop across the resistor approaches the reference voltage. The device may further include a feedback circuit that controls the voltage. The gate voltage of the fifth MOS transistor may be supplied as the first bias voltage to the n first MOS transistors.

A capacitor may be connected between the gate and source of the fifth MOS transistor. The stop circuit may include a second current source that discharges the capacitor in response to the stop signal. Thereby, the gate-source voltages of the n first MOS transistors can be gradually lowered, and they can be turned off gently.

The amount of current generated by the second current source may be externally settable. By adjusting the amount of current according to the capacitance of the capacitor, the turn-off speed of the n first MOS transistors can be optimized.

The timing for turning off the n first current sources may be generated according to a control signal from an external controller.

The timing for turning off the n first current sources may be generated by a stop circuit.

The audio circuit may be monolithically integrated on one semiconductor substrate. "Integration" includes cases where all of the circuit components are formed on a semiconductor substrate, cases where the main components of the circuit are integrated, and some of the components are integrated to adjust the circuit constants. A resistor, a capacitor, etc. may be provided outside the semiconductor substrate. By integrating circuits on one chip, the circuit area can be reduced and the characteristics of circuit elements can be kept uniform.

(Embodiment)
DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on preferred embodiments with reference to the drawings. Identical or equivalent components, members, and processes shown in each drawing are designated by the same reference numerals, and redundant explanations will be omitted as appropriate. Further, the embodiments are illustrative rather than limiting the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

In this specification, "a state in which member A is connected to member B" refers to a case where member A and member B are physically directly connected, or where member A and member B are electrically connected. This also includes cases where it is indirectly connected via other members that do not affect the state or inhibit the function.

Similarly, "a state in which member C is provided between member A and member B" refers to the case where member A and member C or member B and member C are directly connected, This also includes cases where the connection is made indirectly through other members that do not affect the connection state or inhibit the function.

The vertical and horizontal axes of the waveform diagrams and time charts referred to in this specification have been enlarged or reduced as appropriate for ease of understanding, and each waveform shown has also been simplified for ease of understanding. exaggerated or emphasized.

FIG. 4 is a circuit diagram showing the basic configuration of audio IC 200 according to the embodiment. Audio system 100 includes an audio IC 200 and transimpedance amplifiers 102 and 104.

Audio IC 200 includes a current segment type D/A converter 300. The current segment type D/A converter 300 converts the digital audio signal DIN into differential current signals I _OUT+ and I _OUT- , and outputs them from output terminals OUT+ and OUT-. The digital audio signal DIN is a bit string including n bits b1 to bn.

Transimpedance amplifiers 102 and 104 convert differential current signals I _OUT+ and I _OUT- into voltage signals V _OUT+ and V _OUT- , respectively.

The current segment type D/A converter 300 includes n first MOS transistors MP1_1 to MP1_n, n first current sources CS1_1 to CS1_n, n selectors SEL1 to SELn, and a stop circuit 310.

The gates and sources of the n first MOS transistors MP1_1 to MP1_n are commonly connected. In this embodiment, the n first MOS transistors MP1 are PMOS transistors, and their sources are connected to the power supply pin VCC. Further, during the operation of the current segment type D/A converter 300, the gate voltages of the n first MOS transistors MP1_1 to MP1_n are biased to an appropriate voltage level by a bias circuit (not shown).

The n first current sources CS1_1 to CS1_n correspond to the n first MOS transistors MP1_1 to MP1_n. The i-th first current source CS1_i (1≦i≦n) is connected to the drain of the corresponding first MOS transistor MP1_i. The n first current sources CS1_1 to CS1_n generate equal current I ₀ .

The n selectors SEL1 to SELn correspond to the n first current sources CS1_1 to CS1_n. The i-th selector SELi selects the current _I0 generated by the corresponding one CS1_i of the n first current sources CS1_1 to CS1_n to the corresponding one of the digital audio signal DIN among the first current path 302 and the second current path 304. bit bi. For example, when bi=1, current I ₀ is supplied to the first current path 302, and when bi=0, current I ₀ is supplied to the second current path 304.

When the stop circuit 310 receives the stop signal DAC_OFF of the current segment type D/A converter 300, it gradually reduces the gate-source voltage V _GS of the n first MOS transistors MP1_1 to MP1_n over time. After that, the stop circuit 310 negates the enable signal CS_EN for the n first current sources CS1_1 to CS1_n after the gate-source voltage V _GS becomes sufficiently small (for example, becomes substantially zero). , turn them off.

The above is the basic configuration of the audio IC 200. Next, its operation will be explained. FIG. 5 is an operational waveform diagram of the current segment type D/A converter 300 of FIG. 4. During the signal period t ₀ to t ₁ , the number k of bits with a value of 1 among the n bits of the digital input signal DIN changes moment by moment, and as a result, the output voltages V _OUT+ and V _OUT- change. Change.

During the no-signal period t ₁ to t ₂ , the n bits of the digital input signal DIN contain the same number of 0s and 1s (n/2). At this time, the differential voltage signals V _OUT+ and V _OUT- are equally stabilized at the bias level Vb.
Vb=-(n×I ₀ /2)×R

During the signal period t ₀ to t ₁ and the non-signal period t ₁ to t ₂ , the gate-source voltage V _GS of the n first MOS transistors MP1_1 to MP1_n is biased to an appropriate voltage level.

When the stop signal DAC_OFF is asserted at time _t2 , the stop circuit 310 gradually lowers the gate-source voltage _VGS of the plurality of first MOS transistors MP1_1 to MP1_n. The period until time _t3 when the gate-source voltage _VGS becomes substantially zero is called a turn-off period.

During the turn-off period, the differential voltage signals V _OUT+ and V _OUT- gradually increase from the bias level Vb toward 0V.

Then, at time t3, the enable signal CS_EN is negated, and the n first current sources CS1_1 to CS1_n are turned off.

The above is the operation of the current segment type D/A converter 300. According to this current segment type D/A converter 300, switching noise when the D/A converter is stopped can be suppressed.

The present invention extends to various devices and methods that can be understood as the circuit diagram of FIG. 4 or derived from the above description, and is not limited to a specific configuration. Hereinafter, more specific configuration examples and examples will be described, not to narrow the scope of the present invention, but to help understand and clarify the essence and operation of the invention.

FIG. 6 is a circuit diagram of the audio IC 200A according to the first embodiment. The n first current sources CS1_1 to CS1_2 include n second MOS transistors MP2_1 to MP2_n whose gates are commonly connected. A first bias voltage Vbp1 generated by the bias circuit 320 is supplied to the gates of the plurality of first MOS transistors MP1, and a second bias voltage Vbp2 generated by the bias circuit 320 is supplied to the gates of the plurality of second MOS transistors MP2. be done.

The bias circuit 320 includes a third MOS transistor MP3 to a sixth MOS transistor MP6, a reference current source 322, and a feedback circuit 324.

The third MOS transistor MP3 is of the same type as the first MOS transistor MP1, and its gate and drain are connected. The fourth MOS transistor MP4 has the same type as the second MOS transistor MP2, and has a gate and a drain connected to the gate of the second MOS transistor MP2. The source of the fourth MOS transistor MP4 is connected to the drain of the third MOS transistor MP3. The reference current source 322 is connected to the drain of the fourth MOS transistor MP4 and generates a reference current I _REF .

The fourth MOS transistor MP4 and n second MOS transistors MP2_1 to MP2_n form a current mirror circuit. The gate voltage of the fourth MOS transistor MP4 is supplied as the second bias voltage Vbp2 to the gates of the n second MOS transistors MP2_1 to MP2_n, and the voltage applied to the n second MOS transistors MP2_1 to MP2_n is proportional to the reference current I _REF . A current _I0 flows.

The fifth MOS transistor MP5 is of the same type as the first MOS transistor MP1, and its gate is connected to the gate of the first MOS transistor MP1. Further, the sources of the fifth MOS transistor MP5 and the n first MOS transistors MP1_1 to MP1_n are connected to the power supply pin VCC.

The sixth MOS transistor MP6 is of the same type as the second MOS transistor MP2. The gate of the sixth MOS transistor MP6 is connected to the gate of the second MOS transistor MP2, and the source thereof is connected to the drain of the fifth MOS transistor MP5. The drain of the sixth MOS transistor MP6 is connected to the resistor R1. The feedback circuit 324 feedback-controls the gate voltages of the n first MOS transistors MP1_1 to MP1_n and the fifth MOS transistor MP5 so that the voltage drop across the resistor R1 approaches the reference voltage _VBG . For example, the feedback circuit 324 can be configured with an operational amplifier. The gate voltage of the fifth MOS transistor MP5 is supplied as the first bias voltage Vbp1 to the gates of the n first MOS transistors MP1_1 to MP1_n.

An external capacitor C1 is connected between the gate and source of the fifth MOS transistor MP5, that is, between the VREF pin and the VCC pin. This stabilizes the first bias voltage Vbp1.

Stop circuit 310 includes a second current source 312 and logic circuit 314.

The second current source 312 is connected to the gate of the fifth MOS transistor MP5. The logic circuit 314 enables the second current source 312 in response to the stop signal DAC_OFF. The second current source 312 sources an off-current I _OFF to the gate of the fifth MOS transistor MP5 to discharge the capacitor C1. Thereby, the first bias voltage Vbp1, that is, the gate-source voltage _VGS of the first MOS transistor MP1 can be gradually changed with a constant slope.

For example, the amount of current generated by the second current source CS2 may be settable from the outside. For example, the audio IC 200A may include an I ² C (Inter IC) interface circuit and write a current setting value in a predetermined register. Thereby, the amount of current I _OFF can be set according to the capacitance of capacitor C1, and the rate of change of first bias voltage Vbp1 can be set.

After enabling the second current source 312, the logic circuit 314 negates the enable signal CS_EN of the current source CS1 at a predetermined timing to turn off the n first current sources CS1. The method of turning off the n first current sources CS1 is not limited. For example, the reference current source 322 may be stopped, or the gate and source of the fourth MOS transistor MP4 may be shorted.

The logic circuit 314 may generate the timing to negate the enable signal CS_EN. For example, the logic circuit 314 may include a timer circuit, and may negate the enable signal CS_EN after a predetermined time has elapsed since the stop signal DAC_OFF was asserted.

Alternatively, the stop circuit 310 may include a comparator (not shown) that compares the gate-source voltage _VGS of the first MOS transistor MP1 with a predetermined threshold. The logic circuit 314 may negate the enable signal CS_EN when the gate-source voltage V _GS becomes smaller than a threshold value.

Alternatively, the logic circuit 314 may receive the timing for turning off the n first current sources CS1 from outside the audio IC 200A.

FIG. 7 is a diagram showing the measurement results of noise of the audio IC 200A of FIG. 6. FIG. 7 shows waveforms measured with an oscilloscope. Time _t2 is the start timing of the stop period, and time _t3 indicates the timing at which the current source enable signal CS_EN is negated.

When the stop signal DAC_OFF is generated at time t ₀ , the differential signals V _OUT+ and V _OUT- gradually increase over time while maintaining substantially the same voltage level.

FIG. 8 is a block diagram of the audio system 100B. The audio system 100B includes a two-channel audio IC 200B and transimpedance amplifiers 102L, 104L, 102R, and 104R.

In addition to two-channel current segment type D/A converters 300L and 300R, the audio IC 200B includes a PCM (Pulse-Code Modulation) interface 202, a DSD interface 204, an audio function controller 208, an oversampling filter 210, a ΔΣ modulator 212, It includes a control interface 220, a system controller 222, and a reference current source 224.

PCM interface 202 receives an audio signal in PCM format from an external sound source. The audio function controller 208 performs various signal processing on the PCM format audio signal. Oversampling filter 210 oversamples the output of audio function controller 208. The ΔΣ modulator 212 performs ΔΣ modulation on the output of the oversampling filter 210.

DSD interface 204 receives audio signals in DSD format from an external sound source.

The current segment type D/A converters 300L and 300R receive the output of the ΔΣ modulator 212 or the DSD interface 204 and convert it into an analog audio signal (current signal). The output of D/A converter 300L is converted into a voltage signal by transimpedance amplifiers 102L and 104L, and the output of D/A converter 300R is converted into a voltage signal by transimpedance amplifiers 102R and 104R.

The control interface 220 is an I ² C interface or an SPI (Serial Peripheral Interface), and receives control signals and setting values from an external microcomputer. This control signal includes the stop signal DAC_OFF for the current segment type D/A converter 300 described above.

The system controller 222 controls the audio IC 200B based on the signal received by the control interface 220. Logic circuit 314 of FIG. 6 may be implemented as part of system controller 222.

The audio IC 200 can be used in electronic devices such as audio players, smartphones, digital cameras, laptop computers, desktop computers, and digital video cameras. Alternatively, the audio IC 200 can be used in a digital player that is an audio component device, or can be used in an in-vehicle audio system.

The present invention has been described above based on the embodiments. Those skilled in the art will understand that this embodiment is merely an example, and that various modifications can be made to the combinations of these components and processing processes, and that such modifications are also within the scope of the present invention. be. Hereinafter, such modified examples will be explained.

(Modification 1)
Although the current source type current segment type D/A converter 300 has been described in FIGS. 4 and 6, it may be configured as a current sink type. FIG. 9 is a circuit diagram of an audio IC 200C according to modification 1. Audio IC 200C includes a current segment type D/A converter 300C. The current segment type D/A converter 300C is composed of NMOS transistors, and specifically has a configuration in which the PMOS transistor in FIG. 6 is replaced with an NMOS transistor and the top and bottom are reversed.

In this first modification, the V/I conversion circuit is composed of only resistors, but it may also be composed of a transimpedance amplifier.

(Modification 2)
In the embodiment, the transimpedance amplifiers 102 and 104 are provided outside the audio IC 200, but they may be integrated into the audio IC 200.

Although the present invention has been described using specific words based on the embodiments, the embodiments merely illustrate one aspect of the principles and applications of the present invention, and the embodiments do not include the claims. Many modifications and changes in arrangement are possible without departing from the spirit of the invention as defined in scope.

100 Audio system 102,104 Transimpedance amplifier 200 Audio IC
202 PCM interface 204 DSD interface 208 Audio function controller 210 Oversampling filter 212 ΔΣ modulator 220 Control interface 222 System controller 224 Reference current source 300 Current segment type D/A converter 302 First current path 304 Second current path 310 Stop circuit 312 Second current source 314 Logic circuit MP1 First MOS transistor 320 Bias circuit 322 Reference current source 324 Feedback circuit CS1 First current source CS2 Second current source SEL Selector MP1 First MOS transistor MP2 Second MOS transistor MP3 Third MOS transistor MP4 Fourth MOS transistor MP5 5th MOS transistor MP6 6th MOS transistor

Claims (10)

It includes a current segment type D/A converter that converts an n-bit digital audio signal into an analog differential signal,
The current segment type D/A converter includes:
n first MOS transistors (n≧2) whose gates are commonly connected and whose sources are commonly connected;
n first current sources corresponding to the n first MOS transistors, each connected to a corresponding one drain of the n first MOS transistors;
Corresponding to the n first current sources, each one of the first current path and the second current path generates a current generated by a corresponding one of the n first current sources of the digital audio signal. n selectors that supply one to the other according to the corresponding bit;
Upon receiving a stop signal of the current segment type D/A converter, the gate-source voltages of the n first MOS transistors are gradually lowered over time while maintaining the operation of the n first current sources. a stop circuit;
An audio circuit characterized by comprising: 2. The audio circuit according to claim 1, wherein the stop circuit turns off the n first current sources after reducing the gate-source voltage of the n first MOS transistors. The n first current sources include n second MOS transistors whose gates are commonly connected,
The current segment type D/A converter further includes a bias circuit that supplies a first bias voltage to the gates of the n first MOS transistors and supplies a second bias voltage to the gates of the n second MOS transistors. The audio circuit according to claim 1 or 2, characterized in that: The bias circuit is
a third MOS transistor of the same type as the first MOS transistor;
a fourth MOS transistor of the same type as the second MOS transistor, whose gate and drain are connected to the gate of the second MOS transistor, and whose source is connected to the third MOS transistor;
a reference current source connected to the drain of the fourth MOS transistor;
4. The audio circuit according to claim 3, wherein a gate voltage of the fourth MOS transistor is the second bias voltage. The bias circuit is
a fifth MOS transistor that is the same type as the first MOS transistor, has a gate connected to the gate of the first MOS transistor, and has a source connected to the source of the first MOS transistor;
a sixth MOS transistor that is the same type as the second MOS transistor, has a gate connected to the gate of the second MOS transistor, a source connected to the drain of the fifth MOS transistor, and a drain connected to a resistor;
a feedback circuit that controls the gate voltage of the fifth MOS transistor so that the voltage drop across the resistor approaches a reference voltage;
5. The audio circuit according to claim 4, further comprising: a gate voltage of the fifth MOS transistor being the first bias voltage. A capacitor is connected between the gate and source of the fifth MOS transistor,
6. The audio circuit of claim 5, wherein the stop circuit includes a second current source that discharges the capacitor in response to the stop signal. 7. The audio circuit according to claim 6, wherein the amount of current generated by the second current source can be set externally. 3. The audio circuit according to claim 2, wherein the timing for turning off the n first current sources is generated according to a control signal from an external controller. 3. The audio circuit according to claim 2, wherein the timing for turning off the n first current sources is generated by the stop circuit. 10. The audio circuit according to claim 1, wherein the audio circuit is integrally integrated on one semiconductor substrate.

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