JP7400219B2 - Performance evaluation device, performance evaluation method, and performance evaluation program for nonvolatile semiconductor storage devices - Google Patents

Description

The present invention relates to a performance evaluation device, a performance evaluation method, and a performance evaluation program for nonvolatile semiconductor storage devices such as memory cards.

In recent years, nonvolatile semiconductor storage devices such as memory cards (SD cards, etc.), USB memories, and solid state drives (SSD) have become popular. A nonvolatile semiconductor memory device includes a nonvolatile semiconductor memory such as a NAND flash memory, and a controller that controls access to the nonvolatile semiconductor memory. There are a wide variety of types of nonvolatile memories and controllers built into nonvolatile semiconductor storage devices, and there are also a wide variety of combinations thereof.

As a method of predicting the lifespan of nonvolatile semiconductor memory, a method has been proposed in which the cumulative amount of writes to the nonvolatile semiconductor memory is recorded in association with the date of start of use, and the date and time when the nonvolatile semiconductor memory reaches its lifespan is predicted ( For example, see Patent Document 1). In addition, if the pre-obtained lifespan exceeds a certain level, the swap function, which performs write processing to temporarily save unused programs when physical memory capacity is insufficient, can be turned off to shorten the lifespan of the storage device. A method to avoid this has been proposed (for example, see Patent Document 2). In addition, the characteristics of the access time for each unit storage area, which is measured by writing data in a nonvolatile semiconductor memory device with a predetermined access pattern, are compared with the characteristics of other nonvolatile semiconductor memory devices. A method for classifying semiconductor memory devices has been proposed (for example, see Patent Document 3).

Japanese Patent Application Publication No. 2017-142776 Japanese Patent Application Publication No. 2018-156582 JP2016-157228A

Incidentally, eMMC (embedded multi media card), which is one type of nonvolatile semiconductor memory device, is often mounted on a circuit board by a reflow process or the like after data is written therein before being mounted on the circuit board. In the eMMC, a data verification test is sometimes performed after the board is mounted, but this verification test does not go so far as to evaluate the deterioration of the internal memory. No method has been considered to evaluate the subsequent performance of nonvolatile semiconductor memory devices that have been subjected to environmental changes such as thermal loads due to reflow processing, including cases where data is not written to eMMC before mounting on a circuit board. .

The present invention has been made in view of these circumstances, and its purpose is to provide a performance evaluation device, a performance evaluation method, and a performance evaluation program for evaluating the performance of a nonvolatile semiconductor memory device mounted on a circuit board. be.

A performance evaluation device according to an aspect of the present invention is a performance evaluation device for a nonvolatile semiconductor memory device that includes a nonvolatile semiconductor memory and a controller and is mounted on a circuit board, wherein the nonvolatile semiconductor memory device is accessed in a predetermined access pattern. a write processing unit that writes data and acquires access time data; a determination processing unit that determines whether the access time data acquired by the write processing unit exceeds standard access time data; and the determination processing unit and a performance evaluation section that evaluates the performance of the nonvolatile semiconductor memory device based on the determination result.

Another aspect of the present invention is a performance evaluation method. This performance evaluation method is a performance evaluation method of a non-volatile semiconductor memory device that includes a non-volatile semiconductor memory and a controller and is mounted on a circuit board. a write processing step for acquiring time data; a determination processing step for determining whether the access time data acquired by the write processing step exceeds standard access time data; and a determination processing step based on the determination result from the determination processing step. and a performance evaluation step of evaluating the performance of the nonvolatile semiconductor memory device.

According to the present invention, it is possible to evaluate the performance of a nonvolatile semiconductor memory device mounted on a circuit board.

FIG. 3 is a schematic diagram showing an example of a predetermined access pattern. 7 is a graph showing an example of access time distribution for a predetermined access pattern. FIG. 2 is a block diagram showing the configuration of a performance evaluation device when evaluating a single eMMC. It is a flowchart which shows the procedure of initial evaluation processing of eMMC. FIG. 2 is a block diagram showing the configuration of a performance evaluation device when mounting an eMMC board. 7 is a flowchart showing the procedure of performance evaluation processing. 7 is a graph showing an example of access time distribution for a predetermined access pattern when performance deteriorates. FIG. 2 is a block diagram showing the configuration of a performance evaluation device when evaluating a single eMMC removed from a circuit board.

Hereinafter, the present invention will be explained based on a preferred embodiment with reference to FIGS. 1 to 8. Identical or equivalent components and members shown in each drawing are designated by the same reference numerals, and redundant explanations will be omitted as appropriate. Further, the dimensions of members in each drawing are shown enlarged or reduced as appropriate to facilitate understanding. Further, in each drawing, some members that are not important for explaining the embodiments are omitted.

(Embodiment)
For example, in a NAND-based memory, which is a nonvolatile semiconductor memory, when the memory is accessed according to a predetermined access pattern, the access time, which is the time until a response indicating completion of the access is obtained, tends to be approximately constant. Similarly, for eMMC, which is a board-mounted memory, a certain access time can be obtained by evaluating the access time by accessing the memory with a predetermined access pattern before mounting on the circuit board. Note that eMMC is an example of a board-mounted memory included in a nonvolatile semiconductor memory device that includes a nonvolatile semiconductor memory and a controller.

Since eMMCs are generally board-mounted devices, exact access times are often not determined as specifications. For this reason, even if eMMCs have the same model number, there is a tendency for variations in evaluation results within the range of threshold values that are determined to be normal by the eMMC manufacturer. However, for eMMCs of the same model number that have undergone the same evaluation, for example, the same number of times, the same environmental change, and the same access method, there are multiple individuals with the same access time for each unit area. . This will be referred to as the standard individual of eMMC.

This standard eMMC is an individual that has no or small production variation in the write performance and read performance of the NAND flash memory inside the eMMC, and provides the most standard access time.

FIG. 1 is a schematic diagram showing an example of a predetermined access pattern. In FIG. 1, the vertical axis indicates LBA (Logical Block Address), and the horizontal axis indicates command issue number (number indicating command issue order). Each command is issued in the order of increasing command issue number. The write pattern shown in FIG. 1 indicates access in the forward direction, and writes are performed over the entire surface of the medium in units of 256 sectors from 0LBA to the maximum LBA. The data to be written can be arbitrary, but if you write continuous data from 0, 1, 2, to F that always adds 1, if there is a problem with the written data, you will not know which data caused the problem. It's convenient and makes it easy to discover what's warm. It is desirable that the access pattern be set to the maximum transfer amount of the device that transfers data, and in this embodiment, writing is performed in units of 256 sectors, which is the maximum value of 28-bit LBA transfer. The access pattern is not limited to this, and may be, for example, 512 sectors. Alternatively, access may be made in the reverse direction from the maximum LBA to 0LBA. In consideration of the overall processing time, writing may not be performed on the entire surface of the medium, but access may be limited to a predetermined fixed area so that the processing can be completed within the expected time.

FIG. 2 is a graph showing an example of access time distribution for a predetermined access pattern. In FIG. 2, the vertical axis indicates access time, and the horizontal axis indicates command issue number. The access time is defined as the time from issuing a command for write processing according to a predetermined access pattern to receiving a write completion response command. Access times are obtained for each command issue number, and are plotted in detail on the order of milliseconds in FIG.

FIG. 3 is a block diagram showing the configuration of the performance evaluation device 10 when evaluating a single eMMC. The performance evaluation device 10 includes a write processing section 11, a storage processing section 12, and a standard extraction section 13, and executes a write process to the eMMC 30 via a command execution section 40. The performance evaluation device 10 is constituted by, for example, a personal computer, and executes the processing by each of the above-mentioned sections according to a computer program stored in the storage section 20 and various information used in the computer program. The storage unit 20 is constituted by a data storage device such as a RAM (Random Access Memory), a flash memory, or a hard disk storage device, and stores a predetermined access pattern.

The write processing unit 11 reads a predetermined access pattern from the storage unit 20, and executes a write process to the eMMC 30 using the read access pattern. The write processing unit 11 obtains the access time for each command issue number in a predetermined access pattern. The storage processing unit 12 stores the access time for each command issue number acquired by the write processing unit 11 in the storage unit 20 as access time data for one eMMC 30.

As a result of performing access based on the access time data of the plurality of eMMCs 30 stored in the storage section 20, the standard extraction section 13 finds a plurality of eMMCs having the same access time distribution, and sets them as standard individuals. The standard extraction unit 13 also registers the access time data of the standard individual in the database device 50 as standard access time data. Note that the database device 50 is constituted by a data storage device such as a hard disk.

The command execution unit 40 is connected to the performance evaluation device 10, receives commands from the performance evaluation device 10, and executes write processing and read processing. The eMMC 30 is electrically connected to the command execution unit 40 using, for example, a socket.

The eMMC 30 includes a nonvolatile semiconductor memory 31 and a controller 32. Upon receiving the write command and write data from the command execution unit 40, the controller 32 writes the data into a designated storage area of the nonvolatile semiconductor memory 31. When writing of the data is completed, a response signal is returned to the command execution unit 40. When the controller 32 receives a read command from the command execution unit 40 , it reads data from the designated storage area of the nonvolatile semiconductor memory 31 and transmits it to the command execution unit 40 .

FIG. 4 is a flowchart showing the procedure of the initial evaluation process of the eMMC 30. In the initial evaluation process of the eMMC 30, a standard individual is extracted and standard access time data is acquired. In the performance evaluation device 10, the number n of evaluation samples of the eMMC 30 is set (S1). The write processing unit 11 acquires access time data according to a predetermined access pattern (S2). The storage processing unit 12 causes the storage unit 20 to store the acquired access time data. The write processing unit 11 determines whether or not the set n evaluations have been completed (S3), and if they have not been completed (S3: NO), the process returns to step S2 for the next eMMC 30. repeat.

In step S3, when it is determined that n evaluations have been completed (S3: YES), the standard extraction unit 13 extracts standard individuals based on the dispersion of the n evaluation results (S4). The standard extraction unit 13 registers the standard individual data including the standard access time data in the database device 50 (S5).

In an initial evaluation to find a standard individual eMMC 30, a plurality of eMMCs 30 are not mounted on a circuit board, but are connected to a performance evaluation device 10 that performs writing processing using a socket or the like. The performance evaluation device 10 executes write processing using at least a predetermined access pattern (see FIG. 1) and measures access time. In the performance evaluation device 10, it is desirable that there is no overhead caused by the operating system when measuring access time. Furthermore, the performance evaluation device 10 is capable of writing or reading data in a predetermined access pattern to all areas at the bus speed of the fastest possible transfer frequency for large amounts of data that can be transferred in one transfer. preferable. As a result of measuring the access times of a plurality of eMMCs 30 through initial evaluation and drawing a graph showing the access times as shown in FIG. 2, a plurality of eMMCs 30 having the same access time distribution are found and set as standard individuals.

The eMMC 30 from which standard access time data has been acquired will be mounted on circuit boards in various electrical products. eMMC30 solves the problem in the access time of the standard unit when a problem occurs in the area of the NAND flash memory that was originally intended for writing due to reflow processing or an increase in the number of writes before and after mounting on the circuit board. As a result, the access time becomes longer than that of the standard individual. For example, when attempting to write to an area of a NAND flash memory, a writing problem occurs and retries are required to perform the write several times, and then rewriting to an alternative area is performed, resulting in access time is longer than the standard individual.

FIG. 5 is a block diagram showing the configuration of the performance evaluation apparatus 10A when mounting an eMMC board. The eMMC 30 has a nonvolatile semiconductor memory 31 and a controller 32. The eMMC 30 is mounted on a circuit board together with the performance evaluation device 10A. Upon receiving the write command and write data, the controller 32 writes the data into a designated storage area of the nonvolatile semiconductor memory 31. When writing of the data is completed, a response signal is returned. Further, upon receiving the read command, the controller 32 reads data from the designated storage area of the nonvolatile semiconductor memory 31 and returns the read data.

The performance evaluation device 10A is a main controller installed inside electronic devices such as vehicle-mounted devices such as car navigation devices and drive recorders, household electrical appliances, and stationary and portable information processing devices. Control these electronic devices in normal operation. The performance evaluation device 10A as a main controller outputs commands during normal operation to the controller 32 of the eMMC 30 during normal operation. After outputting a command for normal operation to the controller 32, the performance evaluation device 10A outputs a predetermined command to the controller 32 and executes performance evaluation if the next command is not issued consecutively. It's good to do that.

The performance evaluation device 10A includes a write processing section 11, a storage processing section 12, a determination processing section 14, and a performance evaluation section 15. The performance evaluation device 10A is provided in the above-mentioned electronic device together with the eMMC 30. The performance evaluation device 10A is configured by, for example, a CPU, and executes processing by each of the above-mentioned units according to a computer program stored in the eMMC 30 and various information used in the computer program.

The write processing unit 11 executes a write process on the eMMC 30 using a predetermined access pattern, and acquires access time data by the write process. The write processing unit 11 reads a predetermined access pattern and write data from the eMMC 30. It is assumed that the operation of the performance evaluation device 10A reading and writing to the eMMC 30 in normal operation and the operation of the write processing unit 11 writing to the eMMC 30 are not executed at the same time.

The storage processing unit 12 performs a process of storing the access time data acquired by the write processing unit 11 in the eMMC 30. The eMMC 30 stores the above-mentioned standard access time data acquired for the eMMC 30 in advance. Further, the eMMC 30 stores a predetermined access pattern and write data to be written to the eMMC 30.

The determination processing unit 14 compares and determines the standard access time data stored in the eMMC 30 and the response time data acquired by the write processing unit 11. It is preferable to use the standard access time data registered in the database device 50 as described above. For example, the determination processing unit 14 compares the standard access time data and the access time data for each command issue number in a predetermined access pattern, and determines whether the access time data exceeds the standard access time data. In addition, the determination processing unit 14 may compare and determine the standard access time data and the access time data using statistical values such as the average time, the most frequent time, or the standard deviation of the access times.

When the determination processing unit 14 determines that the access time data exceeds the standard access time data, the performance evaluation unit 15 evaluates that the performance of the eMMC 30 is degraded, and stores the evaluation result in the eMMC 30. Furthermore, the performance evaluation unit 15 counts the number of times the access time data exceeds the standard access time data based on the result of determining the access time data and the standard access time data for each command issue number by the determination processing unit 14, and calculates the number of times the access time data exceeds the standard access time data. When the value exceeds the value, it may be evaluated that the performance has deteriorated.

When the performance evaluation unit 15 evaluates that the performance of the eMMC 30 has deteriorated, it may output a deterioration evaluation alarm indicating that reading and writing operations for the eMMC 30 should be stopped, and notify the outside. It is preferable to replace the eMMC 30, back up data, etc. based on the deterioration evaluation alarm output by the performance evaluation unit 15.

Next, the operation of the performance evaluation device 10A will be explained. FIG. 6 is a flowchart showing the procedure of performance evaluation processing. The write processing unit 11 of the performance evaluation device 10A executes a write process to the eMMC 30 for the command issue number based on the predetermined access pattern shown in FIG. 1, and obtains the access time (S11). Note that in the initial state of the performance evaluation process, the command issue number is set to 1, and the threshold value counter described later is reset to 0. The write processing unit 11 may write any data as long as it follows write processing according to a predetermined access pattern. For example, the write processing unit 11 may overwrite the same data such as map data written in the eMMC 30 before reflow mounting on the circuit board. Thereby, the performance evaluation process can be executed while suppressing consumption of the memory free space of the eMMC 30.

The data written to the eMMC 30 before reflow varies depending on the electronic device to be mounted, such as data such as video, music, screen display, audio, and even data prepared to realize the functions of the electronic device. .

The determination processing unit 14 determines whether the access time for the command issue number exceeds the standard access time data (S12), and when it is determined that it has exceeded the standard access time data (S12: YES), adds 1 to the threshold counter (S13). ). If it is determined in step S12 that the threshold value has not been exceeded (S12: NO) and after step S13, the performance evaluation unit 15 determines whether the threshold value counter is equal to or greater than a predetermined value (S14).

If it is determined that the threshold counter is equal to or greater than the predetermined value (S14: YES), the performance evaluation unit 15 outputs a performance deterioration alarm (S15) and ends the process. If it is determined that the threshold counter is not equal to or greater than the predetermined value (S14: NO), it is determined whether the write processing for all command issue numbers has been completed (S16), and if it has not been completed (S16: NO). , moves to the next command issue number (S17), returns to step S11, and repeats the process. If it is determined in step S16 that the writing process for all command issue numbers has been completed (S16: YES), the process ends.

FIG. 7 is a graph showing an example of access time distribution for a predetermined access pattern when performance deteriorates. If there is a problem in the area of the non-volatile semiconductor memory 31 to which writing is attempted, a process to correct the problem is performed by the controller 32 inside the eMMC 30, and the access time is extended by the time that the process occurs, as shown in FIG. .

For example, in the case of wear leveling, which is an attempt to equalize the deterioration of the non-volatile semiconductor memory 31 inside the eMMC 30, a large change in access time is usually not seen as a process performed inside the eMMC 30. However, if write processing such as retry is performed several times and processing to move data to an alternative area occurs, the access time will change significantly. An individual in which such a change in access time is observed is an individual in which some kind of abnormality has occurred in the internal nonvolatile semiconductor memory 31 even if the cumulative number of writes is small, so the performance may be worse than the standard individual. It can be determined that there is.

The performance evaluation device 10A evaluates the performance of the eMMC 30 mounted on the circuit board by determining and evaluating whether the access time data acquired by the write processing unit 11 exceeds the standard access time data. I can do it. In addition, the performance evaluation device 10A counts the cases in which the access time data exceeds the standard access time data, and evaluates that the performance has deteriorated when the access time data exceeds a predetermined value. When the above occurs, it can be determined that the eMMC 30 has deteriorated.

Standard access time data is determined based on response time data obtained by writing data in a predetermined access pattern to each of the plurality of eMMCs 30 before being mounted on a circuit board. The performance evaluation device 10A can evaluate the performance of the eMMC 30 based on access time data in a state where the eMMC 30 is not influenced by the external environment due to reflow processing or the like when the eMMC 30 is mounted on a circuit board.

Even if the eMMC 30 has a small cumulative number of writes, the performance evaluation device 10A determines whether the nonvolatile semiconductor memory 31 has deteriorated in performance due to changes in the external environment such as thermal load due to reflow processing, etc. possible.

In the performance evaluation processing procedure shown in FIG. 6, the performance evaluation device 10A evaluated the performance of the eMMC 30 based on whether the access time data according to the predetermined access pattern exceeds the standard access time data and the number of times the access time data exceeds the standard access time data. As described above, the performance evaluation device 10A uses the standard access time data and the access time data acquired by the write processing unit 11 based on statistical values such as the average time, the most frequent time, or the standard deviation of the access times. The performance of the eMMC 30 may be evaluated by comparing and determining the performance of the eMMC 30.

Moreover, when reballing and reusing the eMMC 30 once removed from the circuit board, performance evaluation may be performed on the eMMC 30 removed from the circuit board. In this case, in the single eMMC 30 that has been removed from the circuit board, write processing is performed using a predetermined access pattern in a state that it is not mounted on the circuit board, and the access time is obtained.

FIG. 8 is a block diagram showing the configuration of the performance evaluation device 10A when evaluating a single eMMC removed from the circuit board. The eMMC 30 removed from the circuit board is connected to the performance evaluation device 10A shown in FIG. 8 via the command execution unit 40 to perform performance evaluation. The eMMC 30 is electrically connected to the command execution unit 40 using, for example, a socket. The performance evaluation device 10A includes a write processing section 11, a storage processing section 12, a determination processing section 14, and a performance evaluation section 15, like the performance evaluation device 10A shown in FIG. 5, and is configured by, for example, a personal computer. The performance evaluation device 10A executes a write process from the write processing unit 11 to the eMMC 30 using a predetermined access pattern via the command execution unit 40, obtains the access time, and evaluates the performance of the eMMC 30 alone. As the predetermined access pattern, write data, etc., those stored in the storage unit 20 may be used, or those stored in the nonvolatile semiconductor memory 31 of the eMMC 30 may be used. Further, as the standard access time data, data stored in the database device 50 may be used, or data stored in the nonvolatile semiconductor memory 31 of the eMMC 30 may be used. If the access time of the single eMMC 30 removed from the circuit board is prolonged, it can be determined that the non-volatile semiconductor memory 31 has deteriorated and should not be reused.

Next, the characteristics of the performance evaluation devices 10 and 10A, the performance evaluation method, and the performance evaluation program according to each embodiment will be explained.
The performance evaluation device 10A includes a write processing section 11, a determination processing section 14, and a performance evaluation section 15, and evaluates the performance of an eMMC 30, which is a nonvolatile semiconductor memory device mounted on a circuit board, and includes a nonvolatile semiconductor memory 31 and a controller 32. Evaluate. The write processing unit 11 writes data to the eMMC 30 using a predetermined access pattern and obtains access time data. The determination processing unit 14 determines whether the access time data acquired by the write processing unit 11 exceeds standard access time data. The performance evaluation unit 15 evaluates the performance of the eMMC 30 based on the determination result by the determination processing unit 14. Thereby, the performance evaluation device 10A can evaluate the performance of the eMMC 30, which is a nonvolatile semiconductor memory device mounted on a circuit board.

The performance evaluation unit 15 also evaluates performance by counting the number of times the determination processing unit 14 determines that the access time data exceeds the standard access time data. Thereby, the performance evaluation device 10A can determine that the eMMC 30 has deteriorated when processing such as write retry is performed a predetermined number of times or more.

Furthermore, the performance evaluation device 10A evaluates the performance of the eMMC 30 after removing the eMMC 30, which is a nonvolatile semiconductor memory device, from the circuit board. Thereby, the performance evaluation device 10A can determine that the eMMC 30 removed from the circuit board will not be reused if the access time is prolonged.

Further, the standard access time data is determined based on access time data obtained by writing data in a predetermined access pattern to each of the plurality of eMMCs 30 before being mounted on a circuit board. Thereby, the performance evaluation device 10A can evaluate the performance of the eMMC 30 based on the access time data in a state where the eMMC 30 is not influenced by the external environment due to reflow processing or the like when the eMMC 30 is mounted on a circuit board. .

The performance evaluation device 10 includes a write processing section 11 and a standard extraction section 13, and evaluates the performance of an eMMC 30, which is a nonvolatile semiconductor memory device including a nonvolatile semiconductor memory 31 and a controller 32, before being mounted on a circuit board. . The write processing unit 11 writes data to a plurality of eMMCs 30 in a predetermined access pattern and obtains access time data. The standard extraction unit 13 acquires standard access time data based on variations in the plurality of access time data acquired by the write processing unit 11. Thereby, the performance evaluation device 10 can provide access time data in a state that is not influenced by the external environment for evaluation of the eMMC 30.

The performance evaluation method includes a write processing step, a determination processing step, and a performance evaluation step, and evaluates the performance of the eMMC 30, which is a nonvolatile semiconductor memory device that includes a nonvolatile semiconductor memory 31 and a controller 32 and is mounted on a circuit board. The write processing step writes data to the eMMC 30 in a predetermined access pattern and obtains access time data. The determination processing step determines whether the access time data acquired in the write processing step exceeds standard access time data. The performance evaluation step evaluates the performance of the eMMC 30 based on the determination result from the determination processing step. According to this performance evaluation method, the performance of the eMMC 30, which is a nonvolatile semiconductor memory device mounted on a circuit board, can be evaluated.

The performance evaluation program causes a computer to execute a write processing step, a determination processing step, and a performance evaluation step, and evaluates the performance of the eMMC 30, which is a nonvolatile semiconductor memory device that includes a nonvolatile semiconductor memory 31 and a controller 32 and is mounted on a circuit board. evaluate. The write processing step writes data to the eMMC 30 in a predetermined access pattern and obtains access time data. The determination processing step determines whether the access time data acquired in the write processing step exceeds standard access time data. The performance evaluation step evaluates the performance of the eMMC 30 based on the determination result from the determination processing step. According to this performance evaluation program, the performance of the eMMC 30, which is a nonvolatile semiconductor memory device mounted on a circuit board, can be evaluated.

The above description has been based on the embodiments of the present invention. Those skilled in the art will understand that these embodiments are illustrative and that various modifications and changes are possible and within the scope of the claims of the present invention. It is about to be done. Accordingly, the description and drawings herein are to be regarded in an illustrative rather than a restrictive sense.

10 Performance evaluation device (when evaluating eMMC alone),
10A performance evaluation device (when mounting eMMC board and when evaluating eMMC alone),
11 writing processing section, 13 standard extraction section,
14 Judgment processing unit, 15 Performance evaluation unit,
30 eMMC (nonvolatile semiconductor memory device),
31 non-volatile semiconductor memory, 32 controller.

Claims (5)

A performance evaluation device for a nonvolatile semiconductor memory device mounted on a circuit board including a nonvolatile semiconductor memory and a controller,
a write processing unit that writes data in the nonvolatile semiconductor memory device in a predetermined access pattern and acquires access time data;
a determination processing unit that determines whether the access time data acquired by the write processing unit exceeds standard access time data;
a performance evaluation unit that evaluates the performance of the nonvolatile semiconductor storage device based on the determination result by the determination processing unit ,
The standard access time data is for each of a plurality of non-volatile semiconductor memory devices including at least an individual other than the non-volatile semiconductor memory device, such that data is transmitted in a predetermined access pattern before being mounted on a circuit board. A performance evaluation device characterized in that the distribution of access times obtained by writing is determined based on access time data that is equivalent . The performance evaluation device according to claim 1, wherein the performance evaluation unit evaluates performance by counting the number of times the determination processing unit determines that the access time data exceeds standard access time data. 3. The performance evaluation apparatus according to claim 1, wherein the performance of the nonvolatile semiconductor memory device is evaluated after the nonvolatile semiconductor memory device is removed from the circuit board. A method for evaluating the performance of a nonvolatile semiconductor memory device mounted on a circuit board including a nonvolatile semiconductor memory and a controller, the method comprising:
a write processing step of writing data in the nonvolatile semiconductor memory device in a predetermined access pattern and acquiring access time data;
a determination processing step of determining whether the access time data acquired in the write processing step exceeds standard access time data;
a performance evaluation step of evaluating the performance of the nonvolatile semiconductor storage device based on the determination result of the determination processing step ;
The standard access time data is for each of a plurality of non-volatile semiconductor memory devices including at least an individual other than the non-volatile semiconductor memory device, such that data is transmitted in a predetermined access pattern before being mounted on a circuit board. A performance evaluation method characterized in that the distribution of access times obtained by writing is determined based on access time data that is equivalent . A performance evaluation program for a nonvolatile semiconductor memory device mounted on a circuit board including a nonvolatile semiconductor memory and a controller,
a write processing step of writing data in the nonvolatile semiconductor memory device in a predetermined access pattern and acquiring access time data;
a determination processing step of determining whether the access time data acquired in the write processing step exceeds standard access time data;
causing a computer to execute a performance evaluation step of evaluating the performance of the nonvolatile semiconductor storage device based on the determination result of the determination processing step ;
The standard access time data is for each of a plurality of non-volatile semiconductor memory devices including at least an individual other than the non-volatile semiconductor memory device, such that data is transmitted in a predetermined access pattern before being mounted on a circuit board. A performance evaluation program characterized in that the distribution of access times obtained by writing is determined based on access time data that is equivalent .

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