JP7381316B2 - Motor control device and image forming device - Google Patents

Description

The present invention relates to motor control technology.

In a DC brushless motor used as a drive source for an image forming apparatus or the like, control performance can be improved by providing a current control loop in addition to a speed control loop. In order to provide a current control loop, it is necessary to detect the current flowing in the coil of the motor (hereinafter referred to as coil current). Patent Document 1 discloses a configuration in which a coil current is passed through a shunt resistor and the coil current is detected based on the voltage generated across the shunt resistor.

Japanese Unexamined Patent Publication No. 63-80774

In order to accurately detect the coil current, it is necessary to detect the current value while the coil current is flowing through the shunt resistor. Additionally, in order to detect the coil currents of all phases of the motor, it is necessary to stop applying voltage to the coils of each phase and detect the coil currents while regenerative current is flowing through the coils of each phase. be. Note that the coil current is normally controlled by controlling on/off of a switching element such as an FET using a pulse width modulation (PWM) signal. Here, there is usually a lag between the timing at which the switching element is turned on and off by the PWM signal and the timing at which the state of the switching element changes.

Therefore, for example, in order to detect a coil current using a regenerative current, it is necessary to make the off period during which voltage application to the coil is stopped sufficiently long. However, increasing the off period for coil current sensing means that the power that can be input to the motor is reduced. In other words, the motor's full potential cannot be used.

The present invention provides a motor control technique that can shorten the period during which voltage application to the coil is stopped.

According to one aspect of the present invention, a motor control device includes voltage control means for controlling voltages applied to a plurality of coils of a motor, current detection means for detecting current values of the plurality of coils, and the voltage control means. controlling a current to flow through a first measuring coil among the plurality of coils, causing the current detecting means to detect a current value of the first measuring coil at each of a plurality of candidate timings, and controlling the voltage controlling means. A current value is detected by the current detection means by passing a current through a second measurement coil of the plurality of coils and causing the current detection means to detect a current value of the second measurement coil at each of the plurality of candidate timings. and a control means for performing a setting process for setting a detection timing to cause the detection timing to be detected, and a detection process for causing the current detection means to detect the current values of the plurality of coils according to the set detection timing. Features.

According to the present invention, the period during which voltage application to the coil is stopped can be shortened.

FIG. 1 is a configuration diagram of an image forming apparatus according to an embodiment. FIG. 1 is a control configuration diagram of an image forming apparatus according to an embodiment. FIG. 3 is a control configuration diagram of a motor according to an embodiment. FIG. 2 is an explanatory diagram of the operation of an inverter according to an embodiment. FIG. 2 is an explanatory diagram of detection processing according to an embodiment. FIG. 3 is an explanatory diagram of setting processing according to an embodiment. FIG. 7 is a diagram showing current detection values in setting processing according to an embodiment. FIG. 6 is a diagram showing the results of setting processing according to an embodiment. FIG. 4 is an explanatory diagram of stop position detection processing according to an embodiment. FIG. 4 is an explanatory diagram of a method for setting candidate timings in stop position detection processing according to an embodiment.

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the claimed invention. Although a plurality of features are described in the embodiments, not all of these features are essential to the invention, and the plurality of features may be arbitrarily combined. Furthermore, in the accompanying drawings, the same or similar components are designated by the same reference numerals, and redundant description will be omitted.

<First embodiment>
The present embodiment will be described below using an image forming apparatus as an example of a motor control apparatus. Note that the present invention is not limited to image forming apparatuses, but can be applied to any motor control device that controls a motor. FIG. 1 is a configuration diagram of an image forming apparatus according to this embodiment. The image forming device may be, for example, a printing device, a printer, a copier, a multifunction device, a facsimile, or the like. The image forming unit 1 has four photoreceptors corresponding to yellow, magenta, cyan, and black, and forms a toner image of a corresponding color on each photoreceptor. Therefore, for each of the four colors, the image forming unit 1 includes a charging unit that charges the photoreceptor, an exposure unit that exposes the photoreceptor to form an electrostatic latent image, and a toner that transfers the electrostatic latent image formed on the photoreceptor. Equipped with a developing unit that performs development. The image forming unit 1 transfers the toner images of each photoreceptor onto a sheet conveyed from the cassette 25 along a conveyance path. Note that a full-color toner image can be formed on the sheet by overlapping the toner images on each photoreceptor and transferring them onto the sheet. The sheet onto which the toner image has been transferred is conveyed to the fixing device 24. The fixing device 24 includes a heating roller and a pressure roller, and heats and presses the sheet to fix the toner image on the sheet. After the toner image is fixed, the sheet is discharged to the outside of the image forming apparatus. The motor 15F is a drive source that rotationally drives the roller of the fixing device 24. Note that the image forming apparatus may be one that forms only a black toner image and transfers it onto a sheet.

FIG. 2 shows the control configuration of the image forming apparatus. When the printer control unit 11 receives image data of an image to be formed from the host computer 22 via the communication controller 21, it controls the image forming unit 1 to form a toner image on the sheet, and controls the fixing device 24 to form a toner image on the sheet. fix the toner image on the Further, at this time, the printer control unit 11 controls the motor control unit 14 to control each motor 15 including the motor 15F, and performs sheet conveyance control and the like. Further, the printer control unit 11 displays the status of the image forming apparatus on the display unit 20. Low voltage power supply 12 supplies power to motor 15 . Note that the printer control section 11 includes a microcomputer and a memory. The memory holds various control programs and data, and the microcomputer controls each part of the image forming apparatus based on the various control programs and data stored in the memory.

FIG. 3 shows details of the control configuration of the motor 15F. The motor control unit 14 includes an FPGA 51 with a built-in CPU core. The FPGA 51 communicates with the printer control unit 11 via the communication port 52. Further, the reference clock generation unit 56 of the FPGA 51 is connected to the crystal oscillator 50 and generates a reference clock based on the output of the crystal oscillator 50. The counter 54 performs a counting operation based on the reference clock. The FPGA 51 outputs a pulse width modulation signal (PWM signal) from the PWM port 58. In this embodiment, the FPGA 51 generates high-side PWM signals (U-H, V-H, WH) and low-side PWM signals ( A total of six PWM signals (UL, VL, WL) are output. Therefore, the PWM port 58 has six terminals UH, VH, WH, UL, VL, and WL.

Each terminal of the PWM port 58 is connected to a gate driver 61, and the gate driver 61 performs ON/OFF control of each switching element of the three-phase inverter 60 based on the PWM signal. Note that the inverter 60 has a total of six switching elements, three on the high side and three on the low side, for each phase, and the gate driver 61 controls each switching element based on a corresponding PWM signal. For example, a transistor or a FET can be used as the switching element. In this embodiment, when the PWM signal is at high level, the corresponding switching element is turned on, and when the PWM signal is at low level, the corresponding switching device is turned off. An output 62 of the inverter 60 is connected to coils 73 (U phase), 74 (V phase), and 75 (W phase) of the motor 15F. By controlling each switching element of the inverter 60 on/off, the coil current flowing through each coil 73, 74, 75 can be controlled. In this way, the FPGA 51, the gate driver 61, and the inverter 60 function as a voltage control section that controls the voltages applied to the plurality of coils 73, 74, and 75. The coil current flowing through each coil 73, 74, 75 is converted into a voltage by a shunt resistor 65 provided corresponding to each phase. The amplifying section 64 amplifies the voltage across the shunt resistor 65 of each phase, and outputs a voltage value indicating the coil current of each phase to the AD converter 53 of the FPGA 51. The AD converter 53 converts voltage values indicating the coil currents of each phase into digital values. The current value calculation unit 59 determines the value of the coil current of each phase based on this digital value. In this way, the shunt resistor 65, the amplification section 64, and the FPGA 51 constitute a current detection section that detects the current value of the coil current. Further, the FPGA 51 includes a nonvolatile memory 55 and a memory 57 that store various data used to control the motor 15F.

FIG. 4A shows the state of the inverter 60 for flowing current from the U-phase coil 73 to the V-phase coil 74 and the W-phase coil 75. Note that the high-side switching elements of the U-phase, V-phase, and W-phase are expressed as UH, VH, and WH, respectively. Similarly, the low-side switching elements of the U-phase, V-phase, and W-phase are expressed as UL, VL, and WL, respectively. As shown in FIG. 4(A), in order to flow current from the U-phase coil 73 to the V-phase coil 74 and the W-phase coil 75, switching elements UH, VL, and WL are turned on, and the other Turn off the switching element. The state shown in FIG. 4A is a state in which the voltage output from the low voltage power supply 12 is applied to the U-phase coil 73. In this state, no current flows through the U-phase shunt resistor 65, so the U-phase coil current cannot be measured.

On the other hand, FIG. 4(B) is a state following the state of FIG. 4(A), in which switching elements UL, VL, and WL are turned on, and switching elements UH, VH, and WH are turned off. In the state shown in FIG. 4(B), the application of the voltage output by the low-voltage power supply 12 to the coils 73, 74, and 75 is stopped, and a regenerative current is flowing from the switching element UL to the coils 74 and 75 via the coil 73. state. In this state, the coil currents of all phases can be measured.

Therefore, in this embodiment, the FPGA 51 performs a detection process to detect the current values of the U-phase, V-phase, and W-phase coil currents used in the current control loop in the state shown in FIG. 4(B). FIG. 5 shows the relationship between each PWM signal and the timing at which detection processing is performed. In this embodiment, the PWM signal is repeated every 50 μs. The FPGA 51 internally generates a PWM reference signal every 50 μs, and generates and outputs each PWM signal based on this PWM reference signal. Further, after generating the PWM reference signal, the FPGA 51 generates a start signal at a timing when all of the switching elements UL, VL, and WL are in an on state and a regenerative current is flowing. In FIG. 5, the timing at which the PWM signal on the high side of the U phase changes from high level to low level is when 22.5 μs has elapsed since the generation of the PWM reference signal, and the timing at which the start signal is generated is the timing at which the PWM signal on the high side of the U phase changes from high level to low level. This is when 23.5 μs has elapsed after the generation of .

The current value calculation unit 59 measures the U-phase, V-phase, and W-phase coil currents for a predetermined period from generation of the start signal (detection process). Note that the AD converter 53 includes a multiplexer (analog switch) not shown, and sequentially selects the voltage values corresponding to the coil currents of each phase output by the amplifying section 64 and converts them into digital values. That is, the current value calculation unit 59 does not measure the coil currents of the three phases at the same time, but measures the coil currents in order according to the order of the outputs of the AD converter 53. In the following description, it is assumed that the coil current is measured in the order of U phase, V phase, and W phase. Note that the conversion time to a digital value in the AD converter is 1 μs. Therefore, the time required to convert the three phases, U phase, V phase, and W phase, is 3 μs. Therefore, as shown in FIG. 5, when the start signal is generated, the current value calculation unit 59 measures the coil currents in the order of U phase, V phase, and W phase for 3 μs.

In order to measure the coil current as shown in FIG. 5, the application of voltage to the U-phase coil 73 needs to be stopped for at least 3 μs in one cycle of the PWM signal. In reality, since it is necessary to allow for a timing margin, the time period for which voltage application to the U-phase coil 73 is stopped must be at least 3 μs plus the margin in each cycle of the PWM signal. In this example, this margin is set to 2 μs. Therefore, in this example, the time during which voltage application to the U-phase coil 73 is stopped is at least 5 μs per cycle of the PWM signal. In this example, the period of the PWM signal is 50 μs, so the ratio of the voltage application period per period of the PWM signal is 90% at maximum.

In this manner, the FPGA 51 generates the start signal when a predetermined period of time has elapsed since generating the PWM reference signal. Hereinafter, the timing at which the start signal is generated will be referred to as detection timing. The detection timing is indicated by the elapsed time from generation of the PWM reference signal. If the detection timing is not set appropriately, and therefore the timing for generating the start signal is not appropriate, it will not be possible to properly measure the coil current. For this reason, the motor control unit 14 performs a setting process to set an appropriate detection timing.

First, in this example, coil currents are detected in the order of U phase, V phase, and W phase. Therefore, if the coil current of the U-phase coil 73, which is detected first, and the coil current of the W-phase coil 75, which is detected last, can be properly detected, it can be determined that the coil current of the V-phase can be appropriately detected. . Therefore, in the setting process of this embodiment, the U-phase coil 73 and the W-phase coil 75 are used as measurement coils. Then, the FPGA 51 determines whether the coil current of the measurement coil can be appropriately detected at each of a plurality of candidate timings (detection timing candidates).

Specifically, the FPGA 51 performs a first process of selecting a timing at which the coil current of the U-phase coil 73 can be appropriately detected from a plurality of candidate timings, and a first process of selecting a timing at which the W-phase coil 75 can be appropriately detected from a plurality of candidate timings. A second process of selecting based on timing is performed. Then, based on the first process and the second process, a timing at which both the U-phase coil 73 and the W-phase coil 75 can be appropriately detected is set as the detection timing. Note that since the contents of the first process and the second process are the same, the first process will mainly be described below.

FIG. 6 shows the PWM signal in the first process. In the first process, the V-phase coil 74 or the W-phase coil 75, which is different from the U-phase coil, is used as a reference coil to determine whether the U-phase coil current can be detected appropriately. In this example, the V-phase coil 74 is used as the reference coil. First, the U-phase high-side PWM signal is set to high level from the PWM reference signal to a predetermined timing, and set to low level at the predetermined timing. That is, the application of voltage to the U-phase coil 73 is stopped at a predetermined timing. In this example, this predetermined timing is when 22.5 μs has elapsed since the generation of the PWM reference signal. Then, when a predetermined period of time has elapsed from the predetermined timing, the U-phase high side PWM signal is set to high level. That is, after stopping the application of voltage to the U-phase coil 73 at a predetermined timing, the application of voltage to the U-phase coil 73 is restarted after a predetermined period of time has elapsed. Note that the predetermined period is 5 μs, which is the minimum period during which the application of voltage to the coil is stopped. Note that the level of the U-phase low-side PWM signal is inverted from that of the U-phase high-side PWM signal. Further, the PWM signal on the V-phase high side, which is the reference coil, is always at a low level, and the PWM signal on the V-phase low side is always at a high level. Furthermore, the remaining coils (W phase in this example) are always kept at low level on both the high side and the low side.

Therefore, while the U-phase high-side PWM signal is at a low level, the coil current (regenerative current) flows from the U-phase coil 73, which is the measurement coil, to the V-phase coil 74, which is the reference coil. In the second process, the W-phase coil 75 serves as a measurement coil, and the V-phase coil 74 or U-phase coil 73 serves as a reference coil.

The FPGA 51 has multiple candidate timings. In this example, it is assumed that the FPGA 51 has six candidate timings: 22.5 μs, 23.5 μs, 24.5 μs, 25.5 μs, 26.5 μs, and 27.5 μs. Note that the minimum value of the candidate timing is set to 22.5 μs because the predetermined timing for setting the U-phase high side PWM signal to low level is 22.5 μs. Further, the maximum value of the candidate timing is set to 27.5 μs because the timing for returning the U-phase high side PWM signal to the high level is when 27.5 μs has elapsed after the generation of the PWM reference signal. Then, the FPGA 51 selects one of the six candidate timings, and generates a start signal when the period of the selected candidate timing from the PWM reference signal has elapsed. After generating the start signal, the FPGA 51 detects the coil current values of the measurement coil (U phase) and the reference coil (V phase) using the current value calculation unit 59. In this example, as shown in FIG. 6, the generation of the PWM signal is repeated for three cycles, and in the third cycle, the U-phase coil current and the V-phase coil current are respectively detected.

FIGS. 7(A) and 7(B) each show the current detection results in each period. Note that FIG. 7(A) shows an example where the U-phase coil current is properly detected, and FIG. 7(B) shows an example where the U-phase coil current is not properly detected. It shows. In this example, since the coil current is flowing from the U-phase coil 73 to the V-phase coil 74, the detected values of the U-phase coil current and the V-phase coil current have the same absolute value, and The sign will be reversed. In other words, the sum of the U-phase coil current and the V-phase coil current is zero. Therefore, in this embodiment, if the difference between the absolute value of the U-phase coil current and the absolute value of the V-phase coil current detected in the third cycle is smaller than the threshold value, the U-phase coil current cannot be appropriately measured. It is determined that there is. On the other hand, if the difference between the absolute value of the U-phase coil current and the absolute value of the V-phase coil current detected in the third cycle of measurement is greater than the threshold, it is assumed that the U-phase coil current is not being measured properly. judge.

In the examples of FIGS. 7(A) and 7(B), the threshold value is set to 0.5. In Fig. 7(A), the difference between the absolute values of the U-phase coil current and the V-phase coil current in the third cycle of measurement is 0.07, so the U-phase coil current can be measured appropriately. It will be judged. On the other hand, in Figure 7(B), the difference between the absolute values of the U-phase coil current and the V-phase coil current in the third cycle of measurement is 1.5, so the U-phase coil current cannot be measured properly. It is determined that there is no

Note that the judgment is made based on the current detection result of the third cycle, as shown in Fig. 7, because the coil current increases with each cycle, and therefore the judgment accuracy of whether or not the coil current has been appropriately measured is high. Because it will be. However, a configuration may be adopted in which it is determined whether the coil current can be appropriately measured by measuring the first cycle or the second cycle. In other words, it is a design matter which period of measurement results are used to determine whether or not the coil current has been appropriately measured. Furthermore, a configuration may be adopted in which it is determined that the coil current is being appropriately detected when the difference is smaller than a threshold value in all of a plurality of cycles.

In the first process, the FPGA 51 repeatedly determines whether or not the U-phase coil current can be appropriately measured while changing the candidate timing. After that, in the second process, the FPGA 51 repeatedly determines whether the W-phase coil current can be appropriately measured while changing the candidate timing.

FIG. 8 shows an example of the detection results of the U-phase and W-phase coil currents performed at six candidate timings. Note that OK indicates that the coil current has been appropriately measured, and NG indicates that the coil current has not been appropriately measured. According to FIG. 8, both the U-phase coil current and the W-phase coil current can be appropriately measured when the candidate timings are 23.5 μs and 24.5 μs. In this case, the FPGA 51 sets the average value of 24 μs as the detection timing, for example. Note that if there is no candidate timing at which both the U-phase coil current and the W-phase coil current can be appropriately measured, the FPGA 51 determines that the motor control unit 14 is abnormal.

Note that the detection timing setting process is executed while the motor 15F is not being driven. For example, the setting process can be performed as one of the initialization sequences after the image forming apparatus is powered on. Further, the configuration may be such that the setting process is performed as part of the motor startup sequence when starting the drive of the motor 15F.

As described above, in this embodiment, the minimum value of the period during which no voltage is applied to the coil is 5 μs within one cycle of the PWM signal (50 μs in this example). As described above, this period of 5 μs is the 3 μs required for three-phase conversion in the AD converter 53 plus a margin of 2 μs. In this embodiment, since appropriate detection timing is set by the above setting process, the coil current of each phase can be detected with high accuracy during this 5 μs. On the other hand, in a conventional configuration that does not perform detection timing setting processing, it is necessary to allow for a longer margin, for example, a margin of 4 to 5 μs. In other words, it was necessary to set the minimum value of the period during which no voltage is applied to the coil within one cycle of the PWM signal (50 μs in this example) to 7 to 8 μs. In this case, the ratio of the voltage application period per period of the PWM signal is 84 to 86% at maximum. That is, in this embodiment, the margin can be reduced, and therefore the ratio of the voltage application period per period of the PWM signal can be increased. In other words, the period during which voltage application to the coil is stopped can be shortened.

<Second embodiment>
Next, the second embodiment will be described focusing on the differences from the first embodiment. In the first embodiment, the detection timing setting process was performed independently from other processes. In this embodiment, detection timing setting processing is performed during detection processing (hereinafter referred to as stop position detection processing) of the stop position (stop phase) of the rotor of the motor 15F. More specifically, appropriate detection timing is determined and set based on the detected value of the coil current obtained in the stop position detection process.

First, the stop position detection process will be explained. The sensorless drive of the motor 15F is performed according to the stop position of the rotor. Therefore, when starting the rotation of the motor 15F, the FPGA 51 needs to perform a stop position detection process. The stopping position of the rotor can be determined by utilizing the phenomenon that the inductance of the coils 73 to 75 of each phase changes depending on the stopping position of the rotor. Specifically, coil current is passed through each excitation phase of UV, U-W, V-W, V-U, W-U, and W-V, and the magnitude of each coil current is determined by the magnitude of the coil current at that time. By determining the magnitude of the inductance, the rotor stop position can be detected. Note that XY means that current flows from the X-phase coil to the Y-phase coil.

FIGS. 9A and 9B show changes over time in the duty of the PWM signal when the coil current is passed through the XY phase in the stop position detection process. Note that the command value 1 indicates the on-duty of the PWM signal on the high side of the X phase. Further, the command value 2 indicates the on-duty on the high side of the Y phase. Note that the PWM signal on the low side of the X phase is the inverted level of the PWM signal on the high side of the X phase, and the PWM signal on the Y phase low side is the inverted level of the PWM signal on the high side of the Y phase. Become something. Note that the remaining one-phase PWM signal is fixed at a low level on both the high side and the low side.

The detected current values in FIGS. 9(A) and 9(B) indicate the detected values of the X-phase coil current. The coil current reaches its maximum value while the duty of the high-side PWM signal of the X-phase is decreasing after the duty of the high-side PWM signal of the X-phase reaches its maximum value. For example, in FIGS. 9A and 9B, the duty of the PWM signal on the high side of the X phase is decreased, and when the duty becomes approximately 0, the coil current becomes maximum.

Note that if the detection timing is not set appropriately, the X-phase coil current may not be properly detected near the time when the duty of the X-phase high-side PWM signal is maximum (90%). FIG. 9A shows a case where the X-phase coil current can always be appropriately measured because the detection timing is appropriate. On the other hand, FIG. 9B shows a case where the coil current cannot be appropriately measured near the maximum duty of the PWM signal on the high side of the X phase because the detection timing is not appropriate. However, as mentioned above, in the stop position detection process, it is only necessary to measure the maximum value of the coil current, and the coil current reaches its maximum while the duty of the PWM signal on the high side of the X phase decreases from the maximum value. . In other words, failure to set the detection timing appropriately does not affect the stop position detection process.

In this embodiment, the stop position detection process is performed three times. In one stop position detection process, PWM signals are sent in the order of excitation phases UV, UW, VW, VU, WU, and WV as explained in FIG. Output and cause coil current to flow. Then, as explained in FIG. 9, the maximum value of the coil current is detected for each excitation phase (six excitation phases), and the stop position of the rotor is determined by comparing the maximum values of the six coil currents. Then, the stop position of the rotor is determined by a majority vote based on the determination results of each of the stop position detection processes performed three times. In other words, if the determination results of the rotor stop position in at least two of the three stop position detection processes are the same, it is assumed that the rotor is stopped at the rotor stop position indicated by the determination results. judge. On the other hand, if the determination results of the stop position detection process performed three times are different from each other, the stop position detection process is performed three times again.

In addition, in the stop position detection process, when UV and UW are used as excitation phases, based on the current detection results when the duty of the PWM signal on the high side of the U phase is 90% (low level period is 5 μs). Determine whether the U-phase coil current can be detected correctly. Similarly, when W-U and W-V are excitation phases, the W-phase coil current is calculated based on the current detection result when the duty of the W-phase high side PWM signal is 90% (the low-level period is 5 μs). Determine whether or not it is correctly detected.

Then, the candidate timings are changed as shown in FIG. According to FIG. 10, the candidate timing when UV is the excitation phase in the first stop position detection process is 22.5μ, and the candidate timing when UW is the excitation phase is 23.5μ. In the second stop position detection process, the candidate timing when UV is the excitation phase is set to 24.5μ, and the candidate timing when UW is the excitation phase is set to 25.5μ. Furthermore, in the third stop position detection process, the candidate timing when UV is the excitation phase is set to 26.5μ, and the candidate timing when UW is the excitation phase is set to 27.5μ. Thereby, similarly to the first embodiment, it is possible to determine whether the U-phase coil current is correctly detected for six different candidate timings. The same applies to the W phase. Then, similarly to the first embodiment, the detection timing is set based on candidate timings that can correctly detect both the U-phase and W-phase coil currents.

As described above, in this embodiment, the detection timing is determined based on the coil current measured in the stop position detection process. Therefore, in addition to being able to reduce the margin, downtime of the image forming apparatus can be shortened.

Note that in each of the embodiments described above, the motor 15F is a power source for rotationally driving the roller of the fixing device 24. However, the motor to be controlled is not limited, and the present invention can be applied to control of other motors that serve as power sources for members of the image forming apparatus. Further, although the FPGA 51 performs the detection processing and the setting processing, the printer control unit 11 may perform the detection processing and the setting processing.

[Other embodiments]
The present invention provides a system or device with a program that implements one or more of the functions of the embodiments described above via a network or a storage medium, and one or more processors in the computer of the system or device reads and executes the program. This can also be achieved by processing. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions.

The invention is not limited to the embodiments described above, and various changes and modifications can be made without departing from the spirit and scope of the invention. Therefore, the following claims are hereby appended to disclose the scope of the invention.

61: Gate driver, 60: Inverter, 51: FPGA, 65: Shunt resistor, 64: Amplification section, 53: AD converter, 59: Current value calculation section

Claims (12)

Voltage control means for controlling voltage applied to the plurality of coils of the motor;
current detection means for detecting current values of the plurality of coils;
controlling the voltage control means to cause a current to flow through a first measurement coil of the plurality of coils, causing the current detection means to detect a current value of the first measurement coil at each of a plurality of candidate timings, and controlling the voltage; The current detecting means controls the means to flow a current to a second measuring coil of the plurality of coils, and causes the current detecting means to detect a current value of the second measuring coil at each of the plurality of candidate timings. a control unit that performs a setting process of setting a detection timing for detecting a current value by a control unit; and a detection process of causing the current detection unit to detect current values of the plurality of coils according to the set detection timing;
A motor control device comprising: The current detection means sequentially detects current values of the plurality of coils in the detection process,
The first measurement coil is a coil that first detects a current value in the detection process,
The motor control device according to claim 1, wherein the second measurement coil is a coil that detects the current value last in the detection process. The control means sets the detection timing such that the voltage control means does not apply voltage to the plurality of coils and the detection process is executed while a regenerative current is flowing through the plurality of coils. The motor control device according to claim 1 or 2, characterized in that: In the setting process, the voltage control means applies a voltage to the first measurement coil to cause a current to flow from the first measurement coil to a reference coil different from the first measurement coil among the plurality of coils. , repeating a first process of flowing a regenerative current from the first measuring coil to the reference coil by controlling to stop applying voltage to the first measuring coil at a predetermined timing;
The control means sequentially selects one of the plurality of candidate timings in each of the first processes, and transmits the current value of the first measurement coil and the reference coil to the current detection means at the selected candidate timing. The motor control according to any one of claims 1 to 3, wherein a candidate timing at which the current value of the first measuring coil can be detected is determined from the plurality of candidate timings by detecting a current value. Device. In each of the first processes, the voltage control means performs control to stop applying voltage to the first measuring coil, and then, when a predetermined period of time has elapsed, controls to apply voltage to the first measuring coil. The motor control device according to claim 4, wherein the motor control device performs control. In each of the first processes, the control means compares the current value of the first measurement coil detected by the current detection means with the current value of the reference coil, thereby determining the first measurement coil from the plurality of candidate timings. The motor control device according to claim 4 or 5, wherein candidate timings at which the current value of can be detected are determined. The control means selects a candidate timing for the first measurement coil when a difference between the absolute value of the current value of the first measurement coil detected by the current detection means and the absolute value of the current value of the reference coil is smaller than a threshold value. 7. The motor control device according to claim 6, wherein the current value is determined to be a candidate timing at which the current value can be detected. In the setting process, the voltage control means applies a voltage to the second measurement coil to cause current to flow from the second measurement coil to a reference coil different from the second measurement coil among the plurality of coils. , repeating a second process of causing a regenerative current to flow from the second measurement coil to the reference coil by controlling to stop applying voltage to the second measurement coil at a predetermined timing;
In each of the repeated second processes, the control means sequentially selects one of the plurality of candidate timings, and at the selected candidate timing, the current value of the second measurement coil and the 8. A candidate timing at which the current value of the second measurement coil can be detected is determined from the plurality of candidate timings by detecting a current value of a reference coil. motor control device. 9. The control means determines the detection timing based on a candidate timing at which the current value of the first measurement coil can be detected and a candidate timing at which the current value of the second measurement coil can be detected. The motor control device described. 10. The control means sets an average value of candidate timings at which the current value of the first measurement coil can be detected and the current value of the second measurement coil can be detected as the detection timing. The motor control device described. The control means controls the voltage control means to cause current to flow through the plurality of coils in order, and causes the current detection means to detect the currents of the plurality of coils, thereby detecting a stop position of the rotor of the motor. 2. The setting process is performed based on the current values of the first measurement coil and the second measurement coil detected by the current detection means in the process of detecting the stop position of the rotor. 10. The motor control device according to any one of 10 to 10. an image forming means for forming an image on the sheet;
a motor that generates power for the members of the image forming means;
Voltage control means for controlling voltage applied to the plurality of coils of the motor;
current detection means for detecting current values of the plurality of coils;
a detection process of causing the current detection means to detect current values of the plurality of coils from a set detection timing; and controlling the voltage control means to flow a current to a first measurement coil of the plurality of coils; The current detection means detects the current value of the first measurement coil at each of the candidate timings, and the voltage control means is controlled to cause a current to flow through the second measurement coil of the plurality of coils. a control means that performs a setting process of setting the detection timing by causing the current detection means to detect the current value of the second measurement coil at each timing;
An image forming apparatus comprising:

Images