JP7351241B2 - Compound semiconductor epitaxial wafer and its manufacturing method - Google Patents

Compound semiconductor epitaxial wafer and its manufacturing method Download PDF

Info

Publication number
JP7351241B2
JP7351241B2 JP2020034846A JP2020034846A JP7351241B2 JP 7351241 B2 JP7351241 B2 JP 7351241B2 JP 2020034846 A JP2020034846 A JP 2020034846A JP 2020034846 A JP2020034846 A JP 2020034846A JP 7351241 B2 JP7351241 B2 JP 7351241B2
Authority
JP
Japan
Prior art keywords
layer
type
compound semiconductor
epitaxial wafer
semiconductor epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2020034846A
Other languages
Japanese (ja)
Other versions
JP2021141104A (en
Inventor
健滋 酒井
政彦 桑原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to JP2020034846A priority Critical patent/JP7351241B2/en
Priority to TW110103611A priority patent/TW202135341A/en
Priority to CN202110227150.6A priority patent/CN113345991A/en
Publication of JP2021141104A publication Critical patent/JP2021141104A/en
Application granted granted Critical
Publication of JP7351241B2 publication Critical patent/JP7351241B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/305Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Led Devices (AREA)

Description

本発明は、発光ダイオード用の化合物半導体エピタキシャルウェーハ及びその製造方法に関する。 The present invention relates to a compound semiconductor epitaxial wafer for light emitting diodes and a method for manufacturing the same.

III-V族化合物半導体を材料とする発光ダイオード、例えば燐化砒化ガリウムGaAs1-x(但し、0.45≦x≦1.0)発光ダイオードは、n型の燐化ガリウム(GaP)もしくは砒化ガリウム(GaAs)の単結晶基板上にn型の燐化砒化ガリウムGaAs1-x(あるいは燐化ガリウム)のエピタキシャル層を複数層形成し、さらに、このエピタキシャル層の最上層にZn等のp型不純物を熱拡散することによりp-n接合を形成して発光層部を形成することにより得られる。 A light emitting diode made of a III-V group compound semiconductor, for example, gallium phosphide arsenide GaAs 1-x P x (0.45≦x≦1.0), is an n-type gallium phosphide (GaP) Alternatively, multiple epitaxial layers of n-type gallium arsenide GaAs 1-x P x (or gallium phosphide) are formed on a single crystal substrate of gallium arsenide (GaAs), and Zn is further added to the top layer of this epitaxial layer. It can be obtained by thermally diffusing p-type impurities such as, to form a pn junction and forming a light-emitting layer portion.

あるいは、n型の燐化砒化ガリウムGaAs1-x(あるいは燐化ガリウム)のエピタキシャル層を形成した後、Zn等のp型不純物を導入しながらp型の燐化砒化ガリウムGaAs1-x(あるいは燐化ガリウム)を形成することによりp-n接合を形成することもできる。 Alternatively, after forming an epitaxial layer of n-type gallium arsenide phosphide GaAs 1- x P A pn junction can also be formed by forming P x (or gallium phosphide).

混晶比xの選択により赤色から橙色を経て黄色に及ぶ波長領域を実現でき、通常GaAs1-x(0.45≦x≦1.0)を発光層とする発光ダイオードは、発光効率を上げるため、アイソ・エレクトロニック・トラップとして窒素(N)をドープして光出力を10倍程度向上させている。 By selecting the mixed crystal ratio x, a wavelength range ranging from red through orange to yellow can be realized, and a light emitting diode with a light emitting layer of GaAs 1-x P x (0.45≦x≦1.0) usually has a high luminous efficiency. In order to increase the optical output, nitrogen (N) is doped as an isoelectronic trap to increase the optical output by about 10 times.

発光ダイオードは輝度が高く、また発光ダイオードの輝度が使用中に低下しないこと、すなわち寿命が長いことが必要とされている。従来、発光ダイオードの寿命を長くするために、エピタキシャルウェーハのキャリア濃度を低下させる等の手段が講じられてきた。 Light emitting diodes are required to have high brightness, and the brightness of the light emitting diodes does not decrease during use, that is, they are required to have a long life. Conventionally, in order to extend the life of light emitting diodes, measures have been taken such as lowering the carrier concentration of epitaxial wafers.

例えば、特許文献1に開示されているように、窒素をドープした燐化砒化ガリウムGaAs1-x層のキャリア濃度を1×1015~3×1015(atoms/cm)とすることにより、不純物起因の結晶性の低下を防止し、輝度の寿命を長くすることができる。 For example, as disclosed in Patent Document 1, the carrier concentration of the nitrogen-doped gallium arsenide phosphide GaAs 1-x P x layer is set to 1×10 15 to 3×10 15 (atoms/cm 3 ). Accordingly, it is possible to prevent a decrease in crystallinity due to impurities and extend the life of brightness.

また、特許文献2に開示されているように燐化砒化ガリウムGaAs1-x層の窒素濃度、及びそのプロファイルを最適化することにより窒素のサイト間移動、即ち発光サイトを占有していた窒素が発光素子への通電を継続するにつれて、非発光サイトへと移動していく劣化機構を防止し、輝度の寿命を長くすることができる。 Furthermore, as disclosed in Patent Document 2, by optimizing the nitrogen concentration and its profile of the gallium arsenide phosphide GaAs 1-x P As electricity continues to flow through the light-emitting element, the deterioration mechanism in which nitrogen moves to non-light-emitting sites can be prevented, and the lifetime of brightness can be extended.

しかし、特許文献1で開示されているように、窒素をドープした燐化砒化ガリウムGaAs1-x層のキャリア濃度を1×1015~3×1015(atoms/cm)としても、その寿命特性は十分に良好とは言えない。特に特許文献3に開示されているような窒素のサイト間移動は、低濃度(サイトが空いた状態)ほど発生し易いという問題がある。 However, as disclosed in Patent Document 1, even if the carrier concentration of the nitrogen-doped gallium arsenide phosphide GaAs 1-x P x layer is 1×10 15 to 3×10 15 (atoms/cm 3 ), Its life characteristics cannot be said to be sufficiently good. In particular, there is a problem in that the movement of nitrogen between sites as disclosed in Patent Document 3 is more likely to occur as the concentration is lower (the site is more vacant).

一方で、特許文献2で開示されているような窒素濃度、及びそのプロファイルの最適化のみでは、エピタキシャル成長中に結晶由来で生成された非発光サイトがある場合に、その効果は必ずしも十分とは言えない。 On the other hand, optimizing the nitrogen concentration and its profile alone as disclosed in Patent Document 2 may not necessarily have a sufficient effect when there are non-luminescent sites generated from crystals during epitaxial growth. do not have.

特開平6-196756号公報Japanese Unexamined Patent Publication No. 6-196756 特開2002-329884号公報Japanese Patent Application Publication No. 2002-329884 特許第3791672号公報Patent No. 3791672

上述したように先行技術で示されているような従来の方法で作製されたエピタキシャルウェーハ、及びそのウェーハを用いて作製された発光ダイオードでは、その寿命特性は十分とは言えない問題がある。 As described above, epitaxial wafers manufactured by conventional methods as shown in the prior art and light emitting diodes manufactured using the wafers have a problem in that their lifetime characteristics are not sufficient.

本発明は、上記問題点に鑑みてなされたものであって、寿命特性が良好な化合物半導体エピタキシャルウェーハ及び、その製造方法を提供することを目的とする。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a compound semiconductor epitaxial wafer with good lifetime characteristics and a method for manufacturing the same.

本発明は、上記目的を達成するためになされたものであり、p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面が形成され、該p-n接合界面を含む部分に窒素濃度が一定となる領域が形成された化合物半導体エピタキシャルウェーハであって、
前記窒素濃度が一定となる領域において、n型ドーパントとしてTeが2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減しながらドーピングされているものである化合物半導体エピタキシャルウェーハを提供する。
The present invention was made to achieve the above object, and consists of a p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45 ≦x≦1.0) layer, a pn junction interface forming a light emitting part is formed, and a region including the pn junction interface is formed with a constant nitrogen concentration. hand,
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. The present invention provides a compound semiconductor epitaxial wafer in which doping is gradually decreased in the direction of the p-type GaAs 1-x P x layer.

このような化合物半導体エピタキシャルウェーハから製造される発光素子であれば寿命特性の良好な発光素子とすることができる。 A light emitting device manufactured from such a compound semiconductor epitaxial wafer can have good lifetime characteristics.

また、基板上にハイドライド気相成長法により、p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面を形成する化合物半導体エピタキシャルウェーハの製造方法であって、
前記p-n接合界面を含む部分に窒素をドープし、窒素濃度が一定となる領域を形成し、
該窒素濃度が一定となる領域において、n型ドーパントとしてTeを2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減させながらドーピングする化合物半導体エピタキシャルウェーハの製造方法を提供する。
Further, a p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45≦x≦1.0) layer were formed on the substrate by hydride vapor phase epitaxy. 0) A method for manufacturing a compound semiconductor epitaxial wafer in which a pn junction interface forming a light emitting part is formed by a layer,
doping nitrogen into a portion including the pn junction interface to form a region where the nitrogen concentration is constant;
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. A method for manufacturing a compound semiconductor epitaxial wafer is provided, in which doping is gradually reduced in the direction of the p-type GaAs 1-x P x layer.

このような化合物半導体エピタキシャルウェーハの製造方法であれば、寿命特性の良好な発光素子が得られる化合物半導体エピタキシャルウェーハを低コストで簡単に製造することができる。 With such a method for manufacturing a compound semiconductor epitaxial wafer, it is possible to easily manufacture a compound semiconductor epitaxial wafer that provides a light emitting element with good lifetime characteristics at low cost.

以上のように、本発明の化合物半導体エピタキシャルウェーハから製造される発光素子であれば寿命特性の良好な発光素子とすることができる。また、本発明の化合物半導体エピタキシャルウェーハの製造方法であれば、寿命特性の良好な発光素子が得られる化合物半導体エピタキシャルウェーハを低コストで簡単に製造することができる。 As described above, a light emitting element manufactured from the compound semiconductor epitaxial wafer of the present invention can be a light emitting element with good lifetime characteristics. Further, with the method for manufacturing a compound semiconductor epitaxial wafer of the present invention, a compound semiconductor epitaxial wafer that provides a light emitting element with good lifetime characteristics can be easily manufactured at low cost.

本発明の化合物半導体エピタキシャルウェーハの製造方法によって作製される、化合物半導体エピタキシャルウェーハの断面概略図の一例を示す。1 shows an example of a schematic cross-sectional view of a compound semiconductor epitaxial wafer manufactured by the method for manufacturing a compound semiconductor epitaxial wafer of the present invention. 本発明の化合物半導体エピタキシャルウェーハの製造方法の一例のフローチャートである。1 is a flowchart of an example of a method for manufacturing a compound semiconductor epitaxial wafer of the present invention. 本発明の化合物半導体エピタキシャルウェーハの製造方法に用いることができる製造装置の一例の断面図を示す。1 is a cross-sectional view of an example of a manufacturing apparatus that can be used in the method for manufacturing a compound semiconductor epitaxial wafer of the present invention. 実施例1におけるSIMSプロファイルを示す図である。3 is a diagram showing a SIMS profile in Example 1. FIG. 比較例2におけるSIMSプロファイルを示す図である。3 is a diagram showing a SIMS profile in Comparative Example 2. FIG.

上述したように、寿命特性の良好なGaAsP発光素子の開発が望まれていた。 As mentioned above, it has been desired to develop a GaAsP light emitting device with good lifetime characteristics.

本発明者らは寿命特性の良好なGaAsP発光素子について検討を重ねたところ、窒素濃度が一定となる領域において、n型ドーパントとしてTeが2.0×1016~0.2×1016(atoms/cm)の範囲でn型層からp型層の方向へ漸減させながらドーピングされた化合物半導体エピタキシャルウェーハであれば寿命特性の良好な発光素子が得られることが判り、本発明を完成させた。 The present inventors repeatedly investigated GaAsP light emitting devices with good lifetime characteristics, and found that in a region where the nitrogen concentration is constant, Te as an n-type dopant is 2.0×10 16 to 0.2×10 16 (atoms It was found that a light-emitting element with good lifetime characteristics could be obtained by using a compound semiconductor epitaxial wafer doped with doping in the range of 0.25%/cm 3 ) while gradually decreasing from the n-type layer to the p-type layer, and the present invention was completed based on this finding. .

即ち、本発明の化合物半導体エピタキシャルウェーハは、
p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面が形成され、該p-n接合界面を含む部分に窒素濃度が一定となる領域が形成された化合物半導体エピタキシャルウェーハであって、
前記窒素濃度が一定となる領域において、n型ドーパントとしてTeが2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減しながらドーピングされているものである化合物半導体エピタキシャルウェーハである。
That is, the compound semiconductor epitaxial wafer of the present invention is
A p-n light-emitting section is formed by a p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45≦x≦1.0) layer. A compound semiconductor epitaxial wafer in which a bonding interface is formed and a region where the nitrogen concentration is constant is formed in a portion including the pn junction interface, the compound semiconductor epitaxial wafer comprising:
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. This is a compound semiconductor epitaxial wafer in which doping is gradually decreased in the direction of the p-type GaAs 1-x P x layer.

また、本発明の化合物半導体エピタキシャルウェーハの製造方法は、
基板上にハイドライド気相成長法により、p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面を形成する化合物半導体エピタキシャルウェーハの製造方法であって、
前記p-n接合界面を含む部分に窒素をドープし、窒素濃度が一定となる領域を形成し、
該窒素濃度が一定となる領域において、n型ドーパントとしてTeを2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減させながらドーピングする化合物半導体エピタキシャルウェーハの製造方法である。
Further, the method for manufacturing a compound semiconductor epitaxial wafer of the present invention includes:
A p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45≦x≦1.0) layer are formed on the substrate by hydride vapor phase epitaxy. A method for manufacturing a compound semiconductor epitaxial wafer in which a layer forms a pn junction interface forming a light emitting part, the method comprising:
doping nitrogen into a portion including the pn junction interface to form a region where the nitrogen concentration is constant;
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. This is a method for manufacturing a compound semiconductor epitaxial wafer in which doping is gradually reduced in the direction of the p-type GaAs 1-x P x layer.

以下、本発明について図面を参照して詳細に説明するが、本発明はこれらに限定されるものではない。 Hereinafter, the present invention will be explained in detail with reference to the drawings, but the present invention is not limited thereto.

図1は本発明の化合物半導体エピタキシャルウェーハの一例の断面概略図である。化合物半導体エピタキシャルウェーハ1には、基板として、例えばn型単結晶基板であるGaP基板やGaAs基板を用いることができる。図1に示した例では、n型GaP基板2上に第1層n型GaPバッファー層3、バッファー層3の上に第2層n型GaAs1-y層4(組成変化層4)、組成変化層4上に第3層n型GaAs1-x層5(n型組成一定層5)、n型組成一定層5上に第4層p型GaAs1-x層6(p型組成一定層6)が形成されている。このとき、第3層n型GaAs1-x層5(n型組成一定層5)と第4層p型GaAs1-x層6(p型組成一定層6)とにより発光部をなすp-n接合界面7が形成されている。また、p-n接合界面7を含む部分に窒素濃度が略一定となる領域を有する窒素ドープ層8が形成されている。 FIG. 1 is a schematic cross-sectional view of an example of a compound semiconductor epitaxial wafer of the present invention. For the compound semiconductor epitaxial wafer 1, a GaP substrate or a GaAs substrate, which is an n-type single crystal substrate, can be used as a substrate, for example. In the example shown in FIG. 1, a first n-type GaP buffer layer 3 is formed on an n-type GaP substrate 2, and a second n-type GaAs 1-y P y layer 4 (composition change layer 4) is formed on the buffer layer 3. , a third n-type GaAs 1-x P x layer 5 (n-type constant composition layer 5) on the composition change layer 4, and a fourth p-type GaAs 1-x P x layer 6 on the n-type constant composition layer 5. (p-type constant composition layer 6) is formed. At this time, a light emitting section is formed by the third layer n-type GaAs 1-x P x layer 5 (n-type constant composition layer 5) and the fourth layer p-type GaAs 1-x P x layer 6 (p-type constant composition layer 6). A pn junction interface 7 is formed. Further, a nitrogen-doped layer 8 is formed in a portion including the pn junction interface 7, having a region where the nitrogen concentration is approximately constant.

基板上のバッファー層は、特に限定されず、同一でも異なっていてもよい。例えば、基板と同一の組成とすることができる。即ち、n型GaP基板2の場合、バッファー層3はn型GaPとすることができる。 The buffer layers on the substrate are not particularly limited and may be the same or different. For example, it can have the same composition as the substrate. That is, in the case of the n-type GaP substrate 2, the buffer layer 3 can be made of n-type GaP.

バッファー層3上に形成されている組成変化層4は、n型GaP基板2からの距離に応じて組成が変化する層である。具体的には、組成変化層4は、例えばn型のGaAs1-y(0.45≦y≦1.0)の層であり、n型GaP基板2から遠ざかるにつれて混晶率yが1から低下するように構成することができる。その混晶率yは0.45≦y≦1.0の間で変化させるのが好ましい。基板と組成一定層の格子定数の差が大きいため、この組成変化層4を形成することでより結晶欠陥の少ない組成一定層を得ることができる。 The composition change layer 4 formed on the buffer layer 3 is a layer whose composition changes depending on the distance from the n-type GaP substrate 2. Specifically, the composition change layer 4 is, for example, a layer of n-type GaAs 1-y P y (0.45≦y≦1.0), and the mixed crystal ratio y increases as the distance from the n-type GaP substrate 2 increases. It can be configured to decrease from 1. The mixed crystal ratio y is preferably varied within a range of 0.45≦y≦1.0. Since the difference in lattice constant between the substrate and the constant composition layer is large, by forming this composition change layer 4, it is possible to obtain a constant composition layer with fewer crystal defects.

組成変化層4の上には、n型GaAs1-x層5(n型組成一定層5)が形成されている。n型組成一定層5は、その組成(混晶率x)が一定の層とされる。組成一定層5がGaAs1-xである場合、LEDの発光波長に対応する値の混晶率xが選択される。 On the composition change layer 4, an n-type GaAs 1-x P x layer 5 (n-type constant composition layer 5) is formed. The n-type constant composition layer 5 is a layer whose composition (mixed crystal ratio x) is constant. When the constant composition layer 5 is made of GaAs 1-x P x , the mixed crystal ratio x is selected to have a value corresponding to the emission wavelength of the LED.

このn型GaAs1-x層5(n型組成一定層5)には、ドーパントとしてTeが用いられている。 Te is used as a dopant in this n-type GaAs 1-x P x layer 5 (n-type constant composition layer 5).

n型組成一定層5の上には、p型GaAs1-x層6(p型組成一定層6)が形成されている。p型のドーパントとして、例えばZnを用いることができる。 A p-type GaAs 1-x P x layer 6 (p-type constant composition layer 6) is formed on the n-type constant composition layer 5. For example, Zn can be used as the p-type dopant.

そして、p型GaAs1-x層6(p型組成一定層6)とn型GaAs1-x層5(n型組成一定層5)の界面、即ち発光部をなすp-n接合界面7を含むように、アイソ・エレクトロニック・トラップとして窒素濃度が略一定となる領域を有する窒素ドープ層8がある。間接遷移型のバンドギャップを持つGaAsPに窒素をドープすることで、発光素子の光出力を向上させることができる。 Then, the interface between the p-type GaAs 1-x P x layer 6 (p-type constant composition layer 6) and the n-type GaAs 1-x P x layer 5 (n-type constant composition layer 5), that is, the p-n layer forming the light emitting part. There is a nitrogen-doped layer 8 including the bonding interface 7 and having a region where the nitrogen concentration is substantially constant as an iso-electronic trap. By doping GaAsP, which has an indirect transition type bandgap, with nitrogen, it is possible to improve the optical output of a light emitting element.

また、窒素ドープ層8において、n型ドーパントとしてTeが2.0×1016~0.2×1016(atoms/cm)の範囲で、n型GaAs1-x層5からp型GaAs1-x層6の方向へ漸減しながらドーピングされている。 Further, in the nitrogen-doped layer 8, Te as the n-type dopant is in the range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ), and the n-type GaAs 1-x P x layer 5 to the p-type The doping is gradually reduced in the direction of the GaAs 1-x P x layer 6.

一般にGaAsP系発光素子において、発光中心として振る舞うことのできる窒素は、半導体結晶中において特定のサイト(格子点)を占めているものであり、発光に寄与できないサイト(非発光サイト)が存在する。輝度の劣化機構として、窒素のサイト間移動が考えられ、寿命特性を良くするためには非発光サイトを減らすことが重要となる。 In general, in GaAsP-based light emitting devices, nitrogen, which can act as a luminescent center, occupies specific sites (lattice points) in the semiconductor crystal, and there are sites that cannot contribute to luminescence (non-luminous sites). The mechanism of luminance deterioration is thought to be the movement of nitrogen between sites, and it is important to reduce the number of non-luminous sites in order to improve lifetime characteristics.

GaAsPエピタキシャルウェーハにおいて、n型ドーパントであるTe(テルル)やS(硫黄)と同時にN(窒素)をドーピングした場合の窒素濃度は、n型ドーパントと窒素を同時にドーピングしなかった場合に比べて低くなる。即ち、n型ドーパントと窒素は同じサイトを占めていると考えられる。 When a GaAsP epitaxial wafer is doped with N (nitrogen) at the same time as n-type dopants such as Te (tellurium) and S (sulfur), the nitrogen concentration is lower than when the n-type dopant and nitrogen are not doped at the same time. Become. That is, it is considered that the n-type dopant and nitrogen occupy the same site.

本発明は、非発光サイトをn型ドーパントで占めることにより、窒素のサイト間移動を減らし寿命特性の改善を図った。 The present invention aims to reduce the movement of nitrogen between sites and improve the lifetime characteristics by occupying non-luminous sites with n-type dopants.

一方で、n型ドーパントで非発光サイトを占めるためにドーピングを行う場合、そのドーパント(不純物)濃度が高すぎると結晶性が低下し、寿命特性が低下する。 On the other hand, when doping is performed to occupy non-emissive sites with an n-type dopant, if the dopant (impurity) concentration is too high, the crystallinity decreases and the lifetime characteristics deteriorate.

そこで、本発明の化合物半導体エピタキシャルウェーハは、n型ドーパントを傾斜状にドーピングすること、即ちp-n接合界面近傍のn型ドーパントは低濃度にし、p型層(接合界面)からn型層方向にn型ドーパント濃度を漸増することで、p-n接合界面近傍の窒素のサイト間移動の抑制とn型ドーパント(不純物)濃度による結晶性の低下を同時に防ぐことができ、寿命特性の改善を実現した。また、n型ドーパントは、Teを用いることで上記効果が得られる。 Therefore, in the compound semiconductor epitaxial wafer of the present invention, the n-type dopant is doped in a gradient manner, that is, the n-type dopant near the p-n junction interface is kept at a low concentration, and the n-type dopant is doped in the direction from the p-type layer (junction interface) to the n-type layer. By gradually increasing the n-type dopant concentration, it is possible to simultaneously suppress the movement of nitrogen between sites near the p-n junction interface and prevent the decrease in crystallinity due to the n-type dopant (impurity) concentration, improving the lifetime characteristics. It was realized. Further, the above effect can be obtained by using Te as the n-type dopant.

次に、本発明の化合物半導体エピタキシャルウェーハの製造方法について、図1~3を参照して説明する。 Next, a method for manufacturing a compound semiconductor epitaxial wafer of the present invention will be explained with reference to FIGS. 1 to 3.

本発明の化合物半導体エピタキシャルウェーハの製造方法は、ハイドライド気相成長(HVPE)法を用いて、化合物半導体エピタキシャルウェーハを製造する。以下では単結晶基板としてn型GaP基板を用いた場合を例に用いて説明するが、これに限定されるものではない。図2に、本発明の化合物半導体エピタキシャルウェーハの製造方法の一例のフローチャートを示す。また、図3に、本発明の化合物半導体エピタキシャルウェーハの製造方法に用いることができる気相成長装置の一例の断面図を示す。図3に示す気相成長装置は、石英ボート20、エピタキシャル・リアクター21、ホルダー22、ガス導入管23、ヒーター24、ガリウム(Ga)溜25を有している。 The method for manufacturing a compound semiconductor epitaxial wafer of the present invention uses a hydride vapor phase epitaxy (HVPE) method to manufacture a compound semiconductor epitaxial wafer. The following description will be made using an example in which an n-type GaP substrate is used as the single crystal substrate, but the present invention is not limited to this. FIG. 2 shows a flowchart of an example of the method for manufacturing a compound semiconductor epitaxial wafer of the present invention. Further, FIG. 3 shows a cross-sectional view of an example of a vapor phase growth apparatus that can be used in the method of manufacturing a compound semiconductor epitaxial wafer of the present invention. The vapor phase growth apparatus shown in FIG. 3 includes a quartz boat 20, an epitaxial reactor 21, a holder 22, a gas introduction pipe 23, a heater 24, and a gallium (Ga) reservoir 25.

[準備工程]
まず、単結晶基板W及び高純度ガリウム(Ga)を、Ga溜め用の石英ボート20を有するエピタキシャル・リアクター21内の所定の場所(単結晶基板Wはホルダー22上)に、それぞれ設置する。単結晶基板は、n型GaP基板の他、例えばn型GaAs基板などを用いることができる。
[Preparation process]
First, a single-crystal substrate W and high-purity gallium (Ga) are placed at predetermined locations (the single-crystal substrate W is on the holder 22) in an epitaxial reactor 21 having a quartz boat 20 for storing Ga. As the single crystal substrate, in addition to an n-type GaP substrate, for example, an n-type GaAs substrate can be used.

[第1層n型GaPバッファー層 形成工程]
次に、n型GaP基板上にバッファー層を形成する。ガス導入管23から窒素(N)ガスをリアクター21内に導入し、空気を十分置換除去した後、キャリヤガスとして高純度水素(H)を導入し、Nの流れを止め、ヒーター24で加熱して昇温工程に入る。そして、上記Ga入り石英ボート20設置部分及び単結晶基板Wの設置部分の温度が、所定の温度に一定に保持されていることを確認した後に、単結晶基板Wと同組成のバッファー層(図1のバッファー層3)の気相成長を開始する。
[First layer n-type GaP buffer layer formation process]
Next, a buffer layer is formed on the n-type GaP substrate. Nitrogen (N 2 ) gas is introduced into the reactor 21 from the gas introduction pipe 23 to sufficiently replace and remove air, then high-purity hydrogen (H 2 ) is introduced as a carrier gas, the flow of N 2 is stopped, and the heater 24 to begin the temperature raising process. After confirming that the temperature of the portion where the Ga-containing quartz boat 20 is installed and the portion where the single crystal substrate W is installed is kept constant at a predetermined temperature, a buffer layer having the same composition as the single crystal substrate W (Fig. Vapor phase growth of the buffer layer 3) of No. 1 is started.

n型ドーパントドープ用ガスをリアクター内に導入し、周期律表第III族元素成分原料としてのGaClを生成させるために、高純度塩化水素ガス(HCl)を上記石英ボート中のGa溜25に吹き込み、Ga溜上表面より吹き出させる。他方、n型ドーパントドープ用ガスとしてジエチルテルル(DETe)、及び周期律表第V族元素成分として高純度燐化水素ガス(PH)を導入しつつ、バッファー層を単結晶基板上に形成する。 A gas for doping the n-type dopant was introduced into the reactor, and high purity hydrogen chloride gas (HCl) was blown into the Ga reservoir 25 in the quartz boat in order to generate GaCl as a raw material for Group III elements of the periodic table. , the gas is blown out from the upper surface of the Ga reservoir. On the other hand, a buffer layer is formed on the single crystal substrate while introducing diethyl tellurium (DETe) as an n-type dopant doping gas and high purity hydrogen phosphate gas (PH 3 ) as a Group V element component of the periodic table. .

[第2層n型GaAs1-y層(組成変化層) 形成工程]
バッファー層形成後、バッファー層上に第2層n型GaAs1-y層(組成変化層)を形成する。HClとDETeの導入量を変えることなく、高純度砒化水素ガス(AsH)の導入量を徐々に増加させ、また同時にPHの導入量を減少させて、第2層n型GaAs1-y層(組成変化層)をバッファー層上に形成する。
[Second n-type GaAs 1-y P y layer (composition change layer) formation process]
After forming the buffer layer, a second n-type GaAs 1-y P y layer (composition change layer) is formed on the buffer layer. By gradually increasing the amount of high-purity hydrogen arsenide gas (AsH 3 ) introduced without changing the amount of HCl and DETe introduced, and at the same time decreasing the amount of PH 3 introduced, the second layer n-type GaAs 1-y was formed. A P y layer (composition change layer) is formed on the buffer layer.

[第3層n型GaAs1-x層(n型組成一定層) 形成工程]
組成変化層形成後、組成変化層上に第3層n型GaAs1-x層(n型組成一定層)を形成する。HCl、PH、AsHの導入量を変えることなく、n型ドーパントガスであるDETeの導入量を徐々に減少させながら、アイソ・エレクトロニック・トラップ添加用としてN(窒素)を含有するガスを導入する。ガスとしては、例えば高純度アンモニアガス(NH)を用いることができるが、これに限定されるものではない。
[Third layer n-type GaAs 1-x P x layer (n-type constant composition layer) formation process]
After forming the compositionally variable layer, a third n-type GaAs 1-x P x layer (n-type constant composition layer) is formed on the compositionally variable layer. Introducing a gas containing N (nitrogen) for isoelectronic trap addition while gradually decreasing the amount of DETe, which is an n-type dopant gas, without changing the amounts of HCl, PH 3 , and AsH 3 introduced. do. As the gas, for example, high purity ammonia gas (NH 3 ) can be used, but it is not limited thereto.

次に、HCl、PH、AsH、NHの導入量を変えることなく、n型ドーパントガスであるDETeの導入量を更に徐々に減少させ、第3層n型GaAs1-x層(n型組成一定層)を第2層n型GaAs1-y層(組成変化層)上に形成する。 Next, without changing the introduced amounts of HCl, PH 3 , AsH 3 , and NH 3 , the introduced amount of DETe, which is an n-type dopant gas, was further gradually decreased to form the third n-type GaAs 1-x P x layer. (n-type constant composition layer) is formed on the second layer n-type GaAs 1-y P y layer (composition variable layer).

[第4層p型GaAs1-x層(p型組成一定層) 形成工程]
n型組成一定層形成後、n型組成一定層上に第4層p型GaAs1-x層(p型組成一定層)を形成する。HCl、PH、AsH、NHの導入量を変えることなく、及びDETeの導入量を漸減させながら、p型ドーパントガスであるジメチル亜鉛(DMZn)を徐々に所定流量までランピングで増加させながら、p型GaAs1-x層を形成する。
[Fourth p-type GaAs 1-x P x layer (p-type constant composition layer) formation process]
After forming the n-type constant composition layer, a fourth p-type GaAs 1-x P x layer (p-type constant composition layer) is formed on the n-type constant composition layer. While gradually increasing dimethyl zinc (DMZn), a p-type dopant gas, to a predetermined flow rate by ramping, without changing the introduced amounts of HCl, PH 3 , AsH 3 , and NH 3 and gradually decreasing the introduced amount of DETe. , a p-type GaAs 1-x P x layer is formed.

次に、HCl、PH、AsH、DETe、DMZnの導入量を変えることなく、NHの導入量を徐々に減少させNHの導入を止める。次にHCl、PH、AsH、DETeの導入量を変えることなくDMZnの流量を更に徐々にランピングで増加させてDMZnの流量を固定し、第4層p型GaAs1-x層(p型組成一定層)を第3層n型GaAs1-x層(n型組成一定層)上に形成し、気相成長を終了する。 Next, the introduction amount of NH 3 is gradually decreased and the introduction of NH 3 is stopped without changing the introduction amounts of HCl, PH 3 , AsH 3 , DETe, and DMZn. Next, without changing the amounts of HCl, PH 3 , AsH 3 , and DETe introduced, the flow rate of DMZn was further gradually increased by ramping to fix the flow rate of DMZn, and the fourth p-type GaAs 1-x P x layer ( A p-type constant composition layer) is formed on the third n-type GaAs 1-x P x layer (n-type constant composition layer), and the vapor phase growth is completed.

本発明の化合物半導体エピタキシャルウェーハの製造方法では、例えば、DETeの導入量を8sccmから1sccmまで、マスフローコントローラー(MFC)で流量制御を行いながら、ランピングで徐々に減少させ成長させることができる。また、例えば、リアクター及び配管内の残留ガスを用いてn型ドーパント(Te)濃度を徐々に減少させることもできる。即ち、供給バルブを閉めることでDETeの供給は停止するが、連続的に成長を行うことで、導入配管(DETe出口~リアクター入口間配管)内の残留ガスがリアクターを通して徐々に排気され、結果としてMFCでの流量制御を行った時と同様なドーピングを行うことができる。
In the method for manufacturing a compound semiconductor epitaxial wafer of the present invention, growth can be performed by gradually reducing the amount of DETe introduced from 8 sccm to 1 sccm by ramping while controlling the flow rate with a mass flow controller (MFC). It is also possible, for example, to gradually reduce the n-type dopant (Te) concentration using residual gas in the reactor and piping. That is, the supply of DETe is stopped by closing the supply valve, but due to continuous growth, the residual gas in the introduction pipe (the pipe between the DETe outlet and the reactor inlet) is gradually exhausted through the reactor, and as a result, Doping can be performed in the same manner as when flow rate control is performed using MFC.

以上のようにして、本発明の化合物半導体エピタキシャルウェーハの製造方法は、図1において断面図として示したような、化合物半導体エピタキシャルウェーハを製造することができる。 As described above, the method for manufacturing a compound semiconductor epitaxial wafer of the present invention can manufacture a compound semiconductor epitaxial wafer as shown in the cross-sectional view in FIG.

以下、実施例を挙げて本発明について詳細に説明するが、これは本発明を限定するものではない。 EXAMPLES The present invention will be described in detail below with reference to Examples, but the present invention is not limited thereto.

(実施例1)
HVPE法によって以下の通りエピタキシャルウェーハを作製した。
(Example 1)
An epitaxial wafer was produced by the HVPE method as follows.

[準備工程]
n型GaP単結晶基板及び高純度ガリウム(Ga)をGa溜め用石英ボート付きのエピタキシャル・リアクター内の所定の場所にそれぞれ設置した。GaP基板はテルル(Te)が3~10×1017(atoms/cm)添加され、直径50mmの円形で(100)面から[011]方向に10(°)偏位した面をもつものである。これらを同時にホルダー上に配置し、ホルダーは毎分8回転させた。
[Preparation process]
An n-type GaP single crystal substrate and high-purity gallium (Ga) were placed at predetermined locations in an epitaxial reactor equipped with a quartz boat for storing Ga. The GaP substrate is doped with tellurium (Te) at a concentration of 3 to 10×10 17 (atoms/cm 3 ), is circular with a diameter of 50 mm, and has a plane that is deviated from the (100) plane by 10 (°) in the [011] direction. be. These were placed on a holder at the same time, and the holder was rotated 8 times per minute.

次に窒素(N)ガスをリアクター内に20分間導入し、空気を十分置換除去した後、キャリアガスとして高純度水素(H)を毎分6500sccm導入し、窒素ガスの流れを止め昇温工程に入った。Ga入り石英ボート設置部分及びGaP単結晶基板設置部分の温度がそれぞれ一定温度に保持されていることを確認した後、GaAs1-xエピタキシャル膜の気相成長を開始した。 Next, nitrogen (N 2 ) gas was introduced into the reactor for 20 minutes to sufficiently replace and remove air, and then high-purity hydrogen (H 2 ) was introduced as a carrier gas at 6500 sccm per minute to stop the flow of nitrogen gas and raise the temperature. The process has started. After confirming that the temperatures of the Ga-containing quartz boat installation area and the GaP single crystal substrate installation area were maintained at constant temperatures, vapor phase growth of the GaAs 1-x P x epitaxial film was started.

[第1層n型GaPバッファー層 形成工程]
水素ガスで希釈したn型ドーパントガスとしてDETe(ジエチルテルル)を導入し、周期律表第III族元素成分原料としてGaClを生成させるため、高純度塩化水素ガス(HCl)を上記石英ボート中のGa溜めに吹き込み、Ga溜上表面より吹き出させた。他方、周期律表第V族元素成分として、高純度燐化水素ガス(PH)を導入しつつ、第1層であるn型GaPバッファー層をn型GaP基板上に成長させた。
[First layer n-type GaP buffer layer formation process]
DETe (diethyl tellurium) is introduced as an n-type dopant gas diluted with hydrogen gas, and high purity hydrogen chloride gas (HCl) is added to the Ga in the quartz boat in order to generate GaCl as a raw material for Group III elements of the periodic table. The gas was blown into the reservoir and blown out from the upper surface of the Ga reservoir. On the other hand, an n-type GaP buffer layer as a first layer was grown on an n-type GaP substrate while introducing high-purity hydrogen phosphide gas (PH 3 ) as a Group V element component of the periodic table.

[第2層n型GaAs1-y層(組成変化層) 形成工程]
バッファー層形成後、HClの導入量を変えることなく、高純度砒化水素ガス(AsH)の導入を開始し、導入量を除々に増加させた。また同時にPHの導入量を減少させて、第2層n型GaAs1-y層(組成変化層)を第1層n型GaPバッファー層上に形成した。
[Second n-type GaAs 1-y P y layer (composition change layer) formation process]
After the buffer layer was formed, introduction of high purity hydrogen arsenide gas (AsH 3 ) was started without changing the amount of HCl introduced, and the amount introduced was gradually increased. At the same time, the amount of PH 3 introduced was reduced, and a second n-type GaAs 1-y P y layer (composition-change layer) was formed on the first n-type GaP buffer layer.

[第3層n型GaAs1-x層(n型組成一定層) 形成工程]
組成変化層形成後、HCl、PH、AsHの導入量を変えることなく、n型ドーパントガスであるDETeの導入量を徐々に減少させながら、アイソ・エレクトロニック・トラップ添加用として高純度アンモニアガス(NH)を導入した。HCl、PH、AsH、NHの導入量を変えることなく、n型ドーパントガスであるDETeの導入量を更に徐々に減少させ、第3層n型GaAs1-x層(n型組成一定層)を組成変化層上に形成した。
[Third layer n-type GaAs 1-x P x layer (n-type constant composition layer) formation process]
After forming the composition-change layer, high-purity ammonia gas was added for isoelectronic trap addition while gradually decreasing the amount of DETe, which is an n-type dopant gas, without changing the amounts of HCl, PH 3 , and AsH 3 introduced. (NH 3 ) was introduced. Without changing the introduced amounts of HCl, PH 3 , AsH 3 , and NH 3 , the introduced amount of DETe, which is an n-type dopant gas, was further gradually reduced to form the third n-type GaAs 1-x P x layer (n-type A constant composition layer) was formed on the composition change layer.

[第4層p型GaAs1-x層(p型組成一定層) 形成工程]
n型組成一定層形成後、HCl、PH、AsH、NHの導入量を変えることなく、及びDETeの導入量を漸減させながら、p型ドーパントガスであるDMZnを徐々に所定流量までランピングで増加させながら、p型GaAs1-x層を形成した。次にHCl、PH、AsH、DETe、DMZnの導入量を変えることなく、NHの導入量を徐々に減少させ、NHの導入を止めた。次に、HCl、PH、AsH、DETeの導入量を変えることなくDMZn流量を更に徐々にランピングで増加させてDMZnの流量を固定し、第4層p型GaAs1-x層(p型組成一定層)をn型組成一定層上に形成した後、気相成長を終了し、化合物半導体エピタキシャルウェーハを製造した。
[Fourth p-type GaAs 1-x P x layer (p-type constant composition layer) formation process]
After forming a layer with a constant n-type composition, DMZn, which is a p-type dopant gas, is gradually ramped to a predetermined flow rate without changing the introduced amounts of HCl, PH 3 , AsH 3 , and NH 3 and while gradually decreasing the introduced amount of DETe. A p-type GaAs 1-x P x layer was formed while increasing the temperature. Next, without changing the introduced amounts of HCl, PH 3 , AsH 3 , DETe, and DMZn, the introduced amount of NH 3 was gradually decreased and the introduction of NH 3 was stopped. Next, the DMZn flow rate was further gradually increased by ramping without changing the introduced amounts of HCl, PH 3 , AsH 3 , and DETe to fix the DMZn flow rate, and the fourth p-type GaAs 1-x P x layer ( After forming a p-type (constant composition layer) on the n-type constant composition layer, vapor phase growth was completed, and a compound semiconductor epitaxial wafer was manufactured.

なお、化合物半導体エピタキシャルウェーハを製造する際、上記のようにDETeの導入量を徐々に減少させながら成長することで、第3層n型GaAs1-x層(n型組成一定層)~第4層p型GaAs1-x層(p型組成一定層)中の窒素濃度が一定となる領域(窒素濃度一定領域)にn型ドーパント(Te)を、第3層n型GaAs1-x層(n型組成一定層)から第4層p型GaAs1-x層(p型組成一定層)の方向へ漸減しながらドープした層(傾斜ドープ)を作製した。また、この時のn型ドーパント(Te)濃度は、1.0×1016から0.2×1016(atoms/cm)となるように制御を行った。 In addition, when manufacturing a compound semiconductor epitaxial wafer, the third layer n-type GaAs 1-x P x layer (n-type constant composition layer) ~ Fourth layer p-type GaAs 1-x P An n-type dopant (Te) is added to the region where the nitrogen concentration is constant (nitrogen concentration region) in the x layer (p-type constant composition layer), and third layer n-type GaAs 1 A layer (gradient doping) in which doping was gradually decreased in the direction from the -x P x layer (n-type constant composition layer) to the fourth p-type GaAs 1-x P x layer (p-type constant composition layer) was fabricated. Further, the n-type dopant (Te) concentration at this time was controlled to be from 1.0×10 16 to 0.2×10 16 (atoms/cm 3 ).

作製した化合物半導体エピタキシャルウェーハは、第1層n型GaPバッファー層厚は約5μm、第2層n型GaAs1-y層(組成変化層)厚は約20μm、第3層n型GaAs1-x層(n型組成一定層)厚は約15μm及び第4層p型GaAs1-x層(p型組成一定層)厚は約15μmであった。また、p-n接合界面を含む窒素濃度一定領域は、約15μmであった。 The manufactured compound semiconductor epitaxial wafer had a first n-type GaP buffer layer thickness of approximately 5 μm, a second layer n-type GaAs 1-y P y layer (composition change layer) thickness of approximately 20 μm, and a third layer n-type GaAs 1 layer. The thickness of the -x P x layer (n-type constant composition layer) was about 15 μm, and the thickness of the fourth p-type GaAs 1-x P x layer (p-type constant composition layer) was about 15 μm. Further, the constant nitrogen concentration region including the pn junction interface was approximately 15 μm.

[評価]
このように作製したエピタキシャルウェーハの寿命特性(初期の輝度と通電後の輝度の残存率、即ち、残存率=(通電後の輝度/初期の輝度)×100))を評価するため、以下のような手順の評価を行った。
[evaluation]
In order to evaluate the lifetime characteristics (residual rate of initial brightness and brightness after energization, i.e. survival rate = (luminance after energization/initial brightness) x 100) of the epitaxial wafer produced in this way, the following procedure was performed. We evaluated the procedures.

作製した化合物半導体エピタキシャルウェーハを取出し、裏面ラップを行った。その後、ウェーハ裏面にn型電極を形成し、表面のエピタキシャル層にp型電極を形成した。280μm□サイズにカットした後、ウェーハ外周側から5mm付近オリエンテーションフラット部(OF部)及びOF部の反対側の部分(反OF部)と、ウェーハ中心部の3箇所から2個ずつ計6チップを取出した。取出したチップからLEDランプを作製し、直流電流20mAを流した時の輝度を測定した。その後50mA、25℃、168時間の通電を行い再度輝度の測定を行った。作製直後(初期)の輝度と通電後の輝度の値から残存率を算出した。結果を表1に示す。 The produced compound semiconductor epitaxial wafer was taken out and the back surface was lapped. Thereafter, an n-type electrode was formed on the back surface of the wafer, and a p-type electrode was formed on the epitaxial layer on the front surface. After cutting to a size of 280 μm□, a total of 6 chips were cut, 2 each from the orientation flat part (OF part) around 5 mm from the outer circumference of the wafer, the part on the opposite side of the OF part (anti-OF part), and 3 places at the center of the wafer. I took it out. An LED lamp was made from the chip taken out, and its brightness was measured when a direct current of 20 mA was applied. Thereafter, electricity was applied at 50 mA at 25° C. for 168 hours, and the brightness was measured again. The survival rate was calculated from the brightness immediately after fabrication (initial stage) and the brightness after energization. The results are shown in Table 1.

(実施例2)
窒素濃度一定領域のn型ドーパント(Te)濃度を0.9×1016から0.2×1016(atoms/cm)に傾斜ドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Example 2)
The same as Example 1 except that the n-type dopant (Te) concentration in the constant nitrogen concentration region was doped at a gradient from 0.9×10 16 to 0.2×10 16 (atoms/cm 3 ). The results are also shown in Table 1.

(実施例3)
窒素濃度一定領域のn型ドーパント(Te)濃度を0.8×1016から0.2×1016(atoms/cm)に傾斜ドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Example 3)
This is the same as Example 1 except that the n-type dopant (Te) concentration in the constant nitrogen concentration region was doped at a gradient from 0.8×10 16 to 0.2×10 16 (atoms/cm 3 ). The results are also shown in Table 1.

(実施例4)
窒素濃度一定領域のn型ドーパント(Te)濃度を2.0×1016から0.4×1016(atoms/cm)に傾斜ドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Example 4)
This is the same as Example 1 except that the n-type dopant (Te) concentration in the constant nitrogen concentration region was doped at a gradient from 2.0×10 16 to 0.4×10 16 (atoms/cm 3 ). The results are also shown in Table 1.

(比較例1)
窒素濃度一定領域のn型ドーパント(Te)濃度を9.0×1016から1.8×1016(atoms/cm)に傾斜ドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Comparative example 1)
This is the same as Example 1 except that the n-type dopant (Te) concentration in the constant nitrogen concentration region was doped at a gradient from 9.0×10 16 to 1.8×10 16 (atoms/cm 3 ). The results are also shown in Table 1.

(比較例2)
窒素濃度一定領域のn型ドーパント(Te)濃度を0.4×1016(atoms/cm)でフラットにドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Comparative example 2)
It is the same as Example 1 except that the n-type dopant (Te) concentration in the constant nitrogen concentration region was flatly doped at 0.4×10 16 (atoms/cm 3 ). The results are also shown in Table 1.

(比較例3)
n型ドーパントガスとして硫化水素ガス(HS)を用い、窒素濃度一定領域のn型ドーパント(S)濃度を2.0×1016から0.4×1016(atoms/cm)に傾斜ドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Comparative example 3)
Hydrogen sulfide gas (H 2 S) is used as the n-type dopant gas, and the n-type dopant (S) concentration in the constant nitrogen concentration region is varied from 2.0×10 16 to 0.4×10 16 (atoms/cm 3 ). It is the same as Example 1 except that it is doped. The results are also shown in Table 1.

(比較例4)
n型ドーパントガスとして硫化水素ガス(HS)を用い、窒素濃度一定領域のn型ドーパント(S)濃度を0.2×1016(atoms/cm)のフラットにドープした以外は実施例1と同じである。結果を表1に併せて示す。
(Comparative example 4)
Example except that hydrogen sulfide gas (H 2 S) was used as the n-type dopant gas, and the n-type dopant (S) concentration in the constant nitrogen concentration region was doped to a flat value of 0.2×10 16 (atoms/cm 3 ). Same as 1. The results are also shown in Table 1.

Figure 0007351241000001
Figure 0007351241000001

また、実施例1(傾斜ドープ例)と比較例2(フラットドープ例)のSIMSプロファイルを図4及び図5に示す。 Further, SIMS profiles of Example 1 (gradient doping example) and Comparative Example 2 (flat doping example) are shown in FIGS. 4 and 5.

比較例1では、n型ドーパントをTeとし、p-n接合界面を含む窒素濃度一定領域にTe濃度を9.0×1016から1.8×1016(atoms/cm)の高濃度で傾斜ドープしたが、輝度の残存率は向上しなかった。また、比較例2では、Te濃度を0.4×1016(atoms/cm)でフラットにドープしたが輝度の残存率は向上しなかった。比較例3では、n型ドーパントをSとし、p-n接合界面を含む窒素濃度一定領域にS濃度を2.0×1016から0.4×1016(atoms/cm)に傾斜ドープしたが、輝度の残存率は向上しなかった。また、比較例4では、S濃度を0.2×1016(atoms/cm)でフラットにドープしたが輝度の残存率は向上しなかった。 In Comparative Example 1, the n-type dopant was Te, and the Te concentration was set at a high concentration of 9.0×10 16 to 1.8×10 16 (atoms/cm 3 ) in a constant nitrogen concentration region including the p-n junction interface. Although gradient doping was performed, the residual brightness did not improve. Further, in Comparative Example 2, although the Te concentration was flatly doped at 0.4×10 16 (atoms/cm 3 ), the residual rate of brightness did not improve. In Comparative Example 3, the n-type dopant was S, and the S concentration was gradient-doped from 2.0×10 16 to 0.4×10 16 (atoms/cm 3 ) in a constant nitrogen concentration region including the p-n junction interface. However, the residual brightness rate did not improve. Further, in Comparative Example 4, the S concentration was flatly doped at 0.2×10 16 (atoms/cm 3 ), but the residual brightness did not improve.

一方、本発明の化合物半導体エピタキシャルウェーハでは、n型ドーパントをTeとし、p-n接合界面を含む窒素濃度一定領域に、Te濃度を2.0×1016~0.2×1016(atoms/cm)の範囲で傾斜ドープすることで輝度の残存率が向上した。 On the other hand, in the compound semiconductor epitaxial wafer of the present invention, the n-type dopant is Te, and the Te concentration is set at 2.0×10 16 to 0.2×10 16 (atoms/ By performing gradient doping in the range of 3 cm 3 ), the residual brightness rate was improved.

以上のように、本発明に係る化合物半導体エピタキシャルウェーハであれば、寿命特性が良好な化合物半導体エピタキシャルウェーハとすることができる。また、本発明に係る化合物半導体エピタキシャルウェーハの製造方法であれば、寿命特性の良好な発光素子が得られる化合物半導体エピタキシャルウェーハを低コストで簡単に製造することができる。 As described above, the compound semiconductor epitaxial wafer according to the present invention can be a compound semiconductor epitaxial wafer with good life characteristics. In addition, with the method for manufacturing a compound semiconductor epitaxial wafer according to the present invention, a compound semiconductor epitaxial wafer from which a light emitting element with good lifetime characteristics can be obtained can be easily manufactured at low cost.

なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。 Note that the present invention is not limited to the above embodiments. The above-mentioned embodiments are illustrative, and any embodiment that has substantially the same configuration as the technical idea stated in the claims of the present invention and has similar effects is the present invention. covered within the technical scope of.

1…化合物半導体エピタキシャルウェーハ(本発明)、
2…n型GaP基板、
3…第1層n型GaPバッファー層、
4…第2層n型GaAs1-y層(組成変化層)、
5…第3層n型GaAs1-x層(n型組成一定層)、
6…第4層p型GaAs1-x層(p型組成一定層)、
7…p-n接合界面、 8…窒素ドープ層、
20…石英ボート、 21…エピタキシャル・リアクター、
22…ホルダー、 23…ガス導入管、 24…ヒーター、
25…Ga溜、 W…単結晶基板。
1... Compound semiconductor epitaxial wafer (present invention),
2...n-type GaP substrate,
3...first layer n-type GaP buffer layer,
4...Second n-type GaAs 1-y P y layer (composition change layer),
5... Third layer n-type GaAs 1-x P x layer (n-type constant composition layer),
6... Fourth layer p-type GaAs 1-x P x layer (p-type constant composition layer),
7... pn junction interface, 8... nitrogen doped layer,
20...Quartz boat, 21...Epitaxial reactor,
22...Holder, 23...Gas introduction pipe, 24...Heater,
25...Ga reservoir, W...single crystal substrate.

Claims (2)

p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面が形成され、該p-n接合界面を含む部分に窒素濃度が一定となる領域が形成された化合物半導体エピタキシャルウェーハであって、
前記窒素濃度が一定となる領域において、n型ドーパントとしてTeが2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減しながらドーピングされているものであることを特徴とする化合物半導体エピタキシャルウェーハ。
A p-n light-emitting section is formed by a p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45≦x≦1.0) layer. A compound semiconductor epitaxial wafer in which a bonding interface is formed and a region where the nitrogen concentration is constant is formed in a portion including the pn junction interface, the compound semiconductor epitaxial wafer comprising:
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. A compound semiconductor epitaxial wafer characterized in that the p-type GaAs 1-x P x layer is doped while gradually decreasing in the direction thereof.
基板上にハイドライド気相成長法により、p型GaAs1-x(0.45≦x≦1.0)層とn型GaAs1-x(0.45≦x≦1.0)層とにより発光部をなすp-n接合界面を形成する化合物半導体エピタキシャルウェーハの製造方法であって、
前記p-n接合界面を含む部分に窒素をドープし、窒素濃度が一定となる領域を形成し、
該窒素濃度が一定となる領域において、n型ドーパントとしてTeを2.0×1016~0.2×1016(atoms/cm)の範囲で、前記n型GaAs1-x層から前記p型GaAs1-x層の方向へ漸減させながらドーピングすることを特徴とした化合物半導体エピタキシャルウェーハの製造方法。
A p-type GaAs 1-x P x (0.45≦x≦1.0) layer and an n-type GaAs 1-x P x (0.45≦x≦1.0) layer are formed on the substrate by hydride vapor phase epitaxy. A method for manufacturing a compound semiconductor epitaxial wafer in which a layer forms a pn junction interface forming a light emitting part, the method comprising:
doping nitrogen into a portion including the pn junction interface to form a region where the nitrogen concentration is constant;
In the region where the nitrogen concentration is constant, Te is added as an n-type dopant in a range of 2.0×10 16 to 0.2×10 16 (atoms/cm 3 ) from the n-type GaAs 1-x P x layer. A method for manufacturing a compound semiconductor epitaxial wafer, characterized in that doping is performed while gradually decreasing in the direction of the p-type GaAs 1-x P x layer.
JP2020034846A 2020-03-02 2020-03-02 Compound semiconductor epitaxial wafer and its manufacturing method Active JP7351241B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2020034846A JP7351241B2 (en) 2020-03-02 2020-03-02 Compound semiconductor epitaxial wafer and its manufacturing method
TW110103611A TW202135341A (en) 2020-03-02 2021-02-01 Compound semiconductor epitaxial wafer and manufacturing method thereof capable of achieving excellent lifetime characteristics
CN202110227150.6A CN113345991A (en) 2020-03-02 2021-03-01 Compound semiconductor epitaxial wafer and method for manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2020034846A JP7351241B2 (en) 2020-03-02 2020-03-02 Compound semiconductor epitaxial wafer and its manufacturing method

Publications (2)

Publication Number Publication Date
JP2021141104A JP2021141104A (en) 2021-09-16
JP7351241B2 true JP7351241B2 (en) 2023-09-27

Family

ID=77467691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020034846A Active JP7351241B2 (en) 2020-03-02 2020-03-02 Compound semiconductor epitaxial wafer and its manufacturing method

Country Status (3)

Country Link
JP (1) JP7351241B2 (en)
CN (1) CN113345991A (en)
TW (1) TW202135341A (en)

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5135877A (en) 1990-10-09 1992-08-04 Eastman Kodak Company Method of making a light-emitting diode with anti-reflection layer optimization
JP2000164923A (en) 1997-12-24 2000-06-16 Mitsubishi Chemicals Corp Epitaxial wafer and led
JP2000183396A (en) 1998-12-15 2000-06-30 Mitsubishi Chemicals Corp Epitaxial wafer and led manufactured using the wafer
WO2001033642A1 (en) 1999-10-29 2001-05-10 Shin-Etsu Handotai Co., Ltd. Gallium phosphide luminescent device
JP2002280605A (en) 2001-03-15 2002-09-27 Showa Denko Kk N-TYPE GaP SINGLE CRYSTAL SUBSTRATE, ITS MANUFACTURING METHOD, GaP GREEN LIGHT EMITTING DIODE AND EPITAXIAL SUBSTRATE THEREFOR
JP2002329884A (en) 2001-04-27 2002-11-15 Shin Etsu Handotai Co Ltd Light emitting-element and method for manufacturing the same
JP4328878B2 (en) 2008-10-10 2009-09-09 株式会社日本キャリア工業 Slice meat transfer device
JP5437486B2 (en) 2010-06-03 2014-03-12 nusola株式会社 Photoelectric conversion element
JP5827382B2 (en) 2014-02-24 2015-12-02 台達電子工業股▲ふん▼有限公司Delta Electronics,Inc. Output power supply protection device and operation method thereof
JP6120561B2 (en) 2012-12-26 2017-04-26 三菱電機株式会社 Graphic drawing apparatus and graphic drawing program
JP6196756B2 (en) 2012-06-18 2017-09-13 ローム株式会社 Battery module and battery control circuit thereof, home storage battery and vehicle using the same
JP7142764B2 (en) 2018-08-07 2022-09-27 維沃移動通信有限公司 Method for setting measurement gaps and network nodes

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214276A (en) * 1983-05-20 1984-12-04 Showa Denko Kk Manufacture of gallium phosphide green light-emitting element
JP3356041B2 (en) * 1997-02-17 2002-12-09 昭和電工株式会社 Gallium phosphide green light emitting device

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5135877A (en) 1990-10-09 1992-08-04 Eastman Kodak Company Method of making a light-emitting diode with anti-reflection layer optimization
JP2000164923A (en) 1997-12-24 2000-06-16 Mitsubishi Chemicals Corp Epitaxial wafer and led
JP2000183396A (en) 1998-12-15 2000-06-30 Mitsubishi Chemicals Corp Epitaxial wafer and led manufactured using the wafer
WO2001033642A1 (en) 1999-10-29 2001-05-10 Shin-Etsu Handotai Co., Ltd. Gallium phosphide luminescent device
JP2002280605A (en) 2001-03-15 2002-09-27 Showa Denko Kk N-TYPE GaP SINGLE CRYSTAL SUBSTRATE, ITS MANUFACTURING METHOD, GaP GREEN LIGHT EMITTING DIODE AND EPITAXIAL SUBSTRATE THEREFOR
JP3791672B2 (en) 2001-04-27 2006-06-28 信越半導体株式会社 Light emitting device and manufacturing method thereof
JP2002329884A (en) 2001-04-27 2002-11-15 Shin Etsu Handotai Co Ltd Light emitting-element and method for manufacturing the same
JP4328878B2 (en) 2008-10-10 2009-09-09 株式会社日本キャリア工業 Slice meat transfer device
JP5437486B2 (en) 2010-06-03 2014-03-12 nusola株式会社 Photoelectric conversion element
JP6196756B2 (en) 2012-06-18 2017-09-13 ローム株式会社 Battery module and battery control circuit thereof, home storage battery and vehicle using the same
JP6120561B2 (en) 2012-12-26 2017-04-26 三菱電機株式会社 Graphic drawing apparatus and graphic drawing program
JP5827382B2 (en) 2014-02-24 2015-12-02 台達電子工業股▲ふん▼有限公司Delta Electronics,Inc. Output power supply protection device and operation method thereof
JP7142764B2 (en) 2018-08-07 2022-09-27 維沃移動通信有限公司 Method for setting measurement gaps and network nodes

Also Published As

Publication number Publication date
CN113345991A (en) 2021-09-03
TW202135341A (en) 2021-09-16
JP2021141104A (en) 2021-09-16

Similar Documents

Publication Publication Date Title
US6110757A (en) Method of forming epitaxial wafer for light-emitting device including an active layer having a two-phase structure
JP3143040B2 (en) Epitaxial wafer and method for manufacturing the same
JP7351241B2 (en) Compound semiconductor epitaxial wafer and its manufacturing method
JP3146874B2 (en) Light emitting diode
JP3792817B2 (en) GaAsP epitaxial wafer and manufacturing method thereof
JP3625686B2 (en) Compound semiconductor epitaxial wafer, method for manufacturing the same, and light emitting diode manufactured using the same
JP3111644B2 (en) Gallium arsenide arsenide epitaxial wafer
JP3633806B2 (en) Epitaxial wafer and light-emitting diode manufactured using the same
JP3090063B2 (en) Compound semiconductor device
JPH0760903B2 (en) Epitaxial wafer and manufacturing method thereof
JP3221359B2 (en) P-type group III nitride semiconductor layer and method for forming the same
JP3762575B2 (en) Light emitting diode
JP4024965B2 (en) Epitaxial wafer and light emitting diode
JP4572942B2 (en) Epitaxial wafer manufacturing method and epitaxial wafer
WO2020209014A1 (en) Light emitting element and method of manufacturing light emitting element
JP2009212112A (en) Epitaxial wafer
JP3525704B2 (en) Gallium arsenide arsenide epitaxial wafers and light emitting diodes
JPH04328823A (en) Manufacture of epitaxial wafer for light emitting diode
JP2019004098A (en) Epitaxial wafer and method for manufacturing the same
JP3625677B2 (en) Epitaxial wafer, light emitting diode, and manufacturing method thereof
JP5862472B2 (en) Epitaxial wafer manufacturing method and epitaxial wafer
JPH0219619B2 (en)
JP2000164923A (en) Epitaxial wafer and led
JP2001036133A (en) Epitaxial wafer and light-emitting diode
JP2000319100A (en) Epitaxial wafer and light emitting diode

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220217

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20220930

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20221018

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221201

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230328

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230815

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230828

R150 Certificate of patent or registration of utility model

Ref document number: 7351241

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150